Searched refs:ucode (Results 1 - 150 of 150) sorted by relevance

/linux-4.4.14/drivers/net/wireless/brcm80211/brcmsmac/
H A Ducode_loader.c40 int brcms_ucode_data_init(struct brcms_info *wl, struct brcms_ucode *ucode) brcms_ucode_data_init() argument
47 brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn0bsinitvals24, brcms_ucode_data_init()
50 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn0initvals24, brcms_ucode_data_init()
53 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn1bsinitvals24, brcms_ucode_data_init()
56 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn1initvals24, brcms_ucode_data_init()
59 brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn2bsinitvals24, brcms_ucode_data_init()
62 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11lcn2initvals24, brcms_ucode_data_init()
65 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11n0absinitvals16, brcms_ucode_data_init()
68 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11n0bsinitvals16, brcms_ucode_data_init()
71 rc : brcms_ucode_init_buf(wl, (void **)&ucode->d11n0initvals16, brcms_ucode_data_init()
74 rc : brcms_ucode_init_buf(wl, (void **)&ucode->bcm43xx_16_mimo, brcms_ucode_data_init()
77 rc : brcms_ucode_init_uint(wl, &ucode->bcm43xx_16_mimosz, brcms_ucode_data_init()
80 rc : brcms_ucode_init_buf(wl, (void **)&ucode->bcm43xx_24_lcn, brcms_ucode_data_init()
83 rc : brcms_ucode_init_uint(wl, &ucode->bcm43xx_24_lcnsz, brcms_ucode_data_init()
86 rc : brcms_ucode_init_buf(wl, (void **)&ucode->bcm43xx_bommajor, brcms_ucode_data_init()
89 rc : brcms_ucode_init_buf(wl, (void **)&ucode->bcm43xx_bomminor, brcms_ucode_data_init()
94 void brcms_ucode_data_free(struct brcms_ucode *ucode) brcms_ucode_data_free() argument
96 brcms_ucode_free_buf((void *)ucode->d11lcn0bsinitvals24); brcms_ucode_data_free()
97 brcms_ucode_free_buf((void *)ucode->d11lcn0initvals24); brcms_ucode_data_free()
98 brcms_ucode_free_buf((void *)ucode->d11lcn1bsinitvals24); brcms_ucode_data_free()
99 brcms_ucode_free_buf((void *)ucode->d11lcn1initvals24); brcms_ucode_data_free()
100 brcms_ucode_free_buf((void *)ucode->d11lcn2bsinitvals24); brcms_ucode_data_free()
101 brcms_ucode_free_buf((void *)ucode->d11lcn2initvals24); brcms_ucode_data_free()
102 brcms_ucode_free_buf((void *)ucode->d11n0absinitvals16); brcms_ucode_data_free()
103 brcms_ucode_free_buf((void *)ucode->d11n0bsinitvals16); brcms_ucode_data_free()
104 brcms_ucode_free_buf((void *)ucode->d11n0initvals16); brcms_ucode_data_free()
105 brcms_ucode_free_buf((void *)ucode->bcm43xx_16_mimo); brcms_ucode_data_free()
106 brcms_ucode_free_buf((void *)ucode->bcm43xx_24_lcn); brcms_ucode_data_free()
107 brcms_ucode_free_buf((void *)ucode->bcm43xx_bommajor); brcms_ucode_data_free()
108 brcms_ucode_free_buf((void *)ucode->bcm43xx_bomminor); brcms_ucode_data_free()
H A Ducode_loader.h46 int brcms_ucode_data_init(struct brcms_info *wl, struct brcms_ucode *ucode);
48 void brcms_ucode_data_free(struct brcms_ucode *ucode);
H A Dantsel.c178 * convert ant_cfg to mimo_antsel (ucode interface)
199 /* boardlevel antenna selection: ucode interface control */ brcms_c_antsel_cfgupd()
292 /* boardlevel antenna selection: convert mimo_antsel (ucode interface) to id */ brcms_c_antsel_antsel2id()
H A Dd11.h746 * has padding added in the ucode.
1082 /* Location where the ucode expects the corerev */
1085 /* Location where the ucode expects the MAC capabilities */
1154 /* Host flags to turn on ucode options */
1248 /* SHM locations where ucode stores the current power index */
1279 #define M_LCN_PWR_IDX_MAX (0x67 * 2) /* highest index read by ucode */
1280 #define M_LCN_PWR_IDX_MIN (0x66 * 2) /* lowest index read by ucode */
1328 /* Enable ucode antenna diversity help */
1340 /* Enable ucode/hw power control */
1363 /* Radio power setting for ucode */
1366 /* phy noise recorded by ucode right after tx */
1516 /* ucode RxStatus1: */
1527 /* ucode RxStatus2: */
1543 /* Index of attenuations used during ucode power control. */
1556 #define M_UCODE_DBGST (M_PSM_SOFT_REGS + 0x40) /* ucode debug status code */
1574 /* ucode debug status codes */
1676 /* ucode mac statistic counters in shared memory */
H A Dmac80211_if.h84 struct brcms_ucode ucode; member in struct:brcms_info
H A Dmain.c246 * ucode has default fifo partition, sw can overwrite if necessary
717 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode; brcms_c_ucode_bsinit() local
722 /* do band-specific ucode IHR, SHM, and SCR inits */ brcms_c_ucode_bsinit()
725 brcms_c_write_inits(wlc_hw, ucode->d11n0bsinitvals16); brcms_c_ucode_bsinit()
735 ucode->d11lcn0bsinitvals24); brcms_c_ucode_bsinit()
855 /* discard intermediate indications for ucode with one legitimate case: brcms_c_dotxstatus()
856 * e.g. if "useRTS" is set. ucode did a successful rts/cts exchange, brcms_c_dotxstatus()
1117 * ucode host flag 2 needed for pio mode, independent of band and fifo brcms_b_attach_dmapio()
1189 /* initial ucode host flags */ brcms_b_attach_dmapio()
1233 /* delay before first read of ucode state */ brcms_b_wait_for_wake()
1236 /* wait until ucode is no longer asleep */ brcms_b_wait_for_wake()
1298 * keep the ucode wake bit on if forcefastclk is on since we brcms_b_clkctl_clk()
1299 * do not want ucode to put us back to slow clock when it dozes brcms_b_clkctl_clk()
1302 * instead of waking ucode immediately since old code had this brcms_b_clkctl_clk()
1316 /* set or clear ucode host flag bits
1462 /* When driver needs ucode to stop beaconing, it has to make sure that
1855 /* ucode should still be suspended.. */ brcms_b_setband()
2115 * need to propagate to shm location to be in sync since ucode/hw won't brcms_b_corerev_fifofixup()
2249 * gpio 9 controls the PA. ucode is responsible brcms_c_gpio_init()
2260 const __le32 ucode[], const size_t nbytes) brcms_ucode_write()
2274 bcma_write32(core, D11REGOFFS(objdata), le32_to_cpu(ucode[i])); brcms_ucode_write()
2281 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode; brcms_ucode_download() local
2290 brcms_ucode_write(wlc_hw, ucode->bcm43xx_16_mimo, brcms_ucode_download()
2291 ucode->bcm43xx_16_mimosz); brcms_ucode_download()
2299 brcms_ucode_write(wlc_hw, ucode->bcm43xx_24_lcn, brcms_ucode_download()
2300 ucode->bcm43xx_24_lcnsz); brcms_ucode_download()
2315 /* push to ucode if up */ brcms_b_txant_set()
2458 * underflow which may result in mismatch between ucode and brcms_b_tx_fifo_suspend()
3173 * download ucode/PCM
3174 * let ucode run to suspended
3175 * download ucode inits
3189 struct brcms_ucode *ucode = &wlc_hw->wlc->wl->ucode; brcms_b_coreinit() local
3207 /* wait for ucode to self-suspend after auto-init */ brcms_b_coreinit()
3211 brcms_err(core, "wl%d: wlc_coreinit: ucode did not self-" brcms_b_coreinit()
3220 brcms_c_write_inits(wlc_hw, ucode->d11n0initvals16); brcms_b_coreinit()
3227 brcms_c_write_inits(wlc_hw, ucode->d11lcn0initvals24); brcms_b_coreinit()
3237 /* For old ucode, txfifo sizes needs to be modified(increased) */ brcms_b_coreinit()
3241 /* check txfifo allocations match between ucode and driver */ brcms_b_coreinit()
3275 brcms_err(core, "wlc_coreinit: txfifo mismatch: ucode size %d" brcms_b_coreinit()
3314 /* tell the ucode the corerev */ brcms_b_coreinit()
3317 /* tell the ucode MAC capabilities */ brcms_b_coreinit()
3388 * initialize mac_suspend_depth to 1 to match ucode brcms_b_init()
3593 * ucode, hwmac update
3594 * Channel dependent updates for ucode and hw
3605 * in ucode inits. I think that the ucode inits set brcms_c_ucode_mac_upd()
3608 * ucode needs to set up a beacon for testing, the brcms_c_ucode_mac_upd()
3709 /* write ucode ACK/CTS rate table */ brcms_c_bsinit()
4076 /* convert from units of 32us to us for ucode */ brcms_c_wme_setparams()
4097 /* Indicate the new params to the ucode */ brcms_c_wme_setparams()
4133 }; /* ucode needs these parameters during its initialization */ brcms_c_edcf_setparams()
4998 * from wlc struct to ucode
6593 * extra fields for ucode AMPDU aggregation, the new fields are added to brcms_c_d11hdrs_mac80211()
6891 * via DMA (NOT PIO), update ucode or BSS info as appropriate. brcms_c_tx()
6899 * To inform the ucode of the last mcast frame posted brcms_c_tx()
7034 * The RxTSFTime are the lowest 16 bits and provided by the ucode. The
7456 * prevent ucode from sending probe responses by setting the timeout brcms_c_enable_probe_resp()
7926 /* read the ucode version if we have not yet done so */ brcms_c_init()
2259 brcms_ucode_write(struct brcms_hardware *wlc_hw, const __le32 ucode[], const size_t nbytes) brcms_ucode_write() argument
H A Dmac80211_if.c291 /* free ucode data */ brcms_free()
293 brcms_ucode_data_free(&wl->ucode); brcms_free()
398 status = brcms_ucode_data_init(wl, &wl->ucode); brcms_request_fw()
428 if (!wl->ucode.bcm43xx_bomminor) { brcms_ops_start()
1586 "ERROR: ucode buf tag:%d can not be found!\n", idx); brcms_ucode_init_buf()
1619 "ERROR: ucode tag:%d can not be found!\n", idx); brcms_ucode_init_uint()
1664 /* check if ucode section overruns firmware image */ brcms_check_firmwares()
H A Dstf.c178 /* Needs to update beacon and ucode generated response brcms_c_stf_txcore_set()
214 * Antennas are controlled by ucode indirectly, which drives PHY or GPIO to
H A Dmain.h360 u32 mute_override; /* Prevent ucode from sending beacons */
368 bool ucode_loaded; /* true after ucode downloaded */
H A Dampdu.c1110 * Extend ucode internal watchdog timer to brcms_c_ampdu_shm_upd()
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ucode.c63 DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor); amdgpu_ucode_print_mc_hdr()
81 DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor); amdgpu_ucode_print_smc_hdr()
102 DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor); amdgpu_ucode_print_gfx_hdr()
167 DRM_ERROR("Unknown RLC ucode version: %u.%u\n", version_major, version_minor); amdgpu_ucode_print_rlc_hdr()
195 DRM_ERROR("Unknown SDMA ucode version: %u.%u\n", amdgpu_ucode_print_sdma_hdr()
220 static int amdgpu_ucode_init_single_fw(struct amdgpu_firmware_info *ucode, amdgpu_ucode_init_single_fw() argument
225 if (NULL == ucode->fw) amdgpu_ucode_init_single_fw()
228 ucode->mc_addr = mc_addr; amdgpu_ucode_init_single_fw()
229 ucode->kaddr = kptr; amdgpu_ucode_init_single_fw()
231 header = (const struct common_firmware_header *)ucode->fw->data; amdgpu_ucode_init_single_fw()
232 memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data + amdgpu_ucode_init_single_fw()
246 struct amdgpu_firmware_info *ucode = NULL; amdgpu_ucode_init_bo() local
285 ucode = &adev->firmware.ucode[i]; amdgpu_ucode_init_bo()
286 if (ucode->fw) { amdgpu_ucode_init_bo()
287 header = (const struct common_firmware_header *)ucode->fw->data; amdgpu_ucode_init_bo()
288 amdgpu_ucode_init_single_fw(ucode, fw_mc_addr + fw_offset, amdgpu_ucode_init_bo()
304 struct amdgpu_firmware_info *ucode = NULL; amdgpu_ucode_fini_bo() local
307 ucode = &adev->firmware.ucode[i]; amdgpu_ucode_fini_bo()
308 if (ucode->fw) { amdgpu_ucode_fini_bo()
309 ucode->mc_addr = 0; amdgpu_ucode_fini_bo()
310 ucode->kaddr = NULL; amdgpu_ucode_fini_bo()
H A Diceland_smc.c292 DRM_ERROR("SMC ucode is not 4 bytes aligned\n"); iceland_smu_upload_firmware_image()
416 DRM_ERROR("ucode type is out of range!\n"); iceland_convert_fw_type()
441 DRM_ERROR("ucode type is out of range!\n"); iceland_smu_get_mask_for_fw_type()
451 struct amdgpu_firmware_info *ucode = &adev->firmware.ucode[id]; iceland_smu_populate_single_firmware_entry() local
456 if (ucode->fw == NULL) iceland_smu_populate_single_firmware_entry()
459 gpu_addr = ucode->mc_addr; iceland_smu_populate_single_firmware_entry()
460 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; iceland_smu_populate_single_firmware_entry()
551 DRM_ERROR("Fail to request SMU load ucode\n"); iceland_smu_request_load_fw()
H A Dcz_smc.c270 struct amdgpu_firmware_info *ucode = cz_load_mec_firmware() local
271 &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC1]; cz_load_mec_firmware()
275 if (ucode->fw == NULL) cz_load_mec_firmware()
291 reg_data = lower_32_bits(ucode->mc_addr) & cz_load_mec_firmware()
295 reg_data = upper_32_bits(ucode->mc_addr) & cz_load_mec_firmware()
457 struct amdgpu_firmware_info *ucode = &adev->firmware.ucode[id]; cz_smu_populate_single_firmware_entry() local
460 if (ucode->fw == NULL) cz_smu_populate_single_firmware_entry()
463 gpu_addr = ucode->mc_addr; cz_smu_populate_single_firmware_entry()
464 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; cz_smu_populate_single_firmware_entry()
600 /* populate ucode */ cz_smu_construct_toc_for_vddgfx_exit()
H A Dfiji_smc.c285 DRM_ERROR("SMC ucode is not 4 bytes aligned\n"); fiji_smu_upload_firmware_image()
381 DRM_ERROR("ucode type is out of range!\n"); fiji_convert_fw_type()
391 struct amdgpu_firmware_info *ucode = &adev->firmware.ucode[id]; fiji_smu_populate_single_firmware_entry() local
396 if (ucode->fw == NULL) fiji_smu_populate_single_firmware_entry()
398 gpu_addr = ucode->mc_addr; fiji_smu_populate_single_firmware_entry()
399 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; fiji_smu_populate_single_firmware_entry()
509 DRM_ERROR("Fail to request SMU load ucode\n"); fiji_smu_request_load_fw()
536 DRM_ERROR("ucode type is out of range!\n"); fiji_smu_get_mask_for_fw_type()
H A Dtonga_smc.c285 DRM_ERROR("SMC ucode is not 4 bytes aligned\n"); tonga_smu_upload_firmware_image()
382 DRM_ERROR("ucode type is out of range!\n"); tonga_convert_fw_type()
392 struct amdgpu_firmware_info *ucode = &adev->firmware.ucode[id]; tonga_smu_populate_single_firmware_entry() local
397 if (ucode->fw == NULL) tonga_smu_populate_single_firmware_entry()
400 gpu_addr = ucode->mc_addr; tonga_smu_populate_single_firmware_entry()
401 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; tonga_smu_populate_single_firmware_entry()
511 DRM_ERROR("Fail to request SMU load ucode\n"); tonga_smu_request_load_fw()
538 DRM_ERROR("ucode type is out of range!\n"); tonga_smu_get_mask_for_fw_type()
H A Damdgpu_ucode.h34 uint32_t ucode_size_bytes; /* size of ucode in bytes */
155 /* ucode ID */
H A Damdgpu_cgs.c674 struct amdgpu_firmware_info *ucode; amdgpu_cgs_get_firmware_info() local
677 ucode = &adev->firmware.ucode[id]; amdgpu_cgs_get_firmware_info()
678 if (ucode->fw == NULL) amdgpu_cgs_get_firmware_info()
681 gpu_addr = ucode->mc_addr; amdgpu_cgs_get_firmware_info()
682 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; amdgpu_cgs_get_firmware_info()
H A Dsdma_v2_4.c109 * sdma_v2_4_init_microcode - load ucode images from disk
113 * Use the firmware interface to load the ucode images into
153 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; sdma_v2_4_init_microcode()
535 * sdma_v2_4_load_microcode - load the sDMA ME ucode
539 * Loads the sDMA0/1 ucode.
540 * Returns 0 for success, -EINVAL if the ucode is not available.
H A Dcik_sdma.c87 * cik_sdma_init_microcode - load ucode images from disk
91 * Use the firmware interface to load the ucode images into
491 * cik_sdma_load_microcode - load the sDMA ME ucode
495 * Loads the sDMA0/1 ucode.
496 * Returns 0 for success, -EINVAL if the ucode is not available.
H A Dgmc_v7_0.c142 * gmc_v7_0_init_microcode - load ucode images from disk
146 * Use the firmware interface to load the ucode images into
196 * gmc_v7_0_mc_load_microcode - load MC ucode into the hw
200 * Load the GDDR MC ucode into the hw (CIK).
242 /* load the MC ucode */ gmc_v7_0_mc_load_microcode()
H A Dgmc_v8_0.c192 * gmc_v8_0_init_microcode - load ucode images from disk
196 * Use the firmware interface to load the ucode images into
237 * gmc_v8_0_mc_load_microcode - load MC ucode into the hw
241 * Load the GDDR MC ucode into the hw (CIK).
283 /* load the MC ucode */ gmc_v8_0_mc_load_microcode()
H A Dsdma_v3_0.c197 * sdma_v3_0_init_microcode - load ucode images from disk
201 * Use the firmware interface to load the ucode images into
250 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SDMA0 + i]; sdma_v3_0_init_microcode()
683 * sdma_v3_0_load_microcode - load the sDMA ME ucode
687 * Loads the sDMA0/1 ucode.
688 * Returns 0 for success, -EINVAL if the ucode is not available.
H A Dgfx_v7_0.c892 * gfx_v7_0_init_microcode - load ucode images from disk
896 * Use the firmware interface to load the ucode images into
2755 * gfx_v7_0_cp_gfx_load_microcode - load the gfx CP ME ucode
2759 * Loads the gfx PFP, ME, and CE ucode.
2760 * Returns 0 for success, -EINVAL if the ucode is not available.
3068 * gfx_v7_0_cp_compute_load_microcode - load the compute CP ME ucode
3072 * Loads the compute MEC1&2 ucode.
3073 * Returns 0 for success, -EINVAL if the ucode is not available.
4057 * Initialize the RLC registers, load the ucode,
4059 * Returns 0 for success, -EINVAL if the ucode is not available.
H A Dgfx_v8_0.c830 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_PFP]; gfx_v8_0_init_microcode()
837 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_ME]; gfx_v8_0_init_microcode()
844 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_CE]; gfx_v8_0_init_microcode()
851 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_G]; gfx_v8_0_init_microcode()
858 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC1]; gfx_v8_0_init_microcode()
866 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2]; gfx_v8_0_init_microcode()
3702 uint32_t reserved_t[256]; /* Reserve 256 dword buffer used by ucode */
H A Damdgpu.h1734 struct amdgpu_firmware_info ucode[AMDGPU_UCODE_ID_MAXIMUM]; member in struct:amdgpu_firmware
1807 /* ucode loading complete flag */
H A Dci_dpm.c5786 * ci_dpm_init_microcode - load ucode images from disk
5790 * Use the firmware interface to load the ucode images into
/linux-4.4.14/drivers/net/wireless/iwlwifi/
H A Diwl-fw.h76 * The type of ucode.
78 * @IWL_UCODE_REGULAR: Normal runtime ucode
79 * @IWL_UCODE_INIT: Initial ucode
80 * @IWL_UCODE_WOWLAN: Wake on Wireless enabled ucode
81 * @IWL_UCODE_REGULAR_USNIFFER: Normal runtime ucode when using usniffer image
92 * enumeration of ucode section.
223 * @ucode_ver: ucode version from the ucode file
225 * @img: ucode image like ucode_rt, ucode_init, ucode_wowlan.
226 * @ucode_capa: capabilities parsed from the ucode file.
228 * @init_evtlog_ptr: event log offset for init ucode.
229 * @init_evtlog_size: event log size for init ucode.
230 * @init_errlog_ptr: error log offfset for init ucode.
231 * @inst_evtlog_ptr: event log offset for runtime ucode.
232 * @inst_evtlog_size: event log size for runtime ucode.
233 * @inst_errlog_ptr: error log offfset for runtime ucode.
251 /* ucode images */
H A Diwl-drv.c105 * @firmware_name: composite filename of ucode file to load
236 snprintf(drv->firmware_name, sizeof(drv->firmware_name), "%s%s.ucode", iwl_request_firmware()
247 "%s%c-%s.ucode", name_pre, rev_step, tag); iwl_request_firmware()
493 struct iwl_ucode_header *ucode = (void *)ucode_raw->data; iwl_parse_v1_v2_firmware() local
498 drv->fw.ucode_ver = le32_to_cpu(ucode->ver); iwl_parse_v1_v2_firmware()
508 build = le32_to_cpu(ucode->u.v2.build); iwl_parse_v1_v2_firmware()
510 le32_to_cpu(ucode->u.v2.inst_size)); iwl_parse_v1_v2_firmware()
512 le32_to_cpu(ucode->u.v2.data_size)); iwl_parse_v1_v2_firmware()
514 le32_to_cpu(ucode->u.v2.init_size)); iwl_parse_v1_v2_firmware()
516 le32_to_cpu(ucode->u.v2.init_data_size)); iwl_parse_v1_v2_firmware()
517 src = ucode->u.v2.data; iwl_parse_v1_v2_firmware()
529 le32_to_cpu(ucode->u.v1.inst_size)); iwl_parse_v1_v2_firmware()
531 le32_to_cpu(ucode->u.v1.data_size)); iwl_parse_v1_v2_firmware()
533 le32_to_cpu(ucode->u.v1.init_size)); iwl_parse_v1_v2_firmware()
535 le32_to_cpu(ucode->u.v1.init_data_size)); iwl_parse_v1_v2_firmware()
536 src = ucode->u.v1.data; iwl_parse_v1_v2_firmware()
595 struct iwl_tlv_ucode_header *ucode = (void *)ucode_raw->data; iwl_parse_tlv_firmware() local
610 if (len < sizeof(*ucode)) { iwl_parse_tlv_firmware()
615 if (ucode->magic != cpu_to_le32(IWL_TLV_UCODE_MAGIC)) { iwl_parse_tlv_firmware()
617 le32_to_cpu(ucode->magic)); iwl_parse_tlv_firmware()
621 drv->fw.ucode_ver = le32_to_cpu(ucode->ver); iwl_parse_tlv_firmware()
622 memcpy(drv->fw.human_readable, ucode->human_readable, iwl_parse_tlv_firmware()
624 build = le32_to_cpu(ucode->build); iwl_parse_tlv_firmware()
642 data = ucode->data; iwl_parse_tlv_firmware()
644 len -= sizeof(*ucode); iwl_parse_tlv_firmware()
700 IWL_ERR(drv, "Found unexpected BOOT ucode\n"); iwl_parse_tlv_firmware()
1032 "user selected to work with usniffer but usniffer image isn't available in ucode package\n"); iwl_parse_tlv_firmware()
1043 * If ucode advertises that it supports GSCAN but GSCAN iwl_parse_tlv_firmware()
1180 struct iwl_ucode_header *ucode; iwl_req_fw_callback() local
1221 /* Data from ucode file: header followed by uCode images */ iwl_req_fw_callback()
1222 ucode = (struct iwl_ucode_header *)ucode_raw->data; iwl_req_fw_callback()
1224 if (ucode->ver) iwl_req_fw_callback()
1274 /* Allocate ucode buffers for card's bus-master loading ... */ iwl_req_fw_callback()
H A Diwl-2000.c57 #define IWL2030_MODULE_FIRMWARE(api) IWL2030_FW_PRE __stringify(api) ".ucode"
60 #define IWL2000_MODULE_FIRMWARE(api) IWL2000_FW_PRE __stringify(api) ".ucode"
63 #define IWL105_MODULE_FIRMWARE(api) IWL105_FW_PRE __stringify(api) ".ucode"
66 #define IWL135_MODULE_FIRMWARE(api) IWL135_FW_PRE __stringify(api) ".ucode"
H A Diwl-1000.c50 #define IWL1000_MODULE_FIRMWARE(api) IWL1000_FW_PRE __stringify(api) ".ucode"
53 #define IWL100_MODULE_FIRMWARE(api) IWL100_FW_PRE __stringify(api) ".ucode"
H A Diwl-6000.c67 #define IWL6000_MODULE_FIRMWARE(api) IWL6000_FW_PRE __stringify(api) ".ucode"
70 #define IWL6050_MODULE_FIRMWARE(api) IWL6050_FW_PRE __stringify(api) ".ucode"
73 #define IWL6005_MODULE_FIRMWARE(api) IWL6005_FW_PRE __stringify(api) ".ucode"
76 #define IWL6030_MODULE_FIRMWARE(api) IWL6030_FW_PRE __stringify(api) ".ucode"
H A Diwl-7000.c105 #define IWL7260_MODULE_FIRMWARE(api) IWL7260_FW_PRE __stringify(api) ".ucode"
108 #define IWL3160_MODULE_FIRMWARE(api) IWL3160_FW_PRE __stringify(api) ".ucode"
111 #define IWL7265_MODULE_FIRMWARE(api) IWL7265_FW_PRE __stringify(api) ".ucode"
114 #define IWL7265D_MODULE_FIRMWARE(api) IWL7265D_FW_PRE __stringify(api) ".ucode"
H A Diwl-5000.c52 #define IWL5000_MODULE_FIRMWARE(api) IWL5000_FW_PRE __stringify(api) ".ucode"
55 #define IWL5150_MODULE_FIRMWARE(api) IWL5150_FW_PRE __stringify(api) ".ucode"
H A Diwl-devtrace-ucode.h80 #define TRACE_INCLUDE_FILE iwl-devtrace-ucode
H A Diwl-devtrace.h84 #include "iwl-devtrace-ucode.h"
H A Diwl-fw-file.h156 * The TLV style ucode header is distinguished from
178 * ucode TLVs
180 * ability to get extension for: flags & capabilities from ucode binaries files
193 * enum iwl_ucode_tlv_flag - ucode API flags
245 * enum iwl_ucode_tlv_api - ucode api
247 * @IWL_UCODE_TLV_API_FRAGMENTED_SCAN: This ucode supports active dwell time
249 * @IWL_UCODE_TLV_API_WIFI_MCC_UPDATE: ucode supports MCC updates with source.
250 * @IWL_UCODE_TLV_API_WIDE_CMD_HDR: ucode supports wide command header
280 * enum iwl_ucode_tlv_capa - ucode capabilities
303 * @IWL_UCODE_TLV_CAPA_LAR_MULTI_MCC: ucode supports LAR updates with different
H A Diwl-config.h159 * @max_event_log_size: size of event log buffer size for ucode event logging
276 * (.ucode) will be added to filename before loading from disk. The
277 * filename is constructed as fw_name_pre<api>.ucode.
H A Diwl-notif-wait.h93 * parameters. Then do whatever will cause the ucode
H A Diwl-8000.c94 IWL8000_FW_PRE "-" __stringify(api) ".ucode"
H A Diwl-phy-db.c113 * phy db - configure operational ucode
H A Diwl-csr.h276 * Indicates MAC (ucode processor, etc.) is powered up and can run.
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxnv40.h12 u32 *ucode; member in struct:nvkm_grctx
26 u32 *ctxprog = ctx->ucode; cp_out()
60 u32 *ctxprog = ctx->ucode; cp_name()
H A Dgf108.c110 .fecs.ucode = &gf100_gr_fecs_ucode,
111 .gpccs.ucode = &gf100_gr_gpccs_ucode,
H A Dgf110.c91 .fecs.ucode = &gf100_gr_fecs_ucode,
92 .gpccs.ucode = &gf100_gr_gpccs_ucode,
H A Dgf104.c119 .fecs.ucode = &gf100_gr_fecs_ucode,
120 .gpccs.ucode = &gf100_gr_gpccs_ucode,
H A Dgf117.c127 .fecs.ucode = &gf117_gr_fecs_ucode,
128 .gpccs.ucode = &gf117_gr_gpccs_ucode,
H A Dgk110b.c107 .fecs.ucode = &gk110_gr_fecs_ucode,
108 .gpccs.ucode = &gk110_gr_gpccs_ucode,
H A Dgk208.c166 .fecs.ucode = &gk208_gr_fecs_ucode,
167 .gpccs.ucode = &gk208_gr_gpccs_ucode,
H A Dgf119.c182 .fecs.ucode = &gf100_gr_fecs_ucode,
183 .gpccs.ucode = &gf100_gr_gpccs_ucode,
H A Dgk110.c187 .fecs.ucode = &gk110_gr_fecs_ucode,
188 .gpccs.ucode = &gk110_gr_gpccs_ucode,
H A Dgf100.c1159 nvkm_error(subdev, "FECS ucode error %d\n", code); gf100_gr_ctxctl_isr()
1437 if (!gr->func->fecs.ucode) { gf100_gr_init_ctxctl()
1444 for (i = 0; i < gr->func->fecs.ucode->data.size / 4; i++) gf100_gr_init_ctxctl()
1445 nvkm_wr32(device, 0x4091c4, gr->func->fecs.ucode->data.data[i]); gf100_gr_init_ctxctl()
1448 for (i = 0; i < gr->func->fecs.ucode->code.size / 4; i++) { gf100_gr_init_ctxctl()
1451 nvkm_wr32(device, 0x409184, gr->func->fecs.ucode->code.data[i]); gf100_gr_init_ctxctl()
1456 for (i = 0; i < gr->func->gpccs.ucode->data.size / 4; i++) gf100_gr_init_ctxctl()
1457 nvkm_wr32(device, 0x41a1c4, gr->func->gpccs.ucode->data.data[i]); gf100_gr_init_ctxctl()
1460 for (i = 0; i < gr->func->gpccs.ucode->code.size / 4; i++) { gf100_gr_init_ctxctl()
1463 nvkm_wr32(device, 0x41a184, gr->func->gpccs.ucode->code.data[i]); gf100_gr_init_ctxctl()
1473 /* start HUB ucode running, it'll init the GPCs */ gf100_gr_init_ctxctl()
1668 func->fecs.ucode == NULL); gf100_gr_ctor()
1671 gr->firmware || func->fecs.ucode != NULL, gf100_gr_ctor()
1832 .fecs.ucode = &gf100_gr_fecs_ucode,
1833 .gpccs.ucode = &gf100_gr_gpccs_ucode,
H A Dgf100.h127 struct gf100_gr_ucode *ucode; member in struct:gf100_gr_func::__anon4498
130 struct gf100_gr_ucode *ucode; member in struct:gf100_gr_func::__anon4499
H A Dgk104.c313 .fecs.ucode = &gk104_gr_fecs_ucode,
314 .gpccs.ucode = &gk104_gr_gpccs_ucode,
H A Dgm107.c442 .fecs.ucode = &gm107_gr_fecs_ucode,
443 .gpccs.ucode = &gm107_gr_gpccs_ucode,
H A Dctxnv40.c677 .ucode = ctxprog, nv40_grctx_init()
H A Dctxnv50.c271 .ucode = ctxprog, nv50_grctx_init()
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dradeon_ucode.c63 DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor); radeon_ucode_print_mc_hdr()
81 DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor); radeon_ucode_print_smc_hdr()
102 DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor); radeon_ucode_print_gfx_hdr()
129 DRM_ERROR("Unknown RLC ucode version: %u.%u\n", version_major, version_minor); radeon_ucode_print_rlc_hdr()
152 DRM_ERROR("Unknown SDMA ucode version: %u.%u\n", radeon_ucode_print_sdma_hdr()
H A Dradeon_ucode.h164 uint32_t ucode_size_bytes; /* size of ucode in bytes */
H A Drv770_smc.c583 DRM_ERROR("unknown asic in smc ucode loader\n"); rv770_load_smc_ucode()
587 /* load the ucode */ rv770_load_smc_ucode()
H A Dsi_smc.c255 DRM_ERROR("unknown asic in smc ucode loader\n"); si_load_smc_ucode()
H A Dci_smc.c239 DRM_ERROR("unknown asic in smc ucode loader\n"); ci_load_smc_ucode()
H A Dni.c686 /* load the MC ucode */ ni_mc_load_microcode()
806 /* no MC ucode on TN */ ni_init_microcode()
2372 /* Don't start up if the MC ucode is missing. cayman_init()
2373 * The default clocks and voltages before the MC ucode cayman_init()
2377 * ucode. cayman_init()
2380 DRM_ERROR("radeon: MC ucode required for NI+.\n"); cayman_init()
H A Dcik_sdma.c455 * cik_sdma_load_microcode - load the sDMA ME ucode
459 * Loads the sDMA0/1 ucode.
460 * Returns 0 for success, -EINVAL if the ucode is not available.
H A Dcik.c1859 /* ucode loading */
1861 * ci_mc_load_microcode - load MC ucode into the hw
1865 * Load the GDDR MC ucode into the hw (CIK).
1941 /* load the MC ucode */ ci_mc_load_microcode()
1974 * cik_init_microcode - load ucode images from disk
1978 * Use the firmware interface to load the ucode images into
2229 /* No SMC, MC ucode on APUs */ cik_init_microcode()
4292 * cik_cp_gfx_load_microcode - load the gfx CP ME ucode
4296 * Loads the gfx PFP, ME, and CE ucode.
4297 * Returns 0 for success, -EINVAL if the ucode is not available.
4658 * cik_cp_compute_load_microcode - load the compute CP ME ucode
4662 * Loads the compute MEC1&2 ucode.
4663 * Returns 0 for success, -EINVAL if the ucode is not available.
6340 * Initialize the RLC registers, load the ucode,
6342 * Returns 0 for success, -EINVAL if the ucode is not available.
8968 /* Don't start up if the MC ucode is missing. cik_init()
8969 * The default clocks and voltages before the MC ucode cik_init()
8973 DRM_ERROR("radeon: MC ucode required for NI+.\n"); cik_init()
H A Dradeon_pm.c1210 /* set up the default clocks if the MC ucode is loaded */ radeon_pm_resume_old()
1308 /* set up the default clocks if the MC ucode is loaded */ radeon_pm_init_old()
H A Dsi.c1540 /* ucode loading */ si_mc_load_microcode()
1615 /* load the MC ucode */ si_mc_load_microcode()
7262 /* Don't start up if the MC ucode is missing. si_init()
7263 * The default clocks and voltages before the MC ucode si_init()
7267 DRM_ERROR("radeon: MC ucode required for NI+.\n"); si_init()
H A Dsumo_dpm.c1361 DRM_INFO("Found smc ucode version: 0x%08x\n", pi->fw_version); sumo_dpm_setup_asic()
H A Devergreen.c5826 /* Don't start up if the MC ucode is missing on BTC parts. evergreen_init()
5827 * The default clocks and voltages before the MC ucode evergreen_init()
5832 DRM_ERROR("radeon: MC ucode required for NI+.\n"); evergreen_init()
H A Dci_dpm.c5715 /* mclk dpm is unstable on some R7 260X cards with the old mc ucode */ ci_dpm_init()
H A Dradeon_atombios.c2441 /* NI chips post without MC ucode, so default clocks are strobe mode only */ radeon_atombios_parse_pplib_non_clock_info()
/linux-4.4.14/arch/x86/kernel/cpu/microcode/
H A Damd.c143 static void apply_ucode_in_initrd(void *ucode, size_t size, bool save_patch) apply_ucode_in_initrd() argument
167 data = ucode; apply_ucode_in_initrd()
198 * ucode update loop below apply_ucode_in_initrd()
221 offset = data - (u8 *)ucode; apply_ucode_in_initrd()
222 ucode = data; apply_ucode_in_initrd()
266 char fw_name[36] = "amd-ucode/microcode_amd.bin"; load_builtin_amd_microcode()
270 "amd-ucode/microcode_amd_fam%.2xh.bin", family); load_builtin_amd_microcode()
316 void **ucode; load_ucode_amd_ap() local
324 ucode = (void *)__pa_nodebug(&container); load_ucode_amd_ap()
327 if (!*ucode || !*usize) load_ucode_amd_ap()
330 apply_ucode_in_initrd(*ucode, *usize, false); load_ucode_amd_ap()
392 * mixed-steppings silicon so go through the ucode blob anew. load_ucode_amd_ap()
498 * a small, trivial cache of per-family ucode patches
883 * amd-ucode/microcode_amd.bin
889 * amd-ucode/microcode_amd_fam15h.bin
890 * amd-ucode/microcode_amd_fam16h.bin
898 char fw_name[36] = "amd-ucode/microcode_amd.bin"; request_microcode_amd()
903 /* reload ucode container only on the boot cpu */ request_microcode_amd()
908 snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86); request_microcode_amd()
H A Dintel.c268 * Found an older ucode saved earlier. Replace it with _save_mc()
533 sprintf(name, "intel-ucode/%02x-%02x-%02x", family, model, stepping); load_builtin_intel_microcode()
573 * Print ucode update info.
594 * Print early updated ucode info after printk works. This is delayed info dump.
774 * If there is no valid ucode previously saved in memory, no need to load_ucode_intel_ap()
775 * update ucode on this AP. load_ucode_intel_ap()
1001 sprintf(name, "intel-ucode/%02x-%02x-%02x", request_microcode_fw()
/linux-4.4.14/arch/powerpc/sysdev/qe_lib/
H A Dqe.c378 const struct qe_microcode *ucode) qe_upload_microcode()
380 const __be32 *code = base + be32_to_cpu(ucode->code_offset); qe_upload_microcode()
383 if (ucode->major || ucode->minor || ucode->revision) qe_upload_microcode()
386 ucode->id, ucode->major, ucode->minor, ucode->revision); qe_upload_microcode()
389 "uploading microcode '%s'\n", ucode->id); qe_upload_microcode()
392 out_be32(&qe_immr->iram.iadd, be32_to_cpu(ucode->iram_offset) | qe_upload_microcode()
395 for (i = 0; i < be32_to_cpu(ucode->count); i++) qe_upload_microcode()
507 const struct qe_microcode *ucode = &firmware->microcode[i]; qe_upload_firmware() local
510 if (ucode->code_offset) qe_upload_firmware()
511 qe_upload_microcode(firmware, ucode); qe_upload_firmware()
515 u32 trap = be32_to_cpu(ucode->traps[j]); qe_upload_firmware()
522 out_be32(&qe_immr->rsp[i].eccr, be32_to_cpu(ucode->eccr)); qe_upload_firmware()
377 qe_upload_microcode(const void *base, const struct qe_microcode *ucode) qe_upload_microcode() argument
/linux-4.4.14/drivers/tty/serial/
H A Drp2.c159 /* ucode registers */
188 void __iomem *ucode; member in struct:rp2_uart_port
372 up->ucode + RP2_TX_SWFLOW); __rp2_uart_set_termios()
374 up->ucode + RP2_RX_SWFLOW); __rp2_uart_set_termios()
649 writeb(fw->data[i], up->ucode + i); rp2_init_port()
654 writeb(RP2_RX_FIFO_ena, up->ucode + RP2_RX_FIFO); rp2_init_port()
691 rp->ucode = card->bar1 + RP2_UCODE_BASE + j*RP2_UCODE_SPACING; rp2_fw_cb()
711 rp->ucode += RP2_ASIC_SPACING; rp2_fw_cb()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dgm204.c126 /* reset PMU and load init table parser ucode */ gm204_devinit_post()
163 /* load and execute some other ucode image (bios therm?) */ gm204_devinit_post()
/linux-4.4.14/drivers/net/wireless/iwlwifi/dvm/
H A Ducode.c155 * temperature offset calibration is only needed for runtime ucode, iwl_init_alive_start()
304 IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision " iwl_alive_fn()
364 IWL_ERR(priv, "Loaded ucode is not valid!\n"); iwl_load_ucode_wait_alive()
418 /* No init ucode required? Curious, but maybe ok */ iwl_run_init_ucode()
H A Ddev.h436 * @ucode_trace: enable/disable ucode continuous trace timer
439 * @non_wraps_count: counter for no wrap detected when dump ucode events
440 * @wraps_once_count: counter for wrap once detected when dump ucode events
442 * when dump ucode events
692 /* ucode beacon time */
906 /* device_pointers: pointers to ucode event tables */
912 /* indicator of loaded ucode image */
H A Dsta.c402 * iwl_sta_ucode_deactivate - deactivate ucode status for a station
620 * iwl_clear_ucode_stations - clear ucode station table bits
623 * which stations are active in the ucode. Call when something
625 * the ucode, e.g. unassociated RXON.
633 IWL_DEBUG_INFO(priv, "Clearing ucode stations in driver\n"); iwl_clear_ucode_stations()
642 "Clearing ucode active for station %d\n", i); iwl_clear_ucode_stations()
657 * All stations considered active by driver, but not present in ucode, is
H A Ddevices.c118 /* base is usually what we get from ucode with each received frame,
433 * calculate the ucode channel switch time iwl5000_hw_channel_switch()
601 * calculate the ucode channel switch time iwl6000_hw_channel_switch()
H A Dagn.h302 #define IWL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */ iwl_get_agg_tx_fail_reason()
303 #define IWL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of iwl_get_agg_tx_fail_reason()
H A Dtt.c509 "- ucode going to sleep!\n"); iwl_bg_ct_enter()
542 "- ucode awake!\n"); iwl_bg_ct_exit()
H A Dtx.c466 * increase the counter because the ucode will stop iwlagn_tx_skb()
733 * our ucode doesn't allow for that and has a global limit iwlagn_tx_agg_oper()
825 * translate ucode response to mac80211 tx status control values
H A Dmac80211.c261 IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
273 IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
392 /* let the ucode operate on its own */ iwlagn_mac_suspend()
H A Dmain.c210 * The ucode will send beacon notifications even in iwl_bg_beacon_update()
464 * iwl_bg_ucode_trace - Timer callback to log ucode event
775 /* WoWLAN ucode will not reply in the same way, skip it */ iwl_alive_start()
H A Dcommands.h226 * because the ucode will stop/start the scheduler as
930 * responses while ucode keeps track of STA sleep state.
2153 * ucode assume sleep over DTIM is allowed and we don't need to wake up
3154 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
H A Dcalib.c826 * The above algorithm sometimes fails when the ucode iwl_find_disconn_antenna()
H A Dlib.c1167 /* now configure WoWLAN ucode */ iwlagn_suspend()
H A Drxon.c1503 * If the ucode decides to do beacon filtering before iwlagn_bss_info_changed()
H A Ddebugfs.c1882 pos += scnprintf(buf + pos, bufsz - pos, "ucode trace timer is %s\n", iwl_dbgfs_ucode_tracing_read()
/linux-4.4.14/drivers/net/wireless/b43/
H A Db43.h246 #define B43_SHM_SH_HOSTF1 0x005E /* Hostflags 1 for ucode options */
247 #define B43_SHM_SH_HOSTF2 0x0060 /* Hostflags 2 for ucode options */
248 #define B43_SHM_SH_HOSTF3 0x0062 /* Hostflags 3 for ucode options */
253 #define B43_SHM_SH_HOSTF4 0x0078 /* Hostflags 4 for ucode options */
257 #define B43_SHM_SH_MACHW_L 0x00C0 /* Location where the ucode expects the MAC capabilities */
258 #define B43_SHM_SH_MACHW_H 0x00C2 /* Location where the ucode expects the MAC capabilities */
259 #define B43_SHM_SH_HOSTF5 0x00D4 /* Hostflags 5 for ucode options */
357 #define B43_HF_ANTDIVHELP 0x000000000001ULL /* ucode antenna div helper */
366 #define B43_HF_TSSIRPSMW 0x000000000200ULL /* TSSI reset PSM ucode workaround */
368 #define B43_HF_DSCRQ 0x000000000400ULL /* Disable slow clock request in ucode */
375 #define B43_HF_FWKUP 0x000000020000ULL /* Fast wake-up ucode */
640 /* Size of the data. For ucode and PCM this is in bytes.
781 struct b43_firmware_file ucode; member in struct:b43_firmware
H A Dmain.c886 /* The ucode will use phase1 key with TEK key to decrypt rx packets.
893 * and the packet is not usable (it got modified by the ucode).
1698 * If ucode wants to modify TIM do it behind the beacon, this b43_write_beacon_template()
2167 b43_do_release_fw(&dev->fw.ucode); b43_release_firmware()
2379 err = b43_do_request_fw(ctx, filename, &fw->ucode, true); b43_try_request_fw()
2525 b43err(dev->wl, "The driver does not know which firmware (ucode) " b43_try_request_fw()
2641 data = (__be32 *) (dev->fw.ucode.data->data + hdr_len); b43_upload_microcode()
2642 len = (dev->fw.ucode.data->size - hdr_len) / sizeof(__be32); b43_upload_microcode()
2909 /* PA is controlled by gpio 9, let ucode handle it */ b43_gpio_init()
4905 hf |= B43_HF_DSCRQ; /* Disable slowclock requests from ucode. */ b43_wireless_core_init()
4915 /* tell the ucode MAC capabilities */ b43_wireless_core_init()
5704 if (!wldev->fw.ucode.data) b43_bcma_remove()
5787 if (!wldev->fw.ucode.data) b43_ssb_remove()
H A Dxmit.c727 * key index, but the ucode passed it slightly different. b43_rx()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/
H A Dfalcon.c81 nvkm_debug(subdev, "ucode halted\n"); nvkm_falcon_intr()
186 /* no default ucode provided by the engine implementation, try and nvkm_falcon_init()
273 nvkm_error(subdev, "ucode exceeds falcon limit(s)\n"); nvkm_falcon_init()
/linux-4.4.14/drivers/scsi/device_handler/
H A Dscsi_dh_emc.c144 * indicates in-progress ucode upgrade (NDU). trespass_endio()
147 "ucode upgrade NDU operation while sending " trespass_endio()
165 /* check for in-progress ucode upgrade (NDU) */ parse_sp_info_reply()
168 "ucode upgrade NDU operation while finding " parse_sp_info_reply()
/linux-4.4.14/drivers/net/wireless/iwlwifi/mvm/
H A Dfw.c434 "Alive VER1 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", iwl_alive_fn()
456 "Alive VER2 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", iwl_alive_fn()
482 "Alive VER3 ucode status 0x%04x revision 0x%01X 0x%01X flags 0x%01X\n", iwl_alive_fn()
559 IWL_ERR(mvm, "Loaded ucode is not valid!\n"); iwl_mvm_load_ucode_wait_alive()
675 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret); iwl_run_init_mvm_ucode()
967 * If we haven't completed the run of the init ucode during iwl_mvm_up()
968 * module loading, load init ucode now iwl_mvm_up()
973 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret); iwl_mvm_up()
996 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret); iwl_mvm_up()
H A Dfw-api-rs.h335 * If BFER is allowed then force the ucode to choose BFER else
336 * If STBC is allowed then force the ucode to choose STBC over SISO
H A Dfw-api.h311 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
1033 * event_unique_id should be the id of the time event assigned by ucode.
1077 * @event_unique_id: Unique ID of time event assigned by ucode
1289 * In the command response the ucode will return the GP2 time.
1471 * notifies the ucode directly of any mcc change.
1472 * The ucode requests the driver to request the device to update geographic
H A Dfw-api-sta.h278 * asleep. Used to synchronise PS-poll and u-APSD responses while ucode
H A Dops.c570 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", err); iwl_op_mode_mvm_start()
H A Dtx.c661 * translate ucode response to mac80211 tx status control values
H A Dsta.c1030 * our ucode doesn't allow for that and has a global limit iwl_mvm_sta_tx_agg_oper()
H A Drs.c761 /* Convert rs_rate object into ucode rate bitmask */ ucode_rate_from_rs_rate()
823 /* Convert a ucode rate into an rs_rate object */ rs_rate_from_ucode_rate()
H A Dmac80211.c3083 "Aux ROC: Recieved response from ucode: status=%d uid=%d\n", iwl_mvm_rx_aux_roc()
/linux-4.4.14/drivers/net/wireless/iwlegacy/
H A D3945-mac.c171 D_INFO("hwcrypto: modify ucode station key info\n"); il3945_set_ccmp_dynamic_key_info()
210 D_INFO("hwcrypto: clear ucode station key info\n"); il3945_clear_sta_key_info()
750 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n", il3945_hdl_alive()
1216 * buffer that the driver may process (last buffer filled by ucode). */ il3945_rx_handle()
1309 * restock the Rx queue so ucode won't assert. */ il3945_rx_handle()
1693 D_INFO("ucode inst image size is %u\n", len); il3945_verify_inst_full()
1715 D_INFO("ucode image in INSTRUCTION memory is good\n"); il3945_verify_inst_full()
1733 D_INFO("ucode inst image size is %u\n", len); il3945_verify_inst_sparse()
1815 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
1817 return le32_to_cpu(ucode->v1.item); \
1827 il3945_ucode_get_data(const struct il_ucode_header *ucode) il3945_ucode_get_data() argument
1829 return (u8 *) ucode->v1.data; il3945_ucode_get_data()
1846 const struct il_ucode_header *ucode; il3945_read_ucode() local
1861 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode"); il3945_read_ucode()
1891 /* Data from ucode file: header followed by uCode images */ il3945_read_ucode()
1892 ucode = (struct il_ucode_header *)ucode_raw->data; il3945_read_ucode()
1894 il->ucode_ver = le32_to_cpu(ucode->ver); il3945_read_ucode()
1896 inst_size = il3945_ucode_get_inst_size(ucode); il3945_read_ucode()
1897 data_size = il3945_ucode_get_data_size(ucode); il3945_read_ucode()
1898 init_size = il3945_ucode_get_init_size(ucode); il3945_read_ucode()
1899 init_data_size = il3945_ucode_get_init_data_size(ucode); il3945_read_ucode()
1900 boot_size = il3945_ucode_get_boot_size(ucode); il3945_read_ucode()
1901 src = il3945_ucode_get_data(ucode); il3945_read_ucode()
1930 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); il3945_read_ucode()
1979 /* Allocate ucode buffers for card's bus-master loading ... */ il3945_read_ucode()
2385 IL_ERR("ucode not available for device bring up\n"); __il3945_up()
2417 /* Copy original ucode data image from disk into backup cache. __il3945_up()
2439 /* start card; "initialize" will load runtime ucode */ __il3945_up()
2803 /* fetch ucode file from disk, alloc and copy to bus-master buffers ... il3945_mac_start()
2804 * ucode filename and max sizes are card-specific. */ il3945_mac_start()
2824 /* Wait for START_ALIVE from ucode. Otherwise callbacks from il3945_mac_start()
2838 /* ucode is running and will send rfkill notifications, il3945_mac_start()
H A D4965-mac.c1906 * increase the counter because the ucode will stop il4965_tx_skb()
2893 * translate ucode response to mac80211 tx status control values
4041 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n", il4965_hdl_alive()
4240 * buffer that the driver may process (last buffer filled by ucode). */ il4965_rx_handle()
4335 * restock the Rx queue so ucode wont assert. */ il4965_rx_handle()
4453 /* driver only loads ucode once setting the interface up. il4965_irq_tasklet()
4454 * the driver allows loading the ucode even if the radio il4965_irq_tasklet()
4707 sprintf(il->firmware_name, "%s%s%s", name_pre, tag, ".ucode"); il4965_request_firmware()
4725 struct il_ucode_header *ucode = (void *)ucode_raw->data; il4965_load_firmware() local
4729 il->ucode_ver = le32_to_cpu(ucode->ver); il4965_load_firmware()
4742 pieces->inst_size = le32_to_cpu(ucode->v1.inst_size); il4965_load_firmware()
4743 pieces->data_size = le32_to_cpu(ucode->v1.data_size); il4965_load_firmware()
4744 pieces->init_size = le32_to_cpu(ucode->v1.init_size); il4965_load_firmware()
4745 pieces->init_data_size = le32_to_cpu(ucode->v1.init_data_size); il4965_load_firmware()
4746 pieces->boot_size = le32_to_cpu(ucode->v1.boot_size); il4965_load_firmware()
4747 src = ucode->v1.data; il4965_load_firmware()
4785 struct il_ucode_header *ucode; il4965_ucode_callback() local
4814 /* Data from ucode file: header followed by uCode images */ il4965_ucode_callback()
4815 ucode = (struct il_ucode_header *)ucode_raw->data; il4965_ucode_callback()
4857 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); il4965_ucode_callback()
4895 /* Allocate ucode buffers for card's bus-master loading ... */ il4965_ucode_callback()
5544 IL_ERR("ucode not available for device bringup\n"); __il4965_up()
5595 /* Copy original ucode data image from disk into backup cache. __il4965_up()
5613 /* start card; "initialize" will load runtime ucode */ __il4965_up()
5830 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from il4965_mac_start()
H A Dcommon.h816 * @max_xxx_size: for ucode uses
1156 /* ucode beacon time */
1211 u32 ucode_ver; /* version of ucode, copy of
1559 /* 1st ucode load */
1632 * (.ucode) will be added to filename before loading from disk. The
1633 * filename is constructed as fw_name_pre<api>.ucode.
1653 * The ideal usage of this infrastructure is to treat a new ucode API
1988 * Ucode should set SEQ_RX_FRAME bit if ucode-originated, but il_need_reclaim()
2127 #define IL_STA_UCODE_ACTIVE BIT(1) /* ucode entry is active */
2128 #define IL_STA_UCODE_INPROGRESS BIT(2) /* ucode entry is in process of
H A D4965.c55 D_INFO("ucode inst image size is %u\n", len); il4965_verify_inst_sparse()
86 D_INFO("ucode inst image size is %u\n", len); il4965_verify_inst_full()
108 D_INFO("ucode image in INSTRUCTION memory is good\n"); il4965_verify_inst_full()
276 #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode"
1502 * calculate the ucode channel switch time il4965_hw_channel_switch()
H A Dcommon.c115 WARN_ONCE(1, "Timeout waiting for ucode processor access " _il_grab_nic_access()
2080 * il_sta_ucode_deactivate - deactivate ucode status for a station
2212 * il_clear_ucode_stations - clear ucode station table bits
2215 * which stations are active in the ucode. Call when something
2217 * the ucode, e.g. unassociated RXON.
2226 D_INFO("Clearing ucode stations in driver\n"); il_clear_ucode_stations()
2231 D_INFO("Clearing ucode active for station %d\n", i); il_clear_ucode_stations()
2246 * All stations considered active by driver, but not present in ucode, is
3119 * @cmd: a point to the ucode command structure
4914 /* base is usually what we get from ucode with each received frame,
5280 * inform the ucode that there is no longer an il_set_no_assoc()
H A Dcsr.h264 * Indicates MAC (ucode processor, etc.) is powered up and can run.
H A D3945.h48 #define _IL3945_MODULE_FIRMWARE(api) IL3945_FW_PRE #api ".ucode"
H A D4965-calib.c665 * The above algorithm sometimes fails when the ucode il4965_find_disconn_antenna()
H A Dcommands.h1014 * responses while ucode keeps track of STA sleep state.
1052 * responses while ucode keeps track of STA sleep state.
2268 * ucode assume sleep over DTIM is allowed and we don't need to wake up
H A D3945.c1627 /* send Txpower command for current channel to ucode */ il3945_hw_reg_comp_txpower_temp()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/bus/
H A Dhwsq.c77 nvkm_error(subdev, "hwsq ucode too large\n"); nvkm_hwsq_fini()
/linux-4.4.14/drivers/net/wireless/b43legacy/
H A Db43legacy.h125 #define B43legacy_SHM_SH_HOSTFLO 0x005E /* Hostflags ucode opts (low) */
126 #define B43legacy_SHM_SH_HOSTFHI 0x0060 /* Hostflags ucode opts (high) */
368 /* Size of the data. For ucode and PCM this is in bytes.
643 const struct firmware *ucode; member in struct:b43legacy_firmware
H A Dmain.c1499 release_firmware(dev->fw.ucode); b43legacy_release_firmware()
1500 dev->fw.ucode = NULL; b43legacy_release_firmware()
1601 if (!fw->ucode) { b43legacy_request_firmware()
1608 err = do_request_fw(dev, filename, &fw->ucode, true); b43legacy_request_firmware()
1709 data = (__be32 *) (dev->fw.ucode->data + hdr_len); b43legacy_upload_microcode()
1710 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32); b43legacy_upload_microcode()
3922 if (!wldev->fw.ucode) b43legacy_remove()
H A Dxmit.c489 * key index, but the ucode passed it slightly different. b43legacy_rx()
/linux-4.4.14/drivers/net/ethernet/intel/
H A De100.c508 __le32 ucode[UCODE_SIZE]; member in union:cb::__anon6900
1236 /* if you wish to disable the ucode functionality, while maintaining the
1259 /* Search for ucode match against h/w revision e100_request_firmware()
1262 * driver, the FIRMWARE_D102E ucode includes both CPUSaver and e100_request_firmware()
1279 } else { /* No ucode on other devices */ e100_request_firmware()
1346 memcpy(cb->u.ucode, fw->data, UCODE_SIZE * 4); e100_setup_ucode()
1353 /* Insert user-tunable settings in cb->u.ucode */ e100_setup_ucode()
1354 cb->u.ucode[timer] &= cpu_to_le32(0xFFFF0000); e100_setup_ucode()
1355 cb->u.ucode[timer] |= cpu_to_le32(INTDELAY); e100_setup_ucode()
1356 cb->u.ucode[bundle] &= cpu_to_le32(0xFFFF0000); e100_setup_ucode()
1357 cb->u.ucode[bundle] |= cpu_to_le32(BUNDLEMAX); e100_setup_ucode()
1358 cb->u.ucode[min_size] &= cpu_to_le32(0xFFFF0000); e100_setup_ucode()
1359 cb->u.ucode[min_size] |= cpu_to_le32((BUNDLESMALL) ? 0xFFFF : 0xFF80); e100_setup_ucode()
1372 /* If it's NULL, then no ucode is required */ e100_load_ucode_wait()
1378 "ucode cmd failed with error %d\n", err); e100_load_ucode_wait()
1398 netif_err(nic, probe, nic->netdev, "ucode load failed\n"); e100_load_ucode_wait()
/linux-4.4.14/drivers/gpu/drm/mga/
H A Dmga_warp.c103 DRM_DEBUG("MGA ucode size = %d bytes\n", size); mga_warp_install_microcode()
H A Dmga_dma.c872 DRM_ERROR("failed to install WARP ucode!: %d\n", ret); mga_do_init_dma()
/linux-4.4.14/drivers/net/wireless/ath/wil6210/
H A Dwmi.c58 * - MAC CPU (ucode)
91 * 920000..930000 ucode code RAM
92 * 930000..932000 ucode data RAM
98 * return AHB address for given firmware/ucode internal (linker) address
116 * @ptr - internal (linker) fw/ucode address
H A Dwmi.h819 * Check FW and ucode are alive
/linux-4.4.14/drivers/gpu/drm/msm/adreno/
H A Da3xx_gpu.c254 * parameterize the pfp ucode addr/data registers.. a3xx_hw_init()
260 DBG("loading PM4 ucode version: %x", ptr[1]); a3xx_hw_init()
272 DBG("loading PFP ucode version: %x", ptr[5]); a3xx_hw_init()
H A Da4xx_gpu.c248 DBG("loading PM4 ucode version: %u", ptr[0]); a4xx_hw_init()
256 DBG("loading PFP ucode version: %u", ptr[0]); a4xx_hw_init()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dbase.c200 /* prevent previous ucode from running, wait for idle, reset */ nvkm_pmu_init()
/linux-4.4.14/drivers/net/wireless/iwlwifi/pcie/
H A Dinternal.h302 * @ucode_write_complete: indicates that the ucode has been copied.
308 * @wide_cmd_header: true when ucode supports wide command header format
H A Dtrans.c612 * ucode
798 /* Notify the ucode of the loaded section number and status */ iwl_pcie_load_cpu_sections_8000()
1009 /* configure the ucode to be ready to get the secured image */ iwl_pcie_load_given_ucode_8000()
1458 /* init ref_count to 1 (should be cleared when ucode is loaded) */ iwl_trans_pcie_configure()
H A Drx.c882 * Ucode should set SEQ_RX_FRAME bit if ucode-originated, iwl_pcie_rx_handle_rb()
972 * buffer that the driver may process (last buffer filled by ucode). */ iwl_pcie_rx_handle()
H A Dtx.c1312 * @cmd: a pointer to the ucode command structure
/linux-4.4.14/arch/x86/kernel/
H A Dhead_32.S156 /* Early load ucode on BSP. */
315 /* Early load ucode on AP. */
/linux-4.4.14/drivers/staging/slicoss/
H A Dslic.h98 * Simplifies ucode in 64-bit systems
H A Dslichw.h476 u32 slic_rcv_wcs; /*Download Gigabit RCV sequencer ucode*/
H A Dslicoss.c435 /* download the rcv sequencer ucode */ slic_card_download_gbrcv()
568 * stall for 20 ms, long enough for ucode to init card slic_card_download()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
H A Dbase.c175 /* The default PPWR ucode on fermi interferes with fan management */ nvkm_therm_fan_mode()
/linux-4.4.14/drivers/media/dvb-frontends/
H A Dor51211.c408 /* Read back ucode version to besure we loaded correctly */ or51211_init()
H A Dor51132.c171 /* Read back ucode version to besure we loaded correctly and are really up and running */ or51132_load_firmware()
H A Ddrxk_hard.c3775 hardware default (is set to 0 by ucode during pilot detection */ set_dvbt()
6135 /* enable token-ring bus through OFDM block for possible ucode upload */ init_drxk()
6157 /* disable token-ring bus through OFDM block for possible ucode upload */ init_drxk()
/linux-4.4.14/arch/m68k/include/asm/
H A Dm68360_quicc.h43 volatile unsigned char ucode_bd_scratch[0x100]; /* user, bds, ucode scratch */
/linux-4.4.14/arch/powerpc/include/asm/
H A D8xx_immap.h539 u_char cp_dpmem[0x1C00]; /* BD / Data / ucode */
/linux-4.4.14/include/linux/
H A Dhid.h620 #define HID_USAGE_ID(uhid, utype, ucode) \
621 .usage_hid = (uhid), .usage_type = (utype), .usage_code = (ucode)
/linux-4.4.14/drivers/net/wireless/ipw2x00/
H A Dipw2200.h1198 /* result of ucode download */
1555 #define DINO_ENABLE_CS 0x40 /* 1 = enable ucode load */
H A Dipw2200.c3116 /* no ucode (yet) */ ipw_load_ucode()
3133 /* enable ucode store */ ipw_load_ucode()
3138 /* write ucode */ ipw_load_ucode()
3144 * accept ucode. It is essential to set address each time. ipw_load_ucode()
3596 /* DMA the ucode into the device */ ipw_load()
3599 IPW_ERROR("Unable to load ucode: %d\n", rc); ipw_load()
8460 * so the ucode won't assert */ ipw_rx()
H A Dipw2100.c989 4. load Dino ucode and reset/clock init again
1259 * fw & dino ucode ipw2100_start_adapter()
3348 * we touch the hardware. During ucode load if we try and handle ipw2100_interrupt()
3350 * the ucode to fail to initialize */ ipw2100_interrupt()
/linux-4.4.14/drivers/gpu/drm/nouveau/
H A Dnouveau_bios.c1913 * (0x00001304), followed by the ucode bytes, written sequentially, load_nv17_hwsq_ucode_entry()
1944 /* write ucode */ load_nv17_hwsq_ucode_entry()
/linux-4.4.14/drivers/media/pci/ttpci/
H A Dav7110_hw.c642 /* get version of the firmware ROM, RTSL, video ucode and ARM application */ av7110_firmversion()
/linux-4.4.14/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj.c342 /* CRC flag in ucode header, flags field. */
505 * \brief General maximum number of retries for ucode command interfaces
824 NULL, /* ucode file */
825 true, /* ucode verify switch */
2393 /* PATCH for bug 5003, HI ucode v3.1.0 */ init_hi()
11325 * drxj_open() can be called with a NULL ucode image => no ucode upload.
11327 * rely on SCU or AUD ucode to be present.
11445 /* Dirty trick to use common ucode upload & verify, drxj_open()
/linux-4.4.14/drivers/atm/
H A Dfirestream.c467 /* Ambassador ucode bug: please don't set bit 14! so 0 rate not make_rate()
H A Dambassador.c908 // ucode bug: please don't set bit 14! so 0 rate not representable make_rate()
/linux-4.4.14/drivers/net/ethernet/freescale/
H A Ducc_geth.c982 pr_info("ucode RX Prefetched BDs:\n"); dump_regs()
/linux-4.4.14/drivers/scsi/
H A Dipr.c3799 * Free a DMA'able ucode download buffer previously allocated with

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