1/* 2 * Support for OR51211 (pcHDTV HD-2000) - VSB 3 * 4 * Copyright (C) 2005 Kirk Lapray <kirk_lapray@bigfoot.com> 5 * 6 * Based on code from Jack Kelliher (kelliher@xmission.com) 7 * Copyright (C) 2002 & pcHDTV, inc. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * 23*/ 24 25#define pr_fmt(fmt) KBUILD_MODNAME ": %s: " fmt, __func__ 26 27/* 28 * This driver needs external firmware. Please use the command 29 * "<kerneldir>/Documentation/dvb/get_dvb_firmware or51211" to 30 * download/extract it, and then copy it to /usr/lib/hotplug/firmware 31 * or /lib/firmware (depending on configuration of firmware hotplug). 32 */ 33#define OR51211_DEFAULT_FIRMWARE "dvb-fe-or51211.fw" 34 35#include <linux/kernel.h> 36#include <linux/module.h> 37#include <linux/device.h> 38#include <linux/firmware.h> 39#include <linux/string.h> 40#include <linux/slab.h> 41#include <asm/byteorder.h> 42 43#include "dvb_math.h" 44#include "dvb_frontend.h" 45#include "or51211.h" 46 47static int debug; 48#define dprintk(args...) \ 49 do { if (debug) pr_debug(args); } while (0) 50 51static u8 run_buf[] = {0x7f,0x01}; 52static u8 cmd_buf[] = {0x04,0x01,0x50,0x80,0x06}; // ATSC 53 54struct or51211_state { 55 56 struct i2c_adapter* i2c; 57 58 /* Configuration settings */ 59 const struct or51211_config* config; 60 61 struct dvb_frontend frontend; 62 struct bt878* bt; 63 64 /* Demodulator private data */ 65 u8 initialized:1; 66 u32 snr; /* Result of last SNR claculation */ 67 68 /* Tuner private data */ 69 u32 current_frequency; 70}; 71 72static int i2c_writebytes (struct or51211_state* state, u8 reg, const u8 *buf, 73 int len) 74{ 75 int err; 76 struct i2c_msg msg; 77 msg.addr = reg; 78 msg.flags = 0; 79 msg.len = len; 80 msg.buf = (u8 *)buf; 81 82 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { 83 pr_warn("error (addr %02x, err == %i)\n", reg, err); 84 return -EREMOTEIO; 85 } 86 87 return 0; 88} 89 90static int i2c_readbytes(struct or51211_state *state, u8 reg, u8 *buf, int len) 91{ 92 int err; 93 struct i2c_msg msg; 94 msg.addr = reg; 95 msg.flags = I2C_M_RD; 96 msg.len = len; 97 msg.buf = buf; 98 99 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { 100 pr_warn("error (addr %02x, err == %i)\n", reg, err); 101 return -EREMOTEIO; 102 } 103 104 return 0; 105} 106 107static int or51211_load_firmware (struct dvb_frontend* fe, 108 const struct firmware *fw) 109{ 110 struct or51211_state* state = fe->demodulator_priv; 111 u8 tudata[585]; 112 int i; 113 114 dprintk("Firmware is %zu bytes\n", fw->size); 115 116 /* Get eprom data */ 117 tudata[0] = 17; 118 if (i2c_writebytes(state,0x50,tudata,1)) { 119 pr_warn("error eprom addr\n"); 120 return -1; 121 } 122 if (i2c_readbytes(state,0x50,&tudata[145],192)) { 123 pr_warn("error eprom\n"); 124 return -1; 125 } 126 127 /* Create firmware buffer */ 128 for (i = 0; i < 145; i++) 129 tudata[i] = fw->data[i]; 130 131 for (i = 0; i < 248; i++) 132 tudata[i+337] = fw->data[145+i]; 133 134 state->config->reset(fe); 135 136 if (i2c_writebytes(state,state->config->demod_address,tudata,585)) { 137 pr_warn("error 1\n"); 138 return -1; 139 } 140 msleep(1); 141 142 if (i2c_writebytes(state,state->config->demod_address, 143 &fw->data[393],8125)) { 144 pr_warn("error 2\n"); 145 return -1; 146 } 147 msleep(1); 148 149 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) { 150 pr_warn("error 3\n"); 151 return -1; 152 } 153 154 /* Wait at least 5 msec */ 155 msleep(10); 156 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) { 157 pr_warn("error 4\n"); 158 return -1; 159 } 160 msleep(10); 161 162 pr_info("Done.\n"); 163 return 0; 164}; 165 166static int or51211_setmode(struct dvb_frontend* fe, int mode) 167{ 168 struct or51211_state* state = fe->demodulator_priv; 169 u8 rec_buf[14]; 170 171 state->config->setmode(fe, mode); 172 173 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) { 174 pr_warn("error 1\n"); 175 return -1; 176 } 177 178 /* Wait at least 5 msec */ 179 msleep(10); 180 if (i2c_writebytes(state,state->config->demod_address,run_buf,2)) { 181 pr_warn("error 2\n"); 182 return -1; 183 } 184 185 msleep(10); 186 187 /* Set operation mode in Receiver 1 register; 188 * type 1: 189 * data 0x50h Automatic sets receiver channel conditions 190 * Automatic NTSC rejection filter 191 * Enable MPEG serial data output 192 * MPEG2tr 193 * High tuner phase noise 194 * normal +/-150kHz Carrier acquisition range 195 */ 196 if (i2c_writebytes(state,state->config->demod_address,cmd_buf,3)) { 197 pr_warn("error 3\n"); 198 return -1; 199 } 200 201 rec_buf[0] = 0x04; 202 rec_buf[1] = 0x00; 203 rec_buf[2] = 0x03; 204 rec_buf[3] = 0x00; 205 msleep(20); 206 if (i2c_writebytes(state,state->config->demod_address,rec_buf,3)) { 207 pr_warn("error 5\n"); 208 } 209 msleep(3); 210 if (i2c_readbytes(state,state->config->demod_address,&rec_buf[10],2)) { 211 pr_warn("error 6\n"); 212 return -1; 213 } 214 dprintk("rec status %02x %02x\n", rec_buf[10], rec_buf[11]); 215 216 return 0; 217} 218 219static int or51211_set_parameters(struct dvb_frontend *fe) 220{ 221 struct dtv_frontend_properties *p = &fe->dtv_property_cache; 222 struct or51211_state* state = fe->demodulator_priv; 223 224 /* Change only if we are actually changing the channel */ 225 if (state->current_frequency != p->frequency) { 226 if (fe->ops.tuner_ops.set_params) { 227 fe->ops.tuner_ops.set_params(fe); 228 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); 229 } 230 231 /* Set to ATSC mode */ 232 or51211_setmode(fe,0); 233 234 /* Update current frequency */ 235 state->current_frequency = p->frequency; 236 } 237 return 0; 238} 239 240static int or51211_read_status(struct dvb_frontend *fe, enum fe_status *status) 241{ 242 struct or51211_state* state = fe->demodulator_priv; 243 unsigned char rec_buf[2]; 244 unsigned char snd_buf[] = {0x04,0x00,0x03,0x00}; 245 *status = 0; 246 247 /* Receiver Status */ 248 if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) { 249 pr_warn("write error\n"); 250 return -1; 251 } 252 msleep(3); 253 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) { 254 pr_warn("read error\n"); 255 return -1; 256 } 257 dprintk("%x %x\n", rec_buf[0], rec_buf[1]); 258 259 if (rec_buf[0] & 0x01) { /* Receiver Lock */ 260 *status |= FE_HAS_SIGNAL; 261 *status |= FE_HAS_CARRIER; 262 *status |= FE_HAS_VITERBI; 263 *status |= FE_HAS_SYNC; 264 *status |= FE_HAS_LOCK; 265 } 266 return 0; 267} 268 269/* Calculate SNR estimation (scaled by 2^24) 270 271 8-VSB SNR equation from Oren datasheets 272 273 For 8-VSB: 274 SNR[dB] = 10 * log10(219037.9454 / MSE^2 ) 275 276 We re-write the snr equation as: 277 SNR * 2^24 = 10*(c - 2*intlog10(MSE)) 278 Where for 8-VSB, c = log10(219037.9454) * 2^24 */ 279 280static u32 calculate_snr(u32 mse, u32 c) 281{ 282 if (mse == 0) /* No signal */ 283 return 0; 284 285 mse = 2*intlog10(mse); 286 if (mse > c) { 287 /* Negative SNR, which is possible, but realisticly the 288 demod will lose lock before the signal gets this bad. The 289 API only allows for unsigned values, so just return 0 */ 290 return 0; 291 } 292 return 10*(c - mse); 293} 294 295static int or51211_read_snr(struct dvb_frontend* fe, u16* snr) 296{ 297 struct or51211_state* state = fe->demodulator_priv; 298 u8 rec_buf[2]; 299 u8 snd_buf[3]; 300 301 /* SNR after Equalizer */ 302 snd_buf[0] = 0x04; 303 snd_buf[1] = 0x00; 304 snd_buf[2] = 0x04; 305 306 if (i2c_writebytes(state,state->config->demod_address,snd_buf,3)) { 307 pr_warn("error writing snr reg\n"); 308 return -1; 309 } 310 if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) { 311 pr_warn("read_status read error\n"); 312 return -1; 313 } 314 315 state->snr = calculate_snr(rec_buf[0], 89599047); 316 *snr = (state->snr) >> 16; 317 318 dprintk("noise = 0x%02x, snr = %d.%02d dB\n", rec_buf[0], 319 state->snr >> 24, (((state->snr>>8) & 0xffff) * 100) >> 16); 320 321 return 0; 322} 323 324static int or51211_read_signal_strength(struct dvb_frontend* fe, u16* strength) 325{ 326 /* Calculate Strength from SNR up to 35dB */ 327 /* Even though the SNR can go higher than 35dB, there is some comfort */ 328 /* factor in having a range of strong signals that can show at 100% */ 329 struct or51211_state* state = (struct or51211_state*)fe->demodulator_priv; 330 u16 snr; 331 int ret; 332 333 ret = fe->ops.read_snr(fe, &snr); 334 if (ret != 0) 335 return ret; 336 /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */ 337 /* scale the range 0 - 35*2^24 into 0 - 65535 */ 338 if (state->snr >= 8960 * 0x10000) 339 *strength = 0xffff; 340 else 341 *strength = state->snr / 8960; 342 343 return 0; 344} 345 346static int or51211_read_ber(struct dvb_frontend* fe, u32* ber) 347{ 348 *ber = -ENOSYS; 349 return 0; 350} 351 352static int or51211_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) 353{ 354 *ucblocks = -ENOSYS; 355 return 0; 356} 357 358static int or51211_sleep(struct dvb_frontend* fe) 359{ 360 return 0; 361} 362 363static int or51211_init(struct dvb_frontend* fe) 364{ 365 struct or51211_state* state = fe->demodulator_priv; 366 const struct or51211_config* config = state->config; 367 const struct firmware* fw; 368 unsigned char get_ver_buf[] = {0x04,0x00,0x30,0x00,0x00}; 369 unsigned char rec_buf[14]; 370 int ret,i; 371 372 if (!state->initialized) { 373 /* Request the firmware, this will block until it uploads */ 374 pr_info("Waiting for firmware upload (%s)...\n", 375 OR51211_DEFAULT_FIRMWARE); 376 ret = config->request_firmware(fe, &fw, 377 OR51211_DEFAULT_FIRMWARE); 378 pr_info("Got Hotplug firmware\n"); 379 if (ret) { 380 pr_warn("No firmware uploaded " 381 "(timeout or file not found?)\n"); 382 return ret; 383 } 384 385 ret = or51211_load_firmware(fe, fw); 386 release_firmware(fw); 387 if (ret) { 388 pr_warn("Writing firmware to device failed!\n"); 389 return ret; 390 } 391 pr_info("Firmware upload complete.\n"); 392 393 /* Set operation mode in Receiver 1 register; 394 * type 1: 395 * data 0x50h Automatic sets receiver channel conditions 396 * Automatic NTSC rejection filter 397 * Enable MPEG serial data output 398 * MPEG2tr 399 * High tuner phase noise 400 * normal +/-150kHz Carrier acquisition range 401 */ 402 if (i2c_writebytes(state,state->config->demod_address, 403 cmd_buf,3)) { 404 pr_warn("Load DVR Error 5\n"); 405 return -1; 406 } 407 408 /* Read back ucode version to besure we loaded correctly */ 409 /* and are really up and running */ 410 rec_buf[0] = 0x04; 411 rec_buf[1] = 0x00; 412 rec_buf[2] = 0x03; 413 rec_buf[3] = 0x00; 414 msleep(30); 415 if (i2c_writebytes(state,state->config->demod_address, 416 rec_buf,3)) { 417 pr_warn("Load DVR Error A\n"); 418 return -1; 419 } 420 msleep(3); 421 if (i2c_readbytes(state,state->config->demod_address, 422 &rec_buf[10],2)) { 423 pr_warn("Load DVR Error B\n"); 424 return -1; 425 } 426 427 rec_buf[0] = 0x04; 428 rec_buf[1] = 0x00; 429 rec_buf[2] = 0x01; 430 rec_buf[3] = 0x00; 431 msleep(20); 432 if (i2c_writebytes(state,state->config->demod_address, 433 rec_buf,3)) { 434 pr_warn("Load DVR Error C\n"); 435 return -1; 436 } 437 msleep(3); 438 if (i2c_readbytes(state,state->config->demod_address, 439 &rec_buf[12],2)) { 440 pr_warn("Load DVR Error D\n"); 441 return -1; 442 } 443 444 for (i = 0; i < 8; i++) 445 rec_buf[i]=0xed; 446 447 for (i = 0; i < 5; i++) { 448 msleep(30); 449 get_ver_buf[4] = i+1; 450 if (i2c_writebytes(state,state->config->demod_address, 451 get_ver_buf,5)) { 452 pr_warn("Load DVR Error 6 - %d\n", i); 453 return -1; 454 } 455 msleep(3); 456 457 if (i2c_readbytes(state,state->config->demod_address, 458 &rec_buf[i*2],2)) { 459 pr_warn("Load DVR Error 7 - %d\n", i); 460 return -1; 461 } 462 /* If we didn't receive the right index, try again */ 463 if ((int)rec_buf[i*2+1]!=i+1){ 464 i--; 465 } 466 } 467 dprintk("read_fwbits %10ph\n", rec_buf); 468 469 pr_info("ver TU%02x%02x%02x VSB mode %02x Status %02x\n", 470 rec_buf[2], rec_buf[4], rec_buf[6], rec_buf[12], 471 rec_buf[10]); 472 473 rec_buf[0] = 0x04; 474 rec_buf[1] = 0x00; 475 rec_buf[2] = 0x03; 476 rec_buf[3] = 0x00; 477 msleep(20); 478 if (i2c_writebytes(state,state->config->demod_address, 479 rec_buf,3)) { 480 pr_warn("Load DVR Error 8\n"); 481 return -1; 482 } 483 msleep(20); 484 if (i2c_readbytes(state,state->config->demod_address, 485 &rec_buf[8],2)) { 486 pr_warn("Load DVR Error 9\n"); 487 return -1; 488 } 489 state->initialized = 1; 490 } 491 492 return 0; 493} 494 495static int or51211_get_tune_settings(struct dvb_frontend* fe, 496 struct dvb_frontend_tune_settings* fesettings) 497{ 498 fesettings->min_delay_ms = 500; 499 fesettings->step_size = 0; 500 fesettings->max_drift = 0; 501 return 0; 502} 503 504static void or51211_release(struct dvb_frontend* fe) 505{ 506 struct or51211_state* state = fe->demodulator_priv; 507 state->config->sleep(fe); 508 kfree(state); 509} 510 511static struct dvb_frontend_ops or51211_ops; 512 513struct dvb_frontend* or51211_attach(const struct or51211_config* config, 514 struct i2c_adapter* i2c) 515{ 516 struct or51211_state* state = NULL; 517 518 /* Allocate memory for the internal state */ 519 state = kzalloc(sizeof(struct or51211_state), GFP_KERNEL); 520 if (state == NULL) 521 return NULL; 522 523 /* Setup the state */ 524 state->config = config; 525 state->i2c = i2c; 526 state->initialized = 0; 527 state->current_frequency = 0; 528 529 /* Create dvb_frontend */ 530 memcpy(&state->frontend.ops, &or51211_ops, sizeof(struct dvb_frontend_ops)); 531 state->frontend.demodulator_priv = state; 532 return &state->frontend; 533} 534 535static struct dvb_frontend_ops or51211_ops = { 536 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B }, 537 .info = { 538 .name = "Oren OR51211 VSB Frontend", 539 .frequency_min = 44000000, 540 .frequency_max = 958000000, 541 .frequency_stepsize = 166666, 542 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | 543 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | 544 FE_CAN_8VSB 545 }, 546 547 .release = or51211_release, 548 549 .init = or51211_init, 550 .sleep = or51211_sleep, 551 552 .set_frontend = or51211_set_parameters, 553 .get_tune_settings = or51211_get_tune_settings, 554 555 .read_status = or51211_read_status, 556 .read_ber = or51211_read_ber, 557 .read_signal_strength = or51211_read_signal_strength, 558 .read_snr = or51211_read_snr, 559 .read_ucblocks = or51211_read_ucblocks, 560}; 561 562module_param(debug, int, 0644); 563MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); 564 565MODULE_DESCRIPTION("Oren OR51211 VSB [pcHDTV HD-2000] Demodulator Driver"); 566MODULE_AUTHOR("Kirk Lapray"); 567MODULE_LICENSE("GPL"); 568 569EXPORT_SYMBOL(or51211_attach); 570 571