1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license.  When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of version 2 of the GNU General Public License as
13 * published by the Free Software Foundation.
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15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
18 * General Public License for more details.
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22 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
23 * USA
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26 * in the file called COPYING.
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28 * Contact Information:
29 *  Intel Linux Wireless <ilw@linux.intel.com>
30 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 *
32 * BSD LICENSE
33 *
34 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
35 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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64 *****************************************************************************/
65
66#ifndef __fw_api_h__
67#define __fw_api_h__
68
69#include "fw-api-rs.h"
70#include "fw-api-rx.h"
71#include "fw-api-tx.h"
72#include "fw-api-sta.h"
73#include "fw-api-mac.h"
74#include "fw-api-power.h"
75#include "fw-api-d3.h"
76#include "fw-api-coex.h"
77#include "fw-api-scan.h"
78#include "fw-api-stats.h"
79#include "fw-api-tof.h"
80
81/* Tx queue numbers */
82enum {
83	IWL_MVM_OFFCHANNEL_QUEUE = 8,
84	IWL_MVM_CMD_QUEUE = 9,
85};
86
87enum iwl_mvm_tx_fifo {
88	IWL_MVM_TX_FIFO_BK = 0,
89	IWL_MVM_TX_FIFO_BE,
90	IWL_MVM_TX_FIFO_VI,
91	IWL_MVM_TX_FIFO_VO,
92	IWL_MVM_TX_FIFO_MCAST = 5,
93	IWL_MVM_TX_FIFO_CMD = 7,
94};
95
96#define IWL_MVM_STATION_COUNT	16
97
98#define IWL_MVM_TDLS_STA_COUNT	4
99
100/* commands */
101enum {
102	MVM_ALIVE = 0x1,
103	REPLY_ERROR = 0x2,
104	ECHO_CMD = 0x3,
105
106	INIT_COMPLETE_NOTIF = 0x4,
107
108	/* PHY context commands */
109	PHY_CONTEXT_CMD = 0x8,
110	DBG_CFG = 0x9,
111	ANTENNA_COUPLING_NOTIFICATION = 0xa,
112
113	/* UMAC scan commands */
114	SCAN_ITERATION_COMPLETE_UMAC = 0xb5,
115	SCAN_CFG_CMD = 0xc,
116	SCAN_REQ_UMAC = 0xd,
117	SCAN_ABORT_UMAC = 0xe,
118	SCAN_COMPLETE_UMAC = 0xf,
119
120	/* station table */
121	ADD_STA_KEY = 0x17,
122	ADD_STA = 0x18,
123	REMOVE_STA = 0x19,
124
125	/* paging get item */
126	FW_GET_ITEM_CMD = 0x1a,
127
128	/* TX */
129	TX_CMD = 0x1c,
130	TXPATH_FLUSH = 0x1e,
131	MGMT_MCAST_KEY = 0x1f,
132
133	/* scheduler config */
134	SCD_QUEUE_CFG = 0x1d,
135
136	/* global key */
137	WEP_KEY = 0x20,
138
139	/* Memory */
140	SHARED_MEM_CFG = 0x25,
141
142	/* TDLS */
143	TDLS_CHANNEL_SWITCH_CMD = 0x27,
144	TDLS_CHANNEL_SWITCH_NOTIFICATION = 0xaa,
145	TDLS_CONFIG_CMD = 0xa7,
146
147	/* MAC and Binding commands */
148	MAC_CONTEXT_CMD = 0x28,
149	TIME_EVENT_CMD = 0x29, /* both CMD and response */
150	TIME_EVENT_NOTIFICATION = 0x2a,
151	BINDING_CONTEXT_CMD = 0x2b,
152	TIME_QUOTA_CMD = 0x2c,
153	NON_QOS_TX_COUNTER_CMD = 0x2d,
154
155	LQ_CMD = 0x4e,
156
157	/* paging block to FW cpu2 */
158	FW_PAGING_BLOCK_CMD = 0x4f,
159
160	/* Scan offload */
161	SCAN_OFFLOAD_REQUEST_CMD = 0x51,
162	SCAN_OFFLOAD_ABORT_CMD = 0x52,
163	HOT_SPOT_CMD = 0x53,
164	SCAN_OFFLOAD_COMPLETE = 0x6D,
165	SCAN_OFFLOAD_UPDATE_PROFILES_CMD = 0x6E,
166	SCAN_OFFLOAD_CONFIG_CMD = 0x6f,
167	MATCH_FOUND_NOTIFICATION = 0xd9,
168	SCAN_ITERATION_COMPLETE = 0xe7,
169
170	/* Phy */
171	PHY_CONFIGURATION_CMD = 0x6a,
172	CALIB_RES_NOTIF_PHY_DB = 0x6b,
173	/* PHY_DB_CMD = 0x6c, */
174
175	/* ToF - 802.11mc FTM */
176	TOF_CMD = 0x10,
177	TOF_NOTIFICATION = 0x11,
178
179	/* Power - legacy power table command */
180	POWER_TABLE_CMD = 0x77,
181	PSM_UAPSD_AP_MISBEHAVING_NOTIFICATION = 0x78,
182	LTR_CONFIG = 0xee,
183
184	/* Thermal Throttling*/
185	REPLY_THERMAL_MNG_BACKOFF = 0x7e,
186
187	/* Set/Get DC2DC frequency tune */
188	DC2DC_CONFIG_CMD = 0x83,
189
190	/* NVM */
191	NVM_ACCESS_CMD = 0x88,
192
193	SET_CALIB_DEFAULT_CMD = 0x8e,
194
195	BEACON_NOTIFICATION = 0x90,
196	BEACON_TEMPLATE_CMD = 0x91,
197	TX_ANT_CONFIGURATION_CMD = 0x98,
198	STATISTICS_CMD = 0x9c,
199	STATISTICS_NOTIFICATION = 0x9d,
200	EOSP_NOTIFICATION = 0x9e,
201	REDUCE_TX_POWER_CMD = 0x9f,
202
203	/* RF-KILL commands and notifications */
204	CARD_STATE_CMD = 0xa0,
205	CARD_STATE_NOTIFICATION = 0xa1,
206
207	MISSED_BEACONS_NOTIFICATION = 0xa2,
208
209	/* Power - new power table command */
210	MAC_PM_POWER_TABLE = 0xa9,
211
212	MFUART_LOAD_NOTIFICATION = 0xb1,
213
214	REPLY_RX_PHY_CMD = 0xc0,
215	REPLY_RX_MPDU_CMD = 0xc1,
216	BA_NOTIF = 0xc5,
217
218	/* Location Aware Regulatory */
219	MCC_UPDATE_CMD = 0xc8,
220	MCC_CHUB_UPDATE_CMD = 0xc9,
221
222	MARKER_CMD = 0xcb,
223
224	/* BT Coex */
225	BT_COEX_PRIO_TABLE = 0xcc,
226	BT_COEX_PROT_ENV = 0xcd,
227	BT_PROFILE_NOTIFICATION = 0xce,
228	BT_CONFIG = 0x9b,
229	BT_COEX_UPDATE_SW_BOOST = 0x5a,
230	BT_COEX_UPDATE_CORUN_LUT = 0x5b,
231	BT_COEX_UPDATE_REDUCED_TXP = 0x5c,
232	BT_COEX_CI = 0x5d,
233
234	REPLY_SF_CFG_CMD = 0xd1,
235	REPLY_BEACON_FILTERING_CMD = 0xd2,
236
237	/* DTS measurements */
238	CMD_DTS_MEASUREMENT_TRIGGER = 0xdc,
239	DTS_MEASUREMENT_NOTIFICATION = 0xdd,
240
241	REPLY_DEBUG_CMD = 0xf0,
242	DEBUG_LOG_MSG = 0xf7,
243
244	BCAST_FILTER_CMD = 0xcf,
245	MCAST_FILTER_CMD = 0xd0,
246
247	/* D3 commands/notifications */
248	D3_CONFIG_CMD = 0xd3,
249	PROT_OFFLOAD_CONFIG_CMD = 0xd4,
250	OFFLOADS_QUERY_CMD = 0xd5,
251	REMOTE_WAKE_CONFIG_CMD = 0xd6,
252	D0I3_END_CMD = 0xed,
253
254	/* for WoWLAN in particular */
255	WOWLAN_PATTERNS = 0xe0,
256	WOWLAN_CONFIGURATION = 0xe1,
257	WOWLAN_TSC_RSC_PARAM = 0xe2,
258	WOWLAN_TKIP_PARAM = 0xe3,
259	WOWLAN_KEK_KCK_MATERIAL = 0xe4,
260	WOWLAN_GET_STATUSES = 0xe5,
261	WOWLAN_TX_POWER_PER_DB = 0xe6,
262
263	/* and for NetDetect */
264	SCAN_OFFLOAD_PROFILES_QUERY_CMD = 0x56,
265	SCAN_OFFLOAD_HOTSPOTS_CONFIG_CMD = 0x58,
266	SCAN_OFFLOAD_HOTSPOTS_QUERY_CMD = 0x59,
267
268	REPLY_MAX = 0xff,
269};
270
271enum iwl_phy_ops_subcmd_ids {
272	CMD_DTS_MEASUREMENT_TRIGGER_WIDE = 0x0,
273	DTS_MEASUREMENT_NOTIF_WIDE = 0xFF,
274};
275
276/* command groups */
277enum {
278	PHY_OPS_GROUP = 0x4,
279};
280
281/**
282 * struct iwl_cmd_response - generic response struct for most commands
283 * @status: status of the command asked, changes for each one
284 */
285struct iwl_cmd_response {
286	__le32 status;
287};
288
289/*
290 * struct iwl_tx_ant_cfg_cmd
291 * @valid: valid antenna configuration
292 */
293struct iwl_tx_ant_cfg_cmd {
294	__le32 valid;
295} __packed;
296
297/*
298 * Calibration control struct.
299 * Sent as part of the phy configuration command.
300 * @flow_trigger: bitmap for which calibrations to perform according to
301 *		flow triggers.
302 * @event_trigger: bitmap for which calibrations to perform according to
303 *		event triggers.
304 */
305struct iwl_calib_ctrl {
306	__le32 flow_trigger;
307	__le32 event_trigger;
308} __packed;
309
310/* This enum defines the bitmap of various calibrations to enable in both
311 * init ucode and runtime ucode through CALIBRATION_CFG_CMD.
312 */
313enum iwl_calib_cfg {
314	IWL_CALIB_CFG_XTAL_IDX			= BIT(0),
315	IWL_CALIB_CFG_TEMPERATURE_IDX		= BIT(1),
316	IWL_CALIB_CFG_VOLTAGE_READ_IDX		= BIT(2),
317	IWL_CALIB_CFG_PAPD_IDX			= BIT(3),
318	IWL_CALIB_CFG_TX_PWR_IDX		= BIT(4),
319	IWL_CALIB_CFG_DC_IDX			= BIT(5),
320	IWL_CALIB_CFG_BB_FILTER_IDX		= BIT(6),
321	IWL_CALIB_CFG_LO_LEAKAGE_IDX		= BIT(7),
322	IWL_CALIB_CFG_TX_IQ_IDX			= BIT(8),
323	IWL_CALIB_CFG_TX_IQ_SKEW_IDX		= BIT(9),
324	IWL_CALIB_CFG_RX_IQ_IDX			= BIT(10),
325	IWL_CALIB_CFG_RX_IQ_SKEW_IDX		= BIT(11),
326	IWL_CALIB_CFG_SENSITIVITY_IDX		= BIT(12),
327	IWL_CALIB_CFG_CHAIN_NOISE_IDX		= BIT(13),
328	IWL_CALIB_CFG_DISCONNECTED_ANT_IDX	= BIT(14),
329	IWL_CALIB_CFG_ANT_COUPLING_IDX		= BIT(15),
330	IWL_CALIB_CFG_DAC_IDX			= BIT(16),
331	IWL_CALIB_CFG_ABS_IDX			= BIT(17),
332	IWL_CALIB_CFG_AGC_IDX			= BIT(18),
333};
334
335/*
336 * Phy configuration command.
337 */
338struct iwl_phy_cfg_cmd {
339	__le32	phy_cfg;
340	struct iwl_calib_ctrl calib_control;
341} __packed;
342
343#define PHY_CFG_RADIO_TYPE	(BIT(0) | BIT(1))
344#define PHY_CFG_RADIO_STEP	(BIT(2) | BIT(3))
345#define PHY_CFG_RADIO_DASH	(BIT(4) | BIT(5))
346#define PHY_CFG_PRODUCT_NUMBER	(BIT(6) | BIT(7))
347#define PHY_CFG_TX_CHAIN_A	BIT(8)
348#define PHY_CFG_TX_CHAIN_B	BIT(9)
349#define PHY_CFG_TX_CHAIN_C	BIT(10)
350#define PHY_CFG_RX_CHAIN_A	BIT(12)
351#define PHY_CFG_RX_CHAIN_B	BIT(13)
352#define PHY_CFG_RX_CHAIN_C	BIT(14)
353
354
355/* Target of the NVM_ACCESS_CMD */
356enum {
357	NVM_ACCESS_TARGET_CACHE = 0,
358	NVM_ACCESS_TARGET_OTP = 1,
359	NVM_ACCESS_TARGET_EEPROM = 2,
360};
361
362/* Section types for NVM_ACCESS_CMD */
363enum {
364	NVM_SECTION_TYPE_SW = 1,
365	NVM_SECTION_TYPE_REGULATORY = 3,
366	NVM_SECTION_TYPE_CALIBRATION = 4,
367	NVM_SECTION_TYPE_PRODUCTION = 5,
368	NVM_SECTION_TYPE_MAC_OVERRIDE = 11,
369	NVM_SECTION_TYPE_PHY_SKU = 12,
370	NVM_MAX_NUM_SECTIONS = 13,
371};
372
373/**
374 * struct iwl_nvm_access_cmd_ver2 - Request the device to send an NVM section
375 * @op_code: 0 - read, 1 - write
376 * @target: NVM_ACCESS_TARGET_*
377 * @type: NVM_SECTION_TYPE_*
378 * @offset: offset in bytes into the section
379 * @length: in bytes, to read/write
380 * @data: if write operation, the data to write. On read its empty
381 */
382struct iwl_nvm_access_cmd {
383	u8 op_code;
384	u8 target;
385	__le16 type;
386	__le16 offset;
387	__le16 length;
388	u8 data[];
389} __packed; /* NVM_ACCESS_CMD_API_S_VER_2 */
390
391#define NUM_OF_FW_PAGING_BLOCKS	33 /* 32 for data and 1 block for CSS */
392
393/*
394 * struct iwl_fw_paging_cmd - paging layout
395 *
396 * (FW_PAGING_BLOCK_CMD = 0x4f)
397 *
398 * Send to FW the paging layout in the driver.
399 *
400 * @flags: various flags for the command
401 * @block_size: the block size in powers of 2
402 * @block_num: number of blocks specified in the command.
403 * @device_phy_addr: virtual addresses from device side
404*/
405struct iwl_fw_paging_cmd {
406	__le32 flags;
407	__le32 block_size;
408	__le32 block_num;
409	__le32 device_phy_addr[NUM_OF_FW_PAGING_BLOCKS];
410} __packed; /* FW_PAGING_BLOCK_CMD_API_S_VER_1 */
411
412/*
413 * Fw items ID's
414 *
415 * @IWL_FW_ITEM_ID_PAGING: Address of the pages that the FW will upload
416 *	download
417 */
418enum iwl_fw_item_id {
419	IWL_FW_ITEM_ID_PAGING = 3,
420};
421
422/*
423 * struct iwl_fw_get_item_cmd - get an item from the fw
424 */
425struct iwl_fw_get_item_cmd {
426	__le32 item_id;
427} __packed; /* FW_GET_ITEM_CMD_API_S_VER_1 */
428
429struct iwl_fw_get_item_resp {
430	__le32 item_id;
431	__le32 item_byte_cnt;
432	__le32 item_val;
433} __packed; /* FW_GET_ITEM_RSP_S_VER_1 */
434
435/**
436 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
437 * @offset: offset in bytes into the section
438 * @length: in bytes, either how much was written or read
439 * @type: NVM_SECTION_TYPE_*
440 * @status: 0 for success, fail otherwise
441 * @data: if read operation, the data returned. Empty on write.
442 */
443struct iwl_nvm_access_resp {
444	__le16 offset;
445	__le16 length;
446	__le16 type;
447	__le16 status;
448	u8 data[];
449} __packed; /* NVM_ACCESS_CMD_RESP_API_S_VER_2 */
450
451/* MVM_ALIVE 0x1 */
452
453/* alive response is_valid values */
454#define ALIVE_RESP_UCODE_OK	BIT(0)
455#define ALIVE_RESP_RFKILL	BIT(1)
456
457/* alive response ver_type values */
458enum {
459	FW_TYPE_HW = 0,
460	FW_TYPE_PROT = 1,
461	FW_TYPE_AP = 2,
462	FW_TYPE_WOWLAN = 3,
463	FW_TYPE_TIMING = 4,
464	FW_TYPE_WIPAN = 5
465};
466
467/* alive response ver_subtype values */
468enum {
469	FW_SUBTYPE_FULL_FEATURE = 0,
470	FW_SUBTYPE_BOOTSRAP = 1, /* Not valid */
471	FW_SUBTYPE_REDUCED = 2,
472	FW_SUBTYPE_ALIVE_ONLY = 3,
473	FW_SUBTYPE_WOWLAN = 4,
474	FW_SUBTYPE_AP_SUBTYPE = 5,
475	FW_SUBTYPE_WIPAN = 6,
476	FW_SUBTYPE_INITIALIZE = 9
477};
478
479#define IWL_ALIVE_STATUS_ERR 0xDEAD
480#define IWL_ALIVE_STATUS_OK 0xCAFE
481
482#define IWL_ALIVE_FLG_RFKILL	BIT(0)
483
484struct mvm_alive_resp_ver1 {
485	__le16 status;
486	__le16 flags;
487	u8 ucode_minor;
488	u8 ucode_major;
489	__le16 id;
490	u8 api_minor;
491	u8 api_major;
492	u8 ver_subtype;
493	u8 ver_type;
494	u8 mac;
495	u8 opt;
496	__le16 reserved2;
497	__le32 timestamp;
498	__le32 error_event_table_ptr;	/* SRAM address for error log */
499	__le32 log_event_table_ptr;	/* SRAM address for event log */
500	__le32 cpu_register_ptr;
501	__le32 dbgm_config_ptr;
502	__le32 alive_counter_ptr;
503	__le32 scd_base_ptr;		/* SRAM address for SCD */
504} __packed; /* ALIVE_RES_API_S_VER_1 */
505
506struct mvm_alive_resp_ver2 {
507	__le16 status;
508	__le16 flags;
509	u8 ucode_minor;
510	u8 ucode_major;
511	__le16 id;
512	u8 api_minor;
513	u8 api_major;
514	u8 ver_subtype;
515	u8 ver_type;
516	u8 mac;
517	u8 opt;
518	__le16 reserved2;
519	__le32 timestamp;
520	__le32 error_event_table_ptr;	/* SRAM address for error log */
521	__le32 log_event_table_ptr;	/* SRAM address for LMAC event log */
522	__le32 cpu_register_ptr;
523	__le32 dbgm_config_ptr;
524	__le32 alive_counter_ptr;
525	__le32 scd_base_ptr;		/* SRAM address for SCD */
526	__le32 st_fwrd_addr;		/* pointer to Store and forward */
527	__le32 st_fwrd_size;
528	u8 umac_minor;			/* UMAC version: minor */
529	u8 umac_major;			/* UMAC version: major */
530	__le16 umac_id;			/* UMAC version: id */
531	__le32 error_info_addr;		/* SRAM address for UMAC error log */
532	__le32 dbg_print_buff_addr;
533} __packed; /* ALIVE_RES_API_S_VER_2 */
534
535struct mvm_alive_resp {
536	__le16 status;
537	__le16 flags;
538	__le32 ucode_minor;
539	__le32 ucode_major;
540	u8 ver_subtype;
541	u8 ver_type;
542	u8 mac;
543	u8 opt;
544	__le32 timestamp;
545	__le32 error_event_table_ptr;	/* SRAM address for error log */
546	__le32 log_event_table_ptr;	/* SRAM address for LMAC event log */
547	__le32 cpu_register_ptr;
548	__le32 dbgm_config_ptr;
549	__le32 alive_counter_ptr;
550	__le32 scd_base_ptr;		/* SRAM address for SCD */
551	__le32 st_fwrd_addr;		/* pointer to Store and forward */
552	__le32 st_fwrd_size;
553	__le32 umac_minor;		/* UMAC version: minor */
554	__le32 umac_major;		/* UMAC version: major */
555	__le32 error_info_addr;		/* SRAM address for UMAC error log */
556	__le32 dbg_print_buff_addr;
557} __packed; /* ALIVE_RES_API_S_VER_3 */
558
559/* Error response/notification */
560enum {
561	FW_ERR_UNKNOWN_CMD = 0x0,
562	FW_ERR_INVALID_CMD_PARAM = 0x1,
563	FW_ERR_SERVICE = 0x2,
564	FW_ERR_ARC_MEMORY = 0x3,
565	FW_ERR_ARC_CODE = 0x4,
566	FW_ERR_WATCH_DOG = 0x5,
567	FW_ERR_WEP_GRP_KEY_INDX = 0x10,
568	FW_ERR_WEP_KEY_SIZE = 0x11,
569	FW_ERR_OBSOLETE_FUNC = 0x12,
570	FW_ERR_UNEXPECTED = 0xFE,
571	FW_ERR_FATAL = 0xFF
572};
573
574/**
575 * struct iwl_error_resp - FW error indication
576 * ( REPLY_ERROR = 0x2 )
577 * @error_type: one of FW_ERR_*
578 * @cmd_id: the command ID for which the error occured
579 * @bad_cmd_seq_num: sequence number of the erroneous command
580 * @error_service: which service created the error, applicable only if
581 *	error_type = 2, otherwise 0
582 * @timestamp: TSF in usecs.
583 */
584struct iwl_error_resp {
585	__le32 error_type;
586	u8 cmd_id;
587	u8 reserved1;
588	__le16 bad_cmd_seq_num;
589	__le32 error_service;
590	__le64 timestamp;
591} __packed;
592
593
594/* Common PHY, MAC and Bindings definitions */
595
596#define MAX_MACS_IN_BINDING	(3)
597#define MAX_BINDINGS		(4)
598#define AUX_BINDING_INDEX	(3)
599#define MAX_PHYS		(4)
600
601/* Used to extract ID and color from the context dword */
602#define FW_CTXT_ID_POS	  (0)
603#define FW_CTXT_ID_MSK	  (0xff << FW_CTXT_ID_POS)
604#define FW_CTXT_COLOR_POS (8)
605#define FW_CTXT_COLOR_MSK (0xff << FW_CTXT_COLOR_POS)
606#define FW_CTXT_INVALID	  (0xffffffff)
607
608#define FW_CMD_ID_AND_COLOR(_id, _color) ((_id << FW_CTXT_ID_POS) |\
609					  (_color << FW_CTXT_COLOR_POS))
610
611/* Possible actions on PHYs, MACs and Bindings */
612enum {
613	FW_CTXT_ACTION_STUB = 0,
614	FW_CTXT_ACTION_ADD,
615	FW_CTXT_ACTION_MODIFY,
616	FW_CTXT_ACTION_REMOVE,
617	FW_CTXT_ACTION_NUM
618}; /* COMMON_CONTEXT_ACTION_API_E_VER_1 */
619
620/* Time Events */
621
622/* Time Event types, according to MAC type */
623enum iwl_time_event_type {
624	/* BSS Station Events */
625	TE_BSS_STA_AGGRESSIVE_ASSOC,
626	TE_BSS_STA_ASSOC,
627	TE_BSS_EAP_DHCP_PROT,
628	TE_BSS_QUIET_PERIOD,
629
630	/* P2P Device Events */
631	TE_P2P_DEVICE_DISCOVERABLE,
632	TE_P2P_DEVICE_LISTEN,
633	TE_P2P_DEVICE_ACTION_SCAN,
634	TE_P2P_DEVICE_FULL_SCAN,
635
636	/* P2P Client Events */
637	TE_P2P_CLIENT_AGGRESSIVE_ASSOC,
638	TE_P2P_CLIENT_ASSOC,
639	TE_P2P_CLIENT_QUIET_PERIOD,
640
641	/* P2P GO Events */
642	TE_P2P_GO_ASSOC_PROT,
643	TE_P2P_GO_REPETITIVE_NOA,
644	TE_P2P_GO_CT_WINDOW,
645
646	/* WiDi Sync Events */
647	TE_WIDI_TX_SYNC,
648
649	/* Channel Switch NoA */
650	TE_CHANNEL_SWITCH_PERIOD,
651
652	TE_MAX
653}; /* MAC_EVENT_TYPE_API_E_VER_1 */
654
655
656
657/* Time event - defines for command API v1 */
658
659/*
660 * @TE_V1_FRAG_NONE: fragmentation of the time event is NOT allowed.
661 * @TE_V1_FRAG_SINGLE: fragmentation of the time event is allowed, but only
662 *	the first fragment is scheduled.
663 * @TE_V1_FRAG_DUAL: fragmentation of the time event is allowed, but only
664 *	the first 2 fragments are scheduled.
665 * @TE_V1_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
666 *	number of fragments are valid.
667 *
668 * Other than the constant defined above, specifying a fragmentation value 'x'
669 * means that the event can be fragmented but only the first 'x' will be
670 * scheduled.
671 */
672enum {
673	TE_V1_FRAG_NONE = 0,
674	TE_V1_FRAG_SINGLE = 1,
675	TE_V1_FRAG_DUAL = 2,
676	TE_V1_FRAG_ENDLESS = 0xffffffff
677};
678
679/* If a Time Event can be fragmented, this is the max number of fragments */
680#define TE_V1_FRAG_MAX_MSK	0x0fffffff
681/* Repeat the time event endlessly (until removed) */
682#define TE_V1_REPEAT_ENDLESS	0xffffffff
683/* If a Time Event has bounded repetitions, this is the maximal value */
684#define TE_V1_REPEAT_MAX_MSK_V1	0x0fffffff
685
686/* Time Event dependencies: none, on another TE, or in a specific time */
687enum {
688	TE_V1_INDEPENDENT		= 0,
689	TE_V1_DEP_OTHER			= BIT(0),
690	TE_V1_DEP_TSF			= BIT(1),
691	TE_V1_EVENT_SOCIOPATHIC		= BIT(2),
692}; /* MAC_EVENT_DEPENDENCY_POLICY_API_E_VER_2 */
693
694/*
695 * @TE_V1_NOTIF_NONE: no notifications
696 * @TE_V1_NOTIF_HOST_EVENT_START: request/receive notification on event start
697 * @TE_V1_NOTIF_HOST_EVENT_END:request/receive notification on event end
698 * @TE_V1_NOTIF_INTERNAL_EVENT_START: internal FW use
699 * @TE_V1_NOTIF_INTERNAL_EVENT_END: internal FW use.
700 * @TE_V1_NOTIF_HOST_FRAG_START: request/receive notification on frag start
701 * @TE_V1_NOTIF_HOST_FRAG_END:request/receive notification on frag end
702 * @TE_V1_NOTIF_INTERNAL_FRAG_START: internal FW use.
703 * @TE_V1_NOTIF_INTERNAL_FRAG_END: internal FW use.
704 *
705 * Supported Time event notifications configuration.
706 * A notification (both event and fragment) includes a status indicating weather
707 * the FW was able to schedule the event or not. For fragment start/end
708 * notification the status is always success. There is no start/end fragment
709 * notification for monolithic events.
710 */
711enum {
712	TE_V1_NOTIF_NONE = 0,
713	TE_V1_NOTIF_HOST_EVENT_START = BIT(0),
714	TE_V1_NOTIF_HOST_EVENT_END = BIT(1),
715	TE_V1_NOTIF_INTERNAL_EVENT_START = BIT(2),
716	TE_V1_NOTIF_INTERNAL_EVENT_END = BIT(3),
717	TE_V1_NOTIF_HOST_FRAG_START = BIT(4),
718	TE_V1_NOTIF_HOST_FRAG_END = BIT(5),
719	TE_V1_NOTIF_INTERNAL_FRAG_START = BIT(6),
720	TE_V1_NOTIF_INTERNAL_FRAG_END = BIT(7),
721}; /* MAC_EVENT_ACTION_API_E_VER_2 */
722
723/* Time event - defines for command API */
724
725/*
726 * @TE_V2_FRAG_NONE: fragmentation of the time event is NOT allowed.
727 * @TE_V2_FRAG_SINGLE: fragmentation of the time event is allowed, but only
728 *  the first fragment is scheduled.
729 * @TE_V2_FRAG_DUAL: fragmentation of the time event is allowed, but only
730 *  the first 2 fragments are scheduled.
731 * @TE_V2_FRAG_ENDLESS: fragmentation of the time event is allowed, and any
732 *  number of fragments are valid.
733 *
734 * Other than the constant defined above, specifying a fragmentation value 'x'
735 * means that the event can be fragmented but only the first 'x' will be
736 * scheduled.
737 */
738enum {
739	TE_V2_FRAG_NONE = 0,
740	TE_V2_FRAG_SINGLE = 1,
741	TE_V2_FRAG_DUAL = 2,
742	TE_V2_FRAG_MAX = 0xfe,
743	TE_V2_FRAG_ENDLESS = 0xff
744};
745
746/* Repeat the time event endlessly (until removed) */
747#define TE_V2_REPEAT_ENDLESS	0xff
748/* If a Time Event has bounded repetitions, this is the maximal value */
749#define TE_V2_REPEAT_MAX	0xfe
750
751#define TE_V2_PLACEMENT_POS	12
752#define TE_V2_ABSENCE_POS	15
753
754/* Time event policy values
755 * A notification (both event and fragment) includes a status indicating weather
756 * the FW was able to schedule the event or not. For fragment start/end
757 * notification the status is always success. There is no start/end fragment
758 * notification for monolithic events.
759 *
760 * @TE_V2_DEFAULT_POLICY: independent, social, present, unoticable
761 * @TE_V2_NOTIF_HOST_EVENT_START: request/receive notification on event start
762 * @TE_V2_NOTIF_HOST_EVENT_END:request/receive notification on event end
763 * @TE_V2_NOTIF_INTERNAL_EVENT_START: internal FW use
764 * @TE_V2_NOTIF_INTERNAL_EVENT_END: internal FW use.
765 * @TE_V2_NOTIF_HOST_FRAG_START: request/receive notification on frag start
766 * @TE_V2_NOTIF_HOST_FRAG_END:request/receive notification on frag end
767 * @TE_V2_NOTIF_INTERNAL_FRAG_START: internal FW use.
768 * @TE_V2_NOTIF_INTERNAL_FRAG_END: internal FW use.
769 * @TE_V2_DEP_OTHER: depends on another time event
770 * @TE_V2_DEP_TSF: depends on a specific time
771 * @TE_V2_EVENT_SOCIOPATHIC: can't co-exist with other events of tha same MAC
772 * @TE_V2_ABSENCE: are we present or absent during the Time Event.
773 */
774enum {
775	TE_V2_DEFAULT_POLICY = 0x0,
776
777	/* notifications (event start/stop, fragment start/stop) */
778	TE_V2_NOTIF_HOST_EVENT_START = BIT(0),
779	TE_V2_NOTIF_HOST_EVENT_END = BIT(1),
780	TE_V2_NOTIF_INTERNAL_EVENT_START = BIT(2),
781	TE_V2_NOTIF_INTERNAL_EVENT_END = BIT(3),
782
783	TE_V2_NOTIF_HOST_FRAG_START = BIT(4),
784	TE_V2_NOTIF_HOST_FRAG_END = BIT(5),
785	TE_V2_NOTIF_INTERNAL_FRAG_START = BIT(6),
786	TE_V2_NOTIF_INTERNAL_FRAG_END = BIT(7),
787	T2_V2_START_IMMEDIATELY = BIT(11),
788
789	TE_V2_NOTIF_MSK = 0xff,
790
791	/* placement characteristics */
792	TE_V2_DEP_OTHER = BIT(TE_V2_PLACEMENT_POS),
793	TE_V2_DEP_TSF = BIT(TE_V2_PLACEMENT_POS + 1),
794	TE_V2_EVENT_SOCIOPATHIC = BIT(TE_V2_PLACEMENT_POS + 2),
795
796	/* are we present or absent during the Time Event. */
797	TE_V2_ABSENCE = BIT(TE_V2_ABSENCE_POS),
798};
799
800/**
801 * struct iwl_time_event_cmd_api - configuring Time Events
802 * with struct MAC_TIME_EVENT_DATA_API_S_VER_2 (see also
803 * with version 1. determined by IWL_UCODE_TLV_FLAGS)
804 * ( TIME_EVENT_CMD = 0x29 )
805 * @id_and_color: ID and color of the relevant MAC
806 * @action: action to perform, one of FW_CTXT_ACTION_*
807 * @id: this field has two meanings, depending on the action:
808 *	If the action is ADD, then it means the type of event to add.
809 *	For all other actions it is the unique event ID assigned when the
810 *	event was added by the FW.
811 * @apply_time: When to start the Time Event (in GP2)
812 * @max_delay: maximum delay to event's start (apply time), in TU
813 * @depends_on: the unique ID of the event we depend on (if any)
814 * @interval: interval between repetitions, in TU
815 * @duration: duration of event in TU
816 * @repeat: how many repetitions to do, can be TE_REPEAT_ENDLESS
817 * @max_frags: maximal number of fragments the Time Event can be divided to
818 * @policy: defines whether uCode shall notify the host or other uCode modules
819 *	on event and/or fragment start and/or end
820 *	using one of TE_INDEPENDENT, TE_DEP_OTHER, TE_DEP_TSF
821 *	TE_EVENT_SOCIOPATHIC
822 *	using TE_ABSENCE and using TE_NOTIF_*
823 */
824struct iwl_time_event_cmd {
825	/* COMMON_INDEX_HDR_API_S_VER_1 */
826	__le32 id_and_color;
827	__le32 action;
828	__le32 id;
829	/* MAC_TIME_EVENT_DATA_API_S_VER_2 */
830	__le32 apply_time;
831	__le32 max_delay;
832	__le32 depends_on;
833	__le32 interval;
834	__le32 duration;
835	u8 repeat;
836	u8 max_frags;
837	__le16 policy;
838} __packed; /* MAC_TIME_EVENT_CMD_API_S_VER_2 */
839
840/**
841 * struct iwl_time_event_resp - response structure to iwl_time_event_cmd
842 * @status: bit 0 indicates success, all others specify errors
843 * @id: the Time Event type
844 * @unique_id: the unique ID assigned (in ADD) or given (others) to the TE
845 * @id_and_color: ID and color of the relevant MAC
846 */
847struct iwl_time_event_resp {
848	__le32 status;
849	__le32 id;
850	__le32 unique_id;
851	__le32 id_and_color;
852} __packed; /* MAC_TIME_EVENT_RSP_API_S_VER_1 */
853
854/**
855 * struct iwl_time_event_notif - notifications of time event start/stop
856 * ( TIME_EVENT_NOTIFICATION = 0x2a )
857 * @timestamp: action timestamp in GP2
858 * @session_id: session's unique id
859 * @unique_id: unique id of the Time Event itself
860 * @id_and_color: ID and color of the relevant MAC
861 * @action: one of TE_NOTIF_START or TE_NOTIF_END
862 * @status: true if scheduled, false otherwise (not executed)
863 */
864struct iwl_time_event_notif {
865	__le32 timestamp;
866	__le32 session_id;
867	__le32 unique_id;
868	__le32 id_and_color;
869	__le32 action;
870	__le32 status;
871} __packed; /* MAC_TIME_EVENT_NTFY_API_S_VER_1 */
872
873
874/* Bindings and Time Quota */
875
876/**
877 * struct iwl_binding_cmd - configuring bindings
878 * ( BINDING_CONTEXT_CMD = 0x2b )
879 * @id_and_color: ID and color of the relevant Binding
880 * @action: action to perform, one of FW_CTXT_ACTION_*
881 * @macs: array of MAC id and colors which belong to the binding
882 * @phy: PHY id and color which belongs to the binding
883 */
884struct iwl_binding_cmd {
885	/* COMMON_INDEX_HDR_API_S_VER_1 */
886	__le32 id_and_color;
887	__le32 action;
888	/* BINDING_DATA_API_S_VER_1 */
889	__le32 macs[MAX_MACS_IN_BINDING];
890	__le32 phy;
891} __packed; /* BINDING_CMD_API_S_VER_1 */
892
893/* The maximal number of fragments in the FW's schedule session */
894#define IWL_MVM_MAX_QUOTA 128
895
896/**
897 * struct iwl_time_quota_data - configuration of time quota per binding
898 * @id_and_color: ID and color of the relevant Binding
899 * @quota: absolute time quota in TU. The scheduler will try to divide the
900 *	remainig quota (after Time Events) according to this quota.
901 * @max_duration: max uninterrupted context duration in TU
902 */
903struct iwl_time_quota_data {
904	__le32 id_and_color;
905	__le32 quota;
906	__le32 max_duration;
907} __packed; /* TIME_QUOTA_DATA_API_S_VER_1 */
908
909/**
910 * struct iwl_time_quota_cmd - configuration of time quota between bindings
911 * ( TIME_QUOTA_CMD = 0x2c )
912 * @quotas: allocations per binding
913 */
914struct iwl_time_quota_cmd {
915	struct iwl_time_quota_data quotas[MAX_BINDINGS];
916} __packed; /* TIME_QUOTA_ALLOCATION_CMD_API_S_VER_1 */
917
918
919/* PHY context */
920
921/* Supported bands */
922#define PHY_BAND_5  (0)
923#define PHY_BAND_24 (1)
924
925/* Supported channel width, vary if there is VHT support */
926#define PHY_VHT_CHANNEL_MODE20	(0x0)
927#define PHY_VHT_CHANNEL_MODE40	(0x1)
928#define PHY_VHT_CHANNEL_MODE80	(0x2)
929#define PHY_VHT_CHANNEL_MODE160	(0x3)
930
931/*
932 * Control channel position:
933 * For legacy set bit means upper channel, otherwise lower.
934 * For VHT - bit-2 marks if the control is lower/upper relative to center-freq
935 *   bits-1:0 mark the distance from the center freq. for 20Mhz, offset is 0.
936 *                                   center_freq
937 *                                        |
938 * 40Mhz                          |_______|_______|
939 * 80Mhz                  |_______|_______|_______|_______|
940 * 160Mhz |_______|_______|_______|_______|_______|_______|_______|_______|
941 * code      011     010     001     000  |  100     101     110    111
942 */
943#define PHY_VHT_CTRL_POS_1_BELOW  (0x0)
944#define PHY_VHT_CTRL_POS_2_BELOW  (0x1)
945#define PHY_VHT_CTRL_POS_3_BELOW  (0x2)
946#define PHY_VHT_CTRL_POS_4_BELOW  (0x3)
947#define PHY_VHT_CTRL_POS_1_ABOVE  (0x4)
948#define PHY_VHT_CTRL_POS_2_ABOVE  (0x5)
949#define PHY_VHT_CTRL_POS_3_ABOVE  (0x6)
950#define PHY_VHT_CTRL_POS_4_ABOVE  (0x7)
951
952/*
953 * @band: PHY_BAND_*
954 * @channel: channel number
955 * @width: PHY_[VHT|LEGACY]_CHANNEL_*
956 * @ctrl channel: PHY_[VHT|LEGACY]_CTRL_*
957 */
958struct iwl_fw_channel_info {
959	u8 band;
960	u8 channel;
961	u8 width;
962	u8 ctrl_pos;
963} __packed;
964
965#define PHY_RX_CHAIN_DRIVER_FORCE_POS	(0)
966#define PHY_RX_CHAIN_DRIVER_FORCE_MSK \
967	(0x1 << PHY_RX_CHAIN_DRIVER_FORCE_POS)
968#define PHY_RX_CHAIN_VALID_POS		(1)
969#define PHY_RX_CHAIN_VALID_MSK \
970	(0x7 << PHY_RX_CHAIN_VALID_POS)
971#define PHY_RX_CHAIN_FORCE_SEL_POS	(4)
972#define PHY_RX_CHAIN_FORCE_SEL_MSK \
973	(0x7 << PHY_RX_CHAIN_FORCE_SEL_POS)
974#define PHY_RX_CHAIN_FORCE_MIMO_SEL_POS	(7)
975#define PHY_RX_CHAIN_FORCE_MIMO_SEL_MSK \
976	(0x7 << PHY_RX_CHAIN_FORCE_MIMO_SEL_POS)
977#define PHY_RX_CHAIN_CNT_POS		(10)
978#define PHY_RX_CHAIN_CNT_MSK \
979	(0x3 << PHY_RX_CHAIN_CNT_POS)
980#define PHY_RX_CHAIN_MIMO_CNT_POS	(12)
981#define PHY_RX_CHAIN_MIMO_CNT_MSK \
982	(0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
983#define PHY_RX_CHAIN_MIMO_FORCE_POS	(14)
984#define PHY_RX_CHAIN_MIMO_FORCE_MSK \
985	(0x1 << PHY_RX_CHAIN_MIMO_FORCE_POS)
986
987/* TODO: fix the value, make it depend on firmware at runtime? */
988#define NUM_PHY_CTX	3
989
990/* TODO: complete missing documentation */
991/**
992 * struct iwl_phy_context_cmd - config of the PHY context
993 * ( PHY_CONTEXT_CMD = 0x8 )
994 * @id_and_color: ID and color of the relevant Binding
995 * @action: action to perform, one of FW_CTXT_ACTION_*
996 * @apply_time: 0 means immediate apply and context switch.
997 *	other value means apply new params after X usecs
998 * @tx_param_color: ???
999 * @channel_info:
1000 * @txchain_info: ???
1001 * @rxchain_info: ???
1002 * @acquisition_data: ???
1003 * @dsp_cfg_flags: set to 0
1004 */
1005struct iwl_phy_context_cmd {
1006	/* COMMON_INDEX_HDR_API_S_VER_1 */
1007	__le32 id_and_color;
1008	__le32 action;
1009	/* PHY_CONTEXT_DATA_API_S_VER_1 */
1010	__le32 apply_time;
1011	__le32 tx_param_color;
1012	struct iwl_fw_channel_info ci;
1013	__le32 txchain_info;
1014	__le32 rxchain_info;
1015	__le32 acquisition_data;
1016	__le32 dsp_cfg_flags;
1017} __packed; /* PHY_CONTEXT_CMD_API_VER_1 */
1018
1019/*
1020 * Aux ROC command
1021 *
1022 * Command requests the firmware to create a time event for a certain duration
1023 * and remain on the given channel. This is done by using the Aux framework in
1024 * the FW.
1025 * The command was first used for Hot Spot issues - but can be used regardless
1026 * to Hot Spot.
1027 *
1028 * ( HOT_SPOT_CMD 0x53 )
1029 *
1030 * @id_and_color: ID and color of the MAC
1031 * @action: action to perform, one of FW_CTXT_ACTION_*
1032 * @event_unique_id: If the action FW_CTXT_ACTION_REMOVE then the
1033 *	event_unique_id should be the id of the time event assigned by ucode.
1034 *	Otherwise ignore the event_unique_id.
1035 * @sta_id_and_color: station id and color, resumed during "Remain On Channel"
1036 *	activity.
1037 * @channel_info: channel info
1038 * @node_addr: Our MAC Address
1039 * @reserved: reserved for alignment
1040 * @apply_time: GP2 value to start (should always be the current GP2 value)
1041 * @apply_time_max_delay: Maximum apply time delay value in TU. Defines max
1042 *	time by which start of the event is allowed to be postponed.
1043 * @duration: event duration in TU To calculate event duration:
1044 *	timeEventDuration = min(duration, remainingQuota)
1045 */
1046struct iwl_hs20_roc_req {
1047	/* COMMON_INDEX_HDR_API_S_VER_1 hdr */
1048	__le32 id_and_color;
1049	__le32 action;
1050	__le32 event_unique_id;
1051	__le32 sta_id_and_color;
1052	struct iwl_fw_channel_info channel_info;
1053	u8 node_addr[ETH_ALEN];
1054	__le16 reserved;
1055	__le32 apply_time;
1056	__le32 apply_time_max_delay;
1057	__le32 duration;
1058} __packed; /* HOT_SPOT_CMD_API_S_VER_1 */
1059
1060/*
1061 * values for AUX ROC result values
1062 */
1063enum iwl_mvm_hot_spot {
1064	HOT_SPOT_RSP_STATUS_OK,
1065	HOT_SPOT_RSP_STATUS_TOO_MANY_EVENTS,
1066	HOT_SPOT_MAX_NUM_OF_SESSIONS,
1067};
1068
1069/*
1070 * Aux ROC command response
1071 *
1072 * In response to iwl_hs20_roc_req the FW sends this command to notify the
1073 * driver the uid of the timevent.
1074 *
1075 * ( HOT_SPOT_CMD 0x53 )
1076 *
1077 * @event_unique_id: Unique ID of time event assigned by ucode
1078 * @status: Return status 0 is success, all the rest used for specific errors
1079 */
1080struct iwl_hs20_roc_res {
1081	__le32 event_unique_id;
1082	__le32 status;
1083} __packed; /* HOT_SPOT_RSP_API_S_VER_1 */
1084
1085/**
1086 * struct iwl_radio_version_notif - information on the radio version
1087 * ( RADIO_VERSION_NOTIFICATION = 0x68 )
1088 * @radio_flavor:
1089 * @radio_step:
1090 * @radio_dash:
1091 */
1092struct iwl_radio_version_notif {
1093	__le32 radio_flavor;
1094	__le32 radio_step;
1095	__le32 radio_dash;
1096} __packed; /* RADIO_VERSION_NOTOFICATION_S_VER_1 */
1097
1098enum iwl_card_state_flags {
1099	CARD_ENABLED		= 0x00,
1100	HW_CARD_DISABLED	= 0x01,
1101	SW_CARD_DISABLED	= 0x02,
1102	CT_KILL_CARD_DISABLED	= 0x04,
1103	HALT_CARD_DISABLED	= 0x08,
1104	CARD_DISABLED_MSK	= 0x0f,
1105	CARD_IS_RX_ON		= 0x10,
1106};
1107
1108/**
1109 * struct iwl_radio_version_notif - information on the radio version
1110 * ( CARD_STATE_NOTIFICATION = 0xa1 )
1111 * @flags: %iwl_card_state_flags
1112 */
1113struct iwl_card_state_notif {
1114	__le32 flags;
1115} __packed; /* CARD_STATE_NTFY_API_S_VER_1 */
1116
1117/**
1118 * struct iwl_missed_beacons_notif - information on missed beacons
1119 * ( MISSED_BEACONS_NOTIFICATION = 0xa2 )
1120 * @mac_id: interface ID
1121 * @consec_missed_beacons_since_last_rx: number of consecutive missed
1122 *	beacons since last RX.
1123 * @consec_missed_beacons: number of consecutive missed beacons
1124 * @num_expected_beacons:
1125 * @num_recvd_beacons:
1126 */
1127struct iwl_missed_beacons_notif {
1128	__le32 mac_id;
1129	__le32 consec_missed_beacons_since_last_rx;
1130	__le32 consec_missed_beacons;
1131	__le32 num_expected_beacons;
1132	__le32 num_recvd_beacons;
1133} __packed; /* MISSED_BEACON_NTFY_API_S_VER_3 */
1134
1135/**
1136 * struct iwl_mfuart_load_notif - mfuart image version & status
1137 * ( MFUART_LOAD_NOTIFICATION = 0xb1 )
1138 * @installed_ver: installed image version
1139 * @external_ver: external image version
1140 * @status: MFUART loading status
1141 * @duration: MFUART loading time
1142*/
1143struct iwl_mfuart_load_notif {
1144	__le32 installed_ver;
1145	__le32 external_ver;
1146	__le32 status;
1147	__le32 duration;
1148} __packed; /*MFU_LOADER_NTFY_API_S_VER_1*/
1149
1150/**
1151 * struct iwl_set_calib_default_cmd - set default value for calibration.
1152 * ( SET_CALIB_DEFAULT_CMD = 0x8e )
1153 * @calib_index: the calibration to set value for
1154 * @length: of data
1155 * @data: the value to set for the calibration result
1156 */
1157struct iwl_set_calib_default_cmd {
1158	__le16 calib_index;
1159	__le16 length;
1160	u8 data[0];
1161} __packed; /* PHY_CALIB_OVERRIDE_VALUES_S */
1162
1163#define MAX_PORT_ID_NUM	2
1164#define MAX_MCAST_FILTERING_ADDRESSES 256
1165
1166/**
1167 * struct iwl_mcast_filter_cmd - configure multicast filter.
1168 * @filter_own: Set 1 to filter out multicast packets sent by station itself
1169 * @port_id:	Multicast MAC addresses array specifier. This is a strange way
1170 *		to identify network interface adopted in host-device IF.
1171 *		It is used by FW as index in array of addresses. This array has
1172 *		MAX_PORT_ID_NUM members.
1173 * @count:	Number of MAC addresses in the array
1174 * @pass_all:	Set 1 to pass all multicast packets.
1175 * @bssid:	current association BSSID.
1176 * @addr_list:	Place holder for array of MAC addresses.
1177 *		IMPORTANT: add padding if necessary to ensure DWORD alignment.
1178 */
1179struct iwl_mcast_filter_cmd {
1180	u8 filter_own;
1181	u8 port_id;
1182	u8 count;
1183	u8 pass_all;
1184	u8 bssid[6];
1185	u8 reserved[2];
1186	u8 addr_list[0];
1187} __packed; /* MCAST_FILTERING_CMD_API_S_VER_1 */
1188
1189#define MAX_BCAST_FILTERS 8
1190#define MAX_BCAST_FILTER_ATTRS 2
1191
1192/**
1193 * enum iwl_mvm_bcast_filter_attr_offset - written by fw for each Rx packet
1194 * @BCAST_FILTER_OFFSET_PAYLOAD_START: offset is from payload start.
1195 * @BCAST_FILTER_OFFSET_IP_END: offset is from ip header end (i.e.
1196 *	start of ip payload).
1197 */
1198enum iwl_mvm_bcast_filter_attr_offset {
1199	BCAST_FILTER_OFFSET_PAYLOAD_START = 0,
1200	BCAST_FILTER_OFFSET_IP_END = 1,
1201};
1202
1203/**
1204 * struct iwl_fw_bcast_filter_attr - broadcast filter attribute
1205 * @offset_type:	&enum iwl_mvm_bcast_filter_attr_offset.
1206 * @offset:	starting offset of this pattern.
1207 * @val:		value to match - big endian (MSB is the first
1208 *		byte to match from offset pos).
1209 * @mask:	mask to match (big endian).
1210 */
1211struct iwl_fw_bcast_filter_attr {
1212	u8 offset_type;
1213	u8 offset;
1214	__le16 reserved1;
1215	__be32 val;
1216	__be32 mask;
1217} __packed; /* BCAST_FILTER_ATT_S_VER_1 */
1218
1219/**
1220 * enum iwl_mvm_bcast_filter_frame_type - filter frame type
1221 * @BCAST_FILTER_FRAME_TYPE_ALL: consider all frames.
1222 * @BCAST_FILTER_FRAME_TYPE_IPV4: consider only ipv4 frames
1223 */
1224enum iwl_mvm_bcast_filter_frame_type {
1225	BCAST_FILTER_FRAME_TYPE_ALL = 0,
1226	BCAST_FILTER_FRAME_TYPE_IPV4 = 1,
1227};
1228
1229/**
1230 * struct iwl_fw_bcast_filter - broadcast filter
1231 * @discard: discard frame (1) or let it pass (0).
1232 * @frame_type: &enum iwl_mvm_bcast_filter_frame_type.
1233 * @num_attrs: number of valid attributes in this filter.
1234 * @attrs: attributes of this filter. a filter is considered matched
1235 *	only when all its attributes are matched (i.e. AND relationship)
1236 */
1237struct iwl_fw_bcast_filter {
1238	u8 discard;
1239	u8 frame_type;
1240	u8 num_attrs;
1241	u8 reserved1;
1242	struct iwl_fw_bcast_filter_attr attrs[MAX_BCAST_FILTER_ATTRS];
1243} __packed; /* BCAST_FILTER_S_VER_1 */
1244
1245/**
1246 * struct iwl_fw_bcast_mac - per-mac broadcast filtering configuration.
1247 * @default_discard: default action for this mac (discard (1) / pass (0)).
1248 * @attached_filters: bitmap of relevant filters for this mac.
1249 */
1250struct iwl_fw_bcast_mac {
1251	u8 default_discard;
1252	u8 reserved1;
1253	__le16 attached_filters;
1254} __packed; /* BCAST_MAC_CONTEXT_S_VER_1 */
1255
1256/**
1257 * struct iwl_bcast_filter_cmd - broadcast filtering configuration
1258 * @disable: enable (0) / disable (1)
1259 * @max_bcast_filters: max number of filters (MAX_BCAST_FILTERS)
1260 * @max_macs: max number of macs (NUM_MAC_INDEX_DRIVER)
1261 * @filters: broadcast filters
1262 * @macs: broadcast filtering configuration per-mac
1263 */
1264struct iwl_bcast_filter_cmd {
1265	u8 disable;
1266	u8 max_bcast_filters;
1267	u8 max_macs;
1268	u8 reserved1;
1269	struct iwl_fw_bcast_filter filters[MAX_BCAST_FILTERS];
1270	struct iwl_fw_bcast_mac macs[NUM_MAC_INDEX_DRIVER];
1271} __packed; /* BCAST_FILTERING_HCMD_API_S_VER_1 */
1272
1273/*
1274 * enum iwl_mvm_marker_id - maker ids
1275 *
1276 * The ids for different type of markers to insert into the usniffer logs
1277 */
1278enum iwl_mvm_marker_id {
1279	MARKER_ID_TX_FRAME_LATENCY = 1,
1280}; /* MARKER_ID_API_E_VER_1 */
1281
1282/**
1283 * struct iwl_mvm_marker - mark info into the usniffer logs
1284 *
1285 * (MARKER_CMD = 0xcb)
1286 *
1287 * Mark the UTC time stamp into the usniffer logs together with additional
1288 * metadata, so the usniffer output can be parsed.
1289 * In the command response the ucode will return the GP2 time.
1290 *
1291 * @dw_len: The amount of dwords following this byte including this byte.
1292 * @marker_id: A unique marker id (iwl_mvm_marker_id).
1293 * @reserved: reserved.
1294 * @timestamp: in milliseconds since 1970-01-01 00:00:00 UTC
1295 * @metadata: additional meta data that will be written to the unsiffer log
1296 */
1297struct iwl_mvm_marker {
1298	u8 dwLen;
1299	u8 markerId;
1300	__le16 reserved;
1301	__le64 timestamp;
1302	__le32 metadata[0];
1303} __packed; /* MARKER_API_S_VER_1 */
1304
1305/*
1306 * enum iwl_dc2dc_config_id - flag ids
1307 *
1308 * Ids of dc2dc configuration flags
1309 */
1310enum iwl_dc2dc_config_id {
1311	DCDC_LOW_POWER_MODE_MSK_SET  = 0x1, /* not used */
1312	DCDC_FREQ_TUNE_SET = 0x2,
1313}; /* MARKER_ID_API_E_VER_1 */
1314
1315/**
1316 * struct iwl_dc2dc_config_cmd - configure dc2dc values
1317 *
1318 * (DC2DC_CONFIG_CMD = 0x83)
1319 *
1320 * Set/Get & configure dc2dc values.
1321 * The command always returns the current dc2dc values.
1322 *
1323 * @flags: set/get dc2dc
1324 * @enable_low_power_mode: not used.
1325 * @dc2dc_freq_tune0: frequency divider - digital domain
1326 * @dc2dc_freq_tune1: frequency divider - analog domain
1327 */
1328struct iwl_dc2dc_config_cmd {
1329	__le32 flags;
1330	__le32 enable_low_power_mode; /* not used */
1331	__le32 dc2dc_freq_tune0;
1332	__le32 dc2dc_freq_tune1;
1333} __packed; /* DC2DC_CONFIG_CMD_API_S_VER_1 */
1334
1335/**
1336 * struct iwl_dc2dc_config_resp - response for iwl_dc2dc_config_cmd
1337 *
1338 * Current dc2dc values returned by the FW.
1339 *
1340 * @dc2dc_freq_tune0: frequency divider - digital domain
1341 * @dc2dc_freq_tune1: frequency divider - analog domain
1342 */
1343struct iwl_dc2dc_config_resp {
1344	__le32 dc2dc_freq_tune0;
1345	__le32 dc2dc_freq_tune1;
1346} __packed; /* DC2DC_CONFIG_RESP_API_S_VER_1 */
1347
1348/***********************************
1349 * Smart Fifo API
1350 ***********************************/
1351/* Smart Fifo state */
1352enum iwl_sf_state {
1353	SF_LONG_DELAY_ON = 0, /* should never be called by driver */
1354	SF_FULL_ON,
1355	SF_UNINIT,
1356	SF_INIT_OFF,
1357	SF_HW_NUM_STATES
1358};
1359
1360/* Smart Fifo possible scenario */
1361enum iwl_sf_scenario {
1362	SF_SCENARIO_SINGLE_UNICAST,
1363	SF_SCENARIO_AGG_UNICAST,
1364	SF_SCENARIO_MULTICAST,
1365	SF_SCENARIO_BA_RESP,
1366	SF_SCENARIO_TX_RESP,
1367	SF_NUM_SCENARIO
1368};
1369
1370#define SF_TRANSIENT_STATES_NUMBER 2	/* SF_LONG_DELAY_ON and SF_FULL_ON */
1371#define SF_NUM_TIMEOUT_TYPES 2		/* Aging timer and Idle timer */
1372
1373/* smart FIFO default values */
1374#define SF_W_MARK_SISO 6144
1375#define SF_W_MARK_MIMO2 8192
1376#define SF_W_MARK_MIMO3 6144
1377#define SF_W_MARK_LEGACY 4096
1378#define SF_W_MARK_SCAN 4096
1379
1380/* SF Scenarios timers for default configuration (aligned to 32 uSec) */
1381#define SF_SINGLE_UNICAST_IDLE_TIMER_DEF 160	/* 150 uSec  */
1382#define SF_SINGLE_UNICAST_AGING_TIMER_DEF 400	/* 0.4 mSec */
1383#define SF_AGG_UNICAST_IDLE_TIMER_DEF 160		/* 150 uSec */
1384#define SF_AGG_UNICAST_AGING_TIMER_DEF 400		/* 0.4 mSec */
1385#define SF_MCAST_IDLE_TIMER_DEF 160		/* 150 mSec */
1386#define SF_MCAST_AGING_TIMER_DEF 400		/* 0.4 mSec */
1387#define SF_BA_IDLE_TIMER_DEF 160			/* 150 uSec */
1388#define SF_BA_AGING_TIMER_DEF 400			/* 0.4 mSec */
1389#define SF_TX_RE_IDLE_TIMER_DEF 160			/* 150 uSec */
1390#define SF_TX_RE_AGING_TIMER_DEF 400		/* 0.4 mSec */
1391
1392/* SF Scenarios timers for BSS MAC configuration (aligned to 32 uSec) */
1393#define SF_SINGLE_UNICAST_IDLE_TIMER 320	/* 300 uSec  */
1394#define SF_SINGLE_UNICAST_AGING_TIMER 2016	/* 2 mSec */
1395#define SF_AGG_UNICAST_IDLE_TIMER 320		/* 300 uSec */
1396#define SF_AGG_UNICAST_AGING_TIMER 2016		/* 2 mSec */
1397#define SF_MCAST_IDLE_TIMER 2016		/* 2 mSec */
1398#define SF_MCAST_AGING_TIMER 10016		/* 10 mSec */
1399#define SF_BA_IDLE_TIMER 320			/* 300 uSec */
1400#define SF_BA_AGING_TIMER 2016			/* 2 mSec */
1401#define SF_TX_RE_IDLE_TIMER 320			/* 300 uSec */
1402#define SF_TX_RE_AGING_TIMER 2016		/* 2 mSec */
1403
1404#define SF_LONG_DELAY_AGING_TIMER 1000000	/* 1 Sec */
1405
1406#define SF_CFG_DUMMY_NOTIF_OFF	BIT(16)
1407
1408/**
1409 * Smart Fifo configuration command.
1410 * @state: smart fifo state, types listed in enum %iwl_sf_sate.
1411 * @watermark: Minimum allowed availabe free space in RXF for transient state.
1412 * @long_delay_timeouts: aging and idle timer values for each scenario
1413 * in long delay state.
1414 * @full_on_timeouts: timer values for each scenario in full on state.
1415 */
1416struct iwl_sf_cfg_cmd {
1417	__le32 state;
1418	__le32 watermark[SF_TRANSIENT_STATES_NUMBER];
1419	__le32 long_delay_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1420	__le32 full_on_timeouts[SF_NUM_SCENARIO][SF_NUM_TIMEOUT_TYPES];
1421} __packed; /* SF_CFG_API_S_VER_2 */
1422
1423/***********************************
1424 * Location Aware Regulatory (LAR) API - MCC updates
1425 ***********************************/
1426
1427/**
1428 * struct iwl_mcc_update_cmd - Request the device to update geographic
1429 * regulatory profile according to the given MCC (Mobile Country Code).
1430 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1431 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1432 * MCC in the cmd response will be the relevant MCC in the NVM.
1433 * @mcc: given mobile country code
1434 * @source_id: the source from where we got the MCC, see iwl_mcc_source
1435 * @reserved: reserved for alignment
1436 */
1437struct iwl_mcc_update_cmd {
1438	__le16 mcc;
1439	u8 source_id;
1440	u8 reserved;
1441} __packed; /* LAR_UPDATE_MCC_CMD_API_S */
1442
1443/**
1444 * iwl_mcc_update_resp - response to MCC_UPDATE_CMD.
1445 * Contains the new channel control profile map, if changed, and the new MCC
1446 * (mobile country code).
1447 * The new MCC may be different than what was requested in MCC_UPDATE_CMD.
1448 * @status: see &enum iwl_mcc_update_status
1449 * @mcc: the new applied MCC
1450 * @cap: capabilities for all channels which matches the MCC
1451 * @source_id: the MCC source, see iwl_mcc_source
1452 * @n_channels: number of channels in @channels_data (may be 14, 39, 50 or 51
1453 *		channels, depending on platform)
1454 * @channels: channel control data map, DWORD for each channel. Only the first
1455 *	16bits are used.
1456 */
1457struct iwl_mcc_update_resp {
1458	__le32 status;
1459	__le16 mcc;
1460	u8 cap;
1461	u8 source_id;
1462	__le32 n_channels;
1463	__le32 channels[0];
1464} __packed; /* LAR_UPDATE_MCC_CMD_RESP_S */
1465
1466/**
1467 * struct iwl_mcc_chub_notif - chub notifies of mcc change
1468 * (MCC_CHUB_UPDATE_CMD = 0xc9)
1469 * The Chub (Communication Hub, CommsHUB) is a HW component that connects to
1470 * the cellular and connectivity cores that gets updates of the mcc, and
1471 * notifies the ucode directly of any mcc change.
1472 * The ucode requests the driver to request the device to update geographic
1473 * regulatory  profile according to the given MCC (Mobile Country Code).
1474 * The MCC is two letter-code, ascii upper case[A-Z] or '00' for world domain.
1475 * 'ZZ' MCC will be used to switch to NVM default profile; in this case, the
1476 * MCC in the cmd response will be the relevant MCC in the NVM.
1477 * @mcc: given mobile country code
1478 * @source_id: identity of the change originator, see iwl_mcc_source
1479 * @reserved1: reserved for alignment
1480 */
1481struct iwl_mcc_chub_notif {
1482	u16 mcc;
1483	u8 source_id;
1484	u8 reserved1;
1485} __packed; /* LAR_MCC_NOTIFY_S */
1486
1487enum iwl_mcc_update_status {
1488	MCC_RESP_NEW_CHAN_PROFILE,
1489	MCC_RESP_SAME_CHAN_PROFILE,
1490	MCC_RESP_INVALID,
1491	MCC_RESP_NVM_DISABLED,
1492	MCC_RESP_ILLEGAL,
1493	MCC_RESP_LOW_PRIORITY,
1494};
1495
1496enum iwl_mcc_source {
1497	MCC_SOURCE_OLD_FW = 0,
1498	MCC_SOURCE_ME = 1,
1499	MCC_SOURCE_BIOS = 2,
1500	MCC_SOURCE_3G_LTE_HOST = 3,
1501	MCC_SOURCE_3G_LTE_DEVICE = 4,
1502	MCC_SOURCE_WIFI = 5,
1503	MCC_SOURCE_RESERVED = 6,
1504	MCC_SOURCE_DEFAULT = 7,
1505	MCC_SOURCE_UNINITIALIZED = 8,
1506	MCC_SOURCE_GET_CURRENT = 0x10
1507};
1508
1509/* DTS measurements */
1510
1511enum iwl_dts_measurement_flags {
1512	DTS_TRIGGER_CMD_FLAGS_TEMP	= BIT(0),
1513	DTS_TRIGGER_CMD_FLAGS_VOLT	= BIT(1),
1514};
1515
1516/**
1517 * iwl_dts_measurement_cmd - request DTS temperature and/or voltage measurements
1518 *
1519 * @flags: indicates which measurements we want as specified in &enum
1520 *	   iwl_dts_measurement_flags
1521 */
1522struct iwl_dts_measurement_cmd {
1523	__le32 flags;
1524} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_CMD_S */
1525
1526/**
1527* enum iwl_dts_control_measurement_mode - DTS measurement type
1528* @DTS_AUTOMATIC: Automatic mode (full SW control). Provide temperature read
1529*                 back (latest value. Not waiting for new value). Use automatic
1530*                 SW DTS configuration.
1531* @DTS_REQUEST_READ: Request DTS read. Configure DTS with manual settings,
1532*                    trigger DTS reading and provide read back temperature read
1533*                    when available.
1534* @DTS_OVER_WRITE: over-write the DTS temperatures in the SW until next read
1535* @DTS_DIRECT_WITHOUT_MEASURE: DTS returns its latest temperature result,
1536*                              without measurement trigger.
1537*/
1538enum iwl_dts_control_measurement_mode {
1539	DTS_AUTOMATIC			= 0,
1540	DTS_REQUEST_READ		= 1,
1541	DTS_OVER_WRITE			= 2,
1542	DTS_DIRECT_WITHOUT_MEASURE	= 3,
1543};
1544
1545/**
1546* enum iwl_dts_used - DTS to use or used for measurement in the DTS request
1547* @DTS_USE_TOP: Top
1548* @DTS_USE_CHAIN_A: chain A
1549* @DTS_USE_CHAIN_B: chain B
1550* @DTS_USE_CHAIN_C: chain C
1551* @XTAL_TEMPERATURE - read temperature from xtal
1552*/
1553enum iwl_dts_used {
1554	DTS_USE_TOP		= 0,
1555	DTS_USE_CHAIN_A		= 1,
1556	DTS_USE_CHAIN_B		= 2,
1557	DTS_USE_CHAIN_C		= 3,
1558	XTAL_TEMPERATURE	= 4,
1559};
1560
1561/**
1562* enum iwl_dts_bit_mode - bit-mode to use in DTS request read mode
1563* @DTS_BIT6_MODE: bit 6 mode
1564* @DTS_BIT8_MODE: bit 8 mode
1565*/
1566enum iwl_dts_bit_mode {
1567	DTS_BIT6_MODE	= 0,
1568	DTS_BIT8_MODE	= 1,
1569};
1570
1571/**
1572 * iwl_ext_dts_measurement_cmd - request extended DTS temperature measurements
1573 * @control_mode: see &enum iwl_dts_control_measurement_mode
1574 * @temperature: used when over write DTS mode is selected
1575 * @sensor: set temperature sensor to use. See &enum iwl_dts_used
1576 * @avg_factor: average factor to DTS in request DTS read mode
1577 * @bit_mode: value defines the DTS bit mode to use. See &enum iwl_dts_bit_mode
1578 * @step_duration: step duration for the DTS
1579 */
1580struct iwl_ext_dts_measurement_cmd {
1581	__le32 control_mode;
1582	__le32 temperature;
1583	__le32 sensor;
1584	__le32 avg_factor;
1585	__le32 bit_mode;
1586	__le32 step_duration;
1587} __packed; /* XVT_FW_DTS_CONTROL_MEASUREMENT_REQUEST_API_S */
1588
1589/**
1590 * iwl_dts_measurement_notif - notification received with the measurements
1591 *
1592 * @temp: the measured temperature
1593 * @voltage: the measured voltage
1594 */
1595struct iwl_dts_measurement_notif {
1596	__le32 temp;
1597	__le32 voltage;
1598} __packed; /* TEMPERATURE_MEASUREMENT_TRIGGER_NTFY_S */
1599
1600/***********************************
1601 * TDLS API
1602 ***********************************/
1603
1604/* Type of TDLS request */
1605enum iwl_tdls_channel_switch_type {
1606	TDLS_SEND_CHAN_SW_REQ = 0,
1607	TDLS_SEND_CHAN_SW_RESP_AND_MOVE_CH,
1608	TDLS_MOVE_CH,
1609}; /* TDLS_STA_CHANNEL_SWITCH_CMD_TYPE_API_E_VER_1 */
1610
1611/**
1612 * Switch timing sub-element in a TDLS channel-switch command
1613 * @frame_timestamp: GP2 timestamp of channel-switch request/response packet
1614 *	received from peer
1615 * @max_offchan_duration: What amount of microseconds out of a DTIM is given
1616 *	to the TDLS off-channel communication. For instance if the DTIM is
1617 *	200TU and the TDLS peer is to be given 25% of the time, the value
1618 *	given will be 50TU, or 50 * 1024 if translated into microseconds.
1619 * @switch_time: switch time the peer sent in its channel switch timing IE
1620 * @switch_timout: switch timeout the peer sent in its channel switch timing IE
1621 */
1622struct iwl_tdls_channel_switch_timing {
1623	__le32 frame_timestamp; /* GP2 time of peer packet Rx */
1624	__le32 max_offchan_duration; /* given in micro-seconds */
1625	__le32 switch_time; /* given in micro-seconds */
1626	__le32 switch_timeout; /* given in micro-seconds */
1627} __packed; /* TDLS_STA_CHANNEL_SWITCH_TIMING_DATA_API_S_VER_1 */
1628
1629#define IWL_TDLS_CH_SW_FRAME_MAX_SIZE 200
1630
1631/**
1632 * TDLS channel switch frame template
1633 *
1634 * A template representing a TDLS channel-switch request or response frame
1635 *
1636 * @switch_time_offset: offset to the channel switch timing IE in the template
1637 * @tx_cmd: Tx parameters for the frame
1638 * @data: frame data
1639 */
1640struct iwl_tdls_channel_switch_frame {
1641	__le32 switch_time_offset;
1642	struct iwl_tx_cmd tx_cmd;
1643	u8 data[IWL_TDLS_CH_SW_FRAME_MAX_SIZE];
1644} __packed; /* TDLS_STA_CHANNEL_SWITCH_FRAME_API_S_VER_1 */
1645
1646/**
1647 * TDLS channel switch command
1648 *
1649 * The command is sent to initiate a channel switch and also in response to
1650 * incoming TDLS channel-switch request/response packets from remote peers.
1651 *
1652 * @switch_type: see &enum iwl_tdls_channel_switch_type
1653 * @peer_sta_id: station id of TDLS peer
1654 * @ci: channel we switch to
1655 * @timing: timing related data for command
1656 * @frame: channel-switch request/response template, depending to switch_type
1657 */
1658struct iwl_tdls_channel_switch_cmd {
1659	u8 switch_type;
1660	__le32 peer_sta_id;
1661	struct iwl_fw_channel_info ci;
1662	struct iwl_tdls_channel_switch_timing timing;
1663	struct iwl_tdls_channel_switch_frame frame;
1664} __packed; /* TDLS_STA_CHANNEL_SWITCH_CMD_API_S_VER_1 */
1665
1666/**
1667 * TDLS channel switch start notification
1668 *
1669 * @status: non-zero on success
1670 * @offchannel_duration: duration given in microseconds
1671 * @sta_id: peer currently performing the channel-switch with
1672 */
1673struct iwl_tdls_channel_switch_notif {
1674	__le32 status;
1675	__le32 offchannel_duration;
1676	__le32 sta_id;
1677} __packed; /* TDLS_STA_CHANNEL_SWITCH_NTFY_API_S_VER_1 */
1678
1679/**
1680 * TDLS station info
1681 *
1682 * @sta_id: station id of the TDLS peer
1683 * @tx_to_peer_tid: TID reserved vs. the peer for FW based Tx
1684 * @tx_to_peer_ssn: initial SSN the FW should use for Tx on its TID vs the peer
1685 * @is_initiator: 1 if the peer is the TDLS link initiator, 0 otherwise
1686 */
1687struct iwl_tdls_sta_info {
1688	u8 sta_id;
1689	u8 tx_to_peer_tid;
1690	__le16 tx_to_peer_ssn;
1691	__le32 is_initiator;
1692} __packed; /* TDLS_STA_INFO_VER_1 */
1693
1694/**
1695 * TDLS basic config command
1696 *
1697 * @id_and_color: MAC id and color being configured
1698 * @tdls_peer_count: amount of currently connected TDLS peers
1699 * @tx_to_ap_tid: TID reverved vs. the AP for FW based Tx
1700 * @tx_to_ap_ssn: initial SSN the FW should use for Tx on its TID vs. the AP
1701 * @sta_info: per-station info. Only the first tdls_peer_count entries are set
1702 * @pti_req_data_offset: offset of network-level data for the PTI template
1703 * @pti_req_tx_cmd: Tx parameters for PTI request template
1704 * @pti_req_template: PTI request template data
1705 */
1706struct iwl_tdls_config_cmd {
1707	__le32 id_and_color; /* mac id and color */
1708	u8 tdls_peer_count;
1709	u8 tx_to_ap_tid;
1710	__le16 tx_to_ap_ssn;
1711	struct iwl_tdls_sta_info sta_info[IWL_MVM_TDLS_STA_COUNT];
1712
1713	__le32 pti_req_data_offset;
1714	struct iwl_tx_cmd pti_req_tx_cmd;
1715	u8 pti_req_template[0];
1716} __packed; /* TDLS_CONFIG_CMD_API_S_VER_1 */
1717
1718/**
1719 * TDLS per-station config information from FW
1720 *
1721 * @sta_id: station id of the TDLS peer
1722 * @tx_to_peer_last_seq: last sequence number used by FW during FW-based Tx to
1723 *	the peer
1724 */
1725struct iwl_tdls_config_sta_info_res {
1726	__le16 sta_id;
1727	__le16 tx_to_peer_last_seq;
1728} __packed; /* TDLS_STA_INFO_RSP_VER_1 */
1729
1730/**
1731 * TDLS config information from FW
1732 *
1733 * @tx_to_ap_last_seq: last sequence number used by FW during FW-based Tx to AP
1734 * @sta_info: per-station TDLS config information
1735 */
1736struct iwl_tdls_config_res {
1737	__le32 tx_to_ap_last_seq;
1738	struct iwl_tdls_config_sta_info_res sta_info[IWL_MVM_TDLS_STA_COUNT];
1739} __packed; /* TDLS_CONFIG_RSP_API_S_VER_1 */
1740
1741#define TX_FIFO_MAX_NUM		8
1742#define RX_FIFO_MAX_NUM		2
1743
1744/**
1745 * Shared memory configuration information from the FW
1746 *
1747 * @shared_mem_addr: shared memory addr (pre 8000 HW set to 0x0 as MARBH is not
1748 *	accessible)
1749 * @shared_mem_size: shared memory size
1750 * @sample_buff_addr: internal sample (mon/adc) buff addr (pre 8000 HW set to
1751 *	0x0 as accessible only via DBGM RDAT)
1752 * @sample_buff_size: internal sample buff size
1753 * @txfifo_addr: start addr of TXF0 (excluding the context table 0.5KB), (pre
1754 *	8000 HW set to 0x0 as not accessible)
1755 * @txfifo_size: size of TXF0 ... TXF7
1756 * @rxfifo_size: RXF1, RXF2 sizes. If there is no RXF2, it'll have a value of 0
1757 * @page_buff_addr: used by UMAC and performance debug (page miss analysis),
1758 *	when paging is not supported this should be 0
1759 * @page_buff_size: size of %page_buff_addr
1760 */
1761struct iwl_shared_mem_cfg {
1762	__le32 shared_mem_addr;
1763	__le32 shared_mem_size;
1764	__le32 sample_buff_addr;
1765	__le32 sample_buff_size;
1766	__le32 txfifo_addr;
1767	__le32 txfifo_size[TX_FIFO_MAX_NUM];
1768	__le32 rxfifo_size[RX_FIFO_MAX_NUM];
1769	__le32 page_buff_addr;
1770	__le32 page_buff_size;
1771} __packed; /* SHARED_MEM_ALLOC_API_S_VER_1 */
1772
1773#endif /* __fw_api_h__ */
1774