Searched refs:opcode (Results 1 - 200 of 1005) sorted by relevance

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/linux-4.4.14/arch/x86/mm/kmemcheck/
H A DMakefile1 obj-y := error.o kmemcheck.o opcode.o pte.o selftest.o shadow.o
H A Dopcode.c3 #include "opcode.h"
34 * This is a VERY crude opcode decoder. We only need to find the size of the
82 /* escape opcode */ kmemcheck_opcode_decode()
H A Dselftest.c4 #include "opcode.h"
47 printk(KERN_WARNING "kmemcheck: opcode %s: expected size %d, got %d\n", selftest_opcode_one()
/linux-4.4.14/arch/powerpc/include/asm/
H A Dtrace.h62 TP_PROTO(unsigned long opcode, unsigned long *args),
64 TP_ARGS(opcode, args),
67 __field(unsigned long, opcode)
71 __entry->opcode = opcode;
74 TP_printk("opcode=%lu", __entry->opcode),
81 TP_PROTO(unsigned long opcode, unsigned long retval,
84 TP_ARGS(opcode, retval, retbuf),
87 __field(unsigned long, opcode)
92 __entry->opcode = opcode;
96 TP_printk("opcode=%lu retval=%lu", __entry->opcode, __entry->retval),
108 TP_PROTO(unsigned long opcode, unsigned long *args),
110 TP_ARGS(opcode, args),
113 __field(unsigned long, opcode)
117 __entry->opcode = opcode;
120 TP_printk("opcode=%lu", __entry->opcode),
127 TP_PROTO(unsigned long opcode, unsigned long retval),
129 TP_ARGS(opcode, retval),
132 __field(unsigned long, opcode)
137 __entry->opcode = opcode;
141 TP_printk("opcode=%lu retval=%lu", __entry->opcode, __entry->retval),
H A Ddbell.h9 * provides masks and opcode images for use by code generation, emulation
18 #include <asm/ppc-opcode.h>
H A Dhvcall.h292 * @opcode: The hypervisor call to make.
298 long plpar_hcall_norets(unsigned long opcode, ...);
302 * @opcode: The hypervisor call to make.
311 long plpar_hcall(unsigned long opcode, unsigned long *retbuf, ...);
315 * @opcode: The hypervisor call to make.
325 long plpar_hcall_raw(unsigned long opcode, unsigned long *retbuf, ...);
329 * @opcode: The hypervisor call to make.
336 long plpar_hcall9(unsigned long opcode, unsigned long *retbuf, ...);
337 long plpar_hcall9_raw(unsigned long opcode, unsigned long *retbuf, ...);
/linux-4.4.14/include/trace/events/
H A Dspmi.h15 TP_PROTO(u8 opcode, u8 sid, u16 addr, u8 len, const u8 *buf),
16 TP_ARGS(opcode, sid, addr, len, buf),
19 __field ( u8, opcode )
27 __entry->opcode = opcode;
35 (int)__entry->opcode, (int)__entry->sid,
41 TP_PROTO(u8 opcode, u8 sid, u16 addr, int ret),
42 TP_ARGS(opcode, sid, addr, ret),
45 __field ( u8, opcode )
52 __entry->opcode = opcode;
59 (int)__entry->opcode, (int)__entry->sid,
64 TP_PROTO(u8 opcode, u8 sid, u16 addr),
65 TP_ARGS(opcode, sid, addr),
68 __field ( u8, opcode )
74 __entry->opcode = opcode;
80 (int)__entry->opcode, (int)__entry->sid,
85 TP_PROTO(u8 opcode, u8 sid, u16 addr, int ret, u8 len, const u8 *buf),
86 TP_ARGS(opcode, sid, addr, ret, len, buf),
89 __field ( u8, opcode )
98 __entry->opcode = opcode;
107 (int)__entry->opcode, (int)__entry->sid,
113 TP_PROTO(u8 opcode, u8 sid, int ret),
114 TP_ARGS(opcode, sid, ret),
117 __field ( u8, opcode )
123 __entry->opcode = opcode;
128 TP_printk("opc=%d sid=%02d ret=%d", (int)__entry->opcode,
H A Dtarget.h14 #define scsi_opcode_name(opcode) { opcode, #opcode }
139 __field( unsigned int, opcode )
148 __entry->opcode = cmd->t_task_cdb[0];
157 show_opcode_name(__entry->opcode),
174 __field( unsigned int, opcode )
186 __entry->opcode = cmd->t_task_cdb[0];
202 show_opcode_name(__entry->opcode),
H A Dscsi.h12 #define scsi_opcode_name(opcode) { opcode, #opcode }
212 __field( unsigned int, opcode )
225 __entry->opcode = cmd->cmnd[0];
238 show_opcode_name(__entry->opcode),
255 __field( unsigned int, opcode )
269 __entry->opcode = cmd->cmnd[0];
282 show_opcode_name(__entry->opcode),
300 __field( unsigned int, opcode )
314 __entry->opcode = cmd->cmnd[0];
328 show_opcode_name(__entry->opcode),
/linux-4.4.14/arch/c6x/kernel/
H A Dmodule.c19 u32 opcode; fixup_pcr() local
26 opcode = *ip; fixup_pcr()
27 opcode &= ~(mask << shift); fixup_pcr()
28 opcode |= ((delta & mask) << shift); fixup_pcr()
29 *ip = opcode; fixup_pcr()
31 pr_debug("REL PCR_S%d[%p] dest[%p] opcode[%08x]\n", fixup_pcr()
32 maskbits, ip, (void *)dest, opcode); fixup_pcr()
53 u32 *location, opcode; apply_relocate_add() local
88 opcode = *location; apply_relocate_add()
89 opcode &= ~0x7fff80; apply_relocate_add()
90 opcode |= ((v & 0xffff) << 7); apply_relocate_add()
91 pr_debug("RELA ABS_L16[%p] v[0x%x] opcode[0x%x]\n", apply_relocate_add()
92 location, v, opcode); apply_relocate_add()
93 *location = opcode; apply_relocate_add()
96 opcode = *location; apply_relocate_add()
97 opcode &= ~0x7fff80; apply_relocate_add()
98 opcode |= ((v >> 9) & 0x7fff80); apply_relocate_add()
99 pr_debug("RELA ABS_H16[%p] v[0x%x] opcode[0x%x]\n", apply_relocate_add()
100 location, v, opcode); apply_relocate_add()
101 *location = opcode; apply_relocate_add()
/linux-4.4.14/arch/arm/nwfpe/
H A Dfpa11_cpdt.c224 unsigned int PerformLDF(const unsigned int opcode) PerformLDF() argument
227 unsigned int nRc = 1, write_back = WRITE_BACK(opcode); PerformLDF()
229 pBase = (unsigned int __user *) readRegister(getRn(opcode)); PerformLDF()
230 if (REG_PC == getRn(opcode)) { PerformLDF()
236 if (BIT_UP_SET(opcode)) PerformLDF()
237 pFinal += getOffset(opcode); PerformLDF()
239 pFinal -= getOffset(opcode); PerformLDF()
241 if (PREINDEXED(opcode)) PerformLDF()
246 switch (opcode & MASK_TRANSFER_LENGTH) { PerformLDF()
248 loadSingle(getFd(opcode), pAddress); PerformLDF()
251 loadDouble(getFd(opcode), pAddress); PerformLDF()
255 loadExtended(getFd(opcode), pAddress); PerformLDF()
263 writeRegister(getRn(opcode), (unsigned long) pFinal); PerformLDF()
267 unsigned int PerformSTF(const unsigned int opcode) PerformSTF() argument
270 unsigned int nRc = 1, write_back = WRITE_BACK(opcode); PerformSTF()
273 roundData.mode = SetRoundingMode(opcode); PerformSTF()
274 roundData.precision = SetRoundingPrecision(opcode); PerformSTF()
277 pBase = (unsigned int __user *) readRegister(getRn(opcode)); PerformSTF()
278 if (REG_PC == getRn(opcode)) { PerformSTF()
284 if (BIT_UP_SET(opcode)) PerformSTF()
285 pFinal += getOffset(opcode); PerformSTF()
287 pFinal -= getOffset(opcode); PerformSTF()
289 if (PREINDEXED(opcode)) PerformSTF()
294 switch (opcode & MASK_TRANSFER_LENGTH) { PerformSTF()
296 storeSingle(&roundData, getFd(opcode), pAddress); PerformSTF()
299 storeDouble(&roundData, getFd(opcode), pAddress); PerformSTF()
303 storeExtended(getFd(opcode), pAddress); PerformSTF()
314 writeRegister(getRn(opcode), (unsigned long) pFinal); PerformSTF()
318 unsigned int PerformLFM(const unsigned int opcode) PerformLFM() argument
321 unsigned int i, Fd, write_back = WRITE_BACK(opcode); PerformLFM()
323 pBase = (unsigned int __user *) readRegister(getRn(opcode)); PerformLFM()
324 if (REG_PC == getRn(opcode)) { PerformLFM()
330 if (BIT_UP_SET(opcode)) PerformLFM()
331 pFinal += getOffset(opcode); PerformLFM()
333 pFinal -= getOffset(opcode); PerformLFM()
335 if (PREINDEXED(opcode)) PerformLFM()
340 Fd = getFd(opcode); PerformLFM()
341 for (i = getRegisterCount(opcode); i > 0; i--) { PerformLFM()
350 writeRegister(getRn(opcode), (unsigned long) pFinal); PerformLFM()
354 unsigned int PerformSFM(const unsigned int opcode) PerformSFM() argument
357 unsigned int i, Fd, write_back = WRITE_BACK(opcode); PerformSFM()
359 pBase = (unsigned int __user *) readRegister(getRn(opcode)); PerformSFM()
360 if (REG_PC == getRn(opcode)) { PerformSFM()
366 if (BIT_UP_SET(opcode)) PerformSFM()
367 pFinal += getOffset(opcode); PerformSFM()
369 pFinal -= getOffset(opcode); PerformSFM()
371 if (PREINDEXED(opcode)) PerformSFM()
376 Fd = getFd(opcode); PerformSFM()
377 for (i = getRegisterCount(opcode); i > 0; i--) { PerformSFM()
386 writeRegister(getRn(opcode), (unsigned long) pFinal); PerformSFM()
390 unsigned int EmulateCPDT(const unsigned int opcode) EmulateCPDT() argument
394 if (LDF_OP(opcode)) { EmulateCPDT()
395 nRc = PerformLDF(opcode); EmulateCPDT()
396 } else if (LFM_OP(opcode)) { EmulateCPDT()
397 nRc = PerformLFM(opcode); EmulateCPDT()
398 } else if (STF_OP(opcode)) { EmulateCPDT()
399 nRc = PerformSTF(opcode); EmulateCPDT()
400 } else if (SFM_OP(opcode)) { EmulateCPDT()
401 nRc = PerformSFM(opcode); EmulateCPDT()
H A Dfpopcode.h69 abcd arithmetic opcode (TABLES 3 & 4)
191 #define MASK_CPDT 0x0c000000 /* data processing opcode */
203 /* Get the coprocessor number from the opcode. */
204 #define getCoprocessorNumber(opcode) ((opcode & MASK_COPROCESSOR) >> 8)
206 /* Get the offset from the opcode. */
207 #define getOffset(opcode) (opcode & MASK_OFFSET)
210 #define TEST_OPCODE(opcode,mask) (((opcode) & (mask)) == (mask))
212 #define LOAD_OP(opcode) TEST_OPCODE((opcode),MASK_CPDT | BIT_LOAD)
213 #define STORE_OP(opcode) ((opcode & (MASK_CPDT | BIT_LOAD)) == MASK_CPDT)
215 #define LDF_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 1))
216 #define LFM_OP(opcode) (LOAD_OP(opcode) && (getCoprocessorNumber(opcode) == 2))
217 #define STF_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 1))
218 #define SFM_OP(opcode) (STORE_OP(opcode) && (getCoprocessorNumber(opcode) == 2))
220 #define PREINDEXED(opcode) ((opcode & BIT_PREINDEX) != 0)
221 #define POSTINDEXED(opcode) ((opcode & BIT_PREINDEX) == 0)
222 #define BIT_UP_SET(opcode) ((opcode & BIT_UP) != 0)
223 #define BIT_UP_CLEAR(opcode) ((opcode & BIT_DOWN) == 0)
224 #define WRITE_BACK(opcode) ((opcode & BIT_WRITE_BACK) != 0)
225 #define LOAD(opcode) ((opcode & BIT_LOAD) != 0)
226 #define STORE(opcode) ((opcode & BIT_LOAD) == 0)
237 #define CONSTANT_FM(opcode) ((opcode & BIT_CONSTANT) != 0)
238 #define MONADIC_INSTRUCTION(opcode) ((opcode & BIT_MONADIC) != 0)
241 #define MASK_CPDO 0x0e000000 /* arithmetic opcode */
259 /* 0x00d00000 is an invalid dyadic arithmetic opcode */
260 /* 0x00e00000 is an invalid dyadic arithmetic opcode */
261 /* 0x00f00000 is an invalid dyadic arithmetic opcode */
287 #define MASK_CPRT 0x0e000010 /* register transfer opcode */
350 /* Get the condition code from the opcode. */
351 #define getCondition(opcode) (opcode >> 28)
353 /* Get the source register from the opcode. */
354 #define getRn(opcode) ((opcode & MASK_Rn) >> 16)
356 /* Get the destination floating point register from the opcode. */
357 #define getFd(opcode) ((opcode & MASK_Fd) >> 12)
359 /* Get the first source floating point register from the opcode. */
360 #define getFn(opcode) ((opcode & MASK_Fn) >> 16)
362 /* Get the second source floating point register from the opcode. */
363 #define getFm(opcode) (opcode & MASK_Fm)
365 /* Get the destination register from the opcode. */
366 #define getRd(opcode) ((opcode & MASK_Rd) >> 12)
368 /* Get the rounding mode from the opcode. */
369 #define getRoundingMode(opcode) ((opcode & MASK_ROUNDING_MODE) >> 5)
391 static inline unsigned int getTransferLength(const unsigned int opcode) getTransferLength() argument
395 switch (opcode & MASK_TRANSFER_LENGTH) { getTransferLength()
412 static inline unsigned int getRegisterCount(const unsigned int opcode) getRegisterCount() argument
416 switch (opcode & MASK_REGISTER_COUNT) { getRegisterCount()
436 static inline unsigned int getRoundingPrecision(const unsigned int opcode) getRoundingPrecision() argument
440 switch (opcode & MASK_ROUNDING_PRECISION) { getRoundingPrecision()
457 static inline unsigned int getDestinationSize(const unsigned int opcode) getDestinationSize() argument
461 switch (opcode & MASK_DESTINATION_SIZE) { getDestinationSize()
H A Dfpa11.c47 int8 SetRoundingMode(const unsigned int opcode) SetRoundingMode() argument
49 switch (opcode & MASK_ROUNDING_MODE) { SetRoundingMode()
65 int8 SetRoundingPrecision(const unsigned int opcode) SetRoundingPrecision() argument
68 switch (opcode & MASK_ROUNDING_PRECISION) { SetRoundingPrecision()
96 /* Emulate the instruction in the opcode. */ EmulateAll()
97 unsigned int EmulateAll(unsigned int opcode) EmulateAll() argument
102 printk("NWFPE: emulating opcode %08x\n", opcode); EmulateAll()
104 code = opcode & 0x00000f00; EmulateAll()
107 code = opcode & 0x0e000000; EmulateAll()
109 if (opcode & 0x00000010) { EmulateAll()
113 return EmulateCPRT(opcode); EmulateAll()
117 return EmulateCPDO(opcode); EmulateAll()
122 return EmulateCPDT(opcode); EmulateAll()
H A Dfpa11_cprt.c30 unsigned int PerformFLT(const unsigned int opcode);
31 unsigned int PerformFIX(const unsigned int opcode);
33 static unsigned int PerformComparison(const unsigned int opcode);
35 unsigned int EmulateCPRT(const unsigned int opcode) EmulateCPRT() argument
38 if (opcode & 0x800000) { EmulateCPRT()
43 return PerformComparison(opcode); EmulateCPRT()
47 switch ((opcode & 0x700000) >> 20) { EmulateCPRT()
49 return PerformFLT(opcode); EmulateCPRT()
52 return PerformFIX(opcode); EmulateCPRT()
56 writeFPSR(readRegister(getRd(opcode))); EmulateCPRT()
59 writeRegister(getRd(opcode), readFPSR()); EmulateCPRT()
69 unsigned int PerformFLT(const unsigned int opcode) PerformFLT() argument
74 roundData.mode = SetRoundingMode(opcode); PerformFLT()
75 roundData.precision = SetRoundingPrecision(opcode); PerformFLT()
78 switch (opcode & MASK_ROUNDING_PRECISION) { PerformFLT()
81 fpa11->fType[getFn(opcode)] = typeSingle; PerformFLT()
82 fpa11->fpreg[getFn(opcode)].fSingle = int32_to_float32(&roundData, readRegister(getRd(opcode))); PerformFLT()
88 fpa11->fType[getFn(opcode)] = typeDouble; PerformFLT()
89 fpa11->fpreg[getFn(opcode)].fDouble = int32_to_float64(readRegister(getRd(opcode))); PerformFLT()
96 fpa11->fType[getFn(opcode)] = typeExtended; PerformFLT()
97 fpa11->fpreg[getFn(opcode)].fExtended = int32_to_floatx80(readRegister(getRd(opcode))); PerformFLT()
112 unsigned int PerformFIX(const unsigned int opcode) PerformFIX() argument
115 unsigned int Fn = getFm(opcode); PerformFIX()
118 roundData.mode = SetRoundingMode(opcode); PerformFIX()
119 roundData.precision = SetRoundingPrecision(opcode); PerformFIX()
125 writeRegister(getRd(opcode), float32_to_int32(&roundData, fpa11->fpreg[Fn].fSingle)); PerformFIX()
131 writeRegister(getRd(opcode), float64_to_int32(&roundData, fpa11->fpreg[Fn].fDouble)); PerformFIX()
138 writeRegister(getRd(opcode), floatx80_to_int32(&roundData, fpa11->fpreg[Fn].fExtended)); PerformFIX()
154 static unsigned int PerformComparison(const unsigned int opcode) PerformComparison() argument
157 unsigned int Fn = getFn(opcode), Fm = getFm(opcode); PerformComparison()
158 int e_flag = opcode & 0x400000; /* 1 if CxFE */ PerformComparison()
159 int n_flag = opcode & 0x200000; /* 1 if CNxx */ PerformComparison()
196 if (CONSTANT_FM(opcode)) { PerformComparison()
246 if (CONSTANT_FM(opcode)) { PerformComparison()
H A Dfpa11_cpdo.c26 unsigned int SingleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd);
27 unsigned int DoubleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd);
28 unsigned int ExtendedCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd);
30 unsigned int EmulateCPDO(const unsigned int opcode) EmulateCPDO() argument
39 nDest = getDestinationSize(opcode); EmulateCPDO()
43 roundData.mode = SetRoundingMode(opcode); EmulateCPDO()
44 roundData.precision = SetRoundingPrecision(opcode); EmulateCPDO()
52 if (MONADIC_INSTRUCTION(opcode)) EmulateCPDO()
55 nType = fpa11->fType[getFn(opcode)]; EmulateCPDO()
57 if (!CONSTANT_FM(opcode)) { EmulateCPDO()
58 register unsigned int Fm = getFm(opcode); EmulateCPDO()
64 rFd = &fpa11->fpreg[getFd(opcode)]; EmulateCPDO()
68 nRc = SingleCPDO(&roundData, opcode, rFd); EmulateCPDO()
71 nRc = DoubleCPDO(&roundData, opcode, rFd); EmulateCPDO()
75 nRc = ExtendedCPDO(&roundData, opcode, rFd); EmulateCPDO()
90 fpa11->fType[getFd(opcode)] = nDest; EmulateCPDO()
H A Dfpa11.h97 extern unsigned int EmulateAll(unsigned int opcode);
99 extern unsigned int EmulateCPDT(const unsigned int opcode);
100 extern unsigned int EmulateCPDO(const unsigned int opcode);
101 extern unsigned int EmulateCPRT(const unsigned int opcode);
104 extern unsigned int PerformLDF(const unsigned int opcode);
105 extern unsigned int PerformSTF(const unsigned int opcode);
106 extern unsigned int PerformLFM(const unsigned int opcode);
107 extern unsigned int PerformSFM(const unsigned int opcode);
112 const unsigned int opcode, FPREG * rFd);
115 const unsigned int opcode, FPREG * rFd);
119 const unsigned int opcode, FPREG * rFd);
H A Ddouble_cpdo.c111 unsigned int DoubleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd) DoubleCPDO() argument
117 Fm = getFm(opcode); DoubleCPDO()
118 if (CONSTANT_FM(opcode)) { DoubleCPDO()
135 opc_mask_shift = (opcode & MASK_ARITHMETIC_OPCODE) >> 20; DoubleCPDO()
136 if (!MONADIC_INSTRUCTION(opcode)) { DoubleCPDO()
137 unsigned int Fn = getFn(opcode); DoubleCPDO()
H A Dextended_cpdo.c90 unsigned int ExtendedCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd) ExtendedCPDO() argument
96 Fm = getFm(opcode); ExtendedCPDO()
97 if (CONSTANT_FM(opcode)) { ExtendedCPDO()
118 opc_mask_shift = (opcode & MASK_ARITHMETIC_OPCODE) >> 20; ExtendedCPDO()
119 if (!MONADIC_INSTRUCTION(opcode)) { ExtendedCPDO()
120 unsigned int Fn = getFn(opcode); ExtendedCPDO()
H A Dsingle_cpdo.c88 unsigned int SingleCPDO(struct roundingData *roundData, const unsigned int opcode, FPREG * rFd) SingleCPDO() argument
94 Fm = getFm(opcode); SingleCPDO()
95 if (CONSTANT_FM(opcode)) { SingleCPDO()
103 opc_mask_shift = (opcode & MASK_ARITHMETIC_OPCODE) >> 20; SingleCPDO()
104 if (!MONADIC_INSTRUCTION(opcode)) { SingleCPDO()
105 unsigned int Fn = getFn(opcode); SingleCPDO()
/linux-4.4.14/arch/blackfin/include/asm/
H A Dpseudo_instructions.h15 extern bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode);
16 extern bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode);
H A Dbug.h13 * This can be any undefined 16-bit opcode, meaning
14 * ((opcode & 0xc000) != 0xc000)
/linux-4.4.14/arch/x86/mm/
H A Dpf_in.c119 static int get_opcode(unsigned char *addr, unsigned int *opcode) get_opcode() argument
125 *opcode = *(unsigned short *)addr; get_opcode()
128 *opcode = *addr; get_opcode()
135 #define CHECK_OP_TYPE(opcode, array, type) \
137 if (array[i] == opcode) { \
145 unsigned int opcode; get_ins_type() local
153 p += get_opcode(p, &opcode); get_ins_type()
155 CHECK_OP_TYPE(opcode, reg_rop, REG_READ); get_ins_type()
156 CHECK_OP_TYPE(opcode, reg_wop, REG_WRITE); get_ins_type()
157 CHECK_OP_TYPE(opcode, imm_wop, IMM_WRITE); get_ins_type()
166 unsigned int opcode; get_ins_reg_width() local
173 p += get_opcode(p, &opcode); get_ins_reg_width()
176 if (rw8[i] == opcode) get_ins_reg_width()
180 if (rw32[i] == opcode) get_ins_reg_width()
183 printk(KERN_ERR "mmiotrace: Unknown opcode 0x%02x\n", opcode); get_ins_reg_width()
189 unsigned int opcode; get_ins_mem_width() local
196 p += get_opcode(p, &opcode); get_ins_mem_width()
199 if (mw8[i] == opcode) get_ins_mem_width()
203 if (mw16[i] == opcode) get_ins_mem_width()
207 if (mw32[i] == opcode) get_ins_mem_width()
211 if (mw64[i] == opcode) get_ins_mem_width()
214 printk(KERN_ERR "mmiotrace: Unknown opcode 0x%02x\n", opcode); get_ins_mem_width()
412 unsigned int opcode; get_ins_reg_val() local
420 p += get_opcode(p, &opcode); get_ins_reg_val()
422 if (reg_rop[i] == opcode) get_ins_reg_val()
426 if (reg_wop[i] == opcode) get_ins_reg_val()
429 printk(KERN_ERR "mmiotrace: Not a register instruction, opcode " get_ins_reg_val()
430 "0x%02x\n", opcode); get_ins_reg_val()
435 if (opcode == 0xAA || opcode == 0xAB) { get_ins_reg_val()
466 unsigned int opcode; get_ins_imm_val() local
475 p += get_opcode(p, &opcode); get_ins_imm_val()
477 if (imm_wop[i] == opcode) get_ins_imm_val()
480 printk(KERN_ERR "mmiotrace: Not an immediate instruction, opcode " get_ins_imm_val()
481 "0x%02x\n", opcode); get_ins_imm_val()
H A Dmmio-mod.c182 my_trace->opcode = MMIO_READ; pre()
186 my_trace->opcode = MMIO_WRITE; pre()
191 my_trace->opcode = MMIO_WRITE; pre()
198 my_trace->opcode = MMIO_UNKNOWN_OP; pre()
244 .opcode = MMIO_PROBE ioremap_trace_core()
299 .opcode = MMIO_UNPROBE iounmap_trace_core()
/linux-4.4.14/net/bluetooth/
H A Dmgmt_util.c41 hdr->opcode = cpu_to_le16(event); mgmt_send_event()
75 hdr->opcode = cpu_to_le16(MGMT_EV_CMD_STATUS); mgmt_cmd_status()
81 ev->opcode = cpu_to_le16(cmd); mgmt_cmd_status()
106 hdr->opcode = cpu_to_le16(MGMT_EV_CMD_COMPLETE); mgmt_cmd_complete()
111 ev->opcode = cpu_to_le16(cmd); mgmt_cmd_complete()
124 struct mgmt_pending_cmd *mgmt_pending_find(unsigned short channel, u16 opcode, mgmt_pending_find() argument
132 if (cmd->opcode == opcode) mgmt_pending_find()
140 u16 opcode, mgmt_pending_find_data()
149 if (cmd->opcode == opcode) mgmt_pending_find_data()
156 void mgmt_pending_foreach(u16 opcode, struct hci_dev *hdev, mgmt_pending_foreach() argument
163 if (opcode > 0 && cmd->opcode != opcode) mgmt_pending_foreach()
170 struct mgmt_pending_cmd *mgmt_pending_add(struct sock *sk, u16 opcode, mgmt_pending_add() argument
180 cmd->opcode = opcode; mgmt_pending_add()
139 mgmt_pending_find_data(unsigned short channel, u16 opcode, struct hci_dev *hdev, const void *data) mgmt_pending_find_data() argument
H A Dmgmt_util.h25 u16 opcode; member in struct:mgmt_pending_cmd
40 struct mgmt_pending_cmd *mgmt_pending_find(unsigned short channel, u16 opcode,
43 u16 opcode,
46 void mgmt_pending_foreach(u16 opcode, struct hci_dev *hdev,
49 struct mgmt_pending_cmd *mgmt_pending_add(struct sock *sk, u16 opcode,
H A Dhci_request.h36 void hci_req_add(struct hci_request *req, u16 opcode, u32 plen,
38 void hci_req_add_ev(struct hci_request *req, u16 opcode, u32 plen,
40 void hci_req_cmd_complete(struct hci_dev *hdev, u16 opcode, u8 status,
44 struct sk_buff *hci_prepare_cmd(struct hci_dev *hdev, u16 opcode, u32 plen,
H A Dhci_sock.c137 /* Check filter only when opcode is set */ is_filtered_packet()
138 if (!flt->opcode) is_filtered_packet()
142 flt->opcode != get_unaligned((__le16 *)(skb->data + 3))) is_filtered_packet()
146 flt->opcode != get_unaligned((__le16 *)(skb->data + 4))) is_filtered_packet()
258 __le16 opcode; hci_send_to_monitor() local
267 opcode = cpu_to_le16(HCI_MON_COMMAND_PKT); hci_send_to_monitor()
270 opcode = cpu_to_le16(HCI_MON_EVENT_PKT); hci_send_to_monitor()
274 opcode = cpu_to_le16(HCI_MON_ACL_RX_PKT); hci_send_to_monitor()
276 opcode = cpu_to_le16(HCI_MON_ACL_TX_PKT); hci_send_to_monitor()
280 opcode = cpu_to_le16(HCI_MON_SCO_RX_PKT); hci_send_to_monitor()
282 opcode = cpu_to_le16(HCI_MON_SCO_TX_PKT); hci_send_to_monitor()
285 opcode = cpu_to_le16(HCI_MON_VENDOR_DIAG); hci_send_to_monitor()
298 hdr->opcode = opcode; hci_send_to_monitor()
313 __le16 opcode; create_monitor_event() local
327 opcode = cpu_to_le16(HCI_MON_NEW_INDEX); create_monitor_event()
335 opcode = cpu_to_le16(HCI_MON_DEL_INDEX); create_monitor_event()
353 opcode = cpu_to_le16(HCI_MON_INDEX_INFO); create_monitor_event()
361 opcode = cpu_to_le16(HCI_MON_OPEN_INDEX); create_monitor_event()
369 opcode = cpu_to_le16(HCI_MON_CLOSE_INDEX); create_monitor_event()
379 hdr->opcode = opcode; create_monitor_event()
1048 u16 opcode, index, len; hci_mgmt_cmd() local
1069 opcode = __le16_to_cpu(hdr->opcode); hci_mgmt_cmd()
1078 if (opcode >= chan->handler_count || hci_mgmt_cmd()
1079 chan->handlers[opcode].func == NULL) { hci_mgmt_cmd()
1080 BT_DBG("Unknown op %u", opcode); hci_mgmt_cmd()
1081 err = mgmt_cmd_status(sk, index, opcode, hci_mgmt_cmd()
1086 handler = &chan->handlers[opcode]; hci_mgmt_cmd()
1090 err = mgmt_cmd_status(sk, index, opcode, hci_mgmt_cmd()
1098 err = mgmt_cmd_status(sk, index, opcode, hci_mgmt_cmd()
1106 err = mgmt_cmd_status(sk, index, opcode, hci_mgmt_cmd()
1113 err = mgmt_cmd_status(sk, index, opcode, hci_mgmt_cmd()
1121 err = mgmt_cmd_status(sk, index, opcode, hci_mgmt_cmd()
1129 err = mgmt_cmd_status(sk, index, opcode, hci_mgmt_cmd()
1233 u16 opcode = get_unaligned_le16(skb->data); hci_sock_sendmsg() local
1234 u16 ogf = hci_opcode_ogf(opcode); hci_sock_sendmsg()
1235 u16 ocf = hci_opcode_ocf(opcode); hci_sock_sendmsg()
1287 struct hci_ufilter uf = { .opcode = 0 }; hci_sock_setsockopt()
1330 uf.opcode = f->opcode; hci_sock_setsockopt()
1351 f->opcode = uf.opcode; hci_sock_setsockopt()
1413 uf.opcode = f->opcode; hci_sock_getsockopt()
H A Dhci_request.c81 struct sk_buff *hci_prepare_cmd(struct hci_dev *hdev, u16 opcode, u32 plen, hci_prepare_cmd() argument
93 hdr->opcode = cpu_to_le16(opcode); hci_prepare_cmd()
102 bt_cb(skb)->hci.opcode = opcode; hci_prepare_cmd()
108 void hci_req_add_ev(struct hci_request *req, u16 opcode, u32 plen, hci_req_add_ev() argument
114 BT_DBG("%s opcode 0x%4.4x plen %d", hdev->name, opcode, plen); hci_req_add_ev()
122 skb = hci_prepare_cmd(hdev, opcode, plen, param); hci_req_add_ev()
124 BT_ERR("%s no memory for command (opcode 0x%4.4x)", hci_req_add_ev()
125 hdev->name, opcode); hci_req_add_ev()
138 void hci_req_add(struct hci_request *req, u16 opcode, u32 plen, hci_req_add() argument
141 hci_req_add_ev(req, opcode, plen, param, 0); hci_req_add()
555 u16 opcode) update_background_scan_complete()
645 static void abort_conn_complete(struct hci_dev *hdev, u8 status, u16 opcode) abort_conn_complete() argument
554 update_background_scan_complete(struct hci_dev *hdev, u8 status, u16 opcode) update_background_scan_complete() argument
/linux-4.4.14/arch/x86/lib/
H A Dinat.c23 /* Attribute tables are generated from opcode map */
27 insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode) inat_get_opcode_attribute() argument
29 return inat_primary_table[opcode]; inat_get_opcode_attribute()
40 insn_attr_t inat_get_escape_attribute(insn_byte_t opcode, int lpfx_id, inat_get_escape_attribute() argument
51 if (inat_has_variant(table[opcode]) && lpfx_id) { inat_get_escape_attribute()
56 return table[opcode]; inat_get_escape_attribute()
79 insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, insn_byte_t vex_m, inat_get_avx_attribute() argument
89 if (!inat_is_group(table[opcode]) && vex_p) { inat_get_avx_attribute()
95 return table[opcode]; inat_get_avx_attribute()
H A Dinsn.c79 * to point to the (first) opcode. No effect if @insn->prefixes.got
194 * insn_get_opcode - collect opcode(s)
197 * Populates @insn->opcode, updates @insn->next_byte to point past the
198 * opcode byte(s), and set @insn->attr (except for groups).
200 * Sets @insn->opcode.value = opcode1. No effect if @insn->opcode.got
205 struct insn_field *opcode = &insn->opcode; insn_get_opcode() local
208 if (opcode->got) insn_get_opcode()
213 /* Get first opcode */ insn_get_opcode()
215 opcode->bytes[0] = op; insn_get_opcode()
216 opcode->nbytes = 1; insn_get_opcode()
226 goto end; /* VEX has only 1 byte for opcode */ insn_get_opcode()
231 /* Get escaped opcode */ insn_get_opcode()
233 opcode->bytes[opcode->nbytes++] = op; insn_get_opcode()
240 opcode->got = 1; insn_get_opcode()
252 * (prefixes and opcode(s)). No effect if @insn->modrm.got is already 1.
260 if (!insn->opcode.got) insn_get_modrm()
H A DMakefile6 inat_tables_maps = $(srctree)/arch/x86/lib/x86-opcode-map.txt
/linux-4.4.14/tools/perf/util/intel-pt-decoder/
H A Dinat.c23 /* Attribute tables are generated from opcode map */
27 insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode) inat_get_opcode_attribute() argument
29 return inat_primary_table[opcode]; inat_get_opcode_attribute()
40 insn_attr_t inat_get_escape_attribute(insn_byte_t opcode, int lpfx_id, inat_get_escape_attribute() argument
51 if (inat_has_variant(table[opcode]) && lpfx_id) { inat_get_escape_attribute()
56 return table[opcode]; inat_get_escape_attribute()
79 insn_attr_t inat_get_avx_attribute(insn_byte_t opcode, insn_byte_t vex_m, inat_get_avx_attribute() argument
89 if (!inat_is_group(table[opcode]) && vex_p) { inat_get_avx_attribute()
95 return table[opcode]; inat_get_avx_attribute()
H A Dgen-insn-attr-x86.awk5 # Usage: awk -f gen-insn-attr-x86.awk x86-opcode-map.txt > inat-tables.c
36 print "/* x86 opcode map generated from x86-opcode-map.txt */"
126 # escape opcode table
137 # AVX/escape opcode table
141 if (tname == "") # AVX only opcode table
144 if (aid == -1 && eid == -1) # primary opcode table
264 # check if escaped opcode
283 opcode = $(i++)
288 # parse one opcode
301 # check if group opcode
302 if (match(opcode, group_expr)) {
303 if (!(opcode in group)) {
304 group[opcode] = ggid
307 flags = add_flags(flags, "INAT_MAKE_GROUP(" group[opcode] ")")
314 if (match(opcode, rex_expr))
318 if (match(opcode, fpu_expr))
324 else if (match(ext, vexok_expr) || match(opcode, vexok_opcode_expr))
329 if (!prefix_num[opcode])
330 semantic_error("Unknown prefix: " opcode)
331 flags = add_flags(flags, "INAT_MAKE_PREFIX(" prefix_num[opcode] ")")
359 # print escape opcode map's array
360 print "/* Escape opcode map array */"
368 # print group opcode map's array
369 print "/* Group opcode map array */"
377 # print AVX opcode map's array
378 print "/* AVX opcode map array */"
H A Dinsn.c79 * to point to the (first) opcode. No effect if @insn->prefixes.got
194 * insn_get_opcode - collect opcode(s)
197 * Populates @insn->opcode, updates @insn->next_byte to point past the
198 * opcode byte(s), and set @insn->attr (except for groups).
200 * Sets @insn->opcode.value = opcode1. No effect if @insn->opcode.got
205 struct insn_field *opcode = &insn->opcode; insn_get_opcode() local
208 if (opcode->got) insn_get_opcode()
213 /* Get first opcode */ insn_get_opcode()
215 opcode->bytes[0] = op; insn_get_opcode()
216 opcode->nbytes = 1; insn_get_opcode()
226 goto end; /* VEX has only 1 byte for opcode */ insn_get_opcode()
231 /* Get escaped opcode */ insn_get_opcode()
233 opcode->bytes[opcode->nbytes++] = op; insn_get_opcode()
240 opcode->got = 1; insn_get_opcode()
252 * (prefixes and opcode(s)). No effect if @insn->modrm.got is already 1.
260 if (!insn->opcode.got) insn_get_modrm()
H A Dinsn.h43 struct insn_field opcode; /* member in struct:insn
44 * opcode.bytes[0]: opcode1
45 * opcode.bytes[1]: opcode2
46 * opcode.bytes[2]: opcode3
109 /* Attribute will be determined after getting ModRM (for opcode groups) */ insn_get_attribute()
139 return insn->opcode.got && insn->modrm.got && insn->sib.got && insn_complete()
186 return insn_offset_opcode(insn) + insn->opcode.nbytes; insn_offset_modrm()
H A Dinat.h99 extern insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode);
101 extern insn_attr_t inat_get_escape_attribute(insn_byte_t opcode,
107 extern insn_attr_t inat_get_avx_attribute(insn_byte_t opcode,
/linux-4.4.14/arch/x86/include/asm/
H A Diosf_mbi.h82 * @opcode: port specific read or write opcode
89 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr);
94 * @opcode: port specific read or write opcode
101 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr);
106 * @opcode: port specific read or write opcode
114 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask);
124 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) iosf_mbi_read() argument
131 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr) iosf_mbi_write() argument
138 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask) iosf_mbi_modify() argument
H A Dinsn.h43 struct insn_field opcode; /* member in struct:insn
44 * opcode.bytes[0]: opcode1
45 * opcode.bytes[1]: opcode2
46 * opcode.bytes[2]: opcode3
109 /* Attribute will be determined after getting ModRM (for opcode groups) */ insn_get_attribute()
139 return insn->opcode.got && insn->modrm.got && insn->sib.got && insn_complete()
186 return insn_offset_opcode(insn) + insn->opcode.nbytes; insn_offset_modrm()
H A Dinat.h99 extern insn_attr_t inat_get_opcode_attribute(insn_byte_t opcode);
101 extern insn_attr_t inat_get_escape_attribute(insn_byte_t opcode,
107 extern insn_attr_t inat_get_avx_attribute(insn_byte_t opcode,
/linux-4.4.14/arch/x86/tools/
H A Dgen-insn-attr-x86.awk5 # Usage: awk -f gen-insn-attr-x86.awk x86-opcode-map.txt > inat-tables.c
36 print "/* x86 opcode map generated from x86-opcode-map.txt */"
126 # escape opcode table
137 # AVX/escape opcode table
141 if (tname == "") # AVX only opcode table
144 if (aid == -1 && eid == -1) # primary opcode table
264 # check if escaped opcode
283 opcode = $(i++)
288 # parse one opcode
301 # check if group opcode
302 if (match(opcode, group_expr)) {
303 if (!(opcode in group)) {
304 group[opcode] = ggid
307 flags = add_flags(flags, "INAT_MAKE_GROUP(" group[opcode] ")")
314 if (match(opcode, rex_expr))
318 if (match(opcode, fpu_expr))
324 else if (match(ext, vexok_expr) || match(opcode, vexok_opcode_expr))
329 if (!prefix_num[opcode])
330 semantic_error("Unknown prefix: " opcode)
331 flags = add_flags(flags, "INAT_MAKE_PREFIX(" prefix_num[opcode] ")")
359 # print escape opcode map's array
360 print "/* Escape opcode map array */"
368 # print group opcode map's array
369 print "/* Group opcode map array */"
377 # print AVX opcode map's array
378 print "/* AVX opcode map array */"
/linux-4.4.14/arch/powerpc/xmon/
H A Dppc-dis.c33 const struct powerpc_opcode *opcode; print_insn_powerpc() local
50 /* Get the major opcode of the instruction. */ print_insn_powerpc()
53 /* Find the first match in the opcode table. We could speed this up print_insn_powerpc()
54 a bit by doing a binary search on the major opcode. */ print_insn_powerpc()
57 for (opcode = powerpc_opcodes; opcode < opcode_end; opcode++) print_insn_powerpc()
66 table_op = PPC_OP (opcode->opcode); print_insn_powerpc()
72 if ((insn & opcode->mask) != opcode->opcode print_insn_powerpc()
73 || (opcode->flags & dialect) == 0) print_insn_powerpc()
80 for (opindex = opcode->operands; *opindex != 0; opindex++) print_insn_powerpc()
90 printf("%s", opcode->name); print_insn_powerpc()
91 if (opcode->operands[0] != 0) print_insn_powerpc()
97 for (opindex = opcode->operands; *opindex != 0; opindex++) print_insn_powerpc()
H A Dspu-dis.c41 /* If two instructions have the same opcode then we prefer the first init_spu_disassemble()
45 int o = spu_opcodes[i].opcode; init_spu_disassemble()
58 unsigned int opcode = insn >> (32-11); get_index_for_opcode() local
60 /* Init the table. This assumes that element 0/opcode 0 (currently get_index_for_opcode()
65 if ((index = spu_disassemble_table[opcode & 0x780]) != 0 get_index_for_opcode()
69 if ((index = spu_disassemble_table[opcode & 0x7f0]) != 0 get_index_for_opcode()
73 if ((index = spu_disassemble_table[opcode & 0x7f8]) != 0 get_index_for_opcode()
77 if ((index = spu_disassemble_table[opcode & 0x7fc]) != 0 get_index_for_opcode()
81 if ((index = spu_disassemble_table[opcode & 0x7fe]) != 0 get_index_for_opcode()
85 if ((index = spu_disassemble_table[opcode & 0x7ff]) != 0) get_index_for_opcode()
H A Dspu-opc.c1 /* SPU opcode list
25 /* This file holds the Spu opcode table */
31 id_tag mode mode type opcode mnemonic asmtype dependency FPU L/S? branch? instruction
H A Dppc.h1 /* ppc.h -- Header file for PowerPC opcode table
25 /* The opcode table is an array of struct powerpc_opcode. */
29 /* The opcode name. */
32 /* The opcode itself. Those bits which will be filled in with
34 unsigned long opcode; member in struct:powerpc_opcode
36 /* The opcode mask. This is used by the disassembler. This is a
38 opcode field, and zeroes indicating those bits which need not
42 /* One bit flags for the opcode. These are used to indicate which
53 /* The table itself is sorted by major opcode number, and is otherwise
149 /* A macro to extract the major opcode from an instruction. */
169 this structure, and op is the opcode value; this assumes twos
267 and the number of operands remaining for the opcode, and decide
274 1, ignoring the next operand field for the opcode. This wretched
310 /* One bit flags for the opcode. These are used to indicate which
/linux-4.4.14/include/linux/netfilter/
H A Dnf_conntrack_tftp.h7 __be16 opcode; member in struct:tftphdr
/linux-4.4.14/arch/powerpc/platforms/powernv/
H A Dopal-tracepoints.c44 void __trace_opal_entry(unsigned long opcode, unsigned long *args) __trace_opal_entry() argument
58 trace_opal_entry(opcode, args); __trace_opal_entry()
65 void __trace_opal_exit(long opcode, unsigned long retval) __trace_opal_exit() argument
78 trace_opal_exit(opcode, retval); __trace_opal_exit()
/linux-4.4.14/drivers/acpi/acpica/
H A Dpsopinfo.c3 * Module Name: psopinfo - AML opcode information functions and dispatch tables
60 * PARAMETERS: opcode - The AML opcode
62 * RETURN: A pointer to the info about the opcode.
64 * DESCRIPTION: Find AML opcode description based on the opcode.
69 const struct acpi_opcode_info *acpi_ps_get_opcode_info(u16 opcode) acpi_ps_get_opcode_info() argument
72 const char *opcode_name = "Unknown AML opcode"; acpi_ps_get_opcode_info()
78 * Detect normal 8-bit opcode or extended 16-bit opcode acpi_ps_get_opcode_info()
80 if (!(opcode & 0xFF00)) { acpi_ps_get_opcode_info()
82 /* Simple (8-bit) opcode: 0-255, can't index beyond table */ acpi_ps_get_opcode_info()
85 [acpi_gbl_short_op_index[(u8)opcode]]); acpi_ps_get_opcode_info()
88 if (((opcode & 0xFF00) == AML_EXTENDED_OPCODE) && acpi_ps_get_opcode_info()
89 (((u8)opcode) <= MAX_EXTENDED_OPCODE)) { acpi_ps_get_opcode_info()
91 /* Valid extended (16-bit) opcode */ acpi_ps_get_opcode_info()
94 [acpi_gbl_long_op_index[(u8)opcode]]); acpi_ps_get_opcode_info()
99 switch (opcode) { acpi_ps_get_opcode_info()
141 /* Unknown AML opcode */ acpi_ps_get_opcode_info()
143 ACPI_DEBUG_PRINT((ACPI_DB_EXEC, "%s [%4.4X]\n", opcode_name, opcode)); acpi_ps_get_opcode_info()
152 * PARAMETERS: opcode - The AML opcode
154 * RETURN: A pointer to the name of the opcode (ASCII String)
157 * DESCRIPTION: Translate an opcode into a human-readable string
161 char *acpi_ps_get_opcode_name(u16 opcode) acpi_ps_get_opcode_name() argument
167 op = acpi_ps_get_opcode_info(opcode); acpi_ps_get_opcode_name()
183 * PARAMETERS: op_type - Type associated with the AML opcode
187 * DESCRIPTION: Obtain the number of expected arguments for an AML opcode
203 * an index into the opcode table (acpi_gbl_aml_op_info)
243 * This table is indexed by the second opcode of the extended opcode
244 * pair. It returns an index into the opcode table (acpi_gbl_aml_op_info)
H A Dexoparg1.c67 * required for this opcode type (0 through 6 args).
69 * for this opcode type (0, 1, or 2 targets).
70 * zR - RETURN VALUE: Indicates whether this opcode type returns a value
80 * PARAMETERS: walk_state - Current state (contains AML opcode)
93 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_0A_0T_1R()
95 /* Examine the AML opcode */ acpi_ex_opcode_0A_0T_1R()
97 switch (walk_state->opcode) { acpi_ex_opcode_0A_0T_1R()
110 default: /* Unknown opcode */ acpi_ex_opcode_0A_0T_1R()
112 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_0A_0T_1R()
113 walk_state->opcode)); acpi_ex_opcode_0A_0T_1R()
138 * PARAMETERS: walk_state - Current state (contains AML opcode)
153 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_1A_0T_0R()
155 /* Examine the AML opcode */ acpi_ex_opcode_1A_0T_0R()
157 switch (walk_state->opcode) { acpi_ex_opcode_1A_0T_0R()
189 default: /* Unknown opcode */ acpi_ex_opcode_1A_0T_0R()
191 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_1A_0T_0R()
192 walk_state->opcode)); acpi_ex_opcode_1A_0T_0R()
204 * PARAMETERS: walk_state - Current state (contains AML opcode)
208 * DESCRIPTION: Execute opcode with one argument, one target, and no
219 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_1A_1T_0R()
221 /* Examine the AML opcode */ acpi_ex_opcode_1A_1T_0R()
223 switch (walk_state->opcode) { acpi_ex_opcode_1A_1T_0R()
229 default: /* Unknown opcode */ acpi_ex_opcode_1A_1T_0R()
231 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_1A_1T_0R()
232 walk_state->opcode)); acpi_ex_opcode_1A_1T_0R()
246 * PARAMETERS: walk_state - Current state (contains AML opcode)
250 * DESCRIPTION: Execute opcode with one argument, one target, and a
267 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_1A_1T_1R()
269 /* Examine the AML opcode */ acpi_ex_opcode_1A_1T_1R()
271 switch (walk_state->opcode) { acpi_ex_opcode_1A_1T_1R()
287 switch (walk_state->opcode) { acpi_ex_opcode_1A_1T_1R()
535 acpi_ps_get_opcode_name(walk_state->opcode))); acpi_ex_opcode_1A_1T_1R()
539 default: /* Unknown opcode */ acpi_ex_opcode_1A_1T_1R()
541 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_1A_1T_1R()
542 walk_state->opcode)); acpi_ex_opcode_1A_1T_1R()
575 * PARAMETERS: walk_state - Current state (contains AML opcode)
579 * DESCRIPTION: Execute opcode with one argument, no target, and a return value
593 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_1A_0T_1R()
595 /* Examine the AML opcode */ acpi_ex_opcode_1A_0T_1R()
597 switch (walk_state->opcode) { acpi_ex_opcode_1A_0T_1R()
654 opcode))); acpi_ex_opcode_1A_0T_1R()
663 if (walk_state->opcode == AML_INCREMENT_OP) { acpi_ex_opcode_1A_0T_1R()
1051 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_1A_0T_1R()
1052 walk_state->opcode)); acpi_ex_opcode_1A_0T_1R()
H A Dexoparg2.c66 * required for this opcode type (1 through 6 args).
68 * for this opcode type (0, 1, or 2 targets).
69 * zR - RETURN VALUE: Indicates whether this opcode type returns a value
83 * DESCRIPTION: Execute opcode with two arguments, no target, and no return
97 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_2A_0T_0R()
99 /* Examine the opcode */ acpi_ex_opcode_2A_0T_0R()
101 switch (walk_state->opcode) { acpi_ex_opcode_2A_0T_0R()
135 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_2A_0T_0R()
136 walk_state->opcode)); acpi_ex_opcode_2A_0T_0R()
164 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_2A_2T_1R()
166 /* Execute the opcode */ acpi_ex_opcode_2A_2T_1R()
168 switch (walk_state->opcode) { acpi_ex_opcode_2A_2T_1R()
200 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_2A_2T_1R()
201 walk_state->opcode)); acpi_ex_opcode_2A_2T_1R()
249 * DESCRIPTION: Execute opcode with two arguments, one target, and a return
263 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_2A_1T_1R()
265 /* Execute the opcode */ acpi_ex_opcode_2A_1T_1R()
278 acpi_ex_do_math_op(walk_state->opcode, acpi_ex_opcode_2A_1T_1R()
284 switch (walk_state->opcode) { acpi_ex_opcode_2A_1T_1R()
446 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_2A_1T_1R()
447 walk_state->opcode)); acpi_ex_opcode_2A_1T_1R()
489 * DESCRIPTION: Execute opcode with 2 arguments, no target, and a return value
501 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_2A_0T_1R()
517 status = acpi_ex_do_logical_numeric_op(walk_state->opcode, acpi_ex_opcode_2A_0T_1R()
527 status = acpi_ex_do_logical_op(walk_state->opcode, operand[0], acpi_ex_opcode_2A_0T_1R()
532 switch (walk_state->opcode) { acpi_ex_opcode_2A_0T_1R()
554 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_2A_0T_1R()
555 walk_state->opcode)); acpi_ex_opcode_2A_0T_1R()
H A Dpsobject.c63 * DESCRIPTION: Extract the next AML opcode from the input stream.
74 walk_state->opcode = acpi_ps_peek_opcode(&(walk_state->parser_state)); acpi_ps_get_aml_opcode()
78 * 1) A valid AML opcode acpi_ps_get_aml_opcode()
80 * 3) An unknown/invalid opcode acpi_ps_get_aml_opcode()
82 walk_state->op_info = acpi_ps_get_opcode_info(walk_state->opcode); acpi_ps_get_aml_opcode()
91 walk_state->opcode = AML_INT_NAMEPATH_OP; acpi_ps_get_aml_opcode()
97 /* The opcode is unrecognized. Complain and skip unknown opcodes */ acpi_ps_get_aml_opcode()
105 "Unknown opcode 0x%.2X at table offset 0x%.4X, ignoring", acpi_ps_get_aml_opcode()
106 walk_state->opcode, acpi_ps_get_aml_opcode()
119 ("/*\nError: Unknown opcode 0x%.2X at table offset 0x%.4X, context:\n", acpi_ps_get_aml_opcode()
120 walk_state->opcode, acpi_ps_get_aml_opcode()
124 /* Dump the context surrounding the invalid opcode */ acpi_ps_get_aml_opcode()
135 /* Increment past one-byte or two-byte opcode */ acpi_ps_get_aml_opcode()
138 if (walk_state->opcode > 0xFF) { /* Can only happen if first byte is 0x5B */ acpi_ps_get_aml_opcode()
146 /* Found opcode info, this is a normal opcode */ acpi_ps_get_aml_opcode()
149 acpi_ps_get_opcode_size(walk_state->opcode); acpi_ps_get_aml_opcode()
185 unnamed_op->common.aml_opcode = walk_state->opcode; acpi_ps_build_named_op()
299 walk_state->op_info = acpi_ps_get_opcode_info(walk_state->opcode); acpi_ps_create_op()
300 op = acpi_ps_alloc_op(walk_state->opcode, aml_op_start); acpi_ps_create_op()
318 /* Not a named opcode, just allocate Op and append to parent */ acpi_ps_create_op()
329 if (walk_state->opcode == AML_BANK_FIELD_OP) { acpi_ps_create_op()
432 walk_state->opcode = (*op)->common.aml_opcode; acpi_ps_complete_op()
463 walk_state->opcode = (*op)->common.aml_opcode; acpi_ps_complete_op()
584 walk_state->opcode = op->common.aml_opcode; acpi_ps_complete_final_op()
H A Dexoparg3.c65 * required for this opcode type (1 through 6 args).
67 * for this opcode type (0, 1, or 2 targets).
68 * zR - RETURN VALUE: Indicates whether this opcode type returns a value
92 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_3A_0T_0R()
94 switch (walk_state->opcode) { acpi_ex_opcode_3A_0T_0R()
121 * If the interpreter sees this opcode, just ignore it. The External acpi_ex_opcode_3A_0T_0R()
123 * disassemble control method invocations. The opcode or group of acpi_ex_opcode_3A_0T_0R()
125 * AML interpreters never see the opcode. acpi_ex_opcode_3A_0T_0R()
132 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_3A_0T_0R()
133 walk_state->opcode)); acpi_ex_opcode_3A_0T_0R()
165 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_3A_1T_1R()
167 switch (walk_state->opcode) { acpi_ex_opcode_3A_1T_1R()
256 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_3A_1T_1R()
257 walk_state->opcode)); acpi_ex_opcode_3A_1T_1R()
H A Dpsparse.c49 * fairly compact by parsing based on a list of AML opcode
67 * PARAMETERS: opcode - An AML opcode
69 * RETURN: Size of the opcode, in bytes (1 or 2)
71 * DESCRIPTION: Get the size of the current opcode.
74 u32 acpi_ps_get_opcode_size(u32 opcode) acpi_ps_get_opcode_size() argument
77 /* Extended (2-byte) opcode if > 255 */ acpi_ps_get_opcode_size()
79 if (opcode > 0x00FF) { acpi_ps_get_opcode_size()
83 /* Otherwise, just a single byte opcode */ acpi_ps_get_opcode_size()
94 * RETURN: Next AML opcode
96 * DESCRIPTION: Get next AML opcode (without incrementing AML pointer)
103 u16 opcode; acpi_ps_peek_opcode() local
106 opcode = (u16) ACPI_GET8(aml); acpi_ps_peek_opcode()
108 if (opcode == AML_EXTENDED_OP_PREFIX) { acpi_ps_peek_opcode()
110 /* Extended opcode, get the second opcode byte */ acpi_ps_peek_opcode()
113 opcode = (u16) ((opcode << 8) | ACPI_GET8(aml)); acpi_ps_peek_opcode()
116 return (opcode); acpi_ps_peek_opcode()
387 * opcode. In both cases, we do not execute the rest of the acpi_ps_next_parse_state()
H A Dpsutils.c81 * opcode - Opcode to store in the Op
89 void acpi_ps_init_op(union acpi_parse_object *op, u16 opcode) acpi_ps_init_op() argument
94 op->common.aml_opcode = opcode; acpi_ps_init_op()
97 (acpi_ps_get_opcode_info(opcode))-> acpi_ps_init_op()
105 * PARAMETERS: opcode - Opcode that will be stored in the new Op
106 * aml - Address of the opcode
111 * opcode. A cache of opcodes is available for the pure
116 union acpi_parse_object *acpi_ps_alloc_op(u16 opcode, u8 *aml) acpi_ps_alloc_op() argument
124 op_info = acpi_ps_get_opcode_info(opcode); acpi_ps_alloc_op()
132 } else if (opcode == AML_INT_BYTELIST_OP) { acpi_ps_alloc_op()
152 acpi_ps_init_op(op, opcode); acpi_ps_alloc_op()
H A Dpsargs.c3 * Module Name: psargs - Parse AML opcode arguments
272 if (walk_state->opcode == AML_UNLOAD_OP) { acpi_ps_get_next_namepath()
395 u16 opcode; acpi_ps_get_next_simple_arg() local
405 opcode = AML_BYTE_OP; acpi_ps_get_next_simple_arg()
414 opcode = AML_WORD_OP; acpi_ps_get_next_simple_arg()
423 opcode = AML_DWORD_OP; acpi_ps_get_next_simple_arg()
432 opcode = AML_QWORD_OP; acpi_ps_get_next_simple_arg()
441 opcode = AML_STRING_OP; acpi_ps_get_next_simple_arg()
467 acpi_ps_init_op(arg, opcode); acpi_ps_get_next_simple_arg()
490 u16 opcode; acpi_ps_get_next_field() local
508 opcode = AML_INT_RESERVEDFIELD_OP; acpi_ps_get_next_field()
514 opcode = AML_INT_ACCESSFIELD_OP; acpi_ps_get_next_field()
520 opcode = AML_INT_CONNECTION_OP; acpi_ps_get_next_field()
526 opcode = AML_INT_EXTACCESSFIELD_OP; acpi_ps_get_next_field()
532 opcode = AML_INT_NAMEDFIELD_OP; acpi_ps_get_next_field()
538 field = acpi_ps_alloc_op(opcode, aml); acpi_ps_get_next_field()
545 switch (opcode) { acpi_ps_get_next_field()
587 /* This opcode has a third byte, access_length */ acpi_ps_get_next_field()
589 if (opcode == AML_INT_EXTACCESSFIELD_OP) { acpi_ps_get_next_field()
626 opcode = ACPI_GET8(parser_state->aml); acpi_ps_get_next_field()
629 switch (opcode) { acpi_ps_get_next_field()
819 if (walk_state->opcode == AML_UNLOAD_OP) { acpi_ps_get_next_arg()
H A Dacparser.h82 * psargs - Parse AML opcode arguments
106 u32 name, u32 opcode);
134 const struct acpi_opcode_info *acpi_ps_get_opcode_info(u16 opcode);
136 char *acpi_ps_get_opcode_name(u16 opcode);
145 u32 acpi_ps_get_opcode_size(u32 opcode);
193 char *path, u16 opcode, u32 create);
228 void acpi_ps_init_op(union acpi_parse_object *op, u16 opcode);
230 union acpi_parse_object *acpi_ps_alloc_op(u16 opcode, u8 *aml);
H A Dexoparg6.c65 * required for this opcode type (1 through 6 args).
67 * for this opcode type (0, 1, or 2 targets).
68 * zR - RETURN VALUE: Indicates whether this opcode type returns a value
206 * DESCRIPTION: Execute opcode with 6 arguments, no target, and a return value
219 acpi_ps_get_opcode_name(walk_state->opcode)); acpi_ex_opcode_6A_0T_1R()
221 switch (walk_state->opcode) { acpi_ex_opcode_6A_0T_1R()
311 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", acpi_ex_opcode_6A_0T_1R()
312 walk_state->opcode)); acpi_ex_opcode_6A_0T_1R()
H A Ddswexec.c58 * Dispatch table for opcode classes
231 walk_state->opcode = op->common.aml_opcode; acpi_ds_exec_begin_op()
259 * If the previous opcode was a conditional, this opcode acpi_ds_exec_begin_op()
287 * Handle the opcode based upon the opcode type acpi_ds_exec_begin_op()
304 * Note 10/2010: Except for the Scope() op. This opcode does acpi_ds_exec_begin_op()
373 ACPI_ERROR((AE_INFO, "Unknown opcode 0x%X", acpi_ds_exec_end_op()
400 if (walk_state->opcode == AML_INT_NAMEPATH_OP) { acpi_ds_exec_end_op()
425 status = acpi_ex_resolve_operands(walk_state->opcode, acpi_ds_exec_end_op()
436 * routine. There is one routine per opcode "type" based upon the acpi_ds_exec_end_op()
437 * number of opcode arguments and return type. acpi_ds_exec_end_op()
447 (walk_state->opcode == AML_STORE_OP) && acpi_ds_exec_end_op()
461 (walk_state->opcode))); acpi_ds_exec_end_op()
483 case AML_TYPE_CONTROL: /* Type 1 opcode, IF/ELSE/WHILE/NOOP */ acpi_ds_exec_end_op()
682 "Undefined opcode type Op=%p", op)); acpi_ds_exec_end_op()
688 "Internal opcode=%X type Op=%p\n", acpi_ds_exec_end_op()
689 walk_state->opcode, op)); acpi_ds_exec_end_op()
695 "Unimplemented opcode, class=0x%X type=0x%X Opcode=0x%X Op=%p", acpi_ds_exec_end_op()
H A Ddsutils.c221 ACPI_ERROR((AE_INFO, "Unknown parent opcode Op=%p", op)); acpi_ds_is_result_used()
227 * the parent opcode will not use the result, delete the object. acpi_ds_is_result_used()
237 /* Never delete the return value associated with a return opcode */ acpi_ds_is_result_used()
262 /* The general control opcode returns no result */ acpi_ds_is_result_used()
331 * DESCRIPTION: Used after interpretation of an opcode. If there is an internal
332 * result descriptor, check if the parent opcode will actually use
453 * opcode to the equivalent interpreter object. This may include
468 u16 opcode; acpi_ds_create_operand() local
497 * opcode that unfortunately defines the field name as the last acpi_ds_create_operand()
502 * actual opcode exists. acpi_ds_create_operand()
507 (u32) ((walk_state->opcode == acpi_ds_create_operand()
551 * error is for the cond_ref_of opcode. acpi_ds_create_operand()
621 opcode = AML_ZERO_OP; /* Has no arguments! */ acpi_ds_create_operand()
626 opcode = arg->common.aml_opcode; acpi_ds_create_operand()
631 op_info = acpi_ps_get_opcode_info(opcode); acpi_ds_create_operand()
673 acpi_ds_init_object_from_op(walk_state, arg, opcode, acpi_ds_create_operand()
782 * the opcode of current operation should be
H A Drsmisc.c117 switch (info->opcode) { acpi_rs_convert_aml_to_resource()
250 * been previously initialized via a COUNT opcode acpi_rs_convert_aml_to_resource()
256 info->opcode); acpi_rs_convert_aml_to_resource()
272 info->opcode); acpi_rs_convert_aml_to_resource()
288 info->opcode); acpi_rs_convert_aml_to_resource()
304 info->opcode); acpi_rs_convert_aml_to_resource()
322 info->opcode); acpi_rs_convert_aml_to_resource()
428 "Invalid conversion sub-opcode")); acpi_rs_convert_aml_to_resource()
435 ACPI_ERROR((AE_INFO, "Invalid conversion opcode")); acpi_rs_convert_aml_to_resource()
502 switch (info->opcode) { acpi_rs_convert_resource_to_aml()
636 info->opcode); acpi_rs_convert_resource_to_aml()
646 info->opcode); acpi_rs_convert_resource_to_aml()
658 info->opcode); acpi_rs_convert_resource_to_aml()
668 info->opcode); acpi_rs_convert_resource_to_aml()
678 info->opcode); acpi_rs_convert_resource_to_aml()
760 "Invalid conversion sub-opcode")); acpi_rs_convert_resource_to_aml()
778 ACPI_ERROR((AE_INFO, "Invalid conversion opcode")); acpi_rs_convert_resource_to_aml()
H A Ddsobject.c305 "Expecting bytelist, found AML opcode 0x%X in op %p", acpi_ds_build_internal_buffer_obj()
374 * than the Package list length (for the fixed length package opcode), some
615 * opcode - AML opcode associated with the object
629 u16 opcode, acpi_ds_init_object_from_op()
639 op_info = acpi_ps_get_opcode_info(opcode); acpi_ds_init_object_from_op()
642 /* Unknown opcode */ acpi_ds_init_object_from_op()
686 switch (opcode) { acpi_ds_init_object_from_op()
716 "Unknown constant opcode 0x%X", acpi_ds_init_object_from_op()
717 opcode)); acpi_ds_init_object_from_op()
770 /* Local ID (0-7) is (AML opcode - base AML_LOCAL_OP) */ acpi_ds_init_object_from_op()
773 ((u32)opcode) - AML_LOCAL_OP; acpi_ds_init_object_from_op()
791 /* Arg ID (0-6) is (AML opcode - base AML_ARG_OP) */ acpi_ds_init_object_from_op()
793 obj_desc->reference.value = ((u32)opcode) - AML_ARG_OP; acpi_ds_init_object_from_op()
831 "Unimplemented reference type for AML opcode: 0x%4.4X", acpi_ds_init_object_from_op()
832 opcode)); acpi_ds_init_object_from_op()
627 acpi_ds_init_object_from_op(struct acpi_walk_state *walk_state, union acpi_parse_object *op, u16 opcode, union acpi_operand_object **ret_obj_desc) acpi_ds_init_object_from_op() argument
H A Dexmisc.c402 * PARAMETERS: opcode - AML opcode
408 * DESCRIPTION: Execute a math AML opcode. The purpose of having all of the
414 u64 acpi_ex_do_math_op(u16 opcode, u64 integer0, u64 integer1) acpi_ex_do_math_op() argument
419 switch (opcode) { acpi_ex_do_math_op()
484 * PARAMETERS: opcode - AML opcode
491 * DESCRIPTION: Execute a logical "Numeric" AML opcode. For these Numeric
501 acpi_ex_do_logical_numeric_op(u16 opcode, acpi_ex_do_logical_numeric_op() argument
509 switch (opcode) { acpi_ex_do_logical_numeric_op()
540 * PARAMETERS: opcode - AML opcode
547 * DESCRIPTION: Execute a logical AML opcode. The purpose of having all of the
563 acpi_ex_do_logical_op(u16 opcode, acpi_ex_do_logical_op() argument
624 switch (opcode) { acpi_ex_do_logical_op()
667 switch (opcode) { acpi_ex_do_logical_op()
H A Dpstree.c83 /* Get the info structure for this opcode */ acpi_ps_get_arg()
88 /* Invalid opcode or ASCII character */ acpi_ps_get_arg()
93 /* Check if this opcode requires argument sub-objects */ acpi_ps_get_arg()
138 /* Get the info structure for this opcode */ acpi_ps_append_arg()
143 /* Invalid opcode */ acpi_ps_append_arg()
150 /* Check if this opcode requires argument sub-objects */ acpi_ps_append_arg()
H A Ddswload.c174 /* Map the raw opcode into an internal object type */ acpi_ds_load1_begin_op()
182 switch (walk_state->opcode) { acpi_ds_load1_begin_op()
292 * 2) Whenever we are parsing a deferred opcode (op_region, Buffer, acpi_ds_load1_begin_op()
316 if ((walk_state->opcode != AML_SCOPE_OP) && acpi_ds_load1_begin_op()
340 * involve arguments to the opcode must be created as we go back up the acpi_ds_load1_begin_op()
391 op = acpi_ps_alloc_op(walk_state->opcode, walk_state->aml); acpi_ds_load1_begin_op()
460 if (walk_state->opcode == AML_FIELD_OP || acpi_ds_load1_end_op()
461 walk_state->opcode == AML_BANK_FIELD_OP || acpi_ds_load1_end_op()
462 walk_state->opcode == AML_INDEX_FIELD_OP) { acpi_ds_load1_end_op()
505 /* For Name opcode, get the object type from the argument */ acpi_ds_load1_end_op()
H A Ddswload2.c99 (walk_state->opcode != AML_INT_NAMEPATH_OP)) || acpi_ds_load2_begin_op()
106 if (walk_state->opcode == AML_INT_NAMEPATH_OP) { acpi_ds_load2_begin_op()
129 /* Map the opcode into an internal object type */ acpi_ds_load2_begin_op()
137 switch (walk_state->opcode) { acpi_ds_load2_begin_op()
286 * involve arguments to the opcode must be created as we go back up the acpi_ds_load2_begin_op()
289 * Note: Name may already exist if we are executing a deferred opcode. acpi_ds_load2_begin_op()
338 op = acpi_ps_alloc_op(walk_state->opcode, walk_state->aml); acpi_ds_load2_begin_op()
391 /* Check if opcode had an associated namespace object */ acpi_ds_load2_end_op()
465 /* Decode the opcode */ acpi_ds_load2_end_op()
553 /* Unknown opcode */ acpi_ds_load2_end_op()
H A Dexresop.c115 * PARAMETERS: opcode - Opcode being interpreted
133 acpi_ex_resolve_operands(u16 opcode, acpi_ex_resolve_operands() argument
146 ACPI_FUNCTION_TRACE_U32(ex_resolve_operands, opcode); acpi_ex_resolve_operands()
148 op_info = acpi_ps_get_opcode_info(opcode); acpi_ex_resolve_operands()
155 ACPI_ERROR((AE_INFO, "Unknown AML opcode 0x%X", opcode)); acpi_ex_resolve_operands()
162 opcode, op_info->name, arg_types)); acpi_ex_resolve_operands()
336 if ((opcode == AML_STORE_OP) && acpi_ex_resolve_operands()
699 acpi_ps_get_opcode_name(opcode), acpi_ex_resolve_operands()
H A Ddscontrol.c119 control_state->control.opcode = op->common.aml_opcode; acpi_ds_exec_begin_control_op()
358 ("**break** Executed AML BreakPoint opcode\n")); acpi_ds_exec_end_control_op()
363 "Executed AML Breakpoint opcode"); acpi_ds_exec_end_control_op()
372 (walk_state->control_state->control.opcode != acpi_ds_exec_end_control_op()
391 /* Return status depending on opcode */ acpi_ds_exec_end_control_op()
402 ACPI_ERROR((AE_INFO, "Unknown control opcode=0x%X Op=%p", acpi_ds_exec_end_control_op()
/linux-4.4.14/arch/sh/kernel/
H A Dtraps_64.c39 insn_size_t opcode; read_opcode() local
48 get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc); read_opcode()
49 *result_opcode = opcode; read_opcode()
84 insn_size_t opcode, generate_and_check_address()
99 basereg = (opcode >> 20) & 0x3f; generate_and_check_address()
103 displacement = (opcode >> 10) & 0x3ff; generate_and_check_address()
109 offsetreg = (opcode >> 10) & 0x3f; generate_and_check_address()
132 unaligned_fixups_notify(current, opcode, regs); generate_and_check_address()
166 insn_size_t opcode, misaligned_load()
176 error = generate_and_check_address(regs, opcode, misaligned_load()
181 destreg = (opcode >> 4) & 0x3f; misaligned_load()
241 insn_size_t opcode, misaligned_store()
250 error = generate_and_check_address(regs, opcode, misaligned_store()
255 srcreg = (opcode >> 4) & 0x3f; misaligned_store()
312 insn_size_t opcode, misaligned_fpu_load()
322 error = generate_and_check_address(regs, opcode, misaligned_fpu_load()
327 destreg = (opcode >> 4) & 0x3f; misaligned_fpu_load()
384 insn_size_t opcode, misaligned_fpu_store()
394 error = generate_and_check_address(regs, opcode, misaligned_fpu_store()
399 srcreg = (opcode >> 4) & 0x3f; misaligned_fpu_store()
458 insn_size_t opcode; misaligned_fixup() local
467 error = read_opcode(regs->pc, &opcode, user_mode(regs)); misaligned_fixup()
471 major = (opcode >> 26) & 0x3f; misaligned_fixup()
472 minor = (opcode >> 16) & 0xf; misaligned_fixup()
476 error = misaligned_load(regs, opcode, 1, 1, 1); misaligned_fixup()
479 error = misaligned_load(regs, opcode, 1, 1, 0); misaligned_fixup()
482 error = misaligned_load(regs, opcode, 1, 2, 1); misaligned_fixup()
485 error = misaligned_load(regs, opcode, 1, 3, 0); misaligned_fixup()
489 error = misaligned_store(regs, opcode, 1, 1); misaligned_fixup()
492 error = misaligned_store(regs, opcode, 1, 2); misaligned_fixup()
495 error = misaligned_store(regs, opcode, 1, 3); misaligned_fixup()
501 error = misaligned_load(regs, opcode, 0, 1, 1); misaligned_fixup()
504 error = misaligned_load(regs, opcode, 0, 1, 0); misaligned_fixup()
507 error = misaligned_load(regs, opcode, 0, 2, 1); misaligned_fixup()
510 error = misaligned_load(regs, opcode, 0, 3, 0); misaligned_fixup()
521 error = misaligned_store(regs, opcode, 0, 1); misaligned_fixup()
524 error = misaligned_store(regs, opcode, 0, 2); misaligned_fixup()
527 error = misaligned_store(regs, opcode, 0, 3); misaligned_fixup()
536 error = misaligned_fpu_load(regs, opcode, 1, 2, 0); misaligned_fixup()
539 error = misaligned_fpu_load(regs, opcode, 1, 3, 1); misaligned_fixup()
542 error = misaligned_fpu_load(regs, opcode, 1, 3, 0); misaligned_fixup()
547 error = misaligned_fpu_load(regs, opcode, 0, 2, 0); misaligned_fixup()
550 error = misaligned_fpu_load(regs, opcode, 0, 3, 1); misaligned_fixup()
553 error = misaligned_fpu_load(regs, opcode, 0, 3, 0); misaligned_fixup()
561 error = misaligned_fpu_store(regs, opcode, 1, 2, 0); misaligned_fixup()
564 error = misaligned_fpu_store(regs, opcode, 1, 3, 1); misaligned_fixup()
567 error = misaligned_fpu_store(regs, opcode, 1, 3, 0); misaligned_fixup()
572 error = misaligned_fpu_store(regs, opcode, 0, 2, 0); misaligned_fixup()
575 error = misaligned_fpu_store(regs, opcode, 0, 3, 1); misaligned_fixup()
578 error = misaligned_fpu_store(regs, opcode, 0, 3, 0); misaligned_fixup()
629 opcode[31:26,20:16]. The 6 MSBs of this value index into the following
649 insn_size_t opcode = 0x6ff4fff0; /* guaranteed reserved opcode */ do_reserved_inst() local
671 get_user_error = __get_user(opcode, (insn_size_t *)aligned_pc); do_reserved_inst()
675 * Error trying to read opcode. This typically means a do_reserved_inst()
685 reserved_field = opcode & 0xf; do_reserved_inst()
687 goto out; /* invalid opcode */ do_reserved_inst()
689 major = (opcode >> 26) & 0x3f; do_reserved_inst()
690 minor = (opcode >> 16) & 0xf; do_reserved_inst()
728 unsigned long regno = (opcode >> 20) & 0x3f; do_reserved_inst()
735 unsigned long regno = (opcode >> 4) & 0x3f; do_reserved_inst()
83 generate_and_check_address(struct pt_regs *regs, insn_size_t opcode, int displacement_not_indexed, int width_shift, __u64 *address) generate_and_check_address() argument
165 misaligned_load(struct pt_regs *regs, insn_size_t opcode, int displacement_not_indexed, int width_shift, int do_sign_extend) misaligned_load() argument
240 misaligned_store(struct pt_regs *regs, insn_size_t opcode, int displacement_not_indexed, int width_shift) misaligned_store() argument
311 misaligned_fpu_load(struct pt_regs *regs, insn_size_t opcode, int displacement_not_indexed, int width_shift, int do_paired_load) misaligned_fpu_load() argument
383 misaligned_fpu_store(struct pt_regs *regs, insn_size_t opcode, int displacement_not_indexed, int width_shift, int do_paired_load) misaligned_fpu_store() argument
H A Dkprobes.c45 kprobe_opcode_t opcode = *(kprobe_opcode_t *) (p->addr); arch_prepare_kprobe() local
47 if (OPCODE_RTE(opcode)) arch_prepare_kprobe()
50 p->opcode = opcode; arch_prepare_kprobe()
58 p->opcode = *p->addr; arch_copy_kprobe()
70 *p->addr = p->opcode; arch_disarm_kprobe()
112 saved->opcode = 0; arch_remove_kprobe()
119 saved->opcode = 0; arch_remove_kprobe()
159 if (OPCODE_JSR(p->opcode) || OPCODE_JMP(p->opcode)) { prepare_singlestep()
160 unsigned int reg_nr = ((p->opcode >> 8) & 0x000F); prepare_singlestep()
162 } else if (OPCODE_BRA(p->opcode) || OPCODE_BSR(p->opcode)) { prepare_singlestep()
163 unsigned long disp = (p->opcode & 0x0FFF); prepare_singlestep()
167 } else if (OPCODE_BRAF(p->opcode) || OPCODE_BSRF(p->opcode)) { prepare_singlestep()
168 unsigned int reg_nr = ((p->opcode >> 8) & 0x000F); prepare_singlestep()
173 } else if (OPCODE_RTS(p->opcode)) { prepare_singlestep()
176 } else if (OPCODE_BF(p->opcode) || OPCODE_BT(p->opcode)) { prepare_singlestep()
177 unsigned long disp = (p->opcode & 0x00FF); prepare_singlestep()
183 op2->opcode = *(op2->addr); prepare_singlestep()
186 } else if (OPCODE_BF_S(p->opcode) || OPCODE_BT_S(p->opcode)) { prepare_singlestep()
187 unsigned long disp = (p->opcode & 0x00FF); prepare_singlestep()
193 op2->opcode = *(op2->addr); prepare_singlestep()
200 op1->opcode = *(op1->addr); prepare_singlestep()
390 p->opcode = 0; post_kprobe_handler()
402 p->opcode = 0; post_kprobe_handler()
H A Dtraps.c111 insn_size_t opcode; is_valid_bugaddr() local
115 if (probe_kernel_address((insn_size_t *)addr, opcode)) is_valid_bugaddr()
117 if (opcode == TRAPA_BUG_OPCODE) is_valid_bugaddr()
/linux-4.4.14/drivers/scsi/aic7xxx/aicasm/
H A Daicasm_insformat.h54 opcode : 4, member in struct:ins_format1
58 opcode : 4,
73 opcode : 4, member in struct:ins_format2
77 opcode : 4,
91 opcode : 4, member in struct:ins_format3
95 opcode : 4,
109 opcode : 4, member in struct:ins_format4
113 opcode : 4,
127 opcode : 4, member in struct:ins_format5
131 opcode : 4,
145 opcode : 4, member in struct:ins_format6
149 opcode : 4,
198 /* 16bit Ops. Low byte main opcode. High byte extended opcode. */
213 /* Page extension is low three bits of second opcode byte. */
H A Daicasm_gram.y96 static void format_1_instr(int opcode, symbol_ref_t *dest,
98 static void format_2_instr(int opcode, symbol_ref_t *dest,
100 static void format_3_instr(int opcode, symbol_ref_t *src,
1650 format_1_instr(int opcode, symbol_ref_t *dest, expression_t *immed,
1665 type_check(dest, immed, opcode);
1672 f1_instr->opcode = opcode;
1698 switch (opcode) {
1727 format_2_instr(int opcode, symbol_ref_t *dest, expression_t *places,
1745 f2_instr->opcode = AIC_OP_ROL;
1754 switch (opcode) {
1788 format_3_instr(int opcode, symbol_ref_t *src,
1810 f3_instr->opcode = opcode;
1858 type_check(symbol_ref_t *sym, expression_t *expression, int opcode)
1871 if (opcode == AIC_OP_AND || opcode == AIC_OP_JNZ ||
1872 opcode == AIC_OP_JZ || opcode == AIC_OP_JNE ||
1873 opcode == AIC_OP_BMOV)
/linux-4.4.14/drivers/nfc/s3fwrn5/
H A Dnci.c36 .opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
41 .opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
46 .opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
51 .opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
56 .opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
61 .opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
66 .opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
71 .opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
76 .opcode = nci_opcode_pack(NCI_GID_PROPRIETARY,
/linux-4.4.14/arch/arm/probes/
H A Ddecode-arm.h56 void __kprobes simulate_bbl(probes_opcode_t opcode,
58 void __kprobes simulate_blx1(probes_opcode_t opcode,
60 void __kprobes simulate_blx2bx(probes_opcode_t opcode,
62 void __kprobes simulate_mrs(probes_opcode_t opcode,
64 void __kprobes simulate_mov_ipsp(probes_opcode_t opcode,
/linux-4.4.14/drivers/mmc/core/
H A Dsdio_ops.h24 static inline bool mmc_is_io_op(u32 opcode) mmc_is_io_op() argument
26 return opcode == SD_IO_RW_DIRECT || opcode == SD_IO_RW_EXTENDED; mmc_is_io_op()
H A Dmmc_ops.c66 cmd.opcode = MMC_SEND_STATUS; __mmc_send_status()
98 cmd.opcode = MMC_SELECT_CARD; _mmc_select_card()
139 cmd.opcode = MMC_SET_DSR; mmc_set_dsr()
166 cmd.opcode = MMC_GO_IDLE_STATE; mmc_go_idle()
191 cmd.opcode = MMC_SEND_OP_COND; mmc_send_op_cond()
232 cmd.opcode = MMC_ALL_SEND_CID; mmc_all_send_cid()
253 cmd.opcode = MMC_SET_RELATIVE_ADDR; mmc_set_relative_addr()
265 mmc_send_cxd_native(struct mmc_host *host, u32 arg, u32 *cxd, int opcode) mmc_send_cxd_native() argument
273 cmd.opcode = opcode; mmc_send_cxd_native()
292 u32 opcode, void *buf, unsigned len) mmc_send_cxd_data()
302 cmd.opcode = opcode; mmc_send_cxd_data()
320 if (opcode == MMC_SEND_CSD || opcode == MMC_SEND_CID) { mmc_send_cxd_data()
428 cmd.opcode = MMC_SPI_READ_OCR; mmc_spi_read_ocr()
443 cmd.opcode = MMC_SPI_CRC_ON_OFF; mmc_spi_set_crc()
505 cmd.opcode = MMC_SWITCH; __mmc_switch()
591 int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error) mmc_send_tuning() argument
618 cmd.opcode = opcode; mmc_send_tuning()
661 mmc_send_bus_test(struct mmc_card *card, struct mmc_host *host, u8 opcode, mmc_send_bus_test() argument
692 if (opcode == MMC_BUS_TEST_W) mmc_send_bus_test()
697 cmd.opcode = opcode; mmc_send_bus_test()
709 if (opcode == MMC_BUS_TEST_R) mmc_send_bus_test()
720 if (opcode == MMC_BUS_TEST_R) { mmc_send_bus_test()
762 unsigned int opcode; mmc_send_hpi_cmd() local
771 opcode = card->ext_csd.hpi_cmd; mmc_send_hpi_cmd()
772 if (opcode == MMC_STOP_TRANSMISSION) mmc_send_hpi_cmd()
774 else if (opcode == MMC_SEND_STATUS) mmc_send_hpi_cmd()
777 cmd.opcode = opcode; mmc_send_hpi_cmd()
291 mmc_send_cxd_data(struct mmc_card *card, struct mmc_host *host, u32 opcode, void *buf, unsigned len) mmc_send_cxd_data() argument
H A Dsd_ops.c33 cmd.opcode = MMC_APP_CMD; mmc_app_cmd()
129 cmd.opcode = SD_APP_SET_BUS_WIDTH; mmc_app_set_bus_width()
157 cmd.opcode = SD_APP_OP_COND; mmc_send_app_op_cond()
208 cmd.opcode = SD_SEND_IF_COND; mmc_send_if_cond()
235 cmd.opcode = SD_SEND_RELATIVE_ADDR; mmc_send_relative_addr()
277 cmd.opcode = SD_APP_SEND_SCR; mmc_app_send_scr()
326 cmd.opcode = SD_SWITCH; mmc_sd_switch()
373 cmd.opcode = SD_APP_SD_STATUS; mmc_app_sd_status()
H A Dsdio_ops.c29 cmd.opcode = SD_IO_SEND_OP_COND; mmc_send_io_op_cond()
81 cmd.opcode = SD_IO_RW_DIRECT; mmc_io_rw_direct_host()
143 cmd.opcode = SD_IO_RW_EXTENDED; mmc_io_rw_extended()
/linux-4.4.14/arch/blackfin/kernel/
H A Dpseudodbg.c106 bool execute_pseudodbg_assert(struct pt_regs *fp, unsigned int opcode) execute_pseudodbg_assert() argument
108 int expected = ((opcode >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask); execute_pseudodbg_assert()
109 int dbgop = ((opcode >> (PseudoDbg_Assert_dbgop_bits)) & PseudoDbg_Assert_dbgop_mask); execute_pseudodbg_assert()
110 int grp = ((opcode >> (PseudoDbg_Assert_grp_bits)) & PseudoDbg_Assert_grp_mask); execute_pseudodbg_assert()
111 int regtest = ((opcode >> (PseudoDbg_Assert_regtest_bits)) & PseudoDbg_Assert_regtest_mask); execute_pseudodbg_assert()
114 if ((opcode & 0xFF000000) != PseudoDbg_Assert_opcode) execute_pseudodbg_assert()
158 bool execute_pseudodbg(struct pt_regs *fp, unsigned int opcode) execute_pseudodbg() argument
163 if ((opcode & 0xFF000000) != PseudoDbg_opcode) execute_pseudodbg()
166 opcode >>= 16; execute_pseudodbg()
167 grp = ((opcode >> PseudoDbg_grp_bits) & PseudoDbg_reg_mask); execute_pseudodbg()
168 fn = ((opcode >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask); execute_pseudodbg()
169 reg = ((opcode >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask); execute_pseudodbg()
H A Dtrace.c274 static void decode_ProgCtrl_0(unsigned int opcode) decode_ProgCtrl_0() argument
276 int poprnd = ((opcode >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask); decode_ProgCtrl_0()
277 int prgfunc = ((opcode >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask); decode_ProgCtrl_0()
316 pr_cont("0x%04x", opcode); decode_ProgCtrl_0()
330 static void decode_BRCC_0(unsigned int opcode) decode_BRCC_0() argument
332 int B = ((opcode >> BRCC_B_bits) & BRCC_B_mask); decode_BRCC_0()
333 int T = ((opcode >> BRCC_T_bits) & BRCC_T_mask); decode_BRCC_0()
346 static void decode_CALLa_0(unsigned int opcode) decode_CALLa_0() argument
348 int S = ((opcode >> (CALLa_S_bits - 16)) & CALLa_S_mask); decode_CALLa_0()
372 static void decode_LoopSetup_0(unsigned int opcode) decode_LoopSetup_0() argument
374 int c = ((opcode >> LoopSetup_c_bits) & LoopSetup_c_mask); decode_LoopSetup_0()
375 int reg = ((opcode >> LoopSetup_reg_bits) & LoopSetup_reg_mask); decode_LoopSetup_0()
376 int rop = ((opcode >> LoopSetup_rop_bits) & LoopSetup_rop_mask); decode_LoopSetup_0()
399 static void decode_dspLDST_0(unsigned int opcode) decode_dspLDST_0() argument
401 int i = ((opcode >> DspLDST_i_bits) & DspLDST_i_mask); decode_dspLDST_0()
402 int m = ((opcode >> DspLDST_m_bits) & DspLDST_m_mask); decode_dspLDST_0()
403 int W = ((opcode >> DspLDST_W_bits) & DspLDST_W_mask); decode_dspLDST_0()
404 int aop = ((opcode >> DspLDST_aop_bits) & DspLDST_aop_mask); decode_dspLDST_0()
405 int reg = ((opcode >> DspLDST_reg_bits) & DspLDST_reg_mask); decode_dspLDST_0()
462 static void decode_LDST_0(unsigned int opcode) decode_LDST_0() argument
464 int Z = ((opcode >> LDST_Z_bits) & LDST_Z_mask); decode_LDST_0()
465 int W = ((opcode >> LDST_W_bits) & LDST_W_mask); decode_LDST_0()
466 int sz = ((opcode >> LDST_sz_bits) & LDST_sz_mask); decode_LDST_0()
467 int aop = ((opcode >> LDST_aop_bits) & LDST_aop_mask); decode_LDST_0()
468 int reg = ((opcode >> LDST_reg_bits) & LDST_reg_mask); decode_LDST_0()
469 int ptr = ((opcode >> LDST_ptr_bits) & LDST_ptr_mask); decode_LDST_0()
520 static void decode_LDSTii_0(unsigned int opcode) decode_LDSTii_0() argument
522 int reg = ((opcode >> LDSTii_reg_bit) & LDSTii_reg_mask); decode_LDSTii_0()
523 int ptr = ((opcode >> LDSTii_ptr_bit) & LDSTii_ptr_mask); decode_LDSTii_0()
524 int offset = ((opcode >> LDSTii_offset_bit) & LDSTii_offset_mask); decode_LDSTii_0()
525 int op = ((opcode >> LDSTii_op_bit) & LDSTii_op_mask); decode_LDSTii_0()
526 int W = ((opcode >> LDSTii_W_bit) & LDSTii_W_mask); decode_LDSTii_0()
557 static void decode_LDSTidxI_0(unsigned int opcode) decode_LDSTidxI_0() argument
559 int Z = ((opcode >> LDSTidxI_Z_bits) & LDSTidxI_Z_mask); decode_LDSTidxI_0()
560 int W = ((opcode >> LDSTidxI_W_bits) & LDSTidxI_W_mask); decode_LDSTidxI_0()
561 int sz = ((opcode >> LDSTidxI_sz_bits) & LDSTidxI_sz_mask); decode_LDSTidxI_0()
562 int reg = ((opcode >> LDSTidxI_reg_bits) & LDSTidxI_reg_mask); decode_LDSTidxI_0()
563 int ptr = ((opcode >> LDSTidxI_ptr_bits) & LDSTidxI_ptr_mask); decode_LDSTidxI_0()
564 int offset = ((opcode >> LDSTidxI_offset_bits) & LDSTidxI_offset_mask); decode_LDSTidxI_0()
589 static void decode_opcode(unsigned int opcode) decode_opcode() argument
592 if (opcode == BFIN_BUG_OPCODE) decode_opcode()
596 if ((opcode & 0xffffff00) == ProgCtrl_opcode) decode_opcode()
597 decode_ProgCtrl_0(opcode); decode_opcode()
598 else if ((opcode & 0xfffff000) == BRCC_opcode) decode_opcode()
599 decode_BRCC_0(opcode); decode_opcode()
600 else if ((opcode & 0xfffff000) == 0x2000) decode_opcode()
602 else if ((opcode & 0xfe000000) == CALLa_opcode) decode_opcode()
603 decode_CALLa_0(opcode); decode_opcode()
604 else if ((opcode & 0xff8000C0) == LoopSetup_opcode) decode_opcode()
605 decode_LoopSetup_0(opcode); decode_opcode()
606 else if ((opcode & 0xfffffc00) == DspLDST_opcode) decode_opcode()
607 decode_dspLDST_0(opcode); decode_opcode()
608 else if ((opcode & 0xfffff000) == LDST_opcode) decode_opcode()
609 decode_LDST_0(opcode); decode_opcode()
610 else if ((opcode & 0xffffe000) == LDSTii_opcode) decode_opcode()
611 decode_LDSTii_0(opcode); decode_opcode()
612 else if ((opcode & 0xfc000000) == LDSTidxI_opcode) decode_opcode()
613 decode_LDSTidxI_0(opcode); decode_opcode()
614 else if (opcode & 0xffff0000) decode_opcode()
615 pr_cont("0x%08x", opcode); decode_opcode()
617 pr_cont("0x%04x", opcode); decode_opcode()
623 unsigned int opcode; decode_instruction() local
625 if (!get_instruction(&opcode, address)) decode_instruction()
628 decode_opcode(opcode); decode_instruction()
634 if ((opcode & 0xc0000000) == 0xc0000000 && decode_instruction()
635 (opcode & BIT_MULTI_INS) && decode_instruction()
636 (opcode & 0xe8000000) != 0xe8000000) { decode_instruction()
638 if (!get_instruction(&opcode, address + 2)) decode_instruction()
640 decode_opcode(opcode); decode_instruction()
642 if (!get_instruction(&opcode, address + 3)) decode_instruction()
644 decode_opcode(opcode); decode_instruction()
H A Ddumpstack.c21 unsigned int opcode; is_bfin_call() local
23 if (!get_instruction(&opcode, addr)) is_bfin_call()
26 if ((opcode >= 0x0060 && opcode <= 0x0067) || is_bfin_call()
27 (opcode >= 0x0070 && opcode <= 0x0077) || is_bfin_call()
28 (opcode >= 0xE3000000 && opcode <= 0xE3FFFFFF)) is_bfin_call()
/linux-4.4.14/arch/arm/kernel/
H A Dinsn.c38 unsigned long opcode = 0xea000000; __arm_gen_branch_arm() local
42 opcode |= 1 << 24; __arm_gen_branch_arm()
52 return opcode | offset; __arm_gen_branch_arm()
H A Dopcodes.c46 * opcode space from v5 onwards
55 asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr) arm_check_condition() argument
57 u32 cc_bits = opcode >> 28; arm_check_condition()
/linux-4.4.14/drivers/net/ethernet/mellanox/mlx5/core/
H A Dtransobj.c46 MLX5_SET(alloc_transport_domain_in, in, opcode, mlx5_alloc_transport_domain()
65 MLX5_SET(dealloc_transport_domain_in, in, opcode, mlx5_dealloc_transport_domain()
77 MLX5_SET(create_rq_in, in, opcode, MLX5_CMD_OP_CREATE_RQ); mlx5_core_create_rq()
92 MLX5_SET(modify_rq_in, in, opcode, MLX5_CMD_OP_MODIFY_RQ); mlx5_core_modify_rq()
105 MLX5_SET(destroy_rq_in, in, opcode, MLX5_CMD_OP_DESTROY_RQ); mlx5_core_destroy_rq()
116 MLX5_SET(create_sq_in, in, opcode, MLX5_CMD_OP_CREATE_SQ); mlx5_core_create_sq()
131 MLX5_SET(modify_sq_in, in, opcode, MLX5_CMD_OP_MODIFY_SQ); mlx5_core_modify_sq()
144 MLX5_SET(destroy_sq_in, in, opcode, MLX5_CMD_OP_DESTROY_SQ); mlx5_core_destroy_sq()
156 MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR); mlx5_core_create_tir()
172 MLX5_SET(modify_tir_in, in, opcode, MLX5_CMD_OP_MODIFY_TIR); mlx5_core_modify_tir()
185 MLX5_SET(destroy_tir_in, in, opcode, MLX5_CMD_OP_DESTROY_TIR); mlx5_core_destroy_tir()
197 MLX5_SET(create_tis_in, in, opcode, MLX5_CMD_OP_CREATE_TIS); mlx5_core_create_tis()
214 MLX5_SET(destroy_tis_in, in, opcode, MLX5_CMD_OP_DESTROY_TIS); mlx5_core_destroy_tis()
226 MLX5_SET(create_rmp_in, in, opcode, MLX5_CMD_OP_CREATE_RMP); mlx5_core_create_rmp()
240 MLX5_SET(modify_rmp_in, in, opcode, MLX5_CMD_OP_MODIFY_RMP); mlx5_core_modify_rmp()
253 MLX5_SET(destroy_rmp_in, in, opcode, MLX5_CMD_OP_DESTROY_RMP); mlx5_core_destroy_rmp()
266 MLX5_SET(query_rmp_in, in, opcode, MLX5_CMD_OP_QUERY_RMP); mlx5_core_query_rmp()
307 MLX5_SET(create_xrc_srq_in, in, opcode, MLX5_CMD_OP_CREATE_XRC_SRQ); mlx5_core_create_xsrq()
325 MLX5_SET(destroy_xrc_srq_in, in, opcode, MLX5_CMD_OP_DESTROY_XRC_SRQ); mlx5_core_destroy_xsrq()
340 MLX5_SET(query_xrc_srq_in, in, opcode, MLX5_CMD_OP_QUERY_XRC_SRQ); mlx5_core_query_xsrq()
364 MLX5_SET(arm_xrc_srq_in, in, opcode, MLX5_CMD_OP_ARM_XRC_SRQ); mlx5_core_arm_xsrq()
380 MLX5_SET(create_rqt_in, in, opcode, MLX5_CMD_OP_CREATE_RQT); mlx5_core_create_rqt()
396 MLX5_SET(modify_rqt_in, in, opcode, MLX5_CMD_OP_MODIFY_RQT); mlx5_core_modify_rqt()
409 MLX5_SET(destroy_rqt_in, in, opcode, MLX5_CMD_OP_DESTROY_RQT); mlx5_core_destroy_rqt()
H A Dqp.c193 in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_CREATE_QP); mlx5_core_create_qp()
240 din.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_QP); mlx5_core_create_qp()
268 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_QP); mlx5_core_destroy_qp()
334 in->hdr.opcode = cpu_to_be16(op); mlx5_core_qp_modify()
367 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_QUERY_QP); mlx5_core_qp_query()
388 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_ALLOC_XRCD); mlx5_core_xrcd_alloc()
410 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DEALLOC_XRCD); mlx5_core_xrcd_dealloc()
433 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_PAGE_FAULT_RESUME); mlx5_core_page_fault_resume()
H A Dmr.c67 in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_CREATE_MKEY); mlx5_core_create_mkey()
129 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_MKEY); mlx5_core_destroy_mkey()
151 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_QUERY_MKEY); mlx5_core_query_mkey()
174 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_QUERY_SPECIAL_CONTEXTS); mlx5_core_dump_fill_mkey()
201 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_CREATE_PSV); mlx5_core_create_psv()
232 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_PSV); mlx5_core_destroy_psv()
H A Dcq.c100 in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_CREATE_CQ); mlx5_core_create_cq()
132 din.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_CQ); mlx5_core_create_cq()
160 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_DESTROY_CQ); mlx5_core_destroy_cq()
189 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_QUERY_CQ); mlx5_core_query_cq()
210 in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_MODIFY_CQ); mlx5_core_modify_cq()
H A Dvport.c47 MLX5_SET(query_vport_state_in, in, opcode, mlx5_query_vport_state()
76 MLX5_SET(query_nic_vport_context_in, in, opcode, mlx5_query_nic_vport_mac_address()
124 MLX5_SET(query_hca_vport_gid_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_GID); mlx5_query_hca_vport_gid()
193 MLX5_SET(query_hca_vport_pkey_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_PKEY); mlx5_query_hca_vport_pkey()
246 MLX5_SET(query_hca_vport_context_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_VPORT_CONTEXT); mlx5_query_hca_vport_context()
H A Dfw.c45 MLX5_SET(query_adapter_in, in, opcode, MLX5_CMD_OP_QUERY_ADAPTER); mlx5_cmd_query_adapter()
174 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_INIT_HCA); mlx5_cmd_init_hca()
193 in.hdr.opcode = cpu_to_be16(MLX5_CMD_OP_TEARDOWN_HCA); mlx5_cmd_teardown_hca()
H A Dflow_table.c77 MLX5_SET(set_fte_in, in, opcode, MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY); mlx5_set_flow_entry_cmd()
106 MLX5_SET_DFTEI(in, opcode, MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY); mlx5_del_flow_entry_cmd()
122 MLX5_SET_DFGI(in, opcode, MLX5_CMD_OP_DESTROY_FLOW_GROUP); mlx5_destroy_flow_group_cmd()
151 MLX5_SET_CFGI(in, opcode, MLX5_CMD_OP_CREATE_FLOW_GROUP); mlx5_create_flow_group_cmd()
210 MLX5_SET(create_flow_table_in, in, opcode, mlx5_create_flow_table_cmd()
235 MLX5_SET_DFTI(in, opcode, MLX5_CMD_OP_DESTROY_FLOW_TABLE); mlx5_destroy_flow_table_cmd()
/linux-4.4.14/arch/mn10300/mm/
H A Dmisalignment.c44 unsigned params, unsigned opcode,
50 unsigned opcode, unsigned long disp,
53 static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode);
105 DM0, /* data reg in opcode in bits 0-1 */
106 DM1, /* data reg in opcode in bits 2-3 */
107 DM2, /* data reg in opcode in bits 4-5 */
108 AM0, /* addr reg in opcode in bits 0-1 */
109 AM1, /* addr reg in opcode in bits 2-3 */
110 AM2, /* addr reg in opcode in bits 4-5 */
111 RM0, /* reg in opcode in bits 0-3 */
112 RM1, /* reg in opcode in bits 2-5 */
113 RM2, /* reg in opcode in bits 4-7 */
114 RM4, /* reg in opcode in bits 8-11 */
115 RM6, /* reg in opcode in bits 12-15 */
125 SIMM4_2, /* 4-bit signed displacement in opcode bits 4-7 */
131 IMM32_HIGH8, /* 32-bit unsigned immediate, LSB in opcode */
134 IMM32_HIGH8_MEM, /* 32-bit unsigned displacement, LSB in opcode */
154 u_int32_t opcode; member in struct:mn10300_opcode
325 uint32_t opcode, noc, xo, xm; misalignment() local
346 /* first thing to do is to match the opcode */ misalignment()
351 opcode = byte; misalignment()
355 npop = ilog2(pop->opcode | pop->opmask); misalignment()
362 if ((opcode & pop->opmask) == pop->opcode) misalignment()
365 xo = pop->opcode >> (npop - noc); misalignment()
368 if ((opcode & xm) != xo) misalignment()
376 opcode = opcode << 8 | byte; misalignment()
389 regs->pc, opcode); misalignment()
414 regs->pc, opcode); misalignment()
420 regs->pc, opcode); misalignment()
426 regs->pc, opcode, pop->name); misalignment()
445 /* we matched the opcode */ misalignment()
448 regs->pc, opcode, pop->opcode, pop->params[0], pop->params[1]); misalignment()
455 opcode >>= tmp; misalignment()
480 regs->pc, opcode); misalignment()
496 pop->params[0], opcode, disp, misalignment()
500 if (!misalignment_reg(registers, pop->params[1], opcode, disp, misalignment()
516 if (!misalignment_reg(registers, pop->params[0], opcode, disp, misalignment()
521 pop->params[1], opcode, disp, misalignment()
540 misalignment_MOV_Lcc(regs, opcode); misalignment()
549 unsigned params, unsigned opcode, misalignment_addr()
567 postinc = &registers[Dreg_index[opcode & 0x03]]; misalignment_addr()
571 postinc = &registers[Dreg_index[opcode >> 2 & 0x03]]; misalignment_addr()
575 postinc = &registers[Dreg_index[opcode >> 4 & 0x03]]; misalignment_addr()
579 postinc = &registers[Areg_index[opcode & 0x03]]; misalignment_addr()
583 postinc = &registers[Areg_index[opcode >> 2 & 0x03]]; misalignment_addr()
587 postinc = &registers[Areg_index[opcode >> 4 & 0x03]]; misalignment_addr()
591 postinc = &registers[Rreg_index[opcode & 0x0f]]; misalignment_addr()
595 postinc = &registers[Rreg_index[opcode >> 2 & 0x0f]]; misalignment_addr()
599 postinc = &registers[Rreg_index[opcode >> 4 & 0x0f]]; misalignment_addr()
603 postinc = &registers[Rreg_index[opcode >> 8 & 0x0f]]; misalignment_addr()
607 postinc = &registers[Rreg_index[opcode >> 12 & 0x0f]]; misalignment_addr()
638 tmp = opcode >> 4 & 0x0f; misalignment_addr()
678 unsigned opcode, unsigned long disp, misalignment_reg()
688 *_register = &registers[Dreg_index[opcode & 0x03]]; misalignment_reg()
691 *_register = &registers[Dreg_index[opcode >> 2 & 0x03]]; misalignment_reg()
694 *_register = &registers[Dreg_index[opcode >> 4 & 0x03]]; misalignment_reg()
697 *_register = &registers[Areg_index[opcode & 0x03]]; misalignment_reg()
700 *_register = &registers[Areg_index[opcode >> 2 & 0x03]]; misalignment_reg()
703 *_register = &registers[Areg_index[opcode >> 4 & 0x03]]; misalignment_reg()
706 *_register = &registers[Rreg_index[opcode & 0x0f]]; misalignment_reg()
709 *_register = &registers[Rreg_index[opcode >> 2 & 0x0f]]; misalignment_reg()
712 *_register = &registers[Rreg_index[opcode >> 4 & 0x0f]]; misalignment_reg()
715 *_register = &registers[Rreg_index[opcode >> 8 & 0x0f]]; misalignment_reg()
718 *_register = &registers[Rreg_index[opcode >> 12 & 0x0f]]; misalignment_reg()
741 static void misalignment_MOV_Lcc(struct pt_regs *regs, uint32_t opcode) misalignment_MOV_Lcc() argument
746 kdebug("MOV_Lcc %x [flags=%lx]", opcode, epsw & 0xf); misalignment_MOV_Lcc()
751 switch (opcode & 0xf) { misalignment_MOV_Lcc()
548 misalignment_addr(unsigned long *registers, unsigned long sp, unsigned params, unsigned opcode, unsigned long disp, void **_address, unsigned long **_postinc, unsigned long *_inc) misalignment_addr() argument
677 misalignment_reg(unsigned long *registers, unsigned params, unsigned opcode, unsigned long disp, unsigned long **_register) misalignment_reg() argument
/linux-4.4.14/drivers/infiniband/hw/qib/
H A Dqib_uc.c105 switch (wqe->wr.opcode) { qib_make_uc_req()
113 if (wqe->wr.opcode == IB_WR_SEND) qib_make_uc_req()
142 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) qib_make_uc_req()
172 if (wqe->wr.opcode == IB_WR_SEND) qib_make_uc_req()
196 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) qib_make_uc_req()
246 u32 opcode; qib_uc_rcv() local
264 opcode = be32_to_cpu(ohdr->bth[0]); qib_uc_rcv()
265 if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode)) qib_uc_rcv()
269 opcode >>= 24; qib_uc_rcv()
286 switch (opcode) { qib_uc_rcv()
302 /* Check for opcode sequence errors. */ qib_uc_rcv()
306 if (opcode == OP(SEND_MIDDLE) || qib_uc_rcv()
307 opcode == OP(SEND_LAST) || qib_uc_rcv()
308 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) qib_uc_rcv()
314 if (opcode == OP(RDMA_WRITE_MIDDLE) || qib_uc_rcv()
315 opcode == OP(RDMA_WRITE_LAST) || qib_uc_rcv()
316 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) qib_uc_rcv()
321 if (opcode == OP(SEND_FIRST) || qib_uc_rcv()
322 opcode == OP(SEND_ONLY) || qib_uc_rcv()
323 opcode == OP(SEND_ONLY_WITH_IMMEDIATE) || qib_uc_rcv()
324 opcode == OP(RDMA_WRITE_FIRST) || qib_uc_rcv()
325 opcode == OP(RDMA_WRITE_ONLY) || qib_uc_rcv()
326 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) qib_uc_rcv()
344 switch (opcode) { qib_uc_rcv()
364 if (opcode == OP(SEND_ONLY)) qib_uc_rcv()
366 else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE)) qib_uc_rcv()
401 wc.opcode = IB_WC_RECV; qib_uc_rcv()
453 if (opcode == OP(RDMA_WRITE_ONLY))
455 else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) {
496 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
522 qp->r_state = opcode;
H A Dqib_rc.c121 if (e->opcode == OP(RDMA_READ_REQUEST)) {
334 switch (wqe->wr.opcode) { qib_make_rc_req()
350 if (wqe->wr.opcode == IB_WR_SEND) qib_make_rc_req()
390 if (wqe->rdma_wr.wr.opcode == IB_WR_RDMA_WRITE) qib_make_rc_req()
460 if (wqe->atomic_wr.wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) { qib_make_rc_req()
499 if (wqe->wr.opcode == IB_WR_RDMA_READ) qib_make_rc_req()
510 * qp->s_state is normally set to the opcode of the qib_make_rc_req()
533 if (wqe->wr.opcode == IB_WR_SEND) qib_make_rc_req()
551 * qp->s_state is normally set to the opcode of the qib_make_rc_req()
574 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) qib_make_rc_req()
592 * qp->s_state is normally set to the opcode of the qib_make_rc_req()
789 u32 opcode; reset_psn() local
802 /* Find the work request opcode corresponding to the given PSN. */ reset_psn()
803 opcode = wqe->wr.opcode; reset_psn()
824 opcode = wqe->wr.opcode; reset_psn()
832 switch (opcode) { reset_psn()
889 if (wqe->wr.opcode == IB_WR_RDMA_READ) qib_restart_rc()
955 if (wqe->wr.opcode == IB_WR_RDMA_READ) reset_sending_psn()
977 u32 opcode; qib_rc_send_complete() local
989 opcode = be32_to_cpu(ohdr->bth[0]) >> 24; qib_rc_send_complete()
990 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && qib_rc_send_complete()
991 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { qib_rc_send_complete()
1025 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode]; qib_rc_send_complete()
1081 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode]; do_rc_completion()
1122 * @opcode: the opcode of the request that resulted in the ACK
1129 static int do_rc_ack(struct qib_qp *qp, u32 aeth, u32 psn, int opcode, do_rc_ack() argument
1168 if (wqe->wr.opcode == IB_WR_RDMA_READ && do_rc_ack()
1169 opcode == OP(RDMA_READ_RESPONSE_ONLY) && do_rc_ack()
1183 if ((wqe->wr.opcode == IB_WR_RDMA_READ && do_rc_ack()
1184 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || do_rc_ack()
1185 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || do_rc_ack()
1186 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) && do_rc_ack()
1187 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) { do_rc_ack()
1205 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || do_rc_ack()
1206 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { do_rc_ack()
1211 (wqe->wr.opcode == IB_WR_RDMA_READ || do_rc_ack()
1212 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || do_rc_ack()
1213 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) { do_rc_ack()
1366 if (wqe->wr.opcode == IB_WR_RDMA_READ || rdma_seq_err()
1367 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || rdma_seq_err()
1368 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) rdma_seq_err()
1390 * @opcode: the opcode for this packet
1403 u32 opcode, qib_rc_rcv_resp()
1416 if (opcode != OP(RDMA_READ_RESPONSE_MIDDLE)) { qib_rc_rcv_resp()
1451 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { qib_rc_rcv_resp()
1474 switch (opcode) { qib_rc_rcv_resp()
1479 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) { qib_rc_rcv_resp()
1486 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) || qib_rc_rcv_resp()
1487 opcode != OP(RDMA_READ_RESPONSE_FIRST)) qib_rc_rcv_resp()
1491 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) qib_rc_rcv_resp()
1506 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) qib_rc_rcv_resp()
1525 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE)) qib_rc_rcv_resp()
1540 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd)) qib_rc_rcv_resp()
1565 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) qib_rc_rcv_resp()
1614 * @opcode: the opcode for this packet
1627 u32 opcode, qib_rc_rcv_error()
1697 if (!e->opcode) { qib_rc_rcv_error()
1708 switch (opcode) { OP()
1718 if (!e || e->opcode != OP(RDMA_READ_REQUEST)) OP()
1766 if (!e || e->opcode != (u8) opcode || old_req) OP()
1869 u32 opcode; qib_rc_rcv() local
1889 opcode = be32_to_cpu(ohdr->bth[0]); qib_rc_rcv()
1890 if (qib_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode)) qib_rc_rcv()
1894 opcode >>= 24; qib_rc_rcv()
1902 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && qib_rc_rcv()
1903 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { qib_rc_rcv()
1904 qib_rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn, qib_rc_rcv()
1912 if (qib_rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd)) qib_rc_rcv()
1917 /* Check for opcode sequence errors. */ qib_rc_rcv()
1921 if (opcode == OP(SEND_MIDDLE) || qib_rc_rcv()
1922 opcode == OP(SEND_LAST) || qib_rc_rcv()
1923 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) qib_rc_rcv()
1929 if (opcode == OP(RDMA_WRITE_MIDDLE) || qib_rc_rcv()
1930 opcode == OP(RDMA_WRITE_LAST) || qib_rc_rcv()
1931 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) qib_rc_rcv()
1936 if (opcode == OP(SEND_MIDDLE) || qib_rc_rcv()
1937 opcode == OP(SEND_LAST) || qib_rc_rcv()
1938 opcode == OP(SEND_LAST_WITH_IMMEDIATE) || qib_rc_rcv()
1939 opcode == OP(RDMA_WRITE_MIDDLE) || qib_rc_rcv()
1940 opcode == OP(RDMA_WRITE_LAST) || qib_rc_rcv()
1941 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) qib_rc_rcv()
1964 switch (opcode) { qib_rc_rcv()
2002 if (opcode == OP(SEND_ONLY)) qib_rc_rcv()
2035 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) || qib_rc_rcv()
2036 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) qib_rc_rcv()
2037 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; qib_rc_rcv()
2039 wc.opcode = IB_WC_RECV; qib_rc_rcv()
2084 if (opcode == OP(RDMA_WRITE_FIRST)) qib_rc_rcv()
2086 else if (opcode == OP(RDMA_WRITE_ONLY)) qib_rc_rcv()
2116 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { OP()
2144 e->opcode = opcode; OP()
2155 qp->r_state = opcode; OP()
2188 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { OP()
2206 e->atomic_data = (opcode == OP(FETCH_ADD)) ? OP()
2213 e->opcode = opcode; OP()
2219 qp->r_state = opcode; OP()
2235 qp->r_state = opcode;
1399 qib_rc_rcv_resp(struct qib_ibport *ibp, struct qib_other_headers *ohdr, void *data, u32 tlen, struct qib_qp *qp, u32 opcode, u32 psn, u32 hdrsize, u32 pmtu, struct qib_ctxtdata *rcd) qib_rc_rcv_resp() argument
1624 qib_rc_rcv_error(struct qib_other_headers *ohdr, void *data, struct qib_qp *qp, u32 opcode, u32 psn, int diff, struct qib_ctxtdata *rcd) qib_rc_rcv_error() argument
/linux-4.4.14/drivers/scsi/pcmcia/
H A Dnsp_debug.c49 #define group(opcode) (((opcode) >> 5) & 7)
65 static void print_opcodek(unsigned char opcode) print_opcodek() argument
67 const char **table = commands[ group(opcode) ]; print_opcodek()
71 printk("%s[%02x] ", reserved, opcode); print_opcodek()
74 printk("%s(notext)[%02x] ", unknown, opcode); print_opcodek()
77 printk("%s[%02x] ", vendor, opcode); print_opcodek()
80 if (table[opcode & 0x1f] != unknown) print_opcodek()
81 printk("%s[%02x] ", table[opcode & 0x1f], opcode); print_opcodek()
83 printk("%s[%02x] ", unknown, opcode); print_opcodek()
/linux-4.4.14/drivers/staging/rdma/ipath/
H A Dipath_uc.c102 switch (wqe->wr.opcode) { ipath_make_uc_req()
110 if (wqe->wr.opcode == IB_WR_SEND) ipath_make_uc_req()
139 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) ipath_make_uc_req()
169 if (wqe->wr.opcode == IB_WR_SEND) ipath_make_uc_req()
193 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) ipath_make_uc_req()
244 int opcode; ipath_uc_rcv() local
280 * The opcode is in the low byte when its in network order ipath_uc_rcv()
283 opcode = be32_to_cpu(ohdr->bth[0]) >> 24; ipath_uc_rcv()
296 switch (opcode) { ipath_uc_rcv()
313 /* Check for opcode sequence errors. */ ipath_uc_rcv()
317 if (opcode == OP(SEND_MIDDLE) || ipath_uc_rcv()
318 opcode == OP(SEND_LAST) || ipath_uc_rcv()
319 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) ipath_uc_rcv()
325 if (opcode == OP(RDMA_WRITE_MIDDLE) || ipath_uc_rcv()
326 opcode == OP(RDMA_WRITE_LAST) || ipath_uc_rcv()
327 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) ipath_uc_rcv()
332 if (opcode == OP(SEND_FIRST) || ipath_uc_rcv()
333 opcode == OP(SEND_ONLY) || ipath_uc_rcv()
334 opcode == OP(SEND_ONLY_WITH_IMMEDIATE) || ipath_uc_rcv()
335 opcode == OP(RDMA_WRITE_FIRST) || ipath_uc_rcv()
336 opcode == OP(RDMA_WRITE_ONLY) || ipath_uc_rcv()
337 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) ipath_uc_rcv()
343 switch (opcode) { OP()
358 if (opcode == OP(SEND_ONLY))
360 else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))
410 wc.opcode = IB_WC_RECV;
464 if (opcode == OP(RDMA_WRITE_ONLY))
466 else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
516 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
544 qp->r_state = opcode;
H A Dipath_rc.c125 if (e->opcode == OP(RDMA_READ_REQUEST)) {
310 switch (wqe->wr.opcode) { ipath_make_rc_req()
326 if (wqe->wr.opcode == IB_WR_SEND) ipath_make_rc_req()
365 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) ipath_make_rc_req()
433 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) { ipath_make_rc_req()
471 if (wqe->wr.opcode == IB_WR_RDMA_READ) ipath_make_rc_req()
510 if (wqe->wr.opcode == IB_WR_SEND) ipath_make_rc_req()
546 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) ipath_make_rc_req()
728 u32 opcode; reset_psn() local
741 /* Find the work request opcode corresponding to the given PSN. */ reset_psn()
742 opcode = wqe->wr.opcode; reset_psn()
763 opcode = wqe->wr.opcode; reset_psn()
771 switch (opcode) { reset_psn()
829 if (wqe->wr.opcode == IB_WR_RDMA_READ) ipath_restart_rc()
850 * @opcode: the opcode of the request that resulted in the ACK
857 static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode, do_rc_ack() argument
901 if (wqe->wr.opcode == IB_WR_RDMA_READ && do_rc_ack()
902 opcode == OP(RDMA_READ_RESPONSE_ONLY) && do_rc_ack()
916 if ((wqe->wr.opcode == IB_WR_RDMA_READ && do_rc_ack()
917 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || do_rc_ack()
918 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || do_rc_ack()
919 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) && do_rc_ack()
920 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) { do_rc_ack()
934 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || do_rc_ack()
935 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) do_rc_ack()
938 (wqe->wr.opcode == IB_WR_RDMA_READ || do_rc_ack()
939 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || do_rc_ack()
940 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) { do_rc_ack()
954 wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode]; do_rc_ack()
1032 if (wqe->wr.opcode == IB_WR_RDMA_READ) do_rc_ack()
1107 * @opcode: the opcode for this packet
1121 u32 opcode, ipath_rc_rcv_resp()
1147 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { ipath_rc_rcv_resp()
1165 switch (opcode) { ipath_rc_rcv_resp()
1175 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) { ipath_rc_rcv_resp()
1185 if (!do_rc_ack(qp, aeth, psn, opcode, val) || ipath_rc_rcv_resp()
1186 opcode != OP(RDMA_READ_RESPONSE_FIRST)) ipath_rc_rcv_resp()
1190 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) ipath_rc_rcv_resp()
1212 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1227 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
1245 if (!do_rc_ack(qp, aeth, psn, opcode, 0))
1276 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1324 * @opcode: the opcode for this packet
1339 u32 opcode, ipath_rc_rcv_error()
1399 if (!e->opcode) { ipath_rc_rcv_error()
1409 switch (opcode) { OP()
1420 if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req) OP()
1472 if (!e || e->opcode != (u8) opcode || old_req) OP()
1574 u32 opcode; ipath_rc_rcv() local
1617 opcode = be32_to_cpu(ohdr->bth[0]) >> 24; ipath_rc_rcv()
1618 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && ipath_rc_rcv()
1619 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { ipath_rc_rcv()
1620 ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn, ipath_rc_rcv()
1628 if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode, ipath_rc_rcv()
1634 /* Check for opcode sequence errors. */ ipath_rc_rcv()
1638 if (opcode == OP(SEND_MIDDLE) || ipath_rc_rcv()
1639 opcode == OP(SEND_LAST) || ipath_rc_rcv()
1640 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) ipath_rc_rcv()
1646 if (opcode == OP(RDMA_WRITE_MIDDLE) || ipath_rc_rcv()
1647 opcode == OP(RDMA_WRITE_LAST) || ipath_rc_rcv()
1648 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) ipath_rc_rcv()
1653 if (opcode == OP(SEND_MIDDLE) || ipath_rc_rcv()
1654 opcode == OP(SEND_LAST) || ipath_rc_rcv()
1655 opcode == OP(SEND_LAST_WITH_IMMEDIATE) || ipath_rc_rcv()
1656 opcode == OP(RDMA_WRITE_MIDDLE) || ipath_rc_rcv()
1657 opcode == OP(RDMA_WRITE_LAST) || ipath_rc_rcv()
1658 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) ipath_rc_rcv()
1671 switch (opcode) { ipath_rc_rcv()
1700 if (opcode == OP(SEND_ONLY)) ipath_rc_rcv()
1735 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
1736 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
1737 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
1739 wc.opcode = IB_WC_RECV;
1785 if (opcode == OP(RDMA_WRITE_FIRST))
1787 else if (opcode == OP(RDMA_WRITE_ONLY))
1846 e->opcode = opcode; OP()
1856 qp->r_state = opcode; OP()
1909 e->atomic_data = (opcode == OP(FETCH_ADD)) ? OP()
1914 e->opcode = opcode; OP()
1919 qp->r_state = opcode; OP()
1934 qp->r_state = opcode;
1117 ipath_rc_rcv_resp(struct ipath_ibdev *dev, struct ipath_other_headers *ohdr, void *data, u32 tlen, struct ipath_qp *qp, u32 opcode, u32 psn, u32 hdrsize, u32 pmtu, int header_in_data) ipath_rc_rcv_resp() argument
1335 ipath_rc_rcv_error(struct ipath_ibdev *dev, struct ipath_other_headers *ohdr, void *data, struct ipath_qp *qp, u32 opcode, u32 psn, int diff, int header_in_data) ipath_rc_rcv_error() argument
/linux-4.4.14/arch/mips/include/uapi/asm/
H A Dinst.h41 * func field of spec opcode.
63 * func field of spec2 opcode.
74 * func field of spec3 opcode.
537 __BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */
543 __BITFIELD_FIELD(unsigned int opcode : 6,
551 __BITFIELD_FIELD(unsigned int opcode : 6,
559 __BITFIELD_FIELD(unsigned int opcode : 6,
568 __BITFIELD_FIELD(unsigned int opcode : 6,
578 __BITFIELD_FIELD(unsigned int opcode : 6,
588 __BITFIELD_FIELD(unsigned int opcode : 6,
599 __BITFIELD_FIELD(unsigned int opcode : 6,
610 __BITFIELD_FIELD(unsigned int opcode : 6,
617 __BITFIELD_FIELD(unsigned int opcode : 6,
627 __BITFIELD_FIELD(unsigned int opcode : 6,
638 __BITFIELD_FIELD(unsigned int opcode : 6,
648 __BITFIELD_FIELD(unsigned int opcode:6,
664 __BITFIELD_FIELD(unsigned int opcode : 6,
673 __BITFIELD_FIELD(unsigned int opcode : 6,
683 __BITFIELD_FIELD(unsigned int opcode : 6,
694 __BITFIELD_FIELD(unsigned int opcode : 6,
704 __BITFIELD_FIELD(unsigned int opcode : 6,
714 __BITFIELD_FIELD(unsigned int opcode : 6,
726 __BITFIELD_FIELD(unsigned int opcode : 6,
736 __BITFIELD_FIELD(unsigned int opcode : 6,
747 __BITFIELD_FIELD(unsigned int opcode : 6,
757 __BITFIELD_FIELD(unsigned int opcode : 6,
767 __BITFIELD_FIELD(unsigned int opcode : 6,
777 __BITFIELD_FIELD(unsigned int opcode : 6,
785 __BITFIELD_FIELD(unsigned int opcode : 6,
794 __BITFIELD_FIELD(unsigned int opcode : 6,
806 __BITFIELD_FIELD(unsigned int opcode : 6,
813 __BITFIELD_FIELD(unsigned int opcode : 6,
821 __BITFIELD_FIELD(unsigned int opcode : 6,
830 __BITFIELD_FIELD(unsigned int opcode : 6,
839 __BITFIELD_FIELD(unsigned int opcode : 6,
847 __BITFIELD_FIELD(unsigned int opcode : 6,
858 __BITFIELD_FIELD(unsigned int opcode : 5,
868 __BITFIELD_FIELD(unsigned int opcode : 5,
876 __BITFIELD_FIELD(unsigned int opcode : 5,
883 __BITFIELD_FIELD(unsigned int opcode : 5,
891 __BITFIELD_FIELD(unsigned int opcode : 5,
898 __BITFIELD_FIELD(unsigned int opcode : 5,
906 __BITFIELD_FIELD(unsigned int opcode : 5,
/linux-4.4.14/arch/sparc/crypto/
H A Dcrop_devid.c5 * opcode drivers. It serves to trigger the module autoloading
H A Dcrc32c_glue.c161 pr_info("Using sparc64 crc32c opcode optimized CRC32C implementation\n"); crc32c_sparc64_mod_init()
164 pr_info("sparc64 crc32c opcode not available.\n"); crc32c_sparc64_mod_init()
177 MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated");
H A Dmd5_glue.c170 pr_info("Using sparc64 md5 opcode optimized MD5 implementation\n"); md5_sparc64_mod_init()
173 pr_info("sparc64 md5 opcode not available.\n"); md5_sparc64_mod_init()
186 MODULE_DESCRIPTION("MD5 Message Digest Algorithm, sparc64 md5 opcode accelerated");
H A Dsha1_glue.c165 pr_info("Using sparc64 sha1 opcode optimized SHA-1 implementation\n"); sha1_sparc64_mod_init()
168 pr_info("sparc64 sha1 opcode not available.\n"); sha1_sparc64_mod_init()
181 MODULE_DESCRIPTION("SHA1 Secure Hash Algorithm, sparc64 sha1 opcode accelerated");
H A Dsha256_glue.c221 pr_info("Using sparc64 sha256 opcode optimized SHA-256/SHA-224 implementation\n"); sha256_sparc64_mod_init()
224 pr_info("sparc64 sha256 opcode not available.\n"); sha256_sparc64_mod_init()
238 MODULE_DESCRIPTION("SHA-224 and SHA-256 Secure Hash Algorithm, sparc64 sha256 opcode accelerated");
H A Dsha512_glue.c206 pr_info("Using sparc64 sha512 opcode optimized SHA-512/SHA-384 implementation\n"); sha512_sparc64_mod_init()
209 pr_info("sparc64 sha512 opcode not available.\n"); sha512_sparc64_mod_init()
223 MODULE_DESCRIPTION("SHA-384 and SHA-512 Secure Hash Algorithm, sparc64 sha512 opcode accelerated");
/linux-4.4.14/drivers/gpu/drm/sti/
H A Dsti_awg_utils.c11 enum opcode { enum
23 static int awg_generate_instr(enum opcode opcode, awg_generate_instr() argument
46 switch (opcode) { awg_generate_instr()
62 opcode = SET; awg_generate_instr()
97 DRM_ERROR("instruction %d does not exist\n", opcode); awg_generate_instr()
105 instruction = ((opcode) << AWG_OPCODE_OFFSET) | arg; awg_generate_instr()
/linux-4.4.14/arch/powerpc/platforms/pseries/
H A DhvCall_inst.c106 static void probe_hcall_entry(void *ignored, unsigned long opcode, unsigned long *args) probe_hcall_entry() argument
110 if (opcode > MAX_HCALL_OPCODE) probe_hcall_entry()
113 h = this_cpu_ptr(&hcall_stats[opcode / 4]); probe_hcall_entry()
118 static void probe_hcall_exit(void *ignored, unsigned long opcode, unsigned long retval, probe_hcall_exit() argument
123 if (opcode > MAX_HCALL_OPCODE) probe_hcall_exit()
126 h = this_cpu_ptr(&hcall_stats[opcode / 4]); probe_hcall_exit()
/linux-4.4.14/drivers/scsi/sym53c8xx_2/
H A Dsym_fw.c367 u32 opcode, new, old, tmp1, tmp2; sym_fw_bind_script() local
376 opcode = *cur; sym_fw_bind_script()
384 if (opcode == 0) { sym_fw_bind_script()
395 if (opcode == SCR_DATA_ZERO) { sym_fw_bind_script()
402 (unsigned)opcode); sym_fw_bind_script()
407 switch (opcode >> 28) { sym_fw_bind_script()
435 if ((opcode & SCR_NO_FLUSH) && sym_fw_bind_script()
437 opcode = (opcode & ~SCR_NO_FLUSH); sym_fw_bind_script()
445 opcode = (opcode | OPC_MOVE); sym_fw_bind_script()
453 opcode = (opcode | OPC_MOVE); sym_fw_bind_script()
461 opcode &= ~0x20000000; sym_fw_bind_script()
463 opcode = (opcode & ~OPC_TCHMOVE); sym_fw_bind_script()
470 opcode &= ~0x20000000; sym_fw_bind_script()
472 opcode = (opcode & ~OPC_TCHMOVE); sym_fw_bind_script()
481 if (opcode & 0x00800000) sym_fw_bind_script()
483 else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/ sym_fw_bind_script()
500 * Scriptify:) the opcode. sym_fw_bind_script()
502 *cur++ = cpu_to_scr(opcode); sym_fw_bind_script()
/linux-4.4.14/arch/x86/kernel/cpu/
H A Dperf_event_p4.c23 unsigned int opcode; /* Event code and ESCR selector */ member in struct:p4_event_bind
73 .opcode = P4_OPCODE(P4_EVENT_TC_DELIVER_MODE),
87 .opcode = P4_OPCODE(P4_EVENT_BPU_FETCH_REQUEST),
94 .opcode = P4_OPCODE(P4_EVENT_ITLB_REFERENCE),
103 .opcode = P4_OPCODE(P4_EVENT_MEMORY_CANCEL),
111 .opcode = P4_OPCODE(P4_EVENT_MEMORY_COMPLETE),
119 .opcode = P4_OPCODE(P4_EVENT_LOAD_PORT_REPLAY),
126 .opcode = P4_OPCODE(P4_EVENT_STORE_PORT_REPLAY),
133 .opcode = P4_OPCODE(P4_EVENT_MOB_LOAD_REPLAY),
143 .opcode = P4_OPCODE(P4_EVENT_PAGE_WALK_TYPE),
152 .opcode = P4_OPCODE(P4_EVENT_BSQ_CACHE_REFERENCE),
167 .opcode = P4_OPCODE(P4_EVENT_IOQ_ALLOCATION),
184 .opcode = P4_OPCODE(P4_EVENT_IOQ_ACTIVE_ENTRIES),
201 .opcode = P4_OPCODE(P4_EVENT_FSB_DATA_ACTIVITY),
214 .opcode = P4_OPCODE(P4_EVENT_BSQ_ALLOCATION),
233 .opcode = P4_OPCODE(P4_EVENT_BSQ_ACTIVE_ENTRIES),
252 .opcode = P4_OPCODE(P4_EVENT_SSE_INPUT_ASSIST),
260 .opcode = P4_OPCODE(P4_EVENT_PACKED_SP_UOP),
268 .opcode = P4_OPCODE(P4_EVENT_PACKED_DP_UOP),
276 .opcode = P4_OPCODE(P4_EVENT_SCALAR_SP_UOP),
284 .opcode = P4_OPCODE(P4_EVENT_SCALAR_DP_UOP),
292 .opcode = P4_OPCODE(P4_EVENT_64BIT_MMX_UOP),
300 .opcode = P4_OPCODE(P4_EVENT_128BIT_MMX_UOP),
308 .opcode = P4_OPCODE(P4_EVENT_X87_FP_UOP),
316 .opcode = P4_OPCODE(P4_EVENT_TC_MISC),
323 .opcode = P4_OPCODE(P4_EVENT_GLOBAL_POWER_EVENTS),
330 .opcode = P4_OPCODE(P4_EVENT_TC_MS_XFER),
337 .opcode = P4_OPCODE(P4_EVENT_UOP_QUEUE_WRITES),
346 .opcode = P4_OPCODE(P4_EVENT_RETIRED_MISPRED_BRANCH_TYPE),
356 .opcode = P4_OPCODE(P4_EVENT_RETIRED_BRANCH_TYPE),
366 .opcode = P4_OPCODE(P4_EVENT_RESOURCE_STALL),
373 .opcode = P4_OPCODE(P4_EVENT_WC_BUFFER),
382 .opcode = P4_OPCODE(P4_EVENT_B2B_CYCLES),
388 .opcode = P4_OPCODE(P4_EVENT_BNR),
394 .opcode = P4_OPCODE(P4_EVENT_SNOOP),
400 .opcode = P4_OPCODE(P4_EVENT_RESPONSE),
406 .opcode = P4_OPCODE(P4_EVENT_FRONT_END_EVENT),
414 .opcode = P4_OPCODE(P4_EVENT_EXECUTION_EVENT),
428 .opcode = P4_OPCODE(P4_EVENT_REPLAY_EVENT),
436 .opcode = P4_OPCODE(P4_EVENT_INSTR_RETIRED),
446 .opcode = P4_OPCODE(P4_EVENT_UOPS_RETIRED),
454 .opcode = P4_OPCODE(P4_EVENT_UOP_TYPE),
462 .opcode = P4_OPCODE(P4_EVENT_BRANCH_RETIRED),
472 .opcode = P4_OPCODE(P4_EVENT_MISPRED_BRANCH_RETIRED),
479 .opcode = P4_OPCODE(P4_EVENT_X87_ASSIST),
490 .opcode = P4_OPCODE(P4_EVENT_MACHINE_CLEAR),
499 .opcode = P4_OPCODE(P4_EVENT_INSTR_COMPLETED),
724 esel = P4_OPCODE_ESEL(bind->opcode); p4_pmu_event_map()
845 esel = P4_OPCODE_ESEL(bind->opcode); p4_hw_config()
892 * event opcode -- it's fine from hardware point of view p4_pmu_disable_pebs()
970 escr_conf |= P4_ESCR_EVENT(P4_OPCODE_EVNT(bind->opcode)); p4_pmu_enable_event()
/linux-4.4.14/include/uapi/linux/netfilter_bridge/
H A Debt_arp.h23 __be16 opcode; member in struct:ebt_arp_info
/linux-4.4.14/arch/mips/kvm/
H A Dopcode.h10 /* Define opcode values not defined in <asm/isnt.h> */
/linux-4.4.14/arch/s390/kernel/
H A Djump_label.c16 u16 opcode; member in struct:insn
28 insn->opcode = 0xc004; jump_label_make_nop()
35 insn->opcode = 0xc0f4; jump_label_make_branch()
54 .opcode = 0xc004,
/linux-4.4.14/drivers/staging/rdma/hfi1/
H A Duc.c123 switch (wqe->wr.opcode) { hfi1_make_uc_req()
131 if (wqe->wr.opcode == IB_WR_SEND) hfi1_make_uc_req()
160 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) hfi1_make_uc_req()
191 if (wqe->wr.opcode == IB_WR_SEND) hfi1_make_uc_req()
216 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) hfi1_make_uc_req()
271 u32 opcode; hfi1_uc_rcv() local
283 opcode = be32_to_cpu(ohdr->bth[0]); hfi1_uc_rcv()
284 if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode)) hfi1_uc_rcv()
319 opcode >>= 24; hfi1_uc_rcv()
336 switch (opcode) { hfi1_uc_rcv()
352 /* Check for opcode sequence errors. */ hfi1_uc_rcv()
356 if (opcode == OP(SEND_MIDDLE) || hfi1_uc_rcv()
357 opcode == OP(SEND_LAST) || hfi1_uc_rcv()
358 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) hfi1_uc_rcv()
364 if (opcode == OP(RDMA_WRITE_MIDDLE) || hfi1_uc_rcv()
365 opcode == OP(RDMA_WRITE_LAST) || hfi1_uc_rcv()
366 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) hfi1_uc_rcv()
371 if (opcode == OP(SEND_FIRST) || hfi1_uc_rcv()
372 opcode == OP(SEND_ONLY) || hfi1_uc_rcv()
373 opcode == OP(SEND_ONLY_WITH_IMMEDIATE) || hfi1_uc_rcv()
374 opcode == OP(RDMA_WRITE_FIRST) || hfi1_uc_rcv()
375 opcode == OP(RDMA_WRITE_ONLY) || hfi1_uc_rcv()
376 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) hfi1_uc_rcv()
385 switch (opcode) { hfi1_uc_rcv()
405 if (opcode == OP(SEND_ONLY)) hfi1_uc_rcv()
407 else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE)) hfi1_uc_rcv()
441 wc.opcode = IB_WC_RECV; hfi1_uc_rcv()
503 if (opcode == OP(RDMA_WRITE_ONLY))
505 else if (opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) {
545 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
571 qp->r_state = opcode;
H A Drc.c142 if (e->opcode == OP(RDMA_READ_REQUEST)) {
364 switch (wqe->wr.opcode) { hfi1_make_rc_req()
380 if (wqe->wr.opcode == IB_WR_SEND) hfi1_make_rc_req()
419 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) hfi1_make_rc_req()
488 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) { hfi1_make_rc_req()
527 if (wqe->wr.opcode == IB_WR_RDMA_READ) hfi1_make_rc_req()
538 * qp->s_state is normally set to the opcode of the hfi1_make_rc_req()
562 if (wqe->wr.opcode == IB_WR_SEND) hfi1_make_rc_req()
580 * qp->s_state is normally set to the opcode of the hfi1_make_rc_req()
604 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) hfi1_make_rc_req()
622 * qp->s_state is normally set to the opcode of the hfi1_make_rc_req()
800 u32 opcode; reset_psn() local
813 /* Find the work request opcode corresponding to the given PSN. */ reset_psn()
814 opcode = wqe->wr.opcode; reset_psn()
835 opcode = wqe->wr.opcode; reset_psn()
843 switch (opcode) { reset_psn()
901 if (wqe->wr.opcode == IB_WR_RDMA_READ) restart_rc()
968 if (wqe->wr.opcode == IB_WR_RDMA_READ) reset_sending_psn()
990 u32 opcode; hfi1_rc_send_complete() local
1002 opcode = be32_to_cpu(ohdr->bth[0]) >> 24; hfi1_rc_send_complete()
1003 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && hfi1_rc_send_complete()
1004 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { hfi1_rc_send_complete()
1039 wc.opcode = ib_hfi1_wc_opcode[wqe->wr.opcode]; hfi1_rc_send_complete()
1096 wc.opcode = ib_hfi1_wc_opcode[wqe->wr.opcode]; do_rc_completion()
1153 * @opcode: the opcode of the request that resulted in the ACK
1160 static int do_rc_ack(struct hfi1_qp *qp, u32 aeth, u32 psn, int opcode, do_rc_ack() argument
1199 if (wqe->wr.opcode == IB_WR_RDMA_READ && do_rc_ack()
1200 opcode == OP(RDMA_READ_RESPONSE_ONLY) && do_rc_ack()
1214 if ((wqe->wr.opcode == IB_WR_RDMA_READ && do_rc_ack()
1215 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || do_rc_ack()
1216 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || do_rc_ack()
1217 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) && do_rc_ack()
1218 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) { do_rc_ack()
1236 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || do_rc_ack()
1237 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { do_rc_ack()
1242 (wqe->wr.opcode == IB_WR_RDMA_READ || do_rc_ack()
1243 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || do_rc_ack()
1244 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) { do_rc_ack()
1397 if (wqe->wr.opcode == IB_WR_RDMA_READ || rdma_seq_err()
1398 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || rdma_seq_err()
1399 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) rdma_seq_err()
1421 * @opcode: the opcode for this packet
1433 u32 opcode, u32 psn, u32 hdrsize, u32 pmtu, rc_rcv_resp()
1456 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { rc_rcv_resp()
1479 switch (opcode) { rc_rcv_resp()
1484 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) { rc_rcv_resp()
1491 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) || rc_rcv_resp()
1492 opcode != OP(RDMA_READ_RESPONSE_FIRST)) rc_rcv_resp()
1495 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) rc_rcv_resp()
1510 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) rc_rcv_resp()
1529 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE)) rc_rcv_resp()
1544 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd)) rc_rcv_resp()
1568 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) rc_rcv_resp()
1616 * @opcode: the opcode for this packet
1627 struct hfi1_qp *qp, u32 opcode, u32 psn, int diff, rc_rcv_error()
1696 if (!e->opcode) { rc_rcv_error()
1707 switch (opcode) { OP()
1717 if (!e || e->opcode != OP(RDMA_READ_REQUEST)) OP()
1764 if (!e || e->opcode != (u8) opcode || old_req) OP()
1947 u32 bth0, opcode; hfi1_rc_rcv() local
1981 opcode = bth0 >> 24; hfi1_rc_rcv()
1989 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && hfi1_rc_rcv()
1990 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { hfi1_rc_rcv()
1991 rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn, hfi1_rc_rcv()
2001 if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd)) hfi1_rc_rcv()
2006 /* Check for opcode sequence errors. */ hfi1_rc_rcv()
2010 if (opcode == OP(SEND_MIDDLE) || hfi1_rc_rcv()
2011 opcode == OP(SEND_LAST) || hfi1_rc_rcv()
2012 opcode == OP(SEND_LAST_WITH_IMMEDIATE)) hfi1_rc_rcv()
2018 if (opcode == OP(RDMA_WRITE_MIDDLE) || hfi1_rc_rcv()
2019 opcode == OP(RDMA_WRITE_LAST) || hfi1_rc_rcv()
2020 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) hfi1_rc_rcv()
2025 if (opcode == OP(SEND_MIDDLE) || hfi1_rc_rcv()
2026 opcode == OP(SEND_LAST) || hfi1_rc_rcv()
2027 opcode == OP(SEND_LAST_WITH_IMMEDIATE) || hfi1_rc_rcv()
2028 opcode == OP(RDMA_WRITE_MIDDLE) || hfi1_rc_rcv()
2029 opcode == OP(RDMA_WRITE_LAST) || hfi1_rc_rcv()
2030 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) hfi1_rc_rcv()
2044 switch (opcode) { hfi1_rc_rcv()
2082 if (opcode == OP(SEND_ONLY)) hfi1_rc_rcv()
2114 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) || hfi1_rc_rcv()
2115 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) hfi1_rc_rcv()
2116 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; hfi1_rc_rcv()
2118 wc.opcode = IB_WC_RECV; hfi1_rc_rcv()
2172 if (opcode == OP(RDMA_WRITE_FIRST)) hfi1_rc_rcv()
2174 else if (opcode == OP(RDMA_WRITE_ONLY)) hfi1_rc_rcv()
2203 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { OP()
2231 e->opcode = opcode; OP()
2242 qp->r_state = opcode; OP()
2278 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) { OP()
2296 e->atomic_data = (opcode == OP(FETCH_ADD)) ? OP()
2303 e->opcode = opcode; OP()
2309 qp->r_state = opcode; OP()
2328 qp->r_state = opcode;
2393 u32 opcode; hfi1_rc_hdrerr() local
2401 opcode = be32_to_cpu(ohdr->bth[0]); hfi1_rc_hdrerr()
2402 if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode)) hfi1_rc_hdrerr()
2406 opcode >>= 24; hfi1_rc_hdrerr()
2409 if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) { hfi1_rc_hdrerr()
1430 rc_rcv_resp(struct hfi1_ibport *ibp, struct hfi1_other_headers *ohdr, void *data, u32 tlen, struct hfi1_qp *qp, u32 opcode, u32 psn, u32 hdrsize, u32 pmtu, struct hfi1_ctxtdata *rcd) rc_rcv_resp() argument
1626 rc_rcv_error(struct hfi1_other_headers *ohdr, void *data, struct hfi1_qp *qp, u32 opcode, u32 psn, int diff, struct hfi1_ctxtdata *rcd) rc_rcv_error() argument
H A Dtrace.c56 u8 opcode; ibhdr_exhdr_len() local
63 opcode = be32_to_cpu(ohdr->bth[0]) >> 24; ibhdr_exhdr_len()
64 return hdr_len_by_opcode[opcode] == 0 ? ibhdr_exhdr_len()
65 0 : hdr_len_by_opcode[opcode] - (12 + 8); ibhdr_exhdr_len()
84 u8 opcode, parse_everbs_hdrs()
90 switch (opcode) { parse_everbs_hdrs()
82 parse_everbs_hdrs( struct trace_seq *p, u8 opcode, void *ehdrs) parse_everbs_hdrs() argument
/linux-4.4.14/include/scsi/
H A Dsrp.h120 u8 opcode; member in struct:srp_login_req
138 u8 opcode; member in struct:srp_login_rsp
150 u8 opcode; member in struct:srp_login_rej
160 u8 opcode; member in struct:srp_i_logout
166 u8 opcode; member in struct:srp_t_logout
178 u8 opcode; member in struct:srp_tsk_mgmt
196 u8 opcode; member in struct:srp_cmd
228 u8 opcode; member in struct:srp_rsp
244 u8 opcode; member in struct:srp_cred_req
252 u8 opcode; member in struct:srp_cred_rsp
263 u8 opcode; member in struct:srp_aer_req
276 u8 opcode; member in struct:srp_aer_rsp
H A Discsi_proto.h88 uint8_t opcode; member in struct:iscsi_hdr
150 uint8_t opcode; member in struct:iscsi_scsi_req
195 uint8_t opcode; member in struct:iscsi_scsi_rsp
226 uint8_t opcode; member in struct:iscsi_async
254 uint8_t opcode; member in struct:iscsi_nopout
269 uint8_t opcode; member in struct:iscsi_nopin
285 uint8_t opcode; member in struct:iscsi_tm
316 uint8_t opcode; member in struct:iscsi_tm_rsp
343 uint8_t opcode; member in struct:iscsi_r2t_rsp
361 uint8_t opcode; member in struct:iscsi_data
380 uint8_t opcode; member in struct:iscsi_data_rsp
405 uint8_t opcode; member in struct:iscsi_text
423 uint8_t opcode; member in struct:iscsi_text_rsp
440 uint8_t opcode; member in struct:iscsi_login_req
475 uint8_t opcode; member in struct:iscsi_login_rsp
534 uint8_t opcode; member in struct:iscsi_logout
560 uint8_t opcode; member in struct:iscsi_logout_rsp
587 uint8_t opcode; member in struct:iscsi_snack
612 uint8_t opcode; member in struct:iscsi_reject
H A Dscsi_common.h18 #define COMMAND_SIZE(opcode) scsi_command_size_tbl[((opcode) >> 5) & 7]
/linux-4.4.14/arch/parisc/math-emu/
H A Ddriver.c49 /* Major opcode 0c and 0e */
57 /* Major opcode 0c, uid 2 (performance monitoring) */
60 /* Major opcode 2e (fused operations). */
64 /* Major opcode 26 (FMPYSUB) */
65 /* Major opcode 06 (FMPYADD) */
/linux-4.4.14/drivers/scsi/
H A Dnsp32_debug.c47 #define group(opcode) (((opcode) >> 5) & 7)
63 static void print_opcodek(unsigned char opcode) print_opcodek() argument
65 const char **table = commands[ group(opcode) ]; print_opcodek()
69 printk("%s[%02x] ", reserved, opcode); print_opcodek()
72 printk("%s(notext)[%02x] ", unknown, opcode); print_opcodek()
75 printk("%s[%02x] ", vendor, opcode); print_opcodek()
78 if (table[opcode & 0x1f] != unknown) print_opcodek()
79 printk("%s[%02x] ", table[opcode & 0x1f], opcode); print_opcodek()
81 printk("%s[%02x] ", unknown, opcode); print_opcodek()
H A Dps3rom.c100 unsigned char opcode = cmd->cmnd[0]; ps3rom_atapi_request() local
105 __LINE__, opcode); ps3rom_atapi_request()
146 __func__, __LINE__, opcode); ps3rom_atapi_request()
153 __LINE__, opcode, res); ps3rom_atapi_request()
220 unsigned char opcode; ps3rom_queuecommand_lck() local
226 opcode = cmd->cmnd[0]; ps3rom_queuecommand_lck()
232 switch (opcode) { ps3rom_queuecommand_lck()
/linux-4.4.14/drivers/bluetooth/
H A Dhci_vhci.c91 static int __vhci_create_device(struct vhci_data *data, __u8 opcode) __vhci_create_device() argument
101 dev_type = opcode & 0x03; __vhci_create_device()
107 if (opcode & 0x3c) __vhci_create_device()
132 if (opcode & 0x40) __vhci_create_device()
136 if (opcode & 0x80) __vhci_create_device()
150 *skb_put(skb, 1) = opcode; __vhci_create_device()
158 static int vhci_create_device(struct vhci_data *data, __u8 opcode) vhci_create_device() argument
163 err = __vhci_create_device(data, opcode); vhci_create_device()
174 __u8 pkt_type, opcode; vhci_get_user() local
209 opcode = *((__u8 *) skb->data); vhci_get_user()
219 ret = vhci_create_device(data, opcode); vhci_get_user()
H A Dbtmrvl_main.c60 u16 opcode; btmrvl_check_evtpkt() local
63 opcode = __le16_to_cpu(ec->opcode); btmrvl_check_evtpkt()
70 if (hci_opcode_ogf(opcode) == 0x3F) { btmrvl_check_evtpkt()
71 BT_DBG("vendor event skipped: opcode=%#4.4x", btmrvl_check_evtpkt()
72 opcode); btmrvl_check_evtpkt()
175 static int btmrvl_send_sync_cmd(struct btmrvl_private *priv, u16 opcode, btmrvl_send_sync_cmd() argument
193 hdr->opcode = cpu_to_le16(opcode); btmrvl_send_sync_cmd()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dinit.c448 * on every INIT_RAM_RESTRICT_ZM_GROUP opcode. init_ram_restrict()
473 * utility functions used by various init opcode handlers
573 * init opcode handlers
583 u8 opcode = nvbios_rd08(init->bios, init->offset); init_reserved() local
586 switch (opcode) { init_reserved()
595 trace("RESERVED 0x%02x\t", opcode); init_reserved()
603 * INIT_DONE - opcode 0x71
614 * INIT_IO_RESTRICT_PROG - opcode 0x32
651 * INIT_REPEAT - opcode 0x33
677 * INIT_IO_RESTRICT_PLL - opcode 0x34
717 * INIT_END_REPEAT - opcode 0x36
733 * INIT_COPY - opcode 0x37
760 * INIT_NOT - opcode 0x38
772 * INIT_IO_FLAG_CONDITION - opcode 0x39
789 * INIT_DP_CONDITION - opcode 0x3a
837 * INIT_IO_MASK_OR - opcode 0x3b
856 * INIT_IO_OR - opcode 0x3c
875 * INIT_ANDN_REG - opcode 0x47
892 * INIT_OR_REG - opcode 0x48
909 * INIT_INDEX_ADDRESS_LATCHED - opcode 0x49
939 * INIT_IO_RESTRICT_PLL2 - opcode 0x4a
974 * INIT_PLL2 - opcode 0x4b
991 * INIT_I2C_BYTE - opcode 0x4c
1022 * INIT_ZM_I2C_BYTE - opcode 0x4d
1048 * INIT_ZM_I2C - opcode 0x4e
1082 * INIT_TMDS - opcode 0x4f
1108 * INIT_ZM_TMDS_GROUP - opcode 0x50
1135 * INIT_CR_INDEX_ADDRESS_LATCHED - opcode 0x51
1165 * INIT_CR - opcode 0x52
1185 * INIT_ZM_CR - opcode 0x53
1202 * INIT_ZM_CR_GROUP - opcode 0x54
1226 * INIT_CONDITION_TIME - opcode 0x56
1253 * INIT_LTIME - opcode 0x57
1270 * INIT_ZM_REG_SEQUENCE - opcode 0x58
1295 * INIT_PLL_INDIRECT - opcode 0x59
1314 * INIT_ZM_REG_INDIRECT - opcode 0x5a
1333 * INIT_SUB_DIRECT - opcode 0x5b
1359 * INIT_JUMP - opcode 0x5c
1377 * INIT_I2C_IF - opcode 0x5e
1404 * INIT_COPY_NV_REG - opcode 0x5f
1430 * INIT_ZM_INDEX_IO - opcode 0x62
1448 * INIT_COMPUTE_MEM - opcode 0x63
1466 * INIT_RESET - opcode 0x65
1493 * INIT_CONFIGURE_MEM - opcode 0x66
1552 * INIT_CONFIGURE_CLK - opcode 0x67
1586 * INIT_CONFIGURE_PREINIT - opcode 0x68
1612 * INIT_IO - opcode 0x69
1652 * INIT_SUB - opcode 0x6b
1679 * INIT_RAM_CONDITION - opcode 0x6d
1698 * INIT_NV_REG - opcode 0x6e
1716 * INIT_MACRO - opcode 0x6f
1740 * INIT_RESUME - opcode 0x72
1752 * INIT_STRAP_CONDITION - opcode 0x73
1770 * INIT_TIME - opcode 0x74
1791 * INIT_CONDITION - opcode 0x75
1808 * INIT_IO_CONDITION - opcode 0x76
1825 * INIT_ZM_REG16 - opcode 0x77
1842 * INIT_INDEX_IO - opcode 0x78
1864 * INIT_PLL - opcode 0x79
1881 * INIT_ZM_REG - opcode 0x7a
1931 * INIT_GPIO - opcode 0x8e
1947 * INIT_RAM_RESTRICT_ZM_GROUP - opcode 0x8f
1985 * INIT_COPY_ZM_REG - opcode 0x90
2002 * INIT_ZM_REG_GROUP - opcode 0x91
2024 * INIT_XLAT - opcode 0x96
2052 * INIT_ZM_MASK_ADD - opcode 0x97
2073 * INIT_AUXCH - opcode 0x98
2097 * INIT_AUXCH - opcode 0x99
2119 * INIT_I2C_LONG_IF - opcode 0x9a
2158 * INIT_GPIO_NE - opcode 0xa9
2279 u8 opcode = nvbios_rd08(init->bios, init->offset); nvbios_exec() local
2280 if (opcode >= init_opcode_nr || !init_opcode[opcode].exec) { nvbios_exec()
2281 error("unknown opcode 0x%02x\n", opcode); nvbios_exec()
2285 init_opcode[opcode].exec(init); nvbios_exec()
/linux-4.4.14/arch/mips/kernel/
H A Dprocess.c210 return (mmi.mm16_r5_format.opcode == mm_swsp16_op && is_ra_save_ins()
212 (mmi.mm16_m_format.opcode == mm_pool16c_op && is_ra_save_ins()
218 return (mmi.mm_m_format.opcode == mm_pool32b_op && is_ra_save_ins()
222 (mmi.i_format.opcode == mm_sw32_op && is_ra_save_ins()
228 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) && is_ra_save_ins()
249 if ((mmi.mm16_r5_format.opcode == mm_pool16c_op && is_jump_ins()
251 ip->j_format.opcode == mm_jal32_op) is_jump_ins()
253 if (ip->r_format.opcode != mm_pool32a_op || is_jump_ins()
258 if (ip->j_format.opcode == j_op) is_jump_ins()
260 if (ip->j_format.opcode == jal_op) is_jump_ins()
262 if (ip->r_format.opcode != spec_op) is_jump_ins()
283 return (mmi.mm16_r3_format.opcode == mm_pool16d_op && is_sp_move_ins()
285 (mmi.mm16_r5_format.opcode == mm_pool16d_op && is_sp_move_ins()
288 return ip->mm_i_format.opcode == mm_addiu32_op && is_sp_move_ins()
294 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op) is_sp_move_ins()
378 if (ip->j_format.opcode == j_op) get___schedule_addr()
H A Dtraps.c510 static inline int simulate_ll(struct pt_regs *regs, unsigned int opcode) simulate_ll() argument
521 offset = opcode & OFFSET; simulate_ll()
526 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); simulate_ll()
544 regs->regs[(opcode & RT) >> 16] = value; simulate_ll()
549 static inline int simulate_sc(struct pt_regs *regs, unsigned int opcode) simulate_sc() argument
561 offset = opcode & OFFSET; simulate_sc()
566 ((unsigned long)(regs->regs[(opcode & BASE) >> 21]) + offset); simulate_sc()
567 reg = (opcode & RT) >> 16; simulate_sc()
591 * ll uses the opcode of lwc0 and sc uses the opcode of swc0. That is both
597 static int simulate_llsc(struct pt_regs *regs, unsigned int opcode) simulate_llsc() argument
599 if ((opcode & OPCODE) == LL) { simulate_llsc()
602 return simulate_ll(regs, opcode); simulate_llsc()
604 if ((opcode & OPCODE) == SC) { simulate_llsc()
607 return simulate_sc(regs, opcode); simulate_llsc()
652 static int simulate_rdhwr_normal(struct pt_regs *regs, unsigned int opcode) simulate_rdhwr_normal() argument
654 if ((opcode & OPCODE) == SPEC3 && (opcode & FUNC) == RDHWR) { simulate_rdhwr_normal()
655 int rd = (opcode & RD) >> 11; simulate_rdhwr_normal()
656 int rt = (opcode & RT) >> 16; simulate_rdhwr_normal()
666 static int simulate_rdhwr_mm(struct pt_regs *regs, unsigned short opcode) simulate_rdhwr_mm() argument
668 if ((opcode & MM_POOL32A_FUNC) == MM_RDHWR) { simulate_rdhwr_mm()
669 int rd = (opcode & MM_RS) >> 16; simulate_rdhwr_mm()
670 int rt = (opcode & MM_RT) >> 21; simulate_rdhwr_mm()
679 static int simulate_sync(struct pt_regs *regs, unsigned int opcode) simulate_sync() argument
681 if ((opcode & OPCODE) == SPEC0 && (opcode & FUNC) == SYNC) { simulate_sync()
763 static int simulate_fp(struct pt_regs *regs, unsigned int opcode, simulate_fp() argument
766 union mips_instruction inst = { .word = opcode }; simulate_fp()
772 switch (inst.i_format.opcode) { simulate_fp()
938 unsigned int opcode, bcode; do_bp() local
964 opcode = (instr[0] << 16) | instr[1]; do_bp()
965 bcode = (opcode >> 6) & ((1 << 20) - 1); do_bp()
968 if (__get_user(opcode, (unsigned int __user *)epc)) do_bp()
970 bcode = (opcode >> 6) & ((1 << 20) - 1); do_bp()
975 * code starts left to bit 16 instead to bit 6 in the opcode. do_bp()
1029 u32 opcode, tcode = 0; do_tr() local
1045 opcode = (instr[0] << 16) | instr[1]; do_tr()
1047 if (!(opcode & OPCODE)) do_tr()
1048 tcode = (opcode >> 12) & ((1 << 4) - 1); do_tr()
1050 if (__get_user(opcode, (u32 __user *)epc)) do_tr()
1053 if (!(opcode & OPCODE)) do_tr()
1054 tcode = (opcode >> 6) & ((1 << 10) - 1); do_tr()
1075 unsigned int opcode = 0; do_ri() local
1084 likely(get_user(opcode, epc) >= 0)) { do_ri()
1087 status = mipsr2_decoder(regs, opcode, &fcr31); do_ri()
1125 opcode = (mmop[0] << 16) | mmop[1]; do_ri()
1128 status = simulate_rdhwr_mm(regs, opcode); do_ri()
1130 if (unlikely(get_user(opcode, epc) < 0)) do_ri()
1134 status = simulate_llsc(regs, opcode); do_ri()
1137 status = simulate_rdhwr_normal(regs, opcode); do_ri()
1140 status = simulate_sync(regs, opcode); do_ri()
1143 status = simulate_fp(regs, opcode, old_epc, old31); do_ri()
1347 unsigned int opcode; do_cpu() local
1365 opcode = 0; do_cpu()
1378 opcode = (mmop[0] << 16) | mmop[1]; do_cpu()
1381 status = simulate_rdhwr_mm(regs, opcode); do_cpu()
1383 if (unlikely(get_user(opcode, epc) < 0)) do_cpu()
1387 status = simulate_llsc(regs, opcode); do_cpu()
1390 status = simulate_rdhwr_normal(regs, opcode); do_cpu()
1406 * The COP3 opcode space and consequently the CP0.Status.CU3 do_cpu()
H A Duprobes.c15 switch (insn.i_format.opcode) { insn_has_delay_slot()
120 switch (inst.i_format.opcode) { is_trap_insn()
269 * @vaddr: the virtual address to insert the opcode.
287 * @vaddr: the virtual address to insert the opcode.
289 * For mm @mm, restore the original opcode (opcode) at @vaddr.
H A Dkprobes.c39 .opcode = spec_op,
47 .opcode = spec_op,
58 switch (insn.i_format.opcode) { insn_has_delayslot()
128 switch (insn.i_format.opcode) { insn_has_ll_or_sc()
190 p->opcode = *p->addr; arch_prepare_kprobe()
204 *p->addr = p->opcode; arch_disarm_kprobe()
258 union mips_instruction insn = p->opcode; evaluate_branch_instruction()
297 if (p->opcode.word == breakpoint_insn.word || prepare_singlestep()
298 p->opcode.word == breakpoint2_insn.word) prepare_singlestep()
300 else if (insn_has_delayslot(p->opcode)) { prepare_singlestep()
314 * temporarily put back the original opcode to single-step, we
326 if (insn_has_delayslot(p->opcode)) resume_execution()
/linux-4.4.14/arch/x86/kernel/kprobes/
H A Dcore.c163 * Returns non-zero if opcode is boostable.
168 kprobe_opcode_t opcode; can_boost() local
177 opcode = *(opcodes++); can_boost()
179 /* 2nd-byte opcode */ can_boost()
180 if (opcode == 0x0f) { can_boost()
187 switch (opcode & 0xf0) { can_boost()
193 if (0x63 < opcode && opcode < 0x67) can_boost()
196 return (opcode != 0x62 && opcode != 0x67); can_boost()
201 return (0xc1 < opcode && opcode < 0xcc) || opcode == 0xcf; can_boost()
204 return (opcode == 0xd4 || opcode == 0xd5 || opcode == 0xd7); can_boost()
207 return ((opcode & 0x04) || opcode == 0xea); can_boost()
209 if ((opcode & 0x0c) == 0 && opcode != 0xf1) can_boost()
212 return (opcode == 0xf5 || (0xf7 < opcode && opcode < 0xfe)); can_boost()
215 if (opcode == 0x26 || opcode == 0x36 || opcode == 0x3e) can_boost()
218 return (opcode != 0x2e && opcode != 0x9a); can_boost()
251 * On the other hand, in case on normal Kprobe, kp->opcode has a copy __recover_probed_insn()
255 * from it and kp->opcode. __recover_probed_insn()
267 buf[0] = kp->opcode; __recover_probed_insn()
319 if (insn.opcode.bytes[0] == BREAKPOINT_INSTRUCTION) can_probe()
328 * Returns non-zero if opcode modifies the interrupt flag.
368 if (insn.opcode.bytes[0] == BREAKPOINT_INSTRUCTION) __copy_instruction()
425 p->opcode = p->ainsn.insn[0]; arch_copy_kprobe()
452 text_poke(p->addr, &p->opcode, 1); arch_disarm_kprobe()
555 if (p->opcode == BREAKPOINT_INSTRUCTION) setup_singlestep()
803 * temporarily put back the original opcode to single-step, we
H A Dopt.c69 buf[0] = kp->opcode; __recover_optprobed_insn()
196 return ((insn->opcode.bytes[0] == 0xff && insn_is_indirect_jump()
198 insn->opcode.bytes[0] == 0xea); /* Segment based jump */ insn_is_indirect_jump()
206 switch (insn->opcode.bytes[0]) { insn_jump_into_range()
215 if ((insn->opcode.bytes[1] & 0xf0) == 0x80) /* jcc near */ insn_jump_into_range()
219 if ((insn->opcode.bytes[0] & 0xf0) == 0x70) /* jcc short */ insn_jump_into_range()
267 if (insn.opcode.bytes[0] == BREAKPOINT_INSTRUCTION) can_optimize()
/linux-4.4.14/drivers/infiniband/hw/cxgb3/
H A Diwch_cq.c86 PDBG("%s qpid 0x%x type %d opcode %d status 0x%x wrid hi 0x%x " iwch_poll_cq_one()
97 wc->opcode = IB_WC_RECV; iwch_poll_cq_one()
106 wc->opcode = IB_WC_RDMA_WRITE; iwch_poll_cq_one()
109 wc->opcode = IB_WC_RDMA_READ; iwch_poll_cq_one()
116 wc->opcode = IB_WC_SEND; iwch_poll_cq_one()
119 wc->opcode = IB_WC_BIND_MW; iwch_poll_cq_one()
123 wc->opcode = IB_WC_LOCAL_INV; iwch_poll_cq_one()
126 wc->opcode = IB_WC_REG_MR; iwch_poll_cq_one()
129 printk(KERN_ERR MOD "Unexpected opcode %d " iwch_poll_cq_one()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/fuc/
H A Dos.h25 /* MEMX: script opcode definitions */
/linux-4.4.14/drivers/nvme/host/
H A Dlightnvm.c38 __u8 opcode; member in struct:nvme_nvm_hb_rw
54 __u8 opcode; member in struct:nvme_nvm_ph_rw
70 __u8 opcode; member in struct:nvme_nvm_identity
82 __u8 opcode; member in struct:nvme_nvm_l2ptbl
95 __u8 opcode; member in struct:nvme_nvm_getbbtbl
107 __u8 opcode; member in struct:nvme_nvm_setbbtbl
122 __u8 opcode; member in struct:nvme_nvm_erase_blk
282 c.identity.opcode = nvme_nvm_admin_identity; nvme_nvm_identity()
323 c.l2p.opcode = nvme_nvm_admin_get_l2p_tbl; nvme_nvm_get_l2p_tbl()
370 c.get_bb.opcode = nvme_nvm_admin_get_bb_tbl; nvme_nvm_get_bb_tbl()
426 c.set_bb.opcode = nvme_nvm_admin_set_bb_tbl; nvme_nvm_set_bb_tbl()
442 c->ph_rw.opcode = rqd->opcode; nvme_nvm_rqtocmd()
448 if (rqd->opcode == NVM_OP_HBWRITE || rqd->opcode == NVM_OP_HBREAD) nvme_nvm_rqtocmd()
512 c.erase.opcode = NVM_OP_ERASE; nvme_nvm_erase_block()
/linux-4.4.14/net/ceph/
H A Dceph_strings.c22 #define GENERATE_CASE(op, opcode, str) case CEPH_OSD_OP_##op: return (str); ceph_osd_op_name()
H A Dosd_client.c441 static bool osd_req_opcode_valid(u16 opcode) osd_req_opcode_valid() argument
443 switch (opcode) { osd_req_opcode_valid()
444 #define GENERATE_CASE(op, opcode, str) case CEPH_OSD_OP_##op: return true; osd_req_opcode_valid()
459 u16 opcode, u32 flags) _osd_req_op_init()
464 BUG_ON(!osd_req_opcode_valid(opcode)); _osd_req_op_init()
468 op->op = opcode; _osd_req_op_init()
475 unsigned int which, u16 opcode, u32 flags) osd_req_op_init()
477 (void)_osd_req_op_init(osd_req, which, opcode, flags); osd_req_op_init()
482 unsigned int which, u16 opcode, osd_req_op_extent_init()
487 opcode, 0); osd_req_op_extent_init()
490 BUG_ON(opcode != CEPH_OSD_OP_READ && opcode != CEPH_OSD_OP_WRITE && osd_req_op_extent_init()
491 opcode != CEPH_OSD_OP_WRITEFULL && opcode != CEPH_OSD_OP_ZERO && osd_req_op_extent_init()
492 opcode != CEPH_OSD_OP_TRUNCATE); osd_req_op_extent_init()
498 if (opcode == CEPH_OSD_OP_WRITE || opcode == CEPH_OSD_OP_WRITEFULL) osd_req_op_extent_init()
525 u16 opcode, const char *class, const char *method) osd_req_op_cls_init()
528 opcode, 0); osd_req_op_cls_init()
533 BUG_ON(opcode != CEPH_OSD_OP_CALL); osd_req_op_cls_init()
562 u16 opcode, const char *name, const void *value, osd_req_op_xattr_init()
566 opcode, 0); osd_req_op_xattr_init()
570 BUG_ON(opcode != CEPH_OSD_OP_SETXATTR && opcode != CEPH_OSD_OP_CMPXATTR); osd_req_op_xattr_init()
596 unsigned int which, u16 opcode, osd_req_op_watch_init()
600 opcode, 0); osd_req_op_watch_init()
602 BUG_ON(opcode != CEPH_OSD_OP_NOTIFY_ACK && opcode != CEPH_OSD_OP_WATCH); osd_req_op_watch_init()
606 if (opcode == CEPH_OSD_OP_WATCH && flag) osd_req_op_watch_init()
626 * sure older osds don't trip over an unsupported opcode. osd_req_op_alloc_hint_init()
665 pr_err("unrecognized osd opcode %d\n", src->op); osd_req_encode_op()
744 pr_err("unsupported osd opcode %s\n", osd_req_encode_op()
774 int opcode, int flags, ceph_osdc_new_request()
786 BUG_ON(opcode != CEPH_OSD_OP_READ && opcode != CEPH_OSD_OP_WRITE && ceph_osdc_new_request()
787 opcode != CEPH_OSD_OP_ZERO && opcode != CEPH_OSD_OP_TRUNCATE && ceph_osdc_new_request()
788 opcode != CEPH_OSD_OP_CREATE && opcode != CEPH_OSD_OP_DELETE); ceph_osdc_new_request()
804 if (opcode == CEPH_OSD_OP_CREATE || opcode == CEPH_OSD_OP_DELETE) { ceph_osdc_new_request()
805 osd_req_op_init(req, which, opcode, 0); ceph_osdc_new_request()
818 osd_req_op_extent_init(req, which, opcode, objoff, objlen, ceph_osdc_new_request()
2335 u8 opcode = event_work->opcode; do_event_work() local
2338 event->cb(ver, notify_id, opcode, event->data); do_event_work()
2354 u8 opcode; handle_watch_notify() local
2362 ceph_decode_8_safe(&p, end, opcode, bad); handle_watch_notify()
2387 event_work->opcode = opcode; handle_watch_notify()
458 _osd_req_op_init(struct ceph_osd_request *osd_req, unsigned int which, u16 opcode, u32 flags) _osd_req_op_init() argument
474 osd_req_op_init(struct ceph_osd_request *osd_req, unsigned int which, u16 opcode, u32 flags) osd_req_op_init() argument
481 osd_req_op_extent_init(struct ceph_osd_request *osd_req, unsigned int which, u16 opcode, u64 offset, u64 length, u64 truncate_size, u32 truncate_seq) osd_req_op_extent_init() argument
524 osd_req_op_cls_init(struct ceph_osd_request *osd_req, unsigned int which, u16 opcode, const char *class, const char *method) osd_req_op_cls_init() argument
561 osd_req_op_xattr_init(struct ceph_osd_request *osd_req, unsigned int which, u16 opcode, const char *name, const void *value, size_t size, u8 cmp_op, u8 cmp_mode) osd_req_op_xattr_init() argument
595 osd_req_op_watch_init(struct ceph_osd_request *osd_req, unsigned int which, u16 opcode, u64 cookie, u64 version, int flag) osd_req_op_watch_init() argument
769 ceph_osdc_new_request(struct ceph_osd_client *osdc, struct ceph_file_layout *layout, struct ceph_vino vino, u64 off, u64 *plen, unsigned int which, int num_ops, int opcode, int flags, struct ceph_snap_context *snapc, u32 truncate_seq, u64 truncate_size, bool use_mempool) ceph_osdc_new_request() argument
/linux-4.4.14/include/linux/mtd/
H A Dspi-nor.h19 * The first byte returned from the flash after sending opcode SPINOR_OP_RDID.
31 * Note on opcode nomenclature: some opcodes have a format like
33 * of I/O lines used for the opcode, address, and data (respectively). The
34 * FUNCTION has an optional suffix of '4', to represent an opcode which
130 * @erase_opcode: the opcode for erasing a sector
131 * @read_opcode: the read opcode
133 * @program_opcode: the program opcode
172 int (*read_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
173 int (*write_reg)(struct spi_nor *nor, u8 opcode, u8 *buf, int len);
/linux-4.4.14/arch/blackfin/include/uapi/asm/
H A Dsiginfo.h17 #define ILL_ILLPARAOP (__SI_FAULT|2) /* illegal opcode combine ********** */
/linux-4.4.14/arch/arm/include/asm/
H A Dopcodes.h14 extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
23 * Assembler opcode byteswap helpers.
163 * In rare cases it is necessary to assemble an opcode which the
177 * __inst_arm(x): emit the specified ARM opcode
178 * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
179 * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
182 * 16-bit Thumb opcode, depending on whether an ARM or Thumb-2
186 * 32-bit Thumb opcode, depending on whether an ARM or Thumb-2
195 * that the correct opcode gets emitted depending on the instruction set
/linux-4.4.14/net/netfilter/
H A Dnf_conntrack_tftp.c55 switch (ntohs(tfh->opcode)) { tftp_help()
87 pr_debug("Data/ACK opcode\n"); tftp_help()
90 pr_debug("Error opcode\n"); tftp_help()
93 pr_debug("Unknown opcode\n"); tftp_help()
/linux-4.4.14/drivers/atm/
H A Dfore200e.h248 typedef enum opcode { enum
277 /* activate VC command opcode */
281 enum opcode opcode : 8, /* cp opcode */
292 struct activate_opcode opcode; /* activate VC command opcode */ member in struct:activate_block
299 /* deactivate VC command opcode */
303 enum opcode opcode : 8, /* cp opcode */
312 struct deactivate_opcode opcode; /* deactivate VC command opcode */ member in struct:deactivate_block
326 /* set/get OC-3 regs command opcode */
330 enum opcode opcode : 8, /* cp opcode */
343 struct oc3_opcode opcode; /* set/get OC-3 regs command opcode */ member in struct:oc3_block
451 /* get statistics command opcode */
455 enum opcode opcode : 8, /* cp opcode */
464 struct stats_opcode opcode; /* get statistics command opcode */ member in struct:stats_block
478 /* get expansion PROM data command opcode */
482 enum opcode opcode : 8, /* cp opcode */
491 struct prom_opcode opcode; /* get PROM data command opcode */ member in struct:prom_block
499 enum opcode opcode; /* operation code */ member in union:cmd
668 enum opcode opcode; /* initialize command */ member in struct:init_block
/linux-4.4.14/drivers/net/ethernet/cavium/liquidio/
H A Dliquidio_common.h82 (OPCODE_SUBCODE(rh->r.opcode, rh->r.subcode) != \
348 u64 opcode:4; member in struct:octeon_instr_irh
354 u64 ossp:32; /* opcode/subcode specific parameters */
356 u64 ossp:32; /* opcode/subcode specific parameters */
362 u64 opcode:4;
384 u64 opcode:4; member in struct:octeon_rh::__anon6652
389 u64 ossp:32; /** opcode/subcode specific parameters */
392 u64 opcode:4; member in struct:octeon_rh::__anon6653
402 u64 opcode:4; member in struct:octeon_rh::__anon6654
412 u64 opcode:4; member in struct:octeon_rh::__anon6655
423 u64 ossp:32; /** opcode/subcode specific parameters */
428 u64 opcode:4;
438 u64 opcode:4;
448 u64 opcode:4;
457 u64 opcode:4;
H A Docteon_device.c845 oct->dispatch.dlist[i].opcode = 0; octeon_init_dispatch_list()
876 oct->dispatch.dlist[i].opcode = 0; octeon_delete_dispatch_list()
890 octeon_get_dispatch(struct octeon_device *octeon_dev, u16 opcode, octeon_get_dispatch() argument
896 u16 combined_opcode = OPCODE_SUBCODE(opcode, subcode); octeon_get_dispatch()
907 if (!(octeon_dev->dispatch.dlist[idx].opcode)) { octeon_get_dispatch()
912 if (octeon_dev->dispatch.dlist[idx].opcode == combined_opcode) { octeon_get_dispatch()
917 if (((struct octeon_dispatch *)dispatch)->opcode == octeon_get_dispatch()
933 * opcode - opcode for which driver should call the registered function
935 * fn - The function to call when a packet with "opcode" arrives in
940 * arrives in Octeon output queues with "opcode".
949 u16 opcode, octeon_register_dispatch_fn()
955 u16 combined_opcode = OPCODE_SUBCODE(opcode, subcode); octeon_register_dispatch_fn()
961 if (oct->dispatch.dlist[idx].opcode == 0) { octeon_register_dispatch_fn()
962 oct->dispatch.dlist[idx].opcode = combined_opcode; octeon_register_dispatch_fn()
973 * opcode/subcode. octeon_register_dispatch_fn()
975 pfn = octeon_get_dispatch(oct, opcode, subcode); octeon_register_dispatch_fn()
980 "Adding opcode to dispatch list linked list\n"); octeon_register_dispatch_fn()
988 dispatch->opcode = combined_opcode; octeon_register_dispatch_fn()
1002 "Found previously registered dispatch fn for opcode/subcode: %x/%x\n", octeon_register_dispatch_fn()
1003 opcode, subcode); octeon_register_dispatch_fn()
1013 * opcode - driver should unregister the function for this opcode
1016 * Unregister the function set for this opcode+subcode.
1024 octeon_unregister_dispatch_fn(struct octeon_device *oct, u16 opcode, octeon_unregister_dispatch_fn() argument
1030 u16 combined_opcode = OPCODE_SUBCODE(opcode, subcode); octeon_unregister_dispatch_fn()
1043 if (oct->dispatch.dlist[idx].opcode == combined_opcode) { octeon_unregister_dispatch_fn()
1047 oct->dispatch.dlist[idx].opcode = octeon_unregister_dispatch_fn()
1048 ((struct octeon_dispatch *)dispatch)->opcode; octeon_unregister_dispatch_fn()
1057 oct->dispatch.dlist[idx].opcode = 0; octeon_unregister_dispatch_fn()
1066 if (((struct octeon_dispatch *)dispatch)->opcode == octeon_unregister_dispatch_fn()
948 octeon_register_dispatch_fn(struct octeon_device *oct, u16 opcode, u16 subcode, octeon_dispatch_fn_t fn, void *fn_arg) octeon_register_dispatch_fn() argument
H A Docteon_droq.h150 * For a raw mode opcode, the driver dispatches with the device
152 * For non-raw mode opcode, the driver dispatches the recv_pkt
380 /** Register a dispatch function for a opcode/subcode. The driver will call
382 * opcode/subcode in its output queues along with the user specified
385 * @param opcode - the opcode for which the dispatch will be registered.
393 u16 opcode,
397 /** Remove registration for an opcode/subcode. This will delete the mapping for
398 * an opcode/subcode. The dispatch function will be unregistered and will no
399 * longer be called if a packet with the opcode/subcode arrives in the driver
402 * @param opcode - the opcode to be unregistered.
408 u16 opcode,
/linux-4.4.14/include/linux/
H A Dnvme.h295 __u8 opcode; member in struct:nvme_common_command
307 __u8 opcode; member in struct:nvme_rw_command
349 __u8 opcode; member in struct:nvme_dsm_cmd
426 __u8 opcode; member in struct:nvme_identify
438 __u8 opcode; member in struct:nvme_features
451 __u8 opcode; member in struct:nvme_create_cq
465 __u8 opcode; member in struct:nvme_create_sq
479 __u8 opcode; member in struct:nvme_delete_queue
489 __u8 opcode; member in struct:nvme_abort_cmd
499 __u8 opcode; member in struct:nvme_download_firmware
511 __u8 opcode; member in struct:nvme_format_cmd
H A Dmmiotrace.h92 unsigned char opcode; /* one of MMIO_{READ,WRITE,UNKNOWN_OP} */ member in struct:mmiotrace_rw
101 unsigned char opcode; /* MMIO_PROBE or MMIO_UNPROBE */ member in struct:mmiotrace_map
/linux-4.4.14/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_stats.c169 u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, bnx2x_hw_stats_post() local
171 opcode = bnx2x_dmae_opcode_clr_src_reset(opcode); bnx2x_hw_stats_post()
174 dmae->opcode = opcode; bnx2x_hw_stats_post()
221 u32 opcode; bnx2x_stats_pmf_update() local
233 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0); bnx2x_stats_pmf_update()
236 dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC); bnx2x_stats_pmf_update()
247 dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); bnx2x_stats_pmf_update()
269 u32 opcode; bnx2x_port_stats_init() local
283 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, bnx2x_port_stats_init()
289 dmae->opcode = opcode; bnx2x_port_stats_init()
303 dmae->opcode = opcode; bnx2x_port_stats_init()
315 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, bnx2x_port_stats_init()
324 dmae->opcode = opcode; bnx2x_port_stats_init()
337 dmae->opcode = opcode; bnx2x_port_stats_init()
352 dmae->opcode = opcode; bnx2x_port_stats_init()
414 dmae->opcode = opcode; bnx2x_port_stats_init()
426 dmae->opcode = opcode; bnx2x_port_stats_init()
442 dmae->opcode = opcode; bnx2x_port_stats_init()
456 dmae->opcode = opcode; bnx2x_port_stats_init()
471 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, bnx2x_port_stats_init()
501 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, bnx2x_func_stats_init()
1265 u32 opcode; bnx2x_port_stats_stop() local
1271 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0); bnx2x_port_stats_stop()
1277 dmae->opcode = bnx2x_dmae_opcode_add_comp( bnx2x_port_stats_stop()
1278 opcode, DMAE_COMP_GRC); bnx2x_port_stats_stop()
1280 dmae->opcode = bnx2x_dmae_opcode_add_comp( bnx2x_port_stats_stop()
1281 opcode, DMAE_COMP_PCI); bnx2x_port_stats_stop()
1306 dmae->opcode = bnx2x_port_stats_stop()
1307 bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); bnx2x_port_stats_stop()
1414 dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, bnx2x_port_stats_base_init()
/linux-4.4.14/drivers/scsi/megaraid/
H A Dmegaraid_mm.h47 * @opcode :
72 uint8_t opcode; member in struct:mimd::__anon9805::__anon9806
H A Dmegaraid_mm.c279 * handle_drvrcmd - Checks if the opcode is a driver cmd and if it is, handles it.
289 uint8_t opcode; handle_drvrcmd() local
307 opcode = kmimd.ui.fcs.opcode; handle_drvrcmd()
311 * If the opcode is 0x82 and the subopcode is either GET_DRVRVER or handle_drvrcmd()
315 if (opcode != 0x82) handle_drvrcmd()
364 uint8_t opcode; mimd_to_kioc() local
378 opcode = mimd.ui.fcs.opcode; mimd_to_kioc()
389 switch (opcode) { mimd_to_kioc()
395 kioc->opcode = GET_ADAP_INFO; mimd_to_kioc()
412 kioc->opcode = MBOX_CMD; mimd_to_kioc()
427 kioc->opcode = MBOX_CMD; mimd_to_kioc()
448 if (opcode == 0x82) mimd_to_kioc()
807 uint8_t opcode; kioc_to_mimd() local
820 opcode = kmimd.ui.fcs.opcode; kioc_to_mimd()
823 if (opcode == 0x82) { kioc_to_mimd()
/linux-4.4.14/include/uapi/linux/
H A Dnvme_ioctl.h21 __u8 opcode; member in struct:nvme_user_io
36 __u8 opcode; member in struct:nvme_passthru_cmd
/linux-4.4.14/include/linux/mlx5/
H A Dmlx5_ifc.h2573 u8 opcode[0x10]; member in struct:mlx5_ifc_teardown_hca_in_bits
2595 u8 opcode[0x10]; member in struct:mlx5_ifc_sqerr2rts_qp_in_bits
2625 u8 opcode[0x10]; member in struct:mlx5_ifc_sqd2rts_qp_in_bits
2655 u8 opcode[0x10]; member in struct:mlx5_ifc_set_roce_address_in_bits
2684 u8 opcode[0x10]; member in struct:mlx5_ifc_set_mad_demux_in_bits
2707 u8 opcode[0x10]; member in struct:mlx5_ifc_set_l2_table_entry_in_bits
2739 u8 opcode[0x10]; member in struct:mlx5_ifc_set_issi_in_bits
2761 u8 opcode[0x10]; member in struct:mlx5_ifc_set_hca_cap_in_bits
2782 u8 opcode[0x10]; member in struct:mlx5_ifc_set_fte_in_bits
2815 u8 opcode[0x10]; member in struct:mlx5_ifc_rts2rts_qp_in_bits
2845 u8 opcode[0x10]; member in struct:mlx5_ifc_rtr2rts_qp_in_bits
2875 u8 opcode[0x10]; member in struct:mlx5_ifc_rst2init_qp_in_bits
2911 u8 opcode[0x10]; member in struct:mlx5_ifc_query_xrc_srq_in_bits
2946 u8 opcode[0x10]; member in struct:mlx5_ifc_query_vport_state_in_bits
2999 u8 opcode[0x10]; member in struct:mlx5_ifc_query_vport_counter_in_bits
3029 u8 opcode[0x10]; member in struct:mlx5_ifc_query_tis_in_bits
3053 u8 opcode[0x10]; member in struct:mlx5_ifc_query_tir_in_bits
3081 u8 opcode[0x10]; member in struct:mlx5_ifc_query_srq_in_bits
3105 u8 opcode[0x10]; member in struct:mlx5_ifc_query_sq_in_bits
3129 u8 opcode[0x10]; member in struct:mlx5_ifc_query_special_contexts_in_bits
3150 u8 opcode[0x10]; member in struct:mlx5_ifc_query_rqt_in_bits
3174 u8 opcode[0x10]; member in struct:mlx5_ifc_query_rq_in_bits
3198 u8 opcode[0x10]; member in struct:mlx5_ifc_query_roce_address_in_bits
3222 u8 opcode[0x10]; member in struct:mlx5_ifc_query_rmp_in_bits
3254 u8 opcode[0x10]; member in struct:mlx5_ifc_query_qp_in_bits
3300 u8 opcode[0x10]; member in struct:mlx5_ifc_query_q_counter_in_bits
3334 u8 opcode[0x10]; member in struct:mlx5_ifc_query_pages_in_bits
3358 u8 opcode[0x10]; member in struct:mlx5_ifc_query_nic_vport_context_in_bits
3391 u8 opcode[0x10]; member in struct:mlx5_ifc_query_mkey_in_bits
3416 u8 opcode[0x10]; member in struct:mlx5_ifc_query_mad_demux_in_bits
3443 u8 opcode[0x10]; member in struct:mlx5_ifc_query_l2_table_entry_in_bits
3473 u8 opcode[0x10]; member in struct:mlx5_ifc_query_issi_in_bits
3494 u8 opcode[0x10]; member in struct:mlx5_ifc_query_hca_vport_pkey_in_bits
3524 u8 opcode[0x10]; member in struct:mlx5_ifc_query_hca_vport_gid_in_bits
3551 u8 opcode[0x10]; member in struct:mlx5_ifc_query_hca_vport_context_in_bits
3577 u8 opcode[0x10]; member in struct:mlx5_ifc_query_hca_cap_in_bits
3603 u8 opcode[0x10]; member in struct:mlx5_ifc_query_flow_table_in_bits
3632 u8 opcode[0x10]; member in struct:mlx5_ifc_query_fte_in_bits
3684 u8 opcode[0x10]; member in struct:mlx5_ifc_query_flow_group_in_bits
3723 u8 opcode[0x10]; member in struct:mlx5_ifc_query_eq_in_bits
3749 u8 opcode[0x10]; member in struct:mlx5_ifc_query_dct_in_bits
3777 u8 opcode[0x10]; member in struct:mlx5_ifc_query_cq_in_bits
3803 u8 opcode[0x10]; member in struct:mlx5_ifc_query_cong_status_in_bits
3856 u8 opcode[0x10]; member in struct:mlx5_ifc_query_cong_statistics_in_bits
3880 u8 opcode[0x10]; member in struct:mlx5_ifc_query_cong_params_in_bits
3904 u8 opcode[0x10]; member in struct:mlx5_ifc_query_adapter_in_bits
3923 u8 opcode[0x10]; member in struct:mlx5_ifc_qp_2rst_in_bits
3945 u8 opcode[0x10]; member in struct:mlx5_ifc_qp_2err_in_bits
3967 u8 opcode[0x10]; member in struct:mlx5_ifc_page_fault_resume_in_bits
3993 u8 opcode[0x10]; member in struct:mlx5_ifc_nop_in_bits
4012 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_vport_state_in_bits
4037 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_tis_in_bits
4074 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_tir_in_bits
4102 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_sq_in_bits
4138 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_rqt_in_bits
4166 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_rq_in_bits
4202 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_rmp_in_bits
4239 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_nic_vport_context_in_bits
4266 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_hca_vport_context_in_bits
4297 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_cq_in_bits
4325 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_cong_status_in_bits
4350 u8 opcode[0x10]; member in struct:mlx5_ifc_modify_cong_params_in_bits
4386 u8 opcode[0x10]; member in struct:mlx5_ifc_manage_pages_in_bits
4412 u8 opcode[0x10]; member in struct:mlx5_ifc_mad_ifc_in_bits
4437 u8 opcode[0x10]; member in struct:mlx5_ifc_init_hca_in_bits
4456 u8 opcode[0x10]; member in struct:mlx5_ifc_init2rtr_qp_in_bits
4486 u8 opcode[0x10]; member in struct:mlx5_ifc_init2init_qp_in_bits
4520 u8 opcode[0x10]; member in struct:mlx5_ifc_get_dropped_packet_log_in_bits
4530 u8 opcode[0x10]; member in struct:mlx5_ifc_gen_eqe_in_bits
4563 u8 opcode[0x10]; member in struct:mlx5_ifc_enable_hca_in_bits
4585 u8 opcode[0x10]; member in struct:mlx5_ifc_drain_dct_in_bits
4607 u8 opcode[0x10]; member in struct:mlx5_ifc_disable_hca_in_bits
4629 u8 opcode[0x10]; member in struct:mlx5_ifc_detach_from_mcg_in_bits
4653 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_xrc_srq_in_bits
4675 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_tis_in_bits
4697 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_tir_in_bits
4719 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_srq_in_bits
4741 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_sq_in_bits
4763 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_rqt_in_bits
4785 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_rq_in_bits
4807 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_rmp_in_bits
4829 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_qp_in_bits
4851 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_psv_in_bits
4873 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_mkey_in_bits
4895 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_flow_table_in_bits
4922 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_flow_group_in_bits
4951 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_eq_in_bits
4973 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_dct_in_bits
4995 u8 opcode[0x10]; member in struct:mlx5_ifc_destroy_cq_in_bits
5017 u8 opcode[0x10]; member in struct:mlx5_ifc_delete_vxlan_udp_dport_in_bits
5039 u8 opcode[0x10]; member in struct:mlx5_ifc_delete_l2_table_entry_in_bits
5063 u8 opcode[0x10]; member in struct:mlx5_ifc_delete_fte_in_bits
5094 u8 opcode[0x10]; member in struct:mlx5_ifc_dealloc_xrcd_in_bits
5116 u8 opcode[0x10]; member in struct:mlx5_ifc_dealloc_uar_in_bits
5138 u8 opcode[0x10]; member in struct:mlx5_ifc_dealloc_transport_domain_in_bits
5160 u8 opcode[0x10]; member in struct:mlx5_ifc_dealloc_q_counter_in_bits
5182 u8 opcode[0x10]; member in struct:mlx5_ifc_dealloc_pd_in_bits
5207 u8 opcode[0x10]; member in struct:mlx5_ifc_create_xrc_srq_in_bits
5235 u8 opcode[0x10]; member in struct:mlx5_ifc_create_tis_in_bits
5259 u8 opcode[0x10]; member in struct:mlx5_ifc_create_tir_in_bits
5283 u8 opcode[0x10]; member in struct:mlx5_ifc_create_srq_in_bits
5311 u8 opcode[0x10]; member in struct:mlx5_ifc_create_sq_in_bits
5335 u8 opcode[0x10]; member in struct:mlx5_ifc_create_rqt_in_bits
5359 u8 opcode[0x10]; member in struct:mlx5_ifc_create_rq_in_bits
5383 u8 opcode[0x10]; member in struct:mlx5_ifc_create_rmp_in_bits
5407 u8 opcode[0x10]; member in struct:mlx5_ifc_create_qp_in_bits
5448 u8 opcode[0x10]; member in struct:mlx5_ifc_create_psv_in_bits
5474 u8 opcode[0x10]; member in struct:mlx5_ifc_create_mkey_in_bits
5509 u8 opcode[0x10]; member in struct:mlx5_ifc_create_flow_table_in_bits
5549 u8 opcode[0x10]; member in struct:mlx5_ifc_create_flow_group_in_bits
5594 u8 opcode[0x10]; member in struct:mlx5_ifc_create_eq_in_bits
5626 u8 opcode[0x10]; member in struct:mlx5_ifc_create_dct_in_bits
5652 u8 opcode[0x10]; member in struct:mlx5_ifc_create_cq_in_bits
5686 u8 opcode[0x10]; member in struct:mlx5_ifc_config_int_moderation_in_bits
5709 u8 opcode[0x10]; member in struct:mlx5_ifc_attach_to_mcg_in_bits
5737 u8 opcode[0x10]; member in struct:mlx5_ifc_arm_xrc_srq_in_bits
5764 u8 opcode[0x10]; member in struct:mlx5_ifc_arm_rq_in_bits
5787 u8 opcode[0x10]; member in struct:mlx5_ifc_arm_dct_in_bits
5812 u8 opcode[0x10]; member in struct:mlx5_ifc_alloc_xrcd_in_bits
5834 u8 opcode[0x10]; member in struct:mlx5_ifc_alloc_uar_in_bits
5856 u8 opcode[0x10]; member in struct:mlx5_ifc_alloc_transport_domain_in_bits
5878 u8 opcode[0x10]; member in struct:mlx5_ifc_alloc_q_counter_in_bits
5900 u8 opcode[0x10]; member in struct:mlx5_ifc_alloc_pd_in_bits
5919 u8 opcode[0x10]; member in struct:mlx5_ifc_add_vxlan_udp_dport_in_bits
5948 u8 opcode[0x10]; member in struct:mlx5_ifc_access_register_in_bits
6643 u8 opcode[0x10]; member in struct:mlx5_ifc_cmd_in_bits
/linux-4.4.14/drivers/staging/rtl8712/
H A Drtl871x_eeprom.c170 /* Erase this particular word. Write the erase opcode and register r8712_eeprom_write16()
171 * number in that order. The opcode is 3bits in length; reg is 6 r8712_eeprom_write16()
176 * send the write opcode the EEPORM r8712_eeprom_write16()
218 /* write the read opcode and register number in that order r8712_eeprom_read16()
219 * The opcode is 3bits in length, reg is 6 bits long r8712_eeprom_read16()
/linux-4.4.14/arch/tile/kernel/
H A Dftrace.c24 #include <arch/opcode.h>
64 /* opcode: jal addr */ ftrace_gen_branch()
70 /* opcode: j addr */ ftrace_gen_branch()
82 /* opcode: or r10, lr, zero */ ftrace_gen_branch()
90 /* opcode: fnop */ ftrace_gen_branch()
H A Dkgdb.c185 unsigned int opcode; get_step_address() local
197 opcode = get_UnaryOpcodeExtension_Y1(bundle); get_step_address()
199 switch (opcode) { get_step_address()
212 opcode = get_UnaryOpcodeExtension_X1(bundle); get_step_address()
214 switch (opcode) { get_step_address()
225 opcode = get_JumpOpcodeExtension_X1(bundle); get_step_address()
227 switch (opcode) { get_step_address()
237 opcode = get_BrType_X1(bundle); get_step_address()
239 switch (opcode) { get_step_address()
/linux-4.4.14/arch/mips/oprofile/
H A Dbacktrace.c34 return (ip->i_format.opcode == sw_op || ip->i_format.opcode == sd_op) is_ra_save_ins()
43 if (ip->i_format.opcode == addiu_op || ip->i_format.opcode == daddiu_op) is_sp_move_ins()
58 if (ip->i_format.opcode == lui_op && ip->i_format.rt == 28) is_end_of_function_marker()
/linux-4.4.14/tools/firewire/
H A Ddecode-fcp.c136 uint32_t opcode:8; member in struct:avc_frame
153 info = &opcode_info[frame->opcode]; decode_avc()
156 "(unknown opcode 0x%02x)", frame->opcode); decode_avc()
162 printf("av/c %s, subunit_type=%s, subunit_id=%d, opcode=%s", decode_avc()
/linux-4.4.14/drivers/scsi/aic94xx/
H A Daic94xx_task.c218 u8 opcode = dl->opcode; asd_task_tasklet_complete() local
223 switch (opcode) { asd_task_tasklet_complete()
288 opcode = dl->status_block[0]; asd_task_tasklet_complete()
323 ASD_DPRINTK("%s: dl opcode: 0x%x?\n", __func__, opcode); asd_task_tasklet_complete()
348 ASD_DPRINTK("task 0x%p done with opcode 0x%x resp 0x%x " asd_task_tasklet_complete()
350 task, opcode, ts->resp, ts->stat); asd_task_tasklet_complete()
375 scb->header.opcode = CONTROL_ATA_DEV; asd_build_ata_ascb()
377 scb->header.opcode = INITIATE_ATAPI_TASK; asd_build_ata_ascb()
379 scb->header.opcode = INITIATE_ATA_TASK; asd_build_ata_ascb()
446 scb->header.opcode = INITIATE_SMP_TASK; asd_build_smp_ascb()
491 scb->header.opcode = INITIATE_SSP_TASK; asd_build_ssp_ascb()
H A Daic94xx_scb.c397 "index:%d, opcode:0x%02x\n", asd_invalidate_edb()
402 ascb->scb->header.opcode); asd_invalidate_edb()
420 int edb = (dl->opcode & DL_PHY_MASK) - 1; /* [0xc1,0xc7] -> [0,6] */ escb_tasklet_complete()
427 ASD_DPRINTK("edb is 0x%x! dl->opcode is 0x%x\n", escb_tasklet_complete()
428 edb, dl->opcode); escb_tasklet_complete()
433 "index:%d, opcode:0x%02x\n", escb_tasklet_complete()
439 ascb->scb->header.opcode); escb_tasklet_complete()
471 a->scb->header.opcode); escb_tasklet_complete()
593 ASD_DPRINTK("edb is 0x%x! dl->opcode is 0x%x\n", escb_tasklet_complete()
594 edb, dl->opcode); escb_tasklet_complete()
599 "index:%d, opcode:0x%02x\n", escb_tasklet_complete()
605 ascb->scb->header.opcode); escb_tasklet_complete()
657 ASD_DPRINTK("%s: phy%d status block opcode:0x%x\n", control_phy_tasklet_complete()
782 scb->header.opcode = CONTROL_PHY; asd_build_control_phy()
828 u8 opcode = dl->opcode;
832 if (opcode != TC_NO_ERROR) {
834 "0x%x\n", phy_id, link_adm->sub_func, opcode);
837 phy_id, link_adm->sub_func, opcode);
848 scb->header.opcode = INITIATE_LINK_ADM_TASK;
878 ASD_DPRINTK("scb:0x%x timed out\n", ascb->scb->header.opcode); asd_ascb_timedout()
/linux-4.4.14/drivers/net/ethernet/mellanox/mlx4/
H A Dcmd.c65 /* Operation/command not supported or opcode modifier not supported: */
530 vhcr->opcode = cpu_to_be16((((u16) op_modifier) << 12) | (op & 0xfff)); mlx4_slave_cmd()
574 mlx4_err(dev, "failed execution of VHCR_POST command opcode 0x%x\n", op); mlx4_slave_cmd()
1063 .opcode = MLX4_CMD_QUERY_FW,
1072 .opcode = MLX4_CMD_QUERY_HCA,
1081 .opcode = MLX4_CMD_QUERY_DEV_CAP,
1090 .opcode = MLX4_CMD_QUERY_FUNC_CAP,
1099 .opcode = MLX4_CMD_QUERY_ADAPTER,
1108 .opcode = MLX4_CMD_INIT_PORT,
1117 .opcode = MLX4_CMD_CLOSE_PORT,
1126 .opcode = MLX4_CMD_QUERY_PORT,
1135 .opcode = MLX4_CMD_SET_PORT,
1144 .opcode = MLX4_CMD_MAP_EQ,
1153 .opcode = MLX4_CMD_SW2HW_EQ,
1162 .opcode = MLX4_CMD_HW_HEALTH_CHECK,
1171 .opcode = MLX4_CMD_NOP,
1180 .opcode = MLX4_CMD_CONFIG_DEV,
1189 .opcode = MLX4_CMD_ALLOC_RES,
1198 .opcode = MLX4_CMD_FREE_RES,
1207 .opcode = MLX4_CMD_SW2HW_MPT,
1216 .opcode = MLX4_CMD_QUERY_MPT,
1225 .opcode = MLX4_CMD_HW2SW_MPT,
1234 .opcode = MLX4_CMD_READ_MTT,
1243 .opcode = MLX4_CMD_WRITE_MTT,
1252 .opcode = MLX4_CMD_SYNC_TPT,
1261 .opcode = MLX4_CMD_HW2SW_EQ,
1270 .opcode = MLX4_CMD_QUERY_EQ,
1279 .opcode = MLX4_CMD_SW2HW_CQ,
1288 .opcode = MLX4_CMD_HW2SW_CQ,
1297 .opcode = MLX4_CMD_QUERY_CQ,
1306 .opcode = MLX4_CMD_MODIFY_CQ,
1315 .opcode = MLX4_CMD_SW2HW_SRQ,
1324 .opcode = MLX4_CMD_HW2SW_SRQ,
1333 .opcode = MLX4_CMD_QUERY_SRQ,
1342 .opcode = MLX4_CMD_ARM_SRQ,
1351 .opcode = MLX4_CMD_RST2INIT_QP,
1360 .opcode = MLX4_CMD_INIT2INIT_QP,
1369 .opcode = MLX4_CMD_INIT2RTR_QP,
1378 .opcode = MLX4_CMD_RTR2RTS_QP,
1387 .opcode = MLX4_CMD_RTS2RTS_QP,
1396 .opcode = MLX4_CMD_SQERR2RTS_QP,
1405 .opcode = MLX4_CMD_2ERR_QP,
1414 .opcode = MLX4_CMD_RTS2SQD_QP,
1423 .opcode = MLX4_CMD_SQD2SQD_QP,
1432 .opcode = MLX4_CMD_SQD2RTS_QP,
1441 .opcode = MLX4_CMD_2RST_QP,
1450 .opcode = MLX4_CMD_QUERY_QP,
1459 .opcode = MLX4_CMD_SUSPEND_QP,
1468 .opcode = MLX4_CMD_UNSUSPEND_QP,
1477 .opcode = MLX4_CMD_UPDATE_QP,
1486 .opcode = MLX4_CMD_GET_OP_REQ,
1495 .opcode = MLX4_CMD_ALLOCATE_VPP,
1504 .opcode = MLX4_CMD_SET_VPORT_QOS,
1513 .opcode = MLX4_CMD_CONF_SPECIAL_QP,
1522 .opcode = MLX4_CMD_MAD_IFC,
1531 .opcode = MLX4_CMD_MAD_DEMUX,
1540 .opcode = MLX4_CMD_QUERY_IF_STAT,
1549 .opcode = MLX4_CMD_ACCESS_REG,
1558 .opcode = MLX4_CMD_CONGESTION_CTRL_OPCODE,
1568 .opcode = MLX4_CMD_QP_ATTACH,
1577 .opcode = MLX4_CMD_PROMISC,
1587 .opcode = MLX4_CMD_SET_VLAN_FLTR,
1596 .opcode = MLX4_CMD_SET_MCAST_FLTR,
1605 .opcode = MLX4_CMD_DUMP_ETH_STATS,
1614 .opcode = MLX4_CMD_INFORM_FLR_DONE,
1624 .opcode = MLX4_QP_FLOW_STEERING_ATTACH,
1633 .opcode = MLX4_QP_FLOW_STEERING_DETACH,
1642 .opcode = MLX4_FLOW_STEERING_IB_UC_QP_RANGE,
1651 .opcode = MLX4_CMD_VIRT_PORT_MAP,
1702 vhcr->op = be16_to_cpu(vhcr_cmd->opcode) & 0xfff; mlx4_master_process_vhcr()
1703 vhcr->op_modifier = (u8) (be16_to_cpu(vhcr_cmd->opcode) >> 12); mlx4_master_process_vhcr()
1708 if (vhcr->op == cmd_info[i].opcode) { mlx4_master_process_vhcr()
1737 __func__, cmd->opcode); mlx4_master_process_vhcr()
/linux-4.4.14/drivers/net/ethernet/qlogic/qed/
H A Dqed_hw.c347 u32 opcode = 0; qed_dmae_opcode() local
354 opcode |= (is_src_type_grc ? DMAE_CMD_SRC_MASK_GRC qed_dmae_opcode()
357 opcode |= ((p_hwfn->rel_pf_id & DMAE_CMD_SRC_PF_ID_MASK) << qed_dmae_opcode()
361 opcode |= (is_dst_type_grc ? DMAE_CMD_DST_MASK_GRC qed_dmae_opcode()
364 opcode |= ((p_hwfn->rel_pf_id & DMAE_CMD_DST_PF_ID_MASK) << qed_dmae_opcode()
371 opcode |= (DMAE_CMD_COMP_WORD_EN_MASK << DMAE_CMD_COMP_WORD_EN_SHIFT); qed_dmae_opcode()
372 opcode |= (DMAE_CMD_SRC_ADDR_RESET_MASK << qed_dmae_opcode()
376 opcode |= (1 << DMAE_CMD_COMP_FUNC_SHIFT); qed_dmae_opcode()
378 opcode |= (DMAE_CMD_ENDIANITY << DMAE_CMD_ENDIANITY_MODE_SHIFT); qed_dmae_opcode()
380 opcode |= ((p_hwfn->port_id) << DMAE_CMD_PORT_ID_SHIFT); qed_dmae_opcode()
383 opcode |= (DMAE_CMD_SRC_ADDR_RESET_MASK << qed_dmae_opcode()
387 opcode |= (DMAE_CMD_DST_ADDR_RESET_MASK << qed_dmae_opcode()
396 p_hwfn->dmae_info.p_dmae_cmd->opcode = cpu_to_le32(opcode); qed_dmae_opcode()
419 "opcode = [0x%08x,0x%04x] len=0x%x src=0x%x:%x dst=0x%x:%x\n", qed_dmae_post_command()
421 le32_to_cpu(command->opcode), qed_dmae_post_command()
434 "Posting DMAE command [idx %d]: opcode = [0x%08x,0x%04x] len=0x%x src=0x%x:%x dst=0x%x:%x\n", qed_dmae_post_command()
436 le32_to_cpu(command->opcode), qed_dmae_post_command()
H A Dqed_l2.c84 enum qed_filter_opcode opcode; member in struct:qed_filter_ucast
98 enum qed_filter_opcode opcode; member in struct:qed_filter_mcast
813 qed_filter_action(enum qed_filter_opcode opcode) qed_filter_action() argument
817 switch (opcode) { qed_filter_action()
894 switch (p_filter_cmd->opcode) { qed_filter_ucast_common()
951 if (p_filter_cmd->opcode == QED_FILTER_MOVE) { qed_filter_ucast_common()
966 action = qed_filter_action(p_filter_cmd->opcode); qed_filter_ucast_common()
971 p_filter_cmd->opcode); qed_filter_ucast_common()
976 p_first_filter->vport_id = (p_filter_cmd->opcode == qed_filter_ucast_common()
1015 "Unicast filter configured, opcode = %s, type = %s, cmd_cnt = %d, is_rx_filter = %d, is_tx_filter = %d\n", qed_sp_eth_filter_ucast()
1016 (p_filter_cmd->opcode == QED_FILTER_ADD) ? "ADD" : qed_sp_eth_filter_ucast()
1017 ((p_filter_cmd->opcode == QED_FILTER_REMOVE) ? qed_sp_eth_filter_ucast()
1019 ((p_filter_cmd->opcode == QED_FILTER_MOVE) ? qed_sp_eth_filter_ucast()
1109 if (p_filter_cmd->opcode == QED_FILTER_ADD) { qed_sp_eth_filter_mcast()
1149 if (p_filter_cmd->opcode == QED_FILTER_ADD) { qed_sp_eth_filter_mcast()
1182 if ((p_filter_cmd->opcode != QED_FILTER_ADD && qed_filter_mcast_cmd()
1183 (p_filter_cmd->opcode != QED_FILTER_REMOVE)) || qed_filter_mcast_cmd()
1585 ucast.opcode = QED_FILTER_ADD; qed_configure_filter_ucast()
1588 ucast.opcode = QED_FILTER_REMOVE; qed_configure_filter_ucast()
1591 ucast.opcode = QED_FILTER_REPLACE; qed_configure_filter_ucast()
1625 mcast.opcode = QED_FILTER_ADD; qed_configure_filter_mcast()
1628 mcast.opcode = QED_FILTER_REMOVE; qed_configure_filter_mcast()
/linux-4.4.14/drivers/spi/
H A Dspi-bcm63xx-hsspi.c156 u16 opcode = 0; bcm63xx_hsspi_do_txrx() local
166 opcode = HSSPI_OP_READ_WRITE; bcm63xx_hsspi_do_txrx()
168 opcode = HSSPI_OP_WRITE; bcm63xx_hsspi_do_txrx()
170 opcode = HSSPI_OP_READ; bcm63xx_hsspi_do_txrx()
172 if (opcode != HSSPI_OP_READ) bcm63xx_hsspi_do_txrx()
175 if ((opcode == HSSPI_OP_READ && t->rx_nbits == SPI_NBITS_DUAL) || bcm63xx_hsspi_do_txrx()
176 (opcode == HSSPI_OP_WRITE && t->tx_nbits == SPI_NBITS_DUAL)) bcm63xx_hsspi_do_txrx()
177 opcode |= HSSPI_OP_MULTIBIT; bcm63xx_hsspi_do_txrx()
192 __raw_writew(opcode | curr_step, bs->fifo); bcm63xx_hsspi_do_txrx()
/linux-4.4.14/arch/cris/arch-v32/kernel/
H A Dptrace.c277 unsigned long opcode; insn_size() local
281 /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */ insn_size()
282 copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0); insn_size()
283 if (copied != sizeof(opcode)) insn_size()
286 switch ((opcode & 0x0f00) >> 8) { insn_size()
298 if ((opcode & 0xff) == 0xff) insn_size()
304 panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n", insn_size()
305 opcode, pc); insn_size()
/linux-4.4.14/drivers/net/ethernet/intel/ixgb/
H A Dixgb_ee.h35 #define EEPROM_READ_OPCODE 0x6 /* EEPROM read opcode */
36 #define EEPROM_WRITE_OPCODE 0x5 /* EEPROM write opcode */
37 #define EEPROM_ERASE_OPCODE 0x7 /* EEPROM erase opcode */
/linux-4.4.14/drivers/mmc/host/
H A Dusdhi6rol0.c277 int opc = host->mrq ? host->mrq->cmd->opcode : -1; usdhi6_error_code()
295 err, host->wait, host->mrq ? host->mrq->cmd->opcode : -1); usdhi6_error_code()
317 __func__, host->mrq->cmd->opcode, data->sg_len, usdhi6_blk_bounce()
385 sg->offset, host->mrq->cmd->opcode, host->mrq); usdhi6_sg_map()
508 host->mrq->cmd->opcode, host->mrq); usdhi6_sg_advance()
556 mrq->cmd->opcode); usdhi6_dma_complete()
900 host->pg.page, host->head_pg.page, host->wait, mrq->cmd->opcode, usdhi6_request_done()
910 __func__, mrq->cmd->opcode, data ? data->blocks : 0, usdhi6_request_done()
928 u16 opc = cmd->opcode; usdhi6_cmd_flags()
941 if (cmd->opcode == MMC_READ_MULTIPLE_BLOCK || usdhi6_cmd_flags()
942 cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK || usdhi6_cmd_flags()
943 (cmd->opcode == SD_IO_RW_EXTENDED && usdhi6_cmd_flags()
1005 if (cmd->opcode == SD_IO_RW_EXTENDED && data->blocks > 1) { usdhi6_rq_start()
1019 } else if ((cmd->opcode == MMC_READ_MULTIPLE_BLOCK || usdhi6_rq_start()
1020 cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK) && usdhi6_rq_start()
1031 if (cmd->opcode == MMC_READ_MULTIPLE_BLOCK || usdhi6_rq_start()
1032 cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK || usdhi6_rq_start()
1033 (cmd->opcode == SD_IO_RW_EXTENDED && usdhi6_rq_start()
1056 "%s(): request opcode %u, %u blocks of %u bytes in %u segments, %s %s @+0x%x%s\n", usdhi6_rq_start()
1057 __func__, cmd->opcode, data->blocks, data->blksz, usdhi6_rq_start()
1062 dev_dbg(mmc_dev(host->mmc), "%s(): request opcode %u\n", usdhi6_rq_start()
1063 __func__, cmd->opcode); usdhi6_rq_start()
1191 "CMD%d: response expected but is missing!\n", cmd->opcode); usdhi6_resp_read()
1202 else if (cmd->opcode == MMC_READ_MULTIPLE_BLOCK || usdhi6_resp_read()
1203 cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK) usdhi6_resp_read()
1299 switch (mrq->cmd->opcode) { usdhi6_stop_cmd()
1302 if (mrq->stop->opcode == MMC_STOP_TRANSMISSION) { usdhi6_stop_cmd()
1310 mrq->stop->opcode, mrq->cmd->opcode); usdhi6_stop_cmd()
1339 if (cmd->opcode == MMC_READ_MULTIPLE_BLOCK || usdhi6_end_cmd()
1340 (cmd->opcode == SD_IO_RW_EXTENDED && usdhi6_end_cmd()
1346 if (cmd->opcode == MMC_WRITE_MULTIPLE_BLOCK || usdhi6_end_cmd()
1347 (cmd->opcode == SD_IO_RW_EXTENDED && usdhi6_end_cmd()
1521 } else if (cmd->opcode == MMC_APP_CMD) { usdhi6_sd_bh()
1642 host->wait, mrq ? mrq->cmd->opcode : -1, usdhi6_timeout_work()
H A Dsdricoh_cs.c167 static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode, sdricoh_mmc_cmd() argument
177 sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode); sdricoh_mmc_cmd()
179 if (opcode) { sdricoh_mmc_cmd()
271 unsigned char opcode = cmd->opcode; sdricoh_request() local
275 dev_dbg(dev, "sdricoh_request opcode=%i\n", opcode); sdricoh_request()
281 opcode |= 64; sdricoh_request()
283 } else if (opcode == 55) sdricoh_request()
292 cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg); sdricoh_request()
334 "block transfer failed\n", cmd->opcode); sdricoh_request()
H A Dmtk-sd.c620 * stop << 14 | rw << 13 | dtype << 11 | rsptyp << 7 | brk << 6 | opcode msdc_cmd_prepare_raw_cmd()
622 u32 opcode = cmd->opcode; msdc_cmd_prepare_raw_cmd() local
624 u32 rawcmd = (opcode & 0x3f) | ((resp & 0x7) << 7); msdc_cmd_prepare_raw_cmd()
628 if ((opcode == SD_IO_RW_DIRECT && cmd->flags == (unsigned int) -1) || msdc_cmd_prepare_raw_cmd()
629 opcode == MMC_STOP_TRANSMISSION) msdc_cmd_prepare_raw_cmd()
631 else if (opcode == SD_SWITCH_VOLTAGE) msdc_cmd_prepare_raw_cmd()
633 else if (opcode == SD_APP_SEND_SCR || msdc_cmd_prepare_raw_cmd()
634 opcode == SD_APP_SEND_NUM_WR_BLKS || msdc_cmd_prepare_raw_cmd()
635 (opcode == SD_SWITCH && mmc_cmd_type(cmd) == MMC_CMD_ADTC) || msdc_cmd_prepare_raw_cmd()
636 (opcode == SD_APP_SD_STATUS && mmc_cmd_type(cmd) == MMC_CMD_ADTC) || msdc_cmd_prepare_raw_cmd()
637 (opcode == MMC_SEND_EXT_CSD && mmc_cmd_type(cmd) == MMC_CMD_ADTC)) msdc_cmd_prepare_raw_cmd()
643 if (mmc_op_multi(opcode)) { msdc_cmd_prepare_raw_cmd()
684 __func__, cmd->opcode, data->blocks, read); msdc_start_data()
707 __func__, cmd->opcode, cmd->arg, rsp[0], cmd->error); msdc_auto_cmd_done()
717 __func__, cmd->opcode, cmd->arg, host->error); msdc_track_cmd_data()
798 __func__, cmd->opcode, cmd->arg, rsp[0], msdc_cmd_done()
935 if (mmc_op_multi(mrq->cmd->opcode) && mrq->stop && !mrq->stop->error && msdc_data_xfer_next()
986 __func__, mrq->cmd->opcode, data->blocks); msdc_data_xfer_done()
1075 host->mrq, host->mrq->cmd->opcode); msdc_request_timeout()
1078 __func__, host->cmd->opcode); msdc_request_timeout()
1083 __func__, host->mrq->cmd->opcode, msdc_request_timeout()
1312 static int msdc_tune_response(struct mmc_host *mmc, u32 opcode) msdc_tune_response() argument
1325 mmc_send_tuning(mmc, opcode, &cmd_err); msdc_tune_response()
1334 mmc_send_tuning(mmc, opcode, &cmd_err); msdc_tune_response()
1358 static int msdc_tune_data(struct mmc_host *mmc, u32 opcode) msdc_tune_data() argument
1371 ret = mmc_send_tuning(mmc, opcode, NULL); msdc_tune_data()
1381 ret = mmc_send_tuning(mmc, opcode, NULL); msdc_tune_data()
1412 static int msdc_execute_tuning(struct mmc_host *mmc, u32 opcode) msdc_execute_tuning() argument
1418 ret = msdc_tune_response(mmc, opcode); msdc_execute_tuning()
1423 ret = msdc_tune_data(mmc, opcode); msdc_execute_tuning()
H A Drtsx_pci_sdmmc.c111 SD_CMD_START | cmd->opcode); sd_cmd_set_sd_cmd()
227 u8 cmd_idx = (u8)cmd->opcode; sd_send_cmd_get_rsp()
249 if (cmd->opcode == SD_SWITCH_VOLTAGE) { sd_send_cmd_get_rsp()
349 __func__, cmd->opcode, cmd->arg); sd_read_data()
354 if (cmd->opcode == MMC_SEND_TUNING_BLOCK) sd_read_data()
402 __func__, cmd->opcode, cmd->arg); sd_write_data()
456 __func__, cmd->opcode, cmd->arg); sd_read_long_data()
517 __func__, cmd->opcode, cmd->arg); sd_write_long_data()
709 u8 opcode, u8 sample_point) sd_tuning_rx_cmd()
718 cmd.opcode = opcode; sd_tuning_rx_cmd()
731 u8 opcode, u32 *phase_map) sd_tuning_phase()
737 err = sd_tuning_rx_cmd(host, opcode, (u8)i); sd_tuning_phase()
748 static int sd_tuning_rx(struct realtek_pci_sdmmc *host, u8 opcode) sd_tuning_rx() argument
755 err = sd_tuning_phase(host, opcode, &(raw_phase_map[i])); sd_tuning_rx()
789 return (cmd->opcode == SD_IO_RW_EXTENDED) && (data->blksz == 512); sdio_extblock_cmd()
794 return mmc_op_multi(cmd->opcode) || sd_rw_cmd()
795 (cmd->opcode == MMC_READ_SINGLE_BLOCK) || sd_rw_cmd()
796 (cmd->opcode == MMC_WRITE_BLOCK); sd_rw_cmd()
848 if (mmc_op_multi(cmd->opcode) && mrq->stop) sd_request()
866 cmd->opcode, cmd->arg, cmd->error); sd_request()
1273 static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode) sdmmc_execute_tuning() argument
1314 err = sd_tuning_rx(host, opcode); sdmmc_execute_tuning()
708 sd_tuning_rx_cmd(struct realtek_pci_sdmmc *host, u8 opcode, u8 sample_point) sd_tuning_rx_cmd() argument
730 sd_tuning_phase(struct realtek_pci_sdmmc *host, u8 opcode, u32 *phase_map) sd_tuning_phase() argument
H A Drtsx_usb_sdmmc.c116 , cmd->opcode); sd_read_data()
117 if (cmd->opcode == MMC_SEND_TUNING_BLOCK) sd_read_data()
123 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40); sd_read_data()
235 cmd->opcode); sd_write_data()
237 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40); sd_write_data()
300 u8 cmd_idx = (u8)cmd->opcode; sd_send_cmd_get_rsp()
348 if (cmd->opcode == SD_SWITCH_VOLTAGE) { sd_send_cmd_get_rsp()
682 u8 opcode, u8 sample_point) sd_tuning_rx_cmd()
691 cmd.opcode = MMC_SEND_TUNING_BLOCK; sd_tuning_rx_cmd()
704 u8 opcode, u16 *phase_map) sd_tuning_phase()
710 err = sd_tuning_rx_cmd(host, opcode, (u8)i); sd_tuning_phase()
719 static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode) sd_tuning_rx() argument
734 sd_tuning_phase(host, opcode, &(raw_phase_map[i])); sd_tuning_rx()
846 if (cmd->opcode == SD_IO_SEND_OP_COND || sdmmc_request()
847 cmd->opcode == SD_IO_RW_DIRECT || sdmmc_request()
848 cmd->opcode == SD_IO_RW_EXTENDED) { sdmmc_request()
864 } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) || sdmmc_request()
865 mmc_op_multi(cmd->opcode)) { sdmmc_request()
871 if (mmc_op_multi(cmd->opcode) && mrq->stop) { sdmmc_request()
1268 static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode) sdmmc_execute_tuning() argument
681 sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host, u8 opcode, u8 sample_point) sd_tuning_rx_cmd() argument
703 sd_tuning_phase(struct rtsx_usb_sdmmc *host, u8 opcode, u16 *phase_map) sd_tuning_phase() argument
/linux-4.4.14/arch/x86/kernel/
H A Dalternative.c272 void *text_poke_early(void *addr, const void *opcode, size_t len);
277 static inline bool is_jmp(const u8 opcode) is_jmp() argument
279 return opcode == 0xeb || opcode == 0xe9; is_jmp()
654 * @opcode: source of the copy
663 void *__init_or_module text_poke_early(void *addr, const void *opcode, text_poke_early() argument
668 memcpy(addr, opcode, len); text_poke_early()
679 * @opcode: source of the copy
689 void *text_poke(void *addr, const void *opcode, size_t len) text_poke() argument
710 memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len); text_poke()
719 BUG_ON(((char *)addr)[i] != ((char *)opcode)[i]); text_poke()
753 * @opcode: opcode of new instruction
767 * replacing opcode
772 void *text_poke_bp(void *addr, const void *opcode, size_t len, void *handler) text_poke_bp() argument
793 (const char *) opcode + sizeof(int3), text_poke_bp()
804 text_poke(addr, opcode, sizeof(int3)); text_poke_bp()
H A Dstep.c57 unsigned char opcode[15]; is_setting_trap_flag() local
60 copied = access_process_vm(child, addr, opcode, sizeof(opcode), 0); is_setting_trap_flag()
62 switch (opcode[i]) { is_setting_trap_flag()
69 /* opcode and address size prefixes */ is_setting_trap_flag()
H A Dtest_nx.c107 static unsigned char test_data = 0xC3; /* 0xC3 is the opcode for "ret" */
112 /* 0xC3 is the opcode for "ret" */ test_NX()
131 heap[0] = 0xC3; /* opcode for "ret" */ test_NX()
/linux-4.4.14/drivers/media/firewire/
H A Dfiredtv-avc.c81 u8 opcode; member in struct:avc_command_frame
88 u8 opcode; member in struct:avc_response_frame
164 static const char *debug_fcp_opcode(unsigned int opcode, debug_fcp_opcode() argument
167 switch (opcode) { debug_fcp_opcode()
208 unsigned int subunit_type, subunit_id, opcode; debug_fcp() local
214 opcode = subunit_type == 0x1e || subunit_id == 5 ? ~0 : data[2]; debug_fcp()
215 op = debug_fcp_opcode(opcode, data, length); debug_fcp()
268 return r->opcode == AVC_OPCODE_VENDOR && is_register_rc()
342 c->opcode = AVC_OPCODE_VENDOR; avc_tuner_tuneqpsk()
423 c->opcode = AVC_OPCODE_DSD; avc_tuner_dsd_dvb_c()
491 c->opcode = AVC_OPCODE_DSD; avc_tuner_dsd_dvb_t()
639 c->opcode = AVC_OPCODE_DSD; avc_tuner_set_pids()
682 c->opcode = AVC_OPCODE_DSIT; avc_tuner_get_ts()
723 c->opcode = AVC_OPCODE_READ_DESCRIPTOR; avc_identify_subunit()
763 c->opcode = AVC_OPCODE_READ_DESCRIPTOR; avc_tuner_status()
844 c->opcode = AVC_OPCODE_VENDOR; avc_lnb_control()
888 c->opcode = AVC_OPCODE_VENDOR; avc_register_remote_control()
925 c->opcode = AVC_OPCODE_VENDOR;
981 c->opcode = AVC_OPCODE_VENDOR; avc_ca_app_info()
1022 c->opcode = AVC_OPCODE_VENDOR; avc_ca_info()
1071 c->opcode = AVC_OPCODE_VENDOR; avc_ca_reset()
1113 c->opcode = AVC_OPCODE_VENDOR; avc_ca_pmt()
1239 c->opcode = AVC_OPCODE_VENDOR; avc_ca_get_time_date()
1272 c->opcode = AVC_OPCODE_VENDOR; avc_ca_enter_menu()
1302 c->opcode = AVC_OPCODE_VENDOR; avc_ca_get_mmi()
/linux-4.4.14/arch/arc/kernel/
H A Dkgdb.c80 uint16_t opcode[2]; member in struct:single_step_data_t
93 &single_step_data.opcode[i], undo_single_step()
120 place_trap(single_step_data.address[0], &single_step_data.opcode[0]); do_single_step()
124 &single_step_data.opcode[1]); do_single_step()
/linux-4.4.14/arch/c6x/include/asm/
H A Dtraps.h23 #define EXCEPT_CAUSE_OPX (1 << 3) /* opcode exception */
/linux-4.4.14/arch/powerpc/perf/
H A Dbhrb.S12 #include <asm/ppc-opcode.h>
/linux-4.4.14/arch/ia64/kernel/
H A Dbrl_emu.c58 unsigned long opcode, btype, qp, offset, cpl; ia64_emulate_brl() local
81 opcode = (bundle[1] >> 60); ia64_emulate_brl()
91 switch(opcode) { ia64_emulate_brl()
180 * Unknown opcode. ia64_emulate_brl()
/linux-4.4.14/arch/avr32/include/asm/
H A Dbug.h14 * According to our Chief Architect, this compact opcode is very
/linux-4.4.14/arch/arm/mm/
H A Dabort-macro.S17 and \tmp, \tmp, # 0xfe00 @ Mask opcode field
/linux-4.4.14/drivers/spmi/
H A Dspmi.c99 spmi_cmd(struct spmi_controller *ctrl, u8 opcode, u8 sid) spmi_cmd() argument
106 ret = ctrl->cmd(ctrl, opcode, sid); spmi_cmd()
107 trace_spmi_cmd(opcode, sid, ret); spmi_cmd()
111 static inline int spmi_read_cmd(struct spmi_controller *ctrl, u8 opcode, spmi_read_cmd() argument
119 trace_spmi_read_begin(opcode, sid, addr); spmi_read_cmd()
120 ret = ctrl->read_cmd(ctrl, opcode, sid, addr, buf, len); spmi_read_cmd()
121 trace_spmi_read_end(opcode, sid, addr, ret, len, buf); spmi_read_cmd()
125 static inline int spmi_write_cmd(struct spmi_controller *ctrl, u8 opcode, spmi_write_cmd() argument
133 trace_spmi_write_begin(opcode, sid, addr, len, buf); spmi_write_cmd()
134 ret = ctrl->write_cmd(ctrl, opcode, sid, addr, buf, len); spmi_write_cmd()
135 trace_spmi_write_end(opcode, sid, addr, ret); spmi_write_cmd()
/linux-4.4.14/drivers/infiniband/core/
H A Dud_header.c155 { STRUCT_FIELD(bth, opcode),
267 header->bth.opcode = IB_OPCODE_UD_SEND_ONLY_WITH_IMMEDIATE; ib_ud_header_init()
269 header->bth.opcode = IB_OPCODE_UD_SEND_ONLY; ib_ud_header_init()
386 switch (header->bth.opcode) { ib_ud_header_unpack()
394 printk(KERN_WARNING "Invalid BTH.opcode 0x%02x\n", ib_ud_header_unpack()
395 header->bth.opcode); ib_ud_header_unpack()
/linux-4.4.14/arch/x86/platform/intel/
H A Diosf_mbi.c101 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) iosf_mbi_read() argument
113 mcr = iosf_mbi_form_mcr(opcode, port, offset & MBI_MASK_LO); iosf_mbi_read()
124 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr) iosf_mbi_write() argument
136 mcr = iosf_mbi_form_mcr(opcode, port, offset & MBI_MASK_LO); iosf_mbi_write()
147 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask) iosf_mbi_modify() argument
160 mcr = iosf_mbi_form_mcr(opcode, port, offset & MBI_MASK_LO); iosf_mbi_modify()
/linux-4.4.14/drivers/video/fbdev/
H A Dmetronomefb.c312 u16 opcode; metronome_display_cmd() local
316 we can't immediately set the opcode since the controller metronome_display_cmd()
318 so we just set cs here and set the opcode at the end */ metronome_display_cmd()
320 if (par->metromem_cmd->opcode == 0xCC40) metronome_display_cmd()
321 opcode = cs = 0xCC41; metronome_display_cmd()
323 opcode = cs = 0xCC40; metronome_display_cmd()
336 par->metromem_cmd->opcode = opcode; /* display cmd */ metronome_display_cmd()
347 par->metromem_cmd->opcode = 0x1234; /* pwr up pseudo cmd */ metronome_powerup_cmd()
348 cs = par->metromem_cmd->opcode; metronome_powerup_cmd()
373 we can't immediately set the opcode since the controller metronome_config_cmd()
383 par->metromem_cmd->opcode = 0xCC10; /* config cmd */ metronome_config_cmd()
394 we can't immediately set the opcode since the controller metronome_init_cmd()
396 so we just set cs here and set the opcode at the end */ metronome_init_cmd()
409 par->metromem_cmd->opcode = 0xCC20; /* init cmd */ metronome_init_cmd()
/linux-4.4.14/drivers/net/ethernet/chelsio/cxgb3/
H A Dcxgb3_offload.c767 t3c_tid->client->handlers[p->opcode]) { do_stid_rpl()
768 return t3c_tid->client->handlers[p->opcode] (dev, skb, do_stid_rpl()
772 dev->name, p->opcode); do_stid_rpl()
785 t3c_tid->client->handlers[p->opcode]) { do_hwtid_rpl()
786 return t3c_tid->client->handlers[p->opcode] do_hwtid_rpl()
790 dev->name, p->opcode); do_hwtid_rpl()
852 t3c_tid->client->handlers[p->opcode]) { do_abort_req_rss()
853 return t3c_tid->client->handlers[p->opcode] do_abort_req_rss()
947 unsigned int opcode = get_opcode(skb); do_term() local
952 t3c_tid->client->handlers[opcode]) { do_term()
953 return t3c_tid->client->handlers[opcode] (dev, skb, do_term()
957 dev->name, opcode); do_term()
988 * Process a received packet with an unknown/unexpected CPL opcode.
997 * Handlers for each CPL opcode
1005 void t3_register_cpl_handler(unsigned int opcode, cpl_handler_func h) t3_register_cpl_handler() argument
1007 if (opcode < NUM_CPL_CMDS) t3_register_cpl_handler()
1008 cpl_handlers[opcode] = h ? h : do_bad_cpl; t3_register_cpl_handler()
1010 pr_err("T3C: handler registration for opcode %x failed\n", t3_register_cpl_handler()
1011 opcode); t3_register_cpl_handler()
1023 unsigned int opcode = get_opcode(skb); process_rx() local
1024 int ret = cpl_handlers[opcode] (dev, skb); process_rx()
1030 pr_err("%s: CPL message (opcode %u) had unknown TID %u\n", process_rx()
1031 dev->name, opcode, G_TID(ntohl(p->opcode_tid))); process_rx()
/linux-4.4.14/net/nfc/nci/
H A Dcore.c342 __u16 opcode; member in struct:nci_cmd_param
352 nci_send_cmd(ndev, param->opcode, param->len, param->payload); nci_generic_req()
359 param.opcode = nci_opcode_pack(NCI_GID_PROPRIETARY, oid); nci_prop_cmd()
368 int nci_core_cmd(struct nci_dev *ndev, __u16 opcode, size_t len, __u8 *payload) nci_core_cmd() argument
372 param.opcode = opcode; nci_core_cmd()
1242 int nci_send_cmd(struct nci_dev *ndev, __u16 opcode, __u8 plen, void *payload) nci_send_cmd() argument
1247 pr_debug("opcode 0x%x, plen %d\n", opcode, plen); nci_send_cmd()
1256 hdr->gid = nci_opcode_gid(opcode); nci_send_cmd()
1257 hdr->oid = nci_opcode_oid(opcode); nci_send_cmd()
1276 __u16 opcode) ops_cmd_lookup()
1286 if (op->opcode == opcode) ops_cmd_lookup()
1319 int nci_prop_rsp_packet(struct nci_dev *ndev, __u16 opcode, nci_prop_rsp_packet() argument
1322 return nci_op_rsp_packet(ndev, opcode, skb, ndev->ops->prop_ops, nci_prop_rsp_packet()
1326 int nci_prop_ntf_packet(struct nci_dev *ndev, __u16 opcode, nci_prop_ntf_packet() argument
1329 return nci_op_ntf_packet(ndev, opcode, skb, ndev->ops->prop_ops, nci_prop_ntf_packet()
1333 int nci_core_rsp_packet(struct nci_dev *ndev, __u16 opcode, nci_core_rsp_packet() argument
1336 return nci_op_rsp_packet(ndev, opcode, skb, ndev->ops->core_ops, nci_core_rsp_packet()
1340 int nci_core_ntf_packet(struct nci_dev *ndev, __u16 opcode, nci_core_ntf_packet() argument
1343 return nci_op_ntf_packet(ndev, opcode, skb, ndev->ops->core_ops, nci_core_ntf_packet()
1274 ops_cmd_lookup(struct nci_driver_ops *ops, size_t n_ops, __u16 opcode) ops_cmd_lookup() argument
/linux-4.4.14/drivers/staging/rdma/ehca/
H A Dhcp_if.c93 static long ehca_plpar_hcall_norets(unsigned long opcode, ehca_plpar_hcall_norets() argument
107 ehca_gen_dbg("opcode=%lx " HCALL7_REGS_FORMAT, ehca_plpar_hcall_norets()
108 opcode, arg1, arg2, arg3, arg4, arg5, arg6, arg7); ehca_plpar_hcall_norets()
115 ret = plpar_hcall_norets(opcode, arg1, arg2, arg3, arg4, ehca_plpar_hcall_norets()
128 ehca_gen_err("opcode=%lx ret=%li " HCALL7_REGS_FORMAT, ehca_plpar_hcall_norets()
129 opcode, ret, arg1, arg2, arg3, ehca_plpar_hcall_norets()
133 ehca_gen_dbg("opcode=%lx ret=%li", opcode, ret); ehca_plpar_hcall_norets()
141 static long ehca_plpar_hcall9(unsigned long opcode, ehca_plpar_hcall9() argument
158 ehca_gen_dbg("INPUT -- opcode=%lx " HCALL9_REGS_FORMAT, opcode, ehca_plpar_hcall9()
167 ret = plpar_hcall9(opcode, outs, ehca_plpar_hcall9()
181 ehca_gen_err("INPUT -- opcode=%lx " HCALL9_REGS_FORMAT, ehca_plpar_hcall9()
182 opcode, arg1, arg2, arg3, arg4, arg5, ehca_plpar_hcall9()
H A Dehca_reqs.c121 "send_flags=%x opcode=%x", idx, ud_wr->wr.wr_id, trace_ud_wr()
123 ud_wr->.wr.opcode); trace_ud_wr()
183 switch (send_wr->opcode) { ehca_write_swqe()
196 ehca_gen_err("Invalid opcode=%x", send_wr->opcode); ehca_write_swqe()
197 return -EINVAL; /* invalid opcode */ ehca_write_swqe()
200 wqe_p->wqef = (send_wr->opcode) & WQEF_HIGH_NIBBLE; ehca_write_swqe()
211 if (send_wr->opcode == IB_WR_SEND_WITH_IMM || ehca_write_swqe()
212 send_wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM) { ehca_write_swqe()
293 if (send_wr->opcode == IB_WR_RDMA_READ) { ehca_write_swqe()
473 circ_wr.opcode = IB_WR_RDMA_READ; ehca_post_send()
610 * ib_wc_opcode table converts ehca wc opcode to ib
611 * Since we use zero to indicate invalid opcode, the actual ib opcode must
759 wc->opcode = ib_wc_opcode[cqe->optype]-1; ehca_poll_cq_one()
760 if (unlikely(wc->opcode == -1)) { ehca_poll_cq_one()
835 wc->opcode = IB_WC_SEND; generate_flush_cqes()
838 wc->opcode = IB_WC_RDMA_WRITE; generate_flush_cqes()
841 wc->opcode = IB_WC_RDMA_READ; generate_flush_cqes()
849 wc->opcode = IB_WC_RECV; generate_flush_cqes()
/linux-4.4.14/fs/coda/
H A Dpsdev.c108 /* Peek at the opcode, uniquefier */ coda_psdev_write()
112 if (DOWNCALL(hdr.opcode)) { coda_psdev_write()
118 hdr.opcode, hdr.unique); coda_psdev_write()
124 hdr.opcode, hdr.unique); coda_psdev_write()
135 error = coda_downcall(vcp, hdr.opcode, dcbuf); coda_psdev_write()
162 __func__, hdr.opcode, hdr.unique); coda_psdev_write()
171 hdr.opcode, hdr.unique); coda_psdev_write()
/linux-4.4.14/include/linux/ceph/
H A Dosd_client.h199 u8 opcode; member in struct:ceph_osd_event_work
252 unsigned int which, u16 opcode, u32 flags);
261 unsigned int which, u16 opcode,
303 unsigned int which, u16 opcode,
306 u16 opcode, const char *name, const void *value,
309 unsigned int which, u16 opcode,
332 int opcode, int flags,
/linux-4.4.14/drivers/staging/lustre/lustre/ptlrpc/
H A Dlproc_ptlrpc.c47 __u32 opcode; member in struct:ll_rpc_opcode
138 __u32 opcode; member in struct:ll_eopcode
157 const char *ll_opcode2str(__u32 opcode) ll_opcode2str() argument
160 * 1) A new opcode was added in include/lustre/lustre_idl.h, ll_opcode2str()
162 * or 2) The opcode space was renumbered or rearranged, ll_opcode2str()
166 __u32 offset = opcode_offset(opcode); ll_opcode2str()
171 LASSERTF(ll_rpc_opcode_table[offset].opcode == opcode, ll_opcode2str()
172 "ll_rpc_opcode_table[%u].opcode %u != opcode %u\n", ll_opcode2str()
173 offset, ll_rpc_opcode_table[offset].opcode, opcode); ll_opcode2str()
177 static const char *ll_eopcode2str(__u32 opcode) ll_eopcode2str() argument
179 LASSERT(ll_eopcode_table[opcode].opcode == opcode); ll_eopcode2str()
180 return ll_eopcode_table[opcode].opname; ll_eopcode2str()
240 __u32 opcode = ll_rpc_opcode_table[i].opcode; ptlrpc_ldebugfs_register() local
244 ll_opcode2str(opcode), "usec"); ptlrpc_ldebugfs_register()
1158 LASSERTF(0, "unsupported opcode %u\n", idx); ptlrpc_lprocfs_brw()
/linux-4.4.14/kernel/bpf/
H A Dverifier.c388 u8 opcode = BPF_OP(insn->code); print_bpf_insn() local
390 if (opcode == BPF_CALL) { print_bpf_insn()
1018 u8 opcode = BPF_OP(insn->code); check_alu_op() local
1021 if (opcode == BPF_END || opcode == BPF_NEG) { check_alu_op()
1022 if (opcode == BPF_NEG) { check_alu_op()
1053 } else if (opcode == BPF_MOV) { check_alu_op()
1100 } else if (opcode > BPF_END) { check_alu_op()
1101 verbose("invalid BPF_ALU opcode %x\n", opcode); check_alu_op()
1129 if ((opcode == BPF_MOD || opcode == BPF_DIV) && check_alu_op()
1135 if ((opcode == BPF_LSH || opcode == BPF_RSH || check_alu_op()
1136 opcode == BPF_ARSH) && BPF_SRC(insn->code) == BPF_K) { check_alu_op()
1146 if (opcode == BPF_ADD && BPF_CLASS(insn->code) == BPF_ALU64 && check_alu_op()
1180 u8 opcode = BPF_OP(insn->code); check_cond_jmp_op() local
1183 if (opcode > BPF_EXIT) { check_cond_jmp_op()
1184 verbose("invalid BPF_JMP opcode %x\n", opcode); check_cond_jmp_op()
1218 (opcode == BPF_JEQ || opcode == BPF_JNE) && check_cond_jmp_op()
1221 if (opcode == BPF_JEQ) { check_cond_jmp_op()
1242 insn->imm == 0 && (opcode == BPF_JEQ || check_cond_jmp_op()
1243 opcode == BPF_JNE) && check_cond_jmp_op()
1245 if (opcode == BPF_JEQ) { check_cond_jmp_op()
1262 (opcode == BPF_JEQ || opcode == BPF_JNE)) { check_cond_jmp_op()
1264 if (opcode == BPF_JEQ) { check_cond_jmp_op()
1518 u8 opcode = BPF_OP(insns[t].code); check_cfg() local
1520 if (opcode == BPF_EXIT) { check_cfg()
1522 } else if (opcode == BPF_CALL) { check_cfg()
1528 } else if (opcode == BPF_JA) { check_cfg()
1877 u8 opcode = BPF_OP(insn->code); do_check() local
1879 if (opcode == BPF_CALL) { do_check()
1892 } else if (opcode == BPF_JA) { do_check()
1904 } else if (opcode == BPF_EXIT) { do_check()
/linux-4.4.14/drivers/net/ethernet/ibm/ehea/
H A Dehea_phyp.c49 static long ehea_plpar_hcall_norets(unsigned long opcode, ehea_plpar_hcall_norets() argument
62 ret = plpar_hcall_norets(opcode, arg1, arg2, arg3, arg4, ehea_plpar_hcall_norets()
72 pr_err("opcode=%lx ret=%lx" ehea_plpar_hcall_norets()
75 opcode, ret, ehea_plpar_hcall_norets()
84 static long ehea_plpar_hcall9(unsigned long opcode, ehea_plpar_hcall9() argument
101 ret = plpar_hcall9(opcode, outs, ehea_plpar_hcall9()
114 && (opcode == H_MODIFY_HEA_PORT)) ehea_plpar_hcall9()
118 pr_err("opcode=%lx ret=%lx" ehea_plpar_hcall9()
125 opcode, ret, ehea_plpar_hcall9()
/linux-4.4.14/drivers/infiniband/hw/mthca/
H A Dmthca_cq.c127 u8 opcode; member in struct:mthca_cqe
141 u8 opcode; member in struct:mthca_err_cqe
271 if ((cqe->opcode & MTHCA_ERROR_CQE_OPCODE_MASK) == is_recv_cqe()
273 return !(cqe->opcode & 0x01); is_recv_cqe()
515 is_error = (cqe->opcode & MTHCA_ERROR_CQE_OPCODE_MASK) == mthca_poll_one()
517 is_send = is_error ? cqe->opcode & 0x01 : cqe->is_send & 0x80; mthca_poll_one()
584 switch (cqe->opcode) { mthca_poll_one()
586 entry->opcode = IB_WC_RDMA_WRITE; mthca_poll_one()
589 entry->opcode = IB_WC_RDMA_WRITE; mthca_poll_one()
593 entry->opcode = IB_WC_SEND; mthca_poll_one()
596 entry->opcode = IB_WC_SEND; mthca_poll_one()
600 entry->opcode = IB_WC_RDMA_READ; mthca_poll_one()
604 entry->opcode = IB_WC_COMP_SWAP; mthca_poll_one()
608 entry->opcode = IB_WC_FETCH_ADD; mthca_poll_one()
612 entry->opcode = IB_WC_BIND_MW; mthca_poll_one()
615 entry->opcode = MTHCA_OPCODE_INVALID; mthca_poll_one()
620 switch (cqe->opcode & 0x1f) { mthca_poll_one()
625 entry->opcode = IB_WC_RECV; mthca_poll_one()
631 entry->opcode = IB_WC_RECV_RDMA_WITH_IMM; mthca_poll_one()
635 entry->opcode = IB_WC_RECV; mthca_poll_one()
/linux-4.4.14/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_io.c56 53-55 desc_cnt, 56-57 owner, 58-63 opcode
98 /* opcode field in status_desc */
376 u8 opcode = 0, inner_hdr_len = 0, outer_hdr_len = 0, total_hdr_len = 0; qlcnic_tx_encap_pkt() local
382 opcode = QLCNIC_TX_ETHER_PKT; qlcnic_tx_encap_pkt()
425 opcode = QLCNIC_TX_ENCAP_LSO; qlcnic_tx_encap_pkt()
436 opcode = QLCNIC_TX_ENCAP_PKT; qlcnic_tx_encap_pkt()
454 qlcnic_set_tx_flags_opcode(first_desc, flags, opcode); qlcnic_tx_encap_pkt()
463 u8 l4proto, opcode = 0, hdr_len = 0; qlcnic_tx_pkt() local
491 qlcnic_set_tx_flags_opcode(first_desc, flags, opcode); qlcnic_tx_pkt()
497 opcode = QLCNIC_TX_ETHER_PKT; qlcnic_tx_pkt()
502 opcode = (protocol == ETH_P_IPV6) ? QLCNIC_TX_TCP_LSO6 : qlcnic_tx_pkt()
560 opcode = QLCNIC_TX_TCP_PKT; qlcnic_tx_pkt()
562 opcode = QLCNIC_TX_UDP_PKT; qlcnic_tx_pkt()
567 opcode = QLCNIC_TX_TCPV6_PKT; qlcnic_tx_pkt()
569 opcode = QLCNIC_TX_UDPV6_PKT; qlcnic_tx_pkt()
574 qlcnic_set_tx_flags_opcode(first_desc, flags, opcode); qlcnic_tx_pkt()
1086 int i = 0, opcode, ret; qlcnic_handle_fw_message() local
1099 opcode = qlcnic_get_nic_msg_opcode(msg.body[0]); qlcnic_handle_fw_message()
1101 switch (opcode) { qlcnic_handle_fw_message()
1361 int opcode, desc_cnt, count = 0; qlcnic_process_rcv_ring() local
1374 opcode = qlcnic_get_sts_opcode(sts_data0); qlcnic_process_rcv_ring()
1375 switch (opcode) { qlcnic_process_rcv_ring()
1538 int ring, opcode, desc_cnt; qlcnic_82xx_process_rcv_ring_diag() local
1549 opcode = qlcnic_get_sts_opcode(sts_data0); qlcnic_82xx_process_rcv_ring_diag()
1550 switch (opcode) { qlcnic_82xx_process_rcv_ring_diag()
1887 int count = 0, opcode; qlcnic_83xx_process_rcv_ring() local
1893 opcode = qlcnic_83xx_opcode(sts_data[1]); qlcnic_83xx_process_rcv_ring()
1894 if (!opcode) qlcnic_83xx_process_rcv_ring()
1899 switch (opcode) { qlcnic_83xx_process_rcv_ring()
1910 "Unknown opcode: 0x%x\n", opcode); qlcnic_83xx_process_rcv_ring()
2213 int ring, opcode; qlcnic_83xx_process_rcv_ring_diag() local
2219 opcode = qlcnic_83xx_opcode(sts_data[1]); qlcnic_83xx_process_rcv_ring_diag()
2220 if (!opcode) qlcnic_83xx_process_rcv_ring_diag()
/linux-4.4.14/drivers/infiniband/hw/mlx5/
H A Dcq.c129 wc->opcode = IB_WC_RDMA_WRITE; handle_good_req()
135 wc->opcode = IB_WC_SEND; handle_good_req()
138 wc->opcode = IB_WC_RDMA_READ; handle_good_req()
142 wc->opcode = IB_WC_COMP_SWAP; handle_good_req()
146 wc->opcode = IB_WC_FETCH_ADD; handle_good_req()
150 wc->opcode = IB_WC_MASKED_COMP_SWAP; handle_good_req()
154 wc->opcode = IB_WC_MASKED_FETCH_ADD; handle_good_req()
158 wc->opcode = IB_WC_BIND_MW; handle_good_req()
161 wc->opcode = get_umr_comp(wq, idx); handle_good_req()
206 wc->opcode = IB_WC_RECV_RDMA_WITH_IMM; handle_responder()
211 wc->opcode = IB_WC_RECV; handle_responder()
215 wc->opcode = IB_WC_RECV; handle_responder()
220 wc->opcode = IB_WC_RECV; handle_responder()
422 uint8_t opcode; mlx5_poll_one() local
442 opcode = cqe64->op_own >> 4; mlx5_poll_one()
443 if (unlikely(opcode == MLX5_CQE_RESIZE_CQ)) { mlx5_poll_one()
472 switch (opcode) { mlx5_poll_one()
497 opcode == MLX5_CQE_REQ_ERR ? mlx5_poll_one()
501 if (opcode == MLX5_CQE_REQ_ERR) { mlx5_poll_one()
/linux-4.4.14/drivers/crypto/vmx/
H A Dppc-xlate.pl198 my $opcode = eval("\$$mnemonic");
200 if (ref($opcode) eq 'CODE') { $line = &$opcode($f,split(',',$line)); }
/linux-4.4.14/include/uapi/linux/can/
H A Dbcm.h57 * @opcode: opcode, see enum below.
67 __u32 opcode; member in struct:bcm_msg_head
/linux-4.4.14/arch/microblaze/kernel/
H A Dexceptions.c90 pr_debug("Illegal opcode exception in user mode\n"); full_exception()
94 pr_warn("Illegal opcode exception in kernel mode.\n"); full_exception()
95 die("opcode exception", regs, SIGBUS); full_exception()
/linux-4.4.14/arch/arm/probes/uprobes/
H A Dcore.c51 probes_opcode_t opcode; arch_uprobe_skip_sstep() local
56 opcode = __mem_to_opcode_arm(*(unsigned int *) auprobe->insn); arch_uprobe_skip_sstep()
58 auprobe->asi.insn_singlestep(opcode, &auprobe->asi, regs); arch_uprobe_skip_sstep()
/linux-4.4.14/arch/avr32/kernel/
H A Dtraps.c175 unsigned short opcode; is_valid_bugaddr() local
179 if (probe_kernel_address((u16 *)pc, opcode)) is_valid_bugaddr()
182 return opcode == AVR32_BUG_OPCODE; is_valid_bugaddr()
/linux-4.4.14/drivers/gpu/ipu-v3/
H A Dipu-dc.c130 static void dc_write_tmpl(struct ipu_dc *dc, int word, u32 opcode, u32 operand, dc_write_tmpl() argument
136 if (opcode == WCLK) { dc_write_tmpl()
138 reg2 = operand >> 12 | opcode << 1 | stop << 9; dc_write_tmpl()
139 } else if (opcode == WRG) { dc_write_tmpl()
141 reg2 = operand >> 17 | opcode << 7 | stop << 9; dc_write_tmpl()
144 reg2 = operand >> 12 | opcode << 4 | stop << 9; dc_write_tmpl()
/linux-4.4.14/drivers/net/ethernet/chelsio/cxgb/
H A Dcpl5_cmd.h162 u8 opcode; member in union:opcode_tid
171 #define MK_OPCODE_TID(opcode, tid) (V_OPCODE(opcode) | (tid))
436 u8 opcode; member in struct:cpl_tx_pkt
456 u8 opcode; member in struct:cpl_tx_pkt_lso
485 u8 opcode; member in struct:cpl_rx_pkt
/linux-4.4.14/arch/x86/kvm/
H A Demulate.c123 #define Group (1<<15) /* Bits 3:5 of modrm byte extend opcode */
165 #define Fastop ((u64)1 << 44) /* Use opcode::u.fastop */
209 struct opcode { struct
214 const struct opcode *group;
226 struct opcode mod012[8];
227 struct opcode mod3[8];
231 struct opcode pfx_no;
232 struct opcode pfx_66;
233 struct opcode pfx_f2;
234 struct opcode pfx_f3;
238 struct opcode op[8];
239 struct opcode high[64];
243 struct opcode mod012;
244 struct opcode mod3;
248 struct opcode mode32;
249 struct opcode mode64;
4068 static const struct opcode group7_rm0[] = {
4074 static const struct opcode group7_rm1[] = {
4080 static const struct opcode group7_rm3[] = {
4091 static const struct opcode group7_rm7[] = {
4097 static const struct opcode group1[] = {
4108 static const struct opcode group1A[] = {
4112 static const struct opcode group2[] = {
4123 static const struct opcode group3[] = {
4134 static const struct opcode group4[] = {
4140 static const struct opcode group5[] = {
4150 static const struct opcode group6[] = {
4175 static const struct opcode group8[] = {
4189 static const struct opcode group11[] = {
4295 static const struct opcode opcode_table[256] = {
4419 static const struct opcode twobyte_table[256] = {
4528 * Insns below are selected by the prefix which indexed by the third opcode
4531 static const struct opcode opcode_map_0f_38[256] = {
4782 struct opcode opcode; x86_decode_insn() local
4876 opcode = opcode_table[ctxt->b]; x86_decode_insn()
4877 /* Two-byte opcode? */ x86_decode_insn()
4881 opcode = twobyte_table[ctxt->b]; x86_decode_insn()
4883 /* 0F_38 opcode map */ x86_decode_insn()
4887 opcode = opcode_map_0f_38[ctxt->b]; x86_decode_insn()
4890 ctxt->d = opcode.flags; x86_decode_insn()
4905 opcode = opcode.u.group[goffset]; x86_decode_insn()
4910 opcode = opcode.u.gdual->mod3[goffset]; x86_decode_insn()
4912 opcode = opcode.u.gdual->mod012[goffset]; x86_decode_insn()
4916 opcode = opcode.u.group[goffset]; x86_decode_insn()
4923 case 0x00: opcode = opcode.u.gprefix->pfx_no; break; x86_decode_insn()
4924 case 0x66: opcode = opcode.u.gprefix->pfx_66; break; x86_decode_insn()
4925 case 0xf2: opcode = opcode.u.gprefix->pfx_f2; break; x86_decode_insn()
4926 case 0xf3: opcode = opcode.u.gprefix->pfx_f3; break; x86_decode_insn()
4931 opcode = opcode.u.esc->high[ctxt->modrm - 0xc0]; x86_decode_insn()
4933 opcode = opcode.u.esc->op[(ctxt->modrm >> 3) & 7]; x86_decode_insn()
4937 opcode = opcode.u.idual->mod3; x86_decode_insn()
4939 opcode = opcode.u.idual->mod012; x86_decode_insn()
4943 opcode = opcode.u.mdual->mode64; x86_decode_insn()
4945 opcode = opcode.u.mdual->mode32; x86_decode_insn()
4952 ctxt->d |= opcode.flags; x86_decode_insn()
4959 ctxt->execute = opcode.u.execute; x86_decode_insn()
4971 ctxt->check_perm = opcode.check_perm; x86_decode_insn()
4972 ctxt->intercept = opcode.intercept; x86_decode_insn()
/linux-4.4.14/drivers/ssb/
H A Ddriver_chipcommon_sflash.c72 static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode) ssb_sflash_cmd() argument
76 SSB_CHIPCO_FLASHCTL_START | opcode); ssb_sflash_cmd()

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