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Searched refs:mux (Results 1 – 200 of 447) sorted by relevance

123

/linux-4.4.14/drivers/i2c/muxes/
Di2c-mux-pinctrl.c41 struct i2c_mux_pinctrl *mux = data; in i2c_mux_pinctrl_select() local
43 return pinctrl_select_state(mux->pinctrl, mux->states[chan]); in i2c_mux_pinctrl_select()
49 struct i2c_mux_pinctrl *mux = data; in i2c_mux_pinctrl_deselect() local
51 return pinctrl_select_state(mux->pinctrl, mux->state_idle); in i2c_mux_pinctrl_deselect()
55 static int i2c_mux_pinctrl_parse_dt(struct i2c_mux_pinctrl *mux, in i2c_mux_pinctrl_parse_dt() argument
66 mux->pdata = devm_kzalloc(&pdev->dev, sizeof(*mux->pdata), GFP_KERNEL); in i2c_mux_pinctrl_parse_dt()
67 if (!mux->pdata) { in i2c_mux_pinctrl_parse_dt()
68 dev_err(mux->dev, in i2c_mux_pinctrl_parse_dt()
75 dev_err(mux->dev, "Cannot parse pinctrl-names: %d\n", in i2c_mux_pinctrl_parse_dt()
80 mux->pdata->pinctrl_states = devm_kzalloc(&pdev->dev, in i2c_mux_pinctrl_parse_dt()
[all …]
Di2c-mux-reg.c29 static int i2c_mux_reg_set(const struct regmux *mux, unsigned int chan_id) in i2c_mux_reg_set() argument
31 if (!mux->data.reg) in i2c_mux_reg_set()
40 switch (mux->data.reg_size) { in i2c_mux_reg_set()
42 if (mux->data.little_endian) in i2c_mux_reg_set()
43 iowrite32(chan_id, mux->data.reg); in i2c_mux_reg_set()
45 iowrite32be(chan_id, mux->data.reg); in i2c_mux_reg_set()
46 if (!mux->data.write_only) in i2c_mux_reg_set()
47 ioread32(mux->data.reg); in i2c_mux_reg_set()
50 if (mux->data.little_endian) in i2c_mux_reg_set()
51 iowrite16(chan_id, mux->data.reg); in i2c_mux_reg_set()
[all …]
Di2c-mux-gpio.c27 static void i2c_mux_gpio_set(const struct gpiomux *mux, unsigned val) in i2c_mux_gpio_set() argument
31 for (i = 0; i < mux->data.n_gpios; i++) in i2c_mux_gpio_set()
32 gpio_set_value_cansleep(mux->gpio_base + mux->data.gpios[i], in i2c_mux_gpio_set()
38 struct gpiomux *mux = data; in i2c_mux_gpio_select() local
40 i2c_mux_gpio_set(mux, chan); in i2c_mux_gpio_select()
47 struct gpiomux *mux = data; in i2c_mux_gpio_deselect() local
49 i2c_mux_gpio_set(mux, mux->data.idle); in i2c_mux_gpio_deselect()
61 static int i2c_mux_gpio_probe_dt(struct gpiomux *mux, in i2c_mux_gpio_probe_dt() argument
83 mux->data.parent = i2c_adapter_id(adapter); in i2c_mux_gpio_probe_dt()
86 mux->data.n_values = of_get_child_count(np); in i2c_mux_gpio_probe_dt()
[all …]
DMakefile6 obj-$(CONFIG_I2C_MUX_GPIO) += i2c-mux-gpio.o
7 obj-$(CONFIG_I2C_MUX_PCA9541) += i2c-mux-pca9541.o
8 obj-$(CONFIG_I2C_MUX_PCA954x) += i2c-mux-pca954x.o
9 obj-$(CONFIG_I2C_MUX_PINCTRL) += i2c-mux-pinctrl.o
10 obj-$(CONFIG_I2C_MUX_REG) += i2c-mux-reg.o
DKconfig31 will be called i2c-mux-gpio.
40 will be called i2c-mux-pca9541.
47 I2C mux/switch devices.
50 will be called i2c-mux-pca954x.
73 will be called i2c-mux-reg.
/linux-4.4.14/drivers/clk/ti/
Dmux.c33 struct clk_mux *mux = to_clk_mux(hw); in ti_clk_mux_get_parent() local
44 val = ti_clk_ll_ops->clk_readl(mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
45 val &= mux->mask; in ti_clk_mux_get_parent()
47 if (mux->table) { in ti_clk_mux_get_parent()
51 if (mux->table[i] == val) in ti_clk_mux_get_parent()
56 if (val && (mux->flags & CLK_MUX_INDEX_BIT)) in ti_clk_mux_get_parent()
59 if (val && (mux->flags & CLK_MUX_INDEX_ONE)) in ti_clk_mux_get_parent()
70 struct clk_mux *mux = to_clk_mux(hw); in ti_clk_mux_set_parent() local
73 if (mux->table) { in ti_clk_mux_set_parent()
74 index = mux->table[index]; in ti_clk_mux_set_parent()
[all …]
Dcomposite.c126 struct clk_hw *mux; in ti_clk_register_composite() local
136 mux = ti_clk_build_component_mux(comp->mux); in ti_clk_register_composite()
144 if (mux) { in ti_clk_register_composite()
145 num_parents = comp->mux->num_parents; in ti_clk_register_composite()
146 parent_names = comp->mux->parents; in ti_clk_register_composite()
150 parent_names, num_parents, mux, in ti_clk_register_composite()
Dclk-3xxx-legacy.c653 .mux = &mcbsp2_mux_fck_data,
825 .mux = &gpt2_mux_fck_data,
964 .mux = &mcbsp3_mux_fck_data,
1009 .mux = &gpt9_mux_fck_data,
1517 .mux = &clkout2_src_mux_ck_data,
1578 .mux = &gpt7_mux_fck_data,
1923 .mux = &gpt11_mux_fck_data,
2376 .mux = &gpt1_mux_fck_data,
2701 .mux = &mcbsp5_mux_fck_data,
2826 .mux = &sgx_mux_fck_data,
[all …]
/linux-4.4.14/drivers/clk/
Dclk-mux.c33 struct clk_mux *mux = to_clk_mux(hw); in clk_mux_get_parent() local
44 val = clk_readl(mux->reg) >> mux->shift; in clk_mux_get_parent()
45 val &= mux->mask; in clk_mux_get_parent()
47 if (mux->table) { in clk_mux_get_parent()
51 if (mux->table[i] == val) in clk_mux_get_parent()
56 if (val && (mux->flags & CLK_MUX_INDEX_BIT)) in clk_mux_get_parent()
59 if (val && (mux->flags & CLK_MUX_INDEX_ONE)) in clk_mux_get_parent()
70 struct clk_mux *mux = to_clk_mux(hw); in clk_mux_set_parent() local
74 if (mux->table) in clk_mux_set_parent()
75 index = mux->table[index]; in clk_mux_set_parent()
[all …]
Dclk-cdce706.c78 unsigned mux; member
175 __func__, hwd->idx, hwd->mux, hwd->mul, hwd->div); in cdce706_pll_recalc_rate()
177 if (!hwd->mux) { in cdce706_pll_recalc_rate()
524 unsigned mux; in cdce706_register_plls() local
526 ret = cdce706_reg_read(cdce, CDCE706_PLL_MUX, &mux); in cdce706_register_plls()
545 cdce->pll[i].mux = mux & CDCE706_PLL_MUX_MASK(i); in cdce706_register_plls()
548 cdce->pll[i].div, cdce->pll[i].mul, cdce->pll[i].mux); in cdce706_register_plls()
Dclk-axm5516.c127 struct axxia_clkmux *mux = to_axxia_clkmux(aclk); in axxia_clkmux_get_parent() local
130 regmap_read(aclk->regmap, mux->reg, &ctrl); in axxia_clkmux_get_parent()
131 parent = (ctrl >> mux->shift) & ((1 << mux->width) - 1); in axxia_clkmux_get_parent()
/linux-4.4.14/drivers/clk/tegra/
Dclk-super.c44 struct tegra_clk_super_mux *mux = to_clk_super_mux(hw); in clk_super_get_parent() local
48 val = readl_relaxed(mux->reg); in clk_super_get_parent()
55 super_state_to_src_shift(mux, SUPER_STATE_IDLE) : in clk_super_get_parent()
56 super_state_to_src_shift(mux, SUPER_STATE_RUN); in clk_super_get_parent()
58 source = (val >> shift) & super_state_to_src_mask(mux); in clk_super_get_parent()
64 if ((mux->flags & TEGRA_DIVIDER_2) && !(val & SUPER_LP_DIV2_BYPASS) && in clk_super_get_parent()
65 (source == mux->pllx_index)) in clk_super_get_parent()
66 source = mux->div2_index; in clk_super_get_parent()
73 struct tegra_clk_super_mux *mux = to_clk_super_mux(hw); in clk_super_set_parent() local
79 if (mux->lock) in clk_super_set_parent()
[all …]
Dclk-periph.c28 struct clk_hw *mux_hw = &periph->mux.hw; in clk_periph_get_parent()
39 struct clk_hw *mux_hw = &periph->mux.hw; in clk_periph_set_parent()
171 periph->mux.reg = clk_base + offset; in _tegra_clk_register_periph()
181 periph->mux.hw.clk = clk; in _tegra_clk_register_periph()
/linux-4.4.14/drivers/clk/imx/
Dclk-fixup-mux.c30 struct clk_mux mux; member
37 struct clk_mux *mux = to_clk_mux(hw); in to_clk_fixup_mux() local
39 return container_of(mux, struct clk_fixup_mux, mux); in to_clk_fixup_mux()
46 return fixup_mux->ops->get_parent(&fixup_mux->mux.hw); in clk_fixup_mux_get_parent()
52 struct clk_mux *mux = to_clk_mux(hw); in clk_fixup_mux_set_parent() local
56 spin_lock_irqsave(mux->lock, flags); in clk_fixup_mux_set_parent()
58 val = readl(mux->reg); in clk_fixup_mux_set_parent()
59 val &= ~(mux->mask << mux->shift); in clk_fixup_mux_set_parent()
60 val |= index << mux->shift; in clk_fixup_mux_set_parent()
62 writel(val, mux->reg); in clk_fixup_mux_set_parent()
[all …]
Dclk-busy.c118 struct clk_mux mux; member
126 struct clk_mux *mux = container_of(hw, struct clk_mux, hw); in to_clk_busy_mux() local
128 return container_of(mux, struct clk_busy_mux, mux); in to_clk_busy_mux()
135 return busy->mux_ops->get_parent(&busy->mux.hw); in clk_busy_mux_get_parent()
143 ret = busy->mux_ops->set_parent(&busy->mux.hw, index); in clk_busy_mux_set_parent()
170 busy->mux.reg = reg; in imx_clk_busy_mux()
171 busy->mux.shift = shift; in imx_clk_busy_mux()
172 busy->mux.mask = BIT(width) - 1; in imx_clk_busy_mux()
173 busy->mux.lock = &imx_ccm_lock; in imx_clk_busy_mux()
182 busy->mux.hw.init = &init; in imx_clk_busy_mux()
[all …]
Dclk-cpu.c20 struct clk *mux; member
53 ret = clk_set_parent(cpu->mux, cpu->step); in clk_cpu_set_rate()
60 clk_set_parent(cpu->mux, cpu->pll); in clk_cpu_set_rate()
64 clk_set_parent(cpu->mux, cpu->pll); in clk_cpu_set_rate()
79 struct clk *div, struct clk *mux, struct clk *pll, in imx_clk_cpu() argument
91 cpu->mux = mux; in imx_clk_cpu()
DMakefile7 clk-fixup-mux.o \
/linux-4.4.14/drivers/dma/
Dlpc18xx-dmamux.c47 struct lpc18xx_dmamux *mux = route_data; in lpc18xx_dmamux_free() local
51 mux->busy = false; in lpc18xx_dmamux_free()
61 unsigned mux; in lpc18xx_dmamux_reserve() local
68 mux = dma_spec->args[0]; in lpc18xx_dmamux_reserve()
69 if (mux >= dmamux->dma_master_requests) { in lpc18xx_dmamux_reserve()
89 if (dmamux->muxes[mux].busy) { in lpc18xx_dmamux_reserve()
92 mux, mux, dmamux->muxes[mux].value); in lpc18xx_dmamux_reserve()
97 dmamux->muxes[mux].busy = true; in lpc18xx_dmamux_reserve()
98 dmamux->muxes[mux].value = dma_spec->args[1]; in lpc18xx_dmamux_reserve()
101 LPC18XX_DMAMUX_MASK(mux), in lpc18xx_dmamux_reserve()
[all …]
/linux-4.4.14/drivers/clk/qcom/
Dclk-regmap-mux.c28 struct clk_regmap_mux *mux = to_clk_regmap_mux(hw); in mux_get_parent() local
30 unsigned int mask = GENMASK(mux->width - 1, 0); in mux_get_parent()
33 regmap_read(clkr->regmap, mux->reg, &val); in mux_get_parent()
35 val >>= mux->shift; in mux_get_parent()
43 struct clk_regmap_mux *mux = to_clk_regmap_mux(hw); in mux_set_parent() local
45 unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift); in mux_set_parent()
49 val <<= mux->shift; in mux_set_parent()
51 return regmap_update_bits(clkr->regmap, mux->reg, mask, val); in mux_set_parent()
DMakefile10 clk-qcom-y += clk-regmap-mux.o
/linux-4.4.14/Documentation/devicetree/bindings/clock/st/
Dst,clkgen-mux.txt13 "st,stih416-clkgenc-vcc-hd", "st,clkgen-mux"
14 "st,stih416-clkgenf-vcc-fvdp", "st,clkgen-mux"
15 "st,stih416-clkgenf-vcc-hva", "st,clkgen-mux"
16 "st,stih416-clkgenf-vcc-hd", "st,clkgen-mux"
17 "st,stih416-clkgenf-vcc-sd", "st,clkgen-mux"
18 "st,stih415-clkgen-a9-mux", "st,clkgen-mux"
19 "st,stih416-clkgen-a9-mux", "st,clkgen-mux"
20 "st,stih407-clkgen-a9-mux", "st,clkgen-mux"
32 compatible = "st,stih416-clkgenf-vcc-hva", "st,clkgen-mux";
/linux-4.4.14/drivers/clk/sunxi/
Dclk-a10-mod1.c32 struct clk_mux *mux; in sun4i_mod1_clk_setup() local
43 mux = kzalloc(sizeof(*mux), GFP_KERNEL); in sun4i_mod1_clk_setup()
44 if (!mux) in sun4i_mod1_clk_setup()
57 mux->reg = reg; in sun4i_mod1_clk_setup()
58 mux->shift = SUN4I_MOD1_MUX; in sun4i_mod1_clk_setup()
59 mux->mask = BIT(SUN4I_MOD1_MUX_WIDTH) - 1; in sun4i_mod1_clk_setup()
60 mux->lock = &mod1_lock; in sun4i_mod1_clk_setup()
63 &mux->hw, &clk_mux_ops, in sun4i_mod1_clk_setup()
76 kfree(mux); in sun4i_mod1_clk_setup()
Dclk-a20-gmac.c64 struct clk_mux *mux; in sun7i_a20_gmac_clk_setup() local
74 mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); in sun7i_a20_gmac_clk_setup()
75 if (!mux) in sun7i_a20_gmac_clk_setup()
94 mux->reg = reg; in sun7i_a20_gmac_clk_setup()
95 mux->mask = SUN7I_A20_GMAC_MASK; in sun7i_a20_gmac_clk_setup()
96 mux->table = sun7i_a20_gmac_mux_table; in sun7i_a20_gmac_clk_setup()
97 mux->lock = &gmac_lock; in sun7i_a20_gmac_clk_setup()
101 &mux->hw, &clk_mux_ops, in sun7i_a20_gmac_clk_setup()
119 kfree(mux); in sun7i_a20_gmac_clk_setup()
Dclk-factors.c170 struct clk_mux *mux = NULL; in sunxi_factors_register() local
215 if (data->mux) { in sunxi_factors_register()
216 mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); in sunxi_factors_register()
217 if (!mux) { in sunxi_factors_register()
224 mux->reg = reg; in sunxi_factors_register()
225 mux->shift = data->mux; in sunxi_factors_register()
226 mux->mask = data->muxmask; in sunxi_factors_register()
227 mux->lock = factors->lock; in sunxi_factors_register()
228 mux_hw = &mux->hw; in sunxi_factors_register()
Dclk-sun9i-core.c143 .mux = 24,
208 .mux = 24,
234 .mux = 24,
300 .mux = 24,
Dclk-sunxi.c196 struct clk_mux *mux; in sun6i_ahb1_clk_setup() local
214 mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); in sun6i_ahb1_clk_setup()
215 if (!mux) { in sun6i_ahb1_clk_setup()
221 mux->reg = reg; in sun6i_ahb1_clk_setup()
222 mux->shift = SUN6I_AHB1_MUX_SHIFT; in sun6i_ahb1_clk_setup()
223 mux->mask = SUN6I_AHB1_MUX_MASK; in sun6i_ahb1_clk_setup()
224 mux->lock = &clk_lock; in sun6i_ahb1_clk_setup()
228 &mux->hw, &clk_mux_ops, in sun6i_ahb1_clk_setup()
725 .mux = 6,
732 .mux = 24,
[all …]
Dclk-factors.h24 int mux; member
Dclk-sun8i-mbus.c62 .mux = 24,
/linux-4.4.14/drivers/pinctrl/bcm/
Dpinctrl-cygnus-mux.c57 struct cygnus_mux mux; member
73 struct cygnus_mux mux; member
485 .mux = { \
776 const struct cygnus_mux *mux = &grp->mux; in cygnus_pinmux_set() local
782 if (mux->offset != mux_log[i].mux.offset || in cygnus_pinmux_set()
783 mux->shift != mux_log[i].mux.shift) in cygnus_pinmux_set()
796 if (mux_log[i].mux.alt != mux->alt) { in cygnus_pinmux_set()
811 mux_log[i].mux.alt = mux->alt; in cygnus_pinmux_set()
816 val = readl(pinctrl->base0 + grp->mux.offset); in cygnus_pinmux_set()
817 val &= ~(mask << grp->mux.shift); in cygnus_pinmux_set()
[all …]
DMakefile6 obj-$(CONFIG_PINCTRL_CYGNUS_MUX) += pinctrl-cygnus-mux.o
/linux-4.4.14/arch/arm/boot/dts/
Dmmp2.dtsi51 compatible = "mrvl,mmp2-mux-intc";
56 reg-names = "mux status", "mux mask";
61 compatible = "mrvl,mmp2-mux-intc";
66 reg-names = "mux status", "mux mask";
72 compatible = "mrvl,mmp2-mux-intc";
77 reg-names = "mux status", "mux mask";
82 compatible = "mrvl,mmp2-mux-intc";
87 reg-names = "mux status", "mux mask";
92 compatible = "mrvl,mmp2-mux-intc";
97 reg-names = "mux status", "mux mask";
[all …]
Ddra7xx-clocks.dtsi248 compatible = "ti,mux-clock";
322 compatible = "ti,mux-clock";
356 compatible = "ti,mux-clock";
390 compatible = "ti,mux-clock";
435 compatible = "ti,mux-clock";
461 compatible = "ti,mux-clock";
535 compatible = "ti,mux-clock";
782 compatible = "ti,mux-clock";
790 compatible = "ti,mux-clock";
798 compatible = "ti,mux-clock";
[all …]
Domap54xx-clocks.dtsi172 compatible = "ti,mux-clock";
307 compatible = "ti,mux-clock";
431 compatible = "ti,mux-clock";
439 compatible = "ti,mux-clock";
447 compatible = "ti,mux-clock";
455 compatible = "ti,mux-clock";
463 compatible = "ti,mux-clock";
471 compatible = "ti,mux-clock";
479 compatible = "ti,mux-clock";
487 compatible = "ti,mux-clock";
[all …]
Domap44xx-clocks.dtsi199 compatible = "ti,mux-clock";
349 compatible = "ti,mux-clock";
477 compatible = "ti,mux-clock";
485 compatible = "ti,mux-clock";
493 compatible = "ti,mux-clock";
501 compatible = "ti,mux-clock";
509 compatible = "ti,mux-clock";
517 compatible = "ti,mux-clock";
525 compatible = "ti,mux-clock";
533 compatible = "ti,mux-clock";
[all …]
Dam43xx-clocks.dtsi13 compatible = "ti,mux-clock";
21 compatible = "ti,mux-clock";
29 compatible = "ti,mux-clock";
375 compatible = "ti,mux-clock";
388 compatible = "ti,mux-clock";
395 compatible = "ti,mux-clock";
402 compatible = "ti,mux-clock";
409 compatible = "ti,mux-clock";
416 compatible = "ti,mux-clock";
423 compatible = "ti,mux-clock";
[all …]
Ddm816x-clocks.dtsi91 compatible = "ti,mux-clock";
197 compatible = "ti,mux-clock";
204 compatible = "ti,mux-clock";
211 compatible = "ti,mux-clock";
218 compatible = "ti,mux-clock";
225 compatible = "ti,mux-clock";
232 compatible = "ti,mux-clock";
239 compatible = "ti,mux-clock";
246 compatible = "ti,mux-clock";
Dzynq-zc706.dts136 mux {
159 mux-mdio {
173 mux {
196 mux {
210 mux {
222 mux-cd {
235 mux-wp {
250 mux {
273 mux {
Dzynq-zc702.dts188 mux {
211 mux {
234 mux-mdio {
248 mux {
275 mux {
289 mux {
301 mux-cd {
314 mux-wp {
329 mux {
352 mux {
Dam33xx-clocks.dtsi13 compatible = "ti,mux-clock";
337 compatible = "ti,mux-clock";
352 compatible = "ti,mux-clock";
359 compatible = "ti,mux-clock";
366 compatible = "ti,mux-clock";
373 compatible = "ti,mux-clock";
380 compatible = "ti,mux-clock";
387 compatible = "ti,mux-clock";
394 compatible = "ti,mux-clock";
425 compatible = "ti,mux-clock";
[all …]
Dmeson8.dtsi106 reg-names = "mux", "pull", "pull-enable", "gpio";
115 reg-names = "mux", "pull", "gpio";
121 mux {
128 mux {
135 mux {
142 mux {
149 mux {
Domap24xx-clocks.dtsi13 compatible = "ti,composite-mux-clock";
27 compatible = "ti,composite-mux-clock";
79 compatible = "ti,mux-clock";
95 compatible = "ti,mux-clock";
153 compatible = "ti,mux-clock";
181 compatible = "ti,mux-clock";
205 compatible = "ti,composite-mux-clock";
433 compatible = "ti,composite-mux-clock";
455 compatible = "ti,composite-mux-clock";
546 compatible = "ti,composite-mux-clock";
[all …]
Domap3xxx-clocks.dtsi19 compatible = "ti,mux-clock";
86 compatible = "ti,composite-mux-clock";
100 compatible = "ti,composite-mux-clock";
114 compatible = "ti,composite-mux-clock";
128 compatible = "ti,composite-mux-clock";
141 compatible = "ti,composite-mux-clock";
353 compatible = "ti,mux-clock";
388 compatible = "ti,mux-clock";
404 compatible = "ti,mux-clock";
519 compatible = "ti,composite-mux-clock";
[all …]
Domap3430-sdp.dts65 gpmc,mux-add-data = <2>;
82 gpmc,wr-data-mux-bus-ns = <90>;
156 gpmc,mux-add-data = <2>;
170 gpmc,wr-data-mux-bus-ns = <30>;
Domap-gpmc-smsc9221.dtsi31 gpmc,mux-add-data;
48 gpmc,wr-data-mux-bus-ns = <18>;
Domap3-overo-tobiduo-common.dtsi31 gpmc,mux-add-data;
48 gpmc,wr-data-mux-bus-ns = <18>;
Ddm814x-clocks.dtsi94 compatible = "ti,mux-clock";
103 compatible = "ti,mux-clock";
Domap2430-sdp.dts47 gpmc,mux-add-data = <2>;
69 gpmc,wr-data-mux-bus-ns = <0>;
Dqcom-apq8064.dtsi110 mux {
117 mux {
124 mux {
131 mux {
138 mux {
145 mux {
152 mux {
Domap2430-clocks.dtsi14 compatible = "ti,composite-mux-clock";
27 compatible = "ti,composite-mux-clock";
41 compatible = "ti,composite-mux-clock";
330 compatible = "ti,mux-clock";
Domap-zoom-common.dtsi26 gpmc,mux-add-data = <0>;
49 gpmc,wr-data-mux-bus-ns = <45>;
Dimx53-voipac-bsb.dts24 mux-int-port = <2>;
25 mux-ext-port = <5>;
Dmeson8b.dtsi164 reg-names = "mux", "pull", "pull-enable", "gpio";
173 reg-names = "mux", "pull", "gpio";
179 mux {
Dls1021a-qds.dts150 pca9547: mux@77 {
251 mdio-mux-emi1 {
252 compatible = "mdio-mux-mmioreg";
257 mux-mask = <0xe0>; /* EMI1[2:0] */
Dimx35-eukrea-mbimxsd35-baseboard.dts54 fsl,mux-int-port = <1>;
55 fsl,mux-ext-port = <4>;
Dat91sam9g15.dtsi19 atmel,mux-mask = <
Dat91sam9g35.dtsi20 atmel,mux-mask = <
Dat91sam9x35.dtsi21 atmel,mux-mask = <
Dat91sam9x25.dtsi22 atmel,mux-mask = <
Dat91sam9g25.dtsi21 atmel,mux-mask = <
Dstih416-clock.dtsi517 compatible = "st,stih416-clkgen-a9-mux", "st,clkgen-mux";
576 compatible = "st,stih416-clkgenc-vcc-hd", "st,clkgen-mux";
584 * Add a dummy clock for the HDMI PHY for the VCC input mux
660 compatible = "st,stih416-clkgenf-vcc-fvdp", "st,clkgen-mux";
669 compatible = "st,stih416-clkgenf-vcc-hva", "st,clkgen-mux";
678 compatible = "st,stih416-clkgenf-vcc-hd", "st,clkgen-mux";
687 compatible = "st,stih416-clkgenf-vcc-sd", "st,clkgen-mux";
Dimx25-eukrea-mbimxsd25-baseboard.dts53 fsl,mux-int-port = <1>;
54 fsl,mux-ext-port = <5>;
Dimx6qdl-nitrogen6_max.dtsi176 compatible = "i2c-mux-gpio";
181 mux-gpios = <&gpio3 20 GPIO_ACTIVE_HIGH
200 compatible = "i2c-mux-gpio";
205 mux-gpios = <&gpio2 25 GPIO_ACTIVE_HIGH>;
330 mux-int-port = <1>;
331 mux-ext-port = <3>;
Dat91sam9g20ek_2mmc.dts18 /* clk already mux wuth slot0 */
Dqcom-apq8074-dragonboard.dts36 mux {
Dimx6qdl-wandboard.dtsi49 mux-int-port = <1>;
50 mux-ext-port = <3>;
Domap3-n950-n9.dtsi137 gpmc,mux-add-data = <2>;
156 gpmc,wr-data-mux-bus-ns = <30>;
Domap4-duovero-parlor.dts163 gpmc,wr-data-mux-bus-ns = <35>;
166 gpmc,mux-add-data = <2>;
Domap3-lilly-a83x.dtsi370 gpmc,mux-add-data = <0>;
392 gpmc,wr-data-mux-bus-ns = <75>;
427 gpmc,mux-add-data = <2>;
444 gpmc,wr-data-mux-bus-ns = <15>;
/linux-4.4.14/drivers/tty/serial/
Ddz.c74 struct dz_mux *mux; member
181 static inline void dz_receive_chars(struct dz_mux *mux) in dz_receive_chars() argument
184 struct dz_port *dport = &mux->dport[0]; in dz_receive_chars()
192 dport = &mux->dport[LINE(status)]; in dz_receive_chars()
245 tty_flip_buffer_push(&mux->dport[i].port.state->port); in dz_receive_chars()
255 static inline void dz_transmit_chars(struct dz_mux *mux) in dz_transmit_chars() argument
257 struct dz_port *dport = &mux->dport[0]; in dz_transmit_chars()
263 dport = &mux->dport[LINE(status)]; in dz_transmit_chars()
338 struct dz_mux *mux = dev_id; in dz_interrupt() local
339 struct dz_port *dport = &mux->dport[0]; in dz_interrupt()
[all …]
/linux-4.4.14/fs/ecryptfs/
Dkthread.c41 struct mutex mux; member
67 mutex_lock(&ecryptfs_kthread_ctl.mux); in ecryptfs_threadfn()
69 mutex_unlock(&ecryptfs_kthread_ctl.mux); in ecryptfs_threadfn()
81 mutex_unlock(&ecryptfs_kthread_ctl.mux); in ecryptfs_threadfn()
91 mutex_init(&ecryptfs_kthread_ctl.mux); in ecryptfs_init_kthread()
108 mutex_lock(&ecryptfs_kthread_ctl.mux); in ecryptfs_destroy_kthread()
116 mutex_unlock(&ecryptfs_kthread_ctl.mux); in ecryptfs_destroy_kthread()
156 mutex_lock(&ecryptfs_kthread_ctl.mux); in ecryptfs_privileged_open()
159 mutex_unlock(&ecryptfs_kthread_ctl.mux); in ecryptfs_privileged_open()
166 mutex_unlock(&ecryptfs_kthread_ctl.mux); in ecryptfs_privileged_open()
Dmiscdev.c47 mutex_lock(&daemon->mux); in ecryptfs_miscdev_poll()
58 mutex_unlock(&daemon->mux); in ecryptfs_miscdev_poll()
60 mutex_lock(&daemon->mux); in ecryptfs_miscdev_poll()
65 mutex_unlock(&daemon->mux); in ecryptfs_miscdev_poll()
94 mutex_lock(&daemon->mux); in ecryptfs_miscdev_open()
103 mutex_unlock(&daemon->mux); in ecryptfs_miscdev_open()
125 mutex_lock(&daemon->mux); in ecryptfs_miscdev_release()
129 mutex_unlock(&daemon->mux); in ecryptfs_miscdev_release()
173 mutex_lock(&msg_ctx->mux); in ecryptfs_send_miscdev()
181 mutex_unlock(&msg_ctx->mux); in ecryptfs_send_miscdev()
[all …]
Dmessaging.c67 if (mutex_trylock(&(*msg_ctx)->mux)) { in ecryptfs_acquire_free_msg_ctx()
155 mutex_init(&(*daemon)->mux); in ecryptfs_spawn_daemon()
176 mutex_lock(&daemon->mux); in ecryptfs_exorcise_daemon()
180 mutex_unlock(&daemon->mux); in ecryptfs_exorcise_daemon()
192 mutex_unlock(&daemon->mux); in ecryptfs_exorcise_daemon()
236 mutex_lock(&msg_ctx->mux); in ecryptfs_process_response()
261 mutex_unlock(&msg_ctx->mux); in ecryptfs_process_response()
297 mutex_unlock(&(*msg_ctx)->mux); in ecryptfs_send_message_locked()
350 mutex_lock(&msg_ctx->mux); in ecryptfs_wait_for_response()
353 mutex_unlock(&msg_ctx->mux); in ecryptfs_wait_for_response()
[all …]
/linux-4.4.14/drivers/pinctrl/
Dpinmux.c66 if (!map->data.mux.function) { in pinmux_validate_map()
344 ret = pinmux_func_name_to_selector(pctldev, map->data.mux.function); in pinmux_map_to_setting()
347 map->data.mux.function); in pinmux_map_to_setting()
350 setting->data.mux.func = ret; in pinmux_map_to_setting()
352 ret = pmxops->get_function_groups(pctldev, setting->data.mux.func, in pinmux_map_to_setting()
356 map->data.mux.function); in pinmux_map_to_setting()
362 map->data.mux.function); in pinmux_map_to_setting()
365 if (map->data.mux.group) { in pinmux_map_to_setting()
367 group = map->data.mux.group; in pinmux_map_to_setting()
377 group, map->data.mux.function); in pinmux_map_to_setting()
[all …]
Dpinctrl-lantiq.c99 (*map)->data.mux.group = group; in ltq_pinctrl_dt_subnode_to_map()
100 (*map)->data.mux.function = function; in ltq_pinctrl_dt_subnode_to_map()
214 static int match_mux(const struct ltq_mfp_pin *mfp, unsigned mux) in match_mux() argument
218 if (mfp->func[i] == mux) in match_mux()
240 unsigned mux) in match_group_mux() argument
250 ret = match_mux(&info->mfp[pin], mux); in match_group_mux()
253 mux, pin); in match_group_mux()
269 (match_group_mux(pin_grp, info, pin_grp->mux) < 0)) { in ltq_pmx_set()
281 pin_func = match_mux(&info->mfp[pin], pin_grp->mux); in ltq_pmx_set()
Dpinctrl-adi2.h24 const unsigned short *mux; member
32 .mux = m, \
Dpinctrl-tz1090.c115 struct tz1090_muxdesc mux; member
693 #define FUNCTION(mux, fname, group) \ argument
694 [(TZ1090_MUX_ ## mux)] = { \
700 #define NULL_FUNCTION(mux, fname) \ argument
701 [(TZ1090_MUX_ ## mux)] = { \
775 #define DEFINE_SUBMUX(mux, f0, f1, f2, f3, f4, mux_r, mux_b, mux_w) \ argument
776 static struct tz1090_muxdesc mux ## _submux = \
808 .mux = MUX(f0, f1, f2, f3, f4, \
1065 (*map)[*num_maps].data.mux.group = group; in add_map_mux()
1066 (*map)[*num_maps].data.mux.function = function; in add_map_mux()
[all …]
Dpinctrl-single.c1143 const __be32 *mux; in pcs_parse_one_pinctrl_entry() local
1147 mux = of_get_property(np, PCS_MUX_PINS_NAME, &size); in pcs_parse_one_pinctrl_entry()
1148 if ((!mux) || (size < sizeof(*mux) * 2)) { in pcs_parse_one_pinctrl_entry()
1154 size /= sizeof(*mux); /* Number of elements in array */ in pcs_parse_one_pinctrl_entry()
1169 offset = be32_to_cpup(mux + index++); in pcs_parse_one_pinctrl_entry()
1170 val = be32_to_cpup(mux + index++); in pcs_parse_one_pinctrl_entry()
1194 (*map)->data.mux.group = np->name; in pcs_parse_one_pinctrl_entry()
1195 (*map)->data.mux.function = np->name; in pcs_parse_one_pinctrl_entry()
1231 const __be32 *mux; in pcs_parse_bits_in_pinctrl_entry() local
1236 mux = of_get_property(np, PCS_MUX_BITS_NAME, &size); in pcs_parse_bits_in_pinctrl_entry()
[all …]
Dpinctrl-at91.c110 enum at91_mux mux; member
286 new_map[0].data.mux.function = parent->name; in at91_dt_node_to_map()
287 new_map[0].data.mux.group = np->name; in at91_dt_node_to_map()
301 (*map)->data.mux.function, (*map)->data.mux.group, map_num); in at91_dt_node_to_map()
644 if (pin->mux) { in at91_pin_dbg()
646 pin->bank + 'A', pin->pin, pin->mux - 1 + 'A', pin->conf); in at91_pin_dbg()
656 int mux; in pin_check_config() local
677 if (!pin->mux) in pin_check_config()
680 mux = pin->mux - 1; in pin_check_config()
682 if (mux >= info->nmux) { in pin_check_config()
[all …]
Dpinctrl-lantiq.h54 const unsigned mux; member
105 int (*apply_mux)(struct pinctrl_dev *pctrldev, int pin, int mux);
Dpinctrl-utils.c65 (*map)[*num_maps].data.mux.group = group; in pinctrl_utils_add_map_mux()
66 (*map)[*num_maps].data.mux.function = function; in pinctrl_utils_add_map_mux()
Dpinctrl-adi2.c89 u32 mux; member
489 port->saved_data.mux = readl(&port->regs->port_mux); in adi_gpio_suspend()
505 writel(port->saved_data.mux, &port->regs->port_mux); in adi_gpio_resume()
628 unsigned short *mux, pin; in adi_pinmux_set() local
630 mux = (unsigned short *)pinctrl->soc->groups[group_id].mux; in adi_pinmux_set()
632 while (*mux) { in adi_pinmux_set()
633 pin = P_IDENT(*mux); in adi_pinmux_set()
644 P_FUNCT2MUX(*mux)); in adi_pinmux_set()
646 mux++; in adi_pinmux_set()
/linux-4.4.14/drivers/clk/ingenic/
Djz4780-cgu.c286 .mux = { CGU_REG_CLOCKCONTROL, 30, 2 },
293 .mux = { CGU_REG_CLOCKCONTROL, 28, 2 },
312 .mux = { CGU_REG_CLOCKCONTROL, 26, 2 },
320 .mux = { CGU_REG_CLOCKCONTROL, 24, 2 },
338 .mux = { CGU_REG_DDRCDR, 30, 2 },
346 .mux = { CGU_REG_VPUCDR, 30, 2 },
354 .mux = { CGU_REG_I2SCDR, 30, 1 },
361 .mux = { CGU_REG_I2SCDR, 31, 1 },
368 .mux = { CGU_REG_LP0CDR, 30, 2 },
376 .mux = { CGU_REG_LP1CDR, 30, 2 },
[all …]
Dcgu.c246 reg = readl(cgu->base + clk_info->mux.reg); in ingenic_clk_get_parent()
247 hw_idx = (reg >> clk_info->mux.shift) & in ingenic_clk_get_parent()
248 GENMASK(clk_info->mux.bits - 1, 0); in ingenic_clk_get_parent()
282 num_poss = 1 << clk_info->mux.bits; in ingenic_clk_set_parent()
294 mask = GENMASK(clk_info->mux.bits - 1, 0); in ingenic_clk_set_parent()
295 mask <<= clk_info->mux.shift; in ingenic_clk_set_parent()
300 reg = readl(cgu->base + clk_info->mux.reg); in ingenic_clk_set_parent()
302 reg |= hw_idx << clk_info->mux.shift; in ingenic_clk_set_parent()
303 writel(reg, cgu->base + clk_info->mux.reg); in ingenic_clk_set_parent()
557 num_possible = 1 << clk_info->mux.bits; in ingenic_register_clock()
Djz4740-cgu.c136 .mux = { CGU_REG_CPCCR, 31, 1 },
144 .mux = { CGU_REG_SSICDR, 31, 1 },
166 .mux = { CGU_REG_CPCCR, 29, 1 },
Dcgu.h158 struct ingenic_cgu_mux_info mux; member
/linux-4.4.14/drivers/clk/meson/
Dclkc.c54 struct clk_mux *mux = NULL; in meson_clk_register_composite() local
63 mux = kzalloc(sizeof(*mux), GFP_KERNEL); in meson_clk_register_composite()
64 if (!mux) in meson_clk_register_composite()
67 mux->reg = clk_base + clk_conf->reg_off in meson_clk_register_composite()
69 mux->shift = composite_conf->mux_parm.shift; in meson_clk_register_composite()
70 mux->mask = BIT(composite_conf->mux_parm.width) - 1; in meson_clk_register_composite()
71 mux->flags = composite_conf->mux_flags; in meson_clk_register_composite()
72 mux->lock = &clk_lock; in meson_clk_register_composite()
73 mux->table = composite_conf->mux_table; in meson_clk_register_composite()
111 mux ? &mux->hw : NULL, mux_ops, in meson_clk_register_composite()
[all …]
/linux-4.4.14/arch/arm/mach-omap2/
Dmux.c51 struct omap_mux mux; member
118 struct omap_mux *m = &e->mux; in _omap_mux_init_gpio()
164 struct omap_mux *mux = NULL; in _omap_mux_get_by_name() local
182 mux = &e->mux; in _omap_mux_get_by_name()
183 m0_entry = mux->muxnames[0]; in _omap_mux_get_by_name()
193 char *mode_cur = mux->muxnames[i]; in _omap_mux_get_by_name()
199 *found_mux = mux; in _omap_mux_get_by_name()
226 struct omap_mux *mux = NULL; in omap_mux_get_by_name() local
227 int mux_mode = _omap_mux_get_by_name(partition, muxname, &mux); in omap_mux_get_by_name()
232 *found_mux = mux; in omap_mux_get_by_name()
[all …]
Domap_hwmod.c611 if (!oh->mux || !oh->mux->enabled) in _set_idle_ioring_wakeup()
614 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) { in _set_idle_ioring_wakeup()
615 pad = oh->mux->pads_dynamic[j]; in _set_idle_ioring_wakeup()
632 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); in _set_idle_ioring_wakeup()
2096 if (oh->mux) in _enable()
2097 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); in _enable()
2124 if (oh->mux && (!oh->mux->enabled || in _enable()
2126 oh->mux->pads_dynamic))) { in _enable()
2127 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); in _enable()
2239 if (oh->mux && oh->mux->pads_dynamic) { in _idle()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/net/
Dmdio-mux-mmioreg.txt4 like an FPGA, is used to control which child bus is connected. The mdio-mux
10 - compatible : string, must contain "mdio-mux-mmioreg"
16 - mux-mask : integer, contains an eight-bit mask that specifies which
18 'reg' property of each child mdio-mux node must be constrained by
24 For the "EMI2" MDIO bus, register 9 (BRDCFG1) controls the mux on that bus.
26 BRDCFG1 that control the actual mux.
36 mdio-mux-emi2 {
37 compatible = "mdio-mux-mmioreg", "mdio-mux";
42 mux-mask = <0x6>; // EMI2
Dmdio-mux-gpio.txt8 - compatible : mdio-mux-gpio.
27 mdio-mux {
28 compatible = "mdio-mux-gpio";
Dmdio-mux.txt36 mdio-mux {
37 compatible = "mdio-mux-gpio";
/linux-4.4.14/Documentation/devicetree/bindings/interrupt-controller/
Dmrvl,intc.txt5 "mrvl,mmp2-mux-intc"
8 of the whold interrupt controller. If the interrupt controller is mux-intc,
9 address and length means one register. Since address of mux-intc is in the
10 range of intc. mux-intc is secondary interrupt controller.
12 only required in mux-intc interrupt controller.
13 - interrupts : Should be the port interrupt shared by mux interrupts. It's
14 only required in mux-intc interrupt controller.
33 compatible = "mrvl,mmp2-mux-intc";
38 reg-names = "mux status", "mux mask";
Dti,c64x+megamod-pic.txt56 - ti,c64x+megamod-pic-mux: Array of 12 cells correspnding to the 12 core
69 interrupts mapped directly to the core with "ti,c64x+megamod-pic-mux" will
96 ti,c64x+megamod-pic-mux = < 0 0 0 0
/linux-4.4.14/drivers/clk/st/
Dclkgen-mux.c59 struct clk_mux mux; member
82 static int clkgena_divmux_is_running(struct clkgena_divmux *mux) in clkgena_divmux_is_running() argument
84 u32 regval = readl(mux->feedback_reg[mux->muxsel]); in clkgena_divmux_is_running()
85 u32 running = regval & BIT(mux->feedback_bit_idx); in clkgena_divmux_is_running()
92 struct clk_hw *mux_hw = &genamux->mux.hw; in clkgena_divmux_enable()
116 struct clk_hw *mux_hw = &genamux->mux.hw; in clkgena_divmux_disable()
126 struct clk_hw *mux_hw = &genamux->mux.hw; in clkgena_divmux_is_enabled()
136 struct clk_hw *mux_hw = &genamux->mux.hw; in clkgena_divmux_get_parent()
243 genamux->mux.lock = &clkgena_divmux_lock; in clk_register_genamux()
244 genamux->mux.mask = BIT(mux_width) - 1; in clk_register_genamux()
[all …]
Dclk-flexgen.c22 struct clk_mux mux; member
81 struct clk_hw *mux_hw = &flexgen->mux.hw; in flexgen_get_parent()
91 struct clk_hw *mux_hw = &flexgen->mux.hw; in flexgen_set_parent()
203 fgxbar->mux.lock = lock; in clk_register_flexgen()
204 fgxbar->mux.mask = BIT(6) - 1; in clk_register_flexgen()
205 fgxbar->mux.reg = xbar_reg; in clk_register_flexgen()
206 fgxbar->mux.shift = xbar_shift; in clk_register_flexgen()
207 fgxbar->mux.table = NULL; in clk_register_flexgen()
DMakefile1 obj-y += clkgen-mux.o clkgen-pll.o clkgen-fsyn.o clk-flexgen.o
/linux-4.4.14/drivers/clk/mediatek/
Dclk-mtk.c142 struct clk_mux *mux = NULL; in mtk_clk_register_composite() local
153 mux = kzalloc(sizeof(*mux), GFP_KERNEL); in mtk_clk_register_composite()
154 if (!mux) in mtk_clk_register_composite()
157 mux->reg = base + mc->mux_reg; in mtk_clk_register_composite()
158 mux->mask = BIT(mc->mux_width) - 1; in mtk_clk_register_composite()
159 mux->shift = mc->mux_shift; in mtk_clk_register_composite()
160 mux->lock = lock; in mtk_clk_register_composite()
162 mux_hw = &mux->hw; in mtk_clk_register_composite()
213 kfree(mux); in mtk_clk_register_composite()
218 kfree(mux); in mtk_clk_register_composite()
/linux-4.4.14/drivers/clk/pistachio/
Dclk.c77 struct pistachio_mux *mux, in pistachio_clk_register_mux() argument
84 clk = clk_register_mux(NULL, mux[i].name, mux[i].parents, in pistachio_clk_register_mux()
85 mux[i].num_parents, in pistachio_clk_register_mux()
87 p->base + mux[i].reg, mux[i].shift, in pistachio_clk_register_mux()
88 get_count_order(mux[i].num_parents), in pistachio_clk_register_mux()
90 p->clk_data.clks[mux[i].id] = clk; in pistachio_clk_register_mux()
/linux-4.4.14/Documentation/devicetree/bindings/clock/ti/
Dmux.txt1 Binding for TI mux clock.
31 The binding must provide the register to control the mux. Optionally
39 - compatible : shall be "ti,mux-clock" or "ti,composite-mux-clock".
42 - reg : register offset for register controlling adjustable mux
50 not supported by the composite-mux-clock subtype
56 compatible = "ti,mux-clock";
64 compatible = "ti,mux-clock";
72 compatible = "ti,composite-mux-clock";
/linux-4.4.14/Documentation/i2c/muxes/
Di2c-mux-gpio1 Kernel driver i2c-gpio-mux
8 i2c-gpio-mux is an i2c mux driver providing access to I2C bus segments
29 i2c-gpio-mux uses the platform bus, so you need to provide a struct
33 to control it. See include/linux/i2c-gpio-mux.h for details.
38 #include <linux/i2c-gpio-mux.h>
60 .name = "i2c-gpio-mux",
69 numbers, and the i2c-gpio-mux driver will do the work for you,
76 When registering your i2c-gpio-mux device, you should pass the number
/linux-4.4.14/Documentation/devicetree/bindings/display/msm/
Dhdmi.txt20 - hdmi-mux-supply: phandle to mux regulator
23 - qcom,hdmi-tx-mux-en-gpio: hdmi mux enable pin
24 - qcom,hdmi-tx-mux-sel-gpio: hdmi mux select pin
53 hdmi-mux-supply = <&ext_3p3v>;
/linux-4.4.14/drivers/gpu/drm/imx/
Dimx-ldb.c149 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno, in imx_ldb_set_clock() argument
170 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]); in imx_ldb_set_clock()
173 "unable to set di%d parent clock to ldb_di%d\n", mux, in imx_ldb_set_clock()
218 int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder); in imx_ldb_encoder_commit() local
229 if (mux == 0 || ldb->lvds_mux) in imx_ldb_encoder_commit()
231 else if (mux == 1) in imx_ldb_encoder_commit()
236 if (mux == 1 || ldb->lvds_mux) in imx_ldb_encoder_commit()
238 else if (mux == 0) in imx_ldb_encoder_commit()
251 mux << lvds_mux->shift); in imx_ldb_encoder_commit()
268 int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder); in imx_ldb_encoder_mode_set() local
[all …]
Ddw_hdmi-imx.c128 int mux = imx_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder); in dw_hdmi_imx_encoder_commit() local
132 mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT); in dw_hdmi_imx_encoder_commit()
/linux-4.4.14/drivers/gpio/
Dgpio-lp3943.c77 const struct lp3943_reg_cfg *mux = lp3943->mux_cfg; in lp3943_gpio_set_mode() local
79 return lp3943_update_bits(lp3943, mux[offset].reg, mux[offset].mask, in lp3943_gpio_set_mode()
80 val << mux[offset].shift); in lp3943_gpio_set_mode()
121 const struct lp3943_reg_cfg *mux = lp3943->mux_cfg; in lp3943_get_gpio_out_status() local
125 err = lp3943_read_byte(lp3943, mux[offset].reg, &read); in lp3943_get_gpio_out_status()
129 read = (read & mux[offset].mask) >> mux[offset].shift; in lp3943_get_gpio_out_status()
/linux-4.4.14/Documentation/devicetree/bindings/
Dunittest.txt46 4) OF unittest i2c mux device
48 ** I2C unittest mux
51 - compatible: must be unittest-i2c-mux
56 unittest-i2c-mux {
57 compatible = "unittest-i2c-mux";
/linux-4.4.14/Documentation/devicetree/bindings/i2c/
Di2c-mux-gpio.txt21 - compatible: i2c-mux-gpio
24 - mux-gpios: list of gpios used to control the muxer
25 * Standard I2C mux properties. See mux.txt in this directory.
26 * I2C child bus nodes. See mux.txt in this directory.
49 compatible = "i2c-mux-gpio";
52 mux-gpios = <&gpio1 22 0 &gpio1 23 0>;
Di2c-mux-pca954x.txt13 - Standard I2C mux properties. See i2c-mux.txt in this directory.
14 - I2C child bus nodes. See i2c-mux.txt in this directory.
19 - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
Di2c-mux-reg.txt7 - compatible: i2c-mux-reg
10 * Standard I2C mux properties. See mux.txt in this directory.
11 * I2C child bus nodes. See mux.txt in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
36 Example of a mux on PCIe card, the host is a powerpc SoC (big endian):
38 i2c-mux {
46 compatible = "i2c-mux-reg";
Di2c-mux-pinctrl.txt22 - compatible: i2c-mux-pinctrl
28 * Standard pinctrl properties that specify the pin mux state for each child
31 * Standard I2C mux properties. See mux.txt in this directory.
33 * I2C child bus nodes. See mux.txt in this directory.
60 compatible = "i2c-mux-pinctrl";
Di2c-arb-gpio-challenge.txt47 - Standard I2C mux properties. See mux.txt in this directory.
48 - Single I2C child bus node at reg 0. See mux.txt in this directory.
/linux-4.4.14/Documentation/devicetree/bindings/sound/
Deukrea-tlv320.txt11 - fsl,mux-int-port : The internal port of the i.MX audio muxer (AUDMUX).
13 - fsl,mux-ext-port : The external port of the i.MX audio muxer.
24 fsl,mux-int-port = <2>;
25 fsl,mux-ext-port = <3>;
Dimx-audio-wm8962.txt27 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
29 - mux-ext-port : The external port of the i.MX audio muxer
51 mux-int-port = <2>;
52 mux-ext-port = <3>;
Dimx-audio-sgtl5000.txt35 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
37 - mux-ext-port : The external port of the i.MX audio muxer
54 mux-int-port = <1>;
55 mux-ext-port = <3>;
Dimx-audio-es8328.txt34 - mux-int-port : The internal port of the i.MX audio muxer (AUDMUX)
35 - mux-ext-port : The external port of the i.MX audio muxer (AUDMIX)
58 mux-int-port = <1>;
59 mux-ext-port = <3>;
Dsamsung-i2s.txt8 secondary fifo, s/w reset control and internal mux for root clk src.
11 or external dma, s/w reset control, internal mux for root clk src
34 clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2
35 doesn't have any such mux.
47 CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in
/linux-4.4.14/drivers/clk/samsung/
Dclk-exynos-clkout.c30 struct clk_mux mux; member
98 clkout->mux.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG; in exynos_clkout_init()
99 clkout->mux.mask = mux_mask; in exynos_clkout_init()
100 clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT; in exynos_clkout_init()
101 clkout->mux.lock = &clkout->slock; in exynos_clkout_init()
104 parent_names, parent_count, &clkout->mux.hw, in exynos_clkout_init()
/linux-4.4.14/drivers/clk/rockchip/
Dclk.c50 struct clk_mux *mux = NULL; in rockchip_clk_register_branch() local
57 mux = kzalloc(sizeof(*mux), GFP_KERNEL); in rockchip_clk_register_branch()
58 if (!mux) in rockchip_clk_register_branch()
61 mux->reg = base + muxdiv_offset; in rockchip_clk_register_branch()
62 mux->shift = mux_shift; in rockchip_clk_register_branch()
63 mux->mask = BIT(mux_width) - 1; in rockchip_clk_register_branch()
64 mux->flags = mux_flags; in rockchip_clk_register_branch()
65 mux->lock = lock; in rockchip_clk_register_branch()
99 mux ? &mux->hw : NULL, mux_ops, in rockchip_clk_register_branch()
108 kfree(mux); in rockchip_clk_register_branch()
/linux-4.4.14/drivers/mfd/
Dpcf50633-adc.c30 int mux; member
81 adc_setup(pcf, adc->queue[head]->mux, adc->queue[head]->avg); in trigger_next_adc_job_if_any()
120 int pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg) in pcf50633_adc_sync_read() argument
127 ret = pcf50633_adc_async_read(pcf, mux, avg, in pcf50633_adc_sync_read()
138 int pcf50633_adc_async_read(struct pcf50633 *pcf, int mux, int avg, in pcf50633_adc_async_read() argument
149 req->mux = mux; in pcf50633_adc_async_read()
/linux-4.4.14/drivers/clk/nxp/
Dclk-lpc18xx-cgu.c167 struct clk_mux mux; member
179 .mux = { \
201 struct clk_mux mux; member
209 .mux = { \
265 struct clk_mux mux; member
276 .mux = { \
541 clk->mux.reg = reg; in lpc18xx_cgu_register_div()
544 lpc18xx_fill_parent_names(parents, clk->mux.table, clk->n_parents); in lpc18xx_cgu_register_div()
547 &clk->mux.hw, &clk_mux_ops, in lpc18xx_cgu_register_div()
563 clk->mux.reg = reg; in lpc18xx_register_base_clk()
[all …]
/linux-4.4.14/drivers/gpu/drm/sti/
Dsti_awg_utils.c30 u32 mux = (mux_sel << 8) & 0x1ff; in awg_generate_instr() local
66 mux = 0; in awg_generate_instr()
77 mux = 0; in awg_generate_instr()
82 mux = 0; in awg_generate_instr()
103 arg = ((arg + mux) + data_enable); in awg_generate_instr()
/linux-4.4.14/Documentation/devicetree/bindings/pinctrl/
Dmeson,pinctrl.txt13 - reg: should contain address and size for mux, pull-enable, pull and
16 contain "mux", "pull" and "gpio". "pull-enable" is optional and
59 reg-names = "mux", "pull", "pull-enable", "gpio";
68 reg-names = "mux", "pull", "gpio";
74 mux {
84 mux {
Dlantiq,pinctrl-falcon.txt15 mux function to select on those group(s), and two pin configuration parameters:
22 other words, a subnode that lists a mux function but no pin configuration
25 information about e.g. the mux function.
29 Definition of mux function groups:
34 - lantiq,function: A string containing the name of the function to mux to the
39 mux groups:
Dlantiq,pinctrl-xway.txt15 mux function to select on those group(s), and two pin configuration parameters:
22 other words, a subnode that lists a mux function but no pin configuration
25 information about e.g. the mux function.
29 Definition of mux function groups:
34 - lantiq,function: A string containing the name of the function to mux to the
39 mux groups:
46 additional mux groups (XR9 only):
Dimg,tz1090-pinctrl.txt15 mux function to select on those pin(s)/group(s), and various pin configuration
22 other words, a subnode that lists a mux function but no pin configuration
25 information about e.g. the mux function. For this reason, even seemingly boolean
35 - tz1090,function: A string containing the name of the function to mux to the
68 in one of the mux groups (see below) can be muxed only to the functions
69 supported by the mux group. All other pins can be muxed to the "perip"
72 Different pins in the same mux group cannot be muxed to different functions,
73 however it is possible to mux only a subset of the pins in a mux group to a
97 function: perip or those supported by pin's mux group.
113 mux groups:
Dqcom,ipq8064-pinctrl.txt24 mux function to select on those pin(s)/group(s), and various pin configuration
31 other words, a subnode that lists a mux function but no pin configuration
34 information about e.g. the mux function.
47 Supports mux, bias, and drive-strength
78 mux {
Dfsl,imx-pinctrl.txt15 used for a specific device or function. This node represents both mux and config
16 of the pins in that group. The 'mux' selects the function mode(also named mux
25 - fsl,pins: each entry consists of 6 integers and represents the mux and config
36 Force the selected mux mode input path no matter of MUX_MODE functionality.
38 mux mode (regular).
Dpinctrl-vt8500.txt24 more of the mux functions to select on those pin(s), and pull-up/down
26 listed. In other words, a subnode that lists only a mux function implies no
28 a pull parameter implies no information about the mux function.
34 - wm,function: Integer, containing the function to mux to the pin(s):
Dqcom,msm8974-pinctrl.txt24 mux function to select on those pin(s)/group(s), and various pin configuration
31 other words, a subnode that lists a mux function but no pin configuration
34 information about e.g. the mux function.
47 Supports mux, bias and drive-strength
95 mux {
Dbrcm,cygnus-pinmux.txt3 The Cygnus IOMUX controller supports group based mux configuration. In
18 The mux function to select
36 mux {
Dbrcm,bcm2835-gpio.txt33 more of the mux function to select on those pin(s), and pull-up/down
35 listed. In other words, a subnode that lists only a mux function implies no
37 a pul parameter implies no information about the mux function.
44 - brcm,function: Integer, containing the function to mux to the pin(s):
Dqcom,apq8064-pinctrl.txt24 mux function to select on those pin(s)/group(s), and various pin configuration
31 other words, a subnode that lists a mux function but no pin configuration
34 information about e.g. the mux function.
71 mux {
Dimg,tz1090-pdc-pinctrl.txt15 mux function to select on those pin(s)/group(s), and various pin configuration
22 other words, a subnode that lists a mux function but no pin configuration
25 information about e.g. the mux function. For this reason, even seemingly boolean
35 - tz1090,function: A string containing the name of the function to mux to the
70 mux groups:
Dqcom,msm8660-pinctrl.txt24 mux function to select on those pin(s)/group(s), and various pin configuration
31 other words, a subnode that lists a mux function but no pin configuration
34 information about e.g. the mux function.
73 mux {
Dfsl,mxs-pinctrl.txt26 One is to set up a group of pins for a function, both mux selection and pin
43 with given mux function, with bank, pin and mux packed as below.
47 [3..0] : mux selection
49 This integer with mux selection packed is used as an entity by both group
50 and config nodes to identify a pin. The mux selection in the integer takes
Dnvidia,tegra20-pinmux.txt6 the tri-state, mux, pull-up/down, and pad control register sets.
15 mux function to select on those pin(s)/group(s), and various pin configuration
22 other words, a subnode that lists a mux function but no pin configuration
25 information about e.g. the mux function or tristate parameter. For this
35 - nvidia,function: A string containing the name of the function to mux to the
70 mux groups:
Datmel,at91-pinctrl.txt15 used for a specific device or function. This node represents both mux and config
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
83 - atmel,pins: 4 integers array, represents a group of pins mux and config
126 atmel,mux-mask = <
Dpinctrl-palmas.txt18 list of pins. This configuration can include the mux function to select on
26 other words, a subnode that lists a mux function but no pin configuration
29 information about e.g. the mux function.
Dqcom,msm8960-pinctrl.txt53 mux function to select on those pin(s)/group(s), and various pin configuration
63 other words, a subnode that lists a mux function but no pin configuration
66 information about e.g. the mux function.
164 mux {
Dqcom,apq8084-pinctrl.txt53 mux function to select on those pin(s)/group(s), and various pin configuration
63 other words, a subnode that lists a mux function but no pin configuration
66 information about e.g. the mux function.
162 mux {
Dqcom,msm8916-pinctrl.txt53 mux function to select on those pin(s)/group(s), and various pin configuration
63 other words, a subnode that lists a mux function but no pin configuration
66 information about e.g. the mux function.
169 mux {
Dpinctrl-single.txt8 - reg : offset and length of the register set for the mux registers
20 - pinctrl-single,bit-per-mux : boolean to indicate that one register controls
90 pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as
105 In case when one register changes more than one pin's mux the
161 pinctrl-single,bit-per-mux;
Dbrcm,bcm11351-pinctrl.txt37 A pin group node specifies the desired pin mux and/or pin configuration for an
59 - function: String. Specifies the pin mux selection. Values
66 - slew-rate: Integer. Meaning depends on configured pin mux:
85 - function: String. Specifies the pin mux selection. Values
92 - slew-rate: Integer. Meaning depends on configured pin mux:
109 - function: String. Specifies the pin mux selection. Values
Dnvidia,tegra210-pinmux.txt16 mux function to select on those pin(s)/group(s), and various pin configuration
23 other words, a subnode that lists a mux function but no pin configuration
26 information about e.g. the mux function or tristate parameter. For this
40 - nvidia,function: A string containing the name of the function to mux to the
Dfsl,imx7d-pinctrl.txt7 mux and pad control settings, it shares the input select register from main
31 - fsl,pins: each entry consists of 6 integers and represents the mux and config
Dpinctrl-st.txt22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
109 <bank offset mux mode rt_type rt_delay rt_clk>
116 -mux : Should be alternate function number associated this pin.
Dqcom,pmic-mpp.txt53 mux function to select on those pin(s), and various pin configuration
62 other words, a subnode that lists a mux function but no pin configuration
65 information about e.g. the mux function.
Dqcom,pmic-gpio.txt52 mux function to select on those pin(s), and various pin configuration
62 other words, a subnode that lists a mux function but no pin configuration
65 information about e.g. the mux function.
Dfsl,imx53-pinctrl.txt8 - fsl,pins: two integers array, represents a group of pins mux and config
Dfsl,imx51-pinctrl.txt8 - fsl,pins: two integers array, represents a group of pins mux and config
Dfsl,imx35-pinctrl.txt8 - fsl,pins: two integers array, represents a group of pins mux and config
Dfsl,imx6q-pinctrl.txt8 - fsl,pins: two integers array, represents a group of pins mux and config
/linux-4.4.14/net/caif/
Dcfcnfg.c58 struct cflayer *mux; member
83 this->mux = cfmuxl_create(); in cfcnfg_create()
84 if (!this->mux) in cfcnfg_create()
102 cfmuxl_set_uplayer(this->mux, this->ctrl, 0); in cfcnfg_create()
103 layer_set_dn(this->ctrl, this->mux); in cfcnfg_create()
111 kfree(this->mux); in cfcnfg_create()
123 kfree(cfg->mux); in cfcnfg_remove()
189 servl = cfmuxl_remove_uplayer(cfg->mux, channel_id); in caif_disconnect_client()
445 layer_set_dn(servicel, cnfg->mux); in cfcnfg_linkup_rsp()
446 cfmuxl_set_uplayer(cnfg->mux, servicel, channel_id); in cfcnfg_linkup_rsp()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/clock/
Dkeystone-pll.txt44 - compatible : shall be "ti,keystone,pll-mux-clock"
46 - reg - pll mux register
48 - bit-mask : arbitrary bitmask for programming the mux
56 compatible = "ti,keystone,pll-mux-clock";
68 - reg - pll mux register
Dgpio-mux-clock.txt8 - compatible : shall be "gpio-mux-clock".
15 compatible = "gpio-mux-clock";
Dqoriq-clock.txt99 * "fsl,qoriq-core-mux-1.0" for core mux clocks (v1.0)
100 * "fsl,qoriq-core-mux-2.0" for core mux clocks (v2.0)
159 compatible = "fsl,qoriq-core-mux-1.0";
168 compatible = "fsl,qoriq-core-mux-1.0";
/linux-4.4.14/drivers/pinctrl/freescale/
Dpinctrl-imx1-core.c264 new_map[0].data.mux.function = parent->name; in imx1_dt_node_to_map()
265 new_map[0].data.mux.group = np->name; in imx1_dt_node_to_map()
280 (*map)->data.mux.function, (*map)->data.mux.group, map_num); in imx1_dt_node_to_map()
323 unsigned int mux = pins[i].mux_id; in imx1_pmx_set() local
325 unsigned int afunction = MX1_MUX_FUNCTION(mux); in imx1_pmx_set()
326 unsigned int gpio_in_use = MX1_MUX_GPIO(mux); in imx1_pmx_set()
327 unsigned int direction = MX1_MUX_DIR(mux); in imx1_pmx_set()
328 unsigned int gpio_oconf = MX1_MUX_OCONF(mux); in imx1_pmx_set()
329 unsigned int gpio_iconfa = MX1_MUX_ICONFA(mux); in imx1_pmx_set()
330 unsigned int gpio_iconfb = MX1_MUX_ICONFB(mux); in imx1_pmx_set()
/linux-4.4.14/Documentation/devicetree/bindings/mfd/
Domap-usb-host.txt43 * "refclk_60m_int" - 60MHz internal reference clock for UTMI clock mux
44 * "refclk_60m_ext_p1" - 60MHz external ref. clock for Port 1's UTMI clock mux.
45 * "refclk_60m_ext_p2" - 60MHz external ref. clock for Port 2's UTMI clock mux
46 * "utmi_p1_gfclk" - Port 1 UTMI clock mux.
47 * "utmi_p2_gfclk" - Port 2 UTMI clock mux.
Dpalmas.txt31 ti,mux-padX : set the pad register X (1-2) to the correct muxing for the
43 ti,mux-pad1 = <0>;
44 ti,mux-pad2 = <0>;
/linux-4.4.14/arch/arm/mach-davinci/
Dboard-dm365-evm.c631 u8 mux, resets; in evm_init_cpld() local
657 mux = 0; in evm_init_cpld()
664 mux |= BIT(7); in evm_init_cpld()
684 mux |= 2; in evm_init_cpld()
687 mux |= BIT(6) | BIT(5) | BIT(3); in evm_init_cpld()
704 mux |= 1; in evm_init_cpld()
709 mux |= 5; in evm_init_cpld()
714 __raw_writeb(mux, cpld + CPLD_MUX); in evm_init_cpld()
/linux-4.4.14/drivers/leds/
Dleds-lp5523.c117 #define LED_ACTIVE(mux, led) (!!(mux & (0x0001 << led))) argument
453 static int lp5523_mux_parse(const char *buf, u16 *mux, size_t len) in lp5523_mux_parse() argument
474 *mux = tmp_mux; in lp5523_mux_parse()
494 char mux[LP5523_MAX_LEDS + 1]; in show_engine_leds() local
496 lp5523_mux_to_array(chip->engines[nr - 1].led_mux, mux); in show_engine_leds()
498 return sprintf(buf, "%s\n", mux); in show_engine_leds()
504 static int lp5523_load_mux(struct lp55xx_chip *chip, u16 mux, int nr) in lp5523_load_mux() argument
520 ret = lp55xx_write(chip, LP5523_REG_PROG_MEM , (u8)(mux >> 8)); in lp5523_load_mux()
524 ret = lp55xx_write(chip, LP5523_REG_PROG_MEM + 1, (u8)(mux)); in lp5523_load_mux()
528 engine->led_mux = mux; in lp5523_load_mux()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/display/imx/
Dldb.txt23 "di0_pll" - LDB LVDS channel 0 mux
24 "di1_pll" - LDB LVDS channel 1 mux
27 "di0_sel" - IPU1 DI0 mux
28 "di1_sel" - IPU1 DI1 mux
30 "di2_sel" - IPU2 DI0 mux
31 "di3_sel" - IPU2 DI1 mux
/linux-4.4.14/include/linux/mfd/pcf50633/
Dadc.h67 pcf50633_adc_async_read(struct pcf50633 *pcf, int mux, int avg,
71 pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg);
/linux-4.4.14/Documentation/devicetree/bindings/dma/
Dlpc1850-dmamux.txt8 * 2nd cell contain the mux value (0-3) for the peripheral
11 - dma-requests: Number of DMA requests for the mux
37 dmamux: dma-mux {
Dti-dma-crossbar.txt24 the event should be assigned and <1> is the mux selection for in the crossbar.
25 When mux 0 is used the DMA channel can be requested directly from edma node.
Dshdma.txt15 - compatible: should be "renesas,shdma-mux"
31 compatible = "renesas,shdma-mux";
/linux-4.4.14/drivers/net/phy/
DMakefile37 obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o
38 obj-$(CONFIG_MDIO_BUS_MUX_GPIO) += mdio-mux-gpio.o
39 obj-$(CONFIG_MDIO_BUS_MUX_MMIOREG) += mdio-mux-mmioreg.o
/linux-4.4.14/drivers/gpu/drm/rockchip/
Ddw_hdmi-rockchip.c202 int mux; in dw_hdmi_rockchip_encoder_commit() local
204 mux = rockchip_drm_encoder_get_mux_id(hdmi->dev->of_node, encoder); in dw_hdmi_rockchip_encoder_commit()
205 if (mux) in dw_hdmi_rockchip_encoder_commit()
212 (mux) ? "LIT" : "BIG"); in dw_hdmi_rockchip_encoder_commit()
/linux-4.4.14/arch/powerpc/platforms/52xx/
Dmpc52xx_common.c283 u32 mux; in mpc5200_psc_ac97_gpio_reset() local
313 mux = in_be32(&simple_gpio->port_config); in mpc5200_psc_ac97_gpio_reset()
314 out_be32(&simple_gpio->port_config, mux & (~gpio)); in mpc5200_psc_ac97_gpio_reset()
338 out_be32(&simple_gpio->port_config, mux); in mpc5200_psc_ac97_gpio_reset()
/linux-4.4.14/arch/powerpc/sysdev/qe_lib/
Dusb.c25 struct qe_mux __iomem *mux = &qe_immr->qmx; in qe_usb_clock_set() local
50 clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val); in qe_usb_clock_set()
/linux-4.4.14/drivers/of/unittest-data/
Dtests-overlay.dtsi94 compatible = "unittest-i2c-mux";
105 test-mux-dev {
297 /* test mux overlay */
306 compatible = "unittest-i2c-mux";
317 test-mux-dev {
/linux-4.4.14/drivers/pwm/
Dpwm-lp3943.c141 const struct lp3943_reg_cfg *mux = lp3943->mux_cfg; in lp3943_pwm_set_mode() local
146 err = lp3943_update_bits(lp3943, mux[index].reg, in lp3943_pwm_set_mode()
147 mux[index].mask, in lp3943_pwm_set_mode()
148 val << mux[index].shift); in lp3943_pwm_set_mode()
/linux-4.4.14/drivers/gpu/drm/radeon/
Dradeon_atpx_handler.c58 u16 mux; member
281 input.mux = mux_id; in radeon_atpx_switch_disp_mux()
313 input.mux = mux_id; in radeon_atpx_switch_i2c_mux()
345 input.mux = mux_id; in radeon_atpx_switch_start()
377 input.mux = mux_id; in radeon_atpx_switch_end()
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Damdgpu_atpx_handler.c59 u16 mux; member
282 input.mux = mux_id; in amdgpu_atpx_switch_disp_mux()
314 input.mux = mux_id; in amdgpu_atpx_switch_i2c_mux()
346 input.mux = mux_id; in amdgpu_atpx_switch_start()
378 input.mux = mux_id; in amdgpu_atpx_switch_end()
/linux-4.4.14/drivers/net/usb/
Dhso.c553 static u32 hso_mux_to_port(int mux) in hso_mux_to_port() argument
557 switch (mux) { in hso_mux_to_port()
608 int mux) in get_serial_by_shared_int_and_type() argument
612 port = hso_mux_to_port(mux); in get_serial_by_shared_int_and_type()
2711 struct hso_shared_int *mux) in hso_create_mux_serial_device() argument
2742 serial->shared_int = mux; in hso_create_mux_serial_device()
2766 static void hso_free_shared_int(struct hso_shared_int *mux) in hso_free_shared_int() argument
2768 usb_free_urb(mux->shared_intr_urb); in hso_free_shared_int()
2769 kfree(mux->shared_intr_buf); in hso_free_shared_int()
2770 mutex_unlock(&mux->shared_int_lock); in hso_free_shared_int()
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.txt4 representing a serial sub-node device that is mux'd as part of the GSBI
15 Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values.
19 dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values.
/linux-4.4.14/Documentation/devicetree/bindings/cpufreq/
Dtegra124-cpufreq.txt11 - cpu_g: Clock mux for the fast CPU cluster.
12 - cpu_lp: Clock mux for the low-power CPU cluster.
/linux-4.4.14/drivers/media/usb/tm6000/
Dtm6000-core.c751 enum tm6000_mux mux; in tm6000_tvaudio_set_mute() local
754 mux = dev->rinput.amux; in tm6000_tvaudio_set_mute()
756 mux = dev->vinput[dev->input].amux; in tm6000_tvaudio_set_mute()
758 switch (mux) { in tm6000_tvaudio_set_mute()
811 enum tm6000_mux mux; in tm6000_set_volume() local
814 mux = dev->rinput.amux; in tm6000_set_volume()
817 mux = dev->vinput[dev->input].amux; in tm6000_set_volume()
819 switch (mux) { in tm6000_set_volume()
/linux-4.4.14/drivers/pinctrl/sirf/
Dpinctrl-sirf.c111 (*map)[index].data.mux.group = group; in sirfsoc_dt_node_to_map()
112 (*map)[index].data.mux.function = function; in sirfsoc_dt_node_to_map()
144 const struct sirfsoc_padmux *mux = in sirfsoc_pinmux_endisable() local
146 const struct sirfsoc_muxmask *mask = mux->muxmask; in sirfsoc_pinmux_endisable()
148 for (i = 0; i < mux->muxmask_counts; i++) { in sirfsoc_pinmux_endisable()
160 if (mux->funcmask && enable) { in sirfsoc_pinmux_endisable()
164 readl(spmx->rsc_virtbase + mux->ctrlreg); in sirfsoc_pinmux_endisable()
166 (func_en_val & ~mux->funcmask) | (mux->funcval); in sirfsoc_pinmux_endisable()
167 writel(func_en_val, spmx->rsc_virtbase + mux->ctrlreg); in sirfsoc_pinmux_endisable()
/linux-4.4.14/Documentation/sound/oss/
DWaveArtist32 08 | 1 | 0 0 1 1 | mono mixer gain |right ADC mux sel|left ADC mux sel |
82 | | | | mux >-->AMP>--> ADC L
/linux-4.4.14/drivers/staging/comedi/drivers/
Dpcl711.c225 unsigned int mux = 0; in pcl711_set_changain() local
233 mux |= PCL711_MUX_DIFF; in pcl711_set_changain()
236 mux |= PCL711_MUX_CS0; in pcl711_set_changain()
238 mux |= PCL711_MUX_CS1; in pcl711_set_changain()
241 outb(mux | PCL711_MUX_CHAN(chan), dev->iobase + PCL711_MUX_REG); in pcl711_set_changain()
/linux-4.4.14/sound/soc/intel/atom/
Dsst-atom-controls.c167 unsigned int val, mux; in sst_slot_get() local
173 for (mux = e->max; mux > 0; mux--) in sst_slot_get()
174 if (map[mux - 1] & val) in sst_slot_get()
177 ucontrol->value.enumerated.item[0] = mux; in sst_slot_get()
182 e->texts[mux], mux ? map[mux - 1] : -1); in sst_slot_get()
227 unsigned int val, mux; in sst_slot_put() local
233 mux = ucontrol->value.enumerated.item[0]; in sst_slot_put()
234 if (mux > e->max - 1) in sst_slot_put()
242 if (mux == 0) { in sst_slot_put()
251 slot_channel_no = mux - 1; in sst_slot_put()
[all …]
/linux-4.4.14/sound/soc/codecs/
Dwm8998.c112 unsigned int mux, inmode; in wm8998_in1mux_put() local
115 mux = ucontrol->value.enumerated.item[0]; in wm8998_in1mux_put()
116 if (mux > 1) in wm8998_in1mux_put()
120 inmode = arizona->pdata.inmode[2 * mux]; in wm8998_in1mux_put()
121 src_val = mux << ARIZONA_IN1L_SRC_SHIFT; in wm8998_in1mux_put()
127 if (mux) in wm8998_in1mux_put()
169 unsigned int mux, inmode, src_val, mode_val; in wm8998_in2mux_put() local
171 mux = ucontrol->value.enumerated.item[0]; in wm8998_in2mux_put()
172 if (mux > 1) in wm8998_in2mux_put()
175 inmode = arizona->pdata.inmode[1 + (2 * mux)]; in wm8998_in2mux_put()
[all …]
/linux-4.4.14/drivers/memory/
Domap-gpmc.c1262 bool mux) in gpmc_calc_sync_read_timings() argument
1269 if (mux) { in gpmc_calc_sync_read_timings()
1281 if (mux) { in gpmc_calc_sync_read_timings()
1317 bool mux) in gpmc_calc_sync_write_timings() argument
1323 if (mux) { in gpmc_calc_sync_write_timings()
1336 if (mux) { in gpmc_calc_sync_write_timings()
1379 bool mux) in gpmc_calc_async_read_timings() argument
1385 if (mux) in gpmc_calc_async_read_timings()
1391 if (mux) in gpmc_calc_async_read_timings()
1419 bool mux) in gpmc_calc_async_write_timings() argument
[all …]
/linux-4.4.14/include/linux/pinctrl/
Dmachine.h74 struct pinctrl_map_mux mux; member
94 .data.mux = { \
/linux-4.4.14/Documentation/leds/
Dleds-lp5562.txt24 Unlike the LP5521/LP5523/55231, LP5562 has unique feature for the engine mux,
37 Engine mux has two different mode, RGB and W.
42 echo "RGB" > /sys/bus/i2c/devices/xxxx/engine_mux # engine mux for RGB
/linux-4.4.14/Documentation/devicetree/bindings/display/exynos/
Dexynos_hdmi.txt20 HDMI clock mux.
22 HDMI clock mux.
Dexynos_mixer.txt17 mixer mux.
/linux-4.4.14/Documentation/serial/
Dn_gsm.txt13 1- initialize the modem in 0710 mux mode (usually AT+CMUX= command) through
18 3- configure the mux using GSMIOC_GETCONF / GSMIOC_SETCONF ioctl,
66 of the mux)
/linux-4.4.14/Documentation/devicetree/bindings/iio/adc/
Dxilinx-xadc.txt26 - xlnx,external-mux:
33 - xlnx,external-mux-channel: Configures which pair of pins is used to
34 sample data in external mux mode.
/linux-4.4.14/Documentation/devicetree/bindings/arm/samsung/
Dpmu.txt23 - clock-names : list of clock names for particular CLKOUT mux inputs in
26 CLKOUT mux control bits value for given input, e.g.
/linux-4.4.14/drivers/i2c/
DMakefile9 obj-$(CONFIG_I2C_MUX) += i2c-mux.o
/linux-4.4.14/drivers/clk/sirf/
Dclk-atlas7.c1440 struct atlas7_mux_init_data *mux; in atlas7_clk_init() local
1656 mux = &mux_list[i]; in atlas7_clk_init()
1657 clk = clk_register_mux(NULL, mux->mux_name, mux->parent_names, in atlas7_clk_init()
1658 mux->parent_num, mux->flags, in atlas7_clk_init()
1659 sirfsoc_clk_vbase + mux->mux_offset, in atlas7_clk_init()
1660 mux->shift, mux->width, in atlas7_clk_init()
1661 mux->mux_flags, NULL); in atlas7_clk_init()
/linux-4.4.14/arch/arm/mach-pxa/
Dmfp-pxa2xx.c294 #define INIT_GPIO_DESC_MUXED(mux, gpio) \ argument
297 gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
298 gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
/linux-4.4.14/drivers/clk/mvebu/
Dkirkwood.c271 struct clk_mux *mux = in clk_muxing_get_src() local
273 if (clkspec->args[0] == mux->shift) in clk_muxing_get_src()
/linux-4.4.14/Documentation/video4linux/bttv/
DSound-FAQ55 to connect the mux chip.
68 gpiomask specifies which pins are used to control the audio mux chip.
76 mux.
125 muxsel - video mux, input->registervalue mapping
/linux-4.4.14/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_minidump.c236 struct __mux mux; member
506 struct __mux *mux = &entry->region.mux; in qlcnic_dump_mux() local
508 val = mux->val; in qlcnic_dump_mux()
509 for (loop = 0; loop < mux->no_ops; loop++) { in qlcnic_dump_mux()
510 qlcnic_ind_wr(adapter, mux->addr, val); in qlcnic_dump_mux()
511 data = qlcnic_ind_rd(adapter, mux->read_addr); in qlcnic_dump_mux()
514 val += mux->val_stride; in qlcnic_dump_mux()
516 return 2 * mux->no_ops * sizeof(u32); in qlcnic_dump_mux()
/linux-4.4.14/arch/powerpc/boot/dts/fsl/
Dp4080si-post.dtsi397 compatible = "fsl,qoriq-core-mux-1.0";
406 compatible = "fsl,qoriq-core-mux-1.0";
415 compatible = "fsl,qoriq-core-mux-1.0";
424 compatible = "fsl,qoriq-core-mux-1.0";
433 compatible = "fsl,qoriq-core-mux-1.0";
442 compatible = "fsl,qoriq-core-mux-1.0";
Dqoriq-clockgen1.dtsi66 compatible = "fsl,qoriq-core-mux-1.0";
74 compatible = "fsl,qoriq-core-mux-1.0";
/linux-4.4.14/Documentation/acpi/
Di2c-muxes.txt5 Device () scope per mux channel.
/linux-4.4.14/Documentation/devicetree/bindings/mtd/
Dgpmc-nor.txt59 gpmc,mux-add-data;
76 gpmc,wr-data-mux-bus-ns = <90>;

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