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Searched refs:iobase (Results 1 – 200 of 339) sorted by relevance

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/linux-4.4.14/drivers/net/irda/
Dvia-ircc.c83 int iobase);
92 static int via_ircc_read_dongle_id(int iobase);
98 static void via_ircc_change_dongle_speed(int iobase, int speed,
100 static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
102 static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
103 static int upload_rxdata(struct via_ircc_cb *self, int iobase);
418 int iobase; in via_remove_one() local
420 iobase = self->io.fir_base; in via_remove_one()
422 ResetChip(iobase, 5); //hardware reset. in via_remove_one()
451 int iobase = self->io.fir_base; in via_hw_init() local
[all …]
Dw83977af_ir.c86 static int w83977af_open(int i, unsigned int iobase, unsigned int irq,
89 static int w83977af_probe(int iobase, int irq, int dma);
94 static int w83977af_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
95 static void w83977af_dma_write(struct w83977af_ir *self, int iobase);
149 static int w83977af_open(int i, unsigned int iobase, unsigned int irq, in w83977af_open() argument
157 if (!request_region(iobase, CHIP_IO_EXTENT, driver_name)) { in w83977af_open()
159 __func__ , iobase); in w83977af_open()
163 if (w83977af_probe(iobase, irq, dma) == -1) { in w83977af_open()
183 self->io.fir_base = iobase; in w83977af_open()
252 release_region(iobase, CHIP_IO_EXTENT); in w83977af_open()
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Dvia-ircc.h281 static void SetMaxRxPacketSize(__u16 iobase, __u16 size) in SetMaxRxPacketSize() argument
287 WriteReg(iobase, I_CF_L_2, low); in SetMaxRxPacketSize()
288 WriteReg(iobase, I_CF_H_2, high); in SetMaxRxPacketSize()
296 static void SetFIFO(__u16 iobase, __u16 value) in SetFIFO() argument
300 WriteRegBit(iobase, 0x11, 0, 0); in SetFIFO()
301 WriteRegBit(iobase, 0x11, 7, 1); in SetFIFO()
304 WriteRegBit(iobase, 0x11, 0, 0); in SetFIFO()
305 WriteRegBit(iobase, 0x11, 7, 0); in SetFIFO()
308 WriteRegBit(iobase, 0x11, 0, 1); in SetFIFO()
309 WriteRegBit(iobase, 0x11, 7, 0); in SetFIFO()
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Dali-ircc.c119 static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
137 static void SIR2FIR(int iobase);
138 static void FIR2SIR(int iobase);
415 int iobase; in ali_ircc_close() local
419 iobase = self->io.fir_base; in ali_ircc_close()
548 int iobase = info->fir_base; in ali_ircc_setup() local
557 SIR2FIR(iobase); in ali_ircc_setup()
560 outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM in ali_ircc_setup()
563 switch_bank(iobase, BANK3); in ali_ircc_setup()
564 version = inb(iobase+FIR_ID_VR); in ali_ircc_setup()
[all …]
Dnsc-ircc.c176 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
181 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
182 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
185 static int nsc_ircc_read_dongle_id (int iobase);
186 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
522 int iobase; in nsc_ircc_close() local
526 iobase = self->io.fir_base; in nsc_ircc_close()
988 int iobase = info->fir_base; in nsc_ircc_setup() local
991 switch_bank(iobase, BANK3); in nsc_ircc_setup()
992 version = inb(iobase+MID); in nsc_ircc_setup()
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Dsmsc-ircc2.c210 static int smsc_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
360 static inline void register_bank(int iobase, int bank) in register_bank() argument
362 outb(((inb(iobase + IRCC_MASTER) & 0xf0) | (bank & 0x07)), in register_bank()
363 iobase + IRCC_MASTER); in register_bank()
755 int iobase = self->io.fir_base; in smsc_ircc_init_chip() local
757 register_bank(iobase, 0); in smsc_ircc_init_chip()
758 outb(IRCC_MASTER_RESET, iobase + IRCC_MASTER); in smsc_ircc_init_chip()
759 outb(0x00, iobase + IRCC_MASTER); in smsc_ircc_init_chip()
761 register_bank(iobase, 1); in smsc_ircc_init_chip()
762 outb(((inb(iobase + IRCC_SCE_CFGA) & 0x87) | IRCC_CFGA_IRDA_SIR_A), in smsc_ircc_init_chip()
[all …]
Dvlsi_ir.c127 static void vlsi_reg_debug(unsigned iobase, const char *s) in vlsi_reg_debug() argument
133 printk("%02x", (unsigned)inb((iobase+i))); in vlsi_reg_debug()
165 unsigned iobase = pci_resource_start(pdev, 0); in vlsi_proc_pdev() local
175 seq_printf(seq, "%02x", (unsigned)inb((iobase+i))); in vlsi_proc_pdev()
185 unsigned iobase = ndev->base_addr; in vlsi_proc_ndev() local
218 byte = inb(iobase+VLSI_PIO_IRINTR); in vlsi_proc_ndev()
228 word = inw(iobase+VLSI_PIO_RINGPTR); in vlsi_proc_ndev()
230 word = inw(iobase+VLSI_PIO_RINGBASE); in vlsi_proc_ndev()
233 word = inw(iobase+VLSI_PIO_RINGSIZE); in vlsi_proc_ndev()
237 word = inw(iobase+VLSI_PIO_IRCFG); in vlsi_proc_ndev()
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Dw83977af_ir.h193 static inline void switch_bank( int iobase, int set) in switch_bank() argument
195 outb(set, iobase+SSR); in switch_bank()
Dali-ircc.h222 static inline void switch_bank(int iobase, int bank) in switch_bank() argument
224 outb(bank, iobase+FIR_MCR); in switch_bank()
Dnsc-ircc.h276 static inline void switch_bank(int iobase, int bank) in switch_bank() argument
278 outb(bank, iobase+BSR); in switch_bank()
/linux-4.4.14/drivers/staging/comedi/drivers/
Dni_atmio16d.c146 outw(0xFFC2, dev->iobase + AM9513A_COM_REG); in reset_counters()
147 outw(0xFF02, dev->iobase + AM9513A_COM_REG); in reset_counters()
148 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters()
149 outw(0xFF0A, dev->iobase + AM9513A_COM_REG); in reset_counters()
150 outw(0x3, dev->iobase + AM9513A_DATA_REG); in reset_counters()
151 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters()
152 outw(0xFF42, dev->iobase + AM9513A_COM_REG); in reset_counters()
154 outw(0xFFC4, dev->iobase + AM9513A_COM_REG); in reset_counters()
155 outw(0xFF03, dev->iobase + AM9513A_COM_REG); in reset_counters()
156 outw(0x4, dev->iobase + AM9513A_DATA_REG); in reset_counters()
[all …]
Dni_daq_700.c94 outb(s->state & 0xff, dev->iobase + DIO_W); in daq700_dio_insn_bits()
98 val |= inb(dev->iobase + DIO_R) << 8; in daq700_dio_insn_bits()
129 status = inb(dev->iobase + STA_R2); in daq700_ai_eoc()
132 status = inb(dev->iobase + STA_R1); in daq700_ai_eoc()
158 outb(r3_bits | (range & 0x03), dev->iobase + CMD_R3); in daq700_ai_rinsn()
162 outb(chan | 0x80, dev->iobase + CMD_R1); in daq700_ai_rinsn()
169 outb(0x00, dev->iobase + CMD_R2); /* enable ADC conversions */ in daq700_ai_rinsn()
170 outb(0x30, dev->iobase + CMO_R); /* mode 0 out0 L, from H */ in daq700_ai_rinsn()
171 outb(0x00, dev->iobase + ADCLEAR_R); /* clear the ADC FIFO */ in daq700_ai_rinsn()
173 inw(dev->iobase + ADFIFO_R); in daq700_ai_rinsn()
[all …]
Daddi_apci_1564.c131 outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG); in apci1564_reset()
132 inl(dev->iobase + APCI1564_DI_INT_STATUS_REG); in apci1564_reset()
133 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE1_REG); in apci1564_reset()
134 outl(0x0, dev->iobase + APCI1564_DI_INT_MODE2_REG); in apci1564_reset()
137 outl(0x0, dev->iobase + APCI1564_DO_REG); in apci1564_reset()
138 outl(0x0, dev->iobase + APCI1564_DO_INT_CTRL_REG); in apci1564_reset()
141 addi_watchdog_reset(dev->iobase + APCI1564_WDOG_REG); in apci1564_reset()
148 unsigned long iobase = devpriv->counters + ADDI_TCW_CTRL_REG; in apci1564_reset() local
151 outl(0x0, iobase + APCI1564_COUNTER(0)); in apci1564_reset()
152 outl(0x0, iobase + APCI1564_COUNTER(1)); in apci1564_reset()
[all …]
Ddmm32at.c174 outb(DMM32AT_FIFO_CTRL_FIFORST, dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec()
178 dev->iobase + DMM32AT_FIFO_CTRL_REG); in dmm32at_ai_set_chanspec()
180 outb(chan, dev->iobase + DMM32AT_AI_LO_CHAN_REG); in dmm32at_ai_set_chanspec()
181 outb(last_chan, dev->iobase + DMM32AT_AI_HI_CHAN_REG); in dmm32at_ai_set_chanspec()
182 outb(dmm32at_rangebits[range], dev->iobase + DMM32AT_AI_CFG_REG); in dmm32at_ai_set_chanspec()
190 val = inb(dev->iobase + DMM32AT_AI_LSB_REG); in dmm32at_ai_get_sample()
191 val |= (inb(dev->iobase + DMM32AT_AI_MSB_REG) << 8); in dmm32at_ai_get_sample()
204 status = inb(dev->iobase + context); in dmm32at_ai_status()
227 outb(0xff, dev->iobase + DMM32AT_AI_START_CONV_REG); in dmm32at_ai_insn_read()
351 outb(0, dev->iobase + DMM32AT_CTRDIO_CFG_REG); in dmm32at_setaitimer()
[all …]
Dadv_pci_dio.c419 data[1] |= inb(dev->iobase + d->addr + i) << (8 * i); in pci_dio_insn_bits_di_b()
436 data[1] |= inw(dev->iobase + d->addr + 2 * i) << (16 * i); in pci_dio_insn_bits_di_w()
452 dev->iobase + d->addr + i); in pci_dio_insn_bits_do_b()
471 dev->iobase + d->addr + 2 * i); in pci_dio_insn_bits_do_w()
489 outb(omb[0], dev->iobase + OMB0); in pci1760_unchecked_mbxrequest()
490 outb(omb[1], dev->iobase + OMB1); in pci1760_unchecked_mbxrequest()
491 outb(omb[2], dev->iobase + OMB2); in pci1760_unchecked_mbxrequest()
492 outb(omb[3], dev->iobase + OMB3); in pci1760_unchecked_mbxrequest()
494 imb[2] = inb(dev->iobase + IMB2); in pci1760_unchecked_mbxrequest()
496 imb[0] = inb(dev->iobase + IMB0); in pci1760_unchecked_mbxrequest()
[all …]
Dpcmmio.c198 unsigned long iobase = dev->iobase; in pcmmio_dio_write() local
204 outb(val & 0xff, iobase + PCMMIO_PORT_REG(port + 0)); in pcmmio_dio_write()
205 outb((val >> 8) & 0xff, iobase + PCMMIO_PORT_REG(port + 1)); in pcmmio_dio_write()
206 outb((val >> 16) & 0xff, iobase + PCMMIO_PORT_REG(port + 2)); in pcmmio_dio_write()
208 outb(PCMMIO_PAGE(page), iobase + PCMMIO_PAGE_LOCK_REG); in pcmmio_dio_write()
209 outb(val & 0xff, iobase + PCMMIO_PAGE_REG(0)); in pcmmio_dio_write()
210 outb((val >> 8) & 0xff, iobase + PCMMIO_PAGE_REG(1)); in pcmmio_dio_write()
211 outb((val >> 16) & 0xff, iobase + PCMMIO_PAGE_REG(2)); in pcmmio_dio_write()
220 unsigned long iobase = dev->iobase; in pcmmio_dio_read() local
227 val = inb(iobase + PCMMIO_PORT_REG(port + 0)); in pcmmio_dio_read()
[all …]
Daddi_apci_3501.c87 status = inl(dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_wait_for_dac()
111 outl(0, dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_ao_insn_write()
115 dev->iobase + APCI3501_AO_CTRL_STATUS_REG); in apci3501_ao_insn_write()
134 dev->iobase + APCI3501_AO_DATA_REG); in apci3501_ao_insn_write()
149 data[1] = inl(dev->iobase + APCI3501_DI_REG) & 0x3; in apci3501_di_insn_bits()
159 s->state = inl(dev->iobase + APCI3501_DO_REG); in apci3501_do_insn_bits()
162 outl(s->state, dev->iobase + APCI3501_DO_REG); in apci3501_do_insn_bits()
169 static void apci3501_eeprom_wait(unsigned long iobase) in apci3501_eeprom_wait() argument
174 val = inb(iobase + AMCC_OP_REG_MCSR_NVCMD); in apci3501_eeprom_wait()
178 static unsigned short apci3501_eeprom_readw(unsigned long iobase, in apci3501_eeprom_readw() argument
[all …]
Ddt2817.c74 outb(oe, dev->iobase + DT2817_CR); in dt2817_dio_insn_config()
84 unsigned long iobase = dev->iobase + DT2817_DATA; in dt2817_dio_insn_bits() local
91 outb(s->state & 0xff, iobase + 0); in dt2817_dio_insn_bits()
93 outb((s->state >> 8) & 0xff, iobase + 1); in dt2817_dio_insn_bits()
95 outb((s->state >> 16) & 0xff, iobase + 2); in dt2817_dio_insn_bits()
97 outb((s->state >> 24) & 0xff, iobase + 3); in dt2817_dio_insn_bits()
100 val = inb(iobase + 0); in dt2817_dio_insn_bits()
101 val |= (inb(iobase + 1) << 8); in dt2817_dio_insn_bits()
102 val |= (inb(iobase + 2) << 16); in dt2817_dio_insn_bits()
103 val |= (inb(iobase + 3) << 24); in dt2817_dio_insn_bits()
[all …]
Daddi_watchdog.c27 unsigned long iobase; member
53 outl(reload, spriv->iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_insn_config()
66 outl(spriv->wdog_ctrl, spriv->iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_insn_config()
80 data[i] = inl(spriv->iobase + ADDI_TCW_STATUS_REG); in addi_watchdog_insn_read()
101 spriv->iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_insn_write()
107 void addi_watchdog_reset(unsigned long iobase) in addi_watchdog_reset() argument
109 outl(0x0, iobase + ADDI_TCW_CTRL_REG); in addi_watchdog_reset()
110 outl(0x0, iobase + ADDI_TCW_RELOAD_REG); in addi_watchdog_reset()
114 int addi_watchdog_init(struct comedi_subdevice *s, unsigned long iobase) in addi_watchdog_init() argument
122 spriv->iobase = iobase; in addi_watchdog_init()
Dadv_pci1710.c325 outw(chan | (chan << 8), dev->iobase + PCI171X_MUX_REG); in pci171x_ai_setup_chanlist()
326 outw(rangeval, dev->iobase + PCI171X_RANGE_REG); in pci171x_ai_setup_chanlist()
335 outw(devpriv->mux_ext, dev->iobase + PCI171X_MUX_REG); in pci171x_ai_setup_chanlist()
345 status = inw(dev->iobase + PCI171X_STATUS_REG); in pci171x_ai_eoc()
361 sample = inw(dev->iobase + PCI171X_AD_DATA_REG); in pci171x_ai_read_sample()
391 outw(devpriv->ctrl, dev->iobase + PCI171X_CTRL_REG); in pci171x_ai_insn_read()
392 outb(0, dev->iobase + PCI171X_CLRFIFO_REG); in pci171x_ai_insn_read()
393 outb(0, dev->iobase + PCI171X_CLRINT_REG); in pci171x_ai_insn_read()
401 outw(0, dev->iobase + PCI171X_SOFTTRG_REG); in pci171x_ai_insn_read()
414 outb(0, dev->iobase + PCI171X_CLRFIFO_REG); in pci171x_ai_insn_read()
[all …]
Dmultiq3.c87 dev->iobase + MULTIQ3_CTRL_REG); in multiq3_set_ctrl()
97 status = inw(dev->iobase + MULTIQ3_STATUS_REG); in multiq3_ai_status()
121 outw(0, dev->iobase + MULTIQ3_AI_CONV_REG); in multiq3_ai_insn_read()
129 val = inb(dev->iobase + MULTIQ3_AI_REG) << 8; in multiq3_ai_insn_read()
130 val |= inb(dev->iobase + MULTIQ3_AI_REG); in multiq3_ai_insn_read()
153 outw(val, dev->iobase + MULTIQ3_AO_REG); in multiq3_ao_insn_write()
165 data[1] = inw(dev->iobase + MULTIQ3_DI_REG); in multiq3_di_insn_bits()
176 outw(s->state, dev->iobase + MULTIQ3_DO_REG); in multiq3_do_insn_bits()
198 outb(MULTIQ3_BP_RESET, dev->iobase + MULTIQ3_ENC_CTRL_REG); in multiq3_encoder_insn_read()
201 outb(MULTIQ3_TRSFRCNTR_OL, dev->iobase + MULTIQ3_ENC_CTRL_REG); in multiq3_encoder_insn_read()
[all …]
Dquatech_daqp_cs.c169 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_clear_events()
189 outb(DAQP_CMD_STOP, dev->iobase + DAQP_CMD_REG); in daqp_ai_cancel()
190 outb(0, dev->iobase + DAQP_CTRL_REG); in daqp_ai_cancel()
191 inb(dev->iobase + DAQP_STATUS_REG); in daqp_ai_cancel()
205 val = inb(dev->iobase + DAQP_AI_FIFO_REG); in daqp_ai_get_sample()
206 val |= inb(dev->iobase + DAQP_AI_FIFO_REG) << 8; in daqp_ai_get_sample()
221 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_interrupt()
246 status = inb(dev->iobase + DAQP_STATUS_REG); in daqp_interrupt()
277 outb(val & 0xff, dev->iobase + DAQP_SCANLIST_REG); in daqp_ai_set_one_scanlist_entry()
278 outb((val >> 8) & 0xff, dev->iobase + DAQP_SCANLIST_REG); in daqp_ai_set_one_scanlist_entry()
[all …]
Dke_counter.c63 outb((val >> 24) & 0xff, dev->iobase + KE_SIGN_REG(chan)); in ke_counter_insn_write()
64 outb((val >> 16) & 0xff, dev->iobase + KE_MSB_REG(chan)); in ke_counter_insn_write()
65 outb((val >> 8) & 0xff, dev->iobase + KE_MID_REG(chan)); in ke_counter_insn_write()
66 outb((val >> 0) & 0xff, dev->iobase + KE_LSB_REG(chan)); in ke_counter_insn_write()
83 inb(dev->iobase + KE_LATCH_REG(chan)); in ke_counter_insn_read()
85 val = inb(dev->iobase + KE_LSB_REG(chan)); in ke_counter_insn_read()
86 val |= (inb(dev->iobase + KE_MID_REG(chan)) << 8); in ke_counter_insn_read()
87 val |= (inb(dev->iobase + KE_MSB_REG(chan)) << 16); in ke_counter_insn_read()
88 val |= (inb(dev->iobase + KE_SIGN_REG(chan)) << 24); in ke_counter_insn_read()
101 outb(0, dev->iobase + KE_RESET_REG(chan)); in ke_counter_reset()
[all …]
Ddas08.c171 status = inb(dev->iobase + DAS08_STATUS_REG); in das08_ai_eoc()
193 inb(dev->iobase + DAS08_AI_LSB_REG); in das08_ai_insn_read()
194 inb(dev->iobase + DAS08_AI_MSB_REG); in das08_ai_insn_read()
201 outb(devpriv->do_mux_bits, dev->iobase + DAS08_CONTROL_REG); in das08_ai_insn_read()
208 dev->iobase + DAS08_GAIN_REG); in das08_ai_insn_read()
214 if (inb(dev->iobase + DAS08_AI_MSB_REG) & 0x80) in das08_ai_insn_read()
218 outb_p(0, dev->iobase + DAS08_AI_TRIG_REG); in das08_ai_insn_read()
224 msb = inb(dev->iobase + DAS08_AI_MSB_REG); in das08_ai_insn_read()
225 lsb = inb(dev->iobase + DAS08_AI_LSB_REG); in das08_ai_insn_read()
265 data[1] = DAS08_STATUS_DI(inb(dev->iobase + DAS08_STATUS_REG)); in das08_di_insn_bits()
[all …]
Dpcl724.c80 unsigned long iobase) in pcl724_8255mapped_io() argument
82 int movport = I8255_SIZE * (iobase >> 12); in pcl724_8255mapped_io()
84 iobase &= 0x0fff; in pcl724_8255mapped_io()
86 outb(port + movport, iobase); in pcl724_8255mapped_io()
88 outb(data, iobase + 1); in pcl724_8255mapped_io()
91 return inb(iobase + 1); in pcl724_8255mapped_io()
99 unsigned long iobase; in pcl724_attach() local
126 iobase = dev->iobase + (i * 0x1000); in pcl724_attach()
128 iobase); in pcl724_attach()
Ddas6402.c147 outb(DAS6402_MODE_ENHANCED | mode, dev->iobase + DAS6402_MODE_REG); in das6402_set_mode()
153 outb(DAS6402_STATUS_W_EXTEND, dev->iobase + DAS6402_STATUS_REG); in das6402_set_extended()
154 outb(DAS6402_STATUS_W_EXTEND | val, dev->iobase + DAS6402_STATUS_REG); in das6402_set_extended()
155 outb(val, dev->iobase + DAS6402_STATUS_REG); in das6402_set_extended()
162 DAS6402_STATUS_W_CLRXIN, dev->iobase + DAS6402_STATUS_REG); in das6402_clear_all_interrupts()
167 outb(DAS6402_STATUS_W_CLRINT, dev->iobase + DAS6402_STATUS_REG); in das6402_ai_clear_eoc()
175 val = inw(dev->iobase + DAS6402_AI_DATA_REG); in das6402_ai_read_sample()
189 status = inb(dev->iobase + DAS6402_STATUS_REG); in das6402_interrupt()
242 dev->iobase + DAS6402_AI_MUX_REG); in das6402_ai_cmd()
250 DAS6402_CTRL_PACER_TRIG, dev->iobase + DAS6402_CTRL_REG); in das6402_ai_cmd()
[all …]
Ds526.c139 outw((val >> 16) & 0xffff, dev->iobase + S526_GPCT_MSB_REG(chan)); in s526_gpct_write()
140 outw(val & 0xffff, dev->iobase + S526_GPCT_LSB_REG(chan)); in s526_gpct_write()
149 val = inw(dev->iobase + S526_GPCT_LSB_REG(chan)) & 0xffff; in s526_gpct_read()
150 val |= (inw(dev->iobase + S526_GPCT_MSB_REG(chan)) & 0xff) << 16; in s526_gpct_read()
196 outw(cmReg.value, dev->iobase + S526_GPCT_MODE_REG(chan)); in s526_gpct_insn_config()
201 outw(0x8000, dev->iobase + S526_GPCT_CTRL_REG(chan)); in s526_gpct_insn_config()
233 outw(cmReg.value, dev->iobase + S526_GPCT_MODE_REG(chan)); in s526_gpct_insn_config()
241 dev->iobase + S526_GPCT_CTRL_REG(chan)); in s526_gpct_insn_config()
246 outw(0x8000, dev->iobase + S526_GPCT_CTRL_REG(chan)); in s526_gpct_insn_config()
248 outw(0x4000, dev->iobase + S526_GPCT_CTRL_REG(chan)); in s526_gpct_insn_config()
[all …]
Ddt2814.c71 status = inb(dev->iobase + DT2814_CSR); in dt2814_ai_eoc()
88 outb(chan, dev->iobase + DT2814_CSR); in dt2814_ai_insn_read()
94 hi = inb(dev->iobase + DT2814_DATA); in dt2814_ai_insn_read()
95 lo = inb(dev->iobase + DT2814_DATA); in dt2814_ai_insn_read()
191 outb(chan | DT2814_ENB | (trigvar << 5), dev->iobase + DT2814_CSR); in dt2814_ai_cmd()
209 hi = inb(dev->iobase + DT2814_DATA); in dt2814_interrupt()
210 lo = inb(dev->iobase + DT2814_DATA); in dt2814_interrupt()
217 outb(0, dev->iobase + DT2814_CSR); in dt2814_interrupt()
222 if (inb(dev->iobase + DT2814_CSR) & DT2814_FINISH) in dt2814_interrupt()
225 inb(dev->iobase + DT2814_DATA); in dt2814_interrupt()
[all …]
Dii_pci20kc.c147 void __iomem *iobase = ii20k_module_iobase(dev, s); in ii20k_ao_insn_write() local
159 writeb(val & 0xff, iobase + II20K_AO_LSB_REG(chan)); in ii20k_ao_insn_write()
160 writeb((val >> 8) & 0xff, iobase + II20K_AO_MSB_REG(chan)); in ii20k_ao_insn_write()
161 writeb(0x00, iobase + II20K_AO_STRB_REG(chan)); in ii20k_ao_insn_write()
172 void __iomem *iobase = ii20k_module_iobase(dev, s); in ii20k_ai_eoc() local
175 status = readb(iobase + II20K_AI_STATUS_REG); in ii20k_ai_eoc()
185 void __iomem *iobase = ii20k_module_iobase(dev, s); in ii20k_ai_setup() local
191 writeb(II20K_AI_CONF_ENA, iobase + II20K_AI_CONF_REG); in ii20k_ai_setup()
194 writeb(0, iobase + II20K_AI_STATUS_CMD_REG); in ii20k_ai_setup()
198 writeb(val, iobase + II20K_AI_OPT_REG); in ii20k_ai_setup()
[all …]
Dni_at_ao.c132 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_select_reg_group()
152 dev->iobase + ATAO_AO_REG(chan)); in atao_ao_insn_write()
168 outw(s->state, dev->iobase + ATAO_DIO_REG); in atao_dio_insn_bits()
170 data[1] = inw(dev->iobase + ATAO_DIO_REG); in atao_dio_insn_bits()
203 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3_REG); in atao_dio_insn_config()
259 outw(bits, dev->iobase + ATAO_CFG2_REG); in atao_calib_insn_write()
261 dev->iobase + ATAO_CFG2_REG); in atao_calib_insn_write()
265 outw(ATAO_CFG2_CALLD(chan), dev->iobase + ATAO_CFG2_REG); in atao_calib_insn_write()
266 outw(ATAO_CFG2_CALLD_NOP, dev->iobase + ATAO_CFG2_REG); in atao_calib_insn_write()
281 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_reset()
[all …]
Dme4000.c399 ctrl = inl(dev->iobase + ME4000_AI_CTRL_REG); in me4000_ai_reset()
401 outl(ctrl, dev->iobase + ME4000_AI_CTRL_REG); in me4000_ai_reset()
404 outl(0x0, dev->iobase + ME4000_AI_CTRL_REG); in me4000_ai_reset()
425 outl(0x8000, dev->iobase + ME4000_AO_SINGLE_REG(chan)); in me4000_reset()
432 outl(val, dev->iobase + ME4000_AO_CTRL_REG(chan)); in me4000_reset()
436 dev->iobase + ME4000_AO_DEMUX_ADJUST_REG); in me4000_reset()
442 if (!(inl(dev->iobase + ME4000_DIO_DIR_REG) & 0x1)) in me4000_reset()
443 outl(0x1, dev->iobase + ME4000_DIO_CTRL_REG); in me4000_reset()
452 val = inl(dev->iobase + ME4000_AI_DATA_REG); in me4000_ai_get_sample()
463 status = inl(dev->iobase + ME4000_AI_STATUS_REG); in me4000_ai_eoc()
[all …]
Ddas16m1.c258 outb(devpriv->control_state, dev->iobase + DAS16M1_INTR_CONTROL); in das16m1_cmd_exec()
279 outb(i, dev->iobase + DAS16M1_QUEUE_ADDR); in das16m1_cmd_exec()
283 outb(byte, dev->iobase + DAS16M1_QUEUE_DATA); in das16m1_cmd_exec()
303 outb(byte, dev->iobase + DAS16M1_CS); in das16m1_cmd_exec()
305 outb(0, dev->iobase + DAS16M1_CLEAR_INTR); in das16m1_cmd_exec()
308 outb(devpriv->control_state, dev->iobase + DAS16M1_INTR_CONTROL); in das16m1_cmd_exec()
318 outb(devpriv->control_state, dev->iobase + DAS16M1_INTR_CONTROL); in das16m1_cancel()
330 status = inb(dev->iobase + DAS16M1_CS); in das16m1_ai_eoc()
347 outb(devpriv->control_state, dev->iobase + DAS16M1_INTR_CONTROL); in das16m1_ai_rinsn()
350 outb(0, dev->iobase + DAS16M1_QUEUE_ADDR); in das16m1_ai_rinsn()
[all …]
Dcomedi_parport.c87 outb(s->state, dev->iobase + PARPORT_DATA_REG); in parport_data_reg_insn_bits()
89 data[1] = inb(dev->iobase + PARPORT_DATA_REG); in parport_data_reg_insn_bits()
106 ctrl = inb(dev->iobase + PARPORT_CTRL_REG); in parport_data_reg_insn_config()
111 outb(ctrl, dev->iobase + PARPORT_CTRL_REG); in parport_data_reg_insn_config()
121 data[1] = inb(dev->iobase + PARPORT_STATUS_REG) >> 3; in parport_status_reg_insn_bits()
134 ctrl = inb(dev->iobase + PARPORT_CTRL_REG); in parport_ctrl_reg_insn_bits()
137 outb(ctrl, dev->iobase + PARPORT_CTRL_REG); in parport_ctrl_reg_insn_bits()
198 ctrl = inb(dev->iobase + PARPORT_CTRL_REG); in parport_intr_cmd()
200 outb(ctrl, dev->iobase + PARPORT_CTRL_REG); in parport_intr_cmd()
210 ctrl = inb(dev->iobase + PARPORT_CTRL_REG); in parport_intr_cancel()
[all …]
Dadv_pci1723.c98 outw(val, dev->iobase + PCI1723_AO_REG(chan)); in pci1723_ao_insn_write()
123 outw(mode, dev->iobase + PCI1723_DIO_CTRL_REG); in pci1723_dio_insn_config()
134 outw(s->state, dev->iobase + PCI1723_DIO_DATA_REG); in pci1723_dio_insn_bits()
136 data[1] = inw(dev->iobase + PCI1723_DIO_DATA_REG); in pci1723_dio_insn_bits()
153 dev->iobase = pci_resource_start(pcidev, 2); in pci1723_auto_attach()
172 outw(PCI1723_SYNC_CTRL_SYNC, dev->iobase + PCI1723_SYNC_CTRL_REG); in pci1723_auto_attach()
176 outw(0, dev->iobase + PCI1723_RANGE_STROBE_REG); in pci1723_auto_attach()
178 outw(0x8000, dev->iobase + PCI1723_AO_REG(i)); in pci1723_auto_attach()
181 outw(0, dev->iobase + PCI1723_SYNC_STROBE_REG); in pci1723_auto_attach()
184 outw(PCI1723_SYNC_CTRL_ASYNC, dev->iobase + PCI1723_SYNC_CTRL_REG); in pci1723_auto_attach()
[all …]
Ddt282x.c444 dev->iobase + DT2821_SUPCSR_REG); in dt282x_ao_dma_interrupt()
464 dev->iobase + DT2821_SUPCSR_REG); in dt282x_ai_dma_interrupt()
487 outw(devpriv->supcsr, dev->iobase + DT2821_SUPCSR_REG); in dt282x_ai_dma_interrupt()
510 adcsr = inw(dev->iobase + DT2821_ADCSR_REG); in dt282x_interrupt()
511 dacsr = inw(dev->iobase + DT2821_DACSR_REG); in dt282x_interrupt()
512 supcsr = inw(dev->iobase + DT2821_SUPCSR_REG); in dt282x_interrupt()
536 data = inw(dev->iobase + DT2821_ADDAT_REG); in dt282x_interrupt()
549 dev->iobase + DT2821_SUPCSR_REG); in dt282x_interrupt()
567 dev->iobase + DT2821_CHANCSR_REG); in dt282x_load_changain()
575 dev->iobase + DT2821_ADCSR_REG); in dt282x_load_changain()
[all …]
Dni_at_a2150.c170 status = inw(dev->iobase + STATUS_REG); in a2150_interrupt()
236 outw(0x00, dev->iobase + DMA_TC_CLEAR_REG); in a2150_interrupt()
249 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG); in a2150_cancel()
255 outw(0, dev->iobase + FIFO_RESET_REG); in a2150_cancel()
499 outw(0, dev->iobase + FIFO_RESET_REG); in a2150_ai_cmd()
520 outw(devpriv->config_bits, dev->iobase + CONFIG_REG); in a2150_ai_cmd()
541 outw(0x00, dev->iobase + DMA_TC_CLEAR_REG); in a2150_ai_cmd()
545 outw(devpriv->irq_dma_bits, dev->iobase + IRQ_DMA_CNTRL_REG); in a2150_ai_cmd()
570 outw(trigger_bits, dev->iobase + TRIGGER_REG); in a2150_ai_cmd()
574 outw(0, dev->iobase + FIFO_START_REG); in a2150_ai_cmd()
[all …]
D8255.c60 unsigned long iobase; in dev_8255_attach() local
65 iobase = it->options[i]; in dev_8255_attach()
66 if (!iobase) in dev_8255_attach()
80 iobase = it->options[i]; in dev_8255_attach()
89 ret = __comedi_request_region(dev, iobase, I8255_SIZE); in dev_8255_attach()
93 ret = subdev_8255_init(dev, s, NULL, iobase); in dev_8255_attach()
99 release_region(iobase, I8255_SIZE); in dev_8255_attach()
Ddas1800.c460 unipolar = inb(dev->iobase + DAS1800_CONTROL_C) & UB; in munge_data()
475 insw(dev->iobase + DAS1800_FIFO, devpriv->fifo_buf, nsamples); in das1800_handle_fifo_half_full()
487 unipolar = inb(dev->iobase + DAS1800_CONTROL_C) & UB; in das1800_handle_fifo_not_empty()
489 while (inb(dev->iobase + DAS1800_STATUS) & FNE) { in das1800_handle_fifo_not_empty()
490 dpnt = inw(dev->iobase + DAS1800_FIFO); in das1800_handle_fifo_not_empty()
556 outb(CLEAR_INTR_MASK & ~DMATC, dev->iobase + DAS1800_STATUS); in das1800_handle_dma()
571 outb(0x0, dev->iobase + DAS1800_STATUS); in das1800_cancel()
572 outb(0x0, dev->iobase + DAS1800_CONTROL_B); in das1800_cancel()
573 outb(0x0, dev->iobase + DAS1800_CONTROL_A); in das1800_cancel()
593 unsigned int status = inb(dev->iobase + DAS1800_STATUS); in das1800_ai_handler()
[all …]
Drti800.c149 status = inb(dev->iobase + RTI800_CSR); in rti800_ai_eoc()
151 outb(0, dev->iobase + RTI800_CLRFLAGS); in rti800_ai_eoc()
171 inb(dev->iobase + RTI800_ADCHI); in rti800_ai_insn_read()
172 outb(0, dev->iobase + RTI800_CLRFLAGS); in rti800_ai_insn_read()
177 outb(devpriv->muxgain_bits, dev->iobase + RTI800_MUXGAIN); in rti800_ai_insn_read()
194 outb(0, dev->iobase + RTI800_CONVERT); in rti800_ai_insn_read()
200 val = inb(dev->iobase + RTI800_ADCLO); in rti800_ai_insn_read()
201 val |= (inb(dev->iobase + RTI800_ADCHI) & 0xf) << 8; in rti800_ai_insn_read()
231 outb(val & 0xff, dev->iobase + reg_lo); in rti800_ao_insn_write()
232 outb((val >> 8) & 0xff, dev->iobase + reg_hi); in rti800_ao_insn_write()
[all …]
Daddi_apci_2200.c42 data[1] = inw(dev->iobase + APCI2200_DI_REG); in apci2200_di_insn_bits()
52 s->state = inw(dev->iobase + APCI2200_DO_REG); in apci2200_do_insn_bits()
55 outw(s->state, dev->iobase + APCI2200_DO_REG); in apci2200_do_insn_bits()
64 outw(0x0, dev->iobase + APCI2200_DO_REG); in apci2200_reset()
66 addi_watchdog_reset(dev->iobase + APCI2200_WDOG_REG); in apci2200_reset()
82 dev->iobase = pci_resource_start(pcidev, 1); in apci2200_auto_attach()
108 ret = addi_watchdog_init(s, dev->iobase + APCI2200_WDOG_REG); in apci2200_auto_attach()
118 if (dev->iobase) in apci2200_detach()
Daddi_apci_1032.c102 outl(0x0, dev->iobase + APCI1032_CTRL_REG); in apci1032_reset()
104 inl(dev->iobase + APCI1032_STATUS_REG); in apci1032_reset()
106 outl(0x0, dev->iobase + APCI1032_MODE1_REG); in apci1032_reset()
107 outl(0x0, dev->iobase + APCI1032_MODE2_REG); in apci1032_reset()
245 outl(devpriv->mode1, dev->iobase + APCI1032_MODE1_REG); in apci1032_cos_cmd()
246 outl(devpriv->mode2, dev->iobase + APCI1032_MODE2_REG); in apci1032_cos_cmd()
247 outl(devpriv->ctrl, dev->iobase + APCI1032_CTRL_REG); in apci1032_cos_cmd()
271 ctrl = inl(dev->iobase + APCI1032_CTRL_REG); in apci1032_interrupt()
276 outl(ctrl & ~APCI1032_CTRL_INT_ENA, dev->iobase + APCI1032_CTRL_REG); in apci1032_interrupt()
278 s->state = inl(dev->iobase + APCI1032_STATUS_REG) & 0xffff; in apci1032_interrupt()
[all …]
Dpcl818.c328 outb(chan, dev->iobase + PCL818_MUX_REG); in pcl818_ai_set_chan_range()
329 outb(range, dev->iobase + PCL818_RANGE_REG); in pcl818_ai_set_chan_range()
337 dev->iobase + PCL818_MUX_REG); in pcl818_ai_set_chan_scan()
371 outb(0, dev->iobase + PCL818_STATUS_REG); in pcl818_ai_clear_eoc()
377 outb(0, dev->iobase + PCL818_AI_LSB_REG); in pcl818_ai_soft_trig()
386 val = inb(dev->iobase + PCL818_FI_DATALO); in pcl818_ai_get_fifo_sample()
387 val |= (inb(dev->iobase + PCL818_FI_DATAHI) << 8); in pcl818_ai_get_fifo_sample()
401 val = inb(dev->iobase + PCL818_AI_MSB_REG) << 8; in pcl818_ai_get_sample()
402 val |= inb(dev->iobase + PCL818_AI_LSB_REG); in pcl818_ai_get_sample()
417 status = inb(dev->iobase + PCL818_STATUS_REG); in pcl818_ai_eoc()
[all …]
Daddi_apci_2032.c57 s->state = inl(dev->iobase + APCI2032_DO_REG); in apci2032_do_insn_bits()
60 outl(s->state, dev->iobase + APCI2032_DO_REG); in apci2032_do_insn_bits()
72 data[1] = inl(dev->iobase + APCI2032_INT_STATUS_REG) & 3; in apci2032_int_insn_bits()
83 outl(0x0, dev->iobase + APCI2032_INT_CTRL_REG); in apci2032_int_stop()
150 outl(enabled_isns, dev->iobase + APCI2032_INT_CTRL_REG); in apci2032_int_cmd()
183 val = inl(dev->iobase + APCI2032_STATUS_REG) & APCI2032_STATUS_IRQ; in apci2032_interrupt()
190 val = inl(dev->iobase + APCI2032_INT_STATUS_REG) & 3; in apci2032_interrupt()
192 outl(~val & 3, dev->iobase + APCI2032_INT_CTRL_REG); in apci2032_interrupt()
227 outl(0x0, dev->iobase + APCI2032_DO_REG); in apci2032_reset()
228 outl(0x0, dev->iobase + APCI2032_INT_CTRL_REG); in apci2032_reset()
[all …]
Dcb_das16_cs.c142 status = inw(dev->iobase + DAS16CS_MISC1_REG); in das16cs_ai_eoc()
161 dev->iobase + DAS16CS_AI_MUX_REG); in das16cs_ai_insn_read()
170 outw(devpriv->misc1, dev->iobase + DAS16CS_MISC1_REG); in das16cs_ai_insn_read()
187 outw(devpriv->misc2, dev->iobase + DAS16CS_MISC2_REG); in das16cs_ai_insn_read()
190 outw(0, dev->iobase + DAS16CS_AI_DATA_REG); in das16cs_ai_insn_read()
196 data[i] = inw(dev->iobase + DAS16CS_AI_DATA_REG); in das16cs_ai_insn_read()
217 outw(devpriv->misc1, dev->iobase + DAS16CS_MISC1_REG); in das16cs_ao_insn_write()
227 outw(misc1, dev->iobase + DAS16CS_MISC1_REG); in das16cs_ao_insn_write()
235 outw(misc1, dev->iobase + DAS16CS_MISC1_REG); in das16cs_ao_insn_write()
238 dev->iobase + DAS16CS_MISC1_REG); in das16cs_ao_insn_write()
[all …]
Dadl_pci9111.c167 flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG); in pci9111_interrupt_source_set()
180 outb(flags, dev->iobase + PCI9111_INT_CTRL_REG); in pci9111_interrupt_source_set()
185 unsigned long int_ctrl_reg = dev->iobase + PCI9111_INT_CTRL_REG; in pci9111_fifo_reset()
203 outb(0, dev->iobase + PCI9111_AI_TRIG_CTRL_REG); in pci9111_ai_cancel()
361 outb(last_chan, dev->iobase + PCI9111_AI_CHANNEL_REG); in pci9111_ai_do_cmd()
364 outb(PCI9111_AI_RANGE(range0), dev->iobase + PCI9111_AI_RANGE_STAT_REG); in pci9111_ai_do_cmd()
390 outb(trig, dev->iobase + PCI9111_AI_TRIG_CTRL_REG); in pci9111_ai_do_cmd()
424 insw(dev->iobase + PCI9111_AI_FIFO_REG, buf, samples); in pci9111_handle_fifo_half_full()
495 status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG); in pci9111_interrupt()
501 outb(0, dev->iobase + PCI9111_INT_CLR_REG); in pci9111_interrupt()
[all …]
Daddi_apci_3120.c319 inb(dev->iobase + APCI3120_CTR0_REG); in apci3120_clr_timer2_interrupt()
330 dev->iobase + APCI3120_CTR0_REG); in apci3120_timer_write()
331 outw(val & 0xffff, dev->iobase + APCI3120_TIMER_REG); in apci3120_timer_write()
337 dev->iobase + APCI3120_CTR0_REG); in apci3120_timer_write()
338 outw((val >> 16) & 0xffff, dev->iobase + APCI3120_TIMER_REG); in apci3120_timer_write()
351 dev->iobase + APCI3120_CTR0_REG); in apci3120_timer_read()
352 val = inw(dev->iobase + APCI3120_TIMER_REG); in apci3120_timer_read()
358 dev->iobase + APCI3120_CTR0_REG); in apci3120_timer_read()
359 val |= (inw(dev->iobase + APCI3120_TIMER_REG) << 16); in apci3120_timer_read()
372 outb(devpriv->timer_mode, dev->iobase + APCI3120_TIMER_MODE_REG); in apci3120_timer_set_mode()
[all …]
Dmpc624.c131 outb(0, dev->iobase + MPC624_ADC); in mpc624_ai_get_sample()
136 outb(bit, dev->iobase + MPC624_ADC); in mpc624_ai_get_sample()
140 outb(MPC624_ADSCK | bit, dev->iobase + MPC624_ADC); in mpc624_ai_get_sample()
145 data_in |= (inb(dev->iobase + MPC624_ADC) & MPC624_ADSDO) >> 4; in mpc624_ai_get_sample()
204 status = inb(dev->iobase + MPC624_ADC); in mpc624_ai_eoc()
222 outb(insn->chanspec, dev->iobase + MPC624_GNMUXCH); in mpc624_ai_insn_read()
226 outb(MPC624_ADSCK, dev->iobase + MPC624_ADC); in mpc624_ai_insn_read()
228 outb(MPC624_ADCS | MPC624_ADSCK, dev->iobase + MPC624_ADC); in mpc624_ai_insn_read()
230 outb(0, dev->iobase + MPC624_ADC); in mpc624_ai_insn_read()
Daio_iiro_16.c59 val = inb(dev->iobase + AIO_IIRO_16_INPUT_0_7); in aio_iiro_16_read_inputs()
60 val |= inb(dev->iobase + AIO_IIRO_16_INPUT_8_15) << 8; in aio_iiro_16_read_inputs()
72 status = inb(dev->iobase + AIO_IIRO_16_STATUS); in aio_iiro_16_cos()
88 inb(dev->iobase + AIO_IIRO_16_IRQ); in aio_iiro_enable_irq()
90 outb(0, dev->iobase + AIO_IIRO_16_IRQ); in aio_iiro_enable_irq()
154 outb(s->state & 0xff, dev->iobase + AIO_IIRO_16_RELAY_0_7); in aio_iiro_16_do_insn_bits()
156 dev->iobase + AIO_IIRO_16_RELAY_8_15); in aio_iiro_16_do_insn_bits()
211 s->state = inb(dev->iobase + AIO_IIRO_16_RELAY_0_7) | in aio_iiro_16_attach()
212 (inb(dev->iobase + AIO_IIRO_16_RELAY_8_15) << 8); in aio_iiro_16_attach()
Ddas16.c547 outb(first_chan | (last_chan << 4), dev->iobase + DAS16_MUX_REG); in das16_ai_set_mux_range()
559 dev->iobase + DAS16_GAIN_REG); in das16_ai_set_mux_range()
719 outb(DAS1600_CONV_DISABLE, dev->iobase + DAS1600_CONV_REG); in das16_cmd_exec()
732 dev->iobase + DAS1600_BURST_REG); in das16_cmd_exec()
736 outb(0, dev->iobase + DAS1600_BURST_REG); in das16_cmd_exec()
739 outb(byte, dev->iobase + DAS16_PACER_REG); in das16_cmd_exec()
758 outb(devpriv->ctrl_reg, dev->iobase + DAS16_CTRL_REG); in das16_cmd_exec()
761 outb(0, dev->iobase + DAS1600_CONV_REG); in das16_cmd_exec()
778 outb(devpriv->ctrl_reg, dev->iobase + DAS16_CTRL_REG); in das16_cancel()
789 outb(0, dev->iobase + DAS1600_BURST_REG); in das16_cancel()
[all …]
Dpcl711.c169 outb(mode, dev->iobase + PCL711_MODE_REG); in pcl711_ai_set_mode()
177 val = inb(dev->iobase + PCL711_AI_MSB_REG) << 8; in pcl711_ai_get_sample()
178 val |= inb(dev->iobase + PCL711_AI_LSB_REG); in pcl711_ai_get_sample()
186 outb(PCL711_INT_STAT_CLR, dev->iobase + PCL711_INT_STAT_REG); in pcl711_ai_cancel()
205 outb(PCL711_INT_STAT_CLR, dev->iobase + PCL711_INT_STAT_REG); in pcl711_interrupt()
227 outb(PCL711_AI_GAIN(range), dev->iobase + PCL711_AI_GAIN_REG); in pcl711_set_changain()
241 outb(mux | PCL711_MUX_CHAN(chan), dev->iobase + PCL711_MUX_REG); in pcl711_set_changain()
251 status = inb(dev->iobase + PCL711_AI_MSB_REG); in pcl711_ai_eoc()
270 outb(PCL711_SOFTTRIG, dev->iobase + PCL711_SOFTTRIG_REG); in pcl711_ai_insn_read()
357 outb(PCL711_INT_STAT_CLR, dev->iobase + PCL711_INT_STAT_REG); in pcl711_ai_cmd()
[all …]
Dadl_pci9118.c283 outl(0, dev->iobase + PCI9118_FIFO_RESET_REG); in pci9118_ai_reset_fifo()
349 outl(devpriv->ai_ctrl, dev->iobase + PCI9118_AI_CTRL_REG); in pci9118_set_chanlist()
352 outl(2, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); in pci9118_set_chanlist()
353 outl(0, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); in pci9118_set_chanlist()
354 outl(1, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); in pci9118_set_chanlist()
362 outl(val | ssh, dev->iobase + PCI9118_AI_CHANLIST_REG); in pci9118_set_chanlist()
374 outl(val | ssh, dev->iobase + PCI9118_AI_CHANLIST_REG); in pci9118_set_chanlist()
382 outl(val | ssh, dev->iobase + PCI9118_AI_CHANLIST_REG); in pci9118_set_chanlist()
385 outl(0, dev->iobase + PCI9118_AI_AUTOSCAN_MODE_REG); in pci9118_set_chanlist()
397 outl(devpriv->ai_cfg, dev->iobase + PCI9118_AI_CFG_REG); in pci9118_ai_mode4_switch()
[all …]
Dfl512.c68 outb(chan, dev->iobase + FL512_AI_MUX_REG); in fl512_ai_insn_read()
71 outb(0, dev->iobase + FL512_AI_START_CONV_REG); in fl512_ai_insn_read()
76 val = inb(dev->iobase + FL512_AI_LSB_REG); in fl512_ai_insn_read()
77 val |= (inb(dev->iobase + FL512_AI_MSB_REG) << 8); in fl512_ai_insn_read()
99 outb(val & 0x0ff, dev->iobase + FL512_AO_DATA_REG(chan)); in fl512_ao_insn_write()
100 outb((val >> 8) & 0xf, dev->iobase + FL512_AO_DATA_REG(chan)); in fl512_ao_insn_write()
101 inb(dev->iobase + FL512_AO_TRIG_REG(chan)); in fl512_ao_insn_write()
Dpcmuio.c141 return dev->iobase + (asic * PCMUIO_ASIC_IOSIZE); in pcmuio_asic_iobase()
167 unsigned long iobase = pcmuio_asic_iobase(dev, asic); in pcmuio_write() local
173 outb(val & 0xff, iobase + PCMUIO_PORT_REG(port + 0)); in pcmuio_write()
174 outb((val >> 8) & 0xff, iobase + PCMUIO_PORT_REG(port + 1)); in pcmuio_write()
175 outb((val >> 16) & 0xff, iobase + PCMUIO_PORT_REG(port + 2)); in pcmuio_write()
177 outb(PCMUIO_PAGE(page), iobase + PCMUIO_PAGE_LOCK_REG); in pcmuio_write()
178 outb(val & 0xff, iobase + PCMUIO_PAGE_REG(0)); in pcmuio_write()
179 outb((val >> 8) & 0xff, iobase + PCMUIO_PAGE_REG(1)); in pcmuio_write()
180 outb((val >> 16) & 0xff, iobase + PCMUIO_PAGE_REG(2)); in pcmuio_write()
190 unsigned long iobase = pcmuio_asic_iobase(dev, asic); in pcmuio_read() local
[all …]
Ddt2801.c227 stat = inb_p(dev->iobase + DT2801_STATUS); in dt2801_readdata()
231 *data = inb_p(dev->iobase + DT2801_DATA); in dt2801_readdata()
262 stat = inb_p(dev->iobase + DT2801_STATUS); in dt2801_writedata()
267 outb_p(data & 0xff, dev->iobase + DT2801_DATA); in dt2801_writedata()
294 stat = inb_p(dev->iobase + DT2801_STATUS); in dt2801_wait_for_ready()
298 stat = inb_p(dev->iobase + DT2801_STATUS); in dt2801_wait_for_ready()
315 stat = inb_p(dev->iobase + DT2801_STATUS); in dt2801_writecmd()
322 outb_p(command, dev->iobase + DT2801_CMD); in dt2801_writecmd()
332 inb_p(dev->iobase + DT2801_DATA); in dt2801_reset()
333 inb_p(dev->iobase + DT2801_DATA); in dt2801_reset()
[all …]
Ddt2811.c230 status = inb(dev->iobase + DT2811_ADCSR); in dt2811_ai_eoc()
244 outb(chan, dev->iobase + DT2811_ADGCR); in dt2811_ai_insn()
250 data[i] = inb(dev->iobase + DT2811_ADDATLO); in dt2811_ai_insn()
251 data[i] |= inb(dev->iobase + DT2811_ADDATHI) << 8; in dt2811_ai_insn()
269 outb(val & 0xff, dev->iobase + DT2811_DADAT0LO + 2 * chan); in dt2811_ao_insn_write()
271 dev->iobase + DT2811_DADAT0HI + 2 * chan); in dt2811_ao_insn_write()
282 data[1] = inb(dev->iobase + DT2811_DIO); in dt2811_di_insn_bits()
293 outb(s->state, dev->iobase + DT2811_DIO); in dt2811_do_insn_bits()
333 outb(0, dev->iobase + DT2811_ADCSR); in dt2811_attach()
335 i = inb(dev->iobase + DT2811_ADDATLO); in dt2811_attach()
[all …]
Dpcl816.c139 outb(chan, dev->iobase + PCL816_MUX_REG); in pcl816_ai_set_chan_range()
140 outb(range, dev->iobase + PCL816_RANGE_REG); in pcl816_ai_set_chan_range()
148 dev->iobase + PCL816_MUX_REG); in pcl816_ai_set_chan_scan()
176 outb(0, dev->iobase + PCL816_CLRINT_REG); in pcl816_ai_clear_eoc()
182 outb(0, dev->iobase + PCL816_AI_LSB_REG); in pcl816_ai_soft_trig()
190 val = inb(dev->iobase + PCL816_AI_MSB_REG) << 8; in pcl816_ai_get_sample()
191 val |= inb(dev->iobase + PCL816_AI_LSB_REG); in pcl816_ai_get_sample()
203 status = inb(dev->iobase + PCL816_STATUS_REG); in pcl816_ai_eoc()
442 outb(ctrl, dev->iobase + PCL816_CTRL_REG); in pcl816_ai_cmd()
444 dev->iobase + PCL816_STATUS_REG); in pcl816_ai_cmd()
[all …]
Damplc_pci263.c45 outb(s->state & 0xff, dev->iobase); in pci263_do_insn_bits()
46 outb((s->state >> 8) & 0xff, dev->iobase + 1); in pci263_do_insn_bits()
65 dev->iobase = pci_resource_start(pci_dev, 2); in pci263_auto_attach()
79 s->state = inb(dev->iobase) | (inb(dev->iobase + 1) << 8); in pci263_auto_attach()
Dpcl730.c222 outb(s->state & 0xff, dev->iobase + reg); in pcl730_do_insn_bits()
224 outb((s->state >> 8) & 0xff, dev->iobase + reg + 1); in pcl730_do_insn_bits()
226 outb((s->state >> 16) & 0xff, dev->iobase + reg + 2); in pcl730_do_insn_bits()
228 outb((s->state >> 24) & 0xff, dev->iobase + reg + 3); in pcl730_do_insn_bits()
242 val = inb(dev->iobase + reg); in pcl730_get_bits()
244 val |= (inb(dev->iobase + reg + 1) << 8); in pcl730_get_bits()
246 val |= (inb(dev->iobase + reg + 2) << 16); in pcl730_get_bits()
248 val |= (inb(dev->iobase + reg + 3) << 24); in pcl730_get_bits()
Dadq12b.c109 status = inb(dev->iobase + ADQ12B_STINR); in adq12b_ai_eoc()
130 outb(val, dev->iobase + ADQ12B_CTREG); in adq12b_ai_insn_read()
135 val = inb(dev->iobase + ADQ12B_ADLOW); /* trigger A/D */ in adq12b_ai_insn_read()
142 val = inb(dev->iobase + ADQ12B_ADHIG) << 8; in adq12b_ai_insn_read()
143 val |= inb(dev->iobase + ADQ12B_ADLOW); /* retriggers A/D */ in adq12b_ai_insn_read()
156 data[1] = (inb(dev->iobase + ADQ12B_STINR) & ADQ12B_STINR_IN_MASK); in adq12b_di_insn_bits()
176 dev->iobase + ADQ12B_OUTBR); in adq12b_do_insn_bits()
Ddt2815.c74 status = inb(dev->iobase + DT2815_STATUS); in dt2815_ao_status()
111 outb(lo, dev->iobase + DT2815_DATA); in dt2815_ao_insn()
186 outb(0x00, dev->iobase + DT2815_STATUS); in dt2815_attach()
192 status = inb(dev->iobase + DT2815_STATUS); in dt2815_attach()
197 outb(program, dev->iobase + DT2815_DATA); in dt2815_attach()
206 outb(0x00, dev->iobase + DT2815_STATUS); in dt2815_attach()
Dpcl812.c577 outb(mux | PCL812_MUX_CHAN(chan), dev->iobase + PCL812_MUX_REG); in pcl812_ai_set_chan_range()
578 outb(range + devpriv->range_correction, dev->iobase + PCL812_RANGE_REG); in pcl812_ai_set_chan_range()
591 outb(0, dev->iobase + PCL812_STATUS_REG); in pcl812_ai_clear_eoc()
597 outb(255, dev->iobase + PCL812_SOFTTRIG_REG); in pcl812_ai_soft_trig()
605 val = inb(dev->iobase + PCL812_AI_MSB_REG) << 8; in pcl812_ai_get_sample()
606 val |= inb(dev->iobase + PCL812_AI_LSB_REG); in pcl812_ai_get_sample()
619 status = inb(dev->iobase + PCL812_STATUS_REG); in pcl812_ai_eoc()
623 status = inb(dev->iobase + PCL812_AI_MSB_REG); in pcl812_ai_eoc()
753 outb(devpriv->mode_reg_int | ctrl, dev->iobase + PCL812_CTRL_REG); in pcl812_ai_cmd()
902 dev->iobase + PCL812_CTRL_REG); in pcl812_ai_cancel()
[all …]
Dpcmda12.c75 unsigned long ioreg = dev->iobase + (chan * 2); in pcmda12_ao_insn_write()
107 inb(dev->iobase); in pcmda12_ao_insn_read()
118 outb(0, dev->iobase + (i * 2)); in pcmda12_ao_reset()
119 outb(0, dev->iobase + (i * 2) + 1); in pcmda12_ao_reset()
122 inb(dev->iobase); in pcmda12_ao_reset()
Damplc_pc263.c61 outb(s->state & 0xff, dev->iobase); in pc263_do_insn_bits()
62 outb((s->state >> 8) & 0xff, dev->iobase + 1); in pc263_do_insn_bits()
92 s->state = inb(dev->iobase) | (inb(dev->iobase + 1) << 8); in pc263_attach()
Dadl_pci6208.c58 status = inw(dev->iobase + PCI6208_AO_STATUS); in pci6208_ao_eoc()
84 dev->iobase + PCI6208_AO_CONTROL(chan)); in pci6208_ao_insn_write()
99 val = inw(dev->iobase + PCI6208_DIO); in pci6208_di_insn_bits()
113 outw(s->state, dev->iobase + PCI6208_DIO); in pci6208_do_insn_bits()
131 dev->iobase = pci_resource_start(pcidev, 2); in pci6208_auto_attach()
172 val = inw(dev->iobase + PCI6208_DIO); in pci6208_auto_attach()
Daddi_apci_1516.c81 data[1] = inw(dev->iobase + APCI1516_DI_REG); in apci1516_di_insn_bits()
91 s->state = inw(dev->iobase + APCI1516_DO_REG); in apci1516_do_insn_bits()
94 outw(s->state, dev->iobase + APCI1516_DO_REG); in apci1516_do_insn_bits()
109 outw(0x0, dev->iobase + APCI1516_DO_REG); in apci1516_reset()
140 dev->iobase = pci_resource_start(pcidev, 1); in apci1516_auto_attach()
189 if (dev->iobase) in apci1516_detach()
Daio_aio12_8.c115 status = inb(dev->iobase + AIO12_8_STATUS_REG); in aio_aio12_8_ai_eoc()
141 inb(dev->iobase + AIO12_8_STATUS_REG); in aio_aio12_8_ai_read()
145 outb(control, dev->iobase + AIO12_8_ADC_REG); in aio_aio12_8_ai_read()
152 val = inw(dev->iobase + AIO12_8_ADC_REG) & s->maxdata; in aio_aio12_8_ai_read()
174 outb(AIO12_8_DAC_ENABLE_REF_ENA, dev->iobase + AIO12_8_DAC_ENABLE_REG); in aio_aio12_8_ao_insn_write()
178 outw(val, dev->iobase + AIO12_8_DAC_REG(chan)); in aio_aio12_8_ao_insn_write()
219 dev->pacer = comedi_8254_init(dev->iobase + AIO12_8_8254_BASE_REG, in aio_aio12_8_attach()
Dcomedi_8254.c144 val = inb(i8254->iobase + reg_offset); in __i8254_read()
150 val = inw(i8254->iobase + reg_offset); in __i8254_read()
156 val = inl(i8254->iobase + reg_offset); in __i8254_read()
173 outb(val, i8254->iobase + reg_offset); in __i8254_write()
179 outw(val, i8254->iobase + reg_offset); in __i8254_write()
185 outl(val, i8254->iobase + reg_offset); in __i8254_write()
584 static struct comedi_8254 *__i8254_init(unsigned long iobase, in __i8254_init() argument
602 i8254->iobase = iobase; in __i8254_init()
625 struct comedi_8254 *comedi_8254_init(unsigned long iobase, in comedi_8254_init() argument
630 return __i8254_init(iobase, NULL, osc_base, iosize, regshift); in comedi_8254_init()
Ddas800.c227 outb(reg, dev->iobase + DAS800_GAIN); in das800_ind_write()
228 outb(val, dev->iobase + 2); in das800_ind_write()
237 outb(reg, dev->iobase + DAS800_GAIN); in das800_ind_read()
238 return inb(dev->iobase + 7); in das800_ind_read()
250 outb(CIO_ENHF, dev->iobase + DAS800_GAIN); in das800_enable()
399 outb(gain, dev->iobase + DAS800_GAIN); in das800_ai_do_cmd()
424 unsigned int lsb = inb(dev->iobase + DAS800_LSB); in das800_ai_get_sample()
425 unsigned int msb = inb(dev->iobase + DAS800_MSB); in das800_ai_get_sample()
444 status = inb(dev->iobase + DAS800_STATUS); in das800_interrupt()
474 fifo_overflow = !!(inb(dev->iobase + DAS800_GAIN) & in das800_interrupt()
[all …]
Daddi_apci_16xx.c79 outl(s->io_bits, dev->iobase + APCI16XX_DIR_REG(s->index)); in apci16xx_insn_config()
90 outl(s->state, dev->iobase + APCI16XX_OUT_REG(s->index)); in apci16xx_dio_insn_bits()
92 data[1] = inl(dev->iobase + APCI16XX_IN_REG(s->index)); in apci16xx_dio_insn_bits()
119 dev->iobase = pci_resource_start(pcidev, 0); in apci16xx_auto_attach()
151 outl(s->io_bits, dev->iobase + APCI16XX_DIR_REG(i)); in apci16xx_auto_attach()
Damplc_pci224.c393 outw(1 << chan, dev->iobase + PCI224_DACCEN); in pci224_ao_set_data()
399 dev->iobase + PCI224_DACCON); in pci224_ao_set_data()
411 outw(mangled, dev->iobase + PCI224_DACDATA); in pci224_ao_set_data()
413 inw(dev->iobase + PCI224_SOFTTRIG); in pci224_ao_set_data()
468 outw(0, dev->iobase + PCI224_DACCEN); /* Disable channels. */ in pci224_ao_stop()
474 dev->iobase + PCI224_DACCON); in pci224_ao_stop()
514 dacstat = inw(dev->iobase + PCI224_DACCON); in pci224_ao_handle_fifo()
557 dev->iobase + PCI224_DACDATA); in pci224_ao_handle_fifo()
569 outw(devpriv->daccon, dev->iobase + PCI224_DACCON); in pci224_ao_handle_fifo()
598 outw(devpriv->daccon, dev->iobase + PCI224_DACCON); in pci224_ao_handle_fifo()
[all …]
Dpcmad.c70 status = inb(dev->iobase + PCMAD_STATUS); in pcmad_ai_eoc()
88 outb(chan, dev->iobase + PCMAD_CONVERT); in pcmad_ai_insn_read()
94 val = inb(dev->iobase + PCMAD_LSB) | in pcmad_ai_insn_read()
95 (inb(dev->iobase + PCMAD_MSB) << 8); in pcmad_ai_insn_read()
Dadv_pci1724.c89 status = inl(dev->iobase + PCI1724_SYNC_CTRL_REG); in adv_pci1724_dac_idle()
109 outl(0, dev->iobase + PCI1724_SYNC_CTRL_REG); in adv_pci1724_insn_write()
119 dev->iobase + PCI1724_DAC_CTRL_REG); in adv_pci1724_insn_write()
139 dev->iobase = pci_resource_start(pcidev, 2); in adv_pci1724_auto_attach()
140 board_id = inl(dev->iobase + PCI1724_BOARD_ID_REG); in adv_pci1724_auto_attach()
Ddas08_cs.c65 unsigned long iobase; in das08_cs_auto_attach() local
75 iobase = link->resource[0]->start; in das08_cs_auto_attach()
81 return das08_common_attach(dev, iobase); in das08_cs_auto_attach()
Daddi_watchdog.h6 void addi_watchdog_reset(unsigned long iobase);
7 int addi_watchdog_init(struct comedi_subdevice *, unsigned long iobase);
Daddi_apci_1500.c70 outb(reg, dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_read()
71 val = inb(dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_read()
83 outb(reg, dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_write()
84 outb(val, dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_write()
97 inb(dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_reset()
98 outb(0, dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_reset()
99 inb(dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_reset()
100 outb(0, dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_reset()
101 outb(1, dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_reset()
102 outb(0, dev->iobase + APCI1500_Z8536_CTRL_REG); in z8536_reset()
[all …]
Dpcl726.c260 outb((val >> 8) & 0xff, dev->iobase + PCL726_AO_MSB_REG(chan)); in pcl726_ao_insn_write()
261 outb(val & 0xff, dev->iobase + PCL726_AO_LSB_REG(chan)); in pcl726_ao_insn_write()
276 val = inb(dev->iobase + PCL727_DI_LSB_REG); in pcl726_di_insn_bits()
277 val |= (inb(dev->iobase + PCL727_DI_MSB_REG) << 8); in pcl726_di_insn_bits()
279 val = inb(dev->iobase + PCL726_DI_LSB_REG); in pcl726_di_insn_bits()
280 val |= (inb(dev->iobase + PCL726_DI_MSB_REG) << 8); in pcl726_di_insn_bits()
294 unsigned long io = dev->iobase; in pcl726_do_insn_bits()
Djr3_pci.c98 struct jr3_t __iomem *iobase; member
379 struct jr3_t __iomem *iobase = devpriv->iobase; in jr3_write_firmware() local
412 lo = &iobase->channel[subdev].program_lo[addr]; in jr3_write_firmware()
413 hi = &iobase->channel[subdev].program_hi[addr]; in jr3_write_firmware()
649 spriv->channel = &devpriv->iobase->channel[s->index].data; in jr3_pci_alloc_spriv()
672 spriv->channel, devpriv->iobase, in jr3_pci_alloc_spriv()
674 (char __iomem *)devpriv->iobase)); in jr3_pci_alloc_spriv()
712 devpriv->iobase = pci_ioremap_bar(pcidev, 0); in jr3_pci_auto_attach()
713 if (!devpriv->iobase) in jr3_pci_auto_attach()
737 writel(0, &devpriv->iobase->channel[0].reset); in jr3_pci_auto_attach()
[all …]
Dni_atmio.c306 unsigned long iobase; in ni_atmio_attach() local
313 iobase = it->options[0]; in ni_atmio_attach()
316 if (iobase == 0) { in ni_atmio_attach()
321 iobase = pnp_port_start(isapnp_dev, 0); in ni_atmio_attach()
326 ret = comedi_request_region(dev, iobase, 0x20); in ni_atmio_attach()
Dcontec_pci_dio.c44 outw(s->state, dev->iobase + PIO1616L_DO_REG); in contec_do_insn_bits()
55 data[1] = inw(dev->iobase + PIO1616L_DI_REG); in contec_di_insn_bits()
70 dev->iobase = pci_resource_start(pcidev, 0); in contec_auto_attach()
Damplc_pci236.c99 unsigned long iobase; in pci236_auto_attach() local
116 iobase = pci_resource_start(pci_dev, 2); in pci236_auto_attach()
117 return amplc_pc236_common_attach(dev, iobase, pci_dev->irq, in pci236_auto_attach()
Drti802.c59 outb(chan, dev->iobase + RTI802_SELECT); in rti802_ao_insn_write()
70 outb(val & 0xff, dev->iobase + RTI802_DATALOW); in rti802_ao_insn_write()
71 outb((val >> 8) & 0xff, dev->iobase + RTI802_DATAHIGH); in rti802_ao_insn_write()
Ddyna_pci10xx.c65 status = inw_p(dev->iobase); in dyna_pci10xx_ai_eoc()
91 outw_p(0x0000 + range + chan, dev->iobase + 2); in dyna_pci10xx_insn_read_ai()
99 d = inw_p(dev->iobase); in dyna_pci10xx_insn_read_ai()
127 outw_p(data[n], dev->iobase); in dyna_pci10xx_insn_write_ao()
190 dev->iobase = pci_resource_start(pcidev, 2); in dyna_pci10xx_auto_attach()
Dpcm3724.c112 port_8255_cfg = dev->iobase + I8255_CTRL_REG; in do_3724_config()
114 port_8255_cfg = dev->iobase + I8255_SIZE + I8255_CTRL_REG; in do_3724_config()
116 outb(buffer_config, dev->iobase + PCM3724_DIO_DIR_REG); in do_3724_config()
155 outb(gatecfg, dev->iobase + PCM3724_GATE_CTRL_REG); in enable_chan()
Dcb_pcimdda.c98 unsigned long offset = dev->iobase + PCIMDDA_DA_CHAN(chan); in cb_pcimdda_ao_insn_write()
130 inw(dev->iobase + PCIMDDA_DA_CHAN(chan)); in cb_pcimdda_ao_insn_read()
145 dev->iobase = pci_resource_start(pcidev, 3); in cb_pcimdda_auto_attach()
Daddi_apci_3xxx.c653 data[1] = inl(dev->iobase + 32) & 0xf; in apci3xxx_di_insn_bits()
663 s->state = inl(dev->iobase + 48) & 0xf; in apci3xxx_do_insn_bits()
666 outl(s->state, dev->iobase + 48); in apci3xxx_do_insn_bits()
701 outl((s->io_bits >> 24) & 0xff, dev->iobase + 224); in apci3xxx_dio_insn_config()
717 outl(s->state & 0xff, dev->iobase + 80); in apci3xxx_dio_insn_bits()
719 outl((s->state >> 16) & 0xff, dev->iobase + 112); in apci3xxx_dio_insn_bits()
722 val = inl(dev->iobase + 80); in apci3xxx_dio_insn_bits()
723 val |= (inl(dev->iobase + 64) << 8); in apci3xxx_dio_insn_bits()
725 val |= (inl(dev->iobase + 112) << 16); in apci3xxx_dio_insn_bits()
727 val |= (inl(dev->iobase + 96) << 16); in apci3xxx_dio_insn_bits()
[all …]
Damplc_pci230.c690 outb(CLK_CONFIG(ct, clk_src), dev->iobase + PCI230_ZCLK_SCE); in pci230_ct_setup_ns_mode()
1042 outb(devpriv->ier, dev->iobase + PCI230_INT_SCE); in pci230_ao_stop()
1261 outb(devpriv->ier, dev->iobase + PCI230_INT_SCE); in pci230_ao_start()
1266 outb(GAT_CONFIG(1, GAT_VCC), dev->iobase + PCI230_ZGAT_SCE); in pci230_ao_start()
1276 outb(devpriv->ier, dev->iobase + PCI230_INT_SCE); in pci230_ao_start()
1354 outb(GAT_CONFIG(1, GAT_GND), dev->iobase + PCI230_ZGAT_SCE); in pci230_ao_cmd()
1796 outb(zgat, dev->iobase + PCI230_ZGAT_SCE); in pci230_ai_inttrig_scan_begin()
1798 outb(zgat, dev->iobase + PCI230_ZGAT_SCE); in pci230_ai_inttrig_scan_begin()
1838 outb(devpriv->ier, dev->iobase + PCI230_INT_SCE); in pci230_ai_stop()
1867 outb(devpriv->ier, dev->iobase + PCI230_INT_SCE); in pci230_ai_start()
[all …]
Ddas08_pci.c70 dev->iobase = pci_resource_start(pdev, 2); in das08_pci_auto_attach()
72 return das08_common_attach(dev, dev->iobase); in das08_pci_auto_attach()
Dadl_pci8164.c50 data[i] = inw(dev->iobase + PCI8164_AXIS(chan) + offset); in adl_pci8164_insn_read()
65 outw(data[i], dev->iobase + PCI8164_AXIS(chan) + offset); in adl_pci8164_insn_write()
80 dev->iobase = pci_resource_start(pcidev, 2); in adl_pci8164_auto_attach()
Damplc_pc236_common.c144 int amplc_pc236_common_attach(struct comedi_device *dev, unsigned long iobase, in amplc_pc236_common_attach() argument
150 dev->iobase = iobase; in amplc_pc236_common_attach()
Dcomedi_8254.h86 unsigned long iobase; member
130 struct comedi_8254 *comedi_8254_init(unsigned long iobase,
Ddac02.c104 outb((val << 4) & 0xf0, dev->iobase + DAC02_AO_LSB(chan)); in dac02_ao_insn_write()
105 outb((val >> 4) & 0xff, dev->iobase + DAC02_AO_MSB(chan)); in dac02_ao_insn_write()
Dplx9080.h383 static inline int plx9080_abort_dma(void __iomem *iobase, unsigned int channel) in plx9080_abort_dma() argument
391 dma_cs_addr = iobase + PLX_DMA1_CS_REG; in plx9080_abort_dma()
393 dma_cs_addr = iobase + PLX_DMA0_CS_REG; in plx9080_abort_dma()
Dadl_pci7x3x.c135 outl(val, dev->iobase + reg); in adl_pci7x3x_do_insn_bits()
150 data[1] = inl(dev->iobase + reg); in adl_pci7x3x_di_insn_bits()
175 dev->iobase = pci_resource_start(pcidev, 2); in adl_pci7x3x_auto_attach()
Dc6xdigio.c63 status = inb(dev->iobase + C6XDIGIO_STATUS_REG); in c6xdigio_chk_status()
75 outb_p(val, dev->iobase + C6XDIGIO_DATA_REG); in c6xdigio_write_data()
86 val = inb(dev->iobase + C6XDIGIO_STATUS_REG); in c6xdigio_get_encoder_bits()
Damplc_dio200_common.c121 return inb(dev->iobase + offset); in dio200_read8()
135 outb(val, dev->iobase + offset); in dio200_write8()
148 return inl(dev->iobase + offset); in dio200_read32()
162 outl(val, dev->iobase + offset); in dio200_write32()
176 offset = i8254->iobase - dev->iobase; in dio200_subdev_8254_offset()
584 i8254 = comedi_8254_init(dev->iobase + offset, in dio200_subdev_8254_init()
/linux-4.4.14/drivers/irqchip/
Dirq-sa11x0.c31 static void __iomem *iobase; variable
41 reg = readl_relaxed(iobase + ICMR); in sa1100_mask_irq()
43 writel_relaxed(reg, iobase + ICMR); in sa1100_mask_irq()
50 reg = readl_relaxed(iobase + ICMR); in sa1100_unmask_irq()
52 writel_relaxed(reg, iobase + ICMR); in sa1100_unmask_irq()
96 st->icmr = readl_relaxed(iobase + ICMR); in sa1100irq_suspend()
97 st->iclr = readl_relaxed(iobase + ICLR); in sa1100irq_suspend()
98 st->iccr = readl_relaxed(iobase + ICCR); in sa1100irq_suspend()
103 writel_relaxed(st->icmr & 0xfffff000, iobase + ICMR); in sa1100irq_suspend()
113 writel_relaxed(st->iccr, iobase + ICCR); in sa1100irq_resume()
[all …]
Dirq-dw-apb-ictl.c75 void __iomem *iobase; in dw_apb_ictl_init() local
97 iobase = ioremap(r.start, resource_size(&r)); in dw_apb_ictl_init()
98 if (!iobase) { in dw_apb_ictl_init()
112 writel_relaxed(~0, iobase + APB_INT_MASK_L); in dw_apb_ictl_init()
113 writel_relaxed(~0, iobase + APB_INT_MASK_H); in dw_apb_ictl_init()
114 writel_relaxed(~0, iobase + APB_INT_ENABLE_L); in dw_apb_ictl_init()
115 writel_relaxed(~0, iobase + APB_INT_ENABLE_H); in dw_apb_ictl_init()
117 reg = readl_relaxed(iobase + APB_INT_ENABLE_H); in dw_apb_ictl_init()
121 nrirqs = fls(readl_relaxed(iobase + APB_INT_ENABLE_L)); in dw_apb_ictl_init()
141 gc->reg_base = iobase + i * APB_INT_BASE_OFFSET; in dw_apb_ictl_init()
[all …]
/linux-4.4.14/drivers/bluetooth/
Dbt3c_cs.c116 static inline void bt3c_address(unsigned int iobase, unsigned short addr) in bt3c_address() argument
118 outb(addr & 0xff, iobase + ADDR_L); in bt3c_address()
119 outb((addr >> 8) & 0xff, iobase + ADDR_H); in bt3c_address()
123 static inline void bt3c_put(unsigned int iobase, unsigned short value) in bt3c_put() argument
125 outb(value & 0xff, iobase + DATA_L); in bt3c_put()
126 outb((value >> 8) & 0xff, iobase + DATA_H); in bt3c_put()
130 static inline void bt3c_io_write(unsigned int iobase, unsigned short addr, unsigned short value) in bt3c_io_write() argument
132 bt3c_address(iobase, addr); in bt3c_io_write()
133 bt3c_put(iobase, value); in bt3c_io_write()
137 static inline unsigned short bt3c_get(unsigned int iobase) in bt3c_get() argument
[all …]
Dbluecard_cs.c161 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_activity_led_timeout() local
168 outb(0x08 | 0x20, iobase + 0x30); in bluecard_activity_led_timeout()
171 outb(0x00, iobase + 0x30); in bluecard_activity_led_timeout()
178 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_enable_activity_led() local
185 outb(0x10 | 0x40, iobase + 0x30); in bluecard_enable_activity_led()
191 outb(0x08 | 0x20, iobase + 0x30); in bluecard_enable_activity_led()
203 static int bluecard_write(unsigned int iobase, unsigned int offset, __u8 *buf, int len) in bluecard_write() argument
209 outb_p(actual, iobase + offset); in bluecard_write()
212 outb_p(buf[i], iobase + offset + i + 1); in bluecard_write()
234 unsigned int iobase = info->p_dev->resource[0]->start; in bluecard_write_wakeup() local
[all …]
Dbtuart_cs.c111 static int btuart_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) in btuart_write() argument
116 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) in btuart_write()
122 outb(buf[actual], iobase + UART_TX); in btuart_write()
143 unsigned int iobase = info->p_dev->resource[0]->start; in btuart_write_wakeup() local
157 len = btuart_write(iobase, 16, skb->data, skb->len); in btuart_write_wakeup()
177 unsigned int iobase; in btuart_receive() local
185 iobase = info->p_dev->resource[0]->start; in btuart_receive()
203 bt_cb(info->rx_skb)->pkt_type = inb(iobase + UART_RX); in btuart_receive()
235 *skb_put(info->rx_skb, 1) = inb(iobase + UART_RX); in btuart_receive()
282 } while (inb(iobase + UART_LSR) & UART_LSR_DR); in btuart_receive()
[all …]
Ddtl1_cs.c110 static int dtl1_write(unsigned int iobase, int fifo_size, __u8 *buf, int len) in dtl1_write() argument
115 if (!(inb(iobase + UART_LSR) & UART_LSR_THRE)) in dtl1_write()
121 outb(buf[actual], iobase + UART_TX); in dtl1_write()
147 unsigned int iobase = info->p_dev->resource[0]->start; in dtl1_write_wakeup() local
161 len = dtl1_write(iobase, 32, skb->data, skb->len); in dtl1_write_wakeup()
204 unsigned int iobase; in dtl1_receive() local
213 iobase = info->p_dev->resource[0]->start; in dtl1_receive()
229 *skb_put(info->rx_skb, 1) = inb(iobase + UART_RX); in dtl1_receive()
284 } while (inb(iobase + UART_LSR) & UART_LSR_DR); in dtl1_receive()
291 unsigned int iobase; in dtl1_interrupt() local
[all …]
/linux-4.4.14/arch/arm/mach-imx/devices/
Ddevices-common.h46 resource_size_t iobase; member
55 resource_size_t iobase; member
65 resource_size_t iobase; member
78 resource_size_t iobase; member
86 resource_size_t iobase; member
95 resource_size_t iobase; member
102 resource_size_t iobase; member
111 resource_size_t iobase; member
123 resource_size_t iobase; member
133 resource_size_t iobase; member
[all …]
Dplatform-ipu-core.c16 .iobase = soc ## _IPU_CTRL_BASE_ADDR, \
39 .start = data->iobase, in imx_add_ipu_core()
40 .end = data->iobase + 0x5f, in imx_add_ipu_core()
43 .start = data->iobase + 0x88, in imx_add_ipu_core()
44 .end = data->iobase + 0xb3, in imx_add_ipu_core()
67 .start = data->iobase + 0x60, in imx_alloc_mx3_camera()
68 .end = data->iobase + 0x87, in imx_alloc_mx3_camera()
116 .start = data->iobase + 0xb4, in imx_add_mx3_sdc_fb()
117 .end = data->iobase + 0x1bf, in imx_add_mx3_sdc_fb()
Dplatform-imx-dma.c12 resource_size_t iobase, int irq, int irq_err) in imx_add_imx_dma() argument
16 .start = iobase, in imx_add_imx_dma()
17 .end = iobase + SZ_4K - 1, in imx_add_imx_dma()
35 resource_size_t iobase, int irq, struct sdma_platform_data *pdata) in imx_add_imx_sdma() argument
39 .start = iobase, in imx_add_imx_sdma()
40 .end = iobase + SZ_16K - 1, in imx_add_imx_sdma()
Dplatform-mxc_rnga.c13 resource_size_t iobase; member
18 .iobase = soc ## _RNGA_BASE_ADDR, \
31 .start = data->iobase, in imx_add_mxc_rnga()
32 .end = data->iobase + SZ_16K - 1, in imx_add_mxc_rnga()
Dplatform-imx-uart.c15 .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
25 .iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
91 .start = data->iobase, in imx_add_imx_uart_3irq()
92 .end = data->iobase + data->iosize - 1, in imx_add_imx_uart_3irq()
119 .start = data->iobase, in imx_add_imx_uart_1irq()
120 .end = data->iobase + data->iosize - 1, in imx_add_imx_uart_1irq()
Dplatform-mxc_nand.c17 .iobase = soc ## _NFC_BASE_ADDR, \
26 .iobase = soc ## _NFC_BASE_ADDR, \
59 .start = data->iobase, in imx_add_mxc_nand()
60 .end = data->iobase + data->iosize - 1, in imx_add_mxc_nand()
Dplatform-imx27-coda.c15 .iobase = MX27_VPU_BASE_ADDR,
26 .start = data->iobase, in imx_add_imx27_coda()
27 .end = data->iobase + data->iosize - 1, in imx_add_imx27_coda()
Dplatform-gpio-mxc.c12 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high) in mxc_register_gpio() argument
16 .start = iobase, in mxc_register_gpio()
17 .end = iobase + iosize - 1, in mxc_register_gpio()
Dplatform-mx2-emma.c14 .iobase = soc ## _EMMAPRP_BASE_ADDR, \
29 .start = data->iobase, in imx_add_mx2_emmaprp()
30 .end = data->iobase + data->iosize - 1, in imx_add_mx2_emmaprp()
Dplatform-imx21-hcd.c14 .iobase = soc ## _USBOTG_BASE_ADDR, \
29 .start = data->iobase, in imx_add_imx21_hcd()
30 .end = data->iobase + SZ_8K - 1, in imx_add_imx21_hcd()
Dplatform-mxc_w1.c14 .iobase = soc ## _OWIRE_BASE_ADDR, \
42 .start = data->iobase, in imx_add_mxc_w1()
43 .end = data->iobase + SZ_4K - 1, in imx_add_mxc_w1()
Dplatform-mxc_rtc.c15 .iobase = soc ## _RTC_BASE_ADDR, \
34 .start = data->iobase, in imx_add_mxc_rtc()
35 .end = data->iobase + SZ_16K - 1, in imx_add_mxc_rtc()
Dplatform-fec.c18 .iobase = soc ## _FEC_BASE_ADDR, \
39 .start = data->iobase, in imx_add_fec()
40 .end = data->iobase + SZ_4K - 1, in imx_add_fec()
Dplatform-pata_imx.c11 .iobase = soc ## _ATA_BASE_ADDR, \
36 .start = data->iobase, in imx_add_pata_imx()
37 .end = data->iobase + data->iosize - 1, in imx_add_pata_imx()
Dplatform-fsl-usb2-udc.c17 .iobase = soc ## _USB_OTG_BASE_ADDR, \
42 .start = data->iobase, in imx_add_fsl_usb2_udc()
43 .end = data->iobase + SZ_512 - 1, in imx_add_fsl_usb2_udc()
Dplatform-imx-fb.c17 .iobase = soc ## _LCDC_BASE_ADDR, \
43 .start = data->iobase, in imx_add_imx_fb()
44 .end = data->iobase + data->iosize - 1, in imx_add_imx_fb()
Dplatform-imx-keypad.c14 .iobase = soc ## _KPP_BASE_ADDR, \
45 .start = data->iobase, in imx_add_imx_keypad()
46 .end = data->iobase + data->iosize - 1, in imx_add_imx_keypad()
Dplatform-imx2-wdt.c17 .iobase = soc ## _WDOG ## _hwid ## _BASE_ADDR, \
48 .start = data->iobase, in imx_add_imx2_wdt()
49 .end = data->iobase + data->iosize - 1, in imx_add_imx2_wdt()
Dplatform-flexcan.c14 .iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \
45 .start = data->iobase, in imx_add_flexcan()
46 .end = data->iobase + data->iosize - 1, in imx_add_flexcan()
Dplatform-mxc-ehci.c17 .iobase = soc ## _USB_ ## hs ## _BASE_ADDR, \
52 .start = data->iobase, in imx_add_mxc_ehci()
53 .end = data->iobase + SZ_512 - 1, in imx_add_mxc_ehci()
Dplatform-sdhci-esdhc-imx.c18 .iobase = soc ## _ESDHC ## hwid ## _BASE_ADDR, \
57 .start = data->iobase, in imx_add_sdhci_esdhc_imx()
58 .end = data->iobase + SZ_16K - 1, in imx_add_sdhci_esdhc_imx()
Dplatform-mxc-mmc.c18 .iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \
59 .start = data->iobase, in imx_add_mxc_mmc()
60 .end = data->iobase + data->iosize - 1, in imx_add_mxc_mmc()
Dplatform-imx-i2c.c16 .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \
69 .start = data->iobase, in imx_add_imx_i2c()
70 .end = data->iobase + data->iosize - 1, in imx_add_imx_i2c()
Dplatform-spi_imx.c16 .iobase = soc ## _ ## type ## hwid ## _BASE_ADDR, \
77 .start = data->iobase, in imx_add_spi_imx()
78 .end = data->iobase + data->iosize - 1, in imx_add_spi_imx()
Dplatform-imx-ssi.c15 .iobase = soc ## _SSI ## _hwid ## _BASE_ADDR, \
66 .start = data->iobase, in imx_add_imx_ssi()
67 .end = data->iobase + data->iosize - 1, in imx_add_imx_ssi()
/linux-4.4.14/drivers/staging/comedi/drivers/addi-data/
Dhwdrv_apci1564.c21 outl(0x0, dev->iobase + APCI1564_DI_IRQ_REG); in apci1564_timer_insn_config()
22 outl(0x0, dev->iobase + APCI1564_DO_IRQ_REG); in apci1564_timer_insn_config()
23 outl(0x0, dev->iobase + APCI1564_WDOG_IRQ_REG); in apci1564_timer_insn_config()
25 unsigned long iobase; in apci1564_timer_insn_config() local
27 iobase = devpriv->counters + ADDI_TCW_IRQ_REG; in apci1564_timer_insn_config()
28 outl(0x0, iobase + APCI1564_COUNTER(0)); in apci1564_timer_insn_config()
29 outl(0x0, iobase + APCI1564_COUNTER(1)); in apci1564_timer_insn_config()
30 outl(0x0, iobase + APCI1564_COUNTER(2)); in apci1564_timer_insn_config()
101 unsigned long iobase = devpriv->counters + APCI1564_COUNTER(chan); in apci1564_counter_insn_config() local
107 ctrl = inl(iobase + ADDI_TCW_CTRL_REG); in apci1564_counter_insn_config()
[all …]
/linux-4.4.14/drivers/net/hamradio/
Dbaycom_ser_fdx.c106 #define RBR(iobase) (iobase+0) argument
107 #define THR(iobase) (iobase+0) argument
108 #define IER(iobase) (iobase+1) argument
109 #define IIR(iobase) (iobase+2) argument
110 #define FCR(iobase) (iobase+2) argument
111 #define LCR(iobase) (iobase+3) argument
112 #define MCR(iobase) (iobase+4) argument
113 #define LSR(iobase) (iobase+5) argument
114 #define MSR(iobase) (iobase+6) argument
115 #define SCR(iobase) (iobase+7) argument
[all …]
Dbaycom_ser_hdx.c94 #define RBR(iobase) (iobase+0) argument
95 #define THR(iobase) (iobase+0) argument
96 #define IER(iobase) (iobase+1) argument
97 #define IIR(iobase) (iobase+2) argument
98 #define FCR(iobase) (iobase+2) argument
99 #define LCR(iobase) (iobase+3) argument
100 #define MCR(iobase) (iobase+4) argument
101 #define LSR(iobase) (iobase+5) argument
102 #define MSR(iobase) (iobase+6) argument
103 #define SCR(iobase) (iobase+7) argument
[all …]
Dyam.c115 int iobase; member
164 #define RBR(iobase) (iobase+0) argument
165 #define THR(iobase) (iobase+0) argument
166 #define IER(iobase) (iobase+1) argument
167 #define IIR(iobase) (iobase+2) argument
168 #define FCR(iobase) (iobase+2) argument
169 #define LCR(iobase) (iobase+3) argument
170 #define MCR(iobase) (iobase+4) argument
171 #define LSR(iobase) (iobase+5) argument
172 #define MSR(iobase) (iobase+6) argument
[all …]
Dbaycom_par.c480 static int iobase[NR_PORTS] = { 0x378, }; variable
484 module_param_array(iobase, int, NULL, 0);
485 MODULE_PARM_DESC(iobase, "baycom io base address");
512 iobase[i] = 0; in init_baycompar()
516 ifname, iobase[i], 0, 0); in init_baycompar()
567 iobase[nr_dev] = ints[1]; in baycom_par_setup()
/linux-4.4.14/drivers/net/ethernet/dec/tulip/
Dde4x5.h16 #define DE4X5_BMR iobase+(0x000 << lp->bus) /* Bus Mode Register */
17 #define DE4X5_TPD iobase+(0x008 << lp->bus) /* Transmit Poll Demand Reg */
18 #define DE4X5_RPD iobase+(0x010 << lp->bus) /* Receive Poll Demand Reg */
19 #define DE4X5_RRBA iobase+(0x018 << lp->bus) /* RX Ring Base Address Reg */
20 #define DE4X5_TRBA iobase+(0x020 << lp->bus) /* TX Ring Base Address Reg */
21 #define DE4X5_STS iobase+(0x028 << lp->bus) /* Status Register */
22 #define DE4X5_OMR iobase+(0x030 << lp->bus) /* Operation Mode Register */
23 #define DE4X5_IMR iobase+(0x038 << lp->bus) /* Interrupt Mask Register */
24 #define DE4X5_MFC iobase+(0x040 << lp->bus) /* Missed Frame Counter */
25 #define DE4X5_APROM iobase+(0x048 << lp->bus) /* Ethernet Address PROM */
[all …]
Dde4x5.c910 static int de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev);
955 static void DevicePresent(struct net_device *dev, u_long iobase);
1095 de4x5_hw_init(struct net_device *dev, u_long iobase, struct device *gendev) in de4x5_hw_init() argument
1133 dev->base_addr = iobase; in de4x5_hw_init()
1134 printk ("%s: %s at 0x%04lx", dev_name(gendev), name, iobase); in de4x5_hw_init()
1295 u_long iobase = dev->base_addr; in de4x5_open() local
1385 u_long iobase = dev->base_addr; in de4x5_sw_reset() local
1463 u_long iobase = dev->base_addr; in de4x5_queue_pkt() local
1541 u_long iobase; in de4x5_interrupt() local
1546 iobase = dev->base_addr; in de4x5_interrupt()
[all …]
/linux-4.4.14/drivers/char/tpm/
Dtpm_atmel.c50 status = ioread8(chip->vendor.iobase + 1); in tpm_atml_recv()
55 *buf++ = ioread8(chip->vendor.iobase); in tpm_atml_recv()
66 status = ioread8(chip->vendor.iobase + 1); in tpm_atml_recv()
77 status = ioread8(chip->vendor.iobase + 1); in tpm_atml_recv()
82 *buf++ = ioread8(chip->vendor.iobase); in tpm_atml_recv()
86 status = ioread8(chip->vendor.iobase + 1); in tpm_atml_recv()
103 iowrite8(buf[i], chip->vendor.iobase); in tpm_atml_send()
111 iowrite8(ATML_STATUS_ABORT, chip->vendor.iobase + 1); in tpm_atml_cancel()
116 return ioread8(chip->vendor.iobase + 1); in tpm_atml_status()
145 atmel_put_base_addr(chip->vendor.iobase); in atml_plat_remove()
[all …]
Dtpm_tis.c164 if (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & in wait_startup()
174 if ((ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & in check_locality()
184 if (force || (ioread8(chip->vendor.iobase + TPM_ACCESS(l)) & in release_locality()
188 chip->vendor.iobase + TPM_ACCESS(l)); in release_locality()
200 chip->vendor.iobase + TPM_ACCESS(l)); in request_locality()
233 return ioread8(chip->vendor.iobase + in tpm_tis_status()
241 chip->vendor.iobase + TPM_STS(chip->vendor.locality)); in tpm_tis_ready()
253 burstcnt = ioread8(chip->vendor.iobase + in get_burstcount()
255 burstcnt += ioread8(chip->vendor.iobase + in get_burstcount()
276 buf[size++] = ioread8(chip->vendor.iobase + in recv_data()
[all …]
Dtpm_atmel.h29 #define atmel_getb(chip, offset) readb(chip->vendor->iobase + offset);
30 #define atmel_putb(val, chip, offset) writeb(val, chip->vendor->iobase + offset)
34 static inline void atmel_put_base_addr(void __iomem *iobase) in atmel_put_base_addr() argument
36 iounmap(iobase); in atmel_put_base_addr()
111 static inline void atmel_put_base_addr(void __iomem *iobase) in atmel_put_base_addr() argument
/linux-4.4.14/drivers/i2c/busses/
Di2c-xlr.c68 u32 __iomem *iobase; member
81 xlr_i2c_wreg(priv->iobase, XLR_I2C_ADDR, offset); in xlr_i2c_tx()
82 xlr_i2c_wreg(priv->iobase, XLR_I2C_DEVADDR, addr); in xlr_i2c_tx()
83 xlr_i2c_wreg(priv->iobase, XLR_I2C_CFG, XLR_I2C_CFG_ADDR); in xlr_i2c_tx()
84 xlr_i2c_wreg(priv->iobase, XLR_I2C_BYTECNT, len - 1); in xlr_i2c_tx()
92 xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, in xlr_i2c_tx()
95 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, buf[pos]); in xlr_i2c_tx()
96 xlr_i2c_wreg(priv->iobase, XLR_I2C_STARTXFR, in xlr_i2c_tx()
102 i2c_status = xlr_i2c_rdreg(priv->iobase, XLR_I2C_STATUS); in xlr_i2c_tx()
108 xlr_i2c_wreg(priv->iobase, XLR_I2C_DATAOUT, byte); in xlr_i2c_tx()
[all …]
Di2c-pmcmsp.c112 void __iomem *iobase; /* iomapped base for IO */ member
179 data->iobase + MSP_TWI_SF_CLK_REG_OFFSET); in pmcmsptwi_set_clock_config()
181 data->iobase + MSP_TWI_HS_CLK_REG_OFFSET); in pmcmsptwi_set_clock_config()
193 data->iobase + MSP_TWI_CFG_REG_OFFSET), cfg); in pmcmsptwi_get_twi_config()
205 data->iobase + MSP_TWI_CFG_REG_OFFSET); in pmcmsptwi_set_twi_config()
244 u32 reason = pmcmsptwi_readl(data->iobase + in pmcmsptwi_interrupt()
246 pmcmsptwi_writel(reason, data->iobase + MSP_TWI_INT_STS_REG_OFFSET); in pmcmsptwi_interrupt()
284 pmcmsptwi_data.iobase = ioremap_nocache(res->start, in pmcmsptwi_probe()
286 if (!pmcmsptwi_data.iobase) { in pmcmsptwi_probe()
308 pmcmsptwi_data.iobase + in pmcmsptwi_probe()
[all …]
Di2c-sh7760.c82 void __iomem *iobase; member
104 __raw_writel(val, (unsigned long)cam->iobase + reg); in OUT32()
109 return __raw_readl((unsigned long)cam->iobase + reg); in IN32()
467 id->iobase = ioremap(res->start, REGSIZE); in sh7760_i2c_probe()
468 if (!id->iobase) { in sh7760_i2c_probe()
528 iounmap(id->iobase); in sh7760_i2c_probe()
544 iounmap(id->iobase); in sh7760_i2c_remove()
/linux-4.4.14/drivers/char/pcmcia/
Dcm4000_cs.c304 static unsigned short io_read_num_rec_bytes(unsigned int iobase, in io_read_num_rec_bytes() argument
312 tmp = inb(REG_NUM_BYTES(iobase)) | in io_read_num_rec_bytes()
313 (inb(REG_FLAGS0(iobase)) & 4 ? 0x100 : 0); in io_read_num_rec_bytes()
423 unsigned int iobase = dev->p_dev->resource[0]->start; in set_cardparameter() local
429 xoutb(dev->flags1, REG_FLAGS1(iobase)); in set_cardparameter()
433 xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase)); in set_cardparameter()
444 xoutb(stopbits, REG_STOPBITS(iobase)); in set_cardparameter()
456 unsigned int iobase = dev->p_dev->resource[0]->start; in set_protocol() local
492 xoutb(0x80, REG_FLAGS0(iobase)); in set_protocol()
499 xoutb(dev->flags1, REG_FLAGS1(iobase)); in set_protocol()
[all …]
Dcm4040_cs.c141 int iobase = dev->p_dev->resource[0]->start; in wait_for_bulk_out_ready() local
144 if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS) in wait_for_bulk_out_ready()
171 int iobase = dev->p_dev->resource[0]->start; in write_sync_reg() local
178 xoutb(val, iobase + REG_OFFSET_SYNC_CONTROL); in write_sync_reg()
189 int iobase = dev->p_dev->resource[0]->start; in wait_for_bulk_in_ready() local
192 if ((xinb(iobase + REG_OFFSET_BUFFER_STATUS) in wait_for_bulk_in_ready()
219 int iobase = dev->p_dev->resource[0]->start; in cm4040_read() local
252 dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN); in cm4040_read()
279 dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN);
311 uc = xinb(iobase + REG_OFFSET_BULK_IN);
[all …]
/linux-4.4.14/drivers/net/wan/
Dsealevel.c49 int iobase; member
182 static int slvl_setup(struct slvl_device *sv, int iobase, int irq) in slvl_setup() argument
191 dev->base_addr = iobase; in slvl_setup()
209 static __init struct slvl_board *slvl_init(int iobase, int irq, in slvl_init() argument
219 if (!request_region(iobase, 8, "Sealevel 4021")) { in slvl_init()
220 pr_warn("I/O 0x%X already in use\n", iobase); in slvl_init()
242 b->iobase = iobase; in slvl_init()
249 iobase |= Z8530_PORT_SLEEP; in slvl_init()
251 dev->chanA.ctrlio = iobase + 1; in slvl_init()
252 dev->chanA.dataio = iobase; in slvl_init()
[all …]
Dhostess_sv11.c188 static struct z8530_dev *sv11_init(int iobase, int irq) in sv11_init() argument
196 if (!request_region(iobase, 8, "Comtrol SV11")) { in sv11_init()
197 pr_warn("I/O 0x%X already in use\n", iobase); in sv11_init()
211 sv->chanA.ctrlio = iobase + 1; in sv11_init()
212 sv->chanA.dataio = iobase + 3; in sv11_init()
218 outb(0, iobase + 4); /* DMA off */ in sv11_init()
241 outb(0x03 | 0x08, iobase + 4); /* DMA on */ in sv11_init()
282 netdev->base_addr = iobase; in sv11_init()
291 z8530_describe(sv, "I/O", iobase); in sv11_init()
306 release_region(iobase, 8); in sv11_init()
/linux-4.4.14/sound/pci/
Dals4000.c111 unsigned long iobase; member
191 static inline void snd_als4k_iobase_writeb(unsigned long iobase, in snd_als4k_iobase_writeb() argument
195 outb(val, iobase + reg); in snd_als4k_iobase_writeb()
198 static inline void snd_als4k_iobase_writel(unsigned long iobase, in snd_als4k_iobase_writel() argument
202 outl(val, iobase + reg); in snd_als4k_iobase_writel()
205 static inline u8 snd_als4k_iobase_readb(unsigned long iobase, in snd_als4k_iobase_readb() argument
208 return inb(iobase + reg); in snd_als4k_iobase_readb()
211 static inline u32 snd_als4k_iobase_readl(unsigned long iobase, in snd_als4k_iobase_readl() argument
214 return inl(iobase + reg); in snd_als4k_iobase_readl()
217 static inline void snd_als4k_gcr_write_addr(unsigned long iobase, in snd_als4k_gcr_write_addr() argument
[all …]
Drme96.c231 void __iomem *iobase; member
317 return (readl(rme96->iobase + RME96_IO_GET_PLAY_POS) in snd_rme96_playback_ptr()
324 return (readl(rme96->iobase + RME96_IO_GET_REC_POS) in snd_rme96_capture_ptr()
337 memset_io(rme96->iobase + RME96_IO_PLAY_BUFFER + pos, in snd_rme96_playback_silence()
352 return copy_from_user_toio(rme96->iobase + RME96_IO_PLAY_BUFFER + pos, src, in snd_rme96_playback_copy()
366 return copy_to_user_fromio(dst, rme96->iobase + RME96_IO_REC_BUFFER + pos, in snd_rme96_capture_copy()
510 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_write_SPI()
513 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_write_SPI()
519 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_write_SPI()
522 writel(rme96->areg, rme96->iobase + RME96_IO_ADDITIONAL_REG); in snd_rme96_write_SPI()
[all …]
Drme32.c197 void __iomem *iobase; member
252 return (readl(rme32->iobase + RME32_IO_GET_POS) in snd_rme32_pcm_byteptr()
264 memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count); in snd_rme32_playback_silence()
276 if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos, in snd_rme32_playback_copy()
291 rme32->iobase + RME32_IO_DATA_BUFFER + pos, in snd_rme32_capture_copy()
402 rme32->iobase + RME32_IO_CONTROL_REGISTER); in snd_rme32_reset_dac()
403 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); in snd_rme32_reset_dac()
541 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); in snd_rme32_playback_setrate()
572 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); in snd_rme32_setclockmode()
604 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER); in snd_rme32_setinputtype()
[all …]
Dmaestro3.c743 unsigned long iobase; member
932 outw(value, chip->iobase + reg); in snd_m3_outw()
937 return inw(chip->iobase + reg); in snd_m3_inw()
942 outb(value, chip->iobase + reg); in snd_m3_outb()
947 return inb(chip->iobase + reg); in snd_m3_inb()
1551 x = inb(chip->iobase + SHADOW_MIX_REG_VOICE) & 0xee; in snd_m3_update_hw_volume()
1562 outb(0x88, chip->iobase + SHADOW_MIX_REG_VOICE); in snd_m3_update_hw_volume()
1563 outb(0x88, chip->iobase + HW_VOL_COUNTER_VOICE); in snd_m3_update_hw_volume()
1564 outb(0x88, chip->iobase + SHADOW_MIX_REG_MASTER); in snd_m3_update_hw_volume()
1565 outb(0x88, chip->iobase + HW_VOL_COUNTER_MASTER); in snd_m3_update_hw_volume()
[all …]
Dcmipci.c465 unsigned long iobase; member
517 outl(data, cm->iobase + cmd); in snd_cmipci_write()
522 return inl(cm->iobase + cmd); in snd_cmipci_read()
528 outw(data, cm->iobase + cmd); in snd_cmipci_write_w()
533 return inw(cm->iobase + cmd); in snd_cmipci_read_w()
539 outb(data, cm->iobase + cmd); in snd_cmipci_write_b()
544 return inb(cm->iobase + cmd); in snd_cmipci_read_b()
551 val = oval = inl(cm->iobase + cmd); in snd_cmipci_set_bit()
555 outl(val, cm->iobase + cmd); in snd_cmipci_set_bit()
562 val = oval = inl(cm->iobase + cmd); in snd_cmipci_clear_bit()
[all …]
Dad1889.c92 void __iomem *iobase; member
112 return readw(chip->iobase + reg); in ad1889_readw()
118 writew(val, chip->iobase + reg); in ad1889_writew()
124 return readl(chip->iobase + reg); in ad1889_readl()
130 writel(val, chip->iobase + reg); in ad1889_writel()
855 iounmap(chip->iobase); in snd_ad1889_free()
924 chip->iobase = pci_ioremap_bar(pci, 0); in snd_ad1889_create()
925 if (chip->iobase == NULL) { in snd_ad1889_create()
/linux-4.4.14/drivers/mtd/maps/
Dl440gx.c21 static u32 iobase; variable
22 #define IOBASE iobase
103 pci_read_config_dword(pm_dev, 0x40, &iobase); in init_l440gx()
104 iobase &= ~1; in init_l440gx()
105 pm_iobase->start += iobase & ~1; in init_l440gx()
106 pm_iobase->end += iobase & ~1; in init_l440gx()
120 iobase = pm_iobase->start; in init_l440gx()
121 pci_write_config_dword(pm_dev, 0x40, iobase | 1); in init_l440gx()
/linux-4.4.14/drivers/usb/isp1760/
Disp1760-if.c33 u8 __iomem *iobase; in isp1761_pci_init() local
52 iobase = ioremap_nocache(mem_start, mem_length); in isp1761_pci_init()
53 if (!iobase) { in isp1761_pci_init()
77 writel(0xface, iobase + HC_SCRATCH_REG); in isp1761_pci_init()
79 reg_data = readl(iobase + HC_SCRATCH_REG) & 0x0000ffff; in isp1761_pci_init()
83 iounmap(iobase); in isp1761_pci_init()
103 iobase = ioremap_nocache(mem_start, mem_length); in isp1761_pci_init()
104 if (!iobase) { in isp1761_pci_init()
112 reg_data = readl(iobase + PLX_INT_CSR_REG); in isp1761_pci_init()
114 writel(reg_data, iobase + PLX_INT_CSR_REG); in isp1761_pci_init()
[all …]
/linux-4.4.14/drivers/video/
Dvgastate.c34 static inline unsigned char vga_rcrtcs(void __iomem *regbase, unsigned short iobase, in vga_rcrtcs() argument
37 vga_w(regbase, iobase + 0x4, reg); in vga_rcrtcs()
38 return vga_r(regbase, iobase + 0x5); in vga_rcrtcs()
41 static inline void vga_wcrtcs(void __iomem *regbase, unsigned short iobase, in vga_wcrtcs() argument
44 vga_w(regbase, iobase + 0x4, reg); in vga_wcrtcs()
45 vga_w(regbase, iobase + 0x5, val); in vga_wcrtcs()
53 unsigned short iobase; in save_vga_text() local
57 iobase = (misc & 1) ? 0x3d0 : 0x3b0; in save_vga_text()
59 vga_r(state->vgabase, iobase + 0xa); in save_vga_text()
62 vga_r(state->vgabase, iobase + 0xa); in save_vga_text()
[all …]
/linux-4.4.14/drivers/firmware/broadcom/
Dbcm47xx_nvram.c56 static int nvram_find_and_copy(void __iomem *iobase, u32 lim) in nvram_find_and_copy() argument
73 size = find_nvram_size(iobase + off); in nvram_find_and_copy()
75 header = (struct nvram_header *)(iobase + off - size); in nvram_find_and_copy()
82 header = (struct nvram_header *)(iobase + 4096); in nvram_find_and_copy()
88 header = (struct nvram_header *)(iobase + 1024); in nvram_find_and_copy()
130 void __iomem *iobase; in bcm47xx_nvram_init_from_mem() local
133 iobase = ioremap_nocache(base, lim); in bcm47xx_nvram_init_from_mem()
134 if (!iobase) in bcm47xx_nvram_init_from_mem()
137 err = nvram_find_and_copy(iobase, lim); in bcm47xx_nvram_init_from_mem()
139 iounmap(iobase); in bcm47xx_nvram_init_from_mem()
/linux-4.4.14/drivers/clocksource/
Ddw_apb_timer_of.c64 void __iomem *iobase; in add_clockevent() local
72 timer_get_base_and_rate(event_timer, &iobase, &rate); in add_clockevent()
74 ced = dw_apb_clockevent_init(0, event_timer->name, 300, iobase, irq, in add_clockevent()
87 void __iomem *iobase; in add_clocksource() local
91 timer_get_base_and_rate(source_timer, &iobase, &rate); in add_clocksource()
93 cs = dw_apb_clocksource_init(300, source_timer->name, iobase, rate); in add_clocksource()
105 sched_io_base = iobase + 0x04; in add_clocksource()
/linux-4.4.14/drivers/isdn/hysdn/
Dboardergo.c49 if (!(bytein(card->iobase + PCI9050_INTR_REG) & PCI9050_INTR_REG_STAT1)) { in ergo_interrupt()
138 val = bytein(card->iobase + PCI9050_INTR_REG); /* get actual value */ in ergo_stopcard()
140 byteout(card->iobase + PCI9050_INTR_REG, val); in ergo_stopcard()
142 byteout(card->iobase + PCI9050_USER_IO, PCI9050_E1_RESET); /* reset E1 processor */ in ergo_stopcard()
241 byteout(card->iobase + PCI9050_USER_IO, PCI9050_E1_RUN); /* start E1 processor */ in ergo_writebootimg()
356 byteout(card->iobase + PCI9050_INTR_REG, in ergo_waitpofready()
357 bytein(card->iobase + PCI9050_INTR_REG) | in ergo_waitpofready()
400 release_region(card->iobase + PCI9050_INTR_REG, 1); /* release all io ports */ in ergo_releasehardware()
401 release_region(card->iobase + PCI9050_USER_IO, 1); in ergo_releasehardware()
415 if (!request_region(card->iobase + PCI9050_INTR_REG, 1, "HYSDN")) in ergo_inithardware()
[all …]
/linux-4.4.14/drivers/scsi/
Dwd7000.c246 int iobase; /* This adapter's I/O base address */ member
301 unsigned iobase; /* I/O base address */ member
676 configs[wd7000_card_num].iobase = ints[3]; in wd7000_setup()
709 if (configs[i].iobase == configs[j].iobase) { in wd7000_setup()
717 …00_card_num].irq, configs[wd7000_card_num].dma, configs[wd7000_card_num].iobase, configs[wd7000_ca… in wd7000_setup()
741 outb(host->control, host->iobase + ASC_CONTROL); in wd7000_enable_intr()
749 outb(host->control, host->iobase + ASC_CONTROL); in wd7000_enable_dma()
779 if (!WAIT(host->iobase + ASC_STAT, ASC_STATMASK, CMD_RDY, 0)) { in command_out()
782 outb(*cmd, host->iobase + ASC_COMMAND); in command_out()
783 WAIT(host->iobase + ASC_STAT, ASC_STATMASK, CMD_RDY, 0); in command_out()
[all …]
Dqlogicfas.c138 static int iobase[MAX_QLOGICFAS]; variable
140 module_param_array(iobase, int, NULL, 0);
142 MODULE_PARM_DESC(iobase, "I/O address");
152 shost = __qlogicfas_detect(sht, iobase[num], irq[num]); in qlogicfas_detect()
Dfdomain.c682 static int fdomain_isa_detect( int *irq, int *iobase ) in fdomain_isa_detect() argument
751 *iobase = base; in fdomain_isa_detect()
799 *iobase = base; in fdomain_isa_detect()
806 static int fdomain_isa_detect( int *irq, int *iobase ) in fdomain_isa_detect() argument
810 if (iobase) in fdomain_isa_detect()
811 *iobase = 0; in fdomain_isa_detect()
823 static int fdomain_pci_bios_detect( int *irq, int *iobase, struct pci_dev **ret_pdev ) in fdomain_pci_bios_detect() argument
866 *iobase = pci_base; in fdomain_pci_bios_detect()
871 " IRQ = %d, I/O base = 0x%x [0x%lx]\n", *irq, *iobase, pci_base ); in fdomain_pci_bios_detect()
/linux-4.4.14/drivers/misc/vmw_vmci/
Dvmci_guest.c55 void __iomem *iobase; member
121 iowrite8_rep(vmci_dev_g->iobase + VMCI_DATA_OUT_ADDR, in vmci_send_datagram()
123 result = ioread32(vmci_dev_g->iobase + VMCI_RESULT_LOW_ADDR); in vmci_send_datagram()
223 ioread8_rep(vmci_dev->iobase + VMCI_DATA_IN_ADDR, in vmci_dispatch_dgs()
284 ioread8_rep(vmci_dev->iobase + in vmci_dispatch_dgs()
326 ioread8_rep(vmci_dev->iobase + in vmci_dispatch_dgs()
346 ioread8_rep(vmci_dev->iobase + VMCI_DATA_IN_ADDR, in vmci_dispatch_dgs()
415 icr = ioread32(dev->iobase + VMCI_ICR_ADDR); in vmci_interrupt()
460 void __iomem *iobase; in vmci_guest_probe_device() local
481 iobase = pcim_iomap_table(pdev)[0]; in vmci_guest_probe_device()
[all …]
/linux-4.4.14/drivers/ata/
Dpata_rb532_cf.c51 void __iomem *iobase; member
96 ap->ioaddr.cmd_addr = info->iobase + RB500_CF_REG_BASE; in rb532_pata_setup_ports()
97 ap->ioaddr.ctl_addr = info->iobase + RB500_CF_REG_CTRL; in rb532_pata_setup_ports()
98 ap->ioaddr.altstatus_addr = info->iobase + RB500_CF_REG_CTRL; in rb532_pata_setup_ports()
102 ap->ioaddr.data_addr = info->iobase + RB500_CF_REG_DBUF32; in rb532_pata_setup_ports()
103 ap->ioaddr.error_addr = info->iobase + RB500_CF_REG_ERR; in rb532_pata_setup_ports()
161 info->iobase = devm_ioremap_nocache(&pdev->dev, res->start, in rb532_pata_driver_probe()
163 if (!info->iobase) in rb532_pata_driver_probe()
Dpata_hpt3x2n.c414 unsigned long iobase = pci_resource_start(pdev, 4); in hpt3x2n_pci_clock() local
416 fcnt = inl(iobase + 0x90); /* Not PCI readable for some chips */ in hpt3x2n_pci_clock()
498 unsigned long iobase = pci_resource_start(dev, 4); in hpt3x2n_init_one() local
600 outb(inb(iobase + 0x9c) | 0x04, iobase + 0x9c); in hpt3x2n_init_one()
/linux-4.4.14/drivers/dma/ioat/
Ddca.c112 void __iomem *iobase; member
161 ioatdca->iobase + global_req_table + (i * 4)); in ioat_dca_add_requester()
186 writel(0, ioatdca->iobase + global_req_table + (i * 4)); in ioat_dca_remove_requester()
234 static int ioat_dca_count_dca_slots(void *iobase, u16 dca_offset) in ioat_dca_count_dca_slots() argument
240 global_req_table = readw(iobase + dca_offset + IOAT3_DCA_GREQID_OFFSET); in ioat_dca_count_dca_slots()
245 req = readl(iobase + global_req_table + (slots * sizeof(u32))); in ioat_dca_count_dca_slots()
269 struct dca_provider *ioat_dca_init(struct pci_dev *pdev, void __iomem *iobase) in ioat_dca_init() argument
292 dca_offset = readw(iobase + IOAT_DCAOFFSET_OFFSET); in ioat_dca_init()
296 slots = ioat_dca_count_dca_slots(iobase, dca_offset); in ioat_dca_init()
307 ioatdca->iobase = iobase; in ioat_dca_init()
[all …]
/linux-4.4.14/include/linux/
Dcb710.h27 void __iomem *iobase; member
34 void __iomem *iobase; member
58 iowrite##t(value, slot->iobase + port); \
64 return ioread##t(slot->iobase + port); \
71 (ioread##t(slot->iobase + port) & ~clear)|set, \
72 slot->iobase + port); \
/linux-4.4.14/drivers/mmc/host/
Dsdricoh_cs.c95 unsigned char __iomem *iobase; member
105 unsigned int value = readl(host->iobase + reg); in sdricoh_readl()
113 writel(value, host->iobase + reg); in sdricoh_writel()
121 unsigned int value = readw(host->iobase + reg); in sdricoh_readw()
129 writew(value, host->iobase + reg); in sdricoh_writew()
136 unsigned int value = readb(host->iobase + reg); in sdricoh_readb()
402 void __iomem *iobase = NULL; in sdricoh_init_mmc() local
412 iobase = in sdricoh_init_mmc()
414 if (!iobase) { in sdricoh_init_mmc()
419 if (readl(iobase + R104_VERSION) != 0x4000) { in sdricoh_init_mmc()
[all …]
Dau1xmmc.c94 void __iomem *iobase; member
139 #define HOST_STATUS(h) ((h)->iobase + SD_STATUS)
140 #define HOST_CONFIG(h) ((h)->iobase + SD_CONFIG)
141 #define HOST_ENABLE(h) ((h)->iobase + SD_ENABLE)
142 #define HOST_TXPORT(h) ((h)->iobase + SD_TXPORT)
143 #define HOST_RXPORT(h) ((h)->iobase + SD_RXPORT)
144 #define HOST_CMDARG(h) ((h)->iobase + SD_CMDARG)
145 #define HOST_BLKSIZE(h) ((h)->iobase + SD_BLKSIZE)
146 #define HOST_CMD(h) ((h)->iobase + SD_CMD)
147 #define HOST_CONFIG2(h) ((h)->iobase + SD_CONFIG2)
[all …]
Dmvsdio.c59 #define mvsd_write(offs, val) writel(val, iobase + (offs))
60 #define mvsd_read(offs) readl(iobase + (offs))
64 void __iomem *iobase = host->base; in mvsd_setup_data() local
145 void __iomem *iobase = host->base; in mvsd_request() local
248 void __iomem *iobase = host->base; in mvsd_finish_cmd() local
293 void __iomem *iobase = host->base; in mvsd_finish_data() local
352 void __iomem *iobase = host->base; in mvsd_irq() local
384 readsw(iobase + MVSD_FIFO, p, 16); in mvsd_irq()
518 void __iomem *iobase = host->base; in mvsd_timeout_timer() local
559 void __iomem *iobase = host->base; in mvsd_enable_sdio_irq() local
[all …]
/linux-4.4.14/drivers/mtd/spi-nor/
Dfsl-quadspi.c264 void __iomem *iobase; member
313 writel(QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY); in fsl_qspi_unlock_lut()
314 writel(QUADSPI_LCKER_UNLOCK, q->iobase + QUADSPI_LCKCR); in fsl_qspi_unlock_lut()
319 writel(QUADSPI_LUTKEY_VALUE, q->iobase + QUADSPI_LUTKEY); in fsl_qspi_lock_lut()
320 writel(QUADSPI_LCKER_LOCK, q->iobase + QUADSPI_LCKCR); in fsl_qspi_lock_lut()
329 reg = readl(q->iobase + QUADSPI_FR); in fsl_qspi_irq_handler()
330 writel(reg, q->iobase + QUADSPI_FR); in fsl_qspi_irq_handler()
341 void __iomem *base = q->iobase; in fsl_qspi_init_lut()
481 void __iomem *base = q->iobase; in fsl_qspi_runcmd()
536 tmp = readl(q->iobase + QUADSPI_RBDR + i * 4); in fsl_qspi_read_data()
[all …]
/linux-4.4.14/drivers/gpio/
Dgpio-sch.c39 unsigned short iobase; member
75 reg_val = !!(inb(sch->iobase + offset) & BIT(bit)); in sch_gpio_reg_get()
90 reg_val = inb(sch->iobase + offset); in sch_gpio_reg_set()
93 outb(reg_val | BIT(bit), sch->iobase + offset); in sch_gpio_reg_set()
95 outb((reg_val & ~BIT(bit)), sch->iobase + offset); in sch_gpio_reg_set()
171 sch->iobase = res->start; in sch_gpio_probe()
/linux-4.4.14/drivers/isdn/sc/
Dinit.c346 sc_adapter[cinst]->iobase = io[b]; in sc_init()
436 static int identify_board(unsigned long rambase, unsigned int iobase) in identify_board() argument
447 rambase, iobase); in identify_board()
452 outb(rambase >> 12, iobase + 0x2c00); in identify_board()
456 pgport = iobase + PG0_OFFSET; in identify_board()
461 pgport = iobase + PG1_OFFSET; in identify_board()
466 pgport = iobase + PG2_OFFSET; in identify_board()
471 pgport = iobase + PG3_OFFSET; in identify_board()
517 outb(0, iobase + 0x400); in identify_board()
523 while ((inb(iobase + FIFOSTAT_OFFSET) & RF_HAS_DATA) && x < 100) { in identify_board()
/linux-4.4.14/drivers/spi/
Dspi-coldfire-qspi.c69 void __iomem *iobase; member
79 writew(val, mcfqspi->iobase + MCFQSPI_QMR); in mcfqspi_wr_qmr()
84 writew(val, mcfqspi->iobase + MCFQSPI_QDLYR); in mcfqspi_wr_qdlyr()
89 return readw(mcfqspi->iobase + MCFQSPI_QDLYR); in mcfqspi_rd_qdlyr()
94 writew(val, mcfqspi->iobase + MCFQSPI_QWR); in mcfqspi_wr_qwr()
99 writew(val, mcfqspi->iobase + MCFQSPI_QIR); in mcfqspi_wr_qir()
104 writew(val, mcfqspi->iobase + MCFQSPI_QAR); in mcfqspi_wr_qar()
109 writew(val, mcfqspi->iobase + MCFQSPI_QDR); in mcfqspi_wr_qdr()
114 return readw(mcfqspi->iobase + MCFQSPI_QDR); in mcfqspi_rd_qdr()
375 mcfqspi->iobase = devm_ioremap_resource(&pdev->dev, res); in mcfqspi_probe()
[all …]
/linux-4.4.14/drivers/hwmon/
Dpc87427.c186 int iobase = data->address[LD_FAN]; in pc87427_readall_fan() local
188 outb(BANK_FM(nr), iobase + PC87427_REG_BANK); in pc87427_readall_fan()
189 data->fan[nr] = inw(iobase + PC87427_REG_FAN); in pc87427_readall_fan()
190 data->fan_min[nr] = inw(iobase + PC87427_REG_FAN_MIN); in pc87427_readall_fan()
191 data->fan_status[nr] = inb(iobase + PC87427_REG_FAN_STATUS); in pc87427_readall_fan()
193 outb(data->fan_status[nr], iobase + PC87427_REG_FAN_STATUS); in pc87427_readall_fan()
241 int iobase = data->address[LD_FAN]; in pc87427_readall_pwm() local
243 outb(BANK_FC(nr), iobase + PC87427_REG_BANK); in pc87427_readall_pwm()
244 data->pwm_enable[nr] = inb(iobase + PC87427_REG_PWM_ENABLE); in pc87427_readall_pwm()
245 data->pwm[nr] = inb(iobase + PC87427_REG_PWM_DUTY); in pc87427_readall_pwm()
[all …]
/linux-4.4.14/drivers/net/wireless/orinoco/
Dhermes.c77 #define DMSG(stuff...) do {printk(KERN_DEBUG "hermes @ %p: " , hw->iobase); \
158 hw->iobase); in hermes_doicmd_wait()
166 hw->iobase, reg); in hermes_doicmd_wait()
190 hw->iobase = address; in hermes_struct_init()
266 "0x%04x.\n", hw->iobase, cmd); in hermes_docmd_wait()
272 hw->iobase, err, cmd); in hermes_docmd_wait()
287 hw->iobase, cmd); in hermes_docmd_wait()
294 "command 0x%04x completion.\n", hw->iobase, cmd); in hermes_docmd_wait()
340 hw->iobase); in hermes_allocate()
347 hw->iobase); in hermes_allocate()
[all …]
Dhermes.h410 void __iomem *iobase; member
422 (ioread16((hw)->iobase + ((off) << (hw)->reg_spacing)))
424 (iowrite16((val), (hw)->iobase + ((off) << (hw)->reg_spacing)))
473 ioread16_rep(hw->iobase + off, buf, count); in hermes_read_words()
480 iowrite16_rep(hw->iobase + off, buf, count >> 1); in hermes_write_bytes()
482 iowrite8(buf[count - 1], hw->iobase + off); in hermes_write_bytes()
493 iowrite16(0, hw->iobase + off); in hermes_clear_words()
/linux-4.4.14/arch/nios2/kernel/
Dtime.c236 void __iomem *iobase; in nios2_clockevent_init() local
240 nios2_timer_get_base_and_freq(timer, &iobase, &freq); in nios2_clockevent_init()
246 nios2_ce.timer.base = iobase; in nios2_clockevent_init()
266 void __iomem *iobase; in nios2_clocksource_init() local
269 nios2_timer_get_base_and_freq(timer, &iobase, &freq); in nios2_clocksource_init()
271 nios2_cs.timer.base = iobase; in nios2_clocksource_init()
/linux-4.4.14/drivers/net/wireless/libertas/
Dif_cs.c62 void __iomem *iobase; member
111 unsigned int val = ioread8(card->iobase + reg); in if_cs_read8()
118 unsigned int val = ioread16(card->iobase + reg); in if_cs_read16()
132 ioread16_rep(card->iobase + reg, buf, count); in if_cs_read16_rep()
139 iowrite8(val, card->iobase + reg); in if_cs_write8()
146 iowrite16(val, card->iobase + reg); in if_cs_write16()
158 iowrite16_rep(card->iobase + reg, buf, count); in if_cs_write16_rep()
825 if (card->iobase) in if_cs_release()
826 ioport_unmap(card->iobase); in if_cs_release()
878 card->iobase = ioport_map(p_dev->resource[0]->start, in if_cs_probe()
[all …]
/linux-4.4.14/sound/pci/emu10k1/
Demuproc.c447 unsigned int iobase, in snd_ptr_read() argument
457 outl(regptr, emu->port + iobase + PTR); in snd_ptr_read()
458 val = inl(emu->port + iobase + DATA); in snd_ptr_read()
464 unsigned int iobase, in snd_ptr_write() argument
475 outl(regptr, emu->port + iobase + PTR); in snd_ptr_write()
476 outl(data, emu->port + iobase + DATA); in snd_ptr_write()
482 struct snd_info_buffer *buffer, int iobase, int offset, int length, int voices) in snd_emu_proc_ptr_reg_read() argument
491 snd_iprintf(buffer, "Registers 0x%x\n", iobase); in snd_emu_proc_ptr_reg_read()
495 if(iobase == 0) in snd_emu_proc_ptr_reg_read()
506 struct snd_info_buffer *buffer, int iobase) in snd_emu_proc_ptr_reg_write() argument
[all …]
/linux-4.4.14/drivers/thunderbolt/
Dnhi.c44 old = ioread32(ring->nhi->iobase + reg); in ring_interrupt_active()
59 iowrite32(new, ring->nhi->iobase + reg); in ring_interrupt_active()
72 iowrite32(0, nhi->iobase + REG_RING_INTERRUPT_BASE + 4 * i); in nhi_disable_interrupts()
76 ioread32(nhi->iobase + REG_RING_NOTIFY_BASE + 4 * i); in nhi_disable_interrupts()
83 void __iomem *io = ring->nhi->iobase; in ring_desc_base()
91 void __iomem *io = ring->nhi->iobase; in ring_options_base()
457 value = ioread32(nhi->iobase in nhi_interrupt_work()
565 nhi->iobase = pcim_iomap_table(pdev)[0]; in nhi_probe()
566 nhi->hop_count = ioread32(nhi->iobase + REG_HOP_COUNT) & 0x3ff; in nhi_probe()
593 iowrite32(3906250 / 10000, nhi->iobase + 0x38c00); in nhi_probe()
/linux-4.4.14/drivers/misc/cb710/
Ddebug.c33 static void cb710_read_regs_##t(void __iomem *iobase, \
45 reg[j] = ioread##t(iobase \
90 cb710_read_regs_##t(chip->iobase, regs, select); \
Dcore.c115 slot->iobase = chip->iobase + io_offset; in cb710_register_slot()
250 chip->iobase = pcim_iomap_table(pdev)[0]; in cb710_probe()
273 chip->platform_id, chip->iobase, pdev->irq); in cb710_probe()
/linux-4.4.14/drivers/tty/serial/jsm/
Djsm_driver.c155 brd->iobase = pci_resource_start(pdev, 1); in jsm_probe_one()
157 brd->iobase = ((unsigned int)(brd->iobase)) & 0xFFFE; in jsm_probe_one()
179 outb(0x43, brd->iobase + 0x4c); in jsm_probe_one()
282 outb(0x0, brd->iobase + 0x4c); in jsm_remove_one()
/linux-4.4.14/drivers/tty/serial/8250/
D8250_core.c373 start += port->iobase; in serial8250_request_rsa_resource()
393 release_region(port->iobase + offset, size); in serial8250_release_rsa_resource()
451 if (probe_rsa[i] == up->port.iobase) { in univ8250_config_port()
547 port->iobase = old_serial_port[i].port; in serial8250_isa_init_ports()
656 if (iotype == UPIO_PORT && port->iobase != addr) in univ8250_console_match()
718 p->iobase = port->iobase; in early_serial_setup()
809 uart.port.iobase = p->iobase; in serial8250_probe()
833 p->iobase, (unsigned long long)p->mapbase, in serial8250_probe()
921 serial8250_ports[i].port.iobase == 0) in serial8250_find_match_or_unused()
930 serial8250_ports[i].port.iobase == 0) in serial8250_find_match_or_unused()
[all …]
D8250_early.c50 return inb(port->iobase + offset); in serial8250_early_in()
69 outb(value, port->iobase + offset); in serial8250_early_out()
139 if (!(device->port.membase || device->port.iobase)) in early_serial8250_setup()
D8250_pnp.c453 uart.port.iobase = pnp_port_start(dev, 2); in serial_pnp_probe()
456 uart.port.iobase = pnp_port_start(dev, 0); in serial_pnp_probe()
468 uart.port.iobase, uart.port.mapbase, uart.port.irq, uart.port.iotype); in serial_pnp_probe()
/linux-4.4.14/arch/arm/mach-footbridge/
Disa.c53 .iobase = 0x3f8,
61 .iobase = 0x2f8,
/linux-4.4.14/drivers/tty/serial/
Dserial_txx9.c179 return inl(up->port.iobase + offset); in sio_in()
191 outl(value, up->port.iobase + offset); in sio_out()
778 if (!request_region(up->port.iobase, size, "serial_txx9")) in serial_txx9_request_resource()
803 release_region(up->port.iobase, size); in serial_txx9_release_resource()
883 if (up->port.iobase || up->port.mapbase) in serial_txx9_register_ports()
1038 if (!(uart->port.iobase || uart->port.mapbase)) in serial_txx9_register_port()
1043 uart->port.iobase = port->iobase; in serial_txx9_register_port()
1076 uart->port.iobase = 0; in serial_txx9_unregister_port()
1094 port.iobase = p->iobase; in serial_txx9_probe()
1106 p->iobase, (unsigned long long)p->mapbase, in serial_txx9_probe()
[all …]
Dnwpserial.c356 if (nwpserial_ports[i].port.iobase == dcr_base) { in nwpserial_register_port()
365 nwpserial_ports[i].port.iobase == 0) { in nwpserial_register_port()
392 if (up->port.iobase != dcr_base) { in nwpserial_register_port()
398 up->port.iobase = dcr_base; in nwpserial_register_port()
466 up->port.iobase = dcr_base; in nwpserial_console_init()
/linux-4.4.14/drivers/pci/host/
Dpci-versatile.c76 resource_size_t iobase; in versatile_pci_parse_request_of_pci_ranges() local
79 err = of_pci_get_host_bridge_resources(np, 0, 0xff, res, &iobase); in versatile_pci_parse_request_of_pci_ranges()
89 err = pci_remap_iospace(res, iobase); in versatile_pci_parse_request_of_pci_ranges()
Dpcie-iproc-platform.c34 resource_size_t iobase = 0; in iproc_pcie_pltfm_probe() local
92 ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &iobase); in iproc_pcie_pltfm_probe()
Dpci-mvebu.c102 u8 iobase; member
382 phys_addr_t iobase; in mvebu_pcie_handle_iobase_change() local
385 if (port->bridge.iolimit < port->bridge.iobase || in mvebu_pcie_handle_iobase_change()
413 iobase = ((port->bridge.iobase & 0xF0) << 8) | in mvebu_pcie_handle_iobase_change()
415 port->iowin_base = port->pcie->io.start + iobase; in mvebu_pcie_handle_iobase_change()
418 iobase) + 1; in mvebu_pcie_handle_iobase_change()
422 iobase); in mvebu_pcie_handle_iobase_change()
476 bridge->iobase = PCI_IO_RANGE_TYPE_32; in mvebu_sw_pci_bridge_init()
528 bridge->iobase); in mvebu_sw_pci_bridge_read()
676 bridge->iobase = (value & 0xff) | PCI_IO_RANGE_TYPE_32; in mvebu_sw_pci_bridge_write()
Dpci-host-generic.c115 resource_size_t iobase; in gen_pci_parse_request_of_pci_ranges() local
119 &iobase); in gen_pci_parse_request_of_pci_ranges()
129 err = pci_remap_iospace(res, iobase); in gen_pci_parse_request_of_pci_ranges()
/linux-4.4.14/drivers/clk/ti/
Dclk-dra7-atl.c59 void __iomem *iobase; member
69 __raw_writel(val, cinfo->iobase + reg); in atl_write()
74 return __raw_readl(cinfo->iobase + reg); in atl_read()
230 cinfo->iobase = of_iomap(node, 0); in of_dra7_atl_clk_probe()
/linux-4.4.14/drivers/isdn/hisax/
Dhfc4s8s_l1.c172 int iobase; member
204 outb(b, (a->iobase) + 4); in SetRegAddr()
210 return (inb((volatile u_int) (a->iobase + 4))); in GetRegAddr()
218 outb(c, a->iobase); in Write_hfc8()
224 outb(c, a->iobase); in fWrite_hfc8()
230 outl(c, a->iobase); in fWrite_hfc32()
237 return (inb((volatile u_int) a->iobase)); in Read_hfc8()
243 return (inb((volatile u_int) a->iobase)); in fRead_hfc8()
251 return (inw((volatile u_int) a->iobase)); in Read_hfc16()
257 return (inl((volatile u_int) a->iobase)); in fRead_hfc32()
[all …]
Dw6692.h22 insb(cs->hw.w6692.iobase + W_B_RFIFO + (bchan ? 0x40 : 0), ptr, count)
25 outsb(cs->hw.w6692.iobase + W_B_XFIFO + (bchan ? 0x40 : 0), ptr, count)
Dw6692.c936 return (inb(cs->hw.w6692.iobase + offset)); in ReadW6692()
942 outb(value, cs->hw.w6692.iobase + offset); in WriteW6692()
948 insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size); in ReadISACfifo()
954 outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size); in WriteISACfifo()
960 return (inb(cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset)); in ReadW6692B()
966 outb(value, cs->hw.w6692.iobase + (bchan ? 0x40 : 0) + offset); in WriteW6692B()
978 release_region(cs->hw.w6692.iobase, 256); in w6692_card_msg()
1048 cs->hw.w6692.iobase = pci_ioaddr; in setup_w6692()
1052 if (!request_region(cs->hw.w6692.iobase, 256, id_list[cs->subtyp].card_name)) { in setup_w6692()
1056 cs->hw.w6692.iobase, in setup_w6692()
[all …]
/linux-4.4.14/drivers/scsi/qla2xxx/
Dqla_sup.c26 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_lock_nvram_access()
58 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_unlock_nvram_access()
74 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_nv_write()
107 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_nvram_request()
172 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_nv_deselect()
191 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_write_nvram_word()
249 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_write_nvram_word_tmo()
309 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_clear_nvram_protection()
374 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_set_nvram_protection()
458 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_read_flash_dword()
[all …]
/linux-4.4.14/arch/mips/loongson64/common/
Dserial.c73 uart8250_data[mips_machtype][0].iobase = in serial_init()
95 uart8250_data[mips_machtype][i].iobase = in serial_init()
/linux-4.4.14/drivers/staging/dgnc/
Ddgnc_driver.c315 outb(0, brd->iobase + 0x4c); in dgnc_cleanup_board()
453 brd->iobase = pci_resource_start(pdev, 1); in dgnc_found_board()
455 brd->iobase = ((unsigned int)(brd->iobase)) & 0xFFFE; in dgnc_found_board()
473 outb(0x43, brd->iobase + 0x4c); in dgnc_found_board()
/linux-4.4.14/drivers/net/ethernet/amd/
Datarilance.c220 struct lance_ioreg *iobase; member
534 IO = lp->iobase = (struct lance_ioreg *)ioaddr; in lance_probe1()
644 struct lance_ioreg *IO = lp->iobase; in lance_open()
733 struct lance_ioreg *IO = lp->iobase; in lance_tx_timeout()
776 struct lance_ioreg *IO = lp->iobase; in lance_start_xmit()
863 IO = lp->iobase; in lance_interrupt()
1051 struct lance_ioreg *IO = lp->iobase; in lance_close()
1078 struct lance_ioreg *IO = lp->iobase; in set_multicast_list()
/linux-4.4.14/drivers/crypto/marvell/
Dcesa.c261 void __iomem *iobase = engine->regs; in mv_cesa_conf_mbus_windows() local
265 writel(0, iobase + CESA_TDMA_WINDOW_CTRL(i)); in mv_cesa_conf_mbus_windows()
266 writel(0, iobase + CESA_TDMA_WINDOW_BASE(i)); in mv_cesa_conf_mbus_windows()
275 iobase + CESA_TDMA_WINDOW_CTRL(i)); in mv_cesa_conf_mbus_windows()
276 writel(cs->base, iobase + CESA_TDMA_WINDOW_BASE(i)); in mv_cesa_conf_mbus_windows()
/linux-4.4.14/arch/powerpc/kernel/
Dlegacy_serial.c130 legacy_serial_ports[index].iobase = base; in add_legacy_port()
340 udbg_uart_init_pio(port->iobase, stride); in setup_legacy_serial_console()
501 index, port->iobase, port->iobase + offset); in fixup_port_pio()
502 port->iobase += offset; in fixup_port_pio()

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