Lines Matching refs:iobase
176 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase);
181 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size);
182 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase);
185 static int nsc_ircc_read_dongle_id (int iobase);
186 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id);
522 int iobase; in nsc_ircc_close() local
526 iobase = self->io.fir_base; in nsc_ircc_close()
988 int iobase = info->fir_base; in nsc_ircc_setup() local
991 switch_bank(iobase, BANK3); in nsc_ircc_setup()
992 version = inb(iobase+MID); in nsc_ircc_setup()
1005 switch_bank(iobase, BANK2); in nsc_ircc_setup()
1006 outb(ECR1_EXT_SL, iobase+ECR1); in nsc_ircc_setup()
1007 switch_bank(iobase, BANK0); in nsc_ircc_setup()
1010 switch_bank(iobase, BANK0); in nsc_ircc_setup()
1011 outb(FCR_RXTH|FCR_TXTH|FCR_TXSR|FCR_RXSR|FCR_FIFO_EN, iobase+FCR); in nsc_ircc_setup()
1013 outb(0x03, iobase+LCR); /* 8 bit word length */ in nsc_ircc_setup()
1014 outb(MCR_SIR, iobase+MCR); /* Start at SIR-mode, also clears LSR*/ in nsc_ircc_setup()
1017 switch_bank(iobase, BANK2); in nsc_ircc_setup()
1018 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2); in nsc_ircc_setup()
1021 switch_bank(iobase, BANK5); in nsc_ircc_setup()
1022 outb(0x02, iobase+4); in nsc_ircc_setup()
1025 switch_bank(iobase, BANK6); in nsc_ircc_setup()
1026 outb(0x20, iobase+0); /* Set 32 bits FIR CRC */ in nsc_ircc_setup()
1027 outb(0x0a, iobase+1); /* Set MIR pulse width */ in nsc_ircc_setup()
1028 outb(0x0d, iobase+2); /* Set SIR pulse width to 1.6us */ in nsc_ircc_setup()
1029 outb(0x2a, iobase+4); /* Set beginning frag, and preamble length */ in nsc_ircc_setup()
1032 switch_bank(iobase, BANK0); in nsc_ircc_setup()
1033 outb(IER_RXHDL_IE, iobase+IER); in nsc_ircc_setup()
1045 static int nsc_ircc_read_dongle_id (int iobase) in nsc_ircc_read_dongle_id() argument
1050 bank = inb(iobase+BSR); in nsc_ircc_read_dongle_id()
1053 switch_bank(iobase, BANK7); in nsc_ircc_read_dongle_id()
1056 outb(0x00, iobase+7); in nsc_ircc_read_dongle_id()
1062 dongle_id = inb(iobase+4) & 0x0f; in nsc_ircc_read_dongle_id()
1069 switch_bank(iobase, BANK0); in nsc_ircc_read_dongle_id()
1071 outb(bank, iobase+BSR); in nsc_ircc_read_dongle_id()
1084 static void nsc_ircc_init_dongle_interface (int iobase, int dongle_id) in nsc_ircc_init_dongle_interface() argument
1089 bank = inb(iobase+BSR); in nsc_ircc_init_dongle_interface()
1092 switch_bank(iobase, BANK7); in nsc_ircc_init_dongle_interface()
1125 outb(0x28, iobase+7); /* Set irsl[0-2] as output */ in nsc_ircc_init_dongle_interface()
1138 outb(0x48, iobase+7); in nsc_ircc_init_dongle_interface()
1141 outb(0x28, iobase+7); /* Set irsl[0-2] as output */ in nsc_ircc_init_dongle_interface()
1147 switch_bank(iobase, BANK0); in nsc_ircc_init_dongle_interface()
1148 outb(0x62, iobase+MCR); in nsc_ircc_init_dongle_interface()
1156 outb(0x00, iobase+4); in nsc_ircc_init_dongle_interface()
1159 outb(bank, iobase+BSR); in nsc_ircc_init_dongle_interface()
1169 static void nsc_ircc_change_dongle_speed(int iobase, int speed, int dongle_id) in nsc_ircc_change_dongle_speed() argument
1174 bank = inb(iobase+BSR); in nsc_ircc_change_dongle_speed()
1177 switch_bank(iobase, BANK7); in nsc_ircc_change_dongle_speed()
1208 outb(0x00, iobase+4); in nsc_ircc_change_dongle_speed()
1210 outb(0x01, iobase+4); in nsc_ircc_change_dongle_speed()
1213 outb(0x01, iobase+4); in nsc_ircc_change_dongle_speed()
1218 outb(0x81, iobase+4); in nsc_ircc_change_dongle_speed()
1219 outb(0x80, iobase+4); in nsc_ircc_change_dongle_speed()
1221 outb(0x00, iobase+4); in nsc_ircc_change_dongle_speed()
1237 switch_bank(iobase, BANK0); in nsc_ircc_change_dongle_speed()
1238 outb(0x62, iobase+MCR); in nsc_ircc_change_dongle_speed()
1244 outb(bank, iobase+BSR); in nsc_ircc_change_dongle_speed()
1258 int iobase; in nsc_ircc_change_speed() local
1266 iobase = self->io.fir_base; in nsc_ircc_change_speed()
1272 bank = inb(iobase+BSR); in nsc_ircc_change_speed()
1275 switch_bank(iobase, BANK0); in nsc_ircc_change_speed()
1276 outb(0, iobase+IER); in nsc_ircc_change_speed()
1279 switch_bank(iobase, BANK2); in nsc_ircc_change_speed()
1281 outb(0x00, iobase+BGDH); in nsc_ircc_change_speed()
1283 case 9600: outb(0x0c, iobase+BGDL); break; in nsc_ircc_change_speed()
1284 case 19200: outb(0x06, iobase+BGDL); break; in nsc_ircc_change_speed()
1285 case 38400: outb(0x03, iobase+BGDL); break; in nsc_ircc_change_speed()
1286 case 57600: outb(0x02, iobase+BGDL); break; in nsc_ircc_change_speed()
1287 case 115200: outb(0x01, iobase+BGDL); break; in nsc_ircc_change_speed()
1289 switch_bank(iobase, BANK5); in nsc_ircc_change_speed()
1292 outb(inb(iobase+4) | 0x04, iobase+4); in nsc_ircc_change_speed()
1313 switch_bank(iobase, BANK0); in nsc_ircc_change_speed()
1314 outb(mcr | MCR_TX_DFR, iobase+MCR); in nsc_ircc_change_speed()
1317 nsc_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id); in nsc_ircc_change_speed()
1320 switch_bank(iobase, BANK0); in nsc_ircc_change_speed()
1321 outb(0x00, iobase+FCR); in nsc_ircc_change_speed()
1322 outb(FCR_FIFO_EN, iobase+FCR); in nsc_ircc_change_speed()
1328 iobase+FCR); in nsc_ircc_change_speed()
1331 switch_bank(iobase, BANK2); in nsc_ircc_change_speed()
1332 outb(EXCR2_RFSIZ|EXCR2_TFSIZ, iobase+EXCR2); in nsc_ircc_change_speed()
1335 switch_bank(iobase, BANK0); in nsc_ircc_change_speed()
1347 outb(ier, iobase+IER); in nsc_ircc_change_speed()
1350 outb(bank, iobase+BSR); in nsc_ircc_change_speed()
1367 int iobase; in nsc_ircc_hard_xmit_sir() local
1375 iobase = self->io.fir_base; in nsc_ircc_hard_xmit_sir()
1411 bank = inb(iobase+BSR); in nsc_ircc_hard_xmit_sir()
1421 switch_bank(iobase, BANK0); in nsc_ircc_hard_xmit_sir()
1422 outb(IER_TXLDL_IE, iobase+IER); in nsc_ircc_hard_xmit_sir()
1425 outb(bank, iobase+BSR); in nsc_ircc_hard_xmit_sir()
1440 int iobase; in nsc_ircc_hard_xmit_fir() local
1446 iobase = self->io.fir_base; in nsc_ircc_hard_xmit_fir()
1484 bank = inb(iobase+BSR); in nsc_ircc_hard_xmit_fir()
1522 switch_bank(iobase, BANK4); in nsc_ircc_hard_xmit_fir()
1523 outb(mtt & 0xff, iobase+TMRL); in nsc_ircc_hard_xmit_fir()
1524 outb((mtt >> 8) & 0x0f, iobase+TMRH); in nsc_ircc_hard_xmit_fir()
1527 outb(IRCR1_TMR_EN, iobase+IRCR1); in nsc_ircc_hard_xmit_fir()
1531 switch_bank(iobase, BANK0); in nsc_ircc_hard_xmit_fir()
1532 outb(IER_TMR_IE, iobase+IER); in nsc_ircc_hard_xmit_fir()
1541 switch_bank(iobase, BANK0); in nsc_ircc_hard_xmit_fir()
1542 outb(IER_DMA_IE, iobase+IER); in nsc_ircc_hard_xmit_fir()
1545 nsc_ircc_dma_xmit(self, iobase); in nsc_ircc_hard_xmit_fir()
1554 outb(bank, iobase+BSR); in nsc_ircc_hard_xmit_fir()
1569 static void nsc_ircc_dma_xmit(struct nsc_ircc_cb *self, int iobase) in nsc_ircc_dma_xmit() argument
1574 bsr = inb(iobase+BSR); in nsc_ircc_dma_xmit()
1577 switch_bank(iobase, BANK0); in nsc_ircc_dma_xmit()
1578 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_xmit()
1583 switch_bank(iobase, BANK2); in nsc_ircc_dma_xmit()
1584 outb(ECR1_DMASWP|ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1); in nsc_ircc_dma_xmit()
1593 switch_bank(iobase, BANK0); in nsc_ircc_dma_xmit()
1594 outb(inb(iobase+MCR)|MCR_TX_DFR|MCR_DMA_EN|MCR_IR_PLS, iobase+MCR); in nsc_ircc_dma_xmit()
1597 outb(bsr, iobase+BSR); in nsc_ircc_dma_xmit()
1607 static int nsc_ircc_pio_write(int iobase, __u8 *buf, int len, int fifo_size) in nsc_ircc_pio_write() argument
1613 bank = inb(iobase+BSR); in nsc_ircc_pio_write()
1615 switch_bank(iobase, BANK0); in nsc_ircc_pio_write()
1616 if (!(inb_p(iobase+LSR) & LSR_TXEMP)) { in nsc_ircc_pio_write()
1627 outb(buf[actual++], iobase+TXD); in nsc_ircc_pio_write()
1634 outb(bank, iobase+BSR); in nsc_ircc_pio_write()
1648 int iobase; in nsc_ircc_dma_xmit_complete() local
1652 iobase = self->io.fir_base; in nsc_ircc_dma_xmit_complete()
1655 bank = inb(iobase+BSR); in nsc_ircc_dma_xmit_complete()
1658 switch_bank(iobase, BANK0); in nsc_ircc_dma_xmit_complete()
1659 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_xmit_complete()
1662 if (inb(iobase+ASCR) & ASCR_TXUR) { in nsc_ircc_dma_xmit_complete()
1667 outb(ASCR_TXUR, iobase+ASCR); in nsc_ircc_dma_xmit_complete()
1678 nsc_ircc_dma_xmit(self, iobase); in nsc_ircc_dma_xmit_complete()
1697 outb(bank, iobase+BSR); in nsc_ircc_dma_xmit_complete()
1711 int iobase; in nsc_ircc_dma_receive() local
1714 iobase = self->io.fir_base; in nsc_ircc_dma_receive()
1721 bsr = inb(iobase+BSR); in nsc_ircc_dma_receive()
1724 switch_bank(iobase, BANK0); in nsc_ircc_dma_receive()
1725 outb(inb(iobase+MCR) & ~MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_receive()
1728 switch_bank(iobase, BANK2); in nsc_ircc_dma_receive()
1729 outb(ECR1_DMANF|ECR1_EXT_SL, iobase+ECR1); in nsc_ircc_dma_receive()
1735 switch_bank(iobase, BANK0); in nsc_ircc_dma_receive()
1736 outb(FCR_RXSR|FCR_FIFO_EN, iobase+FCR); in nsc_ircc_dma_receive()
1745 switch_bank(iobase, BANK0); in nsc_ircc_dma_receive()
1746 outb(inb(iobase+MCR)|MCR_DMA_EN, iobase+MCR); in nsc_ircc_dma_receive()
1749 outb(bsr, iobase+BSR); in nsc_ircc_dma_receive()
1761 static int nsc_ircc_dma_receive_complete(struct nsc_ircc_cb *self, int iobase) in nsc_ircc_dma_receive_complete() argument
1772 bank = inb(iobase+BSR); in nsc_ircc_dma_receive_complete()
1775 switch_bank(iobase, BANK5); in nsc_ircc_dma_receive_complete()
1776 while ((status = inb(iobase+FRM_ST)) & FRM_ST_VLD) { in nsc_ircc_dma_receive_complete()
1778 len = inb(iobase+RFLFL) | ((inb(iobase+RFLFH) & 0x1f) << 8); in nsc_ircc_dma_receive_complete()
1835 switch_bank(iobase, BANK0); in nsc_ircc_dma_receive_complete()
1836 if (inb(iobase+LSR) & LSR_RXDA) { in nsc_ircc_dma_receive_complete()
1848 switch_bank(iobase, BANK4); in nsc_ircc_dma_receive_complete()
1849 outb(0x02, iobase+TMRL); /* x 125 us */ in nsc_ircc_dma_receive_complete()
1850 outb(0x00, iobase+TMRH); in nsc_ircc_dma_receive_complete()
1853 outb(IRCR1_TMR_EN, iobase+IRCR1); in nsc_ircc_dma_receive_complete()
1856 outb(bank, iobase+BSR); in nsc_ircc_dma_receive_complete()
1874 outb(bank, iobase+BSR); in nsc_ircc_dma_receive_complete()
1907 outb(bank, iobase+BSR); in nsc_ircc_dma_receive_complete()
1921 int iobase; in nsc_ircc_pio_receive() local
1923 iobase = self->io.fir_base; in nsc_ircc_pio_receive()
1927 byte = inb(iobase+RXD); in nsc_ircc_pio_receive()
1930 } while (inb(iobase+LSR) & LSR_RXDA); /* Data available */ in nsc_ircc_pio_receive()
2004 static void nsc_ircc_fir_interrupt(struct nsc_ircc_cb *self, int iobase, in nsc_ircc_fir_interrupt() argument
2009 bank = inb(iobase+BSR); in nsc_ircc_fir_interrupt()
2014 if (nsc_ircc_dma_receive_complete(self, iobase)) { in nsc_ircc_fir_interrupt()
2022 switch_bank(iobase, BANK4); in nsc_ircc_fir_interrupt()
2023 outb(0, iobase+IRCR1); in nsc_ircc_fir_interrupt()
2026 switch_bank(iobase, BANK0); in nsc_ircc_fir_interrupt()
2027 outb(ASCR_CTE, iobase+ASCR); in nsc_ircc_fir_interrupt()
2031 nsc_ircc_dma_xmit(self, iobase); in nsc_ircc_fir_interrupt()
2037 if (nsc_ircc_dma_receive_complete(self, iobase)) { in nsc_ircc_fir_interrupt()
2075 outb(bank, iobase+BSR); in nsc_ircc_fir_interrupt()
2089 int iobase; in nsc_ircc_interrupt() local
2095 iobase = self->io.fir_base; in nsc_ircc_interrupt()
2097 bsr = inb(iobase+BSR); /* Save current bank */ in nsc_ircc_interrupt()
2099 switch_bank(iobase, BANK0); in nsc_ircc_interrupt()
2100 self->ier = inb(iobase+IER); in nsc_ircc_interrupt()
2101 eir = inb(iobase+EIR) & self->ier; /* Mask out the interesting ones */ in nsc_ircc_interrupt()
2103 outb(0, iobase+IER); /* Disable interrupts */ in nsc_ircc_interrupt()
2108 nsc_ircc_fir_interrupt(self, iobase, eir); in nsc_ircc_interrupt()
2113 outb(self->ier, iobase+IER); /* Restore interrupts */ in nsc_ircc_interrupt()
2114 outb(bsr, iobase+BSR); /* Restore bank register */ in nsc_ircc_interrupt()
2130 int iobase; in nsc_ircc_is_receiving() local
2138 iobase = self->io.fir_base; in nsc_ircc_is_receiving()
2141 bank = inb(iobase+BSR); in nsc_ircc_is_receiving()
2142 switch_bank(iobase, BANK2); in nsc_ircc_is_receiving()
2143 if ((inb(iobase+RXFLV) & 0x3f) != 0) { in nsc_ircc_is_receiving()
2147 outb(bank, iobase+BSR); in nsc_ircc_is_receiving()
2165 int iobase; in nsc_ircc_net_open() local
2175 iobase = self->io.fir_base; in nsc_ircc_net_open()
2194 bank = inb(iobase+BSR); in nsc_ircc_net_open()
2197 switch_bank(iobase, BANK0); in nsc_ircc_net_open()
2198 outb(IER_LS_IE | IER_RXHDL_IE, iobase+IER); in nsc_ircc_net_open()
2201 outb(bank, iobase+BSR); in nsc_ircc_net_open()
2227 int iobase; in nsc_ircc_net_close() local
2244 iobase = self->io.fir_base; in nsc_ircc_net_close()
2249 bank = inb(iobase+BSR); in nsc_ircc_net_close()
2252 switch_bank(iobase, BANK0); in nsc_ircc_net_close()
2253 outb(0, iobase+IER); in nsc_ircc_net_close()
2259 outb(bank, iobase+BSR); in nsc_ircc_net_close()
2317 int iobase = self->io.fir_base; in nsc_ircc_suspend() local
2329 bank = inb(iobase+BSR); in nsc_ircc_suspend()
2332 switch_bank(iobase, BANK0); in nsc_ircc_suspend()
2333 outb(0, iobase+IER); in nsc_ircc_suspend()
2336 outb(bank, iobase+BSR); in nsc_ircc_suspend()