Searched refs:cr0 (Results 1 - 133 of 133) sorted by relevance

/linux-4.4.14/arch/score/include/asm/
H A Dirqflags.h13 " mfcr r8, cr0 \n" arch_local_save_flags()
35 " mfcr r8, cr0 \n" arch_local_irq_save()
40 " mtcr r8, cr0 \n" arch_local_irq_save()
56 " mfcr r8, cr0 \n" arch_local_irq_restore()
60 " mtcr r8, cr0 \n" arch_local_irq_restore()
74 " mfcr r8,cr0 \n" arch_local_irq_enable()
78 " mtcr r8,cr0 \n" arch_local_irq_enable()
92 " mfcr r8,cr0 \n" arch_local_irq_disable()
97 " mtcr r8,cr0 \n" arch_local_irq_disable()
H A Dasmmacro.h9 mfcr r30, cr0
66 mfcr r31, cr0
82 mfcr r30, cr0
85 mtcr r30, cr0
100 mtcr r31, cr0
/linux-4.4.14/arch/arm/include/asm/
H A Dvfpmacros.h12 MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg variable
16 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd variable
22 LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15} variable
24 LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
31 ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31} variable
37 ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
46 STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15} variable
48 STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15}
55 stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31} variable
61 stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
H A Dvfp.h11 #define FPSID cr0
/linux-4.4.14/arch/x86/boot/
H A Dcpuflags.c17 unsigned long cr0; has_fpu() local
19 asm volatile("mov %%cr0,%0" : "=r" (cr0)); has_fpu()
20 if (cr0 & (X86_CR0_EM|X86_CR0_TS)) { has_fpu()
21 cr0 &= ~(X86_CR0_EM|X86_CR0_TS); has_fpu()
22 asm volatile("mov %0,%%cr0" : : "r" (cr0)); has_fpu()
/linux-4.4.14/arch/s390/include/asm/fpu/
H A Dinternal.h17 unsigned long cr0, flags; save_vx_regs_safe() local
20 __ctl_store(cr0, 0, 0); save_vx_regs_safe()
28 __ctl_load(cr0, 0, 0); save_vx_regs_safe()
/linux-4.4.14/arch/powerpc/kernel/
H A Dcpu_setup_6xx.S191 cmpwi cr0,r10,7
194 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
195 cror 4*cr0+eq,4*cr0+eq,4*cr2+eq
335 cmplwi cr0,r3,0x8000 /* 7450 */
345 /* cr0 is 74xx */
346 cror 4*cr0+eq,4*cr0+eq,4*cr3+eq
347 cror 4*cr0+eq,4*cr0+eq,4*cr4+eq
348 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
349 cror 4*cr0+eq,4*cr0+eq,4*cr5+eq
350 cror 4*cr0+eq,4*cr0+eq,4*cr7+eq
375 cmpwi cr0,r3,0x0200
406 cmplwi cr0,r3,0x8000 /* 7450 */
416 /* cr0 is 74xx */
417 cror 4*cr0+eq,4*cr0+eq,4*cr3+eq
418 cror 4*cr0+eq,4*cr0+eq,4*cr4+eq
419 cror 4*cr0+eq,4*cr0+eq,4*cr1+eq
420 cror 4*cr0+eq,4*cr0+eq,4*cr5+eq
421 cror 4*cr0+eq,4*cr0+eq,4*cr7+eq
468 cmpwi cr0,r3,0x0200
482 cmplwi cr0,r6,10000
H A Didle_power4.S41 cmpwi cr0,r0,0
H A Didle_book3e.S37 cmpwi cr0,r3,0
H A Dentry_64.S794 cmpwi cr0,r5,0
798 cmpwi cr0,r6,1
799 beq cr0,do_restore
807 cmpwi cr0,r0,0
941 cmpwi cr0,r3,0
958 cmpwi cr0,r3,0x500
963 1: cmpwi cr0,r3,0xe60
968 1: cmpwi cr0,r3,0x900
976 cmpwi cr0,r3,0x280
979 cmpwi cr0,r3,0xe80
981 cmpwi cr0,r3,0xa00
H A Dhead_8xx.S59 cmpli cr0, tmp, PAGE_OFFSET >> 16
182 * Note: code which follows this uses cr0.eq (set if from kernel),
488 cmpwi cr0, r11, RPN_PATTERN
552 cmpwi cr0, r10, 2028 /* Is dcbz? */
554 cmpwi cr0, r10, 940 /* Is dcbi? */
556 cmpwi cr0, r10, 108 /* Is dcbst? */
558 cmpwi cr0, r10, 172 /* Is dcbf? */
560 cmpwi cr0, r10, 1964 /* Is icbi? */
H A Dmisc_32.S182 cmplwi cr0,r3,0
207 cmplwi cr0,r3,0
571 crclr 4*cr0+eq
593 crnot 4*cr0+eq,4*cr0+eq
746 cmplwi cr0,r3,PVR_476@h
748 cmplwi cr0,r3,PVR_476_ISS@h
H A Didle_power7.S47 1: cmp cr0,r0,r0; \
109 cmpwi cr0,r4,0
178 * If cr0 = 0, then current thread is the last thread of the core entering
H A Dexceptions-64e.S215 cmpwi cr0,r5,0
355 cmpwi cr0,r10,0; /* yes -> go out of line */ \
389 ACCOUNT_CPU_USER_ENTRY(r10,r11);/* accounting (uses cr0+eq) */ \
740 cmpld cr0,r10,r14
742 blt+ cr0,1f
804 cmpld cr0,r10,r14
806 blt+ cr0,1f
995 cmpwi cr0,r3,0x500
997 cmpwi cr0,r3,0x900
999 cmpwi cr0,r3,0x280
1577 cmpdi cr0,r28,0
H A Dhead_44x.S567 cmplw cr0,r10,r11
664 cmplw cr0,r10,r11
812 cmplwi cr0,r3,PVR_476FPE@h
814 cmplwi cr0,r3,PVR_476@h
816 cmplwi cr0,r3,PVR_476_ISS@h
H A Dhead_32.S38 /* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
294 * Note: code which follows this uses cr0.eq (set if from kernel),
1020 cmpwi cr0,r3,0
1180 cmpwi cr0,r8,0
H A Dhead_64.S381 cmpldi cr0,r5,0
467 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
507 cmplwi cr0,r7,1
H A Dentry_32.S130 * Note that we rely on the caller having set cr0.eq iff the exception
392 cmplwi cr0,r5,0
853 cmplwi cr0,r5,0
H A Dl2cr_6xx.S410 * clobbers r0, r3, ctr, cr0
H A Dexceptions-64s.S1510 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
/linux-4.4.14/arch/powerpc/kernel/vdso32/
H A Dgettimeofday.S60 crclr cr0*4+so
75 cmpli cr0,r3,CLOCK_REALTIME
77 cror cr0*4+eq,cr0*4+eq,cr1*4+eq
78 bne cr0,99f
111 cmpl cr0,r8,r0 /* check if updated */
120 cmpw cr0,r4,r7
133 crclr cr0*4+so
157 cmpwi cr0,r3,CLOCK_REALTIME
159 cror cr0*4+eq,cr0*4+eq,cr1*4+eq
160 bne cr0,99f
163 cmpli cr0,r4,0
164 crclr cr0*4+so
204 crclr cr0*4+so
217 * This clobbers cr0 but not any other cr field.
244 cmplw cr0,r3,r0
292 cmplw cr0,r8,r0 /* check if updated */
H A Ddatapage.S62 cmpli cr0,r4,0
66 crclr cr0*4+so
84 crclr cr0*4+so
/linux-4.4.14/arch/powerpc/lib/
H A Dmemcmp_64.S110 cmpld cr0,rA,rB
128 bne cr0,.LcmpAB
132 cmpld cr0,rA,rB
155 bne cr0,.LcmpAB
159 cmpld cr0,rA,rB
175 bne cr0,.LcmpAB
197 bne cr0,.LcmpAB
206 bgt cr0,.Lout
H A Dcopyuser_64.S35 crand cr0*4+2,cr0*4+2,cr6*4+2
H A Dcopy_32.S153 crand 0,0,4 /* cr0.lt &= cr1.lt */
/linux-4.4.14/tools/testing/selftests/powerpc/stringloops/
H A Dmemcmp_64.S110 cmpld cr0,rA,rB
128 bne cr0,.LcmpAB
132 cmpld cr0,rA,rB
155 bne cr0,.LcmpAB
159 cmpld cr0,rA,rB
175 bne cr0,.LcmpAB
197 bne cr0,.LcmpAB
206 bgt cr0,.Lout
/linux-4.4.14/arch/x86/include/asm/
H A Dlguest.h75 u32 cr0; lguest_set_ts() local
77 cr0 = read_cr0(); lguest_set_ts()
78 if (!(cr0 & 8)) lguest_set_ts()
79 write_cr0(cr0 | 8); lguest_set_ts()
H A Dsuspend_32.h15 unsigned long cr0, cr2, cr3, cr4; member in struct:saved_context
H A Dsuspend_64.h24 unsigned long cr0, cr2, cr3, cr4, cr8; member in struct:saved_context
H A Dcmpxchg_32.h17 * least an FPU save and/or %cr0.ts manipulation.
H A Dirqflags.h143 #define GET_CR0_INTO_EAX movl %cr0, %eax
H A Dspecial_insns.h26 asm volatile("mov %%cr0,%0\n\t" : "=r" (val), "=m" (__force_order)); native_read_cr0()
32 asm volatile("mov %0,%%cr0": : "r" (val), "m" (__force_order)); native_write_cr0()
H A Dsvm.h156 u64 cr0; member in struct:vmcb_save_area
H A Dkvm_host.h392 unsigned long cr0; member in struct:kvm_vcpu_arch
794 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
1024 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
/linux-4.4.14/arch/s390/lib/
H A Ddelay.c35 unsigned long cr0, cr0_new, psw_mask; __udelay_disabled() local
40 __ctl_store(cr0, 0, 0); __udelay_disabled()
41 cr0_new = cr0 & ~CR0_IRQ_SUBCLASS_MASK; __udelay_disabled()
50 __ctl_load(cr0, 0, 0); __udelay_disabled()
/linux-4.4.14/arch/arm/include/asm/hardware/
H A Dssp.h14 unsigned int cr0; member in struct:ssp_state
/linux-4.4.14/drivers/input/touchscreen/
H A Dmc13783_ts.c75 int cr0, cr1; mc13783_ts_report_sample() local
87 cr0 = (priv->sample[2] >> 12) & 0xfff; mc13783_ts_report_sample()
92 x0, x1, x2, y0, y1, y2, cr0, cr1); mc13783_ts_report_sample()
97 cr0 = (cr0 + cr1) / 2; mc13783_ts_report_sample()
99 if (!cr0 || !sample_tolerance || mc13783_ts_report_sample()
103 if (cr0) { mc13783_ts_report_sample()
108 x1, y1, 0x1000 - cr0); mc13783_ts_report_sample()
114 cr0 ? 0x1000 - cr0 : cr0); mc13783_ts_report_sample()
115 input_report_key(idev, BTN_TOUCH, cr0); mc13783_ts_report_sample()
/linux-4.4.14/arch/powerpc/net/
H A Dbpf_jit_asm.S45 /* Nope, just hitting the header. cr0 here is eq or gt! */
51 blr /* Return success, cr0 != LT */
123 blt bpf_error; /* cr0 = LT */ \
129 /* Data value is on stack, and cr0 != LT */
175 beq bpf_error_slow; /* cr0 = EQ */ \
183 blt bpf_error /* cr0 = LT */
193 blt bpf_error /* cr0 = LT */
203 blt bpf_error /* cr0 = LT */
213 blt bpf_error /* cr0 = LT */
222 /* fabricate a cr0 = lt */
226 /* Entered with cr0 = lt */
H A Dbpf_jit.h291 /* To create a branch condition, select a bit of cr0... */
H A Dbpf_jit_comp.c451 /* If error, cr0.LT set */ bpf_jit_build_body()
/linux-4.4.14/arch/arm/probes/kprobes/
H A Dtest-arm.c1180 TEST_COPROCESSOR("stc"two" 0, cr0, [r13, #4]") \ kprobe_arm_test_cases()
1181 TEST_COPROCESSOR("stc"two" 0, cr0, [r13, #-4]") \ kprobe_arm_test_cases()
1182 TEST_COPROCESSOR("stc"two" 0, cr0, [r13, #4]!") \ kprobe_arm_test_cases()
1183 TEST_COPROCESSOR("stc"two" 0, cr0, [r13, #-4]!") \ kprobe_arm_test_cases()
1184 TEST_COPROCESSOR("stc"two" 0, cr0, [r13], #4") \ kprobe_arm_test_cases()
1185 TEST_COPROCESSOR("stc"two" 0, cr0, [r13], #-4") \ kprobe_arm_test_cases()
1186 TEST_COPROCESSOR("stc"two" 0, cr0, [r13], {1}") \ kprobe_arm_test_cases()
1187 TEST_COPROCESSOR("stc"two"l 0, cr0, [r13, #4]") \ kprobe_arm_test_cases()
1188 TEST_COPROCESSOR("stc"two"l 0, cr0, [r13, #-4]") \ kprobe_arm_test_cases()
1189 TEST_COPROCESSOR("stc"two"l 0, cr0, [r13, #4]!") \ kprobe_arm_test_cases()
1190 TEST_COPROCESSOR("stc"two"l 0, cr0, [r13, #-4]!") \ kprobe_arm_test_cases()
1191 TEST_COPROCESSOR("stc"two"l 0, cr0, [r13], #4") \ kprobe_arm_test_cases()
1192 TEST_COPROCESSOR("stc"two"l 0, cr0, [r13], #-4") \ kprobe_arm_test_cases()
1193 TEST_COPROCESSOR("stc"two"l 0, cr0, [r13], {1}") \ kprobe_arm_test_cases()
1194 TEST_COPROCESSOR("ldc"two" 0, cr0, [r13, #4]") \ kprobe_arm_test_cases()
1195 TEST_COPROCESSOR("ldc"two" 0, cr0, [r13, #-4]") \ kprobe_arm_test_cases()
1196 TEST_COPROCESSOR("ldc"two" 0, cr0, [r13, #4]!") \ kprobe_arm_test_cases()
1197 TEST_COPROCESSOR("ldc"two" 0, cr0, [r13, #-4]!") \ kprobe_arm_test_cases()
1198 TEST_COPROCESSOR("ldc"two" 0, cr0, [r13], #4") \ kprobe_arm_test_cases()
1199 TEST_COPROCESSOR("ldc"two" 0, cr0, [r13], #-4") \ kprobe_arm_test_cases()
1200 TEST_COPROCESSOR("ldc"two" 0, cr0, [r13], {1}") \ kprobe_arm_test_cases()
1201 TEST_COPROCESSOR("ldc"two"l 0, cr0, [r13, #4]") \ kprobe_arm_test_cases()
1202 TEST_COPROCESSOR("ldc"two"l 0, cr0, [r13, #-4]") \ kprobe_arm_test_cases()
1203 TEST_COPROCESSOR("ldc"two"l 0, cr0, [r13, #4]!") \ kprobe_arm_test_cases()
1204 TEST_COPROCESSOR("ldc"two"l 0, cr0, [r13, #-4]!") \ kprobe_arm_test_cases()
1205 TEST_COPROCESSOR("ldc"two"l 0, cr0, [r13], #4") \ kprobe_arm_test_cases()
1206 TEST_COPROCESSOR("ldc"two"l 0, cr0, [r13], #-4") \ kprobe_arm_test_cases()
1207 TEST_COPROCESSOR("ldc"two"l 0, cr0, [r13], {1}") \ kprobe_arm_test_cases()
1209 TEST_COPROCESSOR( "stc"two" 0, cr0, [r15, #4]") \ kprobe_arm_test_cases()
1210 TEST_COPROCESSOR( "stc"two" 0, cr0, [r15, #-4]") \ kprobe_arm_test_cases()
1211 TEST_UNSUPPORTED(__inst_arm(0x##cc##daf0001) " @ stc"two" 0, cr0, [r15, #4]!") \ kprobe_arm_test_cases()
1212 TEST_UNSUPPORTED(__inst_arm(0x##cc##d2f0001) " @ stc"two" 0, cr0, [r15, #-4]!") \ kprobe_arm_test_cases()
1213 TEST_UNSUPPORTED(__inst_arm(0x##cc##caf0001) " @ stc"two" 0, cr0, [r15], #4") \ kprobe_arm_test_cases()
1214 TEST_UNSUPPORTED(__inst_arm(0x##cc##c2f0001) " @ stc"two" 0, cr0, [r15], #-4") \ kprobe_arm_test_cases()
1215 TEST_COPROCESSOR( "stc"two" 0, cr0, [r15], {1}") \ kprobe_arm_test_cases()
1216 TEST_COPROCESSOR( "stc"two"l 0, cr0, [r15, #4]") \ kprobe_arm_test_cases()
1217 TEST_COPROCESSOR( "stc"two"l 0, cr0, [r15, #-4]") \ kprobe_arm_test_cases()
1218 TEST_UNSUPPORTED(__inst_arm(0x##cc##def0001) " @ stc"two"l 0, cr0, [r15, #4]!") \ kprobe_arm_test_cases()
1219 TEST_UNSUPPORTED(__inst_arm(0x##cc##d6f0001) " @ stc"two"l 0, cr0, [r15, #-4]!") \ kprobe_arm_test_cases()
1220 TEST_UNSUPPORTED(__inst_arm(0x##cc##cef0001) " @ stc"two"l 0, cr0, [r15], #4") \ kprobe_arm_test_cases()
1221 TEST_UNSUPPORTED(__inst_arm(0x##cc##c6f0001) " @ stc"two"l 0, cr0, [r15], #-4") \ kprobe_arm_test_cases()
1222 TEST_COPROCESSOR( "stc"two"l 0, cr0, [r15], {1}") \ kprobe_arm_test_cases()
1223 TEST_COPROCESSOR( "ldc"two" 0, cr0, [r15, #4]") \ kprobe_arm_test_cases()
1224 TEST_COPROCESSOR( "ldc"two" 0, cr0, [r15, #-4]") \ kprobe_arm_test_cases()
1225 TEST_UNSUPPORTED(__inst_arm(0x##cc##dbf0001) " @ ldc"two" 0, cr0, [r15, #4]!") \ kprobe_arm_test_cases()
1226 TEST_UNSUPPORTED(__inst_arm(0x##cc##d3f0001) " @ ldc"two" 0, cr0, [r15, #-4]!") \ kprobe_arm_test_cases()
1227 TEST_UNSUPPORTED(__inst_arm(0x##cc##cbf0001) " @ ldc"two" 0, cr0, [r15], #4") \ kprobe_arm_test_cases()
1228 TEST_UNSUPPORTED(__inst_arm(0x##cc##c3f0001) " @ ldc"two" 0, cr0, [r15], #-4") \ kprobe_arm_test_cases()
1229 TEST_COPROCESSOR( "ldc"two" 0, cr0, [r15], {1}") \ kprobe_arm_test_cases()
1230 TEST_COPROCESSOR( "ldc"two"l 0, cr0, [r15, #4]") \ kprobe_arm_test_cases()
1231 TEST_COPROCESSOR( "ldc"two"l 0, cr0, [r15, #-4]") \ kprobe_arm_test_cases()
1232 TEST_UNSUPPORTED(__inst_arm(0x##cc##dff0001) " @ ldc"two"l 0, cr0, [r15, #4]!") \ kprobe_arm_test_cases()
1233 TEST_UNSUPPORTED(__inst_arm(0x##cc##d7f0001) " @ ldc"two"l 0, cr0, [r15, #-4]!") \ kprobe_arm_test_cases()
1234 TEST_UNSUPPORTED(__inst_arm(0x##cc##cff0001) " @ ldc"two"l 0, cr0, [r15], #4") \ kprobe_arm_test_cases()
1235 TEST_UNSUPPORTED(__inst_arm(0x##cc##c7f0001) " @ ldc"two"l 0, cr0, [r15], #-4") \ kprobe_arm_test_cases()
1236 TEST_COPROCESSOR( "ldc"two"l 0, cr0, [r15], {1}") kprobe_arm_test_cases()
1240 TEST_COPROCESSOR( "mcrr"two" 0, 15, r0, r14, cr0") \ kprobe_arm_test_cases()
1242 TEST_UNSUPPORTED(__inst_arm(0x##cc##c4f00f0) " @ mcrr"two" 0, 15, r0, r15, cr0") \ kprobe_arm_test_cases()
1244 TEST_COPROCESSOR( "mrrc"two" 0, 15, r0, r14, cr0") \ kprobe_arm_test_cases()
1246 TEST_UNSUPPORTED(__inst_arm(0x##cc##c5f00f0) " @ mrrc"two" 0, 15, r0, r15, cr0") \ kprobe_arm_test_cases()
1249 TEST_COPROCESSOR( "cdp"two" 0, 0, cr0, cr0, cr0, 0") \ kprobe_arm_test_cases()
1251 TEST_COPROCESSOR( "mcr"two" 0, 0, r0, cr0, cr0, 0") \ kprobe_arm_test_cases()
1253 TEST_COPROCESSOR( "mrc"two" 0, 0, r0, cr0, cr0, 0") kprobe_arm_test_cases()
/linux-4.4.14/arch/x86/realmode/rm/
H A Dreboot.S30 movl %cr0, %eax
32 movl %eax, %cr0
96 movl %cr0, %edx
99 movl %edx, %cr0
101 movl %cr0, %edx
107 movl %edx, %cr0
H A Dwakeup_asm.S23 pmode_cr0: .long 0 /* Saved %cr0 */
51 movl %cr0, %eax
53 movl %eax, %cr0
63 movl %eax, %cr0
131 movl %ecx, %cr0
H A Dwakeup.h17 u32 pmode_cr0; /* Protected mode cr0 */
H A Dtrampoline_64.S74 movl %eax, %cr0 # into protected mode
110 movl %eax, %cr0
/linux-4.4.14/arch/powerpc/kernel/vdso64/
H A Ddatapage.S62 cmpli cr0,r4,0
63 crclr cr0*4+so
84 crclr cr0*4+so
/linux-4.4.14/arch/x86/platform/efi/
H A Defi_stub_32.S62 movl %cr0, %edx
64 movl %edx, %cr0
88 movl %cr0, %edx
90 movl %edx, %cr0
H A Defi_stub_64.S20 mov %cr0, %rax; \
38 mov %rsi, %cr0; \
/linux-4.4.14/arch/s390/kernel/
H A Dsclp.c16 unsigned long cr0, cr0_new, psw_mask, addr; _sclp_wait_int() local
19 __ctl_store(cr0, 0, 0); _sclp_wait_int()
20 cr0_new = cr0 | 0x200; _sclp_wait_int()
43 __ctl_load(cr0, 0, 0); _sclp_wait_int()
H A Dnmi.c161 union ctlreg0 cr0; s390_validate_registers() local
170 cr0.val = S390_lowcore.cregs_save_area[0]; s390_validate_registers()
171 cr0.afp = cr0.vx = 1; s390_validate_registers()
172 __ctl_load(cr0.val, 0, 0); s390_validate_registers()
H A Dearly.c251 unsigned long cr0, cr0_new; early_pgm_check_handler() local
259 __ctl_store(cr0, 0, 0); early_pgm_check_handler()
260 cr0_new = cr0 & ~(1UL << 28); early_pgm_check_handler()
263 __ctl_load(cr0, 0, 0); early_pgm_check_handler()
H A Dhead64.S52 .Lctl: .quad 0x04040000 # cr0: AFP registers & secondary space
H A Dperf_cpum_cf.c694 /* clear bit 15 of cr0 to unauthorize problem-state to cpumf_pmu_init()
/linux-4.4.14/arch/x86/platform/olpc/
H A Dxo1-wakeup.S32 movl %eax, %cr0
66 movl %cr0, %edx
/linux-4.4.14/arch/powerpc/mm/
H A Dtlb_low_64e.S147 cmpldi cr0,r14,0
165 cmpdi cr0,r14,0
172 cmpdi cr0,r14,0
178 cmpdi cr0,r14,0
224 cmpldi cr0,r15,8 /* Check for vmalloc region */
256 cmpldi cr0,r15,0 /* Check for user region */
309 crmove cr2*4+2,cr0*4+2 /* cr2.eq != 0 if kernel address */
403 cmpldi cr0,r14,0
410 cmpdi cr0,r14,0
416 cmpdi cr0,r14,0
421 cmpdi cr0,r14,0
552 cmpldi cr0,r15,0xc /* linear mapping ? */
573 cmpldi cr0,r15,0 /* Check for user region */
597 cmpldi cr0,r15,8 /* Check for vmalloc region */
628 cmpldi cr0,r15,0xc /* linear mapping ? */
637 cmpldi cr0,r15,0 /* Check for user region */
645 cmpldi cr0,r15,8 /* Check for vmalloc region */
728 cmpldi cr0,r11,BOOK3E_PAGESZ_64K
730 cmpldi cr0,r11,BOOK3E_PAGESZ_4K
842 cmpldi cr0,r15,0
849 cmpdi cr0,r15,0
857 cmpdi cr0,r15,0
865 cmpdi cr0,r15,0
913 cmpldi cr0,r10,PACA_EXTLB+EX_TLB_SIZE
945 cmpldi cr0,r10,PACA_EXTLB+EX_TLB_SIZE
953 cmpdi cr0,r16,-1
992 cmpldi cr0,r11,0xc /* linear mapping ? */
998 cmpldi cr0,r11,0 /* Check for user region */
1004 cmpldi cr0,r11,8 /* Check for vmalloc region */
1036 cmpldi cr0,r11,0xc /* linear mapping ? */
1042 cmpldi cr0,r11,0 /* Check for user region */
1048 cmpldi cr0,r11,8 /* Check for vmalloc region */
1091 cmpldi cr0,r15,0
1098 cmpdi cr0,r15,0
1106 cmpdi cr0,r15,0
1114 cmpdi cr0,r15,0
1168 cmpdi cr0,r14,-1
1213 cmpld cr0,r16,r10
1257 cmpdi cr0,r14,-1
H A Dslb_low.S81 cmpldi cr0,r9,0xf
202 crnot 4*cr0+eq,4*cr0+eq
210 cmpldi cr0,r9,0
214 cmpldi cr0,r9,0
218 cmpldi cr0,r9,0
279 crclr 4*cr0+eq /* set result to "success" */
298 crclr 4*cr0+eq /* set result to "success" */
H A Dhash_low_32.S288 * This procedure modifies r0, r3 - r6, r8, cr0.
365 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
386 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
438 cmpl cr0,r0,r6 /* compare and try again */
592 bdnzf 2,1b /* loop while ctr != 0 && !cr0.eq */
H A Dtlb_nohash_low.S354 cmpwi cr0,r6,0
369 cmpwi cr0,r6,0
/linux-4.4.14/arch/x86/kernel/
H A Drelocate_kernel_32.S53 movl %cr0, %eax
106 * Set cr0 to a known state:
114 movl %cr0, %eax
117 movl %eax, %cr0
188 movl %cr0, %eax
190 movl %eax, %cr0
203 movl %eax, %cr0
H A Drelocate_kernel_64.S63 movq %cr0, %rax
109 * Set cr0 to a known state:
117 movq %cr0, %rax
120 movq %rax, %cr0
200 movq %r8, %cr0
H A Dasm-offsets_64.c53 ENTRY(cr0); main()
H A Dprocess_32.c71 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L; __show_regs() local
101 cr0 = read_cr0(); __show_regs()
106 cr0, cr2, cr3, cr4); __show_regs()
H A Dhead_32.S324 movl %eax,%cr0
400 movl %eax,%cr0 /* ..and set paging (PG) bit */
448 movl %cr0,%eax
451 movl %eax,%cr0
H A Dprocess_64.c60 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L, fs, gs, shadowgs; __show_regs() local
93 cr0 = read_cr0(); __show_regs()
101 es, cr0); __show_regs()
H A Dhead_64.S214 /* Setup cr0 */
220 movq %rax, %cr0
/linux-4.4.14/arch/x86/kernel/fpu/
H A Dinit.c26 unsigned long cr0; fpu__init_cpu_generic() local
36 cr0 = read_cr0(); fpu__init_cpu_generic()
37 cr0 &= ~(X86_CR0_TS|X86_CR0_EM); /* clear TS and EM */ fpu__init_cpu_generic()
39 cr0 |= X86_CR0_EM; fpu__init_cpu_generic()
40 write_cr0(cr0); fpu__init_cpu_generic()
69 unsigned long cr0; fpu__init_system_early_generic() local
74 cr0 = read_cr0(); fpu__init_system_early_generic()
75 cr0 &= ~(X86_CR0_TS | X86_CR0_EM); fpu__init_system_early_generic()
76 write_cr0(cr0); fpu__init_system_early_generic()
/linux-4.4.14/arch/x86/boot/compressed/
H A Defi_thunk_64.S125 movl %cr0, %eax
127 movl %eax, %cr0
170 movl %cr0, %eax
172 movl %eax, %cr0
H A Dhead_64.S194 movl %eax, %cr0
/linux-4.4.14/arch/powerpc/include/asm/
H A Dedac.h36 : "cr0", "memory"); edac_atomic_scrub()
H A Dfutex.h32 : "cr0", "memory")
H A Dirqflags.h51 cmpwi cr0,__rA,0; \
H A Dspinlock.h85 : "cr0", "memory"); __arch_spin_trylock()
213 : "cr0", "xer", "memory"); __arch_read_trylock()
237 : "cr0", "memory"); __arch_write_trylock()
294 : "cr0", "xer", "memory"); arch_read_unlock()
H A Dicswx.h178 : "cr0", "memory"); icswx()
H A Dppc_asm.h62 andi. r10,r12,MSR_PR; /* Restore cr0 (coming from user) */ \
551 #define cr0 0 macro
/linux-4.4.14/arch/powerpc/sysdev/
H A Ddcr-low.S17 cmpli cr0,r3,1024; \
/linux-4.4.14/arch/arm/vfp/
H A Dvfpinstr.h76 asm("mrc p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmrx %0, " #_vfp_ \
82 asm("mcr p10, 7, %0, " vfpreg(_vfp_) ", cr0, 0 @ fmxr " #_vfp_ ", %0" \
/linux-4.4.14/arch/arm/mach-mvebu/
H A Dpmsu_ll.S19 mrc 15, 0, r0, cr0, cr0, 5 @ get the CPU ID
H A Dcoherency_ll.S69 mrc 15, 0, r3, cr0, cr0, 5
/linux-4.4.14/arch/score/kernel/
H A Dentry.S38 mfcr r8, cr0
41 mtcr r8, cr0
53 mfcr r8, cr0
55 mtcr r8, cr0
376 mfcr r9, cr0
391 mfcr r9, cr0
399 mtcr r6, cr0
/linux-4.4.14/arch/x86/kernel/cpu/mtrr/
H A Dcyrix.c137 u32 cr0; prepare_set() local
149 cr0 = read_cr0() | X86_CR0_CD; prepare_set()
151 write_cr0(cr0); prepare_set()
H A Dgeneric.c728 unsigned long cr0; __acquires() local
740 cr0 = read_cr0() | X86_CR0_CD; __acquires()
741 write_cr0(cr0); __acquires()
/linux-4.4.14/arch/s390/mm/
H A Dmaccess.c113 unsigned long cr0, flags, prefix; memcpy_absolute() local
116 __ctl_store(cr0, 0, 0); memcpy_absolute()
128 __ctl_load(cr0, 0, 0); memcpy_absolute()
/linux-4.4.14/arch/parisc/include/asm/
H A Dasmregs.h130 rctr: .reg %cr0
157 cr0: .reg %cr0
H A Delf.h269 * # cr0 (recovery counter)
/linux-4.4.14/arch/arm/mach-sa1100/
H A Dssp.c163 ssp->cr0 = Ser4SSCR0; ssp_save_state()
179 Ser4SSCR0 = ssp->cr0 & ~SSCR0_SSE; ssp_restore_state()
181 Ser4SSCR0 = ssp->cr0; ssp_restore_state()
/linux-4.4.14/drivers/spi/
H A Dspi-txx9.c211 u32 cr0; txx9spi_work_one() local
218 cr0 = txx9spi_rd(c, TXx9_SPCR0); txx9spi_work_one()
219 cr0 &= ~TXx9_SPCR0_RXIFL_MASK; txx9spi_work_one()
220 cr0 |= (count - 1) << 12; txx9spi_work_one()
222 cr0 |= TXx9_SPCR0_RBSIE; txx9spi_work_one()
223 txx9spi_wr(c, cr0, TXx9_SPCR0); txx9spi_work_one()
H A Dspi-rockchip.c510 u32 cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET) rockchip_spi_config() local
513 cr0 |= (rs->n_bytes << CR0_DFS_OFFSET); rockchip_spi_config()
514 cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET); rockchip_spi_config()
515 cr0 |= (rs->tmode << CR0_XFM_OFFSET); rockchip_spi_config()
516 cr0 |= (rs->type << CR0_FRF_OFFSET); rockchip_spi_config()
550 cr0 |= rsd << CR0_RSD_OFFSET; rockchip_spi_config()
552 writel_relaxed(cr0, rs->regs + ROCKCHIP_SPI_CTRLR0); rockchip_spi_config()
564 dev_dbg(rs->dev, "cr0 0x%x, div %d\n", cr0, div); rockchip_spi_config()
H A Dspi-dw.c287 u32 cr0; dw_spi_transfer_one() local
320 cr0 = (transfer->bits_per_word - 1) dw_spi_transfer_one()
337 cr0 &= ~SPI_TMOD_MASK; dw_spi_transfer_one()
338 cr0 |= (chip->tmode << SPI_TMOD_OFFSET); dw_spi_transfer_one()
341 dw_writel(dws, DW_SPI_CTRL0, cr0); dw_spi_transfer_one()
H A Dspi-ep93xx.c317 u16 cr0; ep93xx_spi_chip_setup() local
324 cr0 = div_scr << SSPCR0_SCR_SHIFT; ep93xx_spi_chip_setup()
325 cr0 |= (chip->spi->mode & (SPI_CPHA|SPI_CPOL)) << SSPCR0_MODE_SHIFT; ep93xx_spi_chip_setup()
326 cr0 |= dss; ep93xx_spi_chip_setup()
330 dev_dbg(&espi->pdev->dev, "setup: cr0 %#x\n", cr0); ep93xx_spi_chip_setup()
333 ep93xx_spi_write_u16(espi, SSPCR0, cr0); ep93xx_spi_chip_setup()
H A Dspi-pl022.c417 * @cr0: Value of control register CR0 of SSP - on later ST variants this
433 u32 cr0; member in struct:chip_data
578 writel(chip->cr0, SSP_CR0(pl022->virtbase)); restore_state()
580 writew(chip->cr0, SSP_CR0(pl022->virtbase)); restore_state()
1963 chip->cr0 = 0; pl022_setup()
1996 SSP_WRITE_BITS(chip->cr0, chip_info->duplex, pl022_setup()
1998 SSP_WRITE_BITS(chip->cr0, chip_info->ctrl_len, pl022_setup()
2000 SSP_WRITE_BITS(chip->cr0, chip_info->iface, pl022_setup()
2005 SSP_WRITE_BITS(chip->cr0, bits - 1, pl022_setup()
2022 SSP_WRITE_BITS(chip->cr0, bits - 1, pl022_setup()
2024 SSP_WRITE_BITS(chip->cr0, chip_info->iface, pl022_setup()
2033 SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPO, 6); pl022_setup()
2039 SSP_WRITE_BITS(chip->cr0, tmp, SSP_CR0_MASK_SPH, 7); pl022_setup()
2041 SSP_WRITE_BITS(chip->cr0, clk_freq.scr, SSP_CR0_MASK_SCR, 8); pl022_setup()
H A Dspi-pxa2xx.c888 u32 cr0; pump_transfers() local
1005 cr0 = pxa2xx_configure_sscr0(drv_data, clk_div, bits); pump_transfers()
1009 / (1 + ((cr0 & SSCR0_SCR(0xfff)) >> 8)), pump_transfers()
1014 / (1 + ((cr0 & SSCR0_SCR(0x0ff)) >> 8)), pump_transfers()
1059 if ((pxa2xx_spi_read(drv_data, SSCR0) != cr0) pump_transfers()
1063 pxa2xx_spi_write(drv_data, SSCR0, cr0 & ~SSCR0_SSE); pump_transfers()
1069 pxa2xx_spi_write(drv_data, SSCR0, cr0); pump_transfers()
/linux-4.4.14/arch/powerpc/platforms/52xx/
H A Dmpc52xx_sleep.S33 cmpi cr0, r10, 1
34 bne cr0, 1b
H A Dlite5200_sleep.S186 cmp cr0, r13, r12
/linux-4.4.14/drivers/cpufreq/
H A Dpowernow-k6.c105 unsigned long cr0; powernow_k6_set_cpu_multiplier() local
114 cr0 = read_cr0(); powernow_k6_set_cpu_multiplier()
115 write_cr0(cr0 | X86_CR0_CD); powernow_k6_set_cpu_multiplier()
129 write_cr0(cr0); powernow_k6_set_cpu_multiplier()
/linux-4.4.14/arch/powerpc/boot/
H A Dcrt0.S118 cmplw cr0,r9,r8
129 cmplw cr0,r9,r8
201 cmpld cr0,r9,r8
212 cmpld cr0,r9,r8
H A Dppc_asm.h17 #define cr0 0 macro
H A D4xx.c338 u32 cr0 = mfdcr(DCRN_CPC0_CR0); ibm440gp_fixup_clocks() local
368 if (cr0 & CPC0_CR0_U0EC) ibm440gp_fixup_clocks()
373 uart0 = plb / CPC0_CR0_UDIV(cr0); ibm440gp_fixup_clocks()
375 if (cr0 & CPC0_CR0_U1EC) ibm440gp_fixup_clocks()
380 uart1 = plb / CPC0_CR0_UDIV(cr0); ibm440gp_fixup_clocks()
H A Dstring.S35 bdnzf 2,1b /* dec ctr, branch if ctr != 0 && !cr0.eq */
/linux-4.4.14/arch/x86/kvm/
H A Dkvm_cache_regs.h53 return vcpu->arch.cr0 & mask; kvm_read_cr0_bits()
H A Dsvm.c206 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
1081 * svm_set_cr0() sets PG and WP and clears NW and CD on save->cr0. init_vmcb()
1082 * It also updates the guest-visible cr0 value. init_vmcb()
1448 ulong gcr0 = svm->vcpu.arch.cr0; update_cr0_intercept()
1449 u64 *hcr0 = &svm->vmcb->save.cr0; update_cr0_intercept()
1468 static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) svm_set_cr0() argument
1474 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) { svm_set_cr0()
1479 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG)) { svm_set_cr0()
1485 vcpu->arch.cr0 = cr0; svm_set_cr0()
1488 cr0 |= X86_CR0_PG | X86_CR0_WP; svm_set_cr0()
1491 cr0 |= X86_CR0_TS; svm_set_cr0()
1498 cr0 &= ~(X86_CR0_CD | X86_CR0_NW); svm_set_cr0()
1499 svm->vmcb->save.cr0 = cr0; svm_set_cr0()
2258 nested_vmcb->save.cr0 = kvm_read_cr0(&svm->vcpu); nested_svm_vmexit()
2323 svm_set_cr0(&svm->vcpu, hsave->save.cr0 | X86_CR0_PE); nested_svm_vmexit()
2447 hsave->save.cr0 = kvm_read_cr0(&svm->vcpu); nested_svm_vmrun()
2480 svm_set_cr0(&svm->vcpu, nested_vmcb->save.cr0); nested_svm_vmrun()
2833 unsigned long cr0 = svm->vcpu.arch.cr0; check_selective_cr0_intercepted() local
2843 cr0 &= ~SVM_CR0_SELECTIVE_MASK; check_selective_cr0_intercepted()
2846 if (cr0 ^ val) { check_selective_cr0_intercepted()
3383 "cr0:", save->cr0, "cr2:", save->cr2); dump_vmcb()
3428 vcpu->arch.cr0 = svm->vmcb->save.cr0; handle_exit()
4157 unsigned long cr0, val; svm_check_intercept() local
4172 cr0 = vcpu->arch.cr0 & ~SVM_CR0_SELECTIVE_MASK; svm_check_intercept()
4176 cr0 &= 0xfUL; svm_check_intercept()
4179 if (cr0 & X86_CR0_PE) svm_check_intercept()
4183 if (cr0 ^ val) svm_check_intercept()
H A Dvmx.c1975 * the guest vcpu), then restore the cr0.TS bit. __vmx_load_host_state()
2124 ulong cr0; vmx_fpu_activate() local
2129 cr0 = vmcs_readl(GUEST_CR0); vmx_fpu_activate()
2130 cr0 &= ~(X86_CR0_TS | X86_CR0_MP); vmx_fpu_activate()
2131 cr0 |= kvm_read_cr0_bits(vcpu, X86_CR0_TS | X86_CR0_MP); vmx_fpu_activate()
2132 vmcs_writel(GUEST_CR0, cr0); vmx_fpu_activate()
2144 * Return the cr0 value that a nested guest would read. This is a combination
2145 * of the real cr0 used to run the guest (guest_cr0), and the bits shadowed by
2175 * up-to-date here because we just decached cr0.TS (and we'll vmx_fpu_deactivate()
2180 (vcpu->arch.cr0 & X86_CR0_TS); vmx_fpu_deactivate()
2183 vmcs_writel(CR0_READ_SHADOW, vcpu->arch.cr0); vmx_fpu_deactivate()
3625 vcpu->arch.cr0 &= ~cr0_guest_owned_bits; vmx_decache_cr0_guest_bits()
3626 vcpu->arch.cr0 |= vmcs_readl(GUEST_CR0) & cr0_guest_owned_bits; vmx_decache_cr0_guest_bits()
3680 unsigned long cr0, ept_update_paging_mode_cr0()
3685 if (!(cr0 & X86_CR0_PG)) { ept_update_paging_mode_cr0()
3691 vcpu->arch.cr0 = cr0; ept_update_paging_mode_cr0()
3699 vcpu->arch.cr0 = cr0; ept_update_paging_mode_cr0()
3703 if (!(cr0 & X86_CR0_WP)) ept_update_paging_mode_cr0()
3707 static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) vmx_set_cr0() argument
3712 hw_cr0 = (cr0 & ~KVM_GUEST_CR0_MASK); vmx_set_cr0()
3718 if (vmx->rmode.vm86_active && (cr0 & X86_CR0_PE)) vmx_set_cr0()
3721 if (!vmx->rmode.vm86_active && !(cr0 & X86_CR0_PE)) vmx_set_cr0()
3727 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) vmx_set_cr0()
3729 if (is_paging(vcpu) && !(cr0 & X86_CR0_PG)) vmx_set_cr0()
3735 ept_update_paging_mode_cr0(&hw_cr0, cr0, vcpu); vmx_set_cr0()
3740 vmcs_writel(CR0_READ_SHADOW, cr0); vmx_set_cr0()
3742 vcpu->arch.cr0 = cr0; vmx_set_cr0()
3744 /* depends on vcpu->arch.cr0 to be set to a new value */ vmx_set_cr0()
4876 u64 cr0; vmx_vcpu_reset() local
4956 cr0 = X86_CR0_NW | X86_CR0_CD | X86_CR0_ET; vmx_vcpu_reset()
4957 vmx->vcpu.arch.cr0 = cr0; vmx_vcpu_reset()
4958 vmx_set_cr0(vcpu, cr0); /* enter rmode */ vmx_vcpu_reset()
5389 /* called to set cr0 as appropriate for a mov-to-cr0 exit. */ handle_set_cr0()
5397 * We get here when L2 changed cr0 in a way that did not change handle_set_cr0()
5400 * effective cr0 value that L1 would like to write into the handle_set_cr0()
5439 /* called to set cr0 as approriate for clts instruction exit. */ handle_clts()
5446 * just pretend it's off (also in arch.cr0 for fpu_activate). handle_clts()
5450 vcpu->arch.cr0 &= ~X86_CR0_TS; handle_clts()
7680 * lmsw can change bits 1..3 of cr0, and only set bit 0 of nested_vmx_exit_handled_cr()
7681 * cr0. Other attempted changes are ignored, with no exit. nested_vmx_exit_handled_cr()
9992 * because L2 may have changed some cr0 bits directly (CRO_GUEST_HOST_MASK).
10303 * Note that calling vmx_set_cr0 is important, even if cr0 hasn't load_vmcs12_host_state()
10311 * to apply the same changes to L1's vmcs. We just set cr0 correctly, load_vmcs12_host_state()
3679 ept_update_paging_mode_cr0(unsigned long *hw_cr0, unsigned long cr0, struct kvm_vcpu *vcpu) ept_update_paging_mode_cr0() argument
H A Demulate.c2334 u64 cr0, u64 cr4) rsm_enter_protected_mode()
2347 bad = ctxt->ops->set_cr(ctxt, 0, cr0); rsm_enter_protected_mode()
2365 u32 val, cr0, cr4; rsm_load_state_32() local
2368 cr0 = GET_SMSTATE(u32, smbase, 0x7ffc); rsm_load_state_32()
2411 return rsm_enter_protected_mode(ctxt, cr0, cr4); rsm_load_state_32()
2418 u64 val, cr0, cr4; rsm_load_state_64() local
2434 cr0 = GET_SMSTATE(u64, smbase, 0x7f58); rsm_load_state_64()
2463 r = rsm_enter_protected_mode(ctxt, cr0, cr4); rsm_load_state_64()
2478 unsigned long cr0, cr4, efer; em_rsm() local
2508 cr0 = ctxt->ops->get_cr(ctxt, 0); em_rsm()
2509 if (cr0 & X86_CR0_PE) em_rsm()
2510 ctxt->ops->set_cr(ctxt, 0, cr0 & ~(X86_CR0_PG | X86_CR0_PE)); em_rsm()
3626 ulong cr0; em_clts() local
3628 cr0 = ctxt->ops->get_cr(ctxt, 0); em_clts()
3629 cr0 &= ~X86_CR0_TS; em_clts()
3630 ctxt->ops->set_cr(ctxt, 0, cr0); em_clts()
2333 rsm_enter_protected_mode(struct x86_emulate_ctxt *ctxt, u64 cr0, u64 cr4) rsm_enter_protected_mode() argument
H A Dx86.c583 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) kvm_set_cr0() argument
588 cr0 |= X86_CR0_ET; kvm_set_cr0()
591 if (cr0 & 0xffffffff00000000UL) kvm_set_cr0()
595 cr0 &= ~CR0_RESERVED_BITS; kvm_set_cr0()
597 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) kvm_set_cr0()
600 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) kvm_set_cr0()
603 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) { kvm_set_cr0()
620 if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE)) kvm_set_cr0()
623 kvm_x86_ops->set_cr0(vcpu, cr0); kvm_set_cr0()
625 if ((cr0 ^ old_cr0) & X86_CR0_PG) { kvm_set_cr0()
630 if ((cr0 ^ old_cr0) & update_bits) kvm_set_cr0()
633 if (((cr0 ^ old_cr0) & X86_CR0_CD) && kvm_set_cr0()
6239 u32 cr0; process_smi() local
6264 cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG); process_smi()
6265 kvm_x86_ops->set_cr0(vcpu, cr0); process_smi()
6266 vcpu->arch.cr0 = cr0; process_smi()
6941 sregs->cr0 = kvm_read_cr0(vcpu); kvm_arch_vcpu_ioctl_get_sregs()
7039 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0; kvm_arch_vcpu_ioctl_set_sregs()
7040 kvm_x86_ops->set_cr0(vcpu, sregs->cr0); kvm_arch_vcpu_ioctl_set_sregs()
7041 vcpu->arch.cr0 = sregs->cr0; kvm_arch_vcpu_ioctl_set_sregs()
7211 vcpu->arch.cr0 |= X86_CR0_ET; fx_init()
H A Dpaging_tmpl.h777 * so that the kernel can write to it when cr0.wp=0, page_fault()
H A Dmmu.c3838 /* Allow supervisor writes if !cr0.wp */ update_permission_bitmask()
/linux-4.4.14/arch/sh/include/cpu-sh5/cpu/
H A Dregisters.h25 #define SR cr0
/linux-4.4.14/arch/x86/kernel/acpi/
H A Dwakeup_64.S91 movq %rbx, %cr0
/linux-4.4.14/arch/powerpc/kvm/
H A Dbook3s_64_slb.S85 cmpd cr0, r11, r12
H A Dbook3s_hv_rm_mmu.c395 " cmpwi cr0,%1,0\n" try_lock_tlbie()
H A Dbook3s_hv_rmhandlers.S1553 /* r8 and cr0.eq are live here */
/linux-4.4.14/arch/x86/power/
H A Dcpu.c105 ctxt->cr0 = read_cr0(); __save_processor_state()
186 write_cr0(ctxt->cr0); __restore_processor_state()
/linux-4.4.14/arch/x86/xen/
H A Denlighten.c992 unsigned long cr0 = this_cpu_read(xen_cr0_value); xen_read_cr0() local
994 if (unlikely(cr0 == 0)) { xen_read_cr0()
995 cr0 = native_read_cr0(); xen_read_cr0()
996 this_cpu_write(xen_cr0_value, cr0); xen_read_cr0()
999 return cr0; xen_read_cr0()
1002 static void xen_write_cr0(unsigned long cr0) xen_write_cr0() argument
1006 this_cpu_write(xen_cr0_value, cr0); xen_write_cr0()
1008 /* Only pay attention to cr0.TS; everything else is xen_write_cr0()
1012 MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); xen_write_cr0()
/linux-4.4.14/drivers/video/fbdev/
H A Dsstfb.c969 u8 cr0, cc; sst_set_pll_att_ti() local
977 cr0 = sst_dac_read(DACREG_RMR); /* 5 CR0 */ sst_set_pll_att_ti()
984 sst_dac_write(DACREG_RMR, (cr0 & 0xf0) sst_set_pll_att_ti()
1015 cr0 & ~DACREG_CR0_PWDOWN & ~DACREG_CR0_EN_INDEXED); sst_set_pll_att_ti()
1060 u8 cr0; sst_set_vidmod_att_ti() local
1068 cr0 = sst_dac_read(DACREG_RMR); sst_set_vidmod_att_ti()
1075 /* cr0 */ sst_set_vidmod_att_ti()
1078 sst_dac_write(DACREG_RMR, (cr0 & 0x0f) | DACREG_CR0_16BPP); sst_set_vidmod_att_ti()
/linux-4.4.14/sound/soc/pxa/
H A Dpxa-ssp.c48 uint32_t cr0; member in struct:ssp_priv
141 priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0); pxa_ssp_suspend()
160 __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0); pxa_ssp_resume()
/linux-4.4.14/arch/s390/kvm/
H A Dguestdbg.c135 vcpu->arch.guestdbg.cr0 = vcpu->arch.sie_block->gcr[0]; kvm_s390_backup_guest_per_regs()
143 vcpu->arch.sie_block->gcr[0] = vcpu->arch.guestdbg.cr0; kvm_s390_restore_guest_per_regs()
/linux-4.4.14/tools/testing/selftests/powerpc/copyloops/
H A Dcopyuser_64.S35 crand cr0*4+2,cr0*4+2,cr6*4+2
/linux-4.4.14/drivers/s390/char/
H A Dsclp.c560 unsigned long cr0, cr0_sync; sclp_sync_wait() local
581 __ctl_store(cr0, 0, 0); sclp_sync_wait()
582 cr0_sync = cr0; sclp_sync_wait()
597 __ctl_load(cr0, 0, 0); sclp_sync_wait()
/linux-4.4.14/drivers/pci/host/
H A Dpcie-spear13xx.c37 u32 app_ctrl_0; /* cr0 */
/linux-4.4.14/arch/x86/include/uapi/asm/
H A Dkvm.h150 __u64 cr0, cr2, cr3, cr4, cr8; member in struct:kvm_sregs
/linux-4.4.14/drivers/crypto/ccp/
H A Dccp-ops.c196 u32 cr0, cmd; ccp_do_cmd() local
206 cr0 = (cmd_q->id << REQ0_CMD_Q_SHIFT) ccp_do_cmd()
211 cr0 |= REQ0_STOP_ON_COMPLETE ccp_do_cmd()
215 cr0 |= REQ0_INT_ON_COMPLETE; ccp_do_cmd()
228 iowrite32(cr0, ccp->io_regs + CMD_REQ0); ccp_do_cmd()
232 if (cr0 & REQ0_INT_ON_COMPLETE) { ccp_do_cmd()
/linux-4.4.14/arch/powerpc/platforms/powermac/
H A Dcache.S76 cmplwi cr0,r3,0x7000
/linux-4.4.14/arch/x86/lguest/
H A Dboot.c494 * Intel has four control registers, imaginatively named cr0, cr2, cr3 and cr4.
499 * We start with cr0. cr0 allows you to turn on and off all kinds of basic
508 * We store cr0 locally because the Host never changes it. The Guest sometimes
550 * cr0. Keep a local copy, and tell the Host when it changes.
/linux-4.4.14/drivers/crypto/
H A Dpadlock-aes.c186 * generate a spurious DNA fault when cr0.ts is '1'. These instructions
/linux-4.4.14/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.h271 /* makes cr0-7 on the specified head read-only */
/linux-4.4.14/arch/powerpc/xmon/
H A Dppc.h239 cr0 0 cr1 1 cr2 2 cr3 3
/linux-4.4.14/arch/s390/include/asm/
H A Dkvm_host.h494 unsigned long cr0; member in struct:kvm_guestdbg_info_arch
/linux-4.4.14/arch/parisc/kernel/
H A Dentry.S811 mtctl %r0, %cr0 /* Needed for single stepping */
1901 mtctl %r2,%cr0 /* for immediate trap */
/linux-4.4.14/arch/x86/entry/
H A Dentry_32.S54 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
/linux-4.4.14/drivers/iommu/
H A Darm-smmu-v3.c2350 dev_err(smmu->dev, "failed to clear cr0\n"); arm_smmu_device_disable()
/linux-4.4.14/drivers/video/fbdev/sis/
H A Dinit.c2096 /* unlock cr0-7 */ SiS_SetCRT1CRTC()
/linux-4.4.14/drivers/net/ethernet/via/
H A Dvia-velocity.c3188 /* Just skip cr0 */ velocity_restore_context()
/linux-4.4.14/fs/cifs/
H A Dcifspdu.h2737 char cr0; /* \n */ member in struct:xsymlink
/linux-4.4.14/drivers/staging/xgifb/
H A Dvb_setmode.c267 /* unlock cr0-7 */ XGI_SetCRT1Timing_H()

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