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Searched refs:R1 (Results 1 – 102 of 102) sorted by relevance

/linux-4.4.14/arch/blackfin/lib/
Dudivsi3.S20 CC = R0 < R1 (IU); /* If X < Y, always return 0 */
23 R2 = R1 << 16;
28 R3 = R1 >> 15; /* and Y is a 15-bit number */
47 DIVQ(R0, R1); // 1
48 DIVQ(R0, R1); // 2
49 DIVQ(R0, R1); // 3
50 DIVQ(R0, R1); // 4
51 DIVQ(R0, R1); // 5
52 DIVQ(R0, R1); // 6
53 DIVQ(R0, R1); // 7
[all …]
Ddivsi3.S39 R3 = R0 ^ R1;
57 DIVS(R0, R1);
58 DIVQ(R0, R1);
59 DIVQ(R0, R1);
60 DIVQ(R0, R1);
61 DIVQ(R0, R1);
62 DIVQ(R0, R1);
63 DIVQ(R0, R1);
64 DIVQ(R0, R1);
65 DIVQ(R0, R1);
[all …]
Dsmulsi3_highpart.S18 R2 = R1.L * R0.L (FU);
19 R3 = R1.H * R0.L (IS,M);
20 R0 = R0.H * R1.H, R1 = R0.H * R1.L (IS,M);
22 R1.L = R2.H + R1.L;
26 R1.L = R1.L + R3.L;
28 R1 >>>= 16;
30 R1 = R1 + R3; define
31 R1 = R1 + R2; define
33 R1 = R1 + R2; define
35 R0 = R0 + R1;
Dmemmove.S22 P3 = R1; /* P3 = From Address */
27 CC = R1 < R0 (IU); /* From < To */
29 R3 = R1 + R2;
36 R3 = R1 | R0; /* OR addresses together */
47 R1 = [I0++]; define
52 [P0++] = R1;
54 R1 = [I0++]; define
58 MNOP || [P0++] = R1 || R1 = [I0++];
60 [P0++] = R1;
69 .Lbyte2_s: R1 = B[P3++](Z);
[all …]
Dumulsi3_highpart.S18 R2 = R1.H * R0.H, R3 = R1.L * R0.H (FU);
19 R0 = R1.L * R0.L, R1 = R1.H * R0.L (FU);
24 R0 = R0 + R1;
26 R1 = cc; define
27 R1 = PACK(R1.l,R0.h); define
28 R0 = R1 + R2;
Dmemcmp.S24 P3 = R1; /* P3 = s2 Address */
28 I0 = R1; /* s2 */
29 R1 = R1 | R0; /* OR addresses together */ define
30 R1 <<= 30; /* check bottom two bits */
43 R1 = [I0++]; define
45 MNOP || R0 = [P0++] || R1 = [I0++];
47 CC = R0 == R1;
60 R1 = B[P3++](Z); /* *s2 */ define
62 CC = R0 == R1;
68 R0 = R0 - R1;
Dmemcpy.S36 P1 = R1 ; /* src*/
40 CC = R1 < R0; /* src < dst */
42 R3 = R1 + R2;
49 R3 = R1 | R0;
50 R1 = 0x3; define
51 R3 = R3 & R1;
99 R1 = B[P1++] (X); define
101 B[P0++] = R1;
118 R1 = B[P1--] (X); define
120 B[P0--] = R1;
Dmemset.S32 R1 = R1.B (Z); /* R1 = fill char */ define
40 R2 = R1 << 8; /* create quad filler */
41 R2.L = R2.L + R1.L(NS);
42 R2.H = R2.L + R1.H(NS);
66 B[P0++] = R1;
78 B[P0++] = R1;
83 B[P0++] = R1;
84 B[P0++] = R1;
Dmuldi3.S51 A0 = R2.H * R1.L, A1 = R2.L * R1.H (FU) || R3 = [SP + 12]; /* E1 */
56 A0 += R2.l * R1.l (FU); /* E2 */
66 R1 = A0.w; define
71 R1.h = R1.h + R4.l (NS) || R4 = [SP];
Douts.S19 P1 = R1; /* P1 = address */
32 P1 = R1; /* P1 = address */
45 P1 = R1; /* P1 = address */
58 P1 = R1; /* P1 = address */
62 .Lword8_loop_s: R1 = B[P1++];
65 R0 = R0 + R1;
Dmodsi3.S27 CC=R1==0;
29 CC=R0==R1;
31 CC = R1 == 1;
33 CC = R1 == -1;
42 R6 = R1; /* Save for later */
Dumodsi3.S23 CC= R1==0;
25 CC=R0==R1;
27 CC = R1 == 1;
29 CC = R0<R1 (IU);
35 R6 = R1;
Dstrncpy.S32 P1 = R1 ; /* src*/
36 R1 = B [P1++] (Z); define
37 B [P0++] = R1;
38 CC = R1 == 0;
81 B [P0++] = R1;
Dstrcpy.S26 P1 = R1 ; /* src*/
29 R1 = B [P1++] (Z); define
30 B [P0++] = R1;
31 CC = R1;
Dstrcmp.S28 P1 = R1 ; /* s2 */
32 R1 = B[P1++] (Z); /* get *s2 */ define
33 CC = R0 == R1; /* compare a byte */
39 R0 = R0 - R1; /* *s1 - *s2 */
Dstrncmp.S29 P1 = R1 ; /* s2 */
32 R1 = B[P1++] (Z); /* get *s2 */ define
33 CC = R0 == R1; /* compare a byte */
44 R0 = R0 - R1; /* *s1 - *s2 */
Dmemchr.S24 R1 = R1.B(Z); define
33 CC = R3 == R1;
Dins.S78 P1 = R1; /* P1 = address */ \
/linux-4.4.14/arch/x86/crypto/
Dtwofish-x86_64-asm_64.S47 #define R1 %rbx macro
219 pushq R1
228 movq (R3), R1
230 input_whitening(R1,%r11,a_offset)
234 shr $32, R1
239 encrypt_round(R0,R1,R2,R3,0);
240 encrypt_round(R2,R3,R0,R1,8);
241 encrypt_round(R0,R1,R2,R3,2*8);
242 encrypt_round(R2,R3,R0,R1,3*8);
243 encrypt_round(R0,R1,R2,R3,4*8);
[all …]
Dtwofish-i586-asm_32.S244 encrypt_round(R0,R1,R2,R3,0);
245 encrypt_round(R2,R3,R0,R1,8);
246 encrypt_round(R0,R1,R2,R3,2*8);
247 encrypt_round(R2,R3,R0,R1,3*8);
248 encrypt_round(R0,R1,R2,R3,4*8);
249 encrypt_round(R2,R3,R0,R1,5*8);
250 encrypt_round(R0,R1,R2,R3,6*8);
251 encrypt_round(R2,R3,R0,R1,7*8);
252 encrypt_round(R0,R1,R2,R3,8*8);
253 encrypt_round(R2,R3,R0,R1,9*8);
[all …]
Daes-x86_64-asm_64.S21 #define R1 %rax macro
134 prologue(FUNC,KEY,B128,B192,R2,R8,R7,R9,R1,R3,R4,R6,R10,R5,R11)
139 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4) \
140 move_regs(R1,R2,R5,R6)
143 round(TAB,OFFSET,R1,R2,R3,R4,R5,R6,R7,R10,R5,R6,R3,R4)
146 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4) \
147 move_regs(R1,R2,R5,R6)
150 round(TAB,OFFSET,R2,R1,R4,R3,R6,R5,R7,R10,R5,R6,R3,R4)
/linux-4.4.14/arch/blackfin/kernel/
Dfixed_code.S41 [P0] = R1;
57 CC = R0 == R1;
73 R1 = [P0]; define
74 R0 = R1 + R0;
88 R1 = [P0]; define
89 R0 = R1 - R0;
103 R1 = [P0]; define
104 R0 = R1 | R0;
118 R1 = [P0]; define
119 R0 = R1 & R0;
[all …]
/linux-4.4.14/lib/
Dtest_bpf.c46 #define R1 BPF_REG_1 macro
398 insn[i++] = BPF_MOV64_REG(R6, R1); in bpf_fill_ld_abs_vlan_push_pop()
404 insn[i++] = BPF_MOV64_REG(R1, R6); in bpf_fill_ld_abs_vlan_push_pop()
417 insn[i++] = BPF_MOV64_REG(R1, R6); in bpf_fill_ld_abs_vlan_push_pop()
1056 BPF_ALU64_IMM(BPF_MOV, R1, 1),
1057 BPF_ALU64_IMM(BPF_ADD, R1, 2),
1059 BPF_ALU64_REG(BPF_SUB, R1, R2),
1060 BPF_ALU64_IMM(BPF_ADD, R1, -1),
1061 BPF_ALU64_IMM(BPF_MUL, R1, 3),
1062 BPF_ALU64_REG(BPF_MOV, R0, R1),
[all …]
/linux-4.4.14/arch/blackfin/mach-common/
Ddpmc_modes.S21 R1 = W[P0](z); define
22 BITSET (R1, 3);
23 W[P0] = R1.L;
33 R1 = IWR_DISABLE_ALL; define
72 R1 = IWR_DISABLE_ALL; define
96 P4 = R1;
100 R1 = IWR_DISABLE_ALL; define
126 R1 = 0x6; define
127 R1 <<= 16;
129 R1 = R1|R2; define
[all …]
Dcache.S37 R1 += -1;
38 R1 = R1 & R2; define
39 R1 += L1_CACHE_BYTES;
42 R2 = R1 - R0;
Dinterrupt.S169 R1 = [P0]; define
170 CC = BITTST(R1, EVT_IVHW_P);
173 R1 = EVT_IVHW_P; define
174 [P0] = R1;
176 CC = R1 == R2;
188 R1.L = LO(VEC_HWERR);
189 R1.H = HI(VEC_HWERR);
190 R0 = R0 | R1;
Dentry.S95 R1 = SP; define
/linux-4.4.14/drivers/net/wan/
Dz85230.c278 read_zsreg(c, R1); in z8530_flush_fifo()
279 read_zsreg(c, R1); in z8530_flush_fifo()
280 read_zsreg(c, R1); in z8530_flush_fifo()
281 read_zsreg(c, R1); in z8530_flush_fifo()
284 read_zsreg(c, R1); in z8530_flush_fifo()
285 read_zsreg(c, R1); in z8530_flush_fifo()
286 read_zsreg(c, R1); in z8530_flush_fifo()
287 read_zsreg(c, R1); in z8530_flush_fifo()
345 stat=read_zsreg(c, R1); in z8530_rx()
515 status=read_zsreg(chan, R1); in z8530_dma_rx()
[all …]
Dz85230.h26 #define R1 1 macro
/linux-4.4.14/arch/blackfin/include/asm/
Dentry.h32 R1 = [P0];
113 R1 = ASTAT; \
123 ASTAT = R1; \
130 1: ASTAT = R1; \
143 R1 = ASTAT; \
153 ASTAT = R1; \
159 1: ASTAT = R1; \
Ddpmc.h19 #define PM_REG6 R1
/linux-4.4.14/arch/hexagon/kernel/
Dvm_entry.S220 memd(R29 + #(_PT_R0100 + -_PT_REGS_SIZE)) = R1:0; \
227 memd(R29 + #_PT_ER_VMEL) = R1:0; \
229 R1.L = #LO(CHandler); \
233 R1.H = #HI(CHandler); \
243 memd(R29 + #(_PT_R0100 + -_PT_REGS_SIZE)) = R1:0; \
252 R1:0 = G1:0; \
254 memd(R29 + #_PT_ER_VMEL) = R1:0; \
255 R1 = # ## #(CHandler); \
315 R1 = memw(THREADINFO_REG + #_THREAD_INFO_FLAGS); define
334 R1:0 = memd(R29 + #_PT_ER_VMEL);
[all …]
Dvm_switch.S71 R29 = memw(R1 + #(_TASK_STRUCT_THREAD + _THREAD_STRUCT_SWITCH_SP));
88 THREADINFO_REG = memw(R1 + #_TASK_THREAD_INFO);
Dhead.S109 R1.H = #HI(PAGE_OFFSET >> (22 - 2))
110 R1.L = #LO(PAGE_OFFSET >> (22 - 2))
167 memw(R1 ++ #4) = R0
/linux-4.4.14/arch/sparc/net/
Dbpf_jit_comp.c298 #define emit_cmp(R1, R2) \ argument
299 *prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0))
301 #define emit_cmpi(R1, IMM) \ argument
302 *prog++ = (SUBCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
304 #define emit_btst(R1, R2) \ argument
305 *prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0))
307 #define emit_btsti(R1, IMM) \ argument
308 *prog++ = (ANDCC | IMMED | RS1(R1) | S13(IMM) | RD(G0));
310 #define emit_sub(R1, R2, R3) \ argument
311 *prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3))
[all …]
/linux-4.4.14/Documentation/devicetree/bindings/regulator/
Dltc3589.txt18 values R1 and R2 of the feedback voltage divider in ohms.
22 0.3625 * (1 + R1/R2) V and 0.75 * (1 + R1/R2) V. Regulators bb-out and ldo1
23 have a fixed 0.8 V reference and thus output 0.8 * (1 + R1/R2) V. The ldo3
/linux-4.4.14/tools/perf/arch/arm/tests/
Dregs_load.S4 #define R1 0x08 macro
41 str r1, [r0, #R1]
/linux-4.4.14/arch/blackfin/mach-bf609/
Ddpm.S134 R1.H = 0xDEAD;
135 R1.L = 0xBEEF;
138 [P0++] = R1;
/linux-4.4.14/drivers/tty/serial/
Dip22zilog.c146 regval = read_zsreg(channel, R1); in ip22zilog_clear_fifo()
167 unsigned char stat = read_zsreg(channel, R1); in __load_zsregs()
180 write_zsreg(channel, R1, in __load_zsregs()
181 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); in __load_zsregs()
227 write_zsreg(channel, R1, regs[R1]); in __load_zsregs()
264 r1 = read_zsreg(channel, R1); in ip22zilog_receive_chars()
635 up->curregs[R1] &= ~RxINT_MASK; in ip22zilog_stop_rx()
696 unsigned char stat = read_zsreg(channel, R1); in __ip22zilog_reset()
731 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __ip22zilog_startup()
792 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in ip22zilog_shutdown()
[all …]
Dsunzilog.c163 regval = read_zsreg(channel, R1); in sunzilog_clear_fifo()
186 unsigned char stat = read_zsreg(channel, R1); in __load_zsregs()
199 write_zsreg(channel, R1, in __load_zsregs()
200 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); in __load_zsregs()
260 write_zsreg(channel, R1, regs[R1]); in __load_zsregs()
338 r1 = read_zsreg(channel, R1); in sunzilog_receive_chars()
735 up->curregs[R1] &= ~RxINT_MASK; in sunzilog_stop_rx()
796 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; in __sunzilog_startup()
857 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); in sunzilog_shutdown()
1013 r1 = read_zsreg(channel, R1); in sunzilog_get_poll_char()
[all …]
Dzs.c258 while (!(read_zsreg(zport, R1) & ALL_SNT) && --loops) { in zs_line_drain()
276 write_zsreg(zport, R1, regs[1]); in load_zsregs()
315 status = read_zsreg(zport, R1); in zs_tx_empty()
471 write_zsreg(zport_a, R1, zport_a->regs[1]); in zs_stop_rx()
484 write_zsreg(zport, R1, zport->regs[1]); in zs_stop_rx()
512 write_zsreg(zport_a, R1, zport_a->regs[1]); in zs_enable_ms()
556 status = read_zsreg(zport, R1) & (Rx_OVR | FRM_ERR | PAR_ERR); in zs_receive_chars()
792 write_zsreg(zport, R1, zport->regs[1]); in zs_startup()
1163 write_zsreg(zport, R1, zport->regs[1]); in zs_console_write()
1183 write_zsreg(zport, R1, zport->regs[1]); in zs_console_write()
Dpmac_zilog.c135 unsigned char stat = read_zsreg(uap, R1); in pmz_load_zsregs()
148 write_zsreg(uap, R1, in pmz_load_zsregs()
149 regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB)); in pmz_load_zsregs()
194 write_zsreg(uap, R1, regs[R1]); in pmz_load_zsregs()
229 write_zsreg(uap, R1, uap->curregs[1]); in pmz_interrupt_control()
250 r1 = read_zsreg(uap, R1); in pmz_receive_chars()
683 uap->curregs[R1] &= ~RxINT_MASK; in pmz_stop_rx()
868 write_zsreg(uap, R1, 0); in __pmz_startup()
1164 || (read_zsreg(uap, R1) & ALL_SNT) == 0) { in pmz_irda_setup()
1979 write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB); in pmz_console_write()
[all …]
Dzs.h60 #define R1 1 macro
Dip22zilog.h39 #define R1 1 macro
Dsunzilog.h31 #define R1 1 macro
Dpmac_zilog.h127 #define R1 1 macro
/linux-4.4.14/Documentation/hwmon/
Dltc426039 real voltage by multiplying the reported value with (R1+R2)/R2, where R1 is the
Dltc426139 real voltage by multiplying the reported value with (R1+R2)/R2, where R1 is the
Dltc294539 real voltage by multiplying the reported value with (R1+R2)/R2, where R1 is the
Dvt121178 compute inx @*(1+R1/R2), @/(1+R1/R2)
86 Voltage R1 R2 Divider Raw Value
96 (2) R1 and R2 for 3.3V (int) are internal to the VT1211 chip and the driver
Dds1621116 support, which is achieved via the R0 and R1 config register bits, where:
118 R0..R1
Df71805f68 name use R1 R2 divider raw val.
83 (2) Obviously not correct, swapping R1 and R2 would make more sense.
/linux-4.4.14/arch/m32r/kernel/
Dentry.S89 #define R1(reg) @(0x14,reg) macro
134 ld r1, R1(r8)
Dhead.S86 ldi r1, #0 ; clear R1 for longwords store
/linux-4.4.14/arch/parisc/kernel/
Dunaligned.c119 #define R1(i) (((i)>>21)&0x1f) macro
452 unsigned long newbase = R1(regs->iir)?regs->gr[R1(regs->iir)]:0; in handle_unaligned()
669 if (ret == 0 && modify && R1(regs->iir)) in handle_unaligned()
670 regs->gr[R1(regs->iir)] = newbase; in handle_unaligned()
/linux-4.4.14/Documentation/networking/
Dfilter.txt619 * R1 - R5 - arguments from eBPF program to in-kernel function
665 place function arguments into R1 to R5 registers to satisfy calling
667 to in-kernel function. If R1 - R5 registers are mapped to CPU registers
674 After an in-kernel function call, R1 - R5 are reset to unreadable and R0 has
698 bpf_mov R2, R1
699 bpf_add R1, 1
708 already placed into R1 (e.g. on __bpf_prog_run() startup) and the programs
717 R1 - rdi
733 bpf_mov R6, R1 /* save ctx */
740 bpf_mov R1, R6 /* restore ctx for next call */
[all …]
/linux-4.4.14/drivers/net/hamradio/
Ddmascc.c527 write_scc(priv, R1, EXT_INT_ENAB); in setup_adapter()
543 write_scc(priv, R1, 0); in setup_adapter()
759 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in scc_open()
996 write_scc(priv, R1, in tx_on()
1008 write_scc(priv, R1, in tx_on()
1042 write_scc(priv, R1, EXT_INT_ENAB | INT_ERR_Rx | in rx_on()
1048 write_scc(priv, R1, EXT_INT_ENAB | INT_ALL_Rx | WT_RDY_RT | in rx_on()
1064 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in rx_off()
1166 special_condition(priv, read_scc(priv, R1)); in rx_isr()
1173 rc = read_scc(priv, R1); in rx_isr()
[all …]
Dz8530.h7 #define R1 1 macro
Dscc.c570 status = InReg(scc->ctrl,R1); /* read receiver status */ in scc_spint()
800 wr(scc,R1,0); /* no W/REQ operation */ in init_channel()
876 or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */ in init_channel()
914 or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */ in scc_key_trx()
1249 cl(scc, R1, TxINT_ENAB); /* force an ABORT, but don't */ in t_maxkeyup()
1605 wr(scc,R1,0); /* disable interrupts */ in scc_net_close()
2065 seq_printf(seq, "\tR %2.2x %2.2x XX ", InReg(scc->ctrl,R0), InReg(scc->ctrl,R1)); in scc_net_seq_show()
/linux-4.4.14/Documentation/scsi/
DNinjaSCSI.txt20 card, and write ["WBT", "NinjaSCSI-3", "R1.0"] or some other string to
28 Jan 2 03:45:06 lindberg cardmgr[78]: product info: "WBT", "NinjaSCSI-3", "R1.0"
71 version "WBT", "NinjaSCSI-3", "R1.0"
/linux-4.4.14/arch/powerpc/lib/
Dldstfp.S333 STXVD2X(0,R1,R8)
339 LXVD2X(0,R1,R8)
361 STXVD2X(0,R1,R8)
367 LXVD2X(0,R1,R8)
/linux-4.4.14/drivers/media/i2c/
Dwm8739.c48 R0 = 0, R1, enumerator
128 wm8739_write(sd, R1, (vol_r & 0x1f) | mute); in wm8739_s_ctrl()
/linux-4.4.14/Documentation/devicetree/bindings/pci/
Darm,juno-r1-pcie.txt1 * ARM Juno R1 PCIe interface
/linux-4.4.14/tools/perf/arch/arm/util/
Dunwind-libdw.c18 dwarf_regs[1] = REG(R1); in libdw__arch_set_initial_registers()
/linux-4.4.14/Documentation/leds/
Dleds-lp5523.txt19 /sys/class/leds/R1 (name: 'R1')
/linux-4.4.14/arch/mips/bcm47xx/
DKconfig19 This will generate an image with support for SSB and MIPS32 R1 instruction set.
/linux-4.4.14/Documentation/virtual/kvm/
Dhypercalls.txt14 R2-R7 are used for parameters 1-6. In addition, R1 is used for hypercall
18 number in R1.
Ds390-diag.txt22 | '83' | R1 | R3 | B2 | D2 |
/linux-4.4.14/drivers/net/wireless/iwlegacy/
D4965.c1581 s32 R1, R2, R3; in il4965_hw_get_temperature() local
1587 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[1]); in il4965_hw_get_temperature()
1593 R1 = (s32) le32_to_cpu(il->card_alive_init.therm_r1[0]); in il4965_hw_get_temperature()
1613 D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt); in il4965_hw_get_temperature()
1615 if (R3 == R1) { in il4965_hw_get_temperature()
1623 temperature /= (R3 - R1); in il4965_hw_get_temperature()
/linux-4.4.14/Documentation/devicetree/bindings/sound/
Drt5645.txt44 * DMIC R1
Dnvidia,tegra-audio-rt5677.txt49 "DMIC R1", "Internal Mic 1",
/linux-4.4.14/sound/pci/ali5451/
Dali5451.c648 u8 bval, R1 = 0, R2; in snd_ali_detect_spdif_rate() local
654 while ((R1 < 0x0b || R1 > 0x0e) && R1 != 0x12 && count <= 50000) { in snd_ali_detect_spdif_rate()
658 R1 = bval & 0x1F; in snd_ali_detect_spdif_rate()
670 if (R2 != R1) in snd_ali_detect_spdif_rate()
671 R1 = R2; in snd_ali_detect_spdif_rate()
/linux-4.4.14/drivers/media/dvb-frontends/
Ddrxd_hard.c93 u16 R1; member
884 u32 R1 = state->if_agc_cfg.R1; in ReadIFAgc() local
890 if (R2 == 0 && (R1 == 0 || R3 == 0)) in ReadIFAgc()
893 Vmax = (3300 * R2) / (R1 + R2); in ReadIFAgc()
895 Vmin = (3300 * Rpar) / (R1 + Rpar); in ReadIFAgc()
2514 state->if_agc_cfg.R1 = (u16) (ulIfAgcR1); in CDRXD()
2518 state->rf_agc_cfg.R1 = (u16) (ulRfAgcR1); in CDRXD()
/linux-4.4.14/drivers/scsi/pcmcia/
DKconfig41 NinjaSCSI-3: (version string: "WBT","NinjaSCSI-3","R1.0")
/linux-4.4.14/arch/m32r/boot/compressed/
Dhead.S105 ldi r1, #0 ; clear R1 for longwords store
/linux-4.4.14/drivers/usb/storage/
DKconfig135 tristate "Olympus MAUSB-10/Fuji DPC-R1 support"
139 and Fujifilm DPC-R1 USB Card reader/writer devices.
/linux-4.4.14/arch/m32r/platforms/oaks32r/
Ddot.gdbinit.nommu78 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/cris/arch-v10/kernel/
Dkgdb.c303 R0, R1, R2, R3, enumerator
/linux-4.4.14/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-mt65xx.txt61 Some special pins have extra pull up strength, there are R0 and R1 pull-up
/linux-4.4.14/arch/powerpc/kvm/
Dbooke_interrupts.S219 stw r1, VCPU_GPR(R1)(r4)
449 lwz r1, VCPU_GPR(R1)(r4)
Dbookehv_interrupts.S73 PPC_STL r1, VCPU_GPR(R1)(r4)
650 PPC_LL r1, VCPU_GPR(R1)(r4)
Dbook3s_hv_rmhandlers.S1043 ld r1, VCPU_GPR(R1)(r4)
1127 std r1, VCPU_GPR(R1)(r9)
/linux-4.4.14/arch/cris/arch-v32/kernel/
Dkgdb_asm.S473 move.d [$acr], $r1 ; Restore R1
Dkgdb.c311 R0, R1, R2, R3, enumerator
/linux-4.4.14/arch/m32r/platforms/mappi3/
Ddot.gdbinit136 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/m32r/platforms/mappi2/
Ddot.gdbinit.vdec2147 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/sh/kernel/cpu/sh2a/
Dentry.S92 mov.l @r8+,r1 ! old R1
/linux-4.4.14/arch/m32r/platforms/m32700ut/
Ddot.gdbinit_400MHz_32MB148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
Ddot.gdbinit_200MHz_16MB148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
Ddot.gdbinit_300MHz_32MB148 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/m32r/platforms/mappi/
Ddot.gdbinit164 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
Ddot.gdbinit.nommu164 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
Ddot.gdbinit.smp232 printf " R0[0x%08lX] R1[0x%08lX] R2[0x%08lX] R3[0x%08lX]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/hexagon/lib/
Dmemcpy.S152 #define ptr_in R1 /* source pointer */
/linux-4.4.14/arch/ia64/kernel/
Dunwind_decoder.c167 UNW_DEC_PROLOGUE(R1, body, rlen, arg); in unw_decode_r1()
Divt.S993 st8 [r17]=r28,PT(R1)-PT(B0) // save b0
997 st8.spill [r17]=r20,PT(R13)-PT(R1) // save original r1
Dentry.S778 ld8 r31=[r3],PT(R1)-PT(PR) // M0|1 load predicates
/linux-4.4.14/Documentation/devicetree/bindings/arm/
Darm,scpi.txt88 R0 and Juno R1 refer to [3].
/linux-4.4.14/arch/m32r/platforms/opsput/
Ddot.gdbinit173 printf " R0[%08lx] R1[%08lx] R2[%08lx] R3[%08lx]\n",$r0,$r1,$r2,$r3
/linux-4.4.14/arch/sh/kernel/cpu/sh2/
Dentry.S109 mov.l @(4,r2),r0 ! old R1
/linux-4.4.14/Documentation/crypto/
Ddescore-readme.txt147 movement (in particular, his use of L1, R1, L2, R2), and it was full of
/linux-4.4.14/drivers/platform/x86/
DKconfig297 If you have a Panasonic Let's note laptop (such as the R1(N variant),