Lines Matching refs:R1
21 R1 = W[P0](z); define
22 BITSET (R1, 3);
23 W[P0] = R1.L;
33 R1 = IWR_DISABLE_ALL; define
72 R1 = IWR_DISABLE_ALL; define
96 P4 = R1;
100 R1 = IWR_DISABLE_ALL; define
126 R1 = 0x6; define
127 R1 <<= 16;
129 R1 = R1|R2; define
131 R2 = DEPOSIT(R7, R1);
140 R1 = P4; define
155 R1 = IWR_DISABLE_ALL; define
262 [P0 + (SIC_IWR1 - SYSMMR_BASE)] = R1;
299 R1.H = 0xDEAD; /* Hibernate Magic */
300 R1.L = 0xBEEF;
303 [P0++] = R1; /* Store Hibernate Magic */