278 	read_zsreg(c, R1);  in z8530_flush_fifo()
279 	read_zsreg(c, R1);  in z8530_flush_fifo()
280 	read_zsreg(c, R1);  in z8530_flush_fifo()
281 	read_zsreg(c, R1);  in z8530_flush_fifo()
284 		read_zsreg(c, R1);  in z8530_flush_fifo()
285 		read_zsreg(c, R1);  in z8530_flush_fifo()
286 		read_zsreg(c, R1);  in z8530_flush_fifo()
287 		read_zsreg(c, R1);  in z8530_flush_fifo()
345 		stat=read_zsreg(c, R1);  in z8530_rx()
515 		status=read_zsreg(chan, R1);  in z8530_dma_rx()
637 	stat=read_zsreg(c, R1);  in z8530_rx_clear()
808 	c->regs[R1]|=TxINT_ENAB;  in z8530_sync_open()
809 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_open()
914 	c->regs[R1]&= ~TxINT_ENAB;  in z8530_sync_dma_open()
915 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_dma_open()
921 	c->regs[R1]|= WT_FN_RDYFN;  in z8530_sync_dma_open()
922 	c->regs[R1]|= WT_RDY_RT;  in z8530_sync_dma_open()
923 	c->regs[R1]|= INT_ERR_Rx;  in z8530_sync_dma_open()
924 	c->regs[R1]&= ~TxINT_ENAB;  in z8530_sync_dma_open()
925 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_dma_open()
926 	c->regs[R1]|= WT_RDY_ENAB;  in z8530_sync_dma_open()
927 	write_zsreg(c, R1, c->regs[R1]);              in z8530_sync_dma_open()
1013 	c->regs[R1]&= ~WT_RDY_ENAB;  in z8530_sync_dma_close()
1014 	write_zsreg(c, R1, c->regs[R1]);              in z8530_sync_dma_close()
1015 	c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx);  in z8530_sync_dma_close()
1016 	c->regs[R1]|= INT_ALL_Rx;  in z8530_sync_dma_close()
1017 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_dma_close()
1110 	c->regs[R1]&= ~TxINT_ENAB;  in z8530_sync_txdma_open()
1111 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_txdma_open()
1182 	c->regs[R1]&= ~WT_RDY_ENAB;  in z8530_sync_txdma_close()
1183 	write_zsreg(c, R1, c->regs[R1]);              in z8530_sync_txdma_close()
1184 	c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx);  in z8530_sync_txdma_close()
1185 	c->regs[R1]|= INT_ALL_Rx;  in z8530_sync_txdma_close()
1186 	write_zsreg(c, R1, c->regs[R1]);  in z8530_sync_txdma_close()