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Searched refs:timers (Results 1 – 129 of 129) sorted by relevance

/linux-4.1.27/arch/powerpc/sysdev/
Dfsl_gtm.c76 struct gtm_timer timers[4]; member
99 for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { in gtm_get_timer16()
100 if (!gtm->timers[i].requested) { in gtm_get_timer16()
101 gtm->timers[i].requested = true; in gtm_get_timer16()
103 return &gtm->timers[i]; in gtm_get_timer16()
136 if (gtm->timers[timer].requested) in gtm_get_specific_timer16()
139 ret = &gtm->timers[timer]; in gtm_get_specific_timer16()
173 int num = tmr - &gtm->timers[0]; in gtm_set_ref_timer16()
309 int num = tmr - &gtm->timers[0]; in gtm_stop_timer16()
337 struct gtm_timer *timers, in gtm_set_shortcuts() argument
[all …]
/linux-4.1.27/drivers/clocksource/
Dbcm_kona_timer.c43 static struct kona_bcm_timers timers; variable
117 kona_timer_get_counter(timers.tmr_regs, &msw, &lsw); in kona_timer_set_next_event()
120 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET); in kona_timer_set_next_event()
123 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
125 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET); in kona_timer_set_next_event()
140 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_set_mode()
162 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_interrupt()
196 timers.tmr_irq = irq_of_parse_and_map(node, 0); in kona_timer_init()
199 timers.tmr_regs = of_iomap(node, 0); in kona_timer_init()
201 kona_timer_disable_and_clear(timers.tmr_regs); in kona_timer_init()
[all …]
DKconfig106 Support to use the timers of EFM32 SoCs as clock source and clock
154 This option enables support for the Meta per-thread timers.
/linux-4.1.27/drivers/char/
Dmmtimer.c248 static struct mmtimer_node *timers; variable
264 struct rb_node **link = &timers[nodeid].timer_head.rb_node; in mmtimer_add_list()
286 rb_insert_color(&n->list, &timers[nodeid].timer_head); in mmtimer_add_list()
288 if (!timers[nodeid].next || expires < rb_entry(timers[nodeid].next, in mmtimer_add_list()
290 timers[nodeid].next = &n->list; in mmtimer_add_list()
299 struct mmtimer_node *n = &timers[nodeid]; in mmtimer_set_next_timer()
532 spin_lock(&timers[indx].lock); in mmtimer_interrupt()
533 base = rb_entry(timers[indx].next, struct mmtimer, list); in mmtimer_interrupt()
535 spin_unlock(&timers[indx].lock); in mmtimer_interrupt()
546 tasklet_schedule(&timers[indx].tasklet); in mmtimer_interrupt()
[all …]
DKconfig524 open selects one of the timers supported by the HPET. The timers are
/linux-4.1.27/arch/arm/mach-davinci/
Dtime.c102 static struct timer_s timers[]; variable
127 soc_info->timer_info->timers; in timer32_config()
128 int event_timer = ID_TO_TIMER(timers[TID_CLOCKEVENT].id); in timer32_config()
179 static struct timer_s timers[] = { variable
202 struct davinci_timer_instance *dtip = soc_info->timer_info->timers; in timer_init()
236 for (i=0; i< ARRAY_SIZE(timers); i++) { in timer_init()
237 struct timer_s *t = &timers[i]; in timer_init()
273 struct timer_s *t = &timers[TID_CLOCKSOURCE]; in read_cycles()
290 return timer32_read(&timers[TID_CLOCKSOURCE]); in davinci_read_sched_clock()
299 struct timer_s *t = &timers[TID_CLOCKEVENT]; in davinci_set_next_event()
[all …]
Ddm644x.c822 .timers = davinci_timer_instance,
Ddm646x.c806 .timers = davinci_timer_instance,
Ddm355.c928 .timers = davinci_timer_instance,
Ddm365.c1048 .timers = davinci_timer_instance,
Dda850.c906 .timers = da850_timer_instance,
Dda830.c1186 .timers = da830_timer_instance,
/linux-4.1.27/arch/m68k/coldfire/
DMakefile18 obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
19 obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
22 obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
23 obj-$(CONFIG_M525x) += m525x.o timers.o intc.o intc-525x.o reset.o
25 obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
27 obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
28 obj-$(CONFIG_M53xx) += m53xx.o timers.o intc-simr.o reset.o
29 obj-$(CONFIG_M5407) += m5407.o timers.o intc.o reset.o
/linux-4.1.27/Documentation/devicetree/bindings/pwm/
Dpwm-samsung.txt1 * Samsung PWM timers
4 and clock event timers, as well as to drive SoC outputs with PWM signal. Each
12 samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
13 samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
14 samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
15 samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
17 samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
23 - "timers" - PWM base clock used to generate PWM signals,
48 clock-names = "timers";
/linux-4.1.27/Documentation/timers/
Dhrtimers.txt2 hrtimers - subsystem for high-resolution kernel timers
5 This patch introduces a new subsystem for high-resolution kernel timers.
8 (kernel/timers.c), why do we need two timer subsystems? After a lot of
18 - the forced handling of low-resolution and high-resolution timers in
20 mess. The timers.c code is very "tightly coded" around jiffies and
27 high-res timers.
30 necessitate a more complex handling of high resolution timers, which
34 degrading other portions of the timers.c code in an unacceptable way.
38 the required readjusting of absolute CLOCK_REALTIME timers at
41 timers.
[all …]
D00-INDEX4 - High resolution timers and dynamic ticks design notes
10 - subsystem for high-resolution kernel timers
17 timers-howto.txt
Dhpet.txt12 also called "timers", which can be misleading since usually timers are
19 mode where the first two comparators block interrupts from 8254 timers
30 file:Documentation/timers/hpet_example.c
Dhighres.txt1 High resolution timers and dynamic ticks design notes
33 the base implementation are covered in Documentation/timers/hrtimers.txt. See
37 timers are:
79 functionality like high resolution timers or dynamic ticks.
99 accounting, profiling, and high resolution timers.
130 enabling of high resolution timers and dynamic ticks is simply provided by
152 configured for high resolution timers can run on a system which lacks the
163 The time ordered insertion of timers provides all the infrastructure to decide
171 from the clock event distribution code and moves expired timers from the
198 timers. The execution of this softirq can still be delayed by other softirqs,
Dtimekeeping.txt1 Clock sources, Clock events, sched_clock() and delay timers
12 delay timers.
16 on this timeline, providing facilities such as high-resolution timers.
17 sched_clock() is used for scheduling and timestamping, and delay timers
159 Delay timers (some architectures only)
Dtimer_stats.txt11 their code does not make unduly use of timers. This helps to avoid unnecessary
DNO_HZ.txt161 3. POSIX CPU timers prevent CPUs from entering adaptive-tick mode.
/linux-4.1.27/arch/x86/platform/intel-mid/
Dintel-mid.c91 x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; in intel_mid_time_init()
97 x86_init.timers.setup_percpu_clockev = setup_boot_APIC_clock; in intel_mid_time_init()
167 x86_init.timers.timer_init = intel_mid_time_init; in x86_intel_mid_early_setup()
168 x86_init.timers.setup_percpu_clockev = x86_init_noop; in x86_intel_mid_early_setup()
178 x86_init.timers.wallclock_init = intel_mid_rtc_init; in x86_intel_mid_early_setup()
/linux-4.1.27/Documentation/devicetree/bindings/powerpc/fsl/
Dmpic-timer.txt1 * Freescale MPIC timers
12 all timers within the group can be used.
16 interrupts that correspond to available timers shall be present.
24 /* Another AMP partition is using timers 0 and 1 */
Dmpic.txt208 * global timers. Note the interrupt
Dmpc5200.txt84 timer@<addr> fsl,mpc5200-gpt General purpose timers
/linux-4.1.27/Documentation/devicetree/bindings/timer/
Dsamsung,exynos4210-mct.txt4 global timer and CPU local timers. The global timer is a 64-bit free running
6 four preset counter values. The CPU local timers are 32-bit free running
34 For MCT block that uses a per-processor interrupt for local timers, such
36 interrupt might be specified, meaning that all local timers use the same
39 Example 1: In this example, the IP contains two local timers, using separate
73 Example 3: In this example, the IP contains four local timers, but using
Dti,keystone-timer.txt5 timer, dual general-purpose 32-bit timers. When configured as dual 32-bit
6 timers, each half can operate in conjunction (chain mode) or independently
Dmarvell,armada-370-xp-timer.txt11 - reg: Should contain location and length for timers register. First
13 local/private timers.
Dmediatek,mtk-timer.txt6 - reg: Should contain location and length for timers register.
Dstericsson-u300-apptimer.txt10 then GP1 and GP2, which are general-purpose timers.
Dallwinner,sun5i-a13-hstimer.txt8 - interrupts : The interrupts of these timers (2 for the sun5i IP, 4 for the sun7i
Denergymicro,efm32-timer.txt3 The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be
/linux-4.1.27/arch/arc/kernel/
Dsetup.c53 READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers); in read_arc_build_cfg_regs()
184 IS_AVAIL1(cpu->timers.t0, "Timer0 "), in arc_cpu_mumbojumbo()
185 IS_AVAIL1(cpu->timers.t1, "Timer1 "), in arc_cpu_mumbojumbo()
186 IS_AVAIL2(cpu->timers.rtsc, "64-bit RTSC ", CONFIG_ARC_HAS_RTSC)); in arc_cpu_mumbojumbo()
251 if (!cpu->timers.t0) in arc_chk_core_config()
254 if (!cpu->timers.t1) in arc_chk_core_config()
257 if (IS_ENABLED(CONFIG_ARC_HAS_RTSC) && !cpu->timers.rtsc) in arc_chk_core_config()
/linux-4.1.27/Documentation/devicetree/bindings/arm/
Dglobal_timer.txt8 * "arm,cortex-a5-global-timer" for Cortex-A5 global timers.
10 timers or any compatible implementation. Note: driver
Darch_timer.txt3 ARM cores may have a per-core architected timer, which provides per-cpu timers,
18 hypervisor timers, in that order.
64 - interrupts : Interrupt list for physical and virtual timers in that order.
Dpicoxcell.txt17 Note: two timers are required - one for the scheduler clock and one for the
Dvexpress.txt146 - SP804 timers:
/linux-4.1.27/kernel/time/
DMakefile1 obj-y += time.o timer.o hrtimer.o itimer.o posix-timers.o posix-cpu-timers.o
Dposix-cpu-timers.c808 check_timers_list(struct list_head *timers, in check_timers_list() argument
814 while (!list_empty(timers)) { in check_timers_list()
817 t = list_first_entry(timers, struct cpu_timer_list, entry); in check_timers_list()
837 struct list_head *timers = tsk->cpu_timers; in check_thread_timers() local
843 expires = check_timers_list(timers, firing, prof_ticks(tsk)); in check_thread_timers()
846 expires = check_timers_list(++timers, firing, virt_ticks(tsk)); in check_thread_timers()
849 tsk_expires->sched_exp = check_timers_list(++timers, firing, in check_thread_timers()
938 struct list_head *timers = sig->cpu_timers; in check_process_timers() local
950 prof_expires = check_timers_list(timers, firing, ptime); in check_process_timers()
951 virt_expires = check_timers_list(++timers, firing, utime); in check_process_timers()
[all …]
/linux-4.1.27/drivers/misc/
Dcs5535-mfgpt.c294 int timers = 0; in scan_timers() local
311 timers++; in scan_timers()
316 return timers; in scan_timers()
DKconfig233 drivers that need timers. MFGPTs are available in the CS5535 and
236 than the generic PIT, and are suitable for use as high-res timers.
258 generic PIT, and are suitable for use as high-res timers.
/linux-4.1.27/Documentation/
DMakefile3 networking pcmcia prctl ptp spi timers vDSO video4linux \
Dkselftest.txt39 $ make TARGETS="size timers" kselftest
Dkernel-per-CPU-kthreads.txt74 recurring timers to migrate elsewhere. If you are concerned
130 timers to migrate elsewhere. If you are concerned with multiple
Dcpu-hotplug.txt254 - timers/bottom half/task lets are also migrated to a new CPU
375 returns. Including local APIC timers etc are
Drtc.txt207 If all else fails, check out the tools/testing/selftests/timers/rtctest.c test!
Dsysrq.txt103 timer_list timers) and detailed information about all
D00-INDEX212 timers/
Dkernel-parameters.txt2048 mfgptfix [X86-32] Fix MFGPT timers on AMD Geode platforms when
2434 nojitter [IA-64] Disables jitter checking for ITC timers.
2909 too many POSIX.1 timers, fatal signals causing a
3994 watchdog timers [HW,WDT] For information on watchdog timers,
Dkernel-docs.txt202 user memory, memory allocation, timers.
/linux-4.1.27/arch/m68k/68000/
DMakefile12 obj-y += entry.o ints.o timers.o
/linux-4.1.27/Documentation/devicetree/bindings/interrupt-controller/
Dmips-gic.txt6 global timer, per-CPU count/compare timers, and a watchdog.
33 - clock-frequency : Clock frequency at which the GIC timers operate.
/linux-4.1.27/arch/x86/kernel/
Dtime.c86 x86_init.timers.timer_init(); in x86_late_time_init()
Dx86_init.c70 .timers = {
Dhpet.c139 u32 i, timers, l, h; in _hpet_print_config() local
143 timers = ((l & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT) + 1; in _hpet_print_config()
152 for (i = 0; i < timers; i++) { in _hpet_print_config()
Dtsc.c1170 x86_init.timers.tsc_pre_init(); in tsc_init()
Dsetup.c1255 x86_init.timers.wallclock_init(); in setup_arch()
/linux-4.1.27/arch/x86/xen/
Dtime.c513 x86_init.timers.timer_init = xen_time_init; in xen_init_time_ops()
514 x86_init.timers.setup_percpu_clockev = x86_init_noop; in xen_init_time_ops()
551 x86_init.timers.setup_percpu_clockev = xen_time_init; in xen_hvm_init_time_ops()
/linux-4.1.27/Documentation/devicetree/bindings/c6x/
Dtimer64.txt4 The timer64 node describes C6X event timers.
/linux-4.1.27/arch/arm/mach-davinci/include/mach/
Dcommon.h34 struct davinci_timer_instance *timers; member
/linux-4.1.27/arch/powerpc/kvm/
Dmpic.c230 } timers[MAX_TMR]; member
555 opp->timers[i].tccr = 0; in openpic_reset()
556 opp->timers[i].tbcr = TBCR_CI; in openpic_reset()
831 if ((opp->timers[idx].tccr & TCCR_TOG) != 0 && in openpic_tmr_write()
833 (opp->timers[idx].tbcr & TBCR_CI) != 0) in openpic_tmr_write()
834 opp->timers[idx].tccr &= ~TCCR_TOG; in openpic_tmr_write()
836 opp->timers[idx].tbcr = val; in openpic_tmr_write()
868 retval = opp->timers[idx].tccr; in openpic_tmr_read()
871 retval = opp->timers[idx].tbcr; in openpic_tmr_read()
/linux-4.1.27/Documentation/devicetree/bindings/metag/
Dmeta.txt21 - "core": The Meta core clock from which the Meta timers are derived.
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmsmac/
Dmac80211_if.h78 struct brcms_timer *timers; /* timer cleanup queue */ member
Dmac80211_if.c320 for (t = wl->timers; t; t = next) { in brcms_free()
1475 t->next = wl->timers; in brcms_init_timer()
1476 wl->timers = t; in brcms_init_timer()
1542 if (wl->timers == t) { in brcms_free_timer()
1543 wl->timers = wl->timers->next; in brcms_free_timer()
1552 tmp = wl->timers; in brcms_free_timer()
/linux-4.1.27/tools/testing/selftests/
DMakefile17 TARGETS += timers
/linux-4.1.27/arch/x86/include/asm/
Dx86_init.h129 struct x86_init_timers timers; member
/linux-4.1.27/Documentation/devicetree/bindings/arm/msm/
Dtimer.txt6 properties specify which subsystem the timers are paired with.
/linux-4.1.27/Documentation/devicetree/bindings/arm/omap/
Dtimer.txt7 newer timers that are not 100% register compatible.
/linux-4.1.27/arch/arm/boot/dts/
Ds3c2416.dtsi48 clock-names = "timers";
Dstih407-clock.dtsi25 * ARM Peripheral clock for timers
68 * ARM Peripheral clock for timers
Dstih410-clock.dtsi28 * ARM Peripheral clock for timers
70 * ARM Peripheral clock for timers
Dstih418-clock.dtsi28 * ARM Peripheral clock for timers
70 * ARM Peripheral clock for timers
Ds3c64xx.dtsi171 clock-names = "timers";
Dstih415-clock.dtsi523 * ARM Peripheral clock for timers
Ds5pv210.dtsi305 clock-names = "timers";
Dexynos4.dtsi629 clock-names = "timers";
Dste-nomadik-stn8815.dtsi183 * divided by 8. This clock is used by the timers and
Dexynos5250.dtsi661 clock-names = "timers";
Dstih416-clock.dtsi526 * ARM Peripheral clock for timers
Dexynos5420.dtsi525 clock-names = "timers";
/linux-4.1.27/net/sctp/
Dsm_sideeffect.c299 if (!mod_timer(&asoc->timers[timeout_type], jiffies + (HZ/20))) in sctp_generate_timeout_event()
1482 timer = &asoc->timers[cmd->obj.to]; in sctp_cmd_interpreter()
1489 timer = &asoc->timers[cmd->obj.to]; in sctp_cmd_interpreter()
1499 timer = &asoc->timers[cmd->obj.to]; in sctp_cmd_interpreter()
1506 timer = &asoc->timers[cmd->obj.to]; in sctp_cmd_interpreter()
Doutput.c238 timer = &asoc->timers[SCTP_EVENT_TIMEOUT_SACK]; in sctp_packet_bundle_sack()
584 timer = &asoc->timers[SCTP_EVENT_TIMEOUT_AUTOCLOSE]; in sctp_packet_transmit()
Dchunk.c228 if (timer_pending(&asoc->timers[SCTP_EVENT_TIMEOUT_SACK]) && in sctp_datamsg_from_user()
Dassociola.c153 setup_timer(&asoc->timers[i], sctp_timer_events[i], in sctp_association_init()
372 if (del_timer(&asoc->timers[i])) in sctp_association_free()
1492 timer = &asoc->timers[SCTP_EVENT_TIMEOUT_SACK]; in sctp_assoc_rwnd_increase()
Doutqueue.c1496 del_timer(&asoc->timers in sctp_check_transmitted()
/linux-4.1.27/Documentation/watchdog/
Dwdt.txt14 boards physically pull the machine down off their own onboard timers and
Dwatchdog-api.txt109 Some watchdog timers can be set to have a trigger go off before the
/linux-4.1.27/Documentation/devicetree/bindings/power/reset/
Dkeystone-reset.txt6 The Keystone SoCs can contain up to 4 watchdog timers to reset
/linux-4.1.27/arch/arc/include/asm/
Darcregs.h323 struct bcr_timer timers; member
/linux-4.1.27/arch/mips/dec/
Dint-handler.S221 FEXPORT(cpu_all_int) # HALT, timers, software junk
/linux-4.1.27/arch/mips/include/asm/ip32/
Dmace.h301 struct mace_timers timers; member
/linux-4.1.27/arch/frv/kernel/
Dhead-uc-fr451.S163 # turn on the timers as appropriate
/linux-4.1.27/drivers/isdn/hardware/mISDN/
Dhfcsusb.h303 __u8 timers; member
Dhfcsusb.c644 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
651 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
654 hw->timers |= NT_ACTIVATION_TIMER; in ph_state_nt()
662 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
670 hw->timers &= ~NT_ACTIVATION_TIMER; in ph_state_nt()
1366 && (hw->timers & NT_ACTIVATION_TIMER)) { in tx_iso_complete()
/linux-4.1.27/arch/mips/loongson/
DKconfig104 switched on you can not use high resolution timers.
/linux-4.1.27/Documentation/virtual/kvm/
Dtimekeeping.txt51 available, but not all modes are available to all timers, as only timer 2
81 when the gate is high (always true for timers 0 and 1). When the count
119 timers.
287 The HPET spec is rather loose and vague, requiring at least 3 hardware timers,
559 An additional concern is that timers based off the TSC (or HPET, if the raw bus
561 in some way in the hypervisor by virtualizing these timers. In addition,
584 Watchdog timers, such as the lock detector in Linux may fire accidentally when
/linux-4.1.27/Documentation/leds/
Dledtrig-transient.txt5 a one shot timer. The current support allows for setting two timers, one for
40 changes are suspended while the driver is in suspend state. Any timers
Dleds-class.txt69 timers that may have been required for blinking.
/linux-4.1.27/arch/powerpc/boot/dts/
Dmucmc52.dts22 /* Disabled timers */
/linux-4.1.27/drivers/net/wireless/ath/ath9k/
Dhw.c3017 timer_table->timers[timer_index] = timer; in ath_gen_timer_alloc()
3119 timer_table->timers[timer->index] = NULL; in ath_gen_timer_free()
3140 for_each_set_bit(index, &thresh_mask, ARRAY_SIZE(timer_table->timers)) { in ath_gen_timer_isr()
3141 timer = timer_table->timers[index]; in ath_gen_timer_isr()
3151 for_each_set_bit(index, &trigger_mask, ARRAY_SIZE(timer_table->timers)) { in ath_gen_timer_isr()
3152 timer = timer_table->timers[index]; in ath_gen_timer_isr()
Dhw.h554 struct ath_gen_timer *timers[ATH_MAX_GEN_TIMER]; member
/linux-4.1.27/Documentation/arm64/
Dbooting.txt154 - Architected timers
180 timers, coherency and system registers apply to all CPUs. All CPUs must
/linux-4.1.27/Documentation/networking/
Dtcp.txt103 backoff timers etc. A change of route table stamp causes a change of header
Dcan.txt30 4.2.3 Broadcast Manager transmission timers
32 4.2.5 Broadcast Manager receive filter timers
767 4.2.3 Broadcast Manager transmission timers
769 Periodic transmission configurations may use up to two interval timers.
773 When SET_TIMER and START_TIMER flag were set the timers are activated.
798 4.2.5 Broadcast Manager receive filter timers
801 When the SET_TIMER flag is set the timers are enabled:
Dppp_generic.txt385 the transmit and receive idle timers is restricted to those which
/linux-4.1.27/arch/arm/plat-omap/
DKconfig138 Select this option if you want to use OMAP Dual-Mode timers.
/linux-4.1.27/Documentation/RCU/
Drcubarrier.txt184 module invokes call_rcu() from timers, you will need to first cancel all
185 the timers, and only then invoke rcu_barrier() to wait for any remaining
Dtorture.txt56 done via timers. Defaults to "1" for variants of RCU that
/linux-4.1.27/arch/cris/
DKconfig106 timer1 to get sub jiffie resolution timers (primarily one-shot
107 timers).
/linux-4.1.27/arch/m68k/q40/
DREADME91 The Q40 custom chip is programmable to provide 2 periodic timers:
/linux-4.1.27/Documentation/x86/
Dearlyprintk.txt126 …memory-usage(M) nice-all-RT-tasks(N) powerOff show-registers(P) show-all-timers(Q) unRaw Sync show…
/linux-4.1.27/Documentation/locking/
Dmutex-design.txt100 contexts such as tasklets and timers.
/linux-4.1.27/Documentation/sound/alsa/
DProcfile.txt199 Lists the currently allocated/running sequencer timers.
/linux-4.1.27/arch/arm64/boot/dts/exynos/
Dexynos7.dtsi525 clock-names = "timers";
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb3/
Dt3_hw.c2574 unsigned int timers = 0, timers_shift = 22; in partition_mem() local
2578 timers = 1; in partition_mem()
2581 timers = 2; in partition_mem()
2584 timers = 3; in partition_mem()
2611 t3_write_reg(adap, A_TP_CMM_TIMER_BASE, V_CMTIMERMAXNUM(timers) | m); in partition_mem()
/linux-4.1.27/arch/x86/lguest/
Dboot.c1489 x86_init.timers.timer_init = lguest_time_init; in lguest_init()
/linux-4.1.27/drivers/net/ethernet/intel/i40e/
Di40e_type.h1402 u16 timers; member
/linux-4.1.27/arch/powerpc/platforms/
DKconfig92 chip, but it can potentially support other global timers
/linux-4.1.27/include/net/sctp/
Dstructs.h1602 struct timer_list timers[SCTP_NUM_TIMEOUT_TYPES]; member
/linux-4.1.27/Documentation/scsi/
DChangeLog.lpfc801 * Move stopping timers till just before lpfc_mem_free() call.
803 * Cleanup possible outstanding discovery timers on rmmod.
993 separate timers and convert to 1 argument changed
1014 * Remove qfull timers and qfull logic.
1037 * Clock changes consolidating timers, just in the struct lpfc_hba,
1040 to stop these timers at rmmod.
1386 * Free irq reservation and kill running timers when insmod or
/linux-4.1.27/arch/x86/kernel/acpi/
Dboot.c1355 x86_init.timers.timer_init = x86_init_noop; in acpi_reduced_hw_init()
/linux-4.1.27/drivers/media/rc/
DKconfig343 The driver uses omap DM timers for generating the carrier
/linux-4.1.27/arch/x86/kernel/apic/
Dapic.c2193 x86_init.timers.setup_percpu_clockev(); in apic_bsp_setup()
/linux-4.1.27/arch/cris/arch-v10/drivers/
DKconfig19 bool "Use fast timers for serial DMA flush (experimental)"
/linux-4.1.27/Documentation/PCI/
Dpci-error-recovery.txt131 a chance to cleanup, waiting for pending stuff (timers, whatever, etc...)
/linux-4.1.27/drivers/watchdog/
DKconfig1167 SoC processors. There are apparently two watchdog timers
1411 This is the driver for the hardware watchdog timers present on
/linux-4.1.27/lib/
DKconfig.debug882 bool "Collect kernel timers statistics"
886 timer routines to collect statistics about kernel timers being
/linux-4.1.27/
DMAINTAINERS2594 T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
4649 T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
4651 F: Documentation/timers/
4702 F: Documentation/timers/hpet.txt
7778 T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
8646 T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
8656 F: tools/testing/selftests/timers/
/linux-4.1.27/arch/x86/
DKconfig759 as it is off-chip. APB timers are always running regardless of CPU