Searched refs:sysc (Results 1 - 30 of 30) sorted by relevance

/linux-4.1.27/arch/arm/mach-omap2/
H A Domap_hwmod_common_ipblock_data.c32 .sysc = &omap2_dss_sysc,
53 .sysc = &omap2_rfbi_sysc,
H A Domap_hwmod_33xx_43xx_ipblock_data.c217 .sysc = &am33xx_aes0_sysc,
242 .sysc = &am33xx_sha0_sysc,
330 .sysc = &am33xx_cpgmac_sysc,
408 .sysc = &am33xx_elm_sysc,
436 .sysc = &am33xx_epwmss_sysc,
579 .sysc = &am33xx_gpio_sysc,
664 .sysc = &gpmc_sysc,
694 .sysc = &am33xx_i2c_sysc,
764 .sysc = &am33xx_mailbox_sysc,
792 .sysc = &am33xx_mcasp_sysc,
835 .sysc = &am33xx_mmc_sysc,
906 .sysc = &am33xx_rtc_sysc,
935 .sysc = &am33xx_mcspi_sysc,
989 .sysc = &am33xx_spinlock_sysc,
1017 .sysc = &am33xx_timer_sysc,
1034 .sysc = &am33xx_timer1ms_sysc,
1150 .sysc = &am33xx_tptc_sysc,
1209 .sysc = &uart_sysc,
1305 .sysc = &wdt_sysc,
H A Dwd_timer.c88 oh->class->sysc->syss_offs) omap2_wd_timer_reset()
92 if (oh->class->sysc->srst_udelay) omap2_wd_timer_reset()
93 udelay(oh->class->sysc->srst_udelay); omap2_wd_timer_reset()
H A Domap_hwmod_2xxx_ipblock_data.c46 .sysc = &omap2_dispc_sysc,
64 .sysc = &omap2xxx_timer_sysc,
84 .sysc = &omap2xxx_wd_timer_sysc,
106 .sysc = &omap2xxx_gpio_sysc,
124 .sysc = &omap2xxx_dma_sysc,
145 .sysc = &omap2xxx_mailbox_sysc,
167 .sysc = &omap2xxx_mcspi_sysc,
188 .sysc = &omap2xxx_gpmc_sysc,
797 .sysc = &omap2_rng_sysc,
835 .sysc = &omap2_sham_sysc,
866 .sysc = &omap2_aes_sysc,
H A Domap_hwmod.c268 if (!oh->class->sysc) { _update_sysc_cache()
275 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs); _update_sysc_cache()
277 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) _update_sysc_cache()
293 if (!oh->class->sysc) { _write_sysconfig()
302 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); _write_sysconfig()
321 if (!oh->class->sysc || _set_master_standbymode()
322 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) _set_master_standbymode()
325 if (!oh->class->sysc->sysc_fields) { _set_master_standbymode()
330 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; _set_master_standbymode()
354 if (!oh->class->sysc || _set_slave_idlemode()
355 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) _set_slave_idlemode()
358 if (!oh->class->sysc->sysc_fields) { _set_slave_idlemode()
363 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; _set_slave_idlemode()
388 if (!oh->class->sysc || _set_clockactivity()
389 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) _set_clockactivity()
392 if (!oh->class->sysc->sysc_fields) { _set_clockactivity()
397 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; _set_clockactivity()
418 if (!oh->class->sysc || _set_softreset()
419 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) _set_softreset()
422 if (!oh->class->sysc->sysc_fields) { _set_softreset()
427 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); _set_softreset()
446 if (!oh->class->sysc || _clear_softreset()
447 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) _clear_softreset()
450 if (!oh->class->sysc->sysc_fields) { _clear_softreset()
457 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); _clear_softreset()
476 struct omap_hwmod_class_sysconfig *sysc; _wait_softreset_complete() local
480 sysc = oh->class->sysc; _wait_softreset_complete()
482 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS) _wait_softreset_complete()
483 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs) _wait_softreset_complete()
486 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { _wait_softreset_complete()
487 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift); _wait_softreset_complete()
488 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs) _wait_softreset_complete()
513 if (!oh->class->sysc || _set_dmadisable()
514 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE)) _set_dmadisable()
517 if (!oh->class->sysc->sysc_fields) { _set_dmadisable()
532 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift); _set_dmadisable()
558 if (!oh->class->sysc || _set_module_autoidle()
559 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) _set_module_autoidle()
562 if (!oh->class->sysc->sysc_fields) { _set_module_autoidle()
567 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; _set_module_autoidle()
630 if (!oh->class->sysc || _enable_wakeup()
631 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || _enable_wakeup()
632 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || _enable_wakeup()
633 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) _enable_wakeup()
636 if (!oh->class->sysc->sysc_fields) { _enable_wakeup()
641 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) _enable_wakeup()
642 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; _enable_wakeup()
644 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _enable_wakeup()
646 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) _enable_wakeup()
663 if (!oh->class->sysc || _disable_wakeup()
664 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || _disable_wakeup()
665 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || _disable_wakeup()
666 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) _disable_wakeup()
669 if (!oh->class->sysc->sysc_fields) { _disable_wakeup()
674 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) _disable_wakeup()
675 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); _disable_wakeup()
677 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _disable_wakeup()
679 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) _disable_wakeup()
1336 if (!oh->class->sysc) _enable_sysc()
1352 sf = oh->class->sysc->sysc_flags; _enable_sysc()
1362 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _enable_sysc()
1373 if (clkdm_act && !(oh->class->sysc->idlemodes & _enable_sysc()
1388 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) _enable_sysc()
1403 _set_clockactivity(oh, oh->class->sysc->clockact, &v); _enable_sysc()
1433 if (!oh->class->sysc) _idle_sysc()
1437 sf = oh->class->sysc->sysc_flags; _idle_sysc()
1445 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) _idle_sysc()
1460 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) _idle_sysc()
1485 if (!oh->class->sysc) _shutdown_sysc()
1489 sf = oh->class->sysc->sysc_flags; _shutdown_sysc()
1857 if (!oh->class->sysc || _ocp_softreset()
1858 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) _ocp_softreset()
1881 if (oh->class->sysc->srst_udelay) _ocp_softreset()
1882 udelay(oh->class->sysc->srst_udelay); _ocp_softreset()
1972 if (oh->class->sysc) { _reset()
2159 if (oh->class->sysc) { _enable()
2205 if (oh->class->sysc) _idle()
2275 if (oh->class->sysc) { _shutdown()
2404 /* if we don't need sysc access we don't need to ioremap */ _init_mpu_rt_base()
2405 if (!oh->class->sysc) _init_mpu_rt_base()
2408 /* we can't continue without MPU PORT if we need sysc access */ _init_mpu_rt_base()
3661 if (oh->class->sysc && omap_hwmod_enable_wakeup()
3662 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { omap_hwmod_enable_wakeup()
3694 if (oh->class->sysc && omap_hwmod_disable_wakeup()
3695 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { omap_hwmod_disable_wakeup()
H A Domap_hwmod_54xx_data.c228 .sysc = &omap54xx_counter_sysc,
267 .sysc = &omap54xx_dma_sysc,
319 .sysc = &omap54xx_dmic_sysc,
349 .sysc = &omap54xx_dss_sysc,
397 .sysc = &omap54xx_dispc_sysc,
446 .sysc = &omap54xx_dsi1_sysc,
508 .sysc = &omap54xx_hdmi_sysc,
548 .sysc = &omap54xx_rfbi_sysc,
582 .sysc = &omap54xx_emif_sysc,
636 .sysc = &omap54xx_gpio_sysc,
848 .sysc = &omap54xx_i2c_sysc,
959 .sysc = &omap54xx_kbd_sysc,
994 .sysc = &omap54xx_mailbox_sysc,
1025 .sysc = &omap54xx_mcbsp_sysc,
1113 .sysc = &omap54xx_mcpdm_sysc,
1162 .sysc = &omap54xx_mcspi_sysc,
1269 .sysc = &omap54xx_mmc_sysc,
1378 .sysc = &omap54xx_mmu_sysc,
1467 .sysc = &omap54xx_spinlock_sysc,
1501 .sysc = &omap54xx_ocp2scp_sysc,
1538 .sysc = &omap54xx_timer_1ms_sysc,
1553 .sysc = &omap54xx_timer_sysc,
1743 .sysc = &omap54xx_uart_sysc,
1857 .sysc = &omap54xx_usb_host_hs_sysc,
1931 .sysc = &omap54xx_usb_tll_hs_sysc,
1966 .sysc = &omap54xx_usb_otg_ss_sysc,
2010 .sysc = &omap54xx_wd_timer_sysc,
2073 .sysc = &omap54xx_sata_sysc,
H A Domap_hwmod_81xx_data.c197 .sysc = &uart_sysc,
274 .sysc = &wd_timer_sysc,
314 .sysc = &i2c_sysc,
370 .sysc = &dm81xx_elm_sysc,
400 .sysc = &dm81xx_gpio_sysc,
473 .sysc = &dm81xx_gpmc_sysc,
506 .sysc = &dm81xx_usbhsotg_sysc,
541 .sysc = &dm816x_timer_sysc,
705 .sysc = &dm816x_emac_sysc,
727 .sysc = &dm816x_emac_sysc,
788 .sysc = &dm816x_mmc_sysc,
836 .sysc = &dm816x_mcspi_sysc,
877 .sysc = &dm816x_mailbox_sysc,
H A Domap_hwmod_43xx_data.c109 .sysc = &am43xx_synctimer_sysc,
366 .sysc = &am43xx_usb_otg_ss_sysc,
405 .sysc = &am43xx_qspi_sysc,
436 .sysc = &am43xx_adc_tsc_sysc,
488 .sysc = &am43xx_dispc_sysc,
531 .sysc = &am43xx_hdq1w_sysc,
558 .sysc = &am43xx_vpfe_sysc,
H A Domap_hwmod_44xx_data.c270 .sysc = &omap44xx_aess_sysc,
328 .sysc = &omap44xx_counter_sysc,
363 .sysc = &omap44xx_ctrl_module_sysc,
458 .sysc = &omap44xx_dma_sysc,
510 .sysc = &omap44xx_dmic_sysc,
572 .sysc = &omap44xx_dss_sysc,
620 .sysc = &omap44xx_dispc_sysc,
675 .sysc = &omap44xx_dsi_sysc,
763 .sysc = &omap44xx_hdmi_sysc,
822 .sysc = &omap44xx_rfbi_sysc,
894 .sysc = &omap44xx_elm_sysc,
921 .sysc = &omap44xx_emif_sysc,
982 .sysc = &omap44xx_fdif_sysc,
1019 .sysc = &omap44xx_gpio_sysc,
1183 .sysc = &omap44xx_gpmc_sysc,
1226 .sysc = &omap44xx_gpu_sysc,
1260 .sysc = &omap44xx_hdq1w_sysc,
1300 .sysc = &omap44xx_hsi_sysc,
1337 .sysc = &omap44xx_i2c_sysc,
1473 .sysc = &omap44xx_iss_sysc,
1549 .sysc = &omap44xx_kbd_sysc,
1584 .sysc = &omap44xx_mailbox_sysc,
1620 .sysc = &omap44xx_mcasp_sysc,
1653 .sysc = &omap44xx_mcbsp_sysc,
1763 .sysc = &omap44xx_mcpdm_sysc,
1811 .sysc = &omap44xx_mcspi_sysc,
1956 .sysc = &omap44xx_mmc_sysc,
2093 .sysc = &mmu_sysc,
2254 .sysc = &omap44xx_ocp2scp_sysc,
2404 .sysc = &omap44xx_slimbus_sysc,
2474 .sysc = &omap44xx_smartreflex_sysc,
2558 .sysc = &omap44xx_spinlock_sysc,
2595 .sysc = &omap44xx_timer_1ms_sysc,
2610 .sysc = &omap44xx_timer_sysc,
2828 .sysc = &omap44xx_uart_sysc,
2919 .sysc = &omap44xx_usb_host_fs_sysc,
2956 .sysc = &omap44xx_usb_host_hs_sysc,
3034 .sysc = &omap44xx_usb_otg_hs_sysc,
3077 .sysc = &omap44xx_usb_tll_hs_sysc,
3113 .sysc = &omap44xx_wd_timer_sysc,
H A Domap_hwmod_33xx_data.c47 .sysc = &am33xx_emif_sysc,
119 .sysc = &am33xx_adc_tsc_sysc,
282 .sysc = &lcdc_sysc,
314 .sysc = &am33xx_usbhsotg_sysc,
530 .sysc = &am33xx_rng_sysc,
H A Domap_hwmod_7xx_data.c237 .sysc = &dra7xx_counter_sysc,
293 .sysc = &dra7xx_gmac_sysc,
386 .sysc = &dra7xx_dma_sysc,
424 .sysc = &dra7xx_dss_sysc,
481 .sysc = &dra7xx_dispc_sysc,
522 .sysc = &dra7xx_hdmi_sysc,
565 .sysc = &dra7xx_elm_sysc,
602 .sysc = &dra7xx_gpio_sysc,
813 .sysc = &dra7xx_gpmc_sysc,
850 .sysc = &dra7xx_hdq1w_sysc,
889 .sysc = &dra7xx_i2c_sysc,
1000 .sysc = &dra7xx_mailbox_sysc,
1189 .sysc = &dra7xx_mcspi_sysc,
1296 .sysc = &dra7xx_mmc_sysc,
1431 .sysc = &dra7xx_ocp2scp_sysc,
1518 .sysc = &dra7xx_qspi_sysc,
1550 .sysc = &dra7xx_rtcss_sysc,
1584 .sysc = &dra7xx_sata_sysc,
1626 .sysc = &dra7xx_smartreflex_sysc,
1690 .sysc = &dra7xx_spinlock_sysc,
1726 .sysc = &dra7xx_timer_1ms_sysc,
1741 .sysc = &dra7xx_timer_sysc,
1988 .sysc = &dra7xx_uart_sysc,
2169 .sysc = &dra7xx_usb_otg_ss_sysc,
2299 .sysc = &dra7xx_wd_timer_sysc,
2948 .name = "sysc",
H A Domap_hwmod_2xxx_3xxx_ipblock_data.c36 .sysc = &omap2_uart_sysc,
277 .sysc = &omap2_hdq1w_sysc,
H A Domap_hwmod_3xxx_data.c171 .sysc = &omap3xxx_timer_sysc,
462 .sysc = &omap3xxx_wd_timer_sysc,
622 .sysc = &i2c_sysc,
703 .sysc = &omap3_dispc_sysc,
903 .sysc = &omap3xxx_gpio_sysc,
1095 .sysc = &omap3xxx_dma_sysc,
1133 .sysc = &omap3xxx_mcbsp_sysc,
1314 .sysc = &omap3xxx_mcbsp_sidetone_sysc,
1375 .sysc = &omap34xx_sr_sysc,
1394 .sysc = &omap36xx_sr_sysc,
1506 .sysc = &omap3xxx_mailbox_sysc,
1561 .sysc = &omap34xx_mcspi_sysc,
1696 .sysc = &omap3xxx_usbhsotg_sysc,
1769 .sysc = &omap34xx_mmc_sysc,
1955 .sysc = &omap3xxx_usb_host_hs_sysc,
2039 .sysc = &omap3xxx_usb_tll_hs_sysc,
2121 .sysc = &omap3xxx_counter_sysc,
2158 .sysc = &omap3xxx_gpmc_sysc,
2983 .sysc = &mmu_sysc,
3542 .sysc = &omap3_sham_sysc,
3608 .sysc = &omap3_aes_sysc,
3667 .sysc = &omap34xx_ssi_sysc,
H A Dmsdi.c74 omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs) omap_msdi_reset()
H A Domap_hwmod_2430_data.c73 .sysc = &i2c_sysc,
214 .sysc = &omap2430_usbhsotg_sysc,
254 .sysc = &omap2430_mcbsp_sysc,
367 .sysc = &omap2430_mmc_sysc,
H A Dhdq1w.c65 oh->class->sysc->syss_offs) omap_hdq1w_reset()
H A Domap_hwmod_2420_data.c95 .sysc = &i2c_sysc,
240 .sysc = &omap2420_msdi_sysc,
H A Di2c.c97 oh->class->sysc->syss_offs) omap_i2c_reset()
H A Ddisplay.c525 if (!(oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)) { omap_dss_reset()
548 omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs) omap_dss_reset()
H A Domap_hwmod.h574 * @sysc: device SYSCONFIG/SYSSTATUS register data
598 struct omap_hwmod_class_sysconfig *sysc; member in struct:omap_hwmod_class
/linux-4.1.27/arch/mips/ralink/
H A Drt288x.c85 rt_sysc_membase = plat_of_remap_node("ralink,rt2880-sysc"); ralink_of_remap()
94 void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT2880_SYSC_BASE); prom_soc_init() local
100 n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); prom_soc_init()
101 n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); prom_soc_init()
102 id = __raw_readl(sysc + SYSC_REG_CHIP_ID); prom_soc_init()
H A Drt3883.c119 rt_sysc_membase = plat_of_remap_node("ralink,rt3883-sysc"); ralink_of_remap()
128 void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT3883_SYSC_BASE); prom_soc_init() local
134 n0 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID0_3); prom_soc_init()
135 n1 = __raw_readl(sysc + RT3883_SYSC_REG_CHIPID4_7); prom_soc_init()
136 id = __raw_readl(sysc + RT3883_SYSC_REG_REVID); prom_soc_init()
H A Drt305x.c107 void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE); rt5350_get_mem_size() local
111 t = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG); rt5350_get_mem_size()
215 rt_sysc_membase = plat_of_remap_node("ralink,rt3050-sysc"); ralink_of_remap()
224 void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE); prom_soc_init() local
230 n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); prom_soc_init()
231 n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); prom_soc_init()
262 id = __raw_readl(sysc + SYSC_REG_CHIP_ID); prom_soc_init()
H A Dmt7620.c430 rt_sysc_membase = plat_of_remap_node("ralink,mt7620a-sysc"); ralink_of_remap()
485 void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7620_SYSC_BASE); prom_soc_init() local
495 n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0); prom_soc_init()
496 n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1); prom_soc_init()
497 rev = __raw_readl(sysc + SYSC_REG_CHIP_REV); prom_soc_init()
527 cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0); prom_soc_init()
536 pmu0 = __raw_readl(sysc + PMU0_CFG); prom_soc_init()
537 pmu1 = __raw_readl(sysc + PMU1_CFG); prom_soc_init()
/linux-4.1.27/drivers/power/reset/
H A Drmobile-reset.c73 { .compatible = "renesas,sysc-rmobile", },
/linux-4.1.27/arch/arm/mach-shmobile/
H A Dpm-rcar.c104 pr_debug("sysc power domain %d: %08x -> %d\n", rcar_sysc_update()
H A Dpm-rmobile.c400 for_each_compatible_node(np, NULL, "renesas,sysc-rmobile") { rmobile_init_pm_domains()
/linux-4.1.27/drivers/i2c/busses/
H A Di2c-omap.c319 u16 sysc; omap_i2c_reset() local
322 sysc = omap_i2c_read_reg(dev, OMAP_I2C_SYSC_REG); omap_i2c_reset()
345 omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, sysc); omap_i2c_reset()
/linux-4.1.27/arch/powerpc/kvm/
H A Dbook3s.c50 { "sysc", VCPU_STAT(syscall_exits) },
H A Dbooke.c59 { "sysc", VCPU_STAT(syscall_exits) },

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