Searched refs:irq (Results 1 - 200 of 6020) sorted by relevance

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/linux-4.1.27/arch/sh/boards/mach-se/7721/
H A DMakefile1 obj-y := setup.o irq.o
/linux-4.1.27/arch/sh/boards/mach-sh7763rdp/
H A DMakefile1 obj-y := setup.o irq.o
/linux-4.1.27/include/linux/
H A Dirqnr.h8 extern struct irq_desc *irq_to_desc(unsigned int irq);
11 # define for_each_irq_desc(irq, desc) \
12 for (irq = 0, desc = irq_to_desc(irq); irq < nr_irqs; \
13 irq++, desc = irq_to_desc(irq)) \
19 # define for_each_irq_desc_reverse(irq, desc) \
20 for (irq = nr_irqs - 1, desc = irq_to_desc(irq); irq >= 0; \
21 irq--, desc = irq_to_desc(irq)) \
27 #define irq_node(irq) (irq_get_irq_data(irq)->node)
29 #define irq_node(irq) 0
32 # define for_each_active_irq(irq) \
33 for (irq = irq_get_next_irq(0); irq < nr_irqs; \
34 irq = irq_get_next_irq(irq + 1))
36 #define for_each_irq_nr(irq) \
37 for (irq = 0; irq < nr_irqs; irq++)
H A Dhtirq.h5 u32 address_lo; /* low 32 bits of the ht irq message */
6 u32 address_hi; /* high 32 bits of the it irq message */
10 void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg);
11 void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg);
17 int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev);
20 typedef void (ht_irq_update_t)(struct pci_dev *dev, int irq,
H A Dacpi_irq.h4 #include <linux/irq.h>
H A Db1pcmcia.h16 int b1pcmcia_addcard_b1(unsigned int port, unsigned irq);
17 int b1pcmcia_addcard_m1(unsigned int port, unsigned irq);
18 int b1pcmcia_addcard_m2(unsigned int port, unsigned irq);
19 int b1pcmcia_delcard(unsigned int port, unsigned irq);
/linux-4.1.27/arch/cris/include/asm/
H A Dirq.h4 #include <arch/irq.h>
6 static inline int irq_canonicalize(int irq) irq_canonicalize() argument
8 return irq; irq_canonicalize()
/linux-4.1.27/arch/mips/sibyte/bcm1480/
H A DMakefile1 obj-y := setup.o irq.o time.o
/linux-4.1.27/arch/mips/sibyte/sb1250/
H A DMakefile1 obj-y := setup.o irq.o time.o
/linux-4.1.27/arch/mips/include/asm/mach-vr41xx/
H A Dirq.h4 #include <asm/vr41xx/irq.h> /* for MIPS_CPU_IRQ_BASE */
6 #include_next <irq.h>
/linux-4.1.27/arch/mips/pci/
H A Dfixup-rbtx4938.c18 int irq = tx4938_pcic1_map_irq(dev, slot); rbtx4938_pci_map_irq() local
20 if (irq >= 0) rbtx4938_pci_map_irq()
21 return irq; rbtx4938_pci_map_irq()
22 irq = pin; rbtx4938_pci_map_irq()
24 irq--; /* 0-3 */ rbtx4938_pci_map_irq()
28 irq = (irq + 0 + slot) % 4; rbtx4938_pci_map_irq()
32 irq = (irq + 33 - slot) % 4; rbtx4938_pci_map_irq()
34 irq = (irq + 3 + slot) % 4; rbtx4938_pci_map_irq()
36 irq++; /* 1-4 */ rbtx4938_pci_map_irq()
38 switch (irq) { rbtx4938_pci_map_irq()
40 irq = RBTX4938_IRQ_IOC_PCIA; rbtx4938_pci_map_irq()
43 irq = RBTX4938_IRQ_IOC_PCIB; rbtx4938_pci_map_irq()
46 irq = RBTX4938_IRQ_IOC_PCIC; rbtx4938_pci_map_irq()
49 irq = RBTX4938_IRQ_IOC_PCID; rbtx4938_pci_map_irq()
52 return irq; rbtx4938_pci_map_irq()
H A Dpci-tx4939.c73 int irq = tx4939_pcic1_map_irq(dev, slot); tx4939_pci_map_irq() local
75 if (irq >= 0) tx4939_pci_map_irq()
76 return irq; tx4939_pci_map_irq()
77 irq = pin; tx4939_pci_map_irq()
79 irq--; /* 0-3 */ tx4939_pci_map_irq()
80 irq = (irq + 33 - slot) % 4; tx4939_pci_map_irq()
81 irq++; /* 1-4 */ tx4939_pci_map_irq()
83 switch (irq) { tx4939_pci_map_irq()
85 irq = TXX9_IRQ_BASE + TX4939_IR_INTA; tx4939_pci_map_irq()
88 irq = TXX9_IRQ_BASE + TX4939_IR_INTB; tx4939_pci_map_irq()
91 irq = TXX9_IRQ_BASE + TX4939_IR_INTC; tx4939_pci_map_irq()
94 irq = TXX9_IRQ_BASE + TX4939_IR_INTD; tx4939_pci_map_irq()
97 return irq; tx4939_pci_map_irq()
106 pr_warn("Failed to request irq for PCIERR\n"); tx4939_setup_pcierr_irq()
H A Dfixup-jmr3927.c36 unsigned char irq = pin; jmr3927_pci_map_irq() local
39 irq--; /* 0-3 */ jmr3927_pci_map_irq()
44 irq = (irq + 2) % 4; jmr3927_pci_map_irq()
49 irq = (irq + 0) % 4; jmr3927_pci_map_irq()
53 irq = (irq + 33 - slot) % 4; jmr3927_pci_map_irq()
55 irq = (irq + 3 + slot) % 4; jmr3927_pci_map_irq()
57 irq++; /* 1-4 */ jmr3927_pci_map_irq()
59 switch (irq) { jmr3927_pci_map_irq()
61 irq = JMR3927_IRQ_IOC_PCIA; jmr3927_pci_map_irq()
64 irq = JMR3927_IRQ_IOC_PCIB; jmr3927_pci_map_irq()
67 irq = JMR3927_IRQ_IOC_PCIC; jmr3927_pci_map_irq()
70 irq = JMR3927_IRQ_IOC_PCID; jmr3927_pci_map_irq()
77 irq = JMR3927_IRQ_ETHER0; jmr3927_pci_map_irq()
78 return irq; jmr3927_pci_map_irq()
H A Dfixup-rbtx4927.c41 unsigned char irq = pin; rbtx4927_pci_map_irq() local
44 irq--; /* 0-3 */ rbtx4927_pci_map_irq()
48 irq = (irq + 0 + slot) % 4; rbtx4927_pci_map_irq()
52 irq = (irq + 33 - slot) % 4; rbtx4927_pci_map_irq()
54 irq = (irq + 3 + slot) % 4; rbtx4927_pci_map_irq()
56 irq++; /* 1-4 */ rbtx4927_pci_map_irq()
58 switch (irq) { rbtx4927_pci_map_irq()
60 irq = RBTX4927_IRQ_IOC_PCIA; rbtx4927_pci_map_irq()
63 irq = RBTX4927_IRQ_IOC_PCIB; rbtx4927_pci_map_irq()
66 irq = RBTX4927_IRQ_IOC_PCIC; rbtx4927_pci_map_irq()
69 irq = RBTX4927_IRQ_IOC_PCID; rbtx4927_pci_map_irq()
72 return irq; rbtx4927_pci_map_irq()
/linux-4.1.27/arch/mips/ar7/
H A DMakefile6 irq.o \
H A Dirq.c22 #include <linux/irq.h>
32 #define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10)
35 #define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */
37 #define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */
39 #define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */
43 #define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */
44 #define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */
54 writel(1 << ((d->irq - ar7_irq_base) % 32), ar7_unmask_irq()
55 REG(ESR_OFFSET(d->irq - ar7_irq_base))); ar7_unmask_irq()
60 writel(1 << ((d->irq - ar7_irq_base) % 32), ar7_mask_irq()
61 REG(ECR_OFFSET(d->irq - ar7_irq_base))); ar7_mask_irq()
66 writel(1 << ((d->irq - ar7_irq_base) % 32), ar7_ack_irq()
67 REG(CR_OFFSET(d->irq - ar7_irq_base))); ar7_ack_irq()
72 writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET)); ar7_unmask_sec_irq()
77 writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET)); ar7_mask_sec_irq()
82 writel(1 << (d->irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET)); ar7_ack_sec_irq()
146 int i, irq; ar7_cascade() local
149 irq = readl(REG(PIR_OFFSET)) & 0x3f; ar7_cascade()
150 if (irq) { ar7_cascade()
151 do_IRQ(ar7_irq_base + irq); ar7_cascade()
156 writel(1, REG(CR_OFFSET(irq))); ar7_cascade()
/linux-4.1.27/arch/mips/include/asm/mach-malta/
H A Dirq.h7 #include_next <irq.h>
/linux-4.1.27/arch/mips/include/asm/mach-sead3/
H A Dirq.h7 #include_next <irq.h>
/linux-4.1.27/arch/m68k/apollo/
H A Ddn_ints.c2 #include <linux/irq.h>
9 unsigned int irq = data->irq; apollo_irq_startup() local
11 if (irq < 8) apollo_irq_startup()
12 *(volatile unsigned char *)(pica+1) &= ~(1 << irq); apollo_irq_startup()
14 *(volatile unsigned char *)(picb+1) &= ~(1 << (irq - 8)); apollo_irq_startup()
20 unsigned int irq = data->irq; apollo_irq_shutdown() local
22 if (irq < 8) apollo_irq_shutdown()
23 *(volatile unsigned char *)(pica+1) |= (1 << irq); apollo_irq_shutdown()
25 *(volatile unsigned char *)(picb+1) |= (1 << (irq - 8)); apollo_irq_shutdown()
/linux-4.1.27/arch/arm/mach-rpc/
H A Dirq.c5 #include <asm/mach/irq.h>
7 #include <asm/irq.h>
14 mask = 1 << d->irq; iomd_ack_irq_a()
24 mask = 1 << d->irq; iomd_mask_irq_a()
33 mask = 1 << d->irq; iomd_unmask_irq_a()
48 mask = 1 << (d->irq & 7); iomd_mask_irq_b()
57 mask = 1 << (d->irq & 7); iomd_unmask_irq_b()
72 mask = 1 << (d->irq & 7); iomd_mask_irq_dma()
81 mask = 1 << (d->irq & 7); iomd_unmask_irq_dma()
96 mask = 1 << (d->irq & 7); iomd_mask_irq_fiq()
105 mask = 1 << (d->irq & 7); iomd_unmask_irq_fiq()
120 unsigned int irq, flags; rpc_init_irq() local
130 for (irq = 0; irq < NR_IRQS; irq++) { rpc_init_irq()
133 if (irq <= 6 || (irq >= 9 && irq <= 15)) rpc_init_irq()
136 if (irq == 21 || (irq >= 16 && irq <= 19) || rpc_init_irq()
137 irq == IRQ_KEYBOARDTX) rpc_init_irq()
140 switch (irq) { rpc_init_irq()
142 irq_set_chip_and_handler(irq, &iomd_a_chip, rpc_init_irq()
144 set_irq_flags(irq, flags); rpc_init_irq()
148 irq_set_chip_and_handler(irq, &iomd_b_chip, rpc_init_irq()
150 set_irq_flags(irq, flags); rpc_init_irq()
154 irq_set_chip_and_handler(irq, &iomd_dma_chip, rpc_init_irq()
156 set_irq_flags(irq, flags); rpc_init_irq()
160 irq_set_chip(irq, &iomd_fiq_chip); rpc_init_irq()
161 set_irq_flags(irq, IRQF_VALID); rpc_init_irq()
H A DMakefile7 obj-y := dma.o ecard.o fiq.o irq.o riscpc.o time.o
/linux-4.1.27/arch/arm/mach-netx/
H A Dgeneric.c31 #include <asm/mach/irq.h>
75 unsigned int irq = NETX_IRQ_HIF_CHAINED(0); netx_hif_demux_handler() local
83 DEBUG_IRQ("handling irq %d\n", irq); netx_hif_demux_handler()
84 generic_handle_irq(irq); netx_hif_demux_handler()
86 irq++; netx_hif_demux_handler()
94 unsigned int val, irq; netx_hif_irq_type() local
98 irq = d->irq - NETX_IRQ_HIF_CHAINED(0); netx_hif_irq_type()
102 val |= (1 << 26) << irq; netx_hif_irq_type()
106 val &= ~((1 << 26) << irq); netx_hif_irq_type()
110 val &= ~((1 << 26) << irq); netx_hif_irq_type()
114 val |= (1 << 26) << irq; netx_hif_irq_type()
125 unsigned int val, irq; netx_hif_ack_irq() local
127 irq = d->irq - NETX_IRQ_HIF_CHAINED(0); netx_hif_ack_irq()
128 writel((1 << 24) << irq, NETX_DPMAS_INT_STAT); netx_hif_ack_irq()
131 val &= ~((1 << 24) << irq); netx_hif_ack_irq()
134 DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); netx_hif_ack_irq()
140 unsigned int val, irq; netx_hif_mask_irq() local
142 irq = d->irq - NETX_IRQ_HIF_CHAINED(0); netx_hif_mask_irq()
144 val &= ~((1 << 24) << irq); netx_hif_mask_irq()
146 DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); netx_hif_mask_irq()
152 unsigned int val, irq; netx_hif_unmask_irq() local
154 irq = d->irq - NETX_IRQ_HIF_CHAINED(0); netx_hif_unmask_irq()
156 val |= (1 << 24) << irq; netx_hif_unmask_irq()
158 DEBUG_IRQ("%s: irq %d\n", __func__, d->irq); netx_hif_unmask_irq()
170 int irq; netx_init_irq() local
174 for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { netx_init_irq()
175 irq_set_chip_and_handler(irq, &netx_hif_chip, netx_init_irq()
177 set_irq_flags(irq, IRQF_VALID); netx_init_irq()
/linux-4.1.27/arch/arm/mach-omap2/
H A Domap_hwmod_2xxx_3xxx_ipblock_data.c144 { .irq = 37 + OMAP_INTC_START, },
145 { .irq = -1 },
149 { .irq = 38 + OMAP_INTC_START, },
150 { .irq = -1 },
154 { .irq = 39 + OMAP_INTC_START, },
155 { .irq = -1 },
159 { .irq = 40 + OMAP_INTC_START, },
160 { .irq = -1 },
164 { .irq = 41 + OMAP_INTC_START, },
165 { .irq = -1 },
169 { .irq = 42 + OMAP_INTC_START, },
170 { .irq = -1 },
174 { .irq = 43 + OMAP_INTC_START, },
175 { .irq = -1 },
179 { .irq = 44 + OMAP_INTC_START, },
180 { .irq = -1 },
184 { .irq = 45 + OMAP_INTC_START, },
185 { .irq = -1 },
189 { .irq = 46 + OMAP_INTC_START, },
190 { .irq = -1 },
194 { .irq = 47 + OMAP_INTC_START, },
195 { .irq = -1 },
199 { .irq = 72 + OMAP_INTC_START, },
200 { .irq = -1 },
204 { .irq = 73 + OMAP_INTC_START, },
205 { .irq = -1 },
209 { .irq = 74 + OMAP_INTC_START, },
210 { .irq = -1 },
214 { .irq = 25 + OMAP_INTC_START, },
215 { .irq = -1 },
219 { .irq = 56 + OMAP_INTC_START, },
220 { .irq = -1 },
224 { .irq = 57 + OMAP_INTC_START, },
225 { .irq = -1 },
229 { .irq = 29 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK1 */
230 { .irq = -1 },
234 { .irq = 30 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK2 */
235 { .irq = -1 },
239 { .irq = 31 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK3 */
240 { .irq = -1 },
244 { .irq = 32 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK4 */
245 { .irq = -1 },
249 { .name = "0", .irq = 12 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ0 */
250 { .name = "1", .irq = 13 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ1 */
251 { .name = "2", .irq = 14 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ2 */
252 { .name = "3", .irq = 15 + OMAP_INTC_START, }, /* INT_24XX_SDMA_IRQ3 */
253 { .irq = -1 },
257 { .irq = 65 + OMAP_INTC_START, },
258 { .irq = -1 },
262 { .irq = 66 + OMAP_INTC_START, },
263 { .irq = -1 },
282 { .irq = 58 + OMAP_INTC_START, },
283 { .irq = -1 },
/linux-4.1.27/drivers/misc/
H A Ddummy-irq.c5 * by the 'irq' parameter.
19 #include <linux/irq.h>
22 static int irq = -1; variable
24 static irqreturn_t dummy_interrupt(int irq, void *dev_id) dummy_interrupt() argument
29 printk(KERN_INFO "dummy-irq: interrupt occurred on IRQ %d\n", dummy_interrupt()
30 irq); dummy_interrupt()
39 if (irq < 0) { dummy_irq_init()
40 printk(KERN_ERR "dummy-irq: no IRQ given. Use irq=N\n"); dummy_irq_init()
43 if (request_irq(irq, &dummy_interrupt, IRQF_SHARED, "dummy_irq", &irq)) { dummy_irq_init()
44 printk(KERN_ERR "dummy-irq: cannot register IRQ %d\n", irq); dummy_irq_init()
47 printk(KERN_INFO "dummy-irq: registered for IRQ %d\n", irq); dummy_irq_init()
53 printk(KERN_INFO "dummy-irq unloaded\n"); dummy_irq_exit()
54 free_irq(irq, &irq); dummy_irq_exit()
62 module_param(irq, uint, 0444);
63 MODULE_PARM_DESC(irq, "The IRQ to register for");
/linux-4.1.27/arch/ia64/kernel/
H A Dmsi_ia64.c6 #include <linux/irq.h>
21 unsigned int irq = idata->irq; ia64_set_msi_irq_affinity() local
23 if (irq_prepare_move(irq, cpu)) ia64_set_msi_irq_affinity()
35 data |= MSI_DATA_VECTOR(irq_to_vector(irq)); ia64_set_msi_irq_affinity()
38 pci_write_msi_msg(irq, &msg); ia64_set_msi_irq_affinity()
49 int irq, vector; ia64_setup_msi_irq() local
51 irq = create_irq(); ia64_setup_msi_irq()
52 if (irq < 0) ia64_setup_msi_irq()
53 return irq; ia64_setup_msi_irq()
55 irq_set_msi_desc(irq, desc); ia64_setup_msi_irq()
56 dest_phys_id = cpu_physical_id(cpumask_any_and(&(irq_to_domain(irq)), ia64_setup_msi_irq()
58 vector = irq_to_vector(irq); ia64_setup_msi_irq()
73 pci_write_msi_msg(irq, &msg); ia64_setup_msi_irq()
74 irq_set_chip_and_handler(irq, &ia64_msi_chip, handle_edge_irq); ia64_setup_msi_irq()
79 void ia64_teardown_msi_irq(unsigned int irq) ia64_teardown_msi_irq() argument
81 destroy_irq(irq); ia64_teardown_msi_irq()
86 irq_complete_move(data->irq); ia64_ack_msi_irq()
93 unsigned int vector = irq_to_vector(data->irq); ia64_msi_retrigger_irq()
122 void arch_teardown_msi_irq(unsigned int irq) arch_teardown_msi_irq() argument
125 return platform_teardown_msi_irq(irq); arch_teardown_msi_irq()
127 return ia64_teardown_msi_irq(irq); arch_teardown_msi_irq()
135 unsigned int irq = data->irq; dmar_msi_set_affinity() local
136 struct irq_cfg *cfg = irq_cfg + irq; dmar_msi_set_affinity()
140 if (irq_prepare_move(irq, cpu)) dmar_msi_set_affinity()
143 dmar_msi_read(irq, &msg); dmar_msi_set_affinity()
150 dmar_msi_write(irq, &msg); dmar_msi_set_affinity()
169 msi_compose_msg(struct pci_dev *pdev, unsigned int irq, struct msi_msg *msg) msi_compose_msg() argument
171 struct irq_cfg *cfg = irq_cfg + irq; msi_compose_msg()
174 dest = cpu_physical_id(cpumask_first_and(&(irq_to_domain(irq)), msi_compose_msg()
192 int arch_setup_dmar_msi(unsigned int irq) arch_setup_dmar_msi() argument
197 ret = msi_compose_msg(NULL, irq, &msg); arch_setup_dmar_msi()
200 dmar_msi_write(irq, &msg); arch_setup_dmar_msi()
201 irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, arch_setup_dmar_msi()
H A Dirq_ia64.c30 #include <linux/irq.h>
98 int irq; find_unassigned_irq() local
100 for (irq = IA64_FIRST_DEVICE_VECTOR; irq < NR_IRQS; irq++) find_unassigned_irq()
101 if (irq_status[irq] == IRQ_UNUSED) find_unassigned_irq()
102 return irq; find_unassigned_irq()
125 static int __bind_irq_vector(int irq, int vector, cpumask_t domain) __bind_irq_vector() argument
129 struct irq_cfg *cfg = &irq_cfg[irq]; __bind_irq_vector()
131 BUG_ON((unsigned)irq >= NR_IRQS); __bind_irq_vector()
142 per_cpu(vector_irq, cpu)[vector] = irq; __bind_irq_vector()
145 irq_status[irq] = IRQ_USED; __bind_irq_vector()
150 int bind_irq_vector(int irq, int vector, cpumask_t domain) bind_irq_vector() argument
156 ret = __bind_irq_vector(irq, vector, domain); bind_irq_vector()
161 static void __clear_irq_vector(int irq) __clear_irq_vector() argument
165 struct irq_cfg *cfg = &irq_cfg[irq]; __clear_irq_vector()
167 BUG_ON((unsigned)irq >= NR_IRQS); __clear_irq_vector()
175 irq_status[irq] = IRQ_UNUSED; __clear_irq_vector()
179 static void clear_irq_vector(int irq) clear_irq_vector() argument
184 __clear_irq_vector(irq); clear_irq_vector()
189 ia64_native_assign_irq_vector (int irq) ia64_native_assign_irq_vector() argument
206 if (irq == AUTO_ASSIGN)
207 irq = vector;
208 BUG_ON(__bind_irq_vector(irq, vector, domain));
238 int irq, vector; __setup_vector_irq() local
244 for (irq = 0; irq < NR_IRQS; ++irq) { __setup_vector_irq()
245 if (!cpumask_test_cpu(cpu, &irq_cfg[irq].domain)) __setup_vector_irq()
247 vector = irq_to_vector(irq); __setup_vector_irq()
248 per_cpu(vector_irq, cpu)[vector] = irq; __setup_vector_irq()
266 static int __irq_prepare_move(int irq, int cpu) __irq_prepare_move() argument
268 struct irq_cfg *cfg = &irq_cfg[irq]; __irq_prepare_move()
286 BUG_ON(__bind_irq_vector(irq, vector, domain)); __irq_prepare_move()
290 int irq_prepare_move(int irq, int cpu) irq_prepare_move() argument
296 ret = __irq_prepare_move(irq, cpu); irq_prepare_move()
301 void irq_complete_move(unsigned irq) irq_complete_move() argument
303 struct irq_cfg *cfg = &irq_cfg[irq]; irq_complete_move()
320 static irqreturn_t smp_irq_move_cleanup_interrupt(int irq, void *dev_id) smp_irq_move_cleanup_interrupt() argument
328 int irq; smp_irq_move_cleanup_interrupt() local
331 irq = __this_cpu_read(vector_irq[vector]); smp_irq_move_cleanup_interrupt()
332 if (irq < 0) smp_irq_move_cleanup_interrupt()
335 desc = irq_to_desc(irq); smp_irq_move_cleanup_interrupt()
336 cfg = irq_cfg + irq; smp_irq_move_cleanup_interrupt()
379 void destroy_and_reserve_irq(unsigned int irq) destroy_and_reserve_irq() argument
383 irq_init_desc(irq); destroy_and_reserve_irq()
385 __clear_irq_vector(irq); destroy_and_reserve_irq()
386 irq_status[irq] = IRQ_RSVD; destroy_and_reserve_irq()
391 * Dynamic irq allocate and deallocation for MSI
396 int irq, vector, cpu; create_irq() local
399 irq = vector = -ENOSPC; create_irq()
409 irq = find_unassigned_irq();
410 if (irq < 0)
412 BUG_ON(__bind_irq_vector(irq, vector, domain));
415 if (irq >= 0)
416 irq_init_desc(irq);
417 return irq;
420 void destroy_irq(unsigned int irq) destroy_irq() argument
422 irq_init_desc(irq); destroy_irq()
423 clear_irq_vector(irq); destroy_irq()
479 int irq = local_vector_to_irq(vector); ia64_handle_irq() local
483 kstat_incr_irq_this_cpu(irq); ia64_handle_irq()
486 kstat_incr_irq_this_cpu(irq); ia64_handle_irq()
491 if (unlikely(irq < 0)) { ia64_handle_irq()
497 generic_handle_irq(irq); ia64_handle_irq()
538 int irq = local_vector_to_irq(vector); ia64_process_pending_intr() local
542 kstat_incr_irq_this_cpu(irq); ia64_process_pending_intr()
544 kstat_incr_irq_this_cpu(irq); ia64_process_pending_intr()
557 if (unlikely(irq < 0)) { ia64_process_pending_intr()
563 vectors_in_migration[irq]=0; ia64_process_pending_intr()
564 generic_handle_irq(irq); ia64_process_pending_intr()
584 static irqreturn_t dummy_handler (int irq, void *dev_id) dummy_handler() argument
612 unsigned int irq; ia64_native_register_percpu_irq() local
614 irq = vec; ia64_native_register_percpu_irq()
615 BUG_ON(bind_irq_vector(irq, vec, CPU_MASK_ALL)); ia64_native_register_percpu_irq()
616 irq_set_status_flags(irq, IRQ_PER_CPU); ia64_native_register_percpu_irq()
617 irq_set_chip(irq, &irq_type_ia64_lsapic); ia64_native_register_percpu_irq()
619 setup_irq(irq, action); ia64_native_register_percpu_irq()
620 irq_set_handler(irq, handle_percpu_irq); ia64_native_register_percpu_irq()
H A Dirq.c2 * linux/arch/ia64/kernel/irq.c
14 * 4/14/2004: Added code to handle cpu migration and do safe irq
29 * 'what should we do if we get a hw irq event on an illegal vector'.
32 void ack_bad_irq(unsigned int irq) ack_bad_irq() argument
34 printk(KERN_ERR "Unexpected irq vector 0x%x on CPU %u!\n", irq, smp_processor_id()); ack_bad_irq()
38 ia64_vector __ia64_irq_to_vector(int irq) __ia64_irq_to_vector() argument
40 return irq_cfg[irq].vector; __ia64_irq_to_vector()
67 void set_irq_affinity_info (unsigned int irq, int hwid, int redir) set_irq_affinity_info() argument
69 if (irq < NR_IRQS) { set_irq_affinity_info()
70 cpumask_copy(irq_get_irq_data(irq)->affinity, set_irq_affinity_info()
72 irq_redir[irq] = (char) (redir & 0xff); set_irq_affinity_info()
103 int irq, new_cpu; migrate_irqs() local
105 for (irq=0; irq < NR_IRQS; irq++) { migrate_irqs()
106 struct irq_desc *desc = irq_to_desc(irq); migrate_irqs()
127 vectors_in_migration[irq] = irq; migrate_irqs()
151 unsigned int irq; fixup_irqs() local
183 for (irq=0; irq < NR_IRQS; irq++) { fixup_irqs()
184 if (vectors_in_migration[irq]) { fixup_irqs()
187 vectors_in_migration[irq]=0; fixup_irqs()
188 generic_handle_irq(irq); fixup_irqs()
194 * Now let processor die. We do irq disable and max_xtp() to fixup_irqs()
H A Diosapic.c22 * 01/07/27 J.I. Lee PCI irq routing, Platform/Legacy interrupts
24 * 02/01/23 J.I. Lee iosapic pgm fixes for PCI irq routing from _PRT
27 * initializations for /proc/irq/#/smp_affinity
33 * 02/08/04 T. Kochi Cleaned up terminology (irq, global system
42 * Updated to work with irq migration necessary
70 * platform can implement platform_irq_to_vector(irq) and
85 #include <linux/irq.h>
181 int irq; __gsi_to_irq() local
185 for (irq = 0; irq < NR_IRQS; irq++) { __gsi_to_irq()
186 info = &iosapic_intr_info[irq]; __gsi_to_irq()
189 return irq; __gsi_to_irq()
198 int irq; gsi_to_irq() local
201 irq = __gsi_to_irq(gsi); gsi_to_irq()
203 return irq; gsi_to_irq()
206 static struct iosapic_rte_info *find_rte(unsigned int irq, unsigned int gsi) find_rte() argument
210 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) find_rte()
217 set_rte (unsigned int gsi, unsigned int irq, unsigned int dest, int mask) set_rte() argument
224 ia64_vector vector = irq_to_vector(irq); set_rte()
228 rte = find_rte(irq, gsi); set_rte()
233 pol = iosapic_intr_info[irq].polarity; set_rte()
234 trigger = iosapic_intr_info[irq].trigger; set_rte()
235 dmode = iosapic_intr_info[irq].dmode; set_rte()
240 set_irq_affinity_info(irq, (int)(dest & 0xffff), redir); set_rte()
254 iosapic_intr_info[irq].low32 = low32; set_rte()
255 iosapic_intr_info[irq].dest = dest; set_rte()
272 int irq; kexec_disable_iosapic() local
274 for (irq = 0; irq < NR_IRQS; irq++) { kexec_disable_iosapic()
275 info = &iosapic_intr_info[irq]; kexec_disable_iosapic()
276 vec = irq_to_vector(irq); kexec_disable_iosapic()
291 unsigned int irq = data->irq; mask_irq() local
296 if (!iosapic_intr_info[irq].count) mask_irq()
300 low32 = iosapic_intr_info[irq].low32 |= IOSAPIC_MASK; mask_irq()
301 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) { mask_irq()
310 unsigned int irq = data->irq; unmask_irq() local
315 if (!iosapic_intr_info[irq].count) unmask_irq()
318 low32 = iosapic_intr_info[irq].low32 &= ~IOSAPIC_MASK; unmask_irq()
319 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) { unmask_irq()
331 unsigned int irq = data->irq; iosapic_set_affinity() local
334 int redir = (irq & IA64_IRQ_REDIRECTED) ? 1 : 0; iosapic_set_affinity()
338 irq &= (~IA64_IRQ_REDIRECTED); iosapic_set_affinity()
344 if (irq_prepare_move(irq, cpu)) iosapic_set_affinity()
349 if (!iosapic_intr_info[irq].count) iosapic_set_affinity()
352 set_irq_affinity_info(irq, dest, redir); iosapic_set_affinity()
357 low32 = iosapic_intr_info[irq].low32 & ~(7 << IOSAPIC_DELIVERY_SHIFT); iosapic_set_affinity()
365 low32 |= irq_to_vector(irq); iosapic_set_affinity()
367 iosapic_intr_info[irq].low32 = low32; iosapic_set_affinity()
368 iosapic_intr_info[irq].dest = dest; iosapic_set_affinity()
369 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) { iosapic_set_affinity()
394 unsigned int irq = data->irq; iosapic_unmask_level_irq() local
395 ia64_vector vec = irq_to_vector(irq); iosapic_unmask_level_irq()
399 irq_complete_move(irq); iosapic_unmask_level_irq()
406 list_for_each_entry(rte, &iosapic_intr_info[irq].rtes, rte_list) iosapic_unmask_level_irq()
451 irq_complete_move(data->irq); iosapic_ack_edge_irq()
487 int i, irq = -ENOSPC, min_count = -1; iosapic_find_sharable_irq() local
504 irq = i; iosapic_find_sharable_irq()
509 return irq; iosapic_find_sharable_irq()
517 iosapic_reassign_vector (int irq) iosapic_reassign_vector() argument
521 if (iosapic_intr_info[irq].count) { iosapic_reassign_vector()
526 irq_to_vector(irq), irq_to_vector(new_irq)); iosapic_reassign_vector()
527 memcpy(&iosapic_intr_info[new_irq], &iosapic_intr_info[irq], iosapic_reassign_vector()
530 list_move(iosapic_intr_info[irq].rtes.next, iosapic_reassign_vector()
532 memset(&iosapic_intr_info[irq], 0, iosapic_reassign_vector()
534 iosapic_intr_info[irq].low32 = IOSAPIC_MASK; iosapic_reassign_vector()
535 INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes); iosapic_reassign_vector()
539 static inline int irq_is_shared (int irq) irq_is_shared() argument
541 return (iosapic_intr_info[irq].count > 1); irq_is_shared()
554 register_intr (unsigned int gsi, int irq, unsigned char delivery, register_intr() argument
568 rte = find_rte(irq, gsi); register_intr()
580 list_add_tail(&rte->rte_list, &iosapic_intr_info[irq].rtes); register_intr()
581 iosapic_intr_info[irq].count++; register_intr()
585 struct iosapic_intr_info *info = &iosapic_intr_info[irq]; register_intr()
594 iosapic_intr_info[irq].count++; register_intr()
598 iosapic_intr_info[irq].polarity = polarity; register_intr()
599 iosapic_intr_info[irq].dmode = delivery; register_intr()
600 iosapic_intr_info[irq].trigger = trigger; register_intr()
604 chip = irq_get_chip(irq); register_intr()
609 __func__, irq_to_vector(irq), register_intr()
613 __irq_set_chip_handler_name_locked(irq, chip, trigger == IOSAPIC_EDGE ? register_intr()
620 get_target_cpu (unsigned int gsi, int irq) get_target_cpu() argument
625 cpumask_t domain = irq_to_domain(irq); get_target_cpu()
631 if (iosapic_intr_info[irq].count) get_target_cpu()
632 return iosapic_intr_info[irq].dest; get_target_cpu()
649 if (cpe_vector > 0 && irq_to_vector(irq) == IA64_CPEP_VECTOR) get_target_cpu()
673 /* Use irq assignment to distribute across cpus in node */ get_target_cpu()
674 cpu_index = irq % num_cpus; get_target_cpu()
719 int irq, mask = 1, err; iosapic_register_intr() local
733 irq = __gsi_to_irq(gsi); iosapic_register_intr()
734 if (irq > 0) { iosapic_register_intr()
735 rte = find_rte(irq, gsi); iosapic_register_intr()
736 if(iosapic_intr_info[irq].count == 0) { iosapic_register_intr()
737 assign_irq_vector(irq); iosapic_register_intr()
738 irq_init_desc(irq); iosapic_register_intr()
744 irq = create_irq(); iosapic_register_intr()
747 if (irq < 0) { iosapic_register_intr()
748 irq = iosapic_find_sharable_irq(trigger, polarity); iosapic_register_intr()
749 if (irq < 0) iosapic_register_intr()
753 desc = irq_to_desc(irq); iosapic_register_intr()
755 dest = get_target_cpu(gsi, irq); iosapic_register_intr()
757 err = register_intr(gsi, irq, dmode, polarity, trigger); iosapic_register_intr()
760 irq = err; iosapic_register_intr()
768 low32 = iosapic_intr_info[irq].low32; iosapic_register_intr()
769 if (irq_is_shared(irq) && !(low32 & IOSAPIC_MASK)) iosapic_register_intr()
771 set_rte(gsi, irq, dest, mask); iosapic_register_intr()
776 cpu_logical_id(dest), dest, irq_to_vector(irq)); iosapic_register_intr()
781 return irq; iosapic_register_intr()
788 int irq, index; iosapic_unregister_intr() local
795 * If the irq associated with the gsi is not found, iosapic_unregister_intr()
799 irq = gsi_to_irq(gsi); iosapic_unregister_intr()
800 if (irq < 0) { iosapic_unregister_intr()
808 if ((rte = find_rte(irq, gsi)) == NULL) { iosapic_unregister_intr()
821 low32 = iosapic_intr_info[irq].low32 | IOSAPIC_MASK; iosapic_unregister_intr()
824 iosapic_intr_info[irq].count--; iosapic_unregister_intr()
829 trigger = iosapic_intr_info[irq].trigger; iosapic_unregister_intr()
830 polarity = iosapic_intr_info[irq].polarity; iosapic_unregister_intr()
831 dest = iosapic_intr_info[irq].dest; iosapic_unregister_intr()
836 cpu_logical_id(dest), dest, irq_to_vector(irq)); iosapic_unregister_intr()
838 if (iosapic_intr_info[irq].count == 0) { iosapic_unregister_intr()
841 cpumask_setall(irq_get_irq_data(irq)->affinity); iosapic_unregister_intr()
844 iosapic_intr_info[irq].dest = 0; iosapic_unregister_intr()
845 iosapic_intr_info[irq].dmode = 0; iosapic_unregister_intr()
846 iosapic_intr_info[irq].polarity = 0; iosapic_unregister_intr()
847 iosapic_intr_info[irq].trigger = 0; iosapic_unregister_intr()
848 iosapic_intr_info[irq].low32 |= IOSAPIC_MASK; iosapic_unregister_intr()
851 destroy_and_reserve_irq(irq); iosapic_unregister_intr()
867 int irq, vector, mask = 0; iosapic_register_platform_intr() local
872 irq = vector = iosapic_vector; iosapic_register_platform_intr()
873 bind_irq_vector(irq, vector, CPU_MASK_ALL); iosapic_register_platform_intr()
878 iosapic_reassign_vector(irq); iosapic_register_platform_intr()
882 irq = create_irq(); iosapic_register_platform_intr()
883 if (irq < 0) iosapic_register_platform_intr()
885 vector = irq_to_vector(irq); iosapic_register_platform_intr()
889 irq = vector = IA64_CPE_VECTOR; iosapic_register_platform_intr()
890 BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL)); iosapic_register_platform_intr()
900 register_intr(gsi, irq, delivery, polarity, trigger); iosapic_register_platform_intr()
910 set_rte(gsi, irq, dest, mask); iosapic_register_platform_intr()
920 int vector, irq; iosapic_override_isa_irq() local
924 irq = vector = isa_irq_to_vector(isa_irq); iosapic_override_isa_irq()
925 BUG_ON(bind_irq_vector(irq, vector, CPU_MASK_ALL)); iosapic_override_isa_irq()
927 register_intr(gsi, irq, dmode, polarity, trigger); iosapic_override_isa_irq()
934 set_rte(gsi, irq, dest, 1); iosapic_override_isa_irq()
956 int irq; iosapic_system_init() local
958 for (irq = 0; irq < NR_IRQS; ++irq) { iosapic_system_init()
959 iosapic_intr_info[irq].low32 = IOSAPIC_MASK; iosapic_system_init()
961 INIT_LIST_HEAD(&iosapic_intr_info[irq].rtes); iosapic_system_init()
963 iosapic_intr_info[irq].count = 0; iosapic_system_init()
1014 iosapic_delete_rte(unsigned int irq, unsigned int gsi) iosapic_delete_rte() argument
1018 list_for_each_entry_safe(rte, temp, &iosapic_intr_info[irq].rtes, iosapic_delete_rte()
1092 int i, irq, index, err = 0; iosapic_remove() local
1111 irq = __gsi_to_irq(i); iosapic_remove()
1112 if (irq < 0) iosapic_remove()
1115 err = iosapic_delete_rte(irq, i); iosapic_remove()
/linux-4.1.27/arch/m68k/coldfire/
H A Dintc-525x.c16 #include <linux/irq.h>
25 int irq = d->irq - MCF_IRQ_GPIO0; intc2_irq_gpio_mask() local
28 imr &= ~(0x001 << irq); intc2_irq_gpio_mask()
30 imr &= ~(0x100 << irq); intc2_irq_gpio_mask()
38 int irq = d->irq - MCF_IRQ_GPIO0; intc2_irq_gpio_unmask() local
41 imr |= (0x001 << irq); intc2_irq_gpio_unmask()
43 imr |= (0x100 << irq); intc2_irq_gpio_unmask()
51 int irq = d->irq - MCF_IRQ_GPIO0; intc2_irq_gpio_ack() local
54 imr |= (0x001 << irq); intc2_irq_gpio_ack()
56 imr |= (0x100 << irq); intc2_irq_gpio_ack()
77 int irq; mcf_intc2_init() local
83 for (irq = MCF_IRQ_GPIO0; (irq <= MCF_IRQ_GPIO6); irq++) { mcf_intc2_init()
84 irq_set_chip(irq, &intc2_irq_gpio_chip); mcf_intc2_init()
85 irq_set_handler(irq, handle_edge_irq); mcf_intc2_init()
H A Dintc-5272.c16 #include <linux/irq.h>
78 * an interrupt on this irq (for the external irqs). So this mask function
83 unsigned int irq = d->irq; intc_irq_mask() local
85 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) { intc_irq_mask()
87 irq -= MCFINT_VECBASE; intc_irq_mask()
88 v = 0x8 << intc_irqmap[irq].index; intc_irq_mask()
89 writel(v, intc_irqmap[irq].icr); intc_irq_mask()
95 unsigned int irq = d->irq; intc_irq_unmask() local
97 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) { intc_irq_unmask()
99 irq -= MCFINT_VECBASE; intc_irq_unmask()
100 v = 0xd << intc_irqmap[irq].index; intc_irq_unmask()
101 writel(v, intc_irqmap[irq].icr); intc_irq_unmask()
107 unsigned int irq = d->irq; intc_irq_ack() local
110 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) { intc_irq_ack()
111 irq -= MCFINT_VECBASE; intc_irq_ack()
112 if (intc_irqmap[irq].ack) { intc_irq_ack()
114 v = readl(intc_irqmap[irq].icr); intc_irq_ack()
115 v &= (0x7 << intc_irqmap[irq].index); intc_irq_ack()
116 v |= (0x8 << intc_irqmap[irq].index); intc_irq_ack()
117 writel(v, intc_irqmap[irq].icr); intc_irq_ack()
124 unsigned int irq = d->irq; intc_irq_set_type() local
126 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) { intc_irq_set_type()
127 irq -= MCFINT_VECBASE; intc_irq_set_type()
128 if (intc_irqmap[irq].ack) { intc_irq_set_type()
132 v &= ~(0x1 << (32 - irq)); intc_irq_set_type()
134 v |= (0x1 << (32 - irq)); intc_irq_set_type()
146 static void intc_external_irq(unsigned int irq, struct irq_desc *desc) intc_external_irq() argument
149 handle_simple_irq(irq, desc); intc_external_irq()
163 int irq, edge; init_IRQ() local
171 for (irq = 0; (irq < NR_IRQS); irq++) { init_IRQ()
172 irq_set_chip(irq, &intc_irq_chip); init_IRQ()
174 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) init_IRQ()
175 edge = intc_irqmap[irq - MCFINT_VECBASE].ack; init_IRQ()
177 irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); init_IRQ()
178 irq_set_handler(irq, intc_external_irq); init_IRQ()
180 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); init_IRQ()
181 irq_set_handler(irq, handle_level_irq); init_IRQ()
H A Dintc-simr.c17 #include <linux/irq.h>
38 static unsigned int inline irq2ebit(unsigned int irq) irq2ebit() argument
40 return irqebitmap[irq - EINT0]; irq2ebit()
54 static unsigned int inline irq2ebit(unsigned int irq) irq2ebit() argument
56 return irq - EINT0; irq2ebit()
69 unsigned int irq = d->irq - MCFINT_VECBASE; intc_irq_mask() local
71 if (MCFINTC2_SIMR && (irq > 128)) intc_irq_mask()
72 __raw_writeb(irq - 128, MCFINTC2_SIMR); intc_irq_mask()
73 else if (MCFINTC1_SIMR && (irq > 64)) intc_irq_mask()
74 __raw_writeb(irq - 64, MCFINTC1_SIMR); intc_irq_mask()
76 __raw_writeb(irq, MCFINTC0_SIMR); intc_irq_mask()
81 unsigned int irq = d->irq - MCFINT_VECBASE; intc_irq_unmask() local
83 if (MCFINTC2_CIMR && (irq > 128)) intc_irq_unmask()
84 __raw_writeb(irq - 128, MCFINTC2_CIMR); intc_irq_unmask()
85 else if (MCFINTC1_CIMR && (irq > 64)) intc_irq_unmask()
86 __raw_writeb(irq - 64, MCFINTC1_CIMR); intc_irq_unmask()
88 __raw_writeb(irq, MCFINTC0_CIMR); intc_irq_unmask()
93 unsigned int ebit = irq2ebit(d->irq); intc_irq_ack()
100 unsigned int irq = d->irq; intc_irq_startup() local
102 if ((irq >= EINT1) && (irq <= EINT7)) { intc_irq_startup()
103 unsigned int ebit = irq2ebit(irq); intc_irq_startup()
117 irq -= MCFINT_VECBASE; intc_irq_startup()
118 if (MCFINTC2_ICR0 && (irq > 128)) intc_irq_startup()
119 __raw_writeb(5, MCFINTC2_ICR0 + irq - 128); intc_irq_startup()
120 else if (MCFINTC1_ICR0 && (irq > 64)) intc_irq_startup()
121 __raw_writeb(5, MCFINTC1_ICR0 + irq - 64); intc_irq_startup()
123 __raw_writeb(5, MCFINTC0_ICR0 + irq); intc_irq_startup()
131 unsigned int ebit, irq = d->irq; intc_irq_set_type() local
151 irq_set_handler(irq, handle_edge_irq); intc_irq_set_type()
153 ebit = irq2ebit(irq) * 2; intc_irq_set_type()
179 int irq, eirq; init_IRQ() local
190 for (irq = MCFINT_VECBASE; (irq < eirq); irq++) { init_IRQ()
191 if ((irq >= EINT1) && (irq <= EINT7)) init_IRQ()
192 irq_set_chip(irq, &intc_irq_chip_edge_port); init_IRQ()
194 irq_set_chip(irq, &intc_irq_chip); init_IRQ()
195 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); init_IRQ()
196 irq_set_handler(irq, handle_level_irq); init_IRQ()
H A Dintc-2.c24 #include <linux/irq.h>
52 unsigned int irq = d->irq - MCFINT_VECBASE; intc_irq_mask() local
57 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; intc_irq_mask()
61 imraddr += (irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL; intc_irq_mask()
62 imrbit = 0x1 << (irq & 0x1f); intc_irq_mask()
70 unsigned int irq = d->irq - MCFINT_VECBASE; intc_irq_unmask() local
75 imraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; intc_irq_unmask()
79 imraddr += ((irq & 0x20) ? MCFINTC_IMRH : MCFINTC_IMRL); intc_irq_unmask()
80 imrbit = 0x1 << (irq & 0x1f); intc_irq_unmask()
83 if ((irq & 0x20) == 0) intc_irq_unmask()
98 unsigned int irq = d->irq; intc_irq_ack() local
100 __raw_writeb(0x1 << (irq - EINT0), MCFEPORT_EPFR); intc_irq_ack()
114 unsigned int irq = d->irq - MCFINT_VECBASE; intc_irq_startup() local
118 icraddr = (irq & 0x40) ? MCFICM_INTC1 : MCFICM_INTC0; intc_irq_startup()
122 icraddr += MCFINTC_ICR0 + (irq & 0x3f); intc_irq_startup()
126 irq = d->irq; intc_irq_startup()
127 if ((irq >= EINT1) && (irq <= EINT7)) { intc_irq_startup()
130 irq -= EINT0; intc_irq_startup()
134 __raw_writeb(v & ~(0x1 << irq), MCFEPORT_EPDDR); intc_irq_startup()
138 __raw_writeb(v | (0x1 << irq), MCFEPORT_EPIER); intc_irq_startup()
147 unsigned int irq = d->irq; intc_irq_set_type() local
167 irq_set_handler(irq, handle_edge_irq); intc_irq_set_type()
169 irq -= EINT0; intc_irq_set_type()
171 pa = (pa & ~(0x3 << (irq * 2))) | (tb << (irq * 2)); intc_irq_set_type()
195 int irq; init_IRQ() local
203 for (irq = MCFINT_VECBASE; (irq < MCFINT_VECBASE + NR_VECS); irq++) { init_IRQ()
204 if ((irq >= EINT1) && (irq <=EINT7)) init_IRQ()
205 irq_set_chip(irq, &intc_irq_chip_edge_port); init_IRQ()
207 irq_set_chip(irq, &intc_irq_chip); init_IRQ()
208 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); init_IRQ()
209 irq_set_handler(irq, handle_level_irq); init_IRQ()
H A Dintc-5249.c15 #include <linux/irq.h>
24 imr &= ~(0x1 << (d->irq - MCF_IRQ_GPIO0)); intc2_irq_gpio_mask()
32 imr |= (0x1 << (d->irq - MCF_IRQ_GPIO0)); intc2_irq_gpio_unmask()
38 writel(0x1 << (d->irq - MCF_IRQ_GPIO0), MCFSIM2_GPIOINTCLEAR); intc2_irq_gpio_ack()
50 int irq; mcf_intc2_init() local
53 for (irq = MCF_IRQ_GPIO0; (irq <= MCF_IRQ_GPIO7); irq++) { mcf_intc2_init()
54 irq_set_chip(irq, &intc2_irq_gpio_chip); mcf_intc2_init()
55 irq_set_handler(irq, handle_edge_irq); mcf_intc2_init()
H A Dintc.c15 #include <linux/irq.h>
22 * The mapping of irq number to a mask register bit is not one-to-one.
23 * The irq numbers are either based on "level" of interrupt or fixed
25 * that maps from irq to mask register. Not all interrupts will have
102 void mcf_autovector(int irq) mcf_autovector() argument
105 if ((irq >= EIRQ1) && (irq <= EIRQ7)) { mcf_autovector()
108 avec |= (0x1 << (irq - EIRQ1 + 1)); mcf_autovector()
116 if (mcf_irq2imr[d->irq]) intc_irq_mask()
117 mcf_setimr(mcf_irq2imr[d->irq]); intc_irq_mask()
122 if (mcf_irq2imr[d->irq]) intc_irq_unmask()
123 mcf_clrimr(mcf_irq2imr[d->irq]); intc_irq_unmask()
140 int irq; init_IRQ() local
144 for (irq = 0; (irq < NR_IRQS); irq++) { init_IRQ()
145 irq_set_chip(irq, &intc_irq_chip); init_IRQ()
146 irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); init_IRQ()
147 irq_set_handler(irq, handle_level_irq); init_IRQ()
/linux-4.1.27/arch/sh/boards/mach-highlander/
H A DMakefile5 obj-$(CONFIG_SH_R7780RP) += irq-r7780rp.o
6 obj-$(CONFIG_SH_R7780MP) += irq-r7780mp.o
7 obj-$(CONFIG_SH_R7785RP) += irq-r7785rp.o pinmux-r7785rp.o
/linux-4.1.27/arch/ia64/hp/sim/
H A Dhpsim_irq.c11 #include <linux/irq.h>
42 static void hpsim_irq_set_chip(int irq) hpsim_irq_set_chip() argument
44 struct irq_chip *chip = irq_get_chip(irq); hpsim_irq_set_chip()
47 irq_set_chip(irq, &irq_type_hp_sim); hpsim_irq_set_chip()
50 static void hpsim_connect_irq(int intr, int irq) hpsim_connect_irq() argument
52 ia64_ssc(intr, irq, 0, 0, SSC_CONNECT_INTERRUPT); hpsim_connect_irq()
57 int irq = assign_irq_vector(AUTO_ASSIGN); hpsim_get_irq() local
59 if (irq >= 0) { hpsim_get_irq()
60 hpsim_irq_set_chip(irq); hpsim_get_irq()
61 irq_set_handler(irq, handle_simple_irq); hpsim_get_irq()
62 hpsim_connect_irq(intr, irq); hpsim_get_irq()
65 return irq; hpsim_get_irq()
/linux-4.1.27/drivers/xen/events/
H A Devents_base.c8 * chip. When an event is received, it is mapped to an irq and sent
28 #include <linux/irq.h>
39 #include <asm/irq.h>
84 static bool (*pirq_needs_eoi)(unsigned irq);
118 static int set_evtchn_to_irq(unsigned evtchn, unsigned irq) set_evtchn_to_irq() argument
130 /* Unallocated irq entries return -1 anyway */ set_evtchn_to_irq()
131 if (irq == -1) set_evtchn_to_irq()
141 evtchn_to_irq[EVTCHN_ROW(evtchn)][EVTCHN_COL(evtchn)] = irq; set_evtchn_to_irq()
155 struct irq_info *info_for_irq(unsigned irq) info_for_irq() argument
157 return irq_get_handler_data(irq); info_for_irq()
162 unsigned irq, xen_irq_info_common_setup()
172 info->irq = irq; xen_irq_info_common_setup()
176 ret = set_evtchn_to_irq(evtchn, irq); xen_irq_info_common_setup()
180 irq_clear_status_flags(irq, IRQ_NOREQUEST|IRQ_NOAUTOEN); xen_irq_info_common_setup()
185 static int xen_irq_info_evtchn_setup(unsigned irq, xen_irq_info_evtchn_setup() argument
188 struct irq_info *info = info_for_irq(irq); xen_irq_info_evtchn_setup()
190 return xen_irq_info_common_setup(info, irq, IRQT_EVTCHN, evtchn, 0); xen_irq_info_evtchn_setup()
194 unsigned irq, xen_irq_info_ipi_setup()
198 struct irq_info *info = info_for_irq(irq); xen_irq_info_ipi_setup()
202 per_cpu(ipi_to_irq, cpu)[ipi] = irq; xen_irq_info_ipi_setup()
204 return xen_irq_info_common_setup(info, irq, IRQT_IPI, evtchn, 0); xen_irq_info_ipi_setup()
208 unsigned irq, xen_irq_info_virq_setup()
212 struct irq_info *info = info_for_irq(irq); xen_irq_info_virq_setup()
216 per_cpu(virq_to_irq, cpu)[virq] = irq; xen_irq_info_virq_setup()
218 return xen_irq_info_common_setup(info, irq, IRQT_VIRQ, evtchn, 0); xen_irq_info_virq_setup()
221 static int xen_irq_info_pirq_setup(unsigned irq, xen_irq_info_pirq_setup() argument
228 struct irq_info *info = info_for_irq(irq); xen_irq_info_pirq_setup()
235 return xen_irq_info_common_setup(info, irq, IRQT_PIRQ, evtchn, 0); xen_irq_info_pirq_setup()
247 unsigned int evtchn_from_irq(unsigned irq) evtchn_from_irq() argument
249 if (unlikely(WARN(irq >= nr_irqs, "Invalid irq %d!\n", irq))) evtchn_from_irq()
252 return info_for_irq(irq)->evtchn; evtchn_from_irq()
266 static enum ipi_vector ipi_from_irq(unsigned irq) ipi_from_irq() argument
268 struct irq_info *info = info_for_irq(irq); ipi_from_irq()
276 static unsigned virq_from_irq(unsigned irq) virq_from_irq() argument
278 struct irq_info *info = info_for_irq(irq); virq_from_irq()
286 static unsigned pirq_from_irq(unsigned irq) pirq_from_irq() argument
288 struct irq_info *info = info_for_irq(irq); pirq_from_irq()
296 static enum xen_irq_type type_from_irq(unsigned irq) type_from_irq() argument
298 return info_for_irq(irq)->type; type_from_irq()
301 unsigned cpu_from_irq(unsigned irq) cpu_from_irq() argument
303 return info_for_irq(irq)->cpu; cpu_from_irq()
308 int irq = get_evtchn_to_irq(evtchn); cpu_from_evtchn() local
311 if (irq != -1) cpu_from_evtchn()
312 ret = cpu_from_irq(irq); cpu_from_evtchn()
318 static bool pirq_check_eoi_map(unsigned irq) pirq_check_eoi_map() argument
320 return test_bit(pirq_from_irq(irq), pirq_eoi_map); pirq_check_eoi_map()
324 static bool pirq_needs_eoi_flag(unsigned irq) pirq_needs_eoi_flag() argument
326 struct irq_info *info = info_for_irq(irq); pirq_needs_eoi_flag()
334 int irq = get_evtchn_to_irq(chn); bind_evtchn_to_cpu() local
335 struct irq_info *info = info_for_irq(irq); bind_evtchn_to_cpu()
337 BUG_ON(irq == -1); bind_evtchn_to_cpu()
339 cpumask_copy(irq_get_irq_data(irq)->affinity, cpumask_of(cpu)); bind_evtchn_to_cpu()
355 * notify_remote_via_irq - send event to remote end of event channel via irq
356 * @irq: irq of event channel to send event to
362 void notify_remote_via_irq(int irq) notify_remote_via_irq() argument
364 int evtchn = evtchn_from_irq(irq); notify_remote_via_irq()
371 static void xen_irq_init(unsigned irq) xen_irq_init() argument
376 cpumask_copy(irq_get_irq_data(irq)->affinity, cpumask_of(0)); xen_irq_init()
381 panic("Unable to allocate metadata for IRQ%d\n", irq); xen_irq_init()
386 irq_set_handler_data(irq, info); xen_irq_init()
393 int i, irq = irq_alloc_descs(-1, 0, nvec, -1); xen_allocate_irqs_dynamic() local
395 if (irq >= 0) { xen_allocate_irqs_dynamic()
397 xen_irq_init(irq + i); xen_allocate_irqs_dynamic()
400 return irq; xen_allocate_irqs_dynamic()
411 int irq; xen_allocate_irq_gsi() local
424 irq = gsi; xen_allocate_irq_gsi()
426 irq = irq_alloc_desc_at(gsi, -1); xen_allocate_irq_gsi()
428 xen_irq_init(irq); xen_allocate_irq_gsi()
430 return irq; xen_allocate_irq_gsi()
433 static void xen_free_irq(unsigned irq) xen_free_irq() argument
435 struct irq_info *info = irq_get_handler_data(irq); xen_free_irq()
442 irq_set_handler_data(irq, NULL); xen_free_irq()
449 if (irq < NR_IRQS_LEGACY) xen_free_irq()
452 irq_free_desc(irq); xen_free_irq()
464 static void pirq_query_unmask(int irq) pirq_query_unmask() argument
467 struct irq_info *info = info_for_irq(irq); pirq_query_unmask()
471 irq_status.irq = pirq_from_irq(irq); pirq_query_unmask()
482 int evtchn = evtchn_from_irq(data->irq); eoi_pirq()
483 struct physdev_eoi eoi = { .irq = pirq_from_irq(data->irq) }; eoi_pirq()
502 if (pirq_needs_eoi(data->irq)) { eoi_pirq()
514 static unsigned int __startup_pirq(unsigned int irq) __startup_pirq() argument
517 struct irq_info *info = info_for_irq(irq); __startup_pirq()
518 int evtchn = evtchn_from_irq(irq); __startup_pirq()
526 bind_pirq.pirq = pirq_from_irq(irq); __startup_pirq()
532 pr_warn("Failed to obtain physical IRQ %d\n", irq); __startup_pirq()
537 pirq_query_unmask(irq); __startup_pirq()
539 rc = set_evtchn_to_irq(evtchn, irq); __startup_pirq()
552 eoi_pirq(irq_get_irq_data(irq)); __startup_pirq()
557 pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc); __startup_pirq()
564 return __startup_pirq(data->irq); startup_pirq()
569 unsigned int irq = data->irq; shutdown_pirq() local
570 struct irq_info *info = info_for_irq(irq); shutdown_pirq()
571 unsigned evtchn = evtchn_from_irq(irq); shutdown_pirq()
602 return info->irq; xen_irq_from_gsi()
609 static void __unbind_from_irq(unsigned int irq) __unbind_from_irq() argument
611 int evtchn = evtchn_from_irq(irq); __unbind_from_irq()
612 struct irq_info *info = irq_get_handler_data(irq); __unbind_from_irq()
621 unsigned int cpu = cpu_from_irq(irq); __unbind_from_irq()
625 switch (type_from_irq(irq)) { __unbind_from_irq()
627 per_cpu(virq_to_irq, cpu)[virq_from_irq(irq)] = -1; __unbind_from_irq()
630 per_cpu(ipi_to_irq, cpu)[ipi_from_irq(irq)] = -1; __unbind_from_irq()
639 BUG_ON(info_for_irq(irq)->type == IRQT_UNBOUND); __unbind_from_irq()
641 xen_free_irq(irq); __unbind_from_irq()
648 * Note: We don't assign an event channel until the irq actually started
649 * up. Return an existing irq if we've already got one for the gsi.
657 int irq = -1; xen_bind_pirq_gsi_to_irq() local
663 irq = xen_irq_from_gsi(gsi); xen_bind_pirq_gsi_to_irq()
664 if (irq != -1) { xen_bind_pirq_gsi_to_irq()
665 pr_info("%s: returning irq %d for gsi %u\n", xen_bind_pirq_gsi_to_irq()
666 __func__, irq, gsi); xen_bind_pirq_gsi_to_irq()
670 irq = xen_allocate_irq_gsi(gsi); xen_bind_pirq_gsi_to_irq()
671 if (irq < 0) xen_bind_pirq_gsi_to_irq()
674 irq_op.irq = irq; xen_bind_pirq_gsi_to_irq()
682 xen_free_irq(irq); xen_bind_pirq_gsi_to_irq()
683 irq = -ENOSPC; xen_bind_pirq_gsi_to_irq()
687 ret = xen_irq_info_pirq_setup(irq, 0, pirq, gsi, DOMID_SELF, xen_bind_pirq_gsi_to_irq()
690 __unbind_from_irq(irq); xen_bind_pirq_gsi_to_irq()
691 irq = ret; xen_bind_pirq_gsi_to_irq()
695 pirq_query_unmask(irq); xen_bind_pirq_gsi_to_irq()
712 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, xen_bind_pirq_gsi_to_irq()
715 irq_set_chip_and_handler_name(irq, &xen_pirq_chip, xen_bind_pirq_gsi_to_irq()
721 return irq; xen_bind_pirq_gsi_to_irq()
742 int i, irq, ret; xen_bind_pirq_msi_to_irq() local
746 irq = xen_allocate_irqs_dynamic(nvec); xen_bind_pirq_msi_to_irq()
747 if (irq < 0) xen_bind_pirq_msi_to_irq()
751 irq_set_chip_and_handler_name(irq + i, &xen_pirq_chip, handle_edge_irq, name); xen_bind_pirq_msi_to_irq()
753 ret = xen_irq_info_pirq_setup(irq + i, 0, pirq + i, 0, domid, xen_bind_pirq_msi_to_irq()
759 ret = irq_set_msi_desc(irq, msidesc); xen_bind_pirq_msi_to_irq()
764 return irq; xen_bind_pirq_msi_to_irq()
767 __unbind_from_irq(irq + i); xen_bind_pirq_msi_to_irq()
773 int xen_destroy_irq(int irq) xen_destroy_irq() argument
776 struct irq_info *info = info_for_irq(irq); xen_destroy_irq()
798 pr_warn("unmap irq failed %d\n", rc); xen_destroy_irq()
803 xen_free_irq(irq); xen_destroy_irq()
812 int irq; xen_irq_from_pirq() local
821 irq = info->irq; xen_irq_from_pirq()
825 irq = -1; xen_irq_from_pirq()
829 return irq; xen_irq_from_pirq()
833 int xen_pirq_from_irq(unsigned irq) xen_pirq_from_irq() argument
835 return pirq_from_irq(irq); xen_pirq_from_irq()
841 int irq; bind_evtchn_to_irq() local
849 irq = get_evtchn_to_irq(evtchn); bind_evtchn_to_irq()
851 if (irq == -1) { bind_evtchn_to_irq()
852 irq = xen_allocate_irq_dynamic(); bind_evtchn_to_irq()
853 if (irq < 0) bind_evtchn_to_irq()
856 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip, bind_evtchn_to_irq()
859 ret = xen_irq_info_evtchn_setup(irq, evtchn); bind_evtchn_to_irq()
861 __unbind_from_irq(irq); bind_evtchn_to_irq()
862 irq = ret; bind_evtchn_to_irq()
868 struct irq_info *info = info_for_irq(irq); bind_evtchn_to_irq()
875 return irq; bind_evtchn_to_irq()
882 int evtchn, irq; bind_ipi_to_irq() local
887 irq = per_cpu(ipi_to_irq, cpu)[ipi]; bind_ipi_to_irq()
889 if (irq == -1) { bind_ipi_to_irq()
890 irq = xen_allocate_irq_dynamic(); bind_ipi_to_irq()
891 if (irq < 0) bind_ipi_to_irq()
894 irq_set_chip_and_handler_name(irq, &xen_percpu_chip, bind_ipi_to_irq()
903 ret = xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi); bind_ipi_to_irq()
905 __unbind_from_irq(irq); bind_ipi_to_irq()
906 irq = ret; bind_ipi_to_irq()
911 struct irq_info *info = info_for_irq(irq); bind_ipi_to_irq()
917 return irq; bind_ipi_to_irq()
974 int evtchn, irq, ret; bind_virq_to_irq() local
978 irq = per_cpu(virq_to_irq, cpu)[virq]; bind_virq_to_irq()
980 if (irq == -1) { bind_virq_to_irq()
981 irq = xen_allocate_irq_dynamic(); bind_virq_to_irq()
982 if (irq < 0) bind_virq_to_irq()
986 irq_set_chip_and_handler_name(irq, &xen_percpu_chip, bind_virq_to_irq()
989 irq_set_chip_and_handler_name(irq, &xen_dynamic_chip, bind_virq_to_irq()
1005 ret = xen_irq_info_virq_setup(cpu, irq, evtchn, virq); bind_virq_to_irq()
1007 __unbind_from_irq(irq); bind_virq_to_irq()
1008 irq = ret; bind_virq_to_irq()
1014 struct irq_info *info = info_for_irq(irq); bind_virq_to_irq()
1021 return irq; bind_virq_to_irq()
1024 static void unbind_from_irq(unsigned int irq) unbind_from_irq() argument
1027 __unbind_from_irq(irq); unbind_from_irq()
1036 int irq, retval; bind_evtchn_to_irqhandler() local
1038 irq = bind_evtchn_to_irq(evtchn); bind_evtchn_to_irqhandler()
1039 if (irq < 0) bind_evtchn_to_irqhandler()
1040 return irq; bind_evtchn_to_irqhandler()
1041 retval = request_irq(irq, handler, irqflags, devname, dev_id); bind_evtchn_to_irqhandler()
1043 unbind_from_irq(irq); bind_evtchn_to_irqhandler()
1047 return irq; bind_evtchn_to_irqhandler()
1058 int irq, retval; bind_interdomain_evtchn_to_irqhandler() local
1060 irq = bind_interdomain_evtchn_to_irq(remote_domain, remote_port); bind_interdomain_evtchn_to_irqhandler()
1061 if (irq < 0) bind_interdomain_evtchn_to_irqhandler()
1062 return irq; bind_interdomain_evtchn_to_irqhandler()
1064 retval = request_irq(irq, handler, irqflags, devname, dev_id); bind_interdomain_evtchn_to_irqhandler()
1066 unbind_from_irq(irq); bind_interdomain_evtchn_to_irqhandler()
1070 return irq; bind_interdomain_evtchn_to_irqhandler()
1078 int irq, retval; bind_virq_to_irqhandler() local
1080 irq = bind_virq_to_irq(virq, cpu, irqflags & IRQF_PERCPU); bind_virq_to_irqhandler()
1081 if (irq < 0) bind_virq_to_irqhandler()
1082 return irq; bind_virq_to_irqhandler()
1083 retval = request_irq(irq, handler, irqflags, devname, dev_id); bind_virq_to_irqhandler()
1085 unbind_from_irq(irq); bind_virq_to_irqhandler()
1089 return irq; bind_virq_to_irqhandler()
1100 int irq, retval; bind_ipi_to_irqhandler() local
1102 irq = bind_ipi_to_irq(ipi, cpu); bind_ipi_to_irqhandler()
1103 if (irq < 0) bind_ipi_to_irqhandler()
1104 return irq; bind_ipi_to_irqhandler()
1107 retval = request_irq(irq, handler, irqflags, devname, dev_id); bind_ipi_to_irqhandler()
1109 unbind_from_irq(irq); bind_ipi_to_irqhandler()
1113 return irq; bind_ipi_to_irqhandler()
1116 void unbind_from_irqhandler(unsigned int irq, void *dev_id) unbind_from_irqhandler() argument
1118 struct irq_info *info = irq_get_handler_data(irq); unbind_from_irqhandler()
1122 free_irq(irq, dev_id); unbind_from_irqhandler()
1123 unbind_from_irq(irq); unbind_from_irqhandler()
1129 * @irq:irq bound to an event channel.
1132 int xen_set_irq_priority(unsigned irq, unsigned priority) xen_set_irq_priority() argument
1136 set_priority.port = evtchn_from_irq(irq); xen_set_irq_priority()
1146 int irq = get_evtchn_to_irq(evtchn); evtchn_make_refcounted() local
1149 if (irq == -1) evtchn_make_refcounted()
1152 info = irq_get_handler_data(irq); evtchn_make_refcounted()
1167 int irq; evtchn_get() local
1176 irq = get_evtchn_to_irq(evtchn); evtchn_get()
1177 if (irq == -1) evtchn_get()
1180 info = irq_get_handler_data(irq); evtchn_get()
1200 int irq = get_evtchn_to_irq(evtchn); evtchn_put() local
1201 if (WARN_ON(irq == -1)) evtchn_put()
1203 unbind_from_irq(irq); evtchn_put()
1209 int irq; xen_send_IPI_one() local
1219 irq = per_cpu(ipi_to_irq, cpu)[vector]; xen_send_IPI_one()
1220 BUG_ON(irq < 0); xen_send_IPI_one()
1221 notify_remote_via_irq(irq); xen_send_IPI_one()
1273 /* Rebind a new event channel to an existing irq. */ rebind_evtchn_irq()
1274 void rebind_evtchn_irq(int evtchn, int irq) rebind_evtchn_irq() argument
1276 struct irq_info *info = info_for_irq(irq); rebind_evtchn_irq()
1281 /* Make sure the irq is masked, since the new event channel rebind_evtchn_irq()
1283 disable_irq(irq); rebind_evtchn_irq()
1287 /* After resume the irq<->evtchn mappings are all cleared out */ rebind_evtchn_irq()
1289 /* Expect irq to have been bound before, rebind_evtchn_irq()
1293 (void)xen_irq_info_evtchn_setup(irq, evtchn); rebind_evtchn_irq()
1299 irq_set_affinity(irq, cpumask_of(info->cpu)); rebind_evtchn_irq()
1302 enable_irq(irq); rebind_evtchn_irq()
1306 static int rebind_irq_to_cpu(unsigned irq, unsigned tcpu) rebind_irq_to_cpu() argument
1309 int evtchn = evtchn_from_irq(irq); rebind_irq_to_cpu()
1351 return rebind_irq_to_cpu(data->irq, tcpu); set_affinity_irq()
1356 int evtchn = evtchn_from_irq(data->irq); enable_dynirq()
1364 int evtchn = evtchn_from_irq(data->irq); disable_dynirq()
1372 int evtchn = evtchn_from_irq(data->irq); ack_dynirq()
1399 unsigned int evtchn = evtchn_from_irq(data->irq); retrigger_dynirq()
1415 int pirq, rc, irq, gsi; restore_pirqs() local
1425 irq = info->irq; restore_pirqs()
1439 pr_warn("xen map irq failed gsi=%d irq=%d pirq=%d rc=%d\n", restore_pirqs()
1440 gsi, irq, pirq, rc); restore_pirqs()
1441 xen_free_irq(irq); restore_pirqs()
1445 printk(KERN_DEBUG "xen: --> irq=%d, pirq=%d\n", irq, map_irq.pirq); restore_pirqs()
1447 __startup_pirq(irq); restore_pirqs()
1454 int virq, irq, evtchn; restore_cpu_virqs() local
1457 if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1) restore_cpu_virqs()
1460 BUG_ON(virq_from_irq(irq) != virq); restore_cpu_virqs()
1471 (void)xen_irq_info_virq_setup(cpu, irq, evtchn, virq); restore_cpu_virqs()
1479 int ipi, irq, evtchn; restore_cpu_ipis() local
1482 if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1) restore_cpu_ipis()
1485 BUG_ON(ipi_from_irq(irq) != ipi); restore_cpu_ipis()
1495 (void)xen_irq_info_ipi_setup(cpu, irq, evtchn, ipi); restore_cpu_ipis()
1500 /* Clear an irq's pending state, in preparation for polling on it */ xen_clear_irq_pending()
1501 void xen_clear_irq_pending(int irq) xen_clear_irq_pending() argument
1503 int evtchn = evtchn_from_irq(irq); xen_clear_irq_pending()
1509 void xen_set_irq_pending(int irq) xen_set_irq_pending() argument
1511 int evtchn = evtchn_from_irq(irq); xen_set_irq_pending()
1517 bool xen_test_irq_pending(int irq) xen_test_irq_pending() argument
1519 int evtchn = evtchn_from_irq(irq); xen_test_irq_pending()
1528 /* Poll waiting for an irq to become pending with timeout. In the usual case,
1529 * the irq will be disabled so it won't deliver an interrupt. */ xen_poll_irq_timeout()
1530 void xen_poll_irq_timeout(int irq, u64 timeout) xen_poll_irq_timeout() argument
1532 evtchn_port_t evtchn = evtchn_from_irq(irq); xen_poll_irq_timeout()
1546 /* Poll waiting for an irq to become pending. In the usual case, the
1547 * irq will be disabled so it won't deliver an interrupt. */ xen_poll_irq()
1548 void xen_poll_irq(int irq) xen_poll_irq() argument
1550 xen_poll_irq_timeout(irq, 0 /* no timeout */); xen_poll_irq()
1554 int xen_test_irq_shared(int irq) xen_test_irq_shared() argument
1556 struct irq_info *info = info_for_irq(irq); xen_test_irq_shared()
1562 irq_status.irq = info->u.pirq.pirq; xen_test_irq_shared()
161 xen_irq_info_common_setup(struct irq_info *info, unsigned irq, enum xen_irq_type type, unsigned evtchn, unsigned short cpu) xen_irq_info_common_setup() argument
193 xen_irq_info_ipi_setup(unsigned cpu, unsigned irq, unsigned evtchn, enum ipi_vector ipi) xen_irq_info_ipi_setup() argument
207 xen_irq_info_virq_setup(unsigned cpu, unsigned irq, unsigned evtchn, unsigned virq) xen_irq_info_virq_setup() argument
/linux-4.1.27/drivers/staging/iio/
H A Diio_dummy_evgen.h9 struct iio_dummy_regs *iio_dummy_evgen_get_regs(int irq);
11 int iio_dummy_evgen_release_irq(int irq);
/linux-4.1.27/drivers/tty/hvc/
H A Dhvc_irq.c12 static irqreturn_t hvc_handle_interrupt(int irq, void *dev_instance) hvc_handle_interrupt() argument
23 int notifier_add_irq(struct hvc_struct *hp, int irq) notifier_add_irq() argument
27 if (!irq) { notifier_add_irq()
31 rc = request_irq(irq, hvc_handle_interrupt, 0, notifier_add_irq()
38 void notifier_del_irq(struct hvc_struct *hp, int irq) notifier_del_irq() argument
42 free_irq(irq, hp); notifier_del_irq()
46 void notifier_hangup_irq(struct hvc_struct *hp, int irq) notifier_hangup_irq() argument
48 notifier_del_irq(hp, irq); notifier_hangup_irq()
/linux-4.1.27/arch/sh/drivers/pci/
H A Dfixups-sh03.c9 int irq; pcibios_map_platform_irq() local
23 case 0: irq = evt2irq(0x240); break; pcibios_map_platform_irq()
24 case 1: irq = evt2irq(0x240); break; pcibios_map_platform_irq()
25 case 2: irq = evt2irq(0x240); break; pcibios_map_platform_irq()
26 case 3: irq = evt2irq(0x240); break; pcibios_map_platform_irq()
27 case 4: irq = evt2irq(0x240); break; pcibios_map_platform_irq()
28 default: irq = -1; break; pcibios_map_platform_irq()
31 return irq; pcibios_map_platform_irq()
H A Dfixups-snapgear.c24 int irq = -1; pcibios_map_platform_irq() local
28 case 11: irq = evt2irq(0x300); break; /* USB */ pcibios_map_platform_irq()
29 case 12: irq = evt2irq(0x360); break; /* PCMCIA */ pcibios_map_platform_irq()
30 case 13: irq = evt2irq(0x2a0); break; /* eth0 */ pcibios_map_platform_irq()
31 case 14: irq = evt2irq(0x300); break; /* eth1 */ pcibios_map_platform_irq()
32 case 15: irq = evt2irq(0x360); break; /* safenet (unused) */ pcibios_map_platform_irq()
35 printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n", pcibios_map_platform_irq()
36 slot, pin - 1 + 'A', irq); pcibios_map_platform_irq()
38 return irq; pcibios_map_platform_irq()
/linux-4.1.27/arch/mn10300/kernel/
H A Dirq.c42 unsigned int irq = d->irq; mn10300_cpupic_ack() local
47 GxICR_u8(irq) = GxICR_DETECT; mn10300_cpupic_ack()
48 tmp = GxICR(irq); mn10300_cpupic_ack()
52 static void __mask_and_set_icr(unsigned int irq, __mask_and_set_icr() argument
59 tmp = GxICR(irq); __mask_and_set_icr()
60 GxICR(irq) = (tmp & mask) | set; __mask_and_set_icr()
61 tmp = GxICR(irq); __mask_and_set_icr()
67 __mask_and_set_icr(d->irq, GxICR_LEVEL, 0); mn10300_cpupic_mask()
72 unsigned int irq = d->irq; mn10300_cpupic_mask_ack() local
79 if (!test_and_clear_bit(irq, irq_affinity_request)) { mn10300_cpupic_mask_ack()
80 tmp = GxICR(irq); mn10300_cpupic_mask_ack()
81 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_DETECT; mn10300_cpupic_mask_ack()
82 tmp = GxICR(irq); mn10300_cpupic_mask_ack()
85 tmp = GxICR(irq); mn10300_cpupic_mask_ack()
86 GxICR(irq) = (tmp & GxICR_LEVEL); mn10300_cpupic_mask_ack()
87 tmp2 = GxICR(irq); mn10300_cpupic_mask_ack()
89 irq_affinity_online[irq] = mn10300_cpupic_mask_ack()
91 CROSS_GxICR(irq, irq_affinity_online[irq]) = mn10300_cpupic_mask_ack()
93 tmp = CROSS_GxICR(irq, irq_affinity_online[irq]); mn10300_cpupic_mask_ack()
98 __mask_and_set_icr(irq, GxICR_LEVEL, GxICR_DETECT); mn10300_cpupic_mask_ack()
104 __mask_and_set_icr(d->irq, GxICR_LEVEL, GxICR_ENABLE); mn10300_cpupic_unmask()
109 unsigned int irq = d->irq; mn10300_cpupic_unmask_clear() local
120 if (!test_and_clear_bit(irq, irq_affinity_request)) { mn10300_cpupic_unmask_clear()
121 tmp = GxICR(irq); mn10300_cpupic_unmask_clear()
122 GxICR(irq) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT; mn10300_cpupic_unmask_clear()
123 tmp = GxICR(irq); mn10300_cpupic_unmask_clear()
125 tmp = GxICR(irq); mn10300_cpupic_unmask_clear()
127 irq_affinity_online[irq] = cpumask_any_and(d->affinity, mn10300_cpupic_unmask_clear()
129 CROSS_GxICR(irq, irq_affinity_online[irq]) = (tmp & GxICR_LEVEL) | GxICR_ENABLE | GxICR_DETECT; mn10300_cpupic_unmask_clear()
130 tmp = CROSS_GxICR(irq, irq_affinity_online[irq]); mn10300_cpupic_unmask_clear()
135 __mask_and_set_icr(irq, GxICR_LEVEL, GxICR_ENABLE | GxICR_DETECT); mn10300_cpupic_unmask_clear()
147 set_bit(d->irq, irq_affinity_request); mn10300_cpupic_setaffinity()
195 * 'what should we do if we get a hw irq event on an illegal vector'.
198 void ack_bad_irq(int irq) ack_bad_irq() argument
200 printk(KERN_WARNING "unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
207 void set_intr_level(int irq, u16 level) set_intr_level() argument
211 __mask_and_set_icr(irq, GxICR_ENABLE, level); set_intr_level()
218 void mn10300_set_lateack_irq_type(int irq) mn10300_set_lateack_irq_type() argument
220 irq_set_chip_and_handler(irq, &mn10300_cpu_pic_level, mn10300_set_lateack_irq_type()
229 int irq; init_IRQ() local
231 for (irq = 0; irq < NR_IRQS; irq++) init_IRQ()
232 if (irq_get_chip(irq) == &no_irq_chip) init_IRQ()
237 irq_set_chip_and_handler(irq, &mn10300_cpu_pic_edge, init_IRQ()
250 int irq; do_IRQ() local
272 irq = IAGR & IAGR_GN; do_IRQ()
273 if (!irq) do_IRQ()
278 generic_handle_irq(irq >> 2); do_IRQ()
312 int irq; migrate_irqs() local
317 for (irq = 0; irq < NR_IRQS; irq++) { migrate_irqs()
318 struct irq_data *data = irq_get_irq_data(irq); migrate_irqs()
324 !cpumask_intersects(&irq_affinity[irq], cpu_online_mask)) { migrate_irqs()
331 if (irq_affinity_online[irq] == self) { migrate_irqs()
334 x = GxICR(irq); migrate_irqs()
335 GxICR(irq) = x & GxICR_LEVEL; migrate_irqs()
336 tmp = GxICR(irq); migrate_irqs()
340 irq_affinity_online[irq] = new; migrate_irqs()
342 CROSS_GxICR(irq, new) = migrate_irqs()
344 tmp = CROSS_GxICR(irq, new); migrate_irqs()
347 if (GxICR(irq) & GxICR_REQUEST) migrate_irqs()
349 CROSS_GxICR(irq, new) = x; migrate_irqs()
350 tmp = CROSS_GxICR(irq, new); migrate_irqs()
/linux-4.1.27/drivers/parisc/
H A Dgsc.c39 int irq = txn_alloc_irq(GSC_EIM_WIDTH); gsc_alloc_irq() local
40 if (irq < 0) { gsc_alloc_irq()
41 printk("cannot get irq\n"); gsc_alloc_irq()
42 return irq; gsc_alloc_irq()
45 i->txn_addr = txn_alloc_addr(irq); gsc_alloc_irq()
46 i->txn_data = txn_alloc_data(irq); gsc_alloc_irq()
47 i->irq = irq; gsc_alloc_irq()
49 return irq; gsc_alloc_irq()
52 int gsc_claim_irq(struct gsc_irq *i, int irq) gsc_claim_irq() argument
54 int c = irq; gsc_claim_irq()
56 irq += CPU_IRQ_BASE; /* virtualize the IRQ first */ gsc_claim_irq()
58 irq = txn_claim_irq(irq); gsc_claim_irq()
59 if (irq < 0) { gsc_claim_irq()
60 printk("cannot claim irq %d\n", c); gsc_claim_irq()
61 return irq; gsc_claim_irq()
64 i->txn_addr = txn_alloc_addr(irq); gsc_claim_irq()
65 i->txn_data = txn_alloc_data(irq); gsc_claim_irq()
66 i->irq = irq; gsc_claim_irq()
68 return irq; gsc_claim_irq()
88 unsigned int irq = gsc_asic->global_irq[local_irq]; gsc_asic_intr() local
89 generic_handle_irq(irq); gsc_asic_intr()
96 int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit) gsc_find_local_irq() argument
101 if (global_irqs[local_irq] == irq) gsc_find_local_irq()
111 int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32); gsc_asic_mask_irq()
114 DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq, gsc_asic_mask_irq()
126 int local_irq = gsc_find_local_irq(d->irq, irq_dev->global_irq, 32); gsc_asic_unmask_irq()
129 DEBPRINTK(KERN_DEBUG "%s(%d) %s: IMR 0x%x\n", __func__, d->irq, gsc_asic_unmask_irq()
150 static int irq = GSC_IRQ_BASE; gsc_assign_irq() local
152 if (irq > GSC_IRQ_MAX) gsc_assign_irq()
155 irq_set_chip_and_handler(irq, type, handle_simple_irq); gsc_assign_irq()
156 irq_set_chip_data(irq, data); gsc_assign_irq()
158 return irq++; gsc_assign_irq()
163 int irq = asic->global_irq[local_irq]; gsc_asic_assign_irq() local
165 if (irq <= 0) { gsc_asic_assign_irq()
166 irq = gsc_assign_irq(&gsc_asic_interrupt_type, asic); gsc_asic_assign_irq()
167 if (irq == NO_IRQ) gsc_asic_assign_irq()
170 asic->global_irq[local_irq] = irq; gsc_asic_assign_irq()
172 *irqp = irq; gsc_asic_assign_irq()
212 /* Initialise local irq -> global irq mapping */ gsc_common_setup()
225 parent->irq, gsc_asic->eim); gsc_common_setup()
H A Dasp.c36 int irq; asp_choose_irq() local
39 case 0x71: irq = 9; break; /* SCSI */ asp_choose_irq()
40 case 0x72: irq = 8; break; /* LAN */ asp_choose_irq()
41 case 0x73: irq = 1; break; /* HIL */ asp_choose_irq()
42 case 0x74: irq = 7; break; /* Centronics */ asp_choose_irq()
43 case 0x75: irq = (dev->hw_path == 4) ? 5 : 6; break; /* RS232 */ asp_choose_irq()
44 case 0x76: irq = 10; break; /* EISA BA */ asp_choose_irq()
45 case 0x77: irq = 11; break; /* Graphics1 */ asp_choose_irq()
46 case 0x7a: irq = 13; break; /* Audio (Bushmaster) */ asp_choose_irq()
47 case 0x7b: irq = 13; break; /* Audio (Scorpio) */ asp_choose_irq()
48 case 0x7c: irq = 3; break; /* FW SCSI */ asp_choose_irq()
49 case 0x7d: irq = 4; break; /* FDDI */ asp_choose_irq()
50 case 0x7f: irq = 13; break; /* Audio (Outfield) */ asp_choose_irq()
54 gsc_asic_assign_irq(ctrl, irq, &dev->irq); asp_choose_irq()
57 case 0x73: irq = 2; break; /* i8042 High-priority */ asp_choose_irq()
58 case 0x76: irq = 0; break; /* EISA BA */ asp_choose_irq()
62 gsc_asic_assign_irq(ctrl, irq, &dev->aux_irq); asp_choose_irq()
87 dev->irq = gsc_claim_irq(&gsc_irq, ASP_GSC_IRQ); asp_init_chip()
88 if (dev->irq < 0) { asp_init_chip()
89 printk(KERN_ERR "%s(): cannot get GSC irq\n", __func__); asp_init_chip()
95 ret = request_irq(gsc_irq.irq, gsc_asic_intr, 0, "asp", &asp); asp_init_chip()
99 /* Program VIPER to interrupt on the ASP irq */ asp_init_chip()
/linux-4.1.27/arch/sparc/include/asm/
H A Dirq_32.h0 /* irq.h: IRQ registers on the Sparc.
9 /* Allocated number of logical irq numbers.
17 #define irq_canonicalize(irq) (irq)
/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Darm-gic.h8 #include <dt-bindings/interrupt-controller/irq.h>
17 * The flags in irq.h are valid, plus those below.
/linux-4.1.27/arch/sh/boards/mach-cayman/
H A DMakefile4 obj-y := setup.o irq.o panic.o
H A Dirq.c2 * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support
13 #include <linux/irq.h>
16 #include <cpu/irq.h>
34 static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id) cayman_interrupt_smsc() argument
40 static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id) cayman_interrupt_pci2() argument
42 printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq); cayman_interrupt_pci2()
58 unsigned int irq = data->irq; enable_cayman_irq() local
64 irq -= START_EXT_IRQS; enable_cayman_irq()
65 reg = EPLD_MASK_BASE + ((irq / 8) << 2); enable_cayman_irq()
66 bit = 1<<(irq % 8); enable_cayman_irq()
76 unsigned int irq = data->irq; disable_cayman_irq() local
82 irq -= START_EXT_IRQS; disable_cayman_irq()
83 reg = EPLD_MASK_BASE + ((irq / 8) << 2); disable_cayman_irq()
84 bit = 1<<(irq % 8); disable_cayman_irq()
100 int irq = intc_evt_to_irq[evt]; cayman_irq_demux() local
102 if (irq == SMSC_IRQ) { cayman_irq_demux()
109 irq = -1; cayman_irq_demux()
115 irq = START_EXT_IRQS + i; cayman_irq_demux()
119 if (irq == PCI2_IRQ) { cayman_irq_demux()
126 irq = -1; cayman_irq_demux()
132 irq = START_EXT_IRQS + (3 * 8) + i; cayman_irq_demux()
136 return irq; cayman_irq_demux()
/linux-4.1.27/arch/sh/boards/mach-dreamcast/
H A DMakefile5 obj-y := setup.o irq.o rtc.o
H A Dirq.c2 * arch/sh/boards/dreamcast/irq.c
11 #include <linux/irq.h>
13 #include <linux/irq.h>
66 unsigned int irq = data->irq; disable_systemasic_irq() local
67 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); disable_systemasic_irq()
71 mask &= ~(1 << EVENT_BIT(irq)); disable_systemasic_irq()
78 unsigned int irq = data->irq; enable_systemasic_irq() local
79 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); enable_systemasic_irq()
83 mask |= (1 << EVENT_BIT(irq)); enable_systemasic_irq()
90 unsigned int irq = data->irq; mask_ack_systemasic_irq() local
91 __u32 esr = ESR_BASE + (LEVEL(irq) << 2); mask_ack_systemasic_irq()
93 outl((1 << EVENT_BIT(irq)), esr); mask_ack_systemasic_irq()
106 int systemasic_irq_demux(int irq) systemasic_irq_demux() argument
111 switch (irq) { systemasic_irq_demux()
122 return irq; systemasic_irq_demux()
134 irq = HW_EVENT_IRQ_BASE + j + (level << 5); systemasic_irq_demux()
135 return irq; systemasic_irq_demux()
140 return irq; systemasic_irq_demux()
/linux-4.1.27/arch/sh/boards/mach-landisk/
H A DMakefile5 obj-y := setup.o irq.o psw.o gio.o
/linux-4.1.27/arch/sh/boards/mach-lboxre2/
H A DMakefile5 obj-y := setup.o irq.o
H A Dirq.c2 * linux/arch/sh/boards/lboxre2/irq.c
15 #include <linux/irq.h>
16 #include <asm/irq.h>
/linux-4.1.27/arch/sh/boards/mach-microdev/
H A DMakefile5 obj-y := setup.o irq.o io.o fdc37c93xapm.o
/linux-4.1.27/arch/sh/boards/mach-r2d/
H A DMakefile5 obj-y := setup.o irq.o
/linux-4.1.27/arch/sh/boards/mach-sdk7780/
H A DMakefile4 obj-y := setup.o irq.o
/linux-4.1.27/arch/sh/boards/mach-sdk7786/
H A DMakefile1 obj-y := fpga.o irq.o nmi.o setup.o
/linux-4.1.27/arch/sh/boards/mach-se/7206/
H A DMakefile5 obj-y := setup.o irq.o
H A Dirq.c2 * linux/arch/sh/boards/se/7206/irq.c
10 #include <linux/irq.h>
30 unsigned int irq = data->irq; disable_se7206_irq() local
32 unsigned short mask = 0xffff ^ (0x0f << 4 * (3 - (IRQ0_IRQ - irq))); disable_se7206_irq()
43 switch (irq) { disable_se7206_irq()
61 unsigned int irq = data->irq; enable_se7206_irq() local
63 unsigned short value = (0x0001 << 4 * (3 - (IRQ0_IRQ - irq))); enable_se7206_irq()
75 switch (irq) { enable_se7206_irq()
94 unsigned int irq = data->irq; eoi_se7206_irq() local
102 switch (irq) { eoi_se7206_irq()
125 static void make_se7206_irq(unsigned int irq) make_se7206_irq() argument
127 disable_irq_nosync(irq); make_se7206_irq()
128 irq_set_chip_and_handler_name(irq, &se7206_irq_chip, make_se7206_irq()
130 disable_se7206_irq(irq_get_irq_data(irq)); make_se7206_irq()
/linux-4.1.27/arch/sh/boards/mach-se/7343/
H A DMakefile5 obj-y := setup.o irq.o
/linux-4.1.27/arch/sh/boards/mach-se/770x/
H A DMakefile5 obj-y := setup.o irq.o
/linux-4.1.27/arch/sh/boards/mach-se/7751/
H A DMakefile5 obj-y := setup.o irq.o
/linux-4.1.27/arch/sh/include/mach-sdk7786/mach/
H A Dirq.h4 /* arch/sh/boards/mach-sdk7786/irq.c */
/linux-4.1.27/arch/mips/jazz/
H A DMakefile5 obj-y := irq.o jazzdma.o reset.o setup.o
/linux-4.1.27/arch/mn10300/unit-asb2305/
H A DMakefile8 obj-$(CONFIG_PCI) += pci.o pci-asb2305.o pci-irq.o
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Darm-gic.h8 #include <dt-bindings/interrupt-controller/irq.h>
17 * The flags in irq.h are valid, plus those below.
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Darm-gic.h8 #include <dt-bindings/interrupt-controller/irq.h>
17 * The flags in irq.h are valid, plus those below.
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Darm-gic.h8 #include <dt-bindings/interrupt-controller/irq.h>
17 * The flags in irq.h are valid, plus those below.
/linux-4.1.27/arch/arm/mach-iop33x/
H A DMakefile5 obj-y := irq.o uart.o
/linux-4.1.27/arch/arm/mach-lpc32xx/
H A DMakefile5 obj-y := timer.o irq.o common.o serial.o clock.o
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Darm-gic.h8 #include <dt-bindings/interrupt-controller/irq.h>
17 * The flags in irq.h are valid, plus those below.
/linux-4.1.27/include/dt-bindings/interrupt-controller/
H A Dmips-gic.h4 #include <dt-bindings/interrupt-controller/irq.h>
H A Darm-gic.h8 #include <dt-bindings/interrupt-controller/irq.h>
17 * The flags in irq.h are valid, plus those below.
/linux-4.1.27/arch/m68k/kernel/
H A Dints.c15 #include <linux/irq.h>
18 #include <asm/irq.h>
72 * standard do_IRQ(), it will be called with irq numbers in the range
105 * @chip: irq chip which controls specified irq
106 * @handle: flow handler which handles specified irq
107 * @irq: first irq to be managed by the controller
110 * Change the controller for the specified range of irq, which will be used to
111 * manage these irq. auto/user irq already have a default controller, which can
116 irq_flow_handler_t handle, unsigned int irq, m68k_setup_irq_controller()
122 irq_set_chip(irq + i, chip); m68k_setup_irq_controller()
124 irq_set_handler(irq + i, handle); m68k_setup_irq_controller()
128 unsigned int m68k_irq_startup_irq(unsigned int irq) m68k_irq_startup_irq() argument
130 if (irq <= IRQ_AUTO_7) m68k_irq_startup_irq()
131 vectors[VEC_SPUR + irq] = auto_inthandler; m68k_irq_startup_irq()
133 vectors[m68k_first_user_vec + irq - IRQ_USER] = user_inthandler; m68k_irq_startup_irq()
139 return m68k_irq_startup_irq(data->irq); m68k_irq_startup()
144 unsigned int irq = data->irq; m68k_irq_shutdown() local
146 if (irq <= IRQ_AUTO_7) m68k_irq_shutdown()
147 vectors[VEC_SPUR + irq] = bad_inthandler; m68k_irq_shutdown()
149 vectors[m68k_first_user_vec + irq - IRQ_USER] = bad_inthandler; m68k_irq_shutdown()
153 unsigned int irq_canonicalize(unsigned int irq) irq_canonicalize() argument
156 if (MACH_IS_Q40 && irq == 11) irq_canonicalize()
157 irq = 10; irq_canonicalize()
159 return irq; irq_canonicalize()
115 m68k_setup_irq_controller(struct irq_chip *chip, irq_flow_handler_t handle, unsigned int irq, unsigned int cnt) m68k_setup_irq_controller() argument
H A Dirq.c2 * irq.c
16 #include <linux/irq.h>
20 asmlinkage void do_IRQ(int irq, struct pt_regs *regs) do_IRQ() argument
25 generic_handle_irq(irq); do_IRQ()
/linux-4.1.27/arch/arm/mach-footbridge/
H A Dcats-pci.c12 #include <asm/irq.h>
26 if (dev->irq >= 255) cats_map_irq()
29 if (dev->irq >= 128) cats_map_irq()
30 return dev->irq & 0x1f; cats_map_irq()
32 if (dev->irq >= 1 && dev->irq <= 4) cats_map_irq()
33 return irqmap_cats[dev->irq - 1]; cats_map_irq()
35 if (dev->irq != 0) cats_map_irq()
36 printk("PCI: device %02x:%02x has unknown irq line %x\n", cats_map_irq()
37 dev->bus->number, dev->devfn, dev->irq); cats_map_irq()
H A Disa-timer.c11 #include <linux/irq.h>
15 #include <asm/irq.h>
20 static irqreturn_t pit_timer_interrupt(int irq, void *dev_id) pit_timer_interrupt() argument
38 setup_irq(i8253_clockevent.irq, &pit_timer_irq); isa_timer_init()
H A Disa-irq.c2 * linux/arch/arm/mach-footbridge/irq.c
24 #include <asm/mach/irq.h>
28 #include <asm/irq.h>
35 unsigned int mask = 1 << (d->irq & 7); isa_mask_pic_lo_irq()
42 unsigned int mask = 1 << (d->irq & 7); isa_ack_pic_lo_irq()
50 unsigned int mask = 1 << (d->irq & 7); isa_unmask_pic_lo_irq()
63 unsigned int mask = 1 << (d->irq & 7); isa_mask_pic_hi_irq()
70 unsigned int mask = 1 << (d->irq & 7); isa_ack_pic_hi_irq()
79 unsigned int mask = 1 << (d->irq & 7); isa_unmask_pic_hi_irq()
91 isa_irq_handler(unsigned int irq, struct irq_desc *desc) isa_irq_handler() argument
122 unsigned int irq; isa_init_irq() local
153 for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { isa_init_irq()
154 irq_set_chip_and_handler(irq, &isa_lo_chip, isa_init_irq()
156 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); isa_init_irq()
159 for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { isa_init_irq()
160 irq_set_chip_and_handler(irq, &isa_hi_chip, isa_init_irq()
162 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); isa_init_irq()
/linux-4.1.27/arch/frv/kernel/
H A Dirq-mb93093.c0 /* irq-mb93093.c: MB93093 FPGA interrupt handling
19 #include <linux/irq.h>
24 #include <asm/irq.h>
41 imr |= 1 << (d->irq - IRQ_BASE_FPGA); frv_fpga_mask()
47 __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); frv_fpga_ack()
54 imr |= 1 << (d->irq - IRQ_BASE_FPGA); frv_fpga_mask_ack()
57 __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); frv_fpga_mask_ack()
64 imr &= ~(1 << (d->irq - IRQ_BASE_FPGA)); frv_fpga_unmask()
80 static irqreturn_t fpga_interrupt(int irq, void *_mask) fpga_interrupt() argument
89 int irq; fpga_interrupt() local
91 asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask)); fpga_interrupt()
92 irq = 31 - irq; fpga_interrupt()
93 mask &= ~(1 << irq); fpga_interrupt()
95 generic_handle_irq(IRQ_BASE_FPGA + irq); fpga_interrupt()
118 int irq; fpga_init() local
124 for (irq = IRQ_BASE_FPGA + 8; irq <= IRQ_BASE_FPGA + 10; irq++) fpga_init()
125 irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_edge_irq); fpga_init()
H A Dirq-mb93091.c0 /* irq-mb93091.c: MB93091 FPGA interrupt handling
19 #include <linux/irq.h>
24 #include <asm/irq.h>
42 imr |= 1 << (d->irq - IRQ_BASE_FPGA); frv_fpga_mask()
49 __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); frv_fpga_ack()
56 imr |= 1 << (d->irq - IRQ_BASE_FPGA); frv_fpga_mask_ack()
59 __clr_IFR(1 << (d->irq - IRQ_BASE_FPGA)); frv_fpga_mask_ack()
66 imr &= ~(1 << (d->irq - IRQ_BASE_FPGA)); frv_fpga_unmask()
82 static irqreturn_t fpga_interrupt(int irq, void *_mask) fpga_interrupt() argument
91 int irq; fpga_interrupt() local
93 asm("scan %1,gr0,%0" : "=r"(irq) : "r"(mask)); fpga_interrupt()
94 irq = 31 - irq; fpga_interrupt()
95 mask &= ~(1 << irq); fpga_interrupt()
97 generic_handle_irq(IRQ_BASE_FPGA + irq); fpga_interrupt()
139 int irq; fpga_init() local
147 for (irq = IRQ_BASE_FPGA + 1; irq <= IRQ_BASE_FPGA + 14; irq++) fpga_init()
148 irq_set_chip_and_handler(irq, &frv_fpga_pic, handle_level_irq); fpga_init()
H A Dirq-mb93493.c0 /* irq-mb93493.c: MB93493 companion chip interrupt handler
19 #include <linux/irq.h>
24 #include <asm/irq.h>
52 if (IRQ_ROUTING & (1 << (d->irq - IRQ_BASE_MB93493))) frv_mb93493_mask()
58 iqsr &= ~(1 << (d->irq - IRQ_BASE_MB93493 + 16)); frv_mb93493_mask()
71 if (IRQ_ROUTING & (1 << (d->irq - IRQ_BASE_MB93493))) frv_mb93493_unmask()
77 iqsr |= 1 << (d->irq - IRQ_BASE_MB93493 + 16); frv_mb93493_unmask()
92 static irqreturn_t mb93493_interrupt(int irq, void *_piqsr) mb93493_interrupt() argument
102 int irq; mb93493_interrupt() local
104 asm("scan %1,gr0,%0" : "=r"(irq) : "r"(iqsr)); mb93493_interrupt()
105 irq = 31 - irq; mb93493_interrupt()
106 iqsr &= ~(1 << irq); mb93493_interrupt()
108 generic_handle_irq(IRQ_BASE_MB93493 + irq); mb93493_interrupt()
138 int irq; mb93493_init() local
140 for (irq = IRQ_BASE_MB93493 + 0; irq <= IRQ_BASE_MB93493 + 10; irq++) mb93493_init()
141 irq_set_chip_and_handler(irq, &frv_mb93493_pic, mb93493_init()
H A DMakefile13 debug-stub.o irq.o sleep.o uaccess.o
17 obj-$(CONFIG_MB93091_VDK) += irq-mb93091.o
20 obj-$(CONFIG_FUJITSU_MB93493) += irq-mb93493.o
/linux-4.1.27/arch/m68k/include/asm/
H A Datariints.h21 #include <asm/irq.h>
112 * the MFP. 'type' should be constant, if 'irq' is constant, too, code size is
115 static inline int get_mfp_bit( unsigned irq, int type ) get_mfp_bit() argument
119 mask = 1 << (irq & 7); get_mfp_bit()
121 ((irq & 8) >> 2) + (((irq-8) & 16) << 3); get_mfp_bit()
125 static inline void set_mfp_bit( unsigned irq, int type ) set_mfp_bit() argument
129 mask = 1 << (irq & 7); set_mfp_bit()
131 ((irq & 8) >> 2) + (((irq-8) & 16) << 3); set_mfp_bit()
136 static inline void clear_mfp_bit( unsigned irq, int type ) clear_mfp_bit() argument
140 mask = ~(1 << (irq & 7)); clear_mfp_bit()
142 ((irq & 8) >> 2) + (((irq-8) & 16) << 3); clear_mfp_bit()
157 static inline void atari_enable_irq( unsigned irq ) atari_enable_irq()
160 if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; atari_enable_irq()
161 set_mfp_bit( irq, MFP_MASK ); atari_enable_irq()
164 static inline void atari_disable_irq( unsigned irq ) atari_disable_irq()
167 if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; atari_disable_irq()
168 clear_mfp_bit( irq, MFP_MASK ); atari_disable_irq()
176 static inline void atari_turnon_irq( unsigned irq ) atari_turnon_irq()
179 if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; atari_turnon_irq()
180 set_mfp_bit( irq, MFP_ENABLE ); atari_turnon_irq()
183 static inline void atari_turnoff_irq( unsigned irq ) atari_turnoff_irq()
186 if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; atari_turnoff_irq()
187 clear_mfp_bit( irq, MFP_ENABLE ); atari_turnoff_irq()
188 clear_mfp_bit( irq, MFP_PENDING ); atari_turnoff_irq()
191 static inline void atari_clear_pending_irq( unsigned irq ) atari_clear_pending_irq()
194 if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return; atari_clear_pending_irq()
195 clear_mfp_bit( irq, MFP_PENDING ); atari_clear_pending_irq()
198 static inline int atari_irq_pending( unsigned irq ) atari_irq_pending()
201 if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return( 0 ); atari_irq_pending()
202 return( get_mfp_bit( irq, MFP_PENDING ) ); atari_irq_pending()
H A Dhardirq.h6 #include <asm/irq.h>
10 static inline void ack_bad_irq(unsigned int irq) ack_bad_irq() argument
12 pr_crit("unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
/linux-4.1.27/include/trace/events/
H A Dirq.h2 #define TRACE_SYSTEM irq
42 * irq_handler_entry - called immediately before the irq action handler
43 * @irq: irq number
50 * out irq handler latencies.
54 TP_PROTO(int irq, struct irqaction *action),
56 TP_ARGS(irq, action),
59 __field( int, irq )
64 __entry->irq = irq;
68 TP_printk("irq=%d name=%s", __entry->irq, __get_str(name))
72 * irq_handler_exit - called immediately after the irq action handler returns
73 * @irq: irq number
78 * @action->handler scuccessully handled this irq. Otherwise, the irq might be
79 * a shared irq line, or the irq was not handled successfully. Can be used in
80 * conjunction with the irq_handler_entry to understand irq handler latencies.
84 TP_PROTO(int irq, struct irqaction *action, int ret),
86 TP_ARGS(irq, action, ret),
89 __field( int, irq )
94 __entry->irq = irq;
98 TP_printk("irq=%d ret=%s",
99 __entry->irq, __entry->ret ? "handled" : "unhandled")
/linux-4.1.27/drivers/acpi/
H A Dgsi.c12 #include <linux/irq.h>
37 * acpi_gsi_to_irq() - Retrieve the linux irq number for a given GSI
39 * @irq: pointer where linux IRQ number is stored
41 * irq location updated with irq value [>0 on success, 0 on failure]
46 int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) acpi_gsi_to_irq() argument
53 *irq = irq_find_mapping(NULL, gsi); acpi_gsi_to_irq()
55 * *irq == 0 means no mapping, that should acpi_gsi_to_irq()
58 return (*irq > 0) ? *irq : -EINVAL; acpi_gsi_to_irq()
75 unsigned int irq; acpi_register_gsi() local
83 irq = irq_create_mapping(NULL, gsi); acpi_register_gsi()
84 if (!irq) acpi_register_gsi()
87 /* Set irq type if specified and different than the current one */ acpi_register_gsi()
89 irq_type != irq_get_trigger_type(irq)) acpi_register_gsi()
90 irq_set_irq_type(irq, irq_type); acpi_register_gsi()
91 return irq; acpi_register_gsi()
101 int irq = irq_find_mapping(NULL, gsi); acpi_unregister_gsi() local
103 irq_dispose_mapping(irq); acpi_unregister_gsi()
H A Dpci_link.c71 * later even the link is disable. Instead, we just repick the active irq
87 struct acpi_pci_link_irq irq; member in struct:acpi_pci_link
113 struct acpi_resource_irq *p = &resource->data.irq; acpi_pci_link_check_possible()
128 link->irq.possible[i] = p->interrupts[i]; acpi_pci_link_check_possible()
129 link->irq.possible_count++; acpi_pci_link_check_possible()
131 link->irq.triggering = p->triggering; acpi_pci_link_check_possible()
132 link->irq.polarity = p->polarity; acpi_pci_link_check_possible()
133 link->irq.resource_type = ACPI_RESOURCE_TYPE_IRQ; acpi_pci_link_check_possible()
154 link->irq.possible[i] = p->interrupts[i]; acpi_pci_link_check_possible()
155 link->irq.possible_count++; acpi_pci_link_check_possible()
157 link->irq.triggering = p->triggering; acpi_pci_link_check_possible()
158 link->irq.polarity = p->polarity; acpi_pci_link_check_possible()
159 link->irq.resource_type = ACPI_RESOURCE_TYPE_EXTENDED_IRQ; acpi_pci_link_check_possible()
184 link->irq.possible_count)); acpi_pci_link_get_possible()
192 int *irq = context; acpi_pci_link_check_current() local
200 struct acpi_resource_irq *p = &resource->data.irq; acpi_pci_link_check_current()
210 *irq = p->interrupts[0]; acpi_pci_link_check_current()
226 *irq = p->interrupts[0]; acpi_pci_link_check_current()
240 * Run _CRS and set link->irq.active
250 int irq = 0; acpi_pci_link_get_current() local
252 link->irq.active = 0; acpi_pci_link_get_current()
274 acpi_pci_link_check_current, &irq); acpi_pci_link_get_current()
281 if (acpi_strict && !irq) { acpi_pci_link_get_current()
286 link->irq.active = irq; acpi_pci_link_get_current()
288 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Link at IRQ %d \n", link->irq.active)); acpi_pci_link_get_current()
294 static int acpi_pci_link_set(struct acpi_pci_link *link, int irq) acpi_pci_link_set() argument
304 if (!irq) acpi_pci_link_set()
314 switch (link->irq.resource_type) { acpi_pci_link_set()
318 resource->res.data.irq.triggering = link->irq.triggering; acpi_pci_link_set()
319 resource->res.data.irq.polarity = acpi_pci_link_set()
320 link->irq.polarity; acpi_pci_link_set()
321 if (link->irq.triggering == ACPI_EDGE_SENSITIVE) acpi_pci_link_set()
322 resource->res.data.irq.sharable = acpi_pci_link_set()
325 resource->res.data.irq.sharable = ACPI_SHARED; acpi_pci_link_set()
326 resource->res.data.irq.interrupt_count = 1; acpi_pci_link_set()
327 resource->res.data.irq.interrupts[0] = irq; acpi_pci_link_set()
336 link->irq.triggering; acpi_pci_link_set()
338 link->irq.polarity; acpi_pci_link_set()
339 if (link->irq.triggering == ACPI_EDGE_SENSITIVE) acpi_pci_link_set()
340 resource->res.data.irq.sharable = acpi_pci_link_set()
343 resource->res.data.irq.sharable = ACPI_SHARED; acpi_pci_link_set()
345 resource->res.data.extended_irq.interrupts[0] = irq; acpi_pci_link_set()
349 printk(KERN_ERR PREFIX "Invalid Resource_type %d\n", link->irq.resource_type); acpi_pci_link_set()
380 /* Query _CRS, set link->irq.active */ acpi_pci_link_set()
388 * set link->irq.active acpi_pci_link_set()
390 if (link->irq.active != irq) { acpi_pci_link_set()
398 acpi_device_bid(link->device), link->irq.active, irq); acpi_pci_link_set()
399 link->irq.active = irq; acpi_pci_link_set()
402 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Set IRQ %d\n", link->irq.active)); acpi_pci_link_set()
488 if (link->irq.possible_count) { acpi_irq_penalty_init()
491 link->irq.possible_count; acpi_irq_penalty_init()
493 for (i = 0; i < link->irq.possible_count; i++) { acpi_irq_penalty_init()
494 if (link->irq.possible[i] < ACPI_MAX_ISA_IRQ) acpi_irq_penalty_init()
495 acpi_irq_penalty[link->irq. acpi_irq_penalty_init()
500 } else if (link->irq.active) { acpi_irq_penalty_init()
501 acpi_irq_penalty[link->irq.active] += acpi_irq_penalty_init()
514 int irq; acpi_pci_link_allocate() local
517 if (link->irq.initialized) { acpi_pci_link_allocate()
520 acpi_pci_link_set(link, link->irq.active); acpi_pci_link_allocate()
527 for (i = 0; i < link->irq.possible_count; ++i) { acpi_pci_link_allocate()
528 if (link->irq.active == link->irq.possible[i]) acpi_pci_link_allocate()
534 if (i == link->irq.possible_count) { acpi_pci_link_allocate()
537 " in _PRS\n", link->irq.active); acpi_pci_link_allocate()
538 link->irq.active = 0; acpi_pci_link_allocate()
544 if (link->irq.active) acpi_pci_link_allocate()
545 irq = link->irq.active; acpi_pci_link_allocate()
547 irq = link->irq.possible[link->irq.possible_count - 1]; acpi_pci_link_allocate()
549 if (acpi_irq_balance || !link->irq.active) { acpi_pci_link_allocate()
554 for (i = (link->irq.possible_count - 1); i >= 0; i--) { acpi_pci_link_allocate()
555 if (acpi_irq_penalty[irq] > acpi_pci_link_allocate()
556 acpi_irq_penalty[link->irq.possible[i]]) acpi_pci_link_allocate()
557 irq = link->irq.possible[i]; acpi_pci_link_allocate()
562 if (acpi_pci_link_set(link, irq)) { acpi_pci_link_allocate()
569 acpi_irq_penalty[link->irq.active] += PIRQ_PENALTY_PCI_USING; acpi_pci_link_allocate()
572 acpi_device_bid(link->device), link->irq.active); acpi_pci_link_allocate()
575 link->irq.initialized = 1; acpi_pci_link_allocate()
615 if (!link->irq.active) { acpi_pci_link_allocate_irq()
624 *triggering = link->irq.triggering; acpi_pci_link_allocate_irq()
626 *polarity = link->irq.polarity; acpi_pci_link_allocate_irq()
632 return (link->irq.active); acpi_pci_link_allocate_irq()
636 * We don't change link's irq information here. After it is reenabled, we
658 if (!link->irq.initialized) { acpi_pci_link_free_irq()
683 return (link->irq.active); acpi_pci_link_free_irq()
712 /* query and set link->irq.active */ acpi_pci_link_add()
717 for (i = 0; i < link->irq.possible_count; i++) { acpi_pci_link_add()
718 if (link->irq.active == link->irq.possible[i]) { acpi_pci_link_add()
719 printk(KERN_CONT " *%d", link->irq.possible[i]); acpi_pci_link_add()
722 printk(KERN_CONT " %d", link->irq.possible[i]); acpi_pci_link_add()
728 printk(KERN_CONT " *%d", link->irq.active); acpi_pci_link_add()
750 if (link->refcnt && link->irq.active && link->irq.initialized) acpi_pci_link_resume()
751 return (acpi_pci_link_set(link, link->irq.active)); acpi_pci_link_resume()
787 int irq; acpi_irq_penalty_update() local
789 retval = get_option(&str, &irq); acpi_irq_penalty_update()
794 if (irq < 0) acpi_irq_penalty_update()
797 if (irq >= ARRAY_SIZE(acpi_irq_penalty)) acpi_irq_penalty_update()
801 acpi_irq_penalty[irq] += PIRQ_PENALTY_ISA_USED; acpi_irq_penalty_update()
803 acpi_irq_penalty[irq] = PIRQ_PENALTY_PCI_AVAILABLE; acpi_irq_penalty_update()
818 void acpi_penalize_isa_irq(int irq, int active) acpi_penalize_isa_irq() argument
820 if (irq >= 0 && irq < ARRAY_SIZE(acpi_irq_penalty)) { acpi_penalize_isa_irq()
822 acpi_irq_penalty[irq] += PIRQ_PENALTY_ISA_USED; acpi_penalize_isa_irq()
824 acpi_irq_penalty[irq] += PIRQ_PENALTY_PCI_USING; acpi_penalize_isa_irq()
833 void acpi_penalize_sci_irq(int irq, int trigger, int polarity) acpi_penalize_sci_irq() argument
835 if (irq >= 0 && irq < ARRAY_SIZE(acpi_irq_penalty)) { acpi_penalize_sci_irq()
838 acpi_irq_penalty[irq] += PIRQ_PENALTY_ISA_ALWAYS; acpi_penalize_sci_irq()
840 acpi_irq_penalty[irq] += PIRQ_PENALTY_PCI_USING; acpi_penalize_sci_irq()
/linux-4.1.27/drivers/pci/
H A Dhtirq.c9 #include <linux/irq.h>
16 /* Global ht irq lock.
19 * irq capability.
21 * With multiple simultaneous hypertransport irq devices it might pay
36 void write_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) write_ht_irq_msg() argument
38 struct ht_irq_cfg *cfg = irq_get_handler_data(irq); write_ht_irq_msg()
50 cfg->update(cfg->dev, irq, msg); write_ht_irq_msg()
55 void fetch_ht_irq_msg(unsigned int irq, struct ht_irq_msg *msg) fetch_ht_irq_msg() argument
57 struct ht_irq_cfg *cfg = irq_get_handler_data(irq); fetch_ht_irq_msg()
67 write_ht_irq_msg(data->irq, &msg); mask_ht_irq()
76 write_ht_irq_msg(data->irq, &msg); unmask_ht_irq()
80 * __ht_create_irq - create an irq and attach it to a device.
81 * @dev: The hypertransport device to find the irq capability on.
85 * The irq number of the new irq or a negative error value is returned.
90 int max_irq, pos, irq; __ht_create_irq() local
120 irq = irq_alloc_hwirq(dev_to_node(&dev->dev)); __ht_create_irq()
121 if (!irq) { __ht_create_irq()
125 irq_set_handler_data(irq, cfg); __ht_create_irq()
127 if (arch_setup_ht_irq(irq, dev) < 0) { __ht_create_irq()
128 ht_destroy_irq(irq); __ht_create_irq()
132 return irq; __ht_create_irq()
137 * ht_create_irq - create an irq and attach it to a device.
138 * @dev: The hypertransport device to find the irq capability on.
144 * The irq number of the new irq or a negative error value is returned.
153 * ht_destroy_irq - destroy an irq created with ht_create_irq
154 * @irq: irq to be destroyed
156 * This reverses ht_create_irq removing the specified irq from
157 * existence. The irq should be free before this happens.
159 void ht_destroy_irq(unsigned int irq) ht_destroy_irq() argument
163 cfg = irq_get_handler_data(irq); ht_destroy_irq()
164 irq_set_chip(irq, NULL); ht_destroy_irq()
165 irq_set_handler_data(irq, NULL); ht_destroy_irq()
166 irq_free_hwirq(irq); ht_destroy_irq()
H A Dsetup-irq.c2 * drivers/pci/setup-irq.c
19 void __weak pcibios_update_irq(struct pci_dev *dev, int irq) pcibios_update_irq() argument
21 dev_dbg(&dev->dev, "assigning IRQ %02d\n", irq); pcibios_update_irq()
22 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq); pcibios_update_irq()
30 int irq = 0; pdev_fixup_irq() local
47 irq = (*map_irq)(dev, slot, pin); pdev_fixup_irq()
48 if (irq == -1) pdev_fixup_irq()
49 irq = 0; pdev_fixup_irq()
51 dev->irq = irq; pdev_fixup_irq()
53 dev_dbg(&dev->dev, "fixup irq: got %d\n", dev->irq); pdev_fixup_irq()
57 pcibios_update_irq(dev, irq); pdev_fixup_irq()
/linux-4.1.27/arch/microblaze/kernel/
H A Dirq.c19 #include <linux/irq.h>
27 unsigned int irq; do_IRQ() local
32 irq = get_irq(); do_IRQ()
34 BUG_ON(!irq); do_IRQ()
35 generic_handle_irq(irq); do_IRQ()
37 irq = get_irq(); do_IRQ()
38 if (irq != -1U) { do_IRQ()
39 pr_debug("next irq: %d\n", irq); do_IRQ()
/linux-4.1.27/arch/sh/include/asm/
H A Dirq.h29 extern void make_maskreg_irq(unsigned int irq);
36 void make_imask_irq(unsigned int irq);
38 static inline int generic_irq_demux(int irq) generic_irq_demux() argument
40 return irq; generic_irq_demux()
43 #define irq_demux(irq) sh_mv.mv_irq_demux(irq)
48 asmlinkage int do_IRQ(unsigned int irq, struct pt_regs *regs);
60 extern unsigned int irq_lookup(unsigned int irq);
61 extern void irq_finish(unsigned int irq);
63 #define irq_lookup(irq) (irq)
64 #define irq_finish(irq) do { } while (0)
67 #include <asm-generic/irq.h>
69 #include <cpu/irq.h>
H A Dhardirq.h5 #include <linux/irq.h>
14 extern void ack_bad_irq(unsigned int irq);
/linux-4.1.27/drivers/mfd/
H A Dda9052-irq.c5 * Based on arizona-irq.c, which is:
20 #include <linux/irq.h>
179 static int da9052_map_irq(struct da9052 *da9052, int irq) da9052_map_irq() argument
181 return regmap_irq_get_virq(da9052->irq_data, irq); da9052_map_irq()
184 int da9052_enable_irq(struct da9052 *da9052, int irq) da9052_enable_irq() argument
186 irq = da9052_map_irq(da9052, irq); da9052_enable_irq()
187 if (irq < 0) da9052_enable_irq()
188 return irq; da9052_enable_irq()
190 enable_irq(irq); da9052_enable_irq()
196 int da9052_disable_irq(struct da9052 *da9052, int irq) da9052_disable_irq() argument
198 irq = da9052_map_irq(da9052, irq); da9052_disable_irq()
199 if (irq < 0) da9052_disable_irq()
200 return irq; da9052_disable_irq()
202 disable_irq(irq); da9052_disable_irq()
208 int da9052_disable_irq_nosync(struct da9052 *da9052, int irq) da9052_disable_irq_nosync() argument
210 irq = da9052_map_irq(da9052, irq); da9052_disable_irq_nosync()
211 if (irq < 0) da9052_disable_irq_nosync()
212 return irq; da9052_disable_irq_nosync()
214 disable_irq_nosync(irq); da9052_disable_irq_nosync()
220 int da9052_request_irq(struct da9052 *da9052, int irq, char *name, da9052_request_irq() argument
223 irq = da9052_map_irq(da9052, irq); da9052_request_irq()
224 if (irq < 0) da9052_request_irq()
225 return irq; da9052_request_irq()
227 return request_threaded_irq(irq, NULL, handler, da9052_request_irq()
233 void da9052_free_irq(struct da9052 *da9052, int irq, void *data) da9052_free_irq() argument
235 irq = da9052_map_irq(da9052, irq); da9052_free_irq()
236 if (irq < 0) da9052_free_irq()
239 free_irq(irq, data); da9052_free_irq()
243 static irqreturn_t da9052_auxadc_irq(int irq, void *irq_data) da9052_auxadc_irq() argument
267 ret = da9052_request_irq(da9052, DA9052_IRQ_ADC_EOM, "adc-irq", da9052_irq_init()
H A Darizona-irq.c16 #include <linux/irq.h>
29 static int arizona_map_irq(struct arizona *arizona, int irq) arizona_map_irq() argument
33 ret = regmap_irq_get_virq(arizona->aod_irq_chip, irq); arizona_map_irq()
35 ret = regmap_irq_get_virq(arizona->irq_chip, irq); arizona_map_irq()
40 int arizona_request_irq(struct arizona *arizona, int irq, char *name, arizona_request_irq() argument
43 irq = arizona_map_irq(arizona, irq); arizona_request_irq()
44 if (irq < 0) arizona_request_irq()
45 return irq; arizona_request_irq()
47 return request_threaded_irq(irq, NULL, handler, IRQF_ONESHOT, arizona_request_irq()
52 void arizona_free_irq(struct arizona *arizona, int irq, void *data) arizona_free_irq() argument
54 irq = arizona_map_irq(arizona, irq); arizona_free_irq()
55 if (irq < 0) arizona_free_irq()
58 free_irq(irq, data); arizona_free_irq()
62 int arizona_set_irq_wake(struct arizona *arizona, int irq, int on) arizona_set_irq_wake() argument
64 irq = arizona_map_irq(arizona, irq); arizona_set_irq_wake()
65 if (irq < 0) arizona_set_irq_wake()
66 return irq; arizona_set_irq_wake()
68 return irq_set_irq_wake(irq, on); arizona_set_irq_wake()
72 static irqreturn_t arizona_boot_done(int irq, void *data) arizona_boot_done() argument
81 static irqreturn_t arizona_ctrlif_err(int irq, void *data) arizona_ctrlif_err() argument
94 static irqreturn_t arizona_irq_thread(int irq, void *data) arizona_irq_thread() argument
159 return irq_set_irq_wake(arizona->irq, on); arizona_irq_set_wake()
198 const struct regmap_irq_chip *aod, *irq; arizona_irq_init() local
207 irq = &wm5102_irq; arizona_irq_init()
219 irq = &wm5110_irq; arizona_irq_init()
222 irq = &wm5110_revd_irq; arizona_irq_init()
232 irq = &wm8997_irq; arizona_irq_init()
247 irq_data = irq_get_irq_data(arizona->irq); arizona_irq_init()
250 arizona->irq); arizona_irq_init()
303 IRQF_ONESHOT, 0, irq, arizona_irq_init()
316 arizona->irq, ret); arizona_irq_init()
329 arizona->irq, ret); arizona_irq_init()
336 if (gpio_to_irq(arizona->pdata.irq_gpio) != arizona->irq) { arizona_irq_init()
338 arizona->irq, arizona->pdata.irq_gpio, arizona_irq_init()
340 arizona->irq = gpio_to_irq(arizona->pdata.irq_gpio); arizona_irq_init()
354 ret = request_threaded_irq(arizona->irq, NULL, arizona_irq_thread, arizona_irq_init()
359 arizona->irq, ret); arizona_irq_init()
392 free_irq(arizona->irq, arizona); arizona_irq_exit()
H A Dpcf50633-irq.c24 int pcf50633_register_irq(struct pcf50633 *pcf, int irq, pcf50633_register_irq() argument
27 if (irq < 0 || irq >= PCF50633_NUM_IRQ || !handler) pcf50633_register_irq()
30 if (WARN_ON(pcf->irq_handler[irq].handler)) pcf50633_register_irq()
34 pcf->irq_handler[irq].handler = handler; pcf50633_register_irq()
35 pcf->irq_handler[irq].data = data; pcf50633_register_irq()
42 int pcf50633_free_irq(struct pcf50633 *pcf, int irq) pcf50633_free_irq() argument
44 if (irq < 0 || irq >= PCF50633_NUM_IRQ) pcf50633_free_irq()
48 pcf->irq_handler[irq].handler = NULL; pcf50633_free_irq()
55 static int __pcf50633_irq_mask_set(struct pcf50633 *pcf, int irq, u8 mask) __pcf50633_irq_mask_set() argument
60 idx = irq >> 3; __pcf50633_irq_mask_set()
62 bit = 1 << (irq & 0x07); __pcf50633_irq_mask_set()
78 int pcf50633_irq_mask(struct pcf50633 *pcf, int irq) pcf50633_irq_mask() argument
80 dev_dbg(pcf->dev, "Masking IRQ %d\n", irq); pcf50633_irq_mask()
82 return __pcf50633_irq_mask_set(pcf, irq, 1); pcf50633_irq_mask()
86 int pcf50633_irq_unmask(struct pcf50633 *pcf, int irq) pcf50633_irq_unmask() argument
88 dev_dbg(pcf->dev, "Unmasking IRQ %d\n", irq); pcf50633_irq_unmask()
90 return __pcf50633_irq_mask_set(pcf, irq, 0); pcf50633_irq_unmask()
94 int pcf50633_irq_mask_get(struct pcf50633 *pcf, int irq) pcf50633_irq_mask_get() argument
98 reg = irq >> 3; pcf50633_irq_mask_get()
99 bits = 1 << (irq & 0x07); pcf50633_irq_mask_get()
105 static void pcf50633_irq_call_handler(struct pcf50633 *pcf, int irq) pcf50633_irq_call_handler() argument
107 if (pcf->irq_handler[irq].handler) pcf50633_irq_call_handler()
108 pcf->irq_handler[irq].handler(irq, pcf->irq_handler[irq].data); pcf50633_irq_call_handler()
114 static irqreturn_t pcf50633_irq(int irq, void *data) pcf50633_irq() argument
237 disable_irq(pcf->irq); pcf50633_irq_suspend()
244 dev_err(pcf->dev, "error saving irq masks\n"); pcf50633_irq_suspend()
248 /* Write wakeup irq masks */ pcf50633_irq_suspend()
255 dev_err(pcf->dev, "error writing wakeup irq masks\n"); pcf50633_irq_suspend()
276 enable_irq(pcf->irq); pcf50633_irq_resume()
283 int pcf50633_irq_init(struct pcf50633 *pcf, int irq) pcf50633_irq_init() argument
287 pcf->irq = irq; pcf50633_irq_init()
297 ret = request_threaded_irq(irq, NULL, pcf50633_irq, pcf50633_irq_init()
304 if (enable_irq_wake(irq) < 0) pcf50633_irq_init()
306 "in this hardware revision", irq); pcf50633_irq_init()
313 free_irq(pcf->irq, pcf); pcf50633_irq_free()
H A Dmax8998-irq.c16 #include <linux/irq.h>
101 irq_to_max8998_irq(struct max8998_dev *max8998, int irq) irq_to_max8998_irq() argument
103 struct irq_data *data = irq_get_irq_data(irq); irq_to_max8998_irq()
138 data->irq); max8998_irq_unmask()
147 data->irq); max8998_irq_mask()
160 static irqreturn_t max8998_irq_thread(int irq, void *data) max8998_irq_thread() argument
182 irq = irq_find_mapping(max8998->irq_domain, i); max8998_irq_thread()
183 if (WARN_ON(!irq)) { max8998_irq_thread()
184 disable_irq_nosync(max8998->irq); max8998_irq_thread()
187 handle_nested_irq(irq); max8998_irq_thread()
196 if (max8998->irq && max8998->irq_domain) max8998_irq_resume()
197 max8998_irq_thread(max8998->irq, max8998); max8998_irq_resume()
201 static int max8998_irq_domain_map(struct irq_domain *d, unsigned int irq, max8998_irq_domain_map() argument
206 irq_set_chip_data(irq, max8998); max8998_irq_domain_map()
207 irq_set_chip_and_handler(irq, &max8998_irq_chip, handle_edge_irq); max8998_irq_domain_map()
208 irq_set_nested_thread(irq, 1); max8998_irq_domain_map()
210 set_irq_flags(irq, IRQF_VALID); max8998_irq_domain_map()
212 irq_set_noprobe(irq); max8998_irq_domain_map()
227 if (!max8998->irq) { max8998_irq_init()
248 dev_err(max8998->dev, "could not create irq domain\n"); max8998_irq_init()
253 ret = request_threaded_irq(max8998->irq, NULL, max8998_irq_thread, max8998_irq_init()
255 "max8998-irq", max8998); max8998_irq_init()
258 max8998->irq, ret); max8998_irq_init()
280 if (max8998->irq) max8998_irq_exit()
281 free_irq(max8998->irq, max8998); max8998_irq_exit()
H A Dmt6397-core.c42 struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq); mt6397_irq_lock()
49 struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq); mt6397_irq_sync_unlock()
59 struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq); mt6397_irq_disable()
68 struct mt6397_chip *mt6397 = irq_get_chip_data(data->irq); mt6397_irq_enable()
76 .name = "mt6397-irq",
87 int i, irq, ret; mt6397_irq_handle_reg() local
91 dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret); mt6397_irq_handle_reg()
97 irq = irq_find_mapping(mt6397->irq_domain, irqbase + i); mt6397_irq_handle_reg()
98 if (irq) mt6397_irq_handle_reg()
99 handle_nested_irq(irq); mt6397_irq_handle_reg()
106 static irqreturn_t mt6397_irq_thread(int irq, void *data) mt6397_irq_thread() argument
116 static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq, mt6397_irq_domain_map() argument
121 irq_set_chip_data(irq, mt6397); mt6397_irq_domain_map()
122 irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq); mt6397_irq_domain_map()
123 irq_set_nested_thread(irq, 1); mt6397_irq_domain_map()
125 set_irq_flags(irq, IRQF_VALID); mt6397_irq_domain_map()
127 irq_set_noprobe(irq); mt6397_irq_domain_map()
150 dev_err(mt6397->dev, "could not create irq domain\n"); mt6397_irq_init()
154 ret = devm_request_threaded_irq(mt6397->dev, mt6397->irq, NULL, mt6397_irq_init()
157 dev_err(mt6397->dev, "failed to register irq=%d; err: %d\n", mt6397_irq_init()
158 mt6397->irq, ret); mt6397_irq_init()
185 mt6397->irq = platform_get_irq(pdev, 0); mt6397_probe()
186 if (mt6397->irq > 0) { mt6397_probe()
/linux-4.1.27/arch/powerpc/sysdev/
H A Dppc4xx_hsta_msi.c44 int irq, hwirq; hsta_setup_msi_irqs() local
54 irq = msi_bitmap_alloc_hwirqs(&ppc4xx_hsta_msi.bmp, 1); hsta_setup_msi_irqs()
55 if (irq < 0) { hsta_setup_msi_irqs()
58 return irq; hsta_setup_msi_irqs()
61 hwirq = ppc4xx_hsta_msi.irq_map[irq]; hsta_setup_msi_irqs()
63 pr_err("%s: Failed mapping irq %d\n", __func__, irq); hsta_setup_msi_irqs()
71 addr = ppc4xx_hsta_msi.address + irq*0x10; hsta_setup_msi_irqs()
78 pr_debug("%s: Setup irq %d (0x%0llx)\n", __func__, hwirq, hsta_setup_msi_irqs()
85 msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1); hsta_setup_msi_irqs()
96 int irq; hsta_find_hwirq_offset() local
99 for (irq = 0; irq < ppc4xx_hsta_msi.irq_count; irq++) hsta_find_hwirq_offset()
100 if (ppc4xx_hsta_msi.irq_map[irq] == hwirq) hsta_find_hwirq_offset()
101 return irq; hsta_find_hwirq_offset()
109 int irq; hsta_teardown_msi_irqs() local
112 if (entry->irq == NO_IRQ) hsta_teardown_msi_irqs()
115 irq = hsta_find_hwirq_offset(entry->irq); hsta_teardown_msi_irqs()
117 /* entry->irq should always be in irq_map */ hsta_teardown_msi_irqs()
118 BUG_ON(irq < 0); hsta_teardown_msi_irqs()
119 irq_set_msi_desc(entry->irq, NULL); hsta_teardown_msi_irqs()
120 msi_bitmap_free_hwirqs(&ppc4xx_hsta_msi.bmp, irq, 1); hsta_teardown_msi_irqs()
122 entry->irq, irq); hsta_teardown_msi_irqs()
130 int irq, ret, irq_count; hsta_msi_probe() local
163 /* Setup a mapping from irq offsets to hardware irq numbers */ hsta_msi_probe()
164 for (irq = 0; irq < irq_count; irq++) { hsta_msi_probe()
165 ppc4xx_hsta_msi.irq_map[irq] = hsta_msi_probe()
166 irq_of_parse_and_map(dev->of_node, irq); hsta_msi_probe()
167 if (ppc4xx_hsta_msi.irq_map[irq] == NO_IRQ) { hsta_msi_probe()
/linux-4.1.27/arch/sh/boards/mach-se/7724/
H A Dirq.c2 * linux/arch/sh/boards/se/7724/irq.c
8 * Based on linux/arch/sh/boards/se/7722/irq.c
18 #include <linux/irq.h>
33 static unsigned int fpga2irq(unsigned int irq) fpga2irq() argument
35 if (irq >= IRQ0_BASE && fpga2irq()
36 irq <= IRQ0_END) fpga2irq()
38 else if (irq >= IRQ1_BASE && fpga2irq()
39 irq <= IRQ1_END) fpga2irq()
45 static struct fpga_irq get_fpga_irq(unsigned int irq) get_fpga_irq() argument
49 switch (irq) { get_fpga_irq()
75 unsigned int irq = data->irq; disable_se7724_irq() local
76 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); disable_se7724_irq()
77 unsigned int bit = irq - set.base; disable_se7724_irq()
83 unsigned int irq = data->irq; enable_se7724_irq() local
84 struct fpga_irq set = get_fpga_irq(fpga2irq(irq)); enable_se7724_irq()
85 unsigned int bit = irq - set.base; enable_se7724_irq()
95 static void se7724_irq_demux(unsigned int irq, struct irq_desc *desc) se7724_irq_demux() argument
97 struct fpga_irq set = get_fpga_irq(irq); se7724_irq_demux()
121 __raw_writew(0x0000, IRQ0_SR); /* clear irq */ init_se7724_IRQ()
122 __raw_writew(0x0000, IRQ1_SR); /* clear irq */ init_se7724_IRQ()
123 __raw_writew(0x0000, IRQ2_SR); /* clear irq */ init_se7724_IRQ()
124 __raw_writew(0x002a, IRQ_MODE); /* set irq type */ init_se7724_IRQ()
/linux-4.1.27/arch/mips/pmcs-msp71xx/
H A Dmsp_irq_slp.c2 * This file define the irq handler for MSP SLM subsystem interrupts.
25 unsigned int irq = d->irq; unmask_msp_slp_irq() local
28 if (irq < MSP_PER_INTBASE) unmask_msp_slp_irq()
29 *SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE)); unmask_msp_slp_irq()
31 *PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE)); unmask_msp_slp_irq()
36 unsigned int irq = d->irq; mask_msp_slp_irq() local
39 if (irq < MSP_PER_INTBASE) mask_msp_slp_irq()
40 *SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE)); mask_msp_slp_irq()
42 *PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE)); mask_msp_slp_irq()
51 unsigned int irq = d->irq; ack_msp_slp_irq() local
54 if (irq < MSP_PER_INTBASE) ack_msp_slp_irq()
55 *SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE)); ack_msp_slp_irq()
57 *PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE)); ack_msp_slp_irq()
104 /* dispatch the irq */ msp_slp_irq_dispatch()
/linux-4.1.27/arch/sh/kernel/cpu/irq/
H A Dimask.c2 * arch/sh/kernel/cpu/irq/imask.c
20 #include <linux/irq.h>
22 #include <asm/irq.h>
55 unsigned int irq = data->irq; mask_imask_irq() local
57 clear_bit(irq, imask_mask); mask_imask_irq()
58 if (interrupt_priority < IMASK_PRIORITY - irq) mask_imask_irq()
59 interrupt_priority = IMASK_PRIORITY - irq; mask_imask_irq()
65 unsigned int irq = data->irq; unmask_imask_irq() local
67 set_bit(irq, imask_mask); unmask_imask_irq()
80 void make_imask_irq(unsigned int irq) make_imask_irq() argument
82 irq_set_chip_and_handler_name(irq, &imask_irq_chip, handle_level_irq, make_imask_irq()
/linux-4.1.27/arch/mips/txx9/rbtx4939/
H A Dirq.c3 * Based on linux/arch/mips/txx9/rbtx4938/irq.c,
14 #include <linux/irq.h>
24 int ioc_nr = d->irq - RBTX4939_IRQ_IOC; rbtx4939_ioc_irq_unmask()
31 int ioc_nr = d->irq - RBTX4939_IRQ_IOC; rbtx4939_ioc_irq_mask()
55 int irq; rbtx4939_irq_dispatch() local
59 irq = tx4939_irq(); rbtx4939_irq_dispatch()
60 if (likely(irq >= 0)) { rbtx4939_irq_dispatch()
62 switch (irq) { rbtx4939_irq_dispatch()
64 irq = rbtx4939_ioc_irqroute(); rbtx4939_irq_dispatch()
68 irq = MIPS_CPU_IRQ_BASE + 0; rbtx4939_irq_dispatch()
70 irq = MIPS_CPU_IRQ_BASE + 1; rbtx4939_irq_dispatch()
72 irq = -1; rbtx4939_irq_dispatch()
73 return irq; rbtx4939_irq_dispatch()
/linux-4.1.27/arch/xtensa/include/asm/
H A Dirq.h2 * include/asm-xtensa/irq.h
19 #include <variant/irq.h>
21 static inline void variant_irq_enable(unsigned int irq) { } variant_irq_disable() argument
22 static inline void variant_irq_disable(unsigned int irq) { } variant_irq_disable() argument
40 static __inline__ int irq_canonicalize(int irq) irq_canonicalize() argument
42 return (irq); irq_canonicalize()
52 int xtensa_irq_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw);
54 unsigned xtensa_get_ext_irq_no(unsigned irq);
/linux-4.1.27/arch/mips/dec/
H A DMakefile5 obj-y := ecc-berr.o int-handler.o ioasic-irq.o kn01-berr.o \
6 kn02-irq.o kn02xa-berr.o platform.o reset.o setup.o time.o
/linux-4.1.27/arch/m32r/kernel/
H A Dirq.c2 * linux/arch/m32r/kernel/irq.c
9 * linux/arch/i386/kernel/irq.c
14 * entry and irq statistics code. All the remaining irq logic is
15 * done by the generic kernel/irq/ code and in the
16 * m32r-specific irq controller code.
29 asmlinkage unsigned int do_IRQ(int irq, struct pt_regs *regs) do_IRQ() argument
38 generic_handle_irq(irq); do_IRQ()
/linux-4.1.27/include/linux/iio/
H A Dtriggered_buffer.h10 irqreturn_t (*pollfunc_bh)(int irq, void *p),
11 irqreturn_t (*pollfunc_th)(int irq, void *p),
H A Dtrigger_consumer.h27 * @irq: the corresponding irq as allocated from the
35 irqreturn_t (*h)(int irq, void *p);
36 irqreturn_t (*thread)(int irq, void *p);
39 int irq; member in struct:iio_poll_func
45 *iio_alloc_pollfunc(irqreturn_t (*h)(int irq, void *p),
46 irqreturn_t (*thread)(int irq, void *p),
52 irqreturn_t iio_pollfunc_store_time(int irq, void *p);
/linux-4.1.27/arch/mips/kernel/
H A Dirq-msc01.c17 #include <asm/irq.h>
32 unsigned int irq = d->irq; mask_msc_irq() local
34 if (irq < (irq_base + 32)) mask_msc_irq()
35 MSCIC_WRITE(MSC01_IC_DISL, 1<<(irq - irq_base)); mask_msc_irq()
37 MSCIC_WRITE(MSC01_IC_DISH, 1<<(irq - irq_base - 32)); mask_msc_irq()
43 unsigned int irq = d->irq; unmask_msc_irq() local
45 if (irq < (irq_base + 32)) unmask_msc_irq()
46 MSCIC_WRITE(MSC01_IC_ENAL, 1<<(irq - irq_base)); unmask_msc_irq()
48 MSCIC_WRITE(MSC01_IC_ENAH, 1<<(irq - irq_base - 32)); unmask_msc_irq()
66 unsigned int irq = d->irq; edge_mask_and_ack_msc_irq() local
73 MSCIC_READ(MSC01_IC_SUP+irq*8, r); edge_mask_and_ack_msc_irq()
74 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r | ~MSC01_IC_SUP_EDGE_BIT); edge_mask_and_ack_msc_irq()
75 MSCIC_WRITE(MSC01_IC_SUP+irq*8, r); edge_mask_and_ack_msc_irq()
84 unsigned int irq; ll_msc_irq() local
87 MSCIC_READ(MSC01_IC_VEC, irq); ll_msc_irq()
88 if (irq < 64) ll_msc_irq()
89 do_IRQ(irq + irq_base); ll_msc_irq()
95 static void msc_bind_eic_interrupt(int irq, int set) msc_bind_eic_interrupt() argument
98 (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF)); msc_bind_eic_interrupt()
H A Dirq.c36 int irq; allocate_irqno() local
39 irq = find_first_zero_bit(irq_map, NR_IRQS); allocate_irqno()
41 if (irq >= NR_IRQS) allocate_irqno()
44 if (test_and_set_bit(irq, irq_map)) allocate_irqno()
47 return irq; allocate_irqno()
63 void free_irqno(unsigned int irq) free_irqno() argument
66 clear_bit(irq, irq_map); free_irqno()
71 * 'what should we do if we get a hw irq event on an illegal vector'.
74 void ack_bad_irq(unsigned int irq) ack_bad_irq() argument
76 printk("unexpected IRQ # %d\n", irq); ack_bad_irq()
140 void __irq_entry do_IRQ(unsigned int irq) do_IRQ() argument
144 generic_handle_irq(irq); do_IRQ()
H A Di8259.c19 #include <linux/irq.h>
29 * this file should become arch/i386/kernel/irq.c when the old irq.c
53 * This contains the irq mask for both 8259A irq controllers,
62 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; disable_8259A_irq() local
65 mask = 1 << irq; disable_8259A_irq()
68 if (irq & 8) disable_8259A_irq()
77 unsigned int mask, irq = d->irq - I8259A_IRQ_BASE; enable_8259A_irq() local
80 mask = ~(1 << irq); enable_8259A_irq()
83 if (irq & 8) enable_8259A_irq()
90 int i8259A_irq_pending(unsigned int irq) i8259A_irq_pending() argument
96 irq -= I8259A_IRQ_BASE; i8259A_irq_pending()
97 mask = 1 << irq; i8259A_irq_pending()
99 if (irq < 8) i8259A_irq_pending()
108 void make_8259A_irq(unsigned int irq) make_8259A_irq() argument
110 disable_irq_nosync(irq); make_8259A_irq()
111 irq_set_chip_and_handler(irq, &i8259A_chip, handle_level_irq); make_8259A_irq()
112 enable_irq(irq); make_8259A_irq()
118 * This has to be protected by the irq controller spinlock
121 static inline int i8259A_irq_real(unsigned int irq) i8259A_irq_real() argument
124 int irqmask = 1 << irq; i8259A_irq_real()
126 if (irq < 8) { i8259A_irq_real()
146 unsigned int irqmask, irq = d->irq - I8259A_IRQ_BASE; mask_and_ack_8259A() local
149 irqmask = 1 << irq; mask_and_ack_8259A()
171 if (irq & 8) { mask_and_ack_8259A()
174 outb(0x60+(irq&7), PIC_SLAVE_CMD);/* 'Specific EOI' to slave */ mask_and_ack_8259A()
179 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ mask_and_ack_8259A()
188 if (i8259A_irq_real(irq)) mask_and_ack_8259A()
202 printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq); mask_and_ack_8259A()
/linux-4.1.27/arch/x86/kvm/
H A Dirq_comm.c30 #include "irq.h"
51 inline static bool kvm_is_dm_lowest_prio(struct kvm_lapic_irq *irq) kvm_is_dm_lowest_prio() argument
53 return irq->delivery_mode == APIC_DM_LOWEST; kvm_is_dm_lowest_prio()
57 struct kvm_lapic_irq *irq, unsigned long *dest_map) kvm_irq_delivery_to_apic()
62 if (irq->dest_mode == 0 && irq->dest_id == 0xff && kvm_irq_delivery_to_apic()
63 kvm_is_dm_lowest_prio(irq)) { kvm_irq_delivery_to_apic()
65 irq->delivery_mode = APIC_DM_FIXED; kvm_irq_delivery_to_apic()
68 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map)) kvm_irq_delivery_to_apic()
75 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand, kvm_for_each_vcpu()
76 irq->dest_id, irq->dest_mode)) kvm_for_each_vcpu()
79 if (!kvm_is_dm_lowest_prio(irq)) { kvm_for_each_vcpu()
82 r += kvm_apic_set_irq(vcpu, irq, dest_map); kvm_for_each_vcpu()
92 r = kvm_apic_set_irq(lowest, irq, dest_map);
98 struct kvm_lapic_irq *irq) kvm_set_msi_irq()
102 irq->dest_id = (e->msi.address_lo & kvm_set_msi_irq()
104 irq->vector = (e->msi.data & kvm_set_msi_irq()
106 irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo; kvm_set_msi_irq()
107 irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data; kvm_set_msi_irq()
108 irq->delivery_mode = e->msi.data & 0x700; kvm_set_msi_irq()
109 irq->level = 1; kvm_set_msi_irq()
110 irq->shorthand = 0; kvm_set_msi_irq()
117 struct kvm_lapic_irq irq; kvm_set_msi() local
122 kvm_set_msi_irq(e, &irq); kvm_set_msi()
124 return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL); kvm_set_msi()
131 struct kvm_lapic_irq irq; kvm_set_msi_inatomic() local
134 kvm_set_msi_irq(e, &irq); kvm_set_msi_inatomic()
136 if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL)) kvm_set_msi_inatomic()
149 int kvm_set_irq_inatomic(struct kvm *kvm, int irq_source_id, u32 irq, int level) kvm_set_irq_inatomic() argument
156 trace_kvm_set_irq(irq, level, irq_source_id); kvm_set_irq_inatomic()
167 if (kvm_irq_map_gsi(kvm, entries, irq) > 0) { kvm_set_irq_inatomic()
222 void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq, kvm_register_irq_mask_notifier() argument
226 kimn->irq = irq; kvm_register_irq_mask_notifier()
231 void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq, kvm_unregister_irq_mask_notifier() argument
250 if (kimn->irq == gsi) kvm_fire_mask_notifiers()
302 #define IOAPIC_ROUTING_ENTRY(irq) \
303 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
304 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
305 #define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
307 #define PIC_ROUTING_ENTRY(irq) \
308 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
309 .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
310 #define ROUTING_ENTRY2(irq) \
311 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
56 kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src, struct kvm_lapic_irq *irq, unsigned long *dest_map) kvm_irq_delivery_to_apic() argument
97 kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e, struct kvm_lapic_irq *irq) kvm_set_msi_irq() argument
H A Di8259.c32 #include "irq.h"
75 static void pic_clear_isr(struct kvm_kpic_state *s, int irq) pic_clear_isr() argument
77 s->isr &= ~(1 << irq); pic_clear_isr()
79 irq += 8; pic_clear_isr()
87 kvm_notify_acked_irq(s->pics_state->kvm, SELECT_PIC(irq), irq); pic_clear_isr()
92 * set irq level. If an edge is detected, then the IRR is set to 1
94 static inline int pic_set_irq1(struct kvm_kpic_state *s, int irq, int level) pic_set_irq1() argument
97 mask = 1 << irq; pic_set_irq1()
122 * number). Return 8 if no irq
157 * higher priority found: an irq should be generated pic_get_irq()
165 * raise irq to CPU if necessary. must be called every time the active
166 * irq may change
170 int irq2, irq; pic_update_irq() local
175 * if irq request by slave pic, signal master PIC pic_update_irq()
180 irq = pic_get_irq(&s->pics[0]); pic_update_irq()
181 pic_irq_request(s->kvm, irq >= 0); pic_update_irq()
191 int kvm_pic_set_irq(struct kvm_pic *s, int irq, int irq_source_id, int level) kvm_pic_set_irq() argument
195 BUG_ON(irq < 0 || irq >= PIC_NUM_PINS); kvm_pic_set_irq()
198 irq_level = __kvm_irq_line_state(&s->irq_states[irq], kvm_pic_set_irq()
200 ret = pic_set_irq1(&s->pics[irq >> 3], irq & 7, irq_level); kvm_pic_set_irq()
202 trace_kvm_pic_set_irq(irq >> 3, irq & 7, s->pics[irq >> 3].elcr, kvm_pic_set_irq()
203 s->pics[irq >> 3].imr, ret == 0); kvm_pic_set_irq()
220 * acknowledge interrupt 'irq'
222 static inline void pic_intack(struct kvm_kpic_state *s, int irq) pic_intack() argument
224 s->isr |= 1 << irq; pic_intack()
228 if (!(s->elcr & (1 << irq))) pic_intack()
229 s->irr &= ~(1 << irq); pic_intack()
233 s->priority_add = (irq + 1) & 7; pic_intack()
234 pic_clear_isr(s, irq); pic_intack()
241 int irq, irq2, intno; kvm_pic_read_irq() local
247 irq = pic_get_irq(&s->pics[0]); kvm_pic_read_irq()
248 if (irq >= 0) { kvm_pic_read_irq()
249 pic_intack(&s->pics[0], irq); kvm_pic_read_irq()
250 if (irq == 2) { kvm_pic_read_irq()
260 irq = irq2 + 8; kvm_pic_read_irq()
262 intno = s->pics[0].irq_base + irq; kvm_pic_read_irq()
267 irq = 7; kvm_pic_read_irq()
268 intno = s->pics[0].irq_base + irq; kvm_pic_read_irq()
278 int irq, i; kvm_pic_reset() local
305 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) kvm_pic_reset()
306 if (edge_irr & (1 << irq)) kvm_pic_reset()
307 pic_clear_isr(s, irq); kvm_pic_reset()
313 int priority, cmd, irq; pic_ioport_write() local
323 "level sensitive irq not supported"); pic_ioport_write()
343 irq = (priority + s->priority_add) & 7; pic_ioport_write()
345 s->priority_add = (irq + 1) & 7; pic_ioport_write()
346 pic_clear_isr(s, irq); pic_ioport_write()
351 irq = val & 7; pic_ioport_write()
352 pic_clear_isr(s, irq); pic_ioport_write()
360 irq = val & 7; pic_ioport_write()
361 s->priority_add = (irq + 1) & 7; pic_ioport_write()
362 pic_clear_isr(s, irq); pic_ioport_write()
375 for (irq = 0; irq < PIC_NUM_PINS/2; irq++) pic_ioport_write()
376 if (imr_diff & (1 << irq)) pic_ioport_write()
379 SELECT_PIC(irq + off), pic_ioport_write()
380 irq + off, pic_ioport_write()
381 !!(s->imr & (1 << irq))); pic_ioport_write()
575 * callback when PIC0 irq status changed
/linux-4.1.27/arch/mips/include/asm/mach-lasat/
H A Dirq.h11 #include_next <irq.h>
/linux-4.1.27/arch/s390/kernel/
H A Dirq.c21 #include <linux/irq.h>
25 #include <asm/irq.h>
33 int irq; member in struct:irq_class
39 * The list of "main" irq classes on s390. This is the list of interrupts
49 {.irq = EXT_INTERRUPT, .name = "EXT"},
50 {.irq = IO_INTERRUPT, .name = "I/O"},
51 {.irq = THIN_INTERRUPT, .name = "AIO"},
60 {.irq = IRQEXT_CLK, .name = "CLK", .desc = "[EXT] Clock Comparator"},
61 {.irq = IRQEXT_EXC, .name = "EXC", .desc = "[EXT] External Call"},
62 {.irq = IRQEXT_EMS, .name = "EMS", .desc = "[EXT] Emergency Signal"},
63 {.irq = IRQEXT_TMR, .name = "TMR", .desc = "[EXT] CPU Timer"},
64 {.irq = IRQEXT_TLA, .name = "TAL", .desc = "[EXT] Timing Alert"},
65 {.irq = IRQEXT_PFL, .name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
66 {.irq = IRQEXT_DSD, .name = "DSD", .desc = "[EXT] DASD Diag"},
67 {.irq = IRQEXT_VRT, .name = "VRT", .desc = "[EXT] Virtio"},
68 {.irq = IRQEXT_SCP, .name = "SCP", .desc = "[EXT] Service Call"},
69 {.irq = IRQEXT_IUC, .name = "IUC", .desc = "[EXT] IUCV"},
70 {.irq = IRQEXT_CMS, .name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
71 {.irq = IRQEXT_CMC, .name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
72 {.irq = IRQEXT_CMR, .name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
73 {.irq = IRQEXT_FTP, .name = "FTP", .desc = "[EXT] HMC FTP Service"},
74 {.irq = IRQIO_CIO, .name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
75 {.irq = IRQIO_QAI, .name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
76 {.irq = IRQIO_DAS, .name = "DAS", .desc = "[I/O] DASD"},
77 {.irq = IRQIO_C15, .name = "C15", .desc = "[I/O] 3215"},
78 {.irq = IRQIO_C70, .name = "C70", .desc = "[I/O] 3270"},
79 {.irq = IRQIO_TAP, .name = "TAP", .desc = "[I/O] Tape"},
80 {.irq = IRQIO_VMR, .name = "VMR", .desc = "[I/O] Unit Record Devices"},
81 {.irq = IRQIO_LCS, .name = "LCS", .desc = "[I/O] LCS"},
82 {.irq = IRQIO_CTC, .name = "CTC", .desc = "[I/O] CTC"},
83 {.irq = IRQIO_APB, .name = "APB", .desc = "[I/O] AP Bus"},
84 {.irq = IRQIO_ADM, .name = "ADM", .desc = "[I/O] EADM Subchannel"},
85 {.irq = IRQIO_CSC, .name = "CSC", .desc = "[I/O] CHSC Subchannel"},
86 {.irq = IRQIO_PCI, .name = "PCI", .desc = "[I/O] PCI Interrupt" },
87 {.irq = IRQIO_MSI, .name = "MSI", .desc = "[I/O] MSI Interrupt" },
88 {.irq = IRQIO_VIR, .name = "VIR", .desc = "[I/O] Virtual I/O Devices"},
89 {.irq = IRQIO_VAI, .name = "VAI", .desc = "[I/O] Virtual I/O Devices AI"},
90 {.irq = NMI_NMI, .name = "NMI", .desc = "[NMI] Machine Check"},
91 {.irq = CPU_RST, .name = "RST", .desc = "[CPU] CPU Restart"},
102 void do_IRQ(struct pt_regs *regs, int irq) do_IRQ() argument
111 generic_handle_irq(irq); do_IRQ()
122 int cpu, irq; show_interrupts() local
135 irq = irqclass_main_desc[index].irq; show_interrupts()
137 seq_printf(p, "%10u ", kstat_irqs_cpu(irq, cpu)); show_interrupts()
143 irq = irqclass_sub_desc[index].irq; show_interrupts()
146 per_cpu(irq_stat, cpu).irqs[irq]); show_interrupts()
250 static irqreturn_t do_ext_interrupt(int irq, void *dummy) do_ext_interrupt() argument
/linux-4.1.27/arch/blackfin/mach-bf561/include/mach/
H A Dsmp.h22 void platform_request_ipi(int irq, /*irq_handler_t*/ void *handler);
24 void platform_send_ipi(cpumask_t callmap, int irq);
26 void platform_send_ipi_cpu(unsigned int cpu, int irq);
28 void platform_clear_ipi(unsigned int cpu, int irq);
/linux-4.1.27/arch/m32r/include/asm/
H A Dhardirq.h5 #include <asm/irq.h>
/linux-4.1.27/arch/alpha/include/asm/
H A Dhardirq.h4 void ack_bad_irq(unsigned int irq);
/linux-4.1.27/drivers/sh/intc/
H A Dvirq.c13 #include <linux/irq.h>
23 unsigned int irq; member in struct:intc_virq_list
35 void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d) intc_irq_xlate_set() argument
40 intc_irq_xlate[irq].enum_id = id; intc_irq_xlate_set()
41 intc_irq_xlate[irq].desc = d; intc_irq_xlate_set()
45 struct intc_map_entry *intc_irq_xlate_get(unsigned int irq) intc_irq_xlate_get() argument
47 return intc_irq_xlate + irq; intc_irq_xlate_get()
54 int irq = -1; intc_irq_lookup() local
75 irq = ptr - intc_irq_xlate; intc_irq_lookup()
80 return irq; intc_irq_lookup()
84 static int add_virq_to_pirq(unsigned int irq, unsigned int virq) add_virq_to_pirq() argument
87 struct irq_data *data = irq_get_irq_data(irq); add_virq_to_pirq()
92 if (entry->irq == virq) add_virq_to_pirq()
103 entry->irq = virq; add_virq_to_pirq()
110 static void intc_virq_handler(unsigned int irq, struct irq_desc *desc) intc_virq_handler() argument
112 struct irq_data *data = irq_get_irq_data(irq); intc_virq_handler()
115 struct intc_desc_int *d = get_intc_desc(irq); intc_virq_handler()
122 handle = (unsigned long)irq_get_handler_data(entry->irq); for_each_virq()
126 generic_handle_irq(entry->irq); for_each_virq()
214 int irq; intc_subgroup_map() local
222 irq = irq_alloc_desc(numa_node_id()); intc_subgroup_map()
223 if (unlikely(irq < 0)) { intc_subgroup_map()
228 activate_irq(irq); intc_subgroup_map()
231 irq, entry->pirq); intc_subgroup_map()
233 intc_irq_xlate_set(irq, entry->enum_id, d); intc_subgroup_map()
235 irq_set_chip_and_handler_name(irq, irq_get_chip(entry->pirq), intc_subgroup_map()
237 irq_set_chip_data(irq, irq_get_chip_data(entry->pirq)); intc_subgroup_map()
239 irq_set_handler_data(irq, (void *)entry->handle); intc_subgroup_map()
244 irq_set_nothread(irq); intc_subgroup_map()
247 add_virq_to_pirq(entry->pirq, irq); intc_subgroup_map()
252 &intc_irq_xlate[irq]); intc_subgroup_map()
H A Dchip.c18 unsigned int irq = data->irq; _intc_enable() local
19 struct intc_desc_int *d = get_intc_desc(irq); _intc_enable()
30 [_INTC_FN(handle)], irq); _intc_enable()
33 intc_balancing_enable(irq); _intc_enable()
43 unsigned int irq = data->irq; intc_disable() local
44 struct intc_desc_int *d = get_intc_desc(irq); intc_disable()
49 intc_balancing_disable(irq); intc_disable()
58 [_INTC_FN(handle)], irq); intc_disable()
64 * This is held with the irq desc lock held, so we don't require any
83 unsigned int irq = data->irq; intc_mask_ack() local
84 struct intc_desc_int *d = get_intc_desc(irq); intc_mask_ack()
85 unsigned long handle = intc_get_ack_handle(irq); intc_mask_ack()
119 unsigned int irq) intc_find_irq()
123 key.irq = irq; intc_find_irq()
129 int intc_set_priority(unsigned int irq, unsigned int prio) intc_set_priority() argument
131 struct intc_desc_int *d = get_intc_desc(irq); intc_set_priority()
132 struct irq_data *data = irq_get_irq_data(irq); intc_set_priority()
135 if (!intc_get_prio_level(irq) || prio <= 1) intc_set_priority()
138 ihp = intc_find_irq(d->prio, d->nr_prio, irq); intc_set_priority()
143 intc_set_prio_level(irq, prio); intc_set_priority()
147 * primary masking method is using intc_prio_level[irq] intc_set_priority()
176 unsigned int irq = data->irq; intc_set_type() local
177 struct intc_desc_int *d = get_intc_desc(irq); intc_set_type()
187 ihp = intc_find_irq(d->sense, d->nr_sense, irq); intc_set_type()
117 intc_find_irq(struct intc_handle_int *hp, unsigned int nr_hp, unsigned int irq) intc_find_irq() argument
H A Dbalancing.c14 void intc_balancing_enable(unsigned int irq) intc_balancing_enable() argument
16 struct intc_desc_int *d = get_intc_desc(irq); intc_balancing_enable()
17 unsigned long handle = dist_handle[irq]; intc_balancing_enable()
20 if (irq_balancing_disabled(irq) || !handle) intc_balancing_enable()
27 void intc_balancing_disable(unsigned int irq) intc_balancing_disable() argument
29 struct intc_desc_int *d = get_intc_desc(irq); intc_balancing_disable()
30 unsigned long handle = dist_handle[irq]; intc_balancing_disable()
33 if (irq_balancing_disabled(irq) || !handle) intc_balancing_disable()
83 void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc, intc_set_dist_handle() argument
95 dist_handle[irq] = intc_dist_data(desc, d, id); intc_set_dist_handle()
H A Dinternals.h2 #include <linux/irq.h>
32 unsigned int irq; member in struct:intc_handle_int
90 static inline struct intc_desc_int *get_intc_desc(unsigned int irq) get_intc_desc() argument
92 struct irq_chip *chip = irq_get_chip(irq); get_intc_desc()
100 static inline void activate_irq(int irq) activate_irq() argument
106 set_irq_flags(irq, IRQF_VALID); activate_irq()
109 irq_set_noprobe(irq); activate_irq()
118 return _a->irq - _b->irq; intc_handle_int_cmp()
129 unsigned int irq);
134 unsigned int irq);
139 unsigned int irq);
151 void intc_balancing_enable(unsigned int irq);
152 void intc_balancing_disable(unsigned int irq);
153 void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc,
156 static inline void intc_balancing_enable(unsigned int irq) { } intc_balancing_disable() argument
157 static inline void intc_balancing_disable(unsigned int irq) { } intc_balancing_disable() argument
159 intc_set_dist_handle(unsigned int irq, struct intc_desc *desc, intc_set_dist_handle() argument
173 unsigned int intc_get_prio_level(unsigned int irq);
174 void intc_set_prio_level(unsigned int irq, unsigned int level);
186 void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc,
188 unsigned long intc_get_ack_handle(unsigned int irq);
197 void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d);
198 struct intc_map_entry *intc_irq_xlate_get(unsigned int irq);
H A Dcore.c22 #include <linux/irq.h>
54 unsigned int intc_get_prio_level(unsigned int irq) intc_get_prio_level() argument
56 return intc_prio_level[irq]; intc_get_prio_level()
59 void intc_set_prio_level(unsigned int irq, unsigned int level) intc_set_prio_level() argument
64 intc_prio_level[irq] = level; intc_set_prio_level()
68 static void intc_redirect_irq(unsigned int irq, struct irq_desc *desc) intc_redirect_irq() argument
70 generic_handle_irq((unsigned int)irq_get_handler_data(irq)); intc_redirect_irq()
76 unsigned int irq) intc_register_irq()
84 radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq)); intc_register_irq()
103 pr_warning("missing unique irq mask for irq %d (vect 0x%04x)\n", intc_register_irq()
104 irq, irq2evt(irq)); intc_register_irq()
114 irq_data = irq_get_irq_data(irq); intc_register_irq()
116 disable_irq_nosync(irq); intc_register_irq()
117 irq_set_chip_and_handler_name(irq, &d->chip, handle_level_irq, intc_register_irq()
119 irq_set_chip_data(irq, (void *)data[primary]); intc_register_irq()
124 intc_set_prio_level(irq, intc_get_dfl_prio_level()); intc_register_irq()
130 /* add irq to d->prio list if priority is available */ intc_register_irq()
133 hp->irq = irq; intc_register_irq()
147 /* add irq to d->sense list if sense is available */ intc_register_irq()
150 (d->sense + d->nr_sense)->irq = irq; intc_register_irq()
155 /* irq should be disabled by default */ intc_register_irq()
158 intc_set_ack_handle(irq, desc, d, enum_id); intc_register_irq()
159 intc_set_dist_handle(irq, desc, d, enum_id); intc_register_irq()
161 activate_irq(irq); intc_register_irq()
313 unsigned int irq = evt2irq(vect->vect); register_intc_controller() local
319 res = irq_create_identity_mapping(d->domain, irq); register_intc_controller()
322 res = irq_domain_associate(d->domain, irq, irq); register_intc_controller()
328 pr_err("can't identity map IRQ %d\n", irq); register_intc_controller()
333 intc_irq_xlate_set(irq, vect->enum_id, d); register_intc_controller()
334 intc_register_irq(desc, d, vect->enum_id, irq); register_intc_controller()
360 irq); register_intc_controller()
370 irq_set_handler_data(irq2, (void *)irq); register_intc_controller()
412 int irq; intc_suspend() local
418 for_each_active_irq(irq) { for_each_active_irq()
422 data = irq_get_irq_data(irq); for_each_active_irq()
438 int irq; intc_resume() local
443 for_each_active_irq(irq) { for_each_active_irq()
447 data = irq_get_irq_data(irq); for_each_active_irq()
73 intc_register_irq(struct intc_desc *desc, struct intc_desc_int *d, intc_enum enum_id, unsigned int irq) intc_register_irq() argument
/linux-4.1.27/kernel/irq/
H A Dhandle.c2 * linux/kernel/irq/handle.c
13 #include <linux/irq.h>
19 #include <trace/events/irq.h>
25 * @irq: the interrupt number
30 void handle_bad_irq(unsigned int irq, struct irq_desc *desc) handle_bad_irq() argument
32 print_irq_desc(irq, desc); handle_bad_irq()
33 kstat_incr_irqs_this_cpu(irq, desc); handle_bad_irq()
34 ack_bad_irq(irq); handle_bad_irq()
38 * Special, empty irq handler:
46 static void warn_no_thread(unsigned int irq, struct irqaction *action) warn_no_thread() argument
52 "but no thread function available.", irq, action->name); warn_no_thread()
60 * device interrupt, so no irq storm is lurking. __irq_wake_thread()
75 * irq thread. __irq_wake_thread()
77 * This code is the hard irq context and can never run on two __irq_wake_thread()
81 * The irq threads of this irq which clear their "running" bit __irq_wake_thread()
86 * Hard irq handler: __irq_wake_thread()
97 * irq thread: __irq_wake_thread()
121 * the irq thread. The irq thread decrements the counter when __irq_wake_thread()
125 * against this code (hard irq handler) via IRQS_INPROGRESS __irq_wake_thread()
137 unsigned int flags = 0, irq = desc->irq_data.irq; handle_irq_event_percpu() local
142 trace_irq_handler_entry(irq, action); handle_irq_event_percpu()
143 res = action->handler(irq, action->dev_id); handle_irq_event_percpu()
144 trace_irq_handler_exit(irq, action, res); handle_irq_event_percpu()
146 if (WARN_ONCE(!irqs_disabled(),"irq %u handler %pF enabled interrupts\n", handle_irq_event_percpu()
147 irq, action->handler)) handle_irq_event_percpu()
157 warn_no_thread(irq, action); handle_irq_event_percpu()
176 add_interrupt_randomness(irq, flags); handle_irq_event_percpu()
179 note_interrupt(irq, desc, retval); handle_irq_event_percpu()
H A Dirqdesc.c10 #include <linux/irq.h>
74 static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node, desc_set_defaults() argument
79 desc->irq_data.irq = irq; desc_set_defaults()
107 static void irq_insert_desc(unsigned int irq, struct irq_desc *desc) irq_insert_desc() argument
109 radix_tree_insert(&irq_desc_tree, irq, desc); irq_insert_desc()
112 struct irq_desc *irq_to_desc(unsigned int irq) irq_to_desc() argument
114 return radix_tree_lookup(&irq_desc_tree, irq); irq_to_desc()
118 static void delete_irq_desc(unsigned int irq) delete_irq_desc() argument
120 radix_tree_delete(&irq_desc_tree, irq); delete_irq_desc()
145 static struct irq_desc *alloc_desc(int irq, int node, struct module *owner) alloc_desc() argument
164 desc_set_defaults(irq, desc, node, owner); alloc_desc()
175 static void free_desc(unsigned int irq) free_desc() argument
177 struct irq_desc *desc = irq_to_desc(irq); free_desc()
179 unregister_irq_proc(irq, desc); free_desc()
188 delete_irq_desc(irq); free_desc()
290 struct irq_desc *irq_to_desc(unsigned int irq) irq_to_desc() argument
292 return (irq < NR_IRQS) ? irq_desc + irq : NULL; irq_to_desc()
296 static void free_desc(unsigned int irq) free_desc() argument
298 struct irq_desc *desc = irq_to_desc(irq); free_desc()
302 desc_set_defaults(irq, desc, desc_node(desc), NULL); free_desc()
324 void irq_mark_irq(unsigned int irq) irq_mark_irq() argument
327 bitmap_set(allocated_irqs, irq, 1); irq_mark_irq()
332 void irq_init_desc(unsigned int irq) irq_init_desc() argument
334 free_desc(irq); irq_init_desc()
341 * generic_handle_irq - Invoke the handler for a particular irq
342 * @irq: The irq number to handle
345 int generic_handle_irq(unsigned int irq) generic_handle_irq() argument
347 struct irq_desc *desc = irq_to_desc(irq); generic_handle_irq()
351 generic_handle_irq_desc(irq, desc); generic_handle_irq()
358 * __handle_domain_irq - Invoke the handler for a HW irq belonging to a domain
360 * @hwirq: The HW irq number to convert to a logical one
370 unsigned int irq = hwirq; __handle_domain_irq() local
377 irq = irq_find_mapping(domain, hwirq); __handle_domain_irq()
384 if (unlikely(!irq || irq >= nr_irqs)) { __handle_domain_irq()
385 ack_bad_irq(irq); __handle_domain_irq()
388 generic_handle_irq(irq); __handle_domain_irq()
400 * irq_free_descs - free irq descriptors
421 * irq_alloc_descs - allocate and initialize a range of irq descriptors
422 * @irq: Allocate for specific irq number if irq >= 0
423 * @from: Start the search from this irq number
425 * @node: Preferred node on which the irq descriptor should be allocated
428 * Returns the first irq number or error code
431 __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node, __irq_alloc_descs() argument
439 if (irq >= 0) { __irq_alloc_descs()
440 if (from > irq) __irq_alloc_descs()
442 from = irq; __irq_alloc_descs()
457 if (irq >=0 && start != irq) __irq_alloc_descs()
478 * irq_alloc_hwirqs - Allocate an irq descriptor and initialize the hardware
486 int i, irq = __irq_alloc_descs(-1, 0, cnt, node, NULL); irq_alloc_hwirqs() local
488 if (irq < 0) irq_alloc_hwirqs()
491 for (i = irq; cnt > 0; i++, cnt--) { irq_alloc_hwirqs()
496 return irq; irq_alloc_hwirqs()
499 for (i--; i >= irq; i--) { irq_alloc_hwirqs()
503 irq_free_descs(irq, cnt); irq_alloc_hwirqs()
509 * irq_free_hwirqs - Free irq descriptor and cleanup the hardware
510 * @from: Free from irq number
528 * irq_get_next_irq - get next allocated irq number
531 * Returns next irq number after offset or nr_irqs if none is found.
539 __irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus, __irq_get_desc_lock() argument
542 struct irq_desc *desc = irq_to_desc(irq); __irq_get_desc_lock()
569 int irq_set_percpu_devid(unsigned int irq) irq_set_percpu_devid() argument
571 struct irq_desc *desc = irq_to_desc(irq); irq_set_percpu_devid()
584 irq_set_percpu_devid_flags(irq); irq_set_percpu_devid()
588 void kstat_incr_irq_this_cpu(unsigned int irq) kstat_incr_irq_this_cpu() argument
590 kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq)); kstat_incr_irq_this_cpu()
595 * @irq: The interrupt number
599 * @irq. The caller must ensure that the interrupt is not removed
602 unsigned int kstat_irqs_cpu(unsigned int irq, int cpu) kstat_irqs_cpu() argument
604 struct irq_desc *desc = irq_to_desc(irq); kstat_irqs_cpu()
612 * @irq: The interrupt number
615 * @irq. The caller must ensure that the interrupt is not removed
618 unsigned int kstat_irqs(unsigned int irq) kstat_irqs() argument
620 struct irq_desc *desc = irq_to_desc(irq); kstat_irqs()
633 * @irq: The interrupt number
636 * @irq. Contrary to kstat_irqs() this can be called from any
640 unsigned int kstat_irqs_usr(unsigned int irq) kstat_irqs_usr() argument
645 sum = kstat_irqs(irq); kstat_irqs_usr()
H A Dresend.c2 * linux/kernel/irq/resend.c
11 * interrupt-protected region. Not all irq controller chips can
16 #include <linux/irq.h>
34 int irq; resend_irqs() local
37 irq = find_first_bit(irqs_resend, nr_irqs); resend_irqs()
38 clear_bit(irq, irqs_resend); resend_irqs()
39 desc = irq_to_desc(irq); resend_irqs()
41 desc->handle_irq(irq, desc); resend_irqs()
56 void check_irq_resend(struct irq_desc *desc, unsigned int irq) check_irq_resend() argument
79 * context of the parent irq we need to be check_irq_resend()
91 irq = desc->parent_irq; check_irq_resend()
94 set_bit(irq, irqs_resend); check_irq_resend()
/linux-4.1.27/arch/mips/include/asm/
H A Di8259.h21 #include <irq.h>
40 extern int i8259A_irq_pending(unsigned int irq);
41 extern void make_8259A_irq(unsigned int irq);
52 int irq; i8259_irq() local
58 irq = inb(PIC_MASTER_CMD) & 7; i8259_irq()
59 if (irq == PIC_CASCADE_IR) { i8259_irq()
65 irq = (inb(PIC_SLAVE_CMD) & 7) + 8; i8259_irq()
68 if (unlikely(irq == 7)) { i8259_irq()
78 irq = -1; i8259_irq()
83 return likely(irq >= 0) ? irq + I8259A_IRQ_BASE : irq; i8259_irq()
H A Dirq.h18 #include <irq.h>
21 static inline int irq_canonicalize(int irq) irq_canonicalize() argument
23 return ((irq == I8259A_IRQ_BASE + 2) ? I8259A_IRQ_BASE + 9 : irq); irq_canonicalize()
26 #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
31 extern void do_IRQ(unsigned int irq);
38 extern void free_irqno(unsigned int irq);
/linux-4.1.27/include/linux/platform_data/
H A Dpinctrl-single.h2 * irq: optional wake-up interrupt
5 * Note that the irq and rearm setup should come from device
10 int irq; member in struct:pcs_pdata
/linux-4.1.27/arch/mn10300/unit-asb2364/
H A Dirq-fpga.c14 #include <linux/irq.h>
22 ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0001; asb2364_fpga_mask()
28 ASB2364_FPGA_REG_IRQ(d->irq - NR_CPU_IRQS) = 0x0001; asb2364_fpga_ack()
34 ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0001; asb2364_fpga_mask_ack()
36 ASB2364_FPGA_REG_IRQ(d->irq - NR_CPU_IRQS) = 0x0001; asb2364_fpga_mask_ack()
42 ASB2364_FPGA_REG_MASK(d->irq - NR_CPU_IRQS) = 0x0000; asb2364_fpga_unmask()
57 static irqreturn_t fpga_interrupt(int irq, void *_mask) fpga_interrupt() argument
89 int irq; irq_fpga_init() local
102 for (irq = NR_CPU_IRQS; irq < NR_IRQS; irq++) irq_fpga_init()
103 irq_set_chip_and_handler(irq, &asb2364_fpga_pic, irq_fpga_init()
/linux-4.1.27/arch/arm/include/asm/
H A Dhw_irq.h7 static inline void ack_bad_irq(int irq) ack_bad_irq() argument
11 pr_crit("unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
14 void set_irq_flags(unsigned int irq, unsigned int flags);
/linux-4.1.27/include/asm-generic/
H A Dhardirq.h12 #include <linux/irq.h>
15 static inline void ack_bad_irq(unsigned int irq) ack_bad_irq() argument
17 printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
H A Dirq.h13 static inline int irq_canonicalize(int irq) irq_canonicalize() argument
15 return irq; irq_canonicalize()
/linux-4.1.27/drivers/ssb/
H A Ddriver_mipscore.c79 /* not irq supported */ ssb_irqflag()
108 unsigned int irq; ssb_mips_irq() local
114 for (irq = 1; irq <= 4; irq++) { ssb_mips_irq()
115 tmp = ((ipsflag & ipsflag_irq_mask[irq]) >> ipsflag_irq_shift[irq]); ssb_mips_irq()
119 if (irq == 5) { ssb_mips_irq()
121 irq = 0; ssb_mips_irq()
124 return irq; ssb_mips_irq()
127 static void clear_irq(struct ssb_bus *bus, unsigned int irq) clear_irq() argument
132 if (irq == 0) { clear_irq()
137 ipsflag_irq_mask[irq]); clear_irq()
141 static void set_irq(struct ssb_device *dev, unsigned int irq) set_irq() argument
150 dev->irq = irq + 2; set_irq()
152 /* clear the old irq */ set_irq()
159 if (irq == 0) { set_irq()
163 if ((ipsflag & ipsflag_irq_mask[irq]) != ipsflag_irq_mask[irq]) { set_irq()
164 u32 oldipsflag = (ipsflag & ipsflag_irq_mask[irq]) >> ipsflag_irq_shift[irq]; set_irq()
169 irqflag <<= ipsflag_irq_shift[irq]; set_irq()
170 irqflag |= (ipsflag & ~ipsflag_irq_mask[irq]); set_irq()
173 ssb_dbg("set_irq: core 0x%04x, irq %d => %d\n", set_irq()
174 dev->id.coreid, oldirq+2, irq+2); set_irq()
177 static void print_irq(struct ssb_device *dev, unsigned int irq) print_irq() argument
180 ssb_dbg("core 0x%04x, irq : %s%s %s%s %s%s %s%s %s%s %s%s %s%s\n", print_irq()
182 irq_name[0], irq == 0 ? "*" : " ", print_irq()
183 irq_name[1], irq == 1 ? "*" : " ", print_irq()
184 irq_name[2], irq == 2 ? "*" : " ", print_irq()
185 irq_name[3], irq == 3 ? "*" : " ", print_irq()
186 irq_name[4], irq == 4 ? "*" : " ", print_irq()
187 irq_name[5], irq == 5 ? "*" : " ", print_irq()
188 irq_name[6], irq == 6 ? "*" : " "); print_irq()
297 unsigned int irq, i; ssb_mipscore_init() local
315 /* Assign IRQs to all cores on the bus, start with irq line 2, because serial usually takes 1 */ ssb_mipscore_init()
316 for (irq = 2, i = 0; i < bus->nr_devices; i++) { ssb_mipscore_init()
321 dev->irq = 0; ssb_mipscore_init()
323 dev->irq = mips_irq + 2; ssb_mipscore_init()
324 if (dev->irq > 5) ssb_mipscore_init()
328 /* shouldn't need a separate irq line for non-4710, most of them have a proper ssb_mipscore_init()
330 if ((bus->chip_id == 0x4710) && (irq <= 4)) { ssb_mipscore_init()
331 set_irq(dev, irq++); ssb_mipscore_init()
340 if (irq <= 4) { ssb_mipscore_init()
341 set_irq(dev, irq++); ssb_mipscore_init()
350 ssb_dbg("after irq reconfiguration\n"); ssb_mipscore_init()
/linux-4.1.27/arch/ia64/sn/kernel/
H A Dmsi_sn.c10 #include <linux/irq.h>
31 void sn_teardown_msi_irq(unsigned int irq) sn_teardown_msi_irq() argument
41 sn_irq_info = sn_msi_info[irq].sn_irq_info; sn_teardown_msi_irq()
50 sn_msi_info[irq].pci_addr, sn_teardown_msi_irq()
52 sn_msi_info[irq].pci_addr = 0; sn_teardown_msi_irq()
61 sn_msi_info[irq].sn_irq_info = NULL; sn_teardown_msi_irq()
63 destroy_irq(irq); sn_teardown_msi_irq()
76 int irq; sn_setup_msi_irq() local
87 irq = create_irq(); sn_setup_msi_irq()
88 if (irq < 0) sn_setup_msi_irq()
89 return irq; sn_setup_msi_irq()
103 destroy_irq(irq); sn_setup_msi_irq()
107 status = sn_intr_alloc(nasid, widget, sn_irq_info, irq, -1, -1); sn_setup_msi_irq()
110 destroy_irq(irq); sn_setup_msi_irq()
114 sn_irq_info->irq_int_bit = -1; /* mark this as an MSI irq */ sn_setup_msi_irq()
131 destroy_irq(irq); sn_setup_msi_irq()
135 sn_msi_info[irq].sn_irq_info = sn_irq_info; sn_setup_msi_irq()
136 sn_msi_info[irq].pci_addr = bus_addr; sn_setup_msi_irq()
145 msg.data = 0x100 + irq; sn_setup_msi_irq()
147 irq_set_msi_desc(irq, entry); sn_setup_msi_irq()
148 pci_write_msi_msg(irq, &msg); sn_setup_msi_irq()
149 irq_set_chip_and_handler(irq, &sn_msi_chip, handle_edge_irq); sn_setup_msi_irq()
167 unsigned int cpu, irq = data->irq; sn_set_msi_irq_affinity() local
170 sn_irq_info = sn_msi_info[irq].sn_irq_info; sn_set_msi_irq_affinity()
185 sn_msi_info[irq].pci_addr = 0; sn_set_msi_irq_affinity()
191 sn_msi_info[irq].sn_irq_info = new_irq_info; sn_set_msi_irq_affinity()
204 sn_msi_info[irq].pci_addr = bus_addr; sn_set_msi_irq_affinity()
208 pci_write_msi_msg(irq, &msg); sn_set_msi_irq_affinity()
223 unsigned int vector = data->irq; sn_msi_retrigger_irq()
/linux-4.1.27/arch/alpha/kernel/
H A Dsys_rawhide.c20 #include <asm/irq.h>
61 unsigned int irq = d->irq; rawhide_enable_irq() local
63 irq -= 16; rawhide_enable_irq()
64 hose = irq / 24; rawhide_enable_irq()
68 irq -= hose * 24; rawhide_enable_irq()
69 mask = 1 << irq; rawhide_enable_irq()
82 unsigned int irq = d->irq; rawhide_disable_irq() local
84 irq -= 16; rawhide_disable_irq()
85 hose = irq / 24; rawhide_disable_irq()
89 irq -= hose * 24; rawhide_disable_irq()
90 mask = ~(1 << irq) | hose_irq_masks[hose]; rawhide_disable_irq()
103 unsigned int irq = d->irq; rawhide_mask_and_ack_irq() local
105 irq -= 16; rawhide_mask_and_ack_irq()
106 hose = irq / 24; rawhide_mask_and_ack_irq()
110 irq -= hose * 24; rawhide_mask_and_ack_irq()
111 mask1 = 1 << irq; rawhide_mask_and_ack_irq()
136 int irq; rawhide_srm_device_interrupt() local
138 irq = (vector - 0x800) >> 4; rawhide_srm_device_interrupt()
150 if (irq == 52) { rawhide_srm_device_interrupt()
152 irq = 72; rawhide_srm_device_interrupt()
156 irq -= ((irq + 16) >> 2) & 0x38; rawhide_srm_device_interrupt()
158 handle_irq(irq); rawhide_srm_device_interrupt()
238 int irq = COMMON_TABLE_LOOKUP; rawhide_map_irq() local
239 if (irq >= 0) rawhide_map_irq()
240 irq += 24 * hose->index; rawhide_map_irq()
241 return irq; rawhide_map_irq()
H A Dirq.c2 * linux/arch/alpha/kernel/irq.c
22 #include <linux/irq.h>
34 void ack_bad_irq(unsigned int irq) ack_bad_irq() argument
37 printk(KERN_CRIT "Unexpected IRQ trap at vector %u\n", irq); ack_bad_irq()
43 int irq_select_affinity(unsigned int irq) irq_select_affinity() argument
45 struct irq_data *data = irq_get_irq_data(irq); irq_select_affinity()
54 if (!chip->irq_set_affinity || irq_user_affinity[irq]) irq_select_affinity()
95 handle_irq(int irq) handle_irq() argument
98 * We ack quickly, we don't want the irq controller handle_irq()
104 * 0 return value means that this irq is already being handle_irq()
108 struct irq_desc *desc = irq_to_desc(irq); handle_irq()
110 if (!desc || ((unsigned) irq > ACTUAL_NR_IRQS && handle_irq()
115 irq); handle_irq()
120 generic_handle_irq_desc(irq, desc); handle_irq()
H A Dirq_i8259.c13 #include <linux/irq.h>
27 i8259_update_irq_hw(unsigned int irq, unsigned long mask) i8259_update_irq_hw() argument
30 if (irq & 8) mask >>= 8; i8259_update_irq_hw()
31 if (irq & 8) port = 0xA1; i8259_update_irq_hw()
39 i8259_update_irq_hw(d->irq, cached_irq_mask &= ~(1 << d->irq)); i8259a_enable_irq()
44 __i8259a_disable_irq(unsigned int irq) __i8259a_disable_irq() argument
46 i8259_update_irq_hw(irq, cached_irq_mask |= 1 << irq); __i8259a_disable_irq()
53 __i8259a_disable_irq(d->irq); i8259a_disable_irq()
60 unsigned int irq = d->irq; i8259a_mask_and_ack_irq() local
63 __i8259a_disable_irq(irq); i8259a_mask_and_ack_irq()
66 if (irq >= 8) { i8259a_mask_and_ack_irq()
67 outb(0xE0 | (irq - 8), 0xa0); /* ack the slave */ i8259a_mask_and_ack_irq()
68 irq = 2; i8259a_mask_and_ack_irq()
70 outb(0xE0 | irq, 0x20); /* ack the master */ i8259a_mask_and_ack_irq()
130 * interrupts vectors such that irq level L generates vector L. isa_device_interrupt()
H A Dsys_jensen.c25 #include <asm/irq.h>
68 if (d->irq == 7) jensen_local_enable()
76 if (d->irq == 7) jensen_local_disable()
84 if (d->irq == 7) jensen_local_mask_ack()
98 int irq; jensen_device_interrupt() local
107 case 0x900: irq = 4; break; /* com1 -> irq 4 */ jensen_device_interrupt()
108 case 0x920: irq = 3; break; /* com2 -> irq 3 */ jensen_device_interrupt()
109 case 0x980: irq = 1; break; /* kbd -> irq 1 */ jensen_device_interrupt()
110 case 0x990: irq = 9; break; /* mouse -> irq 9 */ jensen_device_interrupt()
118 irq = (vector - 0x800) >> 4; jensen_device_interrupt()
119 if (irq == 1) jensen_device_interrupt()
120 irq = 7; jensen_device_interrupt()
125 if (!irq_has_action(irq)) { jensen_device_interrupt()
154 irq != last_irq) { jensen_device_interrupt()
155 printk(KERN_CRIT " irq %d count %d cc %u @ %lx\n", jensen_device_interrupt()
156 irq, count, cc-last_cc, get_irq_regs()->pc); jensen_device_interrupt()
159 last_irq = irq; jensen_device_interrupt()
165 handle_irq(irq); jensen_device_interrupt()
H A Dsys_marvel.c17 #include <asm/irq.h>
45 unsigned int irq; io7_device_interrupt()
54 * PE | 0 | irq | 0 io7_device_interrupt()
56 * where (irq) is io7_device_interrupt()
62 irq = ((vector & 0xffff) - 0x800) >> 4; io7_device_interrupt()
64 irq += 16; /* offset for legacy */ io7_device_interrupt()
65 irq &= MARVEL_IRQ_VEC_IRQ_MASK; /* not too many bits */ io7_device_interrupt()
66 irq |= pid << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */ io7_device_interrupt()
68 handle_irq(irq);
72 io7_get_irq_ctl(unsigned int irq, struct io7 **pio7) io7_get_irq_ctl()
78 pid = irq >> MARVEL_IRQ_VEC_PE_SHIFT; io7_get_irq_ctl()
83 __func__, irq, pid); io7_get_irq_ctl()
87 irq &= MARVEL_IRQ_VEC_IRQ_MASK; /* isolate the vector */ io7_get_irq_ctl()
88 irq -= 16; /* subtract legacy bias */ io7_get_irq_ctl()
90 if (irq >= 0x180) { io7_get_irq_ctl()
92 "%s for invalid irq -- pid %d adjusted irq %x\n", io7_get_irq_ctl()
93 __func__, pid, irq); io7_get_irq_ctl()
97 ctl = &io7->csrs->PO7_LSI_CTL[irq & 0xff].csr; /* assume LSI */ io7_get_irq_ctl()
98 if (irq >= 0x80) /* MSI */ io7_get_irq_ctl()
99 ctl = &io7->csrs->PO7_MSI_CTL[((irq - 0x80) >> 5) & 0x0f].csr; io7_get_irq_ctl()
109 unsigned int irq = d->irq; io7_enable_irq()
112 ctl = io7_get_irq_ctl(irq, &io7); io7_enable_irq()
114 printk(KERN_ERR "%s: get_ctl failed for irq %x\n", io7_enable_irq()
115 __func__, irq); io7_enable_irq()
130 unsigned int irq = d->irq; io7_disable_irq()
133 ctl = io7_get_irq_ctl(irq, &io7); io7_disable_irq()
135 printk(KERN_ERR "%s: get_ctl failed for irq %x\n", io7_disable_irq()
136 __func__, irq); io7_disable_irq()
330 int irq; marvel_map_irq()
333 irq = intline; marvel_map_irq()
346 irq = msg_dat & 0x1ff; /* we use msg_data<8:0> */ marvel_map_irq()
347 irq += 0x80; /* offset for lsi */ marvel_map_irq()
360 (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT), marvel_map_irq()
361 (irq + 16) | (io7->pe << MARVEL_IRQ_VEC_PE_SHIFT)); marvel_map_irq()
368 irq = intline; marvel_map_irq()
370 printk(" forcing LSI interrupt on irq %d [0x%x]\n", irq, irq); marvel_map_irq()
374 irq += 16; /* offset for legacy */ marvel_map_irq()
375 irq |= io7->pe << MARVEL_IRQ_VEC_PE_SHIFT; /* merge the pid */ marvel_map_irq()
377 return irq;
44 unsigned int irq; io7_device_interrupt() local
71 io7_get_irq_ctl(unsigned int irq, struct io7 **pio7) io7_get_irq_ctl() argument
108 unsigned int irq = d->irq; io7_enable_irq() local
129 unsigned int irq = d->irq; io7_disable_irq() local
329 int irq; marvel_map_irq() local
/linux-4.1.27/arch/unicore32/kernel/
H A Dirq.c2 * linux/arch/unicore32/kernel/irq.c
17 #include <linux/irq.h>
42 #define GPIO_MASK(irq) (1 << (irq - IRQ_GPIO0))
48 if (d->irq < IRQ_GPIOHIGH) puv3_gpio_type()
49 mask = 1 << d->irq; puv3_gpio_type()
51 mask = GPIO_MASK(d->irq); puv3_gpio_type()
79 writel((1 << d->irq), GPIO_GEDR); puv3_low_gpio_ack()
84 writel(readl(INTC_ICMR) & ~(1 << d->irq), INTC_ICMR); puv3_low_gpio_mask()
89 writel(readl(INTC_ICMR) | (1 << d->irq), INTC_ICMR); puv3_low_gpio_unmask()
95 writel(readl(PM_PWER) | (1 << d->irq), PM_PWER); puv3_low_gpio_wake()
97 writel(readl(PM_PWER) & ~(1 << d->irq), PM_PWER); puv3_low_gpio_wake()
116 puv3_gpio_handler(unsigned int irq, struct irq_desc *desc) puv3_gpio_handler() argument
128 irq = IRQ_GPIO0; puv3_gpio_handler()
131 generic_handle_irq(irq); puv3_gpio_handler()
133 irq++; puv3_gpio_handler()
146 unsigned int mask = GPIO_MASK(d->irq); puv3_high_gpio_ack()
153 unsigned int mask = GPIO_MASK(d->irq); puv3_high_gpio_mask()
163 unsigned int mask = GPIO_MASK(d->irq); puv3_high_gpio_unmask()
195 writel(readl(INTC_ICMR) & ~(1 << d->irq), INTC_ICMR); puv3_mask_irq()
200 writel(readl(INTC_ICMR) | (1 << d->irq), INTC_ICMR); puv3_unmask_irq()
208 if (d->irq == IRQ_RTCAlarm) { puv3_set_wake()
297 unsigned int irq; init_IRQ() local
315 for (irq = 0; irq < IRQ_GPIOHIGH; irq++) { init_IRQ()
316 irq_set_chip(irq, &puv3_low_gpio_chip); init_IRQ()
317 irq_set_handler(irq, handle_edge_irq); init_IRQ()
318 irq_modify_status(irq, init_IRQ()
323 for (irq = IRQ_GPIOHIGH + 1; irq < IRQ_GPIO0; irq++) { init_IRQ()
324 irq_set_chip(irq, &puv3_normal_chip); init_IRQ()
325 irq_set_handler(irq, handle_level_irq); init_IRQ()
326 irq_modify_status(irq, init_IRQ()
331 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO27; irq++) { init_IRQ()
332 irq_set_chip(irq, &puv3_high_gpio_chip); init_IRQ()
333 irq_set_handler(irq, handle_edge_irq); init_IRQ()
334 irq_modify_status(irq, init_IRQ()
355 asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs) asm_do_IRQ() argument
365 if (unlikely(irq >= nr_irqs)) { asm_do_IRQ()
367 printk(KERN_WARNING "Bad IRQ%u\n", irq); asm_do_IRQ()
368 ack_bad_irq(irq); asm_do_IRQ()
370 generic_handle_irq(irq); asm_do_IRQ()
/linux-4.1.27/arch/m68k/q40/
H A Dq40ints.c18 #include <linux/irq.h>
45 unsigned int irq = data->irq; q40_irq_startup() local
48 switch (irq) { q40_irq_startup()
51 printk("%s: ISA IRQ %d not implemented by HW\n", __func__, irq); q40_irq_startup()
131 static irqreturn_t q40_timer_int (int irq, void * dev) q40_timer_int() argument
142 q40_timer_routine(irq, dev); q40_timer_int()
168 struct IRQ_TABLE{ unsigned mask; int irq ;}; member in struct:IRQ_TABLE
176 { .mask = Q40_IRQ3_MASK, .irq = 3 }, /* ser 1 */
177 { .mask = Q40_IRQ4_MASK, .irq = 4 }, /* ser 2 */
178 { .mask = Q40_IRQ14_MASK, .irq = 14 }, /* IDE 1 */
179 { .mask = Q40_IRQ15_MASK, .irq = 15 }, /* IDE 2 */
180 { .mask = Q40_IRQ6_MASK, .irq = 6 }, /* floppy, handled elsewhere */
181 { .mask = Q40_IRQ7_MASK, .irq = 7 }, /* par */
182 { .mask = Q40_IRQ5_MASK, .irq = 5 },
183 { .mask = Q40_IRQ10_MASK, .irq = 10 },
200 static int mext_disabled=0; /* ext irq disabled by master chip? */
205 static void q40_irq_handler(unsigned int irq, struct pt_regs *fp) q40_irq_handler() argument
219 switch (irq) { q40_irq_handler()
233 irq = eirqs[i].irq; q40_irq_handler()
235 * There is a little mess wrt which IRQ really caused this irq request. The q40_irq_handler()
240 if (irq > 4 && irq <= 15 && mext_disabled) { q40_irq_handler()
244 if (q40_state[irq] & IRQ_INPROGRESS) { q40_irq_handler()
245 /* some handlers do local_irq_enable() for irq latency reasons, */ q40_irq_handler()
246 /* however reentering an active irq handler is not permitted */ q40_irq_handler()
250 disable_irq(irq); q40_irq_handler()
253 /*printk("IRQ_INPROGRESS detected for irq %d, disabling - %s disabled\n", q40_irq_handler()
254 irq, disabled ? "already" : "not yet"); */ q40_irq_handler()
260 q40_state[irq] |= IRQ_INPROGRESS; q40_irq_handler()
261 do_IRQ(irq, fp); q40_irq_handler()
262 q40_state[irq] &= ~IRQ_INPROGRESS; q40_irq_handler()
270 if (irq > 4) { q40_irq_handler()
272 enable_irq(irq); q40_irq_handler()
276 /*printk("reenabling irq %d\n", irq); */ q40_irq_handler()
290 /* should test whether keyboard irq is really enabled, doing it in defhand */ q40_irq_handler()
299 unsigned int irq = data->irq; q40_irq_enable() local
301 if (irq >= 5 && irq <= 15) { q40_irq_enable()
313 unsigned int irq = data->irq; q40_irq_disable() local
320 if (irq >= 5 && irq <= 15) { q40_irq_disable()
/linux-4.1.27/drivers/gpu/drm/msm/mdp/
H A Dmdp_kms.c24 struct mdp_irq irq; member in struct:mdp_irq_wait
34 struct mdp_irq *irq; update_irq() local
39 list_for_each_entry(irq, &mdp_kms->irq_list, node) update_irq()
40 irqmask |= irq->irqmask; update_irq()
66 handler->irq(handler, handler->irqmask & status); mdp_dispatch_irqs()
89 static void wait_irq(struct mdp_irq *irq, uint32_t irqstatus) wait_irq() argument
92 container_of(irq, struct mdp_irq_wait, irq); wait_irq()
100 .irq = { mdp_irq_wait()
101 .irq = wait_irq, mdp_irq_wait()
106 mdp_irq_register(mdp_kms, &wait.irq); mdp_irq_wait()
109 mdp_irq_unregister(mdp_kms, &wait.irq); mdp_irq_wait()
112 void mdp_irq_register(struct mdp_kms *mdp_kms, struct mdp_irq *irq) mdp_irq_register() argument
119 if (!irq->registered) { mdp_irq_register()
120 irq->registered = true; mdp_irq_register()
121 list_add(&irq->node, &mdp_kms->irq_list); mdp_irq_register()
131 void mdp_irq_unregister(struct mdp_kms *mdp_kms, struct mdp_irq *irq) mdp_irq_unregister() argument
138 if (irq->registered) { mdp_irq_unregister()
139 irq->registered = false; mdp_irq_unregister()
140 list_del(&irq->node); mdp_irq_unregister()
/linux-4.1.27/arch/sh/kernel/cpu/sh4a/
H A Dintc-shx3.c10 #include <linux/irq.h>
19 unsigned int irq_lookup(unsigned int irq) irq_lookup() argument
21 return __raw_readl(INTACK) & 1 ? irq : NO_IRQ_IGNORE; irq_lookup()
24 void irq_finish(unsigned int irq) irq_finish() argument
26 __raw_writel(irq2evt(irq), INTACKCLR); irq_finish()
/linux-4.1.27/arch/ia64/include/asm/
H A Dirq.h19 irq_canonicalize (int irq) irq_canonicalize() argument
26 return ((irq == 2) ? 9 : irq); irq_canonicalize()
29 extern void set_irq_affinity_info (unsigned int irq, int dest, int redir);
35 void destroy_irq(unsigned int irq);
H A Dhardirq.h18 #include <linux/irq.h>
24 void ack_bad_irq(unsigned int irq);
/linux-4.1.27/arch/x86/kernel/apic/
H A Dhtirq.c24 static void target_ht_irq(unsigned int irq, unsigned int dest, u8 vector) target_ht_irq() argument
28 fetch_ht_irq_msg(irq, &msg); target_ht_irq()
36 write_ht_irq_msg(irq, &msg); target_ht_irq()
50 target_ht_irq(data->irq, dest, cfg->vector); ht_set_affinity()
64 int arch_setup_ht_irq(unsigned int irq, struct pci_dev *dev) arch_setup_ht_irq() argument
74 cfg = irq_cfg(irq); arch_setup_ht_irq()
75 err = assign_irq_vector(irq, cfg, apic->target_cpus()); arch_setup_ht_irq()
99 write_ht_irq_msg(irq, &msg); arch_setup_ht_irq()
101 irq_set_chip_and_handler_name(irq, &ht_irq_chip, arch_setup_ht_irq()
104 dev_dbg(&dev->dev, "irq %d for HT\n", irq); arch_setup_ht_irq()
H A Dmsi.c24 unsigned int irq, unsigned int dest, native_compose_msi_msg()
27 struct irq_cfg *cfg = irq_cfg(irq); native_compose_msi_msg()
53 static int msi_compose_msg(struct pci_dev *pdev, unsigned int irq, msi_compose_msg() argument
63 cfg = irq_cfg(irq); msi_compose_msg()
64 err = assign_irq_vector(irq, cfg, apic->target_cpus()); msi_compose_msg()
73 x86_msi.compose_msi_msg(pdev, irq, dest, msg, hpet_id); msi_compose_msg()
121 unsigned int irq = irq_base + irq_offset; setup_msi_irq() local
124 ret = msi_compose_msg(dev, irq, &msg, -1); setup_msi_irq()
135 pci_write_msi_msg(irq, &msg); setup_msi_irq()
137 setup_remapped_irq(irq, irq_cfg(irq), chip); setup_msi_irq()
139 irq_set_chip_and_handler_name(irq, chip, handle_edge_irq, "edge"); setup_msi_irq()
141 dev_dbg(&dev->dev, "irq %d for MSI/MSI-X\n", irq); setup_msi_irq()
149 unsigned int irq; native_setup_msi_irqs() local
159 irq = irq_alloc_hwirq(node); native_setup_msi_irqs()
160 if (!irq) native_setup_msi_irqs()
163 ret = setup_msi_irq(dev, msidesc, irq, 0); native_setup_msi_irqs()
165 irq_free_hwirq(irq); native_setup_msi_irqs()
173 void native_teardown_msi_irq(unsigned int irq) native_teardown_msi_irq() argument
175 irq_free_hwirq(irq); native_teardown_msi_irq()
184 unsigned int dest, irq = data->irq; dmar_msi_set_affinity() local
192 dmar_msi_read(irq, &msg); dmar_msi_set_affinity()
200 dmar_msi_write(irq, &msg); dmar_msi_set_affinity()
215 int arch_setup_dmar_msi(unsigned int irq) arch_setup_dmar_msi() argument
220 ret = msi_compose_msg(NULL, irq, &msg, -1); arch_setup_dmar_msi()
223 dmar_msi_write(irq, &msg); arch_setup_dmar_msi()
224 irq_set_chip_and_handler_name(irq, &dmar_msi_type, handle_edge_irq, arch_setup_dmar_msi()
269 int default_setup_hpet_msi(unsigned int irq, unsigned int id) default_setup_hpet_msi() argument
275 ret = msi_compose_msg(NULL, irq, &msg, id); default_setup_hpet_msi()
279 hpet_msi_write(irq_get_handler_data(irq), &msg); default_setup_hpet_msi()
280 irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); default_setup_hpet_msi()
281 setup_remapped_irq(irq, irq_cfg(irq), chip); default_setup_hpet_msi()
283 irq_set_chip_and_handler_name(irq, chip, handle_edge_irq, "edge"); default_setup_hpet_msi()
23 native_compose_msi_msg(struct pci_dev *pdev, unsigned int irq, unsigned int dest, struct msi_msg *msg, u8 hpet_id) native_compose_msi_msg() argument
/linux-4.1.27/arch/sh/cchips/hd6446x/
H A Dhd64461.c12 #include <linux/irq.h>
14 #include <asm/irq.h>
22 unsigned int irq = data->irq; hd64461_mask_irq() local
24 unsigned short mask = 1 << (irq - HD64461_IRQBASE); hd64461_mask_irq()
33 unsigned int irq = data->irq; hd64461_unmask_irq() local
35 unsigned short mask = 1 << (irq - HD64461_IRQBASE); hd64461_unmask_irq()
47 if (data->irq == HD64461_IRQBASE + 13) hd64461_mask_and_ack_irq()
59 static void hd64461_irq_demux(unsigned int irq, struct irq_desc *desc) hd64461_irq_demux() argument
79 "HD64461 configured at 0x%x on irq %d(mapped into %d to %d)\n", setup_hd64461()
/linux-4.1.27/arch/mips/loongson/lemote-2f/
H A Dirq.c31 * get the irq via the IRR directly, we access the ISR instead.
35 int irq, isr; mach_i8259_irq() local
37 irq = -1; mach_i8259_irq()
45 irq = ffs(isr) - 1; mach_i8259_irq()
46 if (unlikely(irq == 7)) { mach_i8259_irq()
56 irq = -1; mach_i8259_irq()
61 return irq; mach_i8259_irq()
67 int irq; i8259_irqdispatch() local
69 irq = mach_i8259_irq(); i8259_irqdispatch()
70 if (irq >= 0) i8259_irqdispatch()
71 do_IRQ(irq); i8259_irqdispatch()
113 * 32-63 ------> bonito irq mach_init_irq()
125 /* setup north bridge irq (bonito) */ mach_init_irq()
127 /* setup source bridge irq (i8259) */ mach_init_irq()
/linux-4.1.27/arch/arm/mach-ks8695/
H A Dirq.c2 * arch/arm/mach-ks8695/irq.c
30 #include <asm/irq.h>
32 #include <asm/mach/irq.h>
34 #include <mach/regs-irq.h>
42 inten &= ~(1 << d->irq); ks8695_irq_mask()
52 inten |= (1 << d->irq); ks8695_irq_unmask()
59 __raw_writel((1 << d->irq), KS8695_IRQ_VA + KS8695_INTST); ks8695_irq_ack()
96 switch (d->irq) { ks8695_irq_set_type()
118 irq_set_chip_and_handler(d->irq, &ks8695_irq_level_chip, ks8695_irq_set_type()
122 irq_set_chip_and_handler(d->irq, &ks8695_irq_edge_chip, ks8695_irq_set_type()
146 unsigned int irq; ks8695_init_irq() local
152 for (irq = 0; irq < NR_IRQS; irq++) { ks8695_init_irq()
153 switch (irq) { ks8695_init_irq()
161 irq_set_chip_and_handler(irq, ks8695_init_irq()
169 ks8695_irq_ack(irq_get_irq_data(irq)); ks8695_init_irq()
170 irq_set_chip_and_handler(irq, ks8695_init_irq()
175 set_irq_flags(irq, IRQF_VALID); ks8695_init_irq()
/linux-4.1.27/arch/x86/platform/uv/
H A Duv_irq.c14 #include <linux/irq.h>
20 /* MMR offset and pnode of hub sourcing interrupts for a given irq */
25 int irq; member in struct:uv_irq_2_mmr_pnode
50 * rb tree for a specific irq.
52 static int uv_set_irq_2_mmr_info(int irq, unsigned long offset, unsigned blade) uv_set_irq_2_mmr_info() argument
65 n->irq = irq; uv_set_irq_2_mmr_info()
74 if (unlikely(irq == e->irq)) { uv_set_irq_2_mmr_info()
75 /* irq entry exists */ uv_set_irq_2_mmr_info()
83 if (irq < e->irq) uv_set_irq_2_mmr_info()
97 /* Retrieve offset and pnode information from the rb tree for a specific irq */ uv_irq_2_mmr_info()
98 int uv_irq_2_mmr_info(int irq, unsigned long *offset, int *pnode) uv_irq_2_mmr_info() argument
109 if (e->irq == irq) { uv_irq_2_mmr_info()
116 if (irq < e->irq) uv_irq_2_mmr_info()
126 * Re-target the irq to the specified CPU and enable the specified MMR located
130 arch_enable_uv_irq(char *irq_name, unsigned int irq, int cpu, int mmr_blade, arch_enable_uv_irq() argument
134 struct irq_cfg *cfg = irq_cfg(irq); arch_enable_uv_irq()
143 err = assign_irq_vector(irq, cfg, eligible_cpu); arch_enable_uv_irq()
152 irq_set_status_flags(irq, IRQ_NO_BALANCING); arch_enable_uv_irq()
154 irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); arch_enable_uv_irq()
156 irq_set_chip_and_handler_name(irq, &uv_irq_chip, handle_percpu_irq, arch_enable_uv_irq()
175 return irq; arch_enable_uv_irq()
222 if (uv_irq_2_mmr_info(data->irq, &mmr_offset, &mmr_pnode)) uv_set_irq_affinity()
234 * Set up a mapping of an available irq and vector, and enable the specified
241 int ret, irq = irq_alloc_hwirq(uv_blade_to_memory_nid(mmr_blade)); uv_setup_irq() local
243 if (!irq) uv_setup_irq()
246 ret = arch_enable_uv_irq(irq_name, irq, cpu, mmr_blade, mmr_offset, uv_setup_irq()
248 if (ret == irq) uv_setup_irq()
249 uv_set_irq_2_mmr_info(irq, mmr_offset, mmr_blade); uv_setup_irq()
251 irq_free_hwirq(irq); uv_setup_irq()
258 * Tear down a mapping of an irq and vector, and disable the specified MMR that
264 void uv_teardown_irq(unsigned int irq) uv_teardown_irq() argument
274 if (e->irq == irq) { uv_teardown_irq()
280 if (irq < e->irq) uv_teardown_irq()
286 irq_free_hwirq(irq); uv_teardown_irq()
/linux-4.1.27/arch/m32r/platforms/mappi2/
H A Dsetup.c10 #include <linux/irq.h>
22 static void disable_mappi2_irq(unsigned int irq) disable_mappi2_irq() argument
26 if ((irq == 0) ||(irq >= NR_IRQS)) { disable_mappi2_irq()
27 printk("bad irq 0x%08x\n", irq); disable_mappi2_irq()
30 port = irq2port(irq); disable_mappi2_irq()
31 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; disable_mappi2_irq()
35 static void enable_mappi2_irq(unsigned int irq) enable_mappi2_irq() argument
39 if ((irq == 0) ||(irq >= NR_IRQS)) { enable_mappi2_irq()
40 printk("bad irq 0x%08x\n", irq); enable_mappi2_irq()
43 port = irq2port(irq); enable_mappi2_irq()
44 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; enable_mappi2_irq()
50 disable_mappi2_irq(data->irq); mask_mappi2()
55 enable_mappi2_irq(data->irq); unmask_mappi2()
62 port = irq2port(data->irq); shutdown_mappi2()
/linux-4.1.27/arch/m32r/platforms/mappi3/
H A Dsetup.c10 #include <linux/irq.h>
22 static void disable_mappi3_irq(unsigned int irq) disable_mappi3_irq() argument
26 if ((irq == 0) ||(irq >= NR_IRQS)) { disable_mappi3_irq()
27 printk("bad irq 0x%08x\n", irq); disable_mappi3_irq()
30 port = irq2port(irq); disable_mappi3_irq()
31 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; disable_mappi3_irq()
35 static void enable_mappi3_irq(unsigned int irq) enable_mappi3_irq() argument
39 if ((irq == 0) ||(irq >= NR_IRQS)) { enable_mappi3_irq()
40 printk("bad irq 0x%08x\n", irq); enable_mappi3_irq()
43 port = irq2port(irq); enable_mappi3_irq()
44 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; enable_mappi3_irq()
50 disable_mappi3_irq(data->irq); mask_mappi3()
55 enable_mappi3_irq(data->irq); unmask_mappi3()
62 port = irq2port(data->irq); shutdown_mappi3()
/linux-4.1.27/arch/arm/mach-dove/
H A Dirq.c2 * arch/arm/mach-dove/irq.c
13 #include <linux/irq.h>
17 #include <plat/irq.h>
18 #include <asm/mach/irq.h>
26 int pin = irq_to_pmu(d->irq); pmu_irq_mask()
36 int pin = irq_to_pmu(d->irq); pmu_irq_unmask()
46 int pin = irq_to_pmu(d->irq); pmu_irq_ack()
72 static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc) pmu_irq_handler() argument
78 do_bad_IRQ(irq, desc); pmu_irq_handler()
82 for (irq = 0; irq < NR_PMU_IRQS; irq++) { pmu_irq_handler()
83 if (!(cause & (1 << irq))) pmu_irq_handler()
85 irq = pmu_to_irq(irq); pmu_irq_handler()
86 generic_handle_irq(irq); pmu_irq_handler()
114 * break asm irq handler used by non-DT boards. Therefore,
115 * we provide a C-style irq handler even for non-DT boards,
/linux-4.1.27/arch/m32r/platforms/oaks32r/
H A Dsetup.c10 #include <linux/irq.h>
21 static void disable_oaks32r_irq(unsigned int irq) disable_oaks32r_irq() argument
25 port = irq2port(irq); disable_oaks32r_irq()
26 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; disable_oaks32r_irq()
30 static void enable_oaks32r_irq(unsigned int irq) enable_oaks32r_irq() argument
34 port = irq2port(irq); enable_oaks32r_irq()
35 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; enable_oaks32r_irq()
41 disable_oaks32r_irq(data->irq); mask_oaks32r()
46 enable_oaks32r_irq(data->irq); unmask_oaks32r()
53 port = irq2port(data->irq); shutdown_oaks32r()
/linux-4.1.27/drivers/irqchip/
H A Dirq-mmp.c2 * linux/arch/arm/mach-mmp/irq.c
17 #include <linux/irq.h>
71 hwirq = d->irq - data->virq_base; icu_mask_ack_irq()
95 hwirq = d->irq - data->virq_base; icu_mask_irq()
114 hwirq = d->irq - data->virq_base; icu_unmask_irq()
133 static void icu_mux_irq_demux(unsigned int irq, struct irq_desc *desc) icu_mux_irq_demux() argument
141 if (irq == icu_data[i].cascade_irq) { icu_mux_irq_demux()
148 pr_err("Spurious irq %d in MMP INTC\n", irq); icu_mux_irq_demux()
163 static int mmp_irq_domain_map(struct irq_domain *d, unsigned int irq, mmp_irq_domain_map() argument
166 irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq); mmp_irq_domain_map()
167 set_irq_flags(irq, IRQF_VALID); mmp_irq_domain_map()
222 int irq; icu_init_irq() local
234 for (irq = 0; irq < 64; irq++) { icu_init_irq()
235 icu_mask_irq(irq_get_irq_data(irq)); icu_init_irq()
236 irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq); icu_init_irq()
237 set_irq_flags(irq, IRQF_VALID); icu_init_irq()
246 int irq, end; mmp2_init_icu() local
325 for (irq = 0; irq < end; irq++) { mmp2_init_icu()
326 icu_mask_irq(irq_get_irq_data(irq)); mmp2_init_icu()
327 if (irq == icu_data[1].cascade_irq || mmp2_init_icu()
328 irq == icu_data[2].cascade_irq || mmp2_init_icu()
329 irq == icu_data[3].cascade_irq || mmp2_init_icu()
330 irq == icu_data[4].cascade_irq || mmp2_init_icu()
331 irq == icu_data[5].cascade_irq || mmp2_init_icu()
332 irq == icu_data[6].cascade_irq || mmp2_init_icu()
333 irq == icu_data[7].cascade_irq) { mmp2_init_icu()
334 irq_set_chip(irq, &icu_irq_chip); mmp2_init_icu()
335 irq_set_chained_handler(irq, icu_mux_irq_demux); mmp2_init_icu()
337 irq_set_chip_and_handler(irq, &icu_irq_chip, mmp2_init_icu()
340 set_irq_flags(irq, IRQF_VALID); mmp2_init_icu()
349 int ret, nr_irqs, irq, i = 0; mmp_init_bases() local
367 for (irq = 0; irq < nr_irqs; irq++) { mmp_init_bases()
368 ret = irq_create_mapping(icu_data[0].domain, irq); mmp_init_bases()
373 if (!irq) mmp_init_bases()
380 for (i = 0; i < irq; i++) mmp_init_bases()
430 int i, ret, irq, j = 0; mmp2_mux_of_init() local
463 for (irq = 0; irq < nr_irqs; irq++) { mmp2_mux_of_init()
464 ret = irq_create_mapping(icu_data[i].domain, irq); mmp2_mux_of_init()
469 if (!irq) mmp2_mux_of_init()
473 if (!of_property_read_u32(node, "mrvl,clr-mfp-irq", mmp2_mux_of_init()
484 for (j = 0; j < irq; j++) mmp2_mux_of_init()
/linux-4.1.27/arch/xtensa/kernel/
H A Dirq.c2 * linux/arch/xtensa/kernel/irq.c
19 #include <linux/irq.h>
35 int irq = irq_find_mapping(NULL, hwirq); do_IRQ() local
55 generic_handle_irq(irq); do_IRQ()
87 int xtensa_irq_map(struct irq_domain *d, unsigned int irq, xtensa_irq_map() argument
94 irq_set_chip_and_handler_name(irq, irq_chip, xtensa_irq_map()
96 irq_set_status_flags(irq, IRQ_LEVEL); xtensa_irq_map()
98 irq_set_chip_and_handler_name(irq, irq_chip, xtensa_irq_map()
100 irq_clear_status_flags(irq, IRQ_LEVEL); xtensa_irq_map()
102 irq_set_chip_and_handler_name(irq, irq_chip, xtensa_irq_map()
104 irq_set_status_flags(irq, IRQ_LEVEL); xtensa_irq_map()
106 irq_set_chip_and_handler_name(irq, irq_chip, xtensa_irq_map()
108 irq_clear_status_flags(irq, IRQ_LEVEL); xtensa_irq_map()
111 irq_set_chip_and_handler_name(irq, irq_chip, xtensa_irq_map()
113 irq_set_status_flags(irq, IRQ_LEVEL); xtensa_irq_map()
131 unsigned xtensa_get_ext_irq_no(unsigned irq) xtensa_get_ext_irq_no() argument
135 ((1u << irq) - 1); xtensa_get_ext_irq_no()
/linux-4.1.27/arch/mips/vr41xx/common/
H A Dirq.c22 #include <linux/irq.h>
25 #include <asm/vr41xx/irq.h>
39 int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int)) cascade_irq() argument
43 if (irq >= NR_IRQS) cascade_irq()
46 if (irq_cascade[irq].get_irq != NULL) cascade_irq()
47 free_irq(irq, NULL); cascade_irq()
49 irq_cascade[irq].get_irq = get_irq; cascade_irq()
52 retval = setup_irq(irq, &cascade_irqaction); cascade_irq()
54 irq_cascade[irq].get_irq = NULL; cascade_irq()
62 static void irq_dispatch(unsigned int irq) irq_dispatch() argument
66 if (irq >= NR_IRQS) { irq_dispatch()
71 cascade = irq_cascade + irq; irq_dispatch()
73 struct irq_desc *desc = irq_to_desc(irq); irq_dispatch()
84 ret = cascade->get_irq(irq); irq_dispatch()
85 irq = ret; irq_dispatch()
89 irq_dispatch(irq); irq_dispatch()
93 do_IRQ(irq); irq_dispatch()
/linux-4.1.27/drivers/iommu/
H A Dirq_remapping.c7 #include <linux/irq.h>
27 static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec);
28 static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq,
55 unsigned int irq; do_setup_msi_irqs() local
60 irq = irq_alloc_hwirqs(nvec, dev_to_node(&dev->dev)); do_setup_msi_irqs()
61 if (irq == 0) do_setup_msi_irqs()
67 index = msi_alloc_remapped_irq(dev, irq, nvec_pow2); do_setup_msi_irqs()
73 ret = msi_setup_remapped_irq(dev, irq + sub_handle, do_setup_msi_irqs()
78 ret = setup_msi_irq(dev, msidesc, irq, sub_handle); do_setup_msi_irqs()
85 irq_free_hwirqs(irq, nvec); do_setup_msi_irqs()
91 msidesc->irq = 0; do_setup_msi_irqs()
100 unsigned int irq; do_setup_msix_irqs() local
107 irq = irq_alloc_hwirq(node); do_setup_msix_irqs()
108 if (irq == 0) do_setup_msix_irqs()
112 ret = index = msi_alloc_remapped_irq(dev, irq, nvec); do_setup_msix_irqs()
114 ret = msi_setup_remapped_irq(dev, irq, index, sub_handle); do_setup_msix_irqs()
119 ret = setup_msi_irq(dev, msidesc, irq, 0); do_setup_msix_irqs()
124 irq += 1; do_setup_msix_irqs()
130 irq_free_hwirq(irq); do_setup_msix_irqs()
257 int setup_ioapic_remapped_entry(int irq, setup_ioapic_remapped_entry() argument
265 return remap_ops->setup_ioapic_entry(irq, entry, destination, setup_ioapic_remapped_entry()
278 void free_remapped_irq(int irq) free_remapped_irq() argument
280 struct irq_cfg *cfg = irq_cfg(irq); free_remapped_irq()
283 remap_ops->free_irq(irq); free_remapped_irq()
287 unsigned int irq, unsigned int dest, compose_remapped_msi_msg()
290 struct irq_cfg *cfg = irq_cfg(irq); compose_remapped_msi_msg()
293 native_compose_msi_msg(pdev, irq, dest, msg, hpet_id); compose_remapped_msi_msg()
295 remap_ops->compose_msi_msg(pdev, irq, dest, msg, hpet_id); compose_remapped_msi_msg()
298 static int msi_alloc_remapped_irq(struct pci_dev *pdev, int irq, int nvec) msi_alloc_remapped_irq() argument
303 return remap_ops->msi_alloc_irq(pdev, irq, nvec); msi_alloc_remapped_irq()
306 static int msi_setup_remapped_irq(struct pci_dev *pdev, unsigned int irq, msi_setup_remapped_irq() argument
312 return remap_ops->msi_setup_irq(pdev, irq, index, sub_handle); msi_setup_remapped_irq()
315 int setup_hpet_msi_remapped(unsigned int irq, unsigned int id) setup_hpet_msi_remapped() argument
322 ret = remap_ops->alloc_hpet_msi(irq, id); setup_hpet_msi_remapped()
326 return default_setup_hpet_msi(irq, id); setup_hpet_msi_remapped()
343 eoi_ioapic_irq(data->irq, irqd_cfg(data)); ir_ack_apic_level()
359 bool setup_remapped_irq(int irq, struct irq_cfg *cfg, struct irq_chip *chip) setup_remapped_irq() argument
363 irq_set_status_flags(irq, IRQ_MOVE_PCNTXT); setup_remapped_irq()
286 compose_remapped_msi_msg(struct pci_dev *pdev, unsigned int irq, unsigned int dest, struct msi_msg *msg, u8 hpet_id) compose_remapped_msi_msg() argument
/linux-4.1.27/arch/sparc/kernel/
H A Dpower.c18 static irqreturn_t power_handler(int irq, void *dev_id) power_handler() argument
26 static int has_button_interrupt(unsigned int irq, struct device_node *dp) has_button_interrupt() argument
28 if (irq == 0xffffffff) has_button_interrupt()
39 unsigned int irq = op->archdata.irqs[0]; power_probe() local
46 if (has_button_interrupt(irq, op->dev.of_node)) { power_probe()
47 if (request_irq(irq, power_probe()
/linux-4.1.27/arch/mips/cobalt/
H A Dirq.c12 #include <linux/irq.h>
21 #include <irq.h>
26 int irq; plat_irq_dispatch() local
31 irq = i8259_irq(); plat_irq_dispatch()
32 if (irq < 0) plat_irq_dispatch()
35 do_IRQ(irq); plat_irq_dispatch()
H A DMakefile5 obj-y := buttons.o irq.o lcd.o led.o mtd.o reset.o rtc.o serial.o setup.o time.o
/linux-4.1.27/arch/parisc/include/asm/
H A Dirq.h2 * include/asm-parisc/irq.h
29 static __inline__ int irq_canonicalize(int irq) irq_canonicalize() argument
31 return (irq == 2) ? 9 : irq; irq_canonicalize()
44 extern unsigned long txn_affinity_addr(unsigned int irq, int cpu);
46 extern int cpu_claim_irq(unsigned int irq, struct irq_chip *, void *);
/linux-4.1.27/arch/blackfin/mach-bf537/
H A Dints-priority.c10 #include <linux/irq.h>
73 error_int_mask &= ~(1L << (d->irq - IRQ_PPI_ERROR)); bf537_generic_error_mask_irq()
81 error_int_mask |= 1L << (d->irq - IRQ_PPI_ERROR); bf537_generic_error_unmask_irq()
95 int irq = 0; bf537_demux_error_irq() local
99 irq = IRQ_MAC_ERROR; bf537_demux_error_irq()
103 irq = IRQ_SPORT0_ERROR; bf537_demux_error_irq()
105 irq = IRQ_SPORT1_ERROR; bf537_demux_error_irq()
107 irq = IRQ_PPI_ERROR; bf537_demux_error_irq()
109 irq = IRQ_CAN_ERROR; bf537_demux_error_irq()
111 irq = IRQ_SPI_ERROR; bf537_demux_error_irq()
113 irq = IRQ_UART0_ERROR; bf537_demux_error_irq()
115 irq = IRQ_UART1_ERROR; bf537_demux_error_irq()
117 if (irq) { bf537_demux_error_irq()
118 if (error_int_mask & (1L << (irq - IRQ_PPI_ERROR))) bf537_demux_error_irq()
119 bfin_handle_irq(irq); bf537_demux_error_irq()
122 switch (irq) { bf537_demux_error_irq()
153 irq); bf537_demux_error_irq()
166 mac_rx_int_mask &= ~(1L << (d->irq - IRQ_MAC_RX)); bf537_mac_rx_mask_irq()
174 mac_rx_int_mask |= 1L << (d->irq - IRQ_MAC_RX); bf537_mac_rx_unmask_irq()
197 int irq; init_mach_irq() local
205 for (irq = IRQ_PPI_ERROR; irq <= IRQ_UART1_ERROR; irq++) init_mach_irq()
206 irq_set_chip_and_handler(irq, &bf537_generic_error_irqchip, init_mach_irq()
/linux-4.1.27/arch/frv/mb93090-mb00/
H A Dpci-irq.c1 /* pci-irq.c: PCI IRQ routing on the FRV motherboard
5 * derived from: arch/i386/kernel/pci-irq.c: (c) 1999--2000 Martin Mares <mj@suse.cz>
13 #include <linux/irq.h>
51 dev->irq = pci_bus0_irq_routing[PCI_SLOT(dev->devfn)][pin - 1]; for_each_pci_dev()
52 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); for_each_pci_dev()
60 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); pcibios_enable_irq()
/linux-4.1.27/arch/arm/mach-shmobile/
H A Dsh73a0.h51 * sh73a0-intca-irq-pins
66 * sh73a0-intca-irq-pins
71 #define SH73A0_PINT0_IRQ(irq) ((irq) + 700)
72 #define SH73A0_PINT1_IRQ(irq) ((irq) + 732)
/linux-4.1.27/arch/arm/mach-imx/devices/
H A Dplatform-imx-dma.c12 resource_size_t iobase, int irq, int irq_err) imx_add_imx_dma()
20 .start = irq, imx_add_imx_dma()
21 .end = irq, imx_add_imx_dma()
35 resource_size_t iobase, int irq, struct sdma_platform_data *pdata) imx_add_imx_sdma()
43 .start = irq, imx_add_imx_sdma()
44 .end = irq, imx_add_imx_sdma()
11 imx_add_imx_dma(char *name, resource_size_t iobase, int irq, int irq_err) imx_add_imx_dma() argument
34 imx_add_imx_sdma(char *name, resource_size_t iobase, int irq, struct sdma_platform_data *pdata) imx_add_imx_sdma() argument
/linux-4.1.27/include/linux/i2c/
H A Di2c-hid.h22 * driver, or the flattened device tree) to setup the irq related to the gpio in
27 * irq = gpio_to_irq(intr_gpio);
28 * hkdk4412_i2c_devs5[0].irq = irq; // store the irq in i2c_board_info
29 * gpio_request(intr_gpio, "elan-irq");
/linux-4.1.27/arch/blackfin/mach-common/
H A Dints-priority.c17 #include <linux/irq.h>
34 * levels that the LINUX kernel sees (see the description in irq.h)
56 /* irq number for request_irq, available in mach-bf5xx/irq.h */
63 /* position of first irq in ivg_table for given ivg */
116 bfin_irq_flags &= ~(1 << d->irq); bfin_core_mask_irq()
123 bfin_irq_flags |= 1 << d->irq; bfin_core_unmask_irq()
139 void bfin_internal_mask_irq(unsigned int irq) bfin_internal_mask_irq() argument
143 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32; bfin_internal_mask_irq()
144 unsigned mask_bit = BFIN_SYSIRQ(irq) % 32; bfin_internal_mask_irq()
153 ~(1 << BFIN_SYSIRQ(irq))); bfin_internal_mask_irq()
160 bfin_internal_mask_irq(d->irq); bfin_internal_mask_irq_chip()
164 void bfin_internal_unmask_irq_affinity(unsigned int irq, bfin_internal_unmask_irq_affinity() argument
167 void bfin_internal_unmask_irq(unsigned int irq) bfin_internal_unmask_irq_affinity()
173 unsigned mask_bank = BFIN_SYSIRQ(irq) / 32; bfin_internal_unmask_irq_affinity()
174 unsigned mask_bit = BFIN_SYSIRQ(irq) % 32; bfin_internal_unmask_irq_affinity()
189 (1 << BFIN_SYSIRQ(irq))); bfin_internal_unmask_irq_affinity()
197 bfin_internal_unmask_irq_affinity(d->irq, d->affinity); bfin_internal_unmask_irq_chip()
203 bfin_internal_mask_irq(d->irq); bfin_internal_set_affinity()
204 bfin_internal_unmask_irq_affinity(d->irq, mask); bfin_internal_set_affinity()
211 bfin_internal_unmask_irq(d->irq); bfin_internal_unmask_irq_chip()
216 int bfin_internal_set_wake(unsigned int irq, unsigned int state) bfin_internal_set_wake() argument
220 bank = BFIN_SYSIRQ(irq) / 32; bfin_internal_set_wake()
221 bit = BFIN_SYSIRQ(irq) % 32; bfin_internal_set_wake()
223 switch (irq) { bfin_internal_set_wake()
271 return bfin_internal_set_wake(d->irq, state); bfin_internal_set_wake_chip()
274 inline int bfin_internal_set_wake(unsigned int irq, unsigned int state) bfin_internal_set_wake() argument
285 unsigned int sid = BFIN_SYSIRQ(d->irq); bfin_sec_preflow_handler()
295 unsigned int sid = BFIN_SYSIRQ(d->irq); bfin_sec_mask_ack_irq()
305 unsigned int sid = BFIN_SYSIRQ(d->irq); bfin_sec_unmask_irq()
373 unsigned int sid = BFIN_SYSIRQ(d->irq); bfin_sec_enable()
384 unsigned int sid = BFIN_SYSIRQ(d->irq); bfin_sec_disable()
409 void bfin_sec_raise_irq(unsigned int irq) bfin_sec_raise_irq() argument
412 unsigned int sid = BFIN_SYSIRQ(irq); bfin_sec_raise_irq()
490 static irqreturn_t bfin_fault_routine(int irq, void *data) bfin_fault_routine() argument
494 switch (irq) { bfin_fault_routine()
515 panic("Unknown fault %d", irq); bfin_fault_routine()
552 void bfin_handle_irq(unsigned irq) bfin_handle_irq() argument
556 ipipe_trace_irq_entry(irq); bfin_handle_irq()
557 __ipipe_handle_irq(irq, &regs); bfin_handle_irq()
558 ipipe_trace_irq_exit(irq); bfin_handle_irq()
560 generic_handle_irq(irq); bfin_handle_irq()
567 static void bfin_mac_status_ack_irq(unsigned int irq) bfin_mac_status_ack_irq() argument
569 switch (irq) { bfin_mac_status_ack_irq()
594 bfin_write_EMAC_SYSTAT(1L << (irq - IRQ_MAC_PHYINT)); bfin_mac_status_ack_irq()
601 unsigned int irq = d->irq; bfin_mac_status_mask_irq() local
603 mac_stat_int_mask &= ~(1L << (irq - IRQ_MAC_PHYINT)); bfin_mac_status_mask_irq()
605 switch (irq) { bfin_mac_status_mask_irq()
616 bfin_mac_status_ack_irq(irq); bfin_mac_status_mask_irq()
621 unsigned int irq = d->irq; bfin_mac_status_unmask_irq() local
624 switch (irq) { bfin_mac_status_unmask_irq()
635 mac_stat_int_mask |= 1L << (irq - IRQ_MAC_PHYINT); bfin_mac_status_unmask_irq()
661 int i, irq = 0; bfin_demux_mac_status_irq() local
666 irq = IRQ_MAC_PHYINT + i; bfin_demux_mac_status_irq()
670 if (irq) { bfin_demux_mac_status_irq()
671 if (mac_stat_int_mask & (1L << (irq - IRQ_MAC_PHYINT))) { bfin_demux_mac_status_irq()
672 bfin_handle_irq(irq); bfin_demux_mac_status_irq()
674 bfin_mac_status_ack_irq(irq); bfin_demux_mac_status_irq()
677 irq); bfin_demux_mac_status_irq()
688 static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle) bfin_set_irq_handler() argument
693 __irq_set_handler_locked(irq, handle); bfin_set_irq_handler()
705 set_gpio_data(irq_to_gpio(d->irq), 0); bfin_gpio_ack_irq()
710 unsigned int irq = d->irq; bfin_gpio_mask_ack_irq() local
711 u32 gpionr = irq_to_gpio(irq); bfin_gpio_mask_ack_irq()
721 set_gpio_maska(irq_to_gpio(d->irq), 0); bfin_gpio_mask_irq()
726 set_gpio_maska(irq_to_gpio(d->irq), 1); bfin_gpio_unmask_irq()
731 u32 gpionr = irq_to_gpio(d->irq); bfin_gpio_irq_startup()
743 u32 gpionr = irq_to_gpio(d->irq); bfin_gpio_irq_shutdown()
752 unsigned int irq = d->irq; bfin_gpio_irq_type() local
755 u32 gpionr = irq_to_gpio(irq); bfin_gpio_irq_type()
767 snprintf(buf, 16, "gpio-irq%d", irq); bfin_gpio_irq_type()
805 bfin_set_irq_handler(irq, handle_edge_irq); bfin_gpio_irq_type()
807 bfin_set_irq_handler(irq, handle_level_irq); bfin_gpio_irq_type()
812 static void bfin_demux_gpio_block(unsigned int irq) bfin_demux_gpio_block() argument
816 gpio = irq_to_gpio(irq); bfin_demux_gpio_block()
821 bfin_handle_irq(irq); bfin_demux_gpio_block()
822 irq++; bfin_demux_gpio_block()
830 unsigned int irq; bfin_demux_gpio_irq() local
836 irq = IRQ_PG0; bfin_demux_gpio_irq()
839 irq = IRQ_PH0; bfin_demux_gpio_irq()
843 irq = IRQ_PF0; bfin_demux_gpio_irq()
847 irq = IRQ_PF0; bfin_demux_gpio_irq()
851 irq = IRQ_PF0; bfin_demux_gpio_irq()
854 irq = IRQ_PG0; bfin_demux_gpio_irq()
857 irq = IRQ_PH0; bfin_demux_gpio_irq()
861 irq = IRQ_PF0; bfin_demux_gpio_irq()
864 irq = IRQ_PF16; bfin_demux_gpio_irq()
867 irq = IRQ_PF32; bfin_demux_gpio_irq()
875 bfin_demux_gpio_block(irq); bfin_demux_gpio_irq()
882 return bfin_gpio_pm_wakeup_ctrl(irq_to_gpio(d->irq), state); bfin_gpio_set_wake()
972 int irq; init_arch_irq() local
992 for (irq = 0; irq <= SYS_IRQS; irq++) { init_arch_irq()
993 if (irq <= IRQ_CORETMR) init_arch_irq()
994 irq_set_chip(irq, &bfin_core_irqchip); init_arch_irq()
996 irq_set_chip(irq, &bfin_internal_irqchip); init_arch_irq()
998 switch (irq) { init_arch_irq()
1016 irq_set_chained_handler(irq, bfin_demux_gpio_irq); init_arch_irq()
1021 irq_set_chained_handler(irq, init_arch_irq()
1028 irq_set_handler(irq, handle_percpu_irq); init_arch_irq()
1035 irq_set_handler(irq, handle_percpu_irq); init_arch_irq()
1037 irq_set_handler(irq, handle_simple_irq); init_arch_irq()
1044 irq_set_handler(irq, handle_simple_irq); init_arch_irq()
1050 irq_set_handler(irq, handle_level_irq); init_arch_irq()
1052 irq_set_handler(irq, handle_simple_irq); init_arch_irq()
1061 for (irq = IRQ_MAC_PHYINT; irq <= IRQ_MAC_STMDONE; irq++) init_arch_irq()
1062 irq_set_chip_and_handler(irq, &bfin_mac_status_irqchip, init_arch_irq()
1067 for (irq = GPIO_IRQ_BASE; init_arch_irq()
1068 irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++) init_arch_irq()
1069 irq_set_chip_and_handler(irq, &bfin_gpio_irqchip, init_arch_irq()
1167 int irq; init_arch_irq() local
1174 for (irq = 0; irq <= SYS_IRQS; irq++) { init_arch_irq()
1175 if (irq <= IRQ_CORETMR) { init_arch_irq()
1176 irq_set_chip_and_handler(irq, &bfin_core_irqchip, init_arch_irq()
1179 if (irq == IRQ_CORETMR) init_arch_irq()
1180 irq_set_handler(irq, handle_percpu_irq); init_arch_irq()
1182 } else if (irq >= BFIN_IRQ(34) && irq <= BFIN_IRQ(37)) { init_arch_irq()
1183 irq_set_chip_and_handler(irq, &bfin_sec_irqchip, init_arch_irq()
1186 irq_set_chip(irq, &bfin_sec_irqchip); init_arch_irq()
1187 irq_set_handler(irq, handle_fasteoi_irq); init_arch_irq()
1188 __irq_set_preflow_handler(irq, bfin_sec_preflow_handler); init_arch_irq()
1251 int irq = vec_to_irq(vec); do_irq() local
1252 if (irq == -1) do_irq()
1254 asm_do_IRQ(irq, fp); do_irq()
1259 int __ipipe_get_irq_priority(unsigned irq) __ipipe_get_irq_priority() argument
1263 if (irq <= IRQ_CORETMR) __ipipe_get_irq_priority()
1264 return irq; __ipipe_get_irq_priority()
1267 if (irq >= BFIN_IRQ(0)) __ipipe_get_irq_priority()
1272 if (ivg->irqno == irq) { __ipipe_get_irq_priority()
1293 int irq, s = 0; __ipipe_grab_irq() local
1295 irq = vec_to_irq(vec); __ipipe_grab_irq()
1296 if (irq == -1) __ipipe_grab_irq()
1299 if (irq == IRQ_SYSTMR) { __ipipe_grab_irq()
1332 ipipe_trace_irq_entry(irq); __ipipe_grab_irq()
1333 __ipipe_handle_irq(irq, regs); __ipipe_grab_irq()
1334 ipipe_trace_irq_exit(irq); __ipipe_grab_irq()
/linux-4.1.27/arch/mips/bcm63xx/
H A Dirq.c14 #include <linux/irq.h>
38 static inline u32 get_ext_irq_perf_reg(int irq) get_ext_irq_perf_reg() argument
40 if (irq < 4) get_ext_irq_perf_reg()
116 unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
117 unsigned reg = (irq / 32) ^ (width/32 - 1); \
118 unsigned bit = irq & 0x1f; \
138 unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
139 unsigned reg = (irq / 32) ^ (width/32 - 1); \
140 unsigned bit = irq & 0x1f; \
197 * internal IRQs operations: only mask/unmask on PERF irq mask
212 * irq control register.
216 unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; bcm63xx_external_irq_mask() local
220 regaddr = get_ext_irq_perf_reg(irq); bcm63xx_external_irq_mask()
225 reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4); bcm63xx_external_irq_mask()
227 reg &= ~EXTIRQ_CFG_MASK(irq % 4); bcm63xx_external_irq_mask()
233 internal_irq_mask(irq_get_irq_data(irq + ext_irq_start)); bcm63xx_external_irq_mask()
238 unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; bcm63xx_external_irq_unmask() local
242 regaddr = get_ext_irq_perf_reg(irq); bcm63xx_external_irq_unmask()
247 reg |= EXTIRQ_CFG_MASK_6348(irq % 4); bcm63xx_external_irq_unmask()
249 reg |= EXTIRQ_CFG_MASK(irq % 4); bcm63xx_external_irq_unmask()
255 internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start), bcm63xx_external_irq_unmask()
261 unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; bcm63xx_external_irq_clear() local
265 regaddr = get_ext_irq_perf_reg(irq); bcm63xx_external_irq_clear()
270 reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4); bcm63xx_external_irq_clear()
272 reg |= EXTIRQ_CFG_CLEAR(irq % 4); bcm63xx_external_irq_clear()
281 unsigned int irq = d->irq - IRQ_EXTERNAL_BASE; bcm63xx_external_irq_set_type() local
318 regaddr = get_ext_irq_perf_reg(irq); bcm63xx_external_irq_set_type()
321 irq %= 4; bcm63xx_external_irq_set_type()
326 reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq); bcm63xx_external_irq_set_type()
328 reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq); bcm63xx_external_irq_set_type()
330 reg |= EXTIRQ_CFG_SENSE_6348(irq); bcm63xx_external_irq_set_type()
332 reg &= ~EXTIRQ_CFG_SENSE_6348(irq); bcm63xx_external_irq_set_type()
334 reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq); bcm63xx_external_irq_set_type()
336 reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq); bcm63xx_external_irq_set_type()
347 reg |= EXTIRQ_CFG_LEVELSENSE(irq); bcm63xx_external_irq_set_type()
349 reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); bcm63xx_external_irq_set_type()
351 reg |= EXTIRQ_CFG_SENSE(irq); bcm63xx_external_irq_set_type()
353 reg &= ~EXTIRQ_CFG_SENSE(irq); bcm63xx_external_irq_set_type()
355 reg |= EXTIRQ_CFG_BOTHEDGE(irq); bcm63xx_external_irq_set_type()
357 reg &= ~EXTIRQ_CFG_BOTHEDGE(irq); bcm63xx_external_irq_set_type()
368 __irq_set_handler_locked(d->irq, handle_level_irq); bcm63xx_external_irq_set_type()
370 __irq_set_handler_locked(d->irq, handle_edge_irq); bcm63xx_external_irq_set_type()
/linux-4.1.27/arch/blackfin/include/asm/
H A Dirq.h20 /* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h> */
21 #include <mach/irq.h>
39 #include <asm-generic/irq.h>
/linux-4.1.27/arch/m32r/platforms/m32104ut/
H A Dsetup.c11 #include <linux/irq.h>
23 static void disable_m32104ut_irq(unsigned int irq) disable_m32104ut_irq() argument
27 port = irq2port(irq); disable_m32104ut_irq()
28 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7; disable_m32104ut_irq()
32 static void enable_m32104ut_irq(unsigned int irq) enable_m32104ut_irq() argument
36 port = irq2port(irq); enable_m32104ut_irq()
37 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6; enable_m32104ut_irq()
43 disable_m32104ut_irq(data->irq); mask_m32104ut_irq()
48 enable_m32104ut_irq(data->irq); unmask_m32104ut_irq()
53 unsigned int irq = data->irq; shutdown_m32104ut_irq() local
54 unsigned long port = irq2port(irq); shutdown_m32104ut_irq()
/linux-4.1.27/drivers/misc/cxl/
H A DMakefile1 cxl-y += main.o file.o irq.o fault.o native.o context.o sysfs.o debugfs.o pci.o trace.o
/linux-4.1.27/arch/score/kernel/
H A DMakefile7 obj-y += entry.o irq.o process.o ptrace.o \
/linux-4.1.27/arch/openrisc/kernel/
H A DMakefile8 traps.o time.o irq.o entry.o ptrace.o signal.o \
/linux-4.1.27/arch/m68k/sun3/
H A Dsun3ints.c42 void sun3_enable_irq(unsigned int irq) sun3_enable_irq() argument
44 *sun3_intreg |= (1 << irq); sun3_enable_irq()
47 void sun3_disable_irq(unsigned int irq) sun3_disable_irq() argument
49 *sun3_intreg &= ~(1 << irq); sun3_disable_irq()
52 static irqreturn_t sun3_int7(int irq, void *dev_id) sun3_int7() argument
56 cnt = kstat_irqs_cpu(irq, 0); sun3_int7()
62 static irqreturn_t sun3_int5(int irq, void *dev_id) sun3_int5() argument
76 cnt = kstat_irqs_cpu(irq, 0); sun3_int5()
82 static irqreturn_t sun3_vec255(int irq, void *dev_id) sun3_vec255() argument
/linux-4.1.27/arch/arm/include/asm/mach/
H A Dirq.h2 * arch/arm/include/asm/mach/irq.h
13 #include <linux/irq.h>
26 #define do_bad_IRQ(irq,desc) \
29 handle_bad_irq(irq, desc); \
/linux-4.1.27/arch/arm/mach-iop32x/
H A DMakefile5 obj-y := irq.o
/linux-4.1.27/arch/sh/kernel/
H A Dirq.c2 * linux/arch/sh/kernel/irq.c
9 #include <linux/irq.h>
26 * 'what should we do if we get a hw irq event on an illegal vector'.
30 void ack_bad_irq(unsigned int irq) ack_bad_irq() argument
33 printk("unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
70 static inline void handle_one_irq(unsigned int irq) handle_one_irq() argument
81 * current stack (which is the irq stack already after all) handle_one_irq()
102 /* swith to the irq stack */ handle_one_irq()
107 : "r" (irq), "r" (generic_handle_irq), "r" (isp) handle_one_irq()
112 generic_handle_irq(irq); handle_one_irq()
178 static inline void handle_one_irq(unsigned int irq) handle_one_irq() argument
180 generic_handle_irq(irq); handle_one_irq()
184 asmlinkage __irq_entry int do_IRQ(unsigned int irq, struct pt_regs *regs) do_IRQ() argument
190 irq = irq_demux(irq_lookup(irq)); do_IRQ()
192 if (irq != NO_IRQ_IGNORE) { do_IRQ()
193 handle_one_irq(irq); do_IRQ()
194 irq_finish(irq); do_IRQ()
225 unsigned int irq, cpu = smp_processor_id(); migrate_irqs() local
227 for_each_active_irq(irq) { for_each_active_irq()
228 struct irq_data *data = irq_get_irq_data(irq); for_each_active_irq()
235 irq, cpu); for_each_active_irq()
239 irq_set_affinity(irq, data->affinity); for_each_active_irq()
/linux-4.1.27/include/xen/
H A Devents.h45 void unbind_from_irqhandler(unsigned int irq, void *dev_id);
50 int xen_set_irq_priority(unsigned irq, unsigned priority);
60 void rebind_evtchn_irq(int evtchn, int irq);
68 void notify_remote_via_irq(int irq);
72 /* Clear an irq's pending state, in preparation for polling on it */
73 void xen_clear_irq_pending(int irq);
74 void xen_set_irq_pending(int irq);
75 bool xen_test_irq_pending(int irq);
77 /* Poll waiting for an irq to become pending. In the usual case, the
78 irq will be disabled so it won't deliver an interrupt. */
79 void xen_poll_irq(int irq);
81 /* Poll waiting for an irq to become pending with a timeout. In the usual case,
82 * the irq will be disabled so it won't deliver an interrupt. */
83 void xen_poll_irq_timeout(int irq, u64 timeout);
88 unsigned int evtchn_from_irq(unsigned irq);
100 /* Bind a pirq for a physical interrupt to an irq. */
107 /* Bind an PSI pirq to an irq. */
113 int xen_destroy_irq(int irq);
115 /* Return irq from pirq */
118 /* Return the pirq allocated to the irq. */
119 int xen_pirq_from_irq(unsigned irq);
121 /* Return the irq allocated to the gsi */
125 int xen_test_irq_shared(int irq);
/linux-4.1.27/drivers/clk/at91/
H A Dclk-system.c17 #include <linux/irq.h>
33 unsigned int irq; member in struct:clk_system
42 static irqreturn_t clk_system_irq_handler(int irq, void *dev_id) clk_system_irq_handler() argument
47 disable_irq_nosync(sys->irq); clk_system_irq_handler()
64 if (sys->irq) { clk_system_prepare()
65 enable_irq(sys->irq); clk_system_prepare()
104 const char *parent_name, u8 id, int irq) at91_clk_register_system()
127 sys->irq = irq; at91_clk_register_system()
128 if (irq) { at91_clk_register_system()
130 irq_set_status_flags(sys->irq, IRQ_NOAUTOEN); at91_clk_register_system()
131 ret = request_irq(sys->irq, clk_system_irq_handler, at91_clk_register_system()
148 int irq = 0; of_at91_clk_sys_setup() local
167 irq = irq_of_parse_and_map(sysclknp, 0); for_each_child_of_node()
171 clk = at91_clk_register_system(pmc, name, parent_name, id, irq); for_each_child_of_node()
103 at91_clk_register_system(struct at91_pmc *pmc, const char *name, const char *parent_name, u8 id, int irq) at91_clk_register_system() argument
/linux-4.1.27/drivers/iio/trigger/
H A Diio-trig-interrupt.c22 unsigned int irq; member in struct:iio_interrupt_trigger_info
25 static irqreturn_t iio_interrupt_trigger_poll(int irq, void *private) iio_interrupt_trigger_poll() argument
41 int irq, ret = 0; iio_interrupt_trigger_probe() local
50 irq = irq_res->start; iio_interrupt_trigger_probe()
52 trig = iio_trigger_alloc("irqtrig%d", irq); iio_interrupt_trigger_probe()
64 trig_info->irq = irq; iio_interrupt_trigger_probe()
66 ret = request_irq(irq, iio_interrupt_trigger_poll, iio_interrupt_trigger_probe()
70 "request IRQ-%d failed", irq); iio_interrupt_trigger_probe()
83 free_irq(irq, trig); iio_interrupt_trigger_probe()
100 free_irq(trig_info->irq, trig); iio_interrupt_trigger_remove()
/linux-4.1.27/drivers/gpu/drm/radeon/
H A Dradeon_irq_kms.c40 * radeon_driver_irq_handler_kms - irq handler for KMS
42 * @int irq, void *arg: args
44 * This is the irq handler for the radeon KMS driver (all asics).
46 * irq handler callback.
48 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg) radeon_driver_irq_handler_kms() argument
69 * The work gets scheduled from the irq handler if there
107 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
120 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_driver_irq_preinstall_kms()
123 atomic_set(&rdev->irq.ring_int[i], 0); radeon_driver_irq_preinstall_kms()
124 rdev->irq.dpm_thermal = false; radeon_driver_irq_preinstall_kms()
126 rdev->irq.hpd[i] = false; radeon_driver_irq_preinstall_kms()
128 rdev->irq.crtc_vblank_int[i] = false; radeon_driver_irq_preinstall_kms()
129 atomic_set(&rdev->irq.pflip[i], 0); radeon_driver_irq_preinstall_kms()
130 rdev->irq.afmt[i] = false; radeon_driver_irq_preinstall_kms()
133 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_driver_irq_preinstall_kms()
139 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
153 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
168 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_driver_irq_uninstall_kms()
171 atomic_set(&rdev->irq.ring_int[i], 0); radeon_driver_irq_uninstall_kms()
172 rdev->irq.dpm_thermal = false; radeon_driver_irq_uninstall_kms()
174 rdev->irq.hpd[i] = false; radeon_driver_irq_uninstall_kms()
176 rdev->irq.crtc_vblank_int[i] = false; radeon_driver_irq_uninstall_kms()
177 atomic_set(&rdev->irq.pflip[i], 0); radeon_driver_irq_uninstall_kms()
178 rdev->irq.afmt[i] = false; radeon_driver_irq_uninstall_kms()
181 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_driver_irq_uninstall_kms()
271 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
278 spin_lock_init(&rdev->irq.lock); radeon_irq_kms_init()
298 rdev->irq.installed = true; radeon_irq_kms_init()
299 r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq); radeon_irq_kms_init()
301 rdev->irq.installed = false; radeon_irq_kms_init()
306 DRM_INFO("radeon: irq initialized.\n"); radeon_irq_kms_init()
315 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
320 if (rdev->irq.installed) { radeon_irq_kms_fini()
322 rdev->irq.installed = false; radeon_irq_kms_fini()
346 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) { radeon_irq_kms_sw_irq_get()
347 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_irq_kms_sw_irq_get()
349 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_irq_kms_sw_irq_get()
365 return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1; radeon_irq_kms_sw_irq_get_delayed()
385 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) { radeon_irq_kms_sw_irq_put()
386 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_irq_kms_sw_irq_put()
388 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_irq_kms_sw_irq_put()
411 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) { radeon_irq_kms_pflip_irq_get()
412 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_irq_kms_pflip_irq_get()
414 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_irq_kms_pflip_irq_get()
437 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) { radeon_irq_kms_pflip_irq_put()
438 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_irq_kms_pflip_irq_put()
440 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_irq_kms_pflip_irq_put()
459 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_irq_kms_enable_afmt()
460 rdev->irq.afmt[block] = true; radeon_irq_kms_enable_afmt()
462 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_irq_kms_enable_afmt()
481 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_irq_kms_disable_afmt()
482 rdev->irq.afmt[block] = false; radeon_irq_kms_disable_afmt()
484 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_irq_kms_disable_afmt()
503 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_irq_kms_enable_hpd()
505 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i)); radeon_irq_kms_enable_hpd()
507 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_irq_kms_enable_hpd()
526 spin_lock_irqsave(&rdev->irq.lock, irqflags); radeon_irq_kms_disable_hpd()
528 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i)); radeon_irq_kms_disable_hpd()
530 spin_unlock_irqrestore(&rdev->irq.lock, irqflags); radeon_irq_kms_disable_hpd()
/linux-4.1.27/arch/mips/pnx833x/common/
H A Dinterrupts.c23 #include <linux/irq.h>
29 #include <irq.h>
30 #include <irq-mapping.h>
106 unsigned int irq = PNX833X_REGFIELD(PIC_INT_SRC, INT_SRC); pic_dispatch() local
108 if ((irq >= 1) && (irq < (PNX833X_PIC_NUM_IRQ))) { pic_dispatch()
110 PNX833X_PIC_INT_PRIORITY = irq_prio[irq]; pic_dispatch()
112 if (irq == PNX833X_PIC_GPIO_INT) { pic_dispatch()
121 do_IRQ(irq + PNX833X_PIC_IRQ_BASE); pic_dispatch()
126 printk(KERN_ERR "plat_irq_dispatch: unexpected irq %u\n", irq); pic_dispatch()
142 static inline void pnx833x_hard_enable_pic_irq(unsigned int irq) pnx833x_hard_enable_pic_irq() argument
147 PNX833X_PIC_INT_REG(irq) = irq_prio[irq]; pnx833x_hard_enable_pic_irq()
150 static inline void pnx833x_hard_disable_pic_irq(unsigned int irq) pnx833x_hard_disable_pic_irq() argument
153 PNX833X_PIC_INT_REG(irq) = 0; pnx833x_hard_disable_pic_irq()
158 static unsigned int pnx833x_startup_pic_irq(unsigned int irq) pnx833x_startup_pic_irq() argument
161 unsigned int pic_irq = irq - PNX833X_PIC_IRQ_BASE; pnx833x_startup_pic_irq()
172 unsigned int pic_irq = d->irq - PNX833X_PIC_IRQ_BASE; pnx833x_enable_pic_irq()
182 unsigned int pic_irq = d->irq - PNX833X_PIC_IRQ_BASE; pnx833x_disable_pic_irq()
193 int pin = d->irq - PNX833X_GPIO_IRQ_BASE; pnx833x_enable_gpio_irq()
202 int pin = d->irq - PNX833X_GPIO_IRQ_BASE; pnx833x_disable_gpio_irq()
211 int pin = d->irq - PNX833X_GPIO_IRQ_BASE; pnx833x_set_type_gpio_irq()
255 unsigned int irq; arch_init_irq() local
261 for (irq = PNX833X_PIC_IRQ_BASE; irq < (PNX833X_PIC_IRQ_BASE + PNX833X_PIC_NUM_IRQ); irq++) { arch_init_irq()
262 pnx833x_hard_disable_pic_irq(irq); arch_init_irq()
263 irq_set_chip_and_handler(irq, &pnx833x_pic_irq_type, arch_init_irq()
267 for (irq = PNX833X_GPIO_IRQ_BASE; irq < (PNX833X_GPIO_IRQ_BASE + PNX833X_GPIO_NUM_IRQ); irq++) arch_init_irq()
268 irq_set_chip_and_handler(irq, &pnx833x_gpio_irq_type, arch_init_irq()
/linux-4.1.27/arch/mips/sgi-ip27/
H A Dip27-irq-pci.c2 * ip27-irq.c: Highlevel interrupt handling for IP27 architecture.
11 #include <linux/irq.h>
59 * from the irq value
64 static inline int alloc_level(int cpu, int irq) alloc_level() argument
75 si->level_to_irq[level] = irq; alloc_level()
80 static inline int find_level(cpuid_t *cpunum, int irq) find_level() argument
88 if (si->level_to_irq[i] == irq) { for_each_online_cpu()
95 panic("Could not identify cpu/level for irq %d", irq);
143 pin = SLOT_FROM_PCI_IRQ(d->irq); startup_bridge_irq()
144 bc = IRQ_TO_BRIDGE(d->irq); startup_bridge_irq()
147 pr_debug("bridge_startup(): irq= 0x%x pin=%d\n", d->irq, pin); startup_bridge_irq()
149 * "map" irq to a swlevel greater than 6 since the first 6 bits startup_bridge_irq()
152 swlevel = find_level(&cpu, d->irq); startup_bridge_irq()
185 struct bridge_controller *bc = IRQ_TO_BRIDGE(d->irq); shutdown_bridge_irq()
190 pr_debug("bridge_shutdown: irq 0x%x\n", d->irq); shutdown_bridge_irq()
191 pin = SLOT_FROM_PCI_IRQ(d->irq); shutdown_bridge_irq()
194 * map irq to a swlevel greater than 6 since the first 6 bits shutdown_bridge_irq()
197 swlevel = find_level(&cpu, d->irq); shutdown_bridge_irq()
209 swlevel = find_level(&cpu, d->irq); /* Criminal offence */ enable_bridge_irq()
218 swlevel = find_level(&cpu, d->irq); /* Criminal offence */ disable_bridge_irq()
230 void register_bridge_irq(unsigned int irq) register_bridge_irq() argument
232 irq_set_chip_and_handler(irq, &bridge_irq_type, handle_level_irq); register_bridge_irq()
237 int irq = allocate_irqno(); request_bridge_irq() local
241 if (irq < 0) request_bridge_irq()
242 return irq; request_bridge_irq()
245 * "map" irq to a swlevel greater than 6 since the first 6 bits request_bridge_irq()
249 swlevel = alloc_level(cpu, irq); request_bridge_irq()
251 free_irqno(irq); request_bridge_irq()
262 register_bridge_irq(irq); request_bridge_irq()
264 return irq; request_bridge_irq()
H A DMakefile5 obj-y := ip27-berr.o ip27-irq.o ip27-init.o ip27-klconfig.o ip27-klnuma.o \
10 obj-$(CONFIG_PCI) += ip27-irq-pci.o
/linux-4.1.27/arch/mips/sni/
H A Drm200.c16 #include <linux/irq.h>
30 .irq = _irq, \
149 * This contains the irq mask for both 8259A irq controllers,
160 unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE; sni_rm200_disable_8259A_irq() local
163 mask = 1 << irq; sni_rm200_disable_8259A_irq()
166 if (irq & 8) sni_rm200_disable_8259A_irq()
175 unsigned int mask, irq = d->irq - RM200_I8259A_IRQ_BASE; sni_rm200_enable_8259A_irq() local
178 mask = ~(1 << irq); sni_rm200_enable_8259A_irq()
181 if (irq & 8) sni_rm200_enable_8259A_irq()
188 static inline int sni_rm200_i8259A_irq_real(unsigned int irq) sni_rm200_i8259A_irq_real() argument
191 int irqmask = 1 << irq; sni_rm200_i8259A_irq_real()
193 if (irq < 8) { sni_rm200_i8259A_irq_real()
213 unsigned int irqmask, irq = d->irq - RM200_I8259A_IRQ_BASE; sni_rm200_mask_and_ack_8259A() local
216 irqmask = 1 << irq; sni_rm200_mask_and_ack_8259A()
238 if (irq & 8) { sni_rm200_mask_and_ack_8259A()
241 writeb(0x60+(irq & 7), rm200_pic_slave + PIC_CMD); sni_rm200_mask_and_ack_8259A()
246 writeb(0x60+irq, rm200_pic_master + PIC_CMD); sni_rm200_mask_and_ack_8259A()
255 if (sni_rm200_i8259A_irq_real(irq)) sni_rm200_mask_and_ack_8259A()
270 "spurious RM200 8259A interrupt: IRQ%d.\n", irq); sni_rm200_mask_and_ack_8259A()
297 int irq; sni_rm200_i8259_irq() local
303 irq = readb(rm200_pic_master + PIC_CMD) & 7; sni_rm200_i8259_irq()
304 if (irq == PIC_CASCADE_IR) { sni_rm200_i8259_irq()
310 irq = (readb(rm200_pic_slave + PIC_CMD) & 7) + 8; sni_rm200_i8259_irq()
313 if (unlikely(irq == 7)) { sni_rm200_i8259_irq()
323 irq = -1; sni_rm200_i8259_irq()
328 return likely(irq >= 0) ? irq + RM200_I8259A_IRQ_BASE : irq; sni_rm200_i8259_irq()
379 /* ISA irq handler */ sni_rm200_i8259A_irq_handler()
382 int irq; sni_rm200_i8259A_irq_handler() local
384 irq = sni_rm200_i8259_irq(); sni_rm200_i8259A_irq_handler()
385 if (unlikely(irq < 0)) sni_rm200_i8259A_irq_handler()
388 do_IRQ(irq); sni_rm200_i8259A_irq_handler()
432 unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START); enable_rm200_irq()
439 unsigned int mask = 1 << (d->irq - SNI_RM200_INT_START); disable_rm200_irq()
455 int irq; sni_rm200_hwint() local
463 irq = ffs(stat & mask & 0x1f); sni_rm200_hwint()
465 if (likely(irq > 0)) sni_rm200_hwint()
466 do_IRQ(irq + SNI_RM200_INT_START - 1); sni_rm200_hwint()
/linux-4.1.27/arch/arm/plat-orion/
H A Dcommon.c61 unsigned int irq) fill_resources()
69 if (irq != NO_IRQ) { fill_resources()
72 resources[1].start = irq; fill_resources()
73 resources[1].end = irq; fill_resources()
92 unsigned int irq, uart_complete()
97 data->irq = irq; uart_complete()
101 fill_resources(orion_uart, resources, mapbase, 0xff, irq); uart_complete()
126 unsigned int irq, orion_uart0_init()
130 membase, mapbase, irq, clk); orion_uart0_init()
154 unsigned int irq, orion_uart1_init()
158 membase, mapbase, irq, clk); orion_uart1_init()
182 unsigned int irq, orion_uart2_init()
186 membase, mapbase, irq, clk); orion_uart2_init()
210 unsigned int irq, orion_uart3_init()
214 membase, mapbase, irq, clk); orion_uart3_init()
223 unsigned long irq) orion_rtc_init()
228 orion_rtc_resource[1].start = irq; orion_rtc_init()
229 orion_rtc_resource[1].end = irq; orion_rtc_init()
240 struct resource *orion_ge_resource, unsigned long irq, ge_complete()
246 orion_ge_resource->start = irq; ge_complete()
247 orion_ge_resource->end = irq; ge_complete()
280 .name = "ge00 mvmdio err irq",
291 .name = "ge00 irq",
308 unsigned long irq, orion_ge00_init()
318 orion_ge00_resources, irq, &orion_ge00_shared, orion_ge00_init()
344 .name = "ge01 irq",
361 unsigned long irq, orion_ge01_init()
369 orion_ge01_resources, irq, &orion_ge01_shared, orion_ge01_init()
395 .name = "ge10 irq",
412 unsigned long irq, orion_ge10_init()
418 orion_ge10_resources, irq, &orion_ge10_shared, orion_ge10_init()
444 .name = "ge11 irq",
461 unsigned long irq, orion_ge11_init()
467 orion_ge11_resources, irq, &orion_ge11_shared, orion_ge11_init()
490 void __init orion_ge00_switch_init(struct dsa_platform_data *d, int irq) orion_ge00_switch_init() argument
494 if (irq != NO_IRQ) { orion_ge00_switch_init()
495 orion_switch_resources[0].start = irq; orion_ge00_switch_init()
496 orion_switch_resources[0].end = irq; orion_ge00_switch_init()
542 unsigned long irq, orion_i2c_init()
547 SZ_32 - 1, irq); orion_i2c_init()
552 unsigned long irq, orion_i2c_1_init()
557 SZ_32 - 1, irq); orion_i2c_1_init()
631 .name = "irq channel 0",
634 .name = "irq channel 1",
692 .name = "irq channel 0",
695 .name = "irq channel 1",
765 unsigned long irq, orion_ehci_init()
770 irq); orion_ehci_init()
791 unsigned long irq) orion_ehci_1_init()
794 mapbase, SZ_4K - 1, irq); orion_ehci_1_init()
815 unsigned long irq) orion_ehci_2_init()
818 mapbase, SZ_4K - 1, irq); orion_ehci_2_init()
830 .name = "sata irq",
844 unsigned long irq) orion_sata_init()
848 mapbase, 0x5000 - 1, irq); orion_sata_init()
875 unsigned long irq) orion_crypto_init()
878 mapbase, 0xffff, irq); orion_crypto_init()
57 fill_resources(struct platform_device *device, struct resource *resources, resource_size_t mapbase, resource_size_t size, unsigned int irq) fill_resources() argument
86 uart_complete( struct platform_device *orion_uart, struct plat_serial8250_port *data, struct resource *resources, void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) uart_complete() argument
124 orion_uart0_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) orion_uart0_init() argument
152 orion_uart1_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) orion_uart1_init() argument
180 orion_uart2_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) orion_uart2_init() argument
208 orion_uart3_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, struct clk *clk) orion_uart3_init() argument
222 orion_rtc_init(unsigned long mapbase, unsigned long irq) orion_rtc_init() argument
238 ge_complete( struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, struct resource *orion_ge_resource, unsigned long irq, struct platform_device *orion_ge_shared, struct platform_device *orion_ge_mvmdio, struct mv643xx_eth_platform_data *eth_data, struct platform_device *orion_ge) ge_complete() argument
306 orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq, unsigned long irq_err, unsigned int tx_csum_limit) orion_ge00_init() argument
359 orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq, unsigned long irq_err, unsigned int tx_csum_limit) orion_ge01_init() argument
410 orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq, unsigned long irq_err) orion_ge10_init() argument
459 orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, unsigned long mapbase, unsigned long irq, unsigned long irq_err) orion_ge11_init() argument
541 orion_i2c_init(unsigned long mapbase, unsigned long irq, unsigned long freq_m) orion_i2c_init() argument
551 orion_i2c_1_init(unsigned long mapbase, unsigned long irq, unsigned long freq_m) orion_i2c_1_init() argument
764 orion_ehci_init(unsigned long mapbase, unsigned long irq, enum orion_ehci_phy_ver phy_version) orion_ehci_init() argument
790 orion_ehci_1_init(unsigned long mapbase, unsigned long irq) orion_ehci_1_init() argument
814 orion_ehci_2_init(unsigned long mapbase, unsigned long irq) orion_ehci_2_init() argument
842 orion_sata_init(struct mv_sata_platform_data *sata_data, unsigned long mapbase, unsigned long irq) orion_sata_init() argument
872 orion_crypto_init(unsigned long mapbase, unsigned long srambase, unsigned long sram_size, unsigned long irq) orion_crypto_init() argument
/linux-4.1.27/drivers/isdn/pcbit/
H A Dmodule.c26 static int irq[MAX_PCBIT_CARDS]; variable
29 module_param_array(irq, int, NULL, 0);
44 if (mem[0] || irq[0]) pcbit_init()
46 for (board = 0; board < MAX_PCBIT_CARDS && mem[board] && irq[board]; board++) pcbit_init()
50 if (!irq[board]) pcbit_init()
51 irq[board] = 5; pcbit_init()
53 if (pcbit_init_dev(board, mem[board], irq[board]) == 0) pcbit_init()
113 irq[i] = ints[j]; pcbit_setup()
/linux-4.1.27/drivers/staging/iio/meter/
H A Dade7758_trigger.c21 static irqreturn_t ade7758_data_rdy_trig_poll(int irq, void *private) ade7758_data_rdy_trig_poll() argument
23 disable_irq_nosync(irq); ade7758_data_rdy_trig_poll()
42 * ade7758_trig_try_reen() try renabling irq for data rdy trigger
50 enable_irq(st->us->irq); ade7758_trig_try_reen()
51 /* irq reenabled so success! */ ade7758_trig_try_reen()
74 ret = request_irq(st->us->irq, ade7758_probe_trigger()
95 free_irq(st->us->irq, st->trig); ade7758_probe_trigger()
107 free_irq(st->us->irq, st->trig); ade7758_remove_trigger()
/linux-4.1.27/arch/um/include/shared/
H A Dirq_kern.h12 extern int um_request_irq(unsigned int irq, int fd, int type,
16 void um_free_irq(unsigned int irq, void *dev);
/linux-4.1.27/arch/s390/include/asm/
H A Dhardirq.h21 static inline void ack_bad_irq(unsigned int irq) ack_bad_irq() argument
23 printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq); ack_bad_irq()
/linux-4.1.27/arch/score/include/asm/
H A Dirq.h19 #define irq_canonicalize(irq) (irq)
/linux-4.1.27/arch/mips/loongson/fuloong-2e/
H A Dirq.c19 int irq; i8259_irqdispatch() local
21 irq = i8259_irq(); i8259_irqdispatch()
22 if (irq >= 0) i8259_irqdispatch()
23 do_IRQ(irq); i8259_irqdispatch()
53 * 32-63 ------> bonito irq mach_init_irq()
56 /* most bonito irq should be level triggered */ mach_init_irq()
65 /* bonito irq at IP2 */ mach_init_irq()
67 /* 8259 irq at IP5 */ mach_init_irq()
/linux-4.1.27/arch/mips/ralink/
H A Dill_acc.c32 static irqreturn_t ill_acc_irq_handler(int irq, void *_priv) ill_acc_irq_handler() argument
53 int irq; ill_acc_of_setup() local
69 irq = irq_of_parse_and_map(np, 0); ill_acc_of_setup()
70 if (!irq) { ill_acc_of_setup()
71 dev_err(&pdev->dev, "failed to get irq\n"); ill_acc_of_setup()
75 if (request_irq(irq, ill_acc_irq_handler, 0, "ill_acc", &pdev->dev)) { ill_acc_of_setup()
76 dev_err(&pdev->dev, "failed to request irq\n"); ill_acc_of_setup()
82 dev_info(&pdev->dev, "irq registered\n"); ill_acc_of_setup()

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