Home
last modified time | relevance | path

Searched refs:iommu (Results 1 – 137 of 137) sorted by relevance

/linux-4.1.27/drivers/iommu/
Damd_iommu_init.c230 static int iommu_pc_get_set_reg_val(struct amd_iommu *iommu,
250 static u32 iommu_read_l1(struct amd_iommu *iommu, u16 l1, u8 address) in iommu_read_l1() argument
254 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); in iommu_read_l1()
255 pci_read_config_dword(iommu->dev, 0xfc, &val); in iommu_read_l1()
259 static void iommu_write_l1(struct amd_iommu *iommu, u16 l1, u8 address, u32 val) in iommu_write_l1() argument
261 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16 | 1 << 31)); in iommu_write_l1()
262 pci_write_config_dword(iommu->dev, 0xfc, val); in iommu_write_l1()
263 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); in iommu_write_l1()
266 static u32 iommu_read_l2(struct amd_iommu *iommu, u8 address) in iommu_read_l2() argument
270 pci_write_config_dword(iommu->dev, 0xf0, address); in iommu_read_l2()
[all …]
Dintel_irq_remapping.c21 struct intel_iommu *iommu; member
28 struct intel_iommu *iommu; member
73 if (unlikely(!irq_iommu->iommu)) { in get_irte()
79 *entry = *(irq_iommu->iommu->ir_table->base + index); in get_irte()
85 static int alloc_irte(struct intel_iommu *iommu, int irq, u16 count) in alloc_irte() argument
87 struct ir_table *table = iommu->ir_table; in alloc_irte()
102 if (mask > ecap_max_handle_mask(iommu->ecap)) { in alloc_irte()
106 ecap_max_handle_mask(iommu->ecap)); in alloc_irte()
114 pr_warn("IR%d: can't allocate an IRTE\n", iommu->seq_id); in alloc_irte()
117 irq_iommu->iommu = iommu; in alloc_irte()
[all …]
Ddmar.c76 static void free_iommu(struct intel_iommu *iommu);
426 if (dmaru->iommu) in dmar_free_drhd()
427 free_iommu(dmaru->iommu); in dmar_free_drhd()
465 drhd->iommu->node = node; in dmar_parse_one_rhsa()
891 x86_init.iommu.iommu_init = intel_iommu_init; in detect_intel_iommu()
902 static void unmap_iommu(struct intel_iommu *iommu) in unmap_iommu() argument
904 iounmap(iommu->reg); in unmap_iommu()
905 release_mem_region(iommu->reg_phys, iommu->reg_size); in unmap_iommu()
916 static int map_iommu(struct intel_iommu *iommu, u64 phys_addr) in map_iommu() argument
920 iommu->reg_phys = phys_addr; in map_iommu()
[all …]
Dintel-iommu.c353 struct intel_iommu *iommu; /* IOMMU used by this device */ member
407 static void iommu_detach_dependent_devices(struct intel_iommu *iommu,
410 struct intel_iommu *iommu);
431 #define ecs_enabled(iommu) (intel_iommu_ecs && ecap_ecs(iommu->ecap) && \ argument
432 ecap_pasid(iommu->ecap))
548 static int __iommu_calculate_agaw(struct intel_iommu *iommu, int max_gaw) in __iommu_calculate_agaw() argument
553 sagaw = cap_sagaw(iommu->cap); in __iommu_calculate_agaw()
566 int iommu_calculate_max_sagaw(struct intel_iommu *iommu) in iommu_calculate_max_sagaw() argument
568 return __iommu_calculate_agaw(iommu, MAX_AGAW_WIDTH); in iommu_calculate_max_sagaw()
576 int iommu_calculate_agaw(struct intel_iommu *iommu) in iommu_calculate_agaw() argument
[all …]
Drockchip-iommu.c274 static u32 rk_iommu_read(struct rk_iommu *iommu, u32 offset) in rk_iommu_read() argument
276 return readl(iommu->base + offset); in rk_iommu_read()
279 static void rk_iommu_write(struct rk_iommu *iommu, u32 offset, u32 value) in rk_iommu_write() argument
281 writel(value, iommu->base + offset); in rk_iommu_write()
284 static void rk_iommu_command(struct rk_iommu *iommu, u32 command) in rk_iommu_command() argument
286 writel(command, iommu->base + RK_MMU_COMMAND); in rk_iommu_command()
289 static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova, in rk_iommu_zap_lines() argument
298 rk_iommu_write(iommu, RK_MMU_ZAP_ONE_LINE, iova); in rk_iommu_zap_lines()
301 static bool rk_iommu_is_stall_active(struct rk_iommu *iommu) in rk_iommu_is_stall_active() argument
303 return rk_iommu_read(iommu, RK_MMU_STATUS) & RK_MMU_STATUS_STALL_ACTIVE; in rk_iommu_is_stall_active()
[all …]
DMakefile1 obj-$(CONFIG_IOMMU_API) += iommu.o
2 obj-$(CONFIG_IOMMU_API) += iommu-traces.o
3 obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o
13 obj-$(CONFIG_INTEL_IOMMU) += intel-iommu.o
16 obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o
17 obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o
18 obj-$(CONFIG_ROCKCHIP_IOMMU) += rockchip-iommu.o
21 obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o
22 obj-$(CONFIG_SHMOBILE_IOMMU) += shmobile-iommu.o
Damd_iommu.c206 return dev->archdata.iommu; in get_dev_data()
368 if (dev->archdata.iommu) in iommu_init_device()
394 struct amd_iommu *iommu; in iommu_init_device() local
396 iommu = amd_iommu_rlookup_table[dev_data->devid]; in iommu_init_device()
397 dev_data->iommu_v2 = iommu->is_iommu_v2; in iommu_init_device()
400 dev->archdata.iommu = dev_data; in iommu_init_device()
583 static void iommu_print_event(struct amd_iommu *iommu, void *__evt) in iommu_print_event() argument
662 static void iommu_poll_events(struct amd_iommu *iommu) in iommu_poll_events() argument
666 head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); in iommu_poll_events()
667 tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); in iommu_poll_events()
[all …]
Dof_iommu.c108 struct of_iommu_node *iommu = kzalloc(sizeof(*iommu), GFP_KERNEL); in of_iommu_set_ops() local
110 if (WARN_ON(!iommu)) in of_iommu_set_ops()
113 INIT_LIST_HEAD(&iommu->list); in of_iommu_set_ops()
114 iommu->np = np; in of_iommu_set_ops()
115 iommu->ops = ops; in of_iommu_set_ops()
117 list_add_tail(&iommu->list, &of_iommu_list); in of_iommu_set_ops()
Damd_iommu_proto.h29 extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
84 static inline bool iommu_feature(struct amd_iommu *iommu, u64 f) in iommu_feature() argument
86 if (!(iommu->cap & (1 << IOMMU_CAP_EFR))) in iommu_feature()
89 return !!(iommu->features & f); in iommu_feature()
Dipmmu-vmsa.c497 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu; in ipmmu_attach_device()
539 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu; in ipmmu_detach_device()
615 if (dev->archdata.iommu) { in ipmmu_add_device()
683 dev->archdata.iommu = archdata; in ipmmu_add_device()
720 kfree(dev->archdata.iommu); in ipmmu_add_device()
723 dev->archdata.iommu = NULL; in ipmmu_add_device()
733 struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu; in ipmmu_remove_device()
741 dev->archdata.iommu = NULL; in ipmmu_remove_device()
Damd_iommu_types.h374 #define for_each_iommu(iommu) \ argument
375 list_for_each_entry((iommu), &amd_iommu_list, list)
376 #define for_each_iommu_safe(iommu, next) \ argument
377 list_for_each_entry_safe((iommu), (next), &amd_iommu_list, list)
700 extern void iommu_flush_all_caches(struct amd_iommu *iommu);
Dexynos-iommu.c134 #define has_sysmmu(dev) (dev->archdata.iommu != NULL)
484 struct exynos_iommu_owner *owner = dev->archdata.iommu; in __exynos_sysmmu_enable()
513 struct exynos_iommu_owner *owner = dev->archdata.iommu; in exynos_sysmmu_disable()
542 struct exynos_iommu_owner *owner = dev->archdata.iommu; in sysmmu_tlb_invalidate_flpdcache()
560 struct exynos_iommu_owner *owner = dev->archdata.iommu; in sysmmu_tlb_invalidate_entry()
602 struct exynos_iommu_owner *owner = dev->archdata.iommu; in exynos_sysmmu_tlb_invalidate()
790 struct exynos_iommu_owner *owner = dev->archdata.iommu; in exynos_iommu_attach_device()
829 if (owner == dev->archdata.iommu) { in exynos_iommu_detach_device()
840 if (owner == dev->archdata.iommu) in exynos_iommu_detach_device()
Dshmobile-iommu.c131 struct shmobile_iommu_archdata *archdata = dev->archdata.iommu; in shmobile_iommu_attach_device()
160 struct shmobile_iommu_archdata *archdata = dev->archdata.iommu; in shmobile_iommu_detach_device()
358 dev->archdata.iommu = archdata; in shmobile_iommu_add_device()
Domap-iommu.h74 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in dev_to_omap_iommu()
Dtegra-smmu.c410 struct tegra_smmu *smmu = dev->archdata.iommu; in tegra_smmu_attach_dev()
632 dev->archdata.iommu = smmu; in tegra_smmu_add_device()
644 dev->archdata.iommu = NULL; in tegra_smmu_remove_device()
Domap-iommu.c1167 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_attach_dev()
1205 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in _omap_iommu_detach_dev()
1351 dev->archdata.iommu = arch_data; in omap_iommu_add_device()
1360 struct omap_iommu_arch_data *arch_data = dev->archdata.iommu; in omap_iommu_remove_device()
Darm-smmu.c1142 if (dev->archdata.iommu) { in arm_smmu_attach_dev()
1170 dev->archdata.iommu = domain; in arm_smmu_attach_dev()
1183 dev->archdata.iommu = NULL; in arm_smmu_detach_dev()
/linux-4.1.27/arch/sparc/kernel/
Diommu.c51 struct iommu *iommu = container_of(iommu_map_table, struct iommu, tbl); in iommu_flushall() local
52 if (iommu->iommu_flushinv) { in iommu_flushall()
53 iommu_write(iommu->iommu_flushinv, ~(u64)0); in iommu_flushall()
58 tag = iommu->iommu_tags; in iommu_flushall()
65 (void) iommu_read(iommu->write_complete_reg); in iommu_flushall()
79 #define IOPTE_IS_DUMMY(iommu, iopte) \ argument
80 ((iopte_val(*iopte) & IOPTE_PAGE) == (iommu)->dummy_page_pa)
82 static inline void iopte_make_dummy(struct iommu *iommu, iopte_t *iopte) in iopte_make_dummy() argument
87 val |= iommu->dummy_page_pa; in iopte_make_dummy()
92 int iommu_table_init(struct iommu *iommu, int tsbsize, in iommu_table_init() argument
[all …]
Dsbus.c60 struct iommu *iommu = dev->archdata.iommu; in sbus_set_sbus64() local
75 cfg_reg = iommu->write_complete_reg; in sbus_set_sbus64()
210 struct iommu *iommu = op->dev.archdata.iommu; in sbus_build_irq() local
211 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; in sbus_build_irq()
272 struct iommu *iommu = op->dev.archdata.iommu; in sysio_ue_handler() local
273 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; in sysio_ue_handler()
346 struct iommu *iommu = op->dev.archdata.iommu; in sysio_ce_handler() local
347 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; in sysio_ce_handler()
425 struct iommu *iommu = op->dev.archdata.iommu; in sysio_sbus_error_handler() local
430 reg_base = iommu->write_complete_reg - 0x2000UL; in sysio_sbus_error_handler()
[all …]
Dpci_sun4v.c136 struct iommu *iommu; in dma_4v_alloc_coherent() local
157 iommu = dev->archdata.iommu; in dma_4v_alloc_coherent()
159 entry = iommu_tbl_range_alloc(dev, &iommu->tbl, npages, NULL, in dma_4v_alloc_coherent()
165 *dma_addrp = (iommu->tbl.table_map_base + (entry << IO_PAGE_SHIFT)); in dma_4v_alloc_coherent()
190 iommu_tbl_range_free(&iommu->tbl, *dma_addrp, npages, DMA_ERROR_CODE); in dma_4v_alloc_coherent()
219 struct iommu *iommu; in dma_4v_free_coherent() local
224 iommu = dev->archdata.iommu; in dma_4v_free_coherent()
227 entry = ((dvma - iommu->tbl.table_map_base) >> IO_PAGE_SHIFT); in dma_4v_free_coherent()
229 iommu_tbl_range_free(&iommu->tbl, dvma, npages, DMA_ERROR_CODE); in dma_4v_free_coherent()
240 struct iommu *iommu; in dma_4v_map_page() local
[all …]
Dpsycho_common.c206 struct iommu *iommu = pbm->iommu; in psycho_check_iommu_error() local
209 spin_lock_irqsave(&iommu->lock, flags); in psycho_check_iommu_error()
210 control = upa_readq(iommu->iommu_control); in psycho_check_iommu_error()
215 upa_writeq(control, iommu->iommu_control); in psycho_check_iommu_error()
245 spin_unlock_irqrestore(&iommu->lock, flags); in psycho_check_iommu_error()
402 struct iommu *iommu = pbm->iommu; in psycho_iommu_init() local
406 iommu->iommu_control = pbm->controller_regs + PSYCHO_IOMMU_CONTROL; in psycho_iommu_init()
407 iommu->iommu_tsbbase = pbm->controller_regs + PSYCHO_IOMMU_TSBBASE; in psycho_iommu_init()
408 iommu->iommu_flush = pbm->controller_regs + PSYCHO_IOMMU_FLUSH; in psycho_iommu_init()
409 iommu->iommu_tags = pbm->controller_regs + PSYCHO_IOMMU_TAG; in psycho_iommu_init()
[all …]
Dpci_fire.c30 struct iommu *iommu = pbm->iommu; in pci_fire_pbm_iommu_init() local
42 iommu->iommu_control = pbm->pbm_regs + FIRE_IOMMU_CONTROL; in pci_fire_pbm_iommu_init()
43 iommu->iommu_tsbbase = pbm->pbm_regs + FIRE_IOMMU_TSBBASE; in pci_fire_pbm_iommu_init()
44 iommu->iommu_flush = pbm->pbm_regs + FIRE_IOMMU_FLUSH; in pci_fire_pbm_iommu_init()
45 iommu->iommu_flushinv = pbm->pbm_regs + FIRE_IOMMU_FLUSHINV; in pci_fire_pbm_iommu_init()
50 iommu->write_complete_reg = pbm->controller_regs + 0x410000UL; in pci_fire_pbm_iommu_init()
55 upa_writeq(~(u64)0, iommu->iommu_flushinv); in pci_fire_pbm_iommu_init()
57 err = iommu_table_init(iommu, tsbsize * 8 * 1024, vdma[0], dma_mask, in pci_fire_pbm_iommu_init()
62 upa_writeq(__pa(iommu->page_table) | 0x7UL, iommu->iommu_tsbbase); in pci_fire_pbm_iommu_init()
64 control = upa_readq(iommu->iommu_control); in pci_fire_pbm_iommu_init()
[all …]
Dpci_schizo.c237 struct iommu *iommu = pbm->iommu; in schizo_check_iommu_error_pbm() local
244 spin_lock_irqsave(&iommu->lock, flags); in schizo_check_iommu_error_pbm()
245 control = upa_readq(iommu->iommu_control); in schizo_check_iommu_error_pbm()
252 upa_writeq(control, iommu->iommu_control); in schizo_check_iommu_error_pbm()
283 iommu->iommu_control); in schizo_check_iommu_error_pbm()
299 upa_writeq(control, iommu->iommu_control); in schizo_check_iommu_error_pbm()
341 spin_unlock_irqrestore(&iommu->lock, flags); in schizo_check_iommu_error_pbm()
1135 struct iommu *iommu = pbm->iommu; in schizo_pbm_iommu_init() local
1168 iommu->iommu_control = pbm->pbm_regs + SCHIZO_IOMMU_CONTROL; in schizo_pbm_iommu_init()
1169 iommu->iommu_tsbbase = pbm->pbm_regs + SCHIZO_IOMMU_TSBBASE; in schizo_pbm_iommu_init()
[all …]
Dldc.c146 struct ldc_iommu iommu; member
1016 static void ldc_demap(struct ldc_iommu *iommu, unsigned long id, u64 cookie, in ldc_demap() argument
1023 base = iommu->page_table + entry; in ldc_demap()
1038 struct ldc_iommu *ldc_iommu = &lp->iommu; in ldc_iommu_init()
1039 struct iommu_map_table *iommu = &ldc_iommu->iommu_map_table; in ldc_iommu_init() local
1050 iommu->map = kzalloc(sz, GFP_KERNEL); in ldc_iommu_init()
1051 if (!iommu->map) { in ldc_iommu_init()
1055 iommu_tbl_pool_init(iommu, num_tsb_entries, PAGE_SHIFT, in ldc_iommu_init()
1088 kfree(iommu->map); in ldc_iommu_init()
1089 iommu->map = NULL; in ldc_iommu_init()
[all …]
Dpci_psycho.c512 struct iommu *iommu; in psycho_probe() local
527 iommu = pbm->sibling->iommu; in psycho_probe()
529 iommu = kzalloc(sizeof(struct iommu), GFP_KERNEL); in psycho_probe()
530 if (!iommu) { in psycho_probe()
536 pbm->iommu = iommu; in psycho_probe()
587 kfree(pbm->iommu); in psycho_probe()
Dpci_sabre.c463 struct iommu *iommu; in sabre_probe() local
489 iommu = kzalloc(sizeof(*iommu), GFP_KERNEL); in sabre_probe()
490 if (!iommu) { in sabre_probe()
495 pbm->iommu = iommu; in sabre_probe()
578 kfree(pbm->iommu); in sabre_probe()
Dpci_impl.h145 struct iommu *iommu; member
Dpci.c263 sd->iommu = pbm->iommu; in of_create_pci_dev()
270 sd->iommu = pbm->iommu; in of_create_pci_dev()
957 struct iommu *iommu = pdev->dev.archdata.iommu; in pci64_dma_supported() local
959 dma_addr_mask = iommu->dma_addr_mask; in pci64_dma_supported()
Dof_device_common.c65 op->dev.archdata.iommu = bus_sd->iommu; in of_propagate_archdata()
DMakefile59 obj-$(CONFIG_SPARC64) += iommu.o
/linux-4.1.27/lib/
Diommu-common.c22 static inline bool need_flush(struct iommu_map_table *iommu) in need_flush() argument
24 return ((iommu->flags & IOMMU_NEED_FLUSH) != 0); in need_flush()
27 static inline void set_flush(struct iommu_map_table *iommu) in set_flush() argument
29 iommu->flags |= IOMMU_NEED_FLUSH; in set_flush()
32 static inline void clear_flush(struct iommu_map_table *iommu) in clear_flush() argument
34 iommu->flags &= ~IOMMU_NEED_FLUSH; in clear_flush()
55 void iommu_tbl_pool_init(struct iommu_map_table *iommu, in iommu_tbl_pool_init() argument
63 struct iommu_pool *p = &(iommu->large_pool); in iommu_tbl_pool_init()
67 iommu->nr_pools = IOMMU_NR_POOLS; in iommu_tbl_pool_init()
69 iommu->nr_pools = npools; in iommu_tbl_pool_init()
[all …]
DMakefile109 obj-$(CONFIG_IOMMU_HELPER) += iommu-helper.o iommu-common.o
/linux-4.1.27/drivers/vfio/
Dvfio_iommu_type1.c90 static struct vfio_dma *vfio_find_dma(struct vfio_iommu *iommu, in vfio_find_dma() argument
93 struct rb_node *node = iommu->dma_list.rb_node; in vfio_find_dma()
109 static void vfio_link_dma(struct vfio_iommu *iommu, struct vfio_dma *new) in vfio_link_dma() argument
111 struct rb_node **link = &iommu->dma_list.rb_node, *parent = NULL; in vfio_link_dma()
125 rb_insert_color(&new->node, &iommu->dma_list); in vfio_link_dma()
128 static void vfio_unlink_dma(struct vfio_iommu *iommu, struct vfio_dma *old) in vfio_unlink_dma() argument
130 rb_erase(&old->node, &iommu->dma_list); in vfio_unlink_dma()
336 static void vfio_unmap_unpin(struct vfio_iommu *iommu, struct vfio_dma *dma) in vfio_unmap_unpin() argument
351 domain = d = list_first_entry(&iommu->domain_list, in vfio_unmap_unpin()
354 list_for_each_entry_continue(d, &iommu->domain_list, next) { in vfio_unmap_unpin()
[all …]
/linux-4.1.27/arch/sparc/mm/
Diommu.c58 struct iommu_struct *iommu; in sbus_iommu_init() local
65 iommu = kmalloc(sizeof(struct iommu_struct), GFP_KERNEL); in sbus_iommu_init()
66 if (!iommu) { in sbus_iommu_init()
71 iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, in sbus_iommu_init()
73 if (!iommu->regs) { in sbus_iommu_init()
78 control = sbus_readl(&iommu->regs->control); in sbus_iommu_init()
83 sbus_writel(control, &iommu->regs->control); in sbus_iommu_init()
85 iommu_invalidate(iommu->regs); in sbus_iommu_init()
86 iommu->start = IOMMU_START; in sbus_iommu_init()
87 iommu->end = 0xffffffff; in sbus_iommu_init()
[all …]
Dio-unit.c65 op->dev.archdata.iommu = iounit; in iounit_iommu_init()
144 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_get_scsi_one()
155 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_get_scsi_sgl()
171 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_release_scsi_one()
185 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_release_scsi_sgl()
205 struct iounit_struct *iounit = dev->archdata.iommu; in iounit_map_dma_area()
DMakefile10 obj-$(CONFIG_SPARC32) += extable.o srmmu.o iommu.o io-unit.o
/linux-4.1.27/arch/powerpc/platforms/cell/
Diommu.c115 struct cbe_iommu *iommu; member
142 static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte, in invalidate_tce_cache() argument
149 reg = iommu->xlate_regs + IOC_IOPT_CacheInvd; in invalidate_tce_cache()
206 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_build_cell()
229 __pa(window->iommu->pad_page) | in tce_free_cell()
240 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_free_cell()
246 struct cbe_iommu *iommu = data; in ioc_interrupt() local
248 stat = in_be64(iommu->xlate_regs + IOC_IO_ExcpStat); in ioc_interrupt()
264 out_be64(iommu->xlate_regs + IOC_IO_ExcpStat, stat); in ioc_interrupt()
309 static void cell_iommu_setup_stab(struct cbe_iommu *iommu, in cell_iommu_setup_stab() argument
[all …]
DMakefile3 obj-$(CONFIG_PPC_CELL_NATIVE) += iommu.o setup.o spider-pic.o \
/linux-4.1.27/drivers/gpu/drm/msm/
Dmsm_iommu.c27 static int msm_fault_handler(struct iommu_domain *iommu, struct device *dev, in msm_fault_handler() argument
36 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_attach() local
37 return iommu_attach_device(iommu->domain, mmu->dev); in msm_iommu_attach()
42 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_detach() local
43 iommu_detach_device(iommu->domain, mmu->dev); in msm_iommu_detach()
49 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_map() local
50 struct iommu_domain *domain = iommu->domain; in msm_iommu_map()
88 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_unmap() local
89 struct iommu_domain *domain = iommu->domain; in msm_iommu_unmap()
114 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_destroy() local
[all …]
Dmsm_gpu.c531 struct iommu_domain *iommu; in msm_gpu_init() local
606 iommu = iommu_domain_alloc(&platform_bus_type); in msm_gpu_init()
607 if (iommu) { in msm_gpu_init()
609 gpu->mmu = msm_iommu_new(&pdev->dev, iommu); in msm_gpu_init()
/linux-4.1.27/Documentation/ABI/testing/
Dsysfs-class-iommu-intel-iommu1 What: /sys/class/iommu/<iommu>/intel-iommu/address
8 intel-iommu with a DMAR DRHD table entry.
10 What: /sys/class/iommu/<iommu>/intel-iommu/cap
18 What: /sys/class/iommu/<iommu>/intel-iommu/ecap
26 What: /sys/class/iommu/<iommu>/intel-iommu/version
Dsysfs-class-iommu-amd-iommu1 What: /sys/class/iommu/<iommu>/amd-iommu/cap
9 What: /sys/class/iommu/<iommu>/amd-iommu/features
Dsysfs-class-iommu1 What: /sys/class/iommu/<iommu>/devices/
10 What: /sys/devices/.../iommu
/linux-4.1.27/drivers/gpu/drm/nouveau/
Dnouveau_platform.c101 mutex_init(&gpu->iommu.mutex); in nouveau_platform_probe_iommu()
104 gpu->iommu.domain = iommu_domain_alloc(&platform_bus_type); in nouveau_platform_probe_iommu()
105 if (IS_ERR(gpu->iommu.domain)) in nouveau_platform_probe_iommu()
113 pgsize_bitmap = gpu->iommu.domain->ops->pgsize_bitmap; in nouveau_platform_probe_iommu()
115 gpu->iommu.pgshift = PAGE_SHIFT; in nouveau_platform_probe_iommu()
117 gpu->iommu.pgshift = fls(pgsize_bitmap & ~PAGE_MASK); in nouveau_platform_probe_iommu()
118 if (gpu->iommu.pgshift == 0) { in nouveau_platform_probe_iommu()
122 gpu->iommu.pgshift -= 1; in nouveau_platform_probe_iommu()
125 err = iommu_attach_device(gpu->iommu.domain, dev); in nouveau_platform_probe_iommu()
129 err = nvkm_mm_init(&gpu->iommu._mm, 0, in nouveau_platform_probe_iommu()
[all …]
Dnouveau_platform.h56 } iommu; member
/linux-4.1.27/Documentation/devicetree/bindings/iommu/
Drockchip,iommu.txt4 A Rockchip DRM iommu translates io virtual addresses to physical addresses for
9 - compatible : Should be "rockchip,iommu"
13 - #iommu-cells : Should be <0>. This indicates the iommu is a
16 Documentation/devicetree/bindings/iommu/iommu.txt
20 vopl_mmu: iommu@ff940300 {
21 compatible = "rockchip,iommu";
25 #iommu-cells = <0>;
Diommu.txt40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an
46 - #iommu-cells = <0>: Single master IOMMU devices are not configurable and
52 - #iommu-cells = <1>: Multiple master IOMMU devices may need to be configured
56 - #iommu-cells = <4>: Some IOMMU devices allow the DMA window for masters to
108 iommu {
109 #iommu-cells = <0>;
113 iommus = <&{/iommu}>;
120 iommu {
129 #iommu-cells = <0>;
135 iommus = <&{/iommu}>;
[all …]
Dti,omap-iommu.txt5 "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances
6 "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances
7 "ti,dra7-iommu" for DRA7xx IOMMU instances
15 - ti,iommu-bus-err-back : Indicates the IOMMU instance supports throwing
21 compatible = "ti,omap2-iommu";
Drenesas,ipmmu-vmsa.txt17 - #iommu-cells: Must be 1.
34 #iommu-cells = <1>;
/linux-4.1.27/include/linux/
Dintel-iommu.h228 #define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \ argument
232 sts = op(iommu->reg + offset); \
309 void (*flush_context)(struct intel_iommu *iommu, u16 did, u16 sid,
311 void (*flush_iotlb)(struct intel_iommu *iommu, u16 did, u64 addr,
357 struct intel_iommu *iommu, void *addr, int size) in __iommu_flush_cache() argument
359 if (!ecap_coherent(iommu->ecap)) in __iommu_flush_cache()
366 extern int dmar_enable_qi(struct intel_iommu *iommu);
367 extern void dmar_disable_qi(struct intel_iommu *iommu);
368 extern int dmar_reenable_qi(struct intel_iommu *iommu);
369 extern void qi_global_iec(struct intel_iommu *iommu);
[all …]
Ddma_remapping.h30 extern int iommu_calculate_agaw(struct intel_iommu *iommu);
31 extern int iommu_calculate_max_sagaw(struct intel_iommu *iommu);
35 static inline int iommu_calculate_agaw(struct intel_iommu *iommu) in iommu_calculate_agaw() argument
39 static inline int iommu_calculate_max_sagaw(struct intel_iommu *iommu) in iommu_calculate_max_sagaw() argument
Diommu-common.h33 extern void iommu_tbl_pool_init(struct iommu_map_table *iommu,
41 struct iommu_map_table *iommu,
47 extern void iommu_tbl_range_free(struct iommu_map_table *iommu,
Ddmar.h62 struct intel_iommu *iommu; member
92 if (i=drhd->iommu, drhd->ignored) {} else
96 if (i=drhd->iommu, 0) {} else
228 extern int dmar_set_interrupt(struct intel_iommu *iommu);
Dof_iommu.h44 _OF_DECLARE(iommu, name, compat, fn, of_iommu_init_fn)
Ddma-mapping.h138 u64 size, struct iommu_ops *iommu, in arch_setup_dma_ops() argument
/linux-4.1.27/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra-mc.txt12 - #iommu-cells: Should be 1. The single cell of the IOMMU specifier defines
16 See ../iommu/iommu.txt for details.
29 #iommu-cells = <1>;
/linux-4.1.27/arch/sparc/include/asm/
Diommu_64.h27 struct iommu { struct
60 int iommu_table_init(struct iommu *iommu, int tsbsize, argument
Ddevice.h15 void *iommu; member
/linux-4.1.27/arch/powerpc/boot/dts/fsl/
Dp5020si-post.dtsi56 fsl,iommu-parent = <&pamu0>;
85 fsl,iommu-parent = <&pamu0>;
114 fsl,iommu-parent = <&pamu0>;
143 fsl,iommu-parent = <&pamu0>;
168 fsl,iommu-parent = <&pamu0>;
295 iommu@20000 {
370 fsl,iommu-parent = <&pamu0>;
376 fsl,iommu-parent = <&pamu0>;
387 fsl,iommu-parent = <&pamu1>;
400 fsl,iommu-parent = <&pamu1>;
[all …]
Dp3041si-post.dtsi56 fsl,iommu-parent = <&pamu0>;
85 fsl,iommu-parent = <&pamu0>;
114 fsl,iommu-parent = <&pamu0>;
166 fsl,iommu-parent = <&pamu0>;
290 iommu@20000 {
383 fsl,iommu-parent = <&pamu0>;
389 fsl,iommu-parent = <&pamu0>;
400 fsl,iommu-parent = <&pamu1>;
414 fsl,iommu-parent = <&pamu1>;
422 fsl,iommu-parent = <&pamu1>;
[all …]
Dp2041si-post.dtsi56 fsl,iommu-parent = <&pamu0>;
85 fsl,iommu-parent = <&pamu0>;
114 fsl,iommu-parent = <&pamu0>;
139 fsl,iommu-parent = <&pamu0>;
263 iommu@20000 {
356 fsl,iommu-parent = <&pamu0>;
362 fsl,iommu-parent = <&pamu0>;
373 fsl,iommu-parent = <&pamu1>;
387 fsl,iommu-parent = <&pamu1>;
395 fsl,iommu-parent = <&pamu1>;
[all …]
Dp5040si-post.dtsi56 fsl,iommu-parent = <&pamu0>;
84 fsl,iommu-parent = <&pamu0>;
112 fsl,iommu-parent = <&pamu0>;
250 iommu@20000 {
348 fsl,iommu-parent = <&pamu0>;
354 fsl,iommu-parent = <&pamu0>;
365 fsl,iommu-parent = <&pamu2>;
378 fsl,iommu-parent = <&pamu4>;
387 fsl,iommu-parent = <&pamu4>;
395 fsl,iommu-parent = <&pamu4>;
[all …]
Dp4080si-post.dtsi56 fsl,iommu-parent = <&pamu0>;
85 fsl,iommu-parent = <&pamu0>;
114 fsl,iommu-parent = <&pamu0>;
140 fsl,iommu-parent = <&pamu0>;
298 iommu@20000 {
342 fsl,iommu-parent = <&pamu0>;
455 fsl,iommu-parent = <&pamu0>;
461 fsl,iommu-parent = <&pamu0>;
472 fsl,iommu-parent = <&pamu1>;
486 fsl,iommu-parent = <&pamu1>;
[all …]
Dt2081si-post.dtsi55 fsl,iommu-parent = <&pamu0>;
82 fsl,iommu-parent = <&pamu0>;
109 fsl,iommu-parent = <&pamu0>;
136 fsl,iommu-parent = <&pamu0>;
371 iommu@20000 {
454 fsl,iommu-parent = <&pamu0>;
459 fsl,iommu-parent = <&pamu0>;
464 fsl,iommu-parent = <&pamu0>;
476 fsl,iommu-parent = <&pamu1>;
491 fsl,iommu-parent = <&pamu1>;
[all …]
Dt1040si-post.dtsi54 fsl,iommu-parent = <&pamu0>;
80 fsl,iommu-parent = <&pamu0>;
106 fsl,iommu-parent = <&pamu0>;
132 fsl,iommu-parent = <&pamu0>;
321 iommu@20000 {
420 fsl,iommu-parent = <&pamu0>;
435 fsl,iommu-parent = <&pamu0>;
443 fsl,iommu-parent = <&pamu0>;
457 fsl,iommu-parent = <&pamu0>;
462 fsl,iommu-parent = <&pamu0>;
Db4si-post.dtsi55 fsl,iommu-parent = <&pamu0>;
250 iommu@20000 {
311 fsl,iommu-parent = <&pamu0>;
317 fsl,iommu-parent = <&pamu0>;
324 fsl,iommu-parent = <&pamu1>;
336 fsl,iommu-parent = <&pamu1>;
Dt2080si-post.dtsi40 fsl,iommu-parent = <&pamu1>;
46 fsl,iommu-parent = <&pamu1>;
Db4860si-post.dtsi47 fsl,iommu-parent = <&pamu0>;
Dt4240si-post.dtsi615 iommu@20000 {
/linux-4.1.27/arch/x86/include/asm/
Dpci_64.h10 return sd->iommu; in pci_iommu()
16 sd->iommu = val; in set_pci_iommu()
Ddevice.h9 void *iommu; /* hook for IOMMU specific extension */ member
Dpci.h21 void *iommu; /* IOMMU private data */ member
Dx86_init.h130 struct x86_init_iommu iommu; member
Dhw_irq.h100 struct intel_iommu *iommu; member
/linux-4.1.27/drivers/of/
Ddevice.c90 struct iommu_ops *iommu; in of_dma_configure() local
145 iommu = of_iommu_configure(dev, np); in of_dma_configure()
147 iommu ? " " : " not "); in of_dma_configure()
149 arch_setup_dma_ops(dev, dma_addr, size, iommu, coherent); in of_dma_configure()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
Dgk20a.c406 if (plat->gpu->iommu.domain) { in gk20a_instmem_ctor()
407 priv->domain = plat->gpu->iommu.domain; in gk20a_instmem_ctor()
408 priv->mm = plat->gpu->iommu.mm; in gk20a_instmem_ctor()
409 priv->iommu_pgshift = plat->gpu->iommu.pgshift; in gk20a_instmem_ctor()
410 priv->mm_mutex = &plat->gpu->iommu.mutex; in gk20a_instmem_ctor()
/linux-4.1.27/arch/ia64/include/asm/
Ddevice.h11 void *iommu; /* hook for IOMMU specific extension */ member
Dpci.h93 void *iommu; member
/linux-4.1.27/arch/arm64/include/asm/
Ddevice.h22 void *iommu; /* private IOMMU data */ member
Ddma-mapping.h49 struct iommu_ops *iommu, bool coherent) in arch_setup_dma_ops() argument
/linux-4.1.27/arch/powerpc/platforms/pasemi/
DMakefile1 obj-y += setup.o pci.o time.o idle.o powersave.o iommu.o dma_lib.o misc.o
/linux-4.1.27/arch/arm/include/asm/
Ddevice.h15 void *iommu; /* private IOMMU data */ member
Ddma-mapping.h126 struct iommu_ops *iommu, bool coherent);
/linux-4.1.27/Documentation/x86/x86_64/
Dboot-options.txt195 you have >3GB memory or told the kernel to us it (iommu=soft))
204 iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
208 General iommu options:
218 iommu options only relevant to the AMD GART hardware IOMMU:
220 allowed Overwrite iommu off workarounds for specific chipsets.
223 leak Turn on simple iommu leak tracing (only when
243 iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
/linux-4.1.27/drivers/gpu/drm/msm/mdp/mdp4/
Dmdp4_kms.c475 if (config->iommu) { in mdp4_kms_init()
476 mmu = msm_iommu_new(&pdev->dev, config->iommu); in mdp4_kms_init()
535 config.iommu = iommu_domain_alloc(&platform_bus_type); in mdp4_get_config()
542 config.iommu = msm_get_iommu_domain(DISPLAY_READ_DOMAIN); in mdp4_get_config()
Dmdp4_kms.h59 struct iommu_domain *iommu; member
/linux-4.1.27/arch/x86/kvm/
DMakefile16 kvm-$(CONFIG_KVM_DEVICE_ASSIGNMENT) += assigned-dev.o iommu.o
/linux-4.1.27/Documentation/devicetree/bindings/powerpc/fsl/
Dpamu.txt78 - fsl,iommu-parent
96 iommu@20000 {
148 fsl,iommu-parent = <&pamu0>;
/linux-4.1.27/drivers/gpu/drm/msm/mdp/mdp5/
Dmdp5_cfg.h87 struct iommu_domain *iommu; member
Dmdp5_cfg.c296 config.iommu = iommu_domain_alloc(&platform_bus_type); in mdp5_get_config()
Dmdp5_kms.c525 if (config->platform.iommu) { in mdp5_kms_init()
526 mmu = msm_iommu_new(&pdev->dev, config->platform.iommu); in mdp5_kms_init()
/linux-4.1.27/arch/powerpc/platforms/pseries/
DMakefile5 setup.o iommu.o event_sources.o ras.o \
/linux-4.1.27/arch/arm/mach-omap2/
DMakefile237 iommu-$(CONFIG_OMAP_IOMMU) := omap-iommu.o
238 obj-y += $(iommu-m) $(iommu-y)
Ddevices.c108 omap3isp_device.dev.archdata.iommu = &omap3_isp_iommu; in omap3_init_camera()
/linux-4.1.27/arch/arm/boot/dts/
Dr8a7794.dtsi689 #iommu-cells = <1>;
697 #iommu-cells = <1>;
706 #iommu-cells = <1>;
713 #iommu-cells = <1>;
722 #iommu-cells = <1>;
730 #iommu-cells = <1>;
Drk3288.dtsi628 vopb_mmu: iommu@ff930300 {
629 compatible = "rockchip,iommu";
633 #iommu-cells = <0>;
659 vopl_mmu: iommu@ff940300 {
660 compatible = "rockchip,iommu";
664 #iommu-cells = <0>;
Domap3.dtsi459 #iommu-cells = <0>;
460 compatible = "ti,omap2-iommu";
468 #iommu-cells = <0>;
469 compatible = "ti,omap2-iommu";
Dr8a7791.dtsi1433 #iommu-cells = <1>;
1441 #iommu-cells = <1>;
1450 #iommu-cells = <1>;
1458 #iommu-cells = <1>;
1467 #iommu-cells = <1>;
1475 #iommu-cells = <1>;
1484 #iommu-cells = <1>;
Dr8a7790.dtsi1606 #iommu-cells = <1>;
1614 #iommu-cells = <1>;
1623 #iommu-cells = <1>;
1631 #iommu-cells = <1>;
1640 #iommu-cells = <1>;
1648 #iommu-cells = <1>;
Domap4.dtsi551 compatible = "ti,omap4-iommu";
558 compatible = "ti,omap4-iommu";
562 ti,iommu-bus-err-back;
Domap5.dtsi612 compatible = "ti,omap4-iommu";
619 compatible = "ti,omap4-iommu";
623 ti,iommu-bus-err-back;
Dtegra114.dtsi527 #iommu-cells = <1>;
Dtegra20.dtsi551 iommu@7000f024 {
Dtegra30.dtsi645 #iommu-cells = <1>;
Dtegra124.dtsi594 #iommu-cells = <1>;
/linux-4.1.27/arch/mips/include/asm/
Dpci.h46 int iommu; member
/linux-4.1.27/Documentation/devicetree/bindings/soc/fsl/
Dqman-portals.txt43 - fsl,iommu-parent
74 - fsl,iommu-parent
Dbman.txt49 - fsl,iommu-parent
Dqman.txt51 - fsl,iommu-parent
/linux-4.1.27/arch/x86/kernel/
Dx86_init.c77 .iommu = {
Dpci-dma.c260 x86_init.iommu.iommu_init(); in pci_iommu_init()
Daperture_64.c384 x86_init.iommu.iommu_init = gart_iommu_init; in gart_iommu_hole_init()
Dpci-calgary_64.c1471 x86_init.iommu.iommu_init = calgary_iommu_init; in detect_calgary()
/linux-4.1.27/arch/parisc/include/asm/
Dpci.h58 void * iommu; /* IOMMU this device is under */ member
Ddma-mapping.h216 #define GET_IOC(dev) (HBA_DATA(parisc_walk_tree(dev))->iommu)
/linux-4.1.27/arch/mips/pci/
Dpci-ip32.c119 .iommu = 0,
Dpci.c86 if (!hose->iommu) in pcibios_scanbus()
/linux-4.1.27/arch/powerpc/kernel/
DMakefile93 obj-$(CONFIG_PPC64) += dma-iommu.o iommu.o
/linux-4.1.27/Documentation/devicetree/bindings/video/
Drockchip-vop.txt30 - iommus: required a iommu node
/linux-4.1.27/include/trace/events/
Diommu.h8 #define TRACE_SYSTEM iommu
/linux-4.1.27/drivers/
DMakefile54 obj-$(CONFIG_IOMMU_SUPPORT) += iommu/
DKconfig143 source "drivers/iommu/Kconfig"
/linux-4.1.27/arch/arm/mm/
Ddma-mapping.c2064 struct iommu_ops *iommu) in arm_setup_iommu_dma_ops() argument
2068 if (!iommu) in arm_setup_iommu_dma_ops()
2102 struct iommu_ops *iommu) in arm_setup_iommu_dma_ops() argument
2119 struct iommu_ops *iommu, bool coherent) in arch_setup_dma_ops() argument
2124 if (arm_setup_iommu_dma_ops(dev, dma_base, size, iommu)) in arch_setup_dma_ops()
/linux-4.1.27/arch/ia64/hp/common/
Dsba_iommu.c259 ? ((struct ioc *) PCI_CONTROLLER(to_pci_dev(dev))->iommu) : NULL)
1763 controller->iommu = ioc; in ioc_sac_init()
1985 if (PCI_CONTROLLER(bus)->iommu) in sba_connect_bus()
2000 PCI_CONTROLLER(bus)->iommu = ioc; in sba_connect_bus()
/linux-4.1.27/drivers/parisc/
Deisa.c312 eisa_dev.hba.iommu = ccio_get_iommu(dev); in eisa_probe()
Ddino.c956 dino_dev->hba.iommu = ccio_get_iommu(dev); in dino_probe()
Dccio-dma.c1568 HBA_DATA(dev->dev.platform_data)->iommu = ioc; in ccio_probe()
Dlba_pci.c1502 lba_dev->hba.iommu = sba_get_iommu(dev); /* get iommu data */ in lba_driver_probe()
/linux-4.1.27/arch/x86/
DKconfig.debug163 time with iommu=noforce. This will also enable scatter gather
167 be set more finegrained using the iommu= command line
DKconfig809 turned off at boot time with the iommu=off parameter.
821 Calgary anyway, pass 'iommu=calgary' on the kernel command line.
/linux-4.1.27/Documentation/
Dvfio.txt164 The user now has full access to all the devices and the iommu for this
442 (iommu=group_mf). The latter we can't prevent, but the IOMMU should
453 from either function of the device are indistinguishable to the iommu:
Dremoteproc.txt195 contiguous memory, or iommu mapping of certain on-chip peripherals.
Dkernel-parameters.txt437 does not override iommu=pt
1468 Enable intel iommu driver.
1470 Disable intel iommu driver.
1478 With this option iommu will not optimize to look
1534 iommu= [x86]
DDMA-API.txt597 WARNING: at /data2/repos/linux-2.6-iommu/lib/dma-debug.c:448
/linux-4.1.27/include/asm-generic/
Dvmlinux.lds.h178 #define IOMMU_OF_TABLES() OF_TABLE(CONFIG_OF_IOMMU, iommu)
/linux-4.1.27/
DMAINTAINERS627 L: iommu@lists.linux-foundation.org
628 T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
630 F: drivers/iommu/amd_iommu*.[ch]
631 F: include/linux/amd-iommu.h
1641 F: drivers/iommu/arm-smmu.c
1642 F: drivers/iommu/io-pgtable-arm.c
5170 L: iommu@lists.linux-foundation.org
5171 T: git git://git.infradead.org/iommu-2.6.git
5173 F: drivers/iommu/intel-iommu.c
5174 F: include/linux/intel-iommu.h
[all …]
/linux-4.1.27/Documentation/devicetree/
Dbooting-without-of.txt419 tables used for the iommu. Typically, the reserve map should