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Searched refs:gpu (Results 1 – 67 of 67) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/msm/
Dmsm_gpu.c29 static void bs_init(struct msm_gpu *gpu) in bs_init() argument
31 if (gpu->bus_scale_table) { in bs_init()
32 gpu->bsc = msm_bus_scale_register_client(gpu->bus_scale_table); in bs_init()
33 DBG("bus scale client: %08x", gpu->bsc); in bs_init()
37 static void bs_fini(struct msm_gpu *gpu) in bs_fini() argument
39 if (gpu->bsc) { in bs_fini()
40 msm_bus_scale_unregister_client(gpu->bsc); in bs_fini()
41 gpu->bsc = 0; in bs_fini()
45 static void bs_set(struct msm_gpu *gpu, int idx) in bs_set() argument
47 if (gpu->bsc) { in bs_set()
[all …]
Dmsm_gpu.h45 int (*get_param)(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
46 int (*hw_init)(struct msm_gpu *gpu);
47 int (*pm_suspend)(struct msm_gpu *gpu);
48 int (*pm_resume)(struct msm_gpu *gpu);
49 int (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit,
51 void (*flush)(struct msm_gpu *gpu);
52 void (*idle)(struct msm_gpu *gpu);
54 uint32_t (*last_fence)(struct msm_gpu *gpu);
55 void (*recover)(struct msm_gpu *gpu);
56 void (*destroy)(struct msm_gpu *gpu);
[all …]
Dmsm_perf.c72 struct msm_gpu *gpu = priv->gpu; in refill_buf() local
83 for (i = 0; i < gpu->num_perfcntrs; i++) { in refill_buf()
84 const struct msm_gpu_perfcntr *perfcntr = &gpu->perfcntrs[i]; in refill_buf()
101 ret = msm_gpu_perfcntr_sample(gpu, &activetime, &totaltime, in refill_buf()
165 struct msm_gpu *gpu = priv->gpu; in perf_open() local
170 if (perf->open || !gpu) { in perf_open()
180 msm_gpu_perfcntr_start(gpu); in perf_open()
192 msm_gpu_perfcntr_stop(priv->gpu); in perf_release()
Dmsm_drv.c127 struct msm_gpu *gpu = priv->gpu; in msm_unload() local
145 if (gpu) { in msm_unload()
147 gpu->funcs->pm_suspend(gpu); in msm_unload()
149 gpu->funcs->destroy(gpu); in msm_unload()
381 if (!priv->gpu) in load_gpu()
382 priv->gpu = adreno_load_gpu(dev); in load_gpu()
492 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show() local
494 if (gpu) { in msm_gpu_show()
495 seq_printf(m, "%s Status:\n", gpu->name); in msm_gpu_show()
496 gpu->funcs->show(gpu, m); in msm_gpu_show()
[all …]
Dmsm_ringbuffer.c21 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size) in msm_ringbuffer_new() argument
34 ring->gpu = gpu; in msm_ringbuffer_new()
35 ring->bo = msm_gem_new(gpu->dev, size, MSM_BO_WC); in msm_ringbuffer_new()
Dmsm_gem_submit.c37 struct msm_gpu *gpu, int nr) in submit_create() argument
45 submit->gpu = gpu; in submit_create()
127 msm_gem_put_iova(&msm_obj->base, submit->gpu->id); in submit_unlock_unpin_bo()
166 submit->gpu->id, &iova); in submit_validate_objects()
327 struct msm_gpu *gpu; in msm_ioctl_gem_submit() local
337 gpu = priv->gpu; in msm_ioctl_gem_submit()
344 submit = submit_create(dev, gpu, args->nr_bos); in msm_ioctl_gem_submit()
418 ret = msm_gpu_submit(gpu, submit, ctx); in msm_ioctl_gem_submit()
Dmsm_gem.h41 struct msm_gpu *gpu; /* non-null if active */ member
73 return msm_obj->gpu != NULL; in is_active()
98 struct msm_gpu *gpu; member
Dmsm_ringbuffer.h24 struct msm_gpu *gpu; member
30 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int size);
Dmsm_rd.c164 struct msm_gpu *gpu = priv->gpu; in rd_open() local
171 if (rd->open || !gpu) { in rd_open()
182 gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val); in rd_open()
Dmsm_gem.c424 struct msm_gpu *gpu, bool write, uint32_t fence) in msm_gem_move_to_active() argument
427 msm_obj->gpu = gpu; in msm_gem_move_to_active()
433 list_add_tail(&msm_obj->mm_list, &gpu->active_list); in msm_gem_move_to_active()
444 msm_obj->gpu = NULL; in msm_gem_move_to_inactive()
Dmsm_mmu.h46 struct msm_mmu *msm_gpummu_new(struct device *dev, struct msm_gpu *gpu);
DNOTES14 And on gpu side of things:
23 up gpu cmdstream to update scanout and write FLUSH register after).
27 And one or more 'struct msm_gpu' for the various different gpu sub-
Dmsm_drv.h89 struct msm_gpu *gpu; member
205 struct msm_gpu *gpu, bool write, uint32_t fence);
DMakefile1 ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/msm
/linux-4.1.27/drivers/gpu/drm/msm/adreno/
Da4xx_gpu.c33 static void a4xx_dump(struct msm_gpu *gpu);
39 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg() argument
41 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in a4xx_enable_hwcg()
44 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL_TP(i), 0x02222202); in a4xx_enable_hwcg()
46 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL2_TP(i), 0x00002222); in a4xx_enable_hwcg()
48 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_HYST_TP(i), 0x0E739CE7); in a4xx_enable_hwcg()
50 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_DELAY_TP(i), 0x00111111); in a4xx_enable_hwcg()
52 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL_SP(i), 0x22222222); in a4xx_enable_hwcg()
54 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_CTL2_SP(i), 0x00222222); in a4xx_enable_hwcg()
56 gpu_write(gpu, REG_A4XX_RBBM_CLOCK_HYST_SP(i), 0x00000104); in a4xx_enable_hwcg()
[all …]
Da3xx_gpu.c42 static void a3xx_dump(struct msm_gpu *gpu);
44 static void a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init() argument
46 struct msm_ringbuffer *ring = gpu->rb; in a3xx_me_init()
67 gpu->funcs->flush(gpu); in a3xx_me_init()
68 gpu->funcs->idle(gpu); in a3xx_me_init()
71 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init() argument
73 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in a3xx_hw_init()
78 DBG("%s", gpu->name); in a3xx_hw_init()
82 gpu_write(gpu, REG_A3XX_VBIF_IN_RD_LIM_CONF0, 0x10101010); in a3xx_hw_init()
83 gpu_write(gpu, REG_A3XX_VBIF_IN_RD_LIM_CONF1, 0x10101010); in a3xx_hw_init()
[all …]
Dadreno_gpu.c27 int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value) in adreno_get_param() argument
29 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_get_param()
45 DBG("%s: invalid param: %u", gpu->name, param); in adreno_get_param()
53 int adreno_hw_init(struct msm_gpu *gpu) in adreno_hw_init() argument
55 struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); in adreno_hw_init()
58 DBG("%s", gpu->name); in adreno_hw_init()
60 ret = msm_gem_get_iova(gpu->rb->bo, gpu->id, &gpu->rb_iova); in adreno_hw_init()
62 gpu->rb_iova = 0; in adreno_hw_init()
63 dev_err(gpu->dev->dev, "could not map ringbuffer: %d\n", ret); in adreno_hw_init()
70 AXXX_CP_RB_CNTL_BUFSZ(ilog2(gpu->rb->size / 8)) | in adreno_hw_init()
[all …]
Dadreno_gpu.h190 static inline bool adreno_is_a3xx(struct adreno_gpu *gpu) in adreno_is_a3xx() argument
192 return (gpu->revn >= 300) && (gpu->revn < 400); in adreno_is_a3xx()
195 static inline bool adreno_is_a305(struct adreno_gpu *gpu) in adreno_is_a305() argument
197 return gpu->revn == 305; in adreno_is_a305()
200 static inline bool adreno_is_a320(struct adreno_gpu *gpu) in adreno_is_a320() argument
202 return gpu->revn == 320; in adreno_is_a320()
205 static inline bool adreno_is_a330(struct adreno_gpu *gpu) in adreno_is_a330() argument
207 return gpu->revn == 330; in adreno_is_a330()
210 static inline bool adreno_is_a330v2(struct adreno_gpu *gpu) in adreno_is_a330v2() argument
212 return adreno_is_a330(gpu) && (gpu->rev.patchid > 0); in adreno_is_a330v2()
[all …]
Dadreno_device.c107 struct msm_gpu *gpu = NULL; in adreno_load_gpu() local
127 gpu = info->init(dev); in adreno_load_gpu()
128 if (IS_ERR(gpu)) { in adreno_load_gpu()
130 gpu = NULL; in adreno_load_gpu()
134 if (gpu) { in adreno_load_gpu()
137 gpu->funcs->pm_resume(gpu); in adreno_load_gpu()
139 ret = gpu->funcs->hw_init(gpu); in adreno_load_gpu()
142 gpu->funcs->destroy(gpu); in adreno_load_gpu()
143 gpu = NULL; in adreno_load_gpu()
146 msm_gpu_retire(gpu); in adreno_load_gpu()
[all …]
/linux-4.1.27/Documentation/DocBook/
D.drm.xml.cmd2gpu/drm/drm_pci.c drivers/gpu/drm/drm_platform.c drivers/gpu/drm/drm_drv.c drivers/gpu/drm/drm_gem…
/linux-4.1.27/drivers/gpu/drm/nouveau/
Dnouveau_platform.c37 static int nouveau_platform_power_up(struct nouveau_platform_gpu *gpu) in nouveau_platform_power_up() argument
41 err = regulator_enable(gpu->vdd); in nouveau_platform_power_up()
45 err = clk_prepare_enable(gpu->clk); in nouveau_platform_power_up()
48 err = clk_prepare_enable(gpu->clk_pwr); in nouveau_platform_power_up()
51 clk_set_rate(gpu->clk_pwr, 204000000); in nouveau_platform_power_up()
54 reset_control_assert(gpu->rst); in nouveau_platform_power_up()
62 reset_control_deassert(gpu->rst); in nouveau_platform_power_up()
68 clk_disable_unprepare(gpu->clk_pwr); in nouveau_platform_power_up()
70 clk_disable_unprepare(gpu->clk); in nouveau_platform_power_up()
72 regulator_disable(gpu->vdd); in nouveau_platform_power_up()
[all …]
Dnouveau_platform.h62 struct nouveau_platform_gpu *gpu; member
/linux-4.1.27/Documentation/devicetree/bindings/drm/msm/
Dgpu.txt6 - interrupts: The interrupt signal from the gpu.
13 - qcom,chipid: gpu chip-id. Note this may become optional for future
15 - qcom,gpu-pwrlevels: list of operating points
16 - compatible: "qcom,gpu-pwrlevels"
17 - for each qcom,gpu-pwrlevel:
18 - qcom,gpu-freq: requested gpu clock speed
27 gpu: qcom,kgsl-3d0@4300000 {
42 qcom,gpu-pwrlevels {
43 compatible = "qcom,gpu-pwrlevels";
44 qcom,gpu-pwrlevel@0 {
[all …]
Dmdp.txt20 - gpus: phandle for gpu device
32 gpus = <&gpu>;
/linux-4.1.27/drivers/gpu/drm/
DKconfig80 source "drivers/gpu/drm/i2c/Kconfig"
82 source "drivers/gpu/drm/bridge/Kconfig"
121 source "drivers/gpu/drm/radeon/Kconfig"
123 source "drivers/gpu/drm/nouveau/Kconfig"
134 source "drivers/gpu/drm/i915/Kconfig"
177 source "drivers/gpu/drm/exynos/Kconfig"
179 source "drivers/gpu/drm/rockchip/Kconfig"
181 source "drivers/gpu/drm/vmwgfx/Kconfig"
183 source "drivers/gpu/drm/gma500/Kconfig"
185 source "drivers/gpu/drm/udl/Kconfig"
[all …]
/linux-4.1.27/drivers/gpu/drm/amd/amdkfd/
Dkfd_topology.c51 device = top_dev->gpu; in kfd_device_by_id()
68 if (top_dev->gpu->pdev == pdev) { in kfd_device_by_pci_dev()
69 device = top_dev->gpu; in kfd_device_by_pci_dev()
712 if (dev->gpu) { in node_show()
714 __ilog2_u32(dev->gpu->device_info->num_of_watch_points); in node_show()
727 dev->gpu->kfd2kgd->get_max_engine_clock_in_mhz( in node_show()
728 dev->gpu->kgd)); in node_show()
734 dev->gpu->kfd2kgd->get_fw_version( in node_show()
735 dev->gpu->kgd, in node_show()
1082 pr_info("\tGPU assigned: %s\n", (dev->gpu ? "yes" : "no")); in kfd_debug_print_topology()
[all …]
DMakefile5 ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/amd/include/
Dkfd_topology.h144 struct kfd_dev *gpu; member
Dkfd_priv.h551 int kfd_topology_add_device(struct kfd_dev *gpu);
552 int kfd_topology_remove_device(struct kfd_dev *gpu);
/linux-4.1.27/Documentation/devicetree/bindings/gpu/
Dnvidia,gk20a.txt4 - compatible: "nvidia,<chip>-<gpu>"
20 - gpu
25 - gpu
29 gpu@0,57000000 {
39 clock-names = "gpu", "pwr";
41 reset-names = "gpu";
/linux-4.1.27/drivers/video/
DKconfig20 source "drivers/gpu/vga/Kconfig"
22 source "drivers/gpu/host1x/Kconfig"
23 source "drivers/gpu/ipu-v3/Kconfig"
26 source "drivers/gpu/drm/Kconfig"
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
Dgk20a.c406 if (plat->gpu->iommu.domain) { in gk20a_instmem_ctor()
407 priv->domain = plat->gpu->iommu.domain; in gk20a_instmem_ctor()
408 priv->mm = plat->gpu->iommu.mm; in gk20a_instmem_ctor()
409 priv->iommu_pgshift = plat->gpu->iommu.pgshift; in gk20a_instmem_ctor()
410 priv->mm_mutex = &plat->gpu->iommu.mutex; in gk20a_instmem_ctor()
/linux-4.1.27/Documentation/devicetree/bindings/clock/st/
Dst,clkgen-pll.txt27 "st,stih415-gpu-pll-c32", "st,clkgengpu-pll-c32"
28 "st,stih416-gpu-pll-c32", "st,clkgengpu-pll-c32"
Dst,flexgen.txt87 clock-output-names = "clk-icn-gpu",
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/volt/
Dgk20a.c167 uv = regulator_get_voltage(plat->gpu->vdd); in gk20a_volt_ctor()
170 priv->vdd = plat->gpu->vdd; in gk20a_volt_ctor()
/linux-4.1.27/arch/powerpc/platforms/ps3/
Dsystem-bus.c44 int gpu; member
126 usage_hack.gpu++; in ps3_open_hv_device_gpu()
127 if (usage_hack.gpu > 1) { in ps3_open_hv_device_gpu()
151 usage_hack.gpu--; in ps3_close_hv_device_gpu()
152 if (usage_hack.gpu) { in ps3_close_hv_device_gpu()
/linux-4.1.27/drivers/gpu/drm/exynos/
DMakefile5 ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/exynos
/linux-4.1.27/arch/arm/boot/dts/
Dstih416-clock.dtsi352 "clk-m-tx-icn-gpu",
353 "clk-m-rx-icn-gpu",
376 ""; /* clk-m-gpu-alt */
744 clockgen-gpu@fd68ff00 {
747 clockgen_gpu_pll: clockgen-gpu-pll {
749 compatible = "st,stih416-gpu-pll-c32", "st,clkgengpu-pll-c32";
752 clock-output-names = "clockgen-gpu-pll";
Dtegra20-trimslice.dts102 gpu {
103 nvidia,pins = "gpu";
206 "gma", "gmc", "gmd", "gpu", "gpu7",
Dtegra20-paz00.dts97 gpu {
98 nvidia,pins = "gpu", "sdb", "sdd";
193 "gpu", "gpu7", "gpv", "i2cp", "pta",
Dtegra20-ventana.dts111 gpu {
112 nvidia,pins = "gpu";
203 "gme", "gpu", "gpu7", "i2cp", "irrx",
Dtegra20-tamonten.dtsi46 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
200 "dtc", "dte", "dtf", "gpu", "sdio1",
Dtegra124.dtsi179 gpu@0,57000000 {
188 clock-names = "gpu", "pwr";
190 reset-names = "gpu";
963 gpu {
Dtegra20-whistler.dts40 "gmc", "gmd", "gpu";
205 "dtf", "gpu", "gpu7", "gpv", "i2cp",
Dtegra20-seaboard.dts111 gpu {
112 nvidia,pins = "gpu";
203 "gme", "gpu", "gpu7", "i2cp", "irrx",
Dstih407-clock.dtsi165 clock-output-names = "clk-icn-gpu",
Dstih410-clock.dtsi168 clock-output-names = "clk-icn-gpu",
Dstih418-clock.dtsi168 clock-output-names = "clk-icn-gpu",
Dtegra20-harmony.dts60 nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
218 "dtc", "dte", "dtf", "gpu", "sdio1",
Dtegra20-colibri-512.dtsi68 "dap1", "dap2", "dap4", "gpu", "irrx",
Dstih415-clock.dtsi316 "clk-m-icn-gpu",
Ddra7.dtsi1003 abb_gpu: regulator-abb-gpu {
1486 #include "omap5-gpu-thermal.dtsi"
Dexynos5420.dtsi851 gpu_thermal: gpu-thermal {
Domap5.dtsi71 #include "omap5-gpu-thermal.dtsi"
Dtegra124-jetson-tk1.dts1935 gpu {
/linux-4.1.27/drivers/video/fbdev/vermilion/
Dvermilion.c285 par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL); in vmlfb_get_gpu()
287 if (!par->gpu) { in vmlfb_get_gpu()
294 if (pci_enable_device(par->gpu) < 0) in vmlfb_get_gpu()
342 par->gpu_mem_base = pci_resource_start(par->gpu, 0); in vmlfb_enable_mmio()
343 par->gpu_mem_size = pci_resource_len(par->gpu, 0); in vmlfb_enable_mmio()
386 pci_disable_device(par->gpu); in vmlfb_release_devices()
Dvermilion.h197 struct pci_dev *gpu; member
/linux-4.1.27/arch/x86/kernel/cpu/
Dperf_event_intel_rapl.c427 RAPL_EVENT_ATTR_STR(energy-gpu , rapl_gpu, "event=0x04");
432 RAPL_EVENT_ATTR_STR(energy-gpu.unit , rapl_gpu_unit, "Joules");
440 RAPL_EVENT_ATTR_STR(energy-gpu.scale, rapl_gpu_scale, "2.3283064365386962890625e-10");
/linux-4.1.27/Documentation/devicetree/bindings/thermal/
Dthermal.txt359 gpu_thermal: gpu-thermal {
368 gpu_alert: gpu-alert {
373 gpu_crit: gpu-crit {
400 dsp_crit: gpu-crit {
556 gpu_trip: gpu-trip {
/linux-4.1.27/drivers/
DMakefile57 obj-y += gpu/
/linux-4.1.27/Documentation/EDID/
DHOWTO.txt20 (see drivers/gpu/drm/drm_edid_load.c) contains built-in data sets for
/linux-4.1.27/drivers/gpu/drm/radeon/
DMakefile5 ccflags-y := -Iinclude/drm -Idrivers/gpu/drm/amd/include
/linux-4.1.27/Documentation/devicetree/bindings/pinctrl/
Dnvidia,tegra20-pinmux.txt76 ddc, dta, dtb, dtc, dtd, dte, dtf, gma, gmb, gmc, gmd, gme, gpu, gpu7,
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgk20a.c661 priv->parent_rate = clk_get_rate(plat->gpu->clk); in gk20a_clk_ctor()
/linux-4.1.27/Documentation/locking/
Dww-mutex-design.txt113 not have duplicate entries (e.g. for a gpu commandbuffer submission ioctl).
/linux-4.1.27/
DMAINTAINERS638 F: drivers/gpu/drm/amd/amdkfd/
639 F: drivers/gpu/drm/amd/include/cik_structs.h
640 F: drivers/gpu/drm/amd/include/kgd_kfd_interface.h
641 F: drivers/gpu/drm/radeon/radeon_kfd.c
642 F: drivers/gpu/drm/radeon/radeon_kfd.h
3352 F: drivers/gpu/drm/
3353 F: drivers/gpu/vga/
3363 F: drivers/gpu/drm/radeon/
3371 F: drivers/gpu/drm/drm_panel.c
3372 F: drivers/gpu/drm/panel/
[all …]
/linux-4.1.27/drivers/pinctrl/
Dpinctrl-tegra20.c2076 MUX_PG(gpu, PWM, UARTA, GMI, RSVD4, 0x14, 16, 0x8c, 4, 0xa4, 20),