| /linux-4.1.27/drivers/clocksource/ |
| D | qcom-timer.c | 45 static void __iomem *event_base; variable
53 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_interrupt()
55 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_interrupt()
64 u32 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_set_next_event()
67 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_set_next_event()
69 writel_relaxed(ctrl, event_base + TIMER_CLEAR); in msm_timer_set_next_event()
70 writel_relaxed(cycles, event_base + TIMER_MATCH_VAL); in msm_timer_set_next_event()
76 writel_relaxed(ctrl | TIMER_ENABLE_EN, event_base + TIMER_ENABLE); in msm_timer_set_next_event()
85 ctrl = readl_relaxed(event_base + TIMER_ENABLE); in msm_timer_set_mode()
99 writel_relaxed(ctrl, event_base + TIMER_ENABLE); in msm_timer_set_mode()
[all …]
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| /linux-4.1.27/arch/alpha/kernel/ |
| D | perf_event.c | 350 evtype[n] = group->hw.event_base; in collect_events()
358 evtype[n] = pe->hw.event_base; in collect_events()
458 cpuc->evtype[n0] = event->hw.event_base; in alpha_pmu_add()
647 hwc->event_base = ev; in __hw_perf_event_init()
661 evtypes[n] = hwc->event_base; in __hw_perf_event_init()
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| /linux-4.1.27/arch/s390/include/asm/ |
| D | perf_event.h | 68 #define SAMPL_RATE(hwc) ((hwc)->event_base)
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| /linux-4.1.27/arch/x86/kernel/cpu/ |
| D | perf_event_intel_rapl.c | 142 rdmsrl(event->hw.event_base, raw); in rapl_read_counter()
179 rdmsrl(event->hw.event_base, new_raw_count); in rapl_event_update()
382 event->hw.event_base = msr; in rapl_pmu_event_init()
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| D | perf_event_intel_uncore_snb.c | 229 return (u64)*(unsigned int *)(box->io_addr + hwc->event_base); in snb_uncore_imc_read_counter()
305 event->hw.event_base = base; in snb_uncore_imc_event_init()
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| D | perf_event_amd_uncore.c | 98 wrmsrl(hwc->event_base, (u64)local64_read(&hwc->prev_count)); in amd_uncore_start()
149 hwc->event_base = uncore->msr_base + 1 + (2 * hwc->idx); in amd_uncore_add()
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| D | perf_event.c | 973 hwc->event_base = 0; in x86_assign_hw_event()
976 hwc->event_base = MSR_ARCH_PERFMON_FIXED_CTR0 + (hwc->idx - INTEL_PMC_IDX_FIXED); in x86_assign_hw_event()
980 hwc->event_base = x86_pmu_event_addr(hwc->idx); in x86_assign_hw_event()
1120 wrmsrl(hwc->event_base, (u64)(-left) & x86_pmu.cntval_mask); in x86_perf_event_set_period()
1128 wrmsrl(hwc->event_base, in x86_perf_event_set_period()
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| D | perf_event_intel_uncore.c | 74 rdmsrl(event->hw.event_base, count); in uncore_msr_read_counter()
164 hwc->event_base = uncore_fixed_ctr(box); in uncore_assign_hw_event()
170 hwc->event_base = uncore_perf_ctr(box, hwc->idx); in uncore_assign_hw_event()
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| D | perf_event_intel_uncore_snbep.c | 309 pci_read_config_dword(pdev, hwc->event_base, (u32 *)&count); in snbep_uncore_pci_read_counter()
310 pci_read_config_dword(pdev, hwc->event_base + 4, (u32 *)&count + 1); in snbep_uncore_pci_read_counter()
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| D | perf_event_p4.c | 873 rdmsrl(hwc->event_base, v); in p4_pmu_clear_cccr_ovf()
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| D | perf_event_intel.c | 1524 wrmsrl(event->hw.event_base, 0); in intel_pmu_save_and_restart()
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| /linux-4.1.27/arch/sparc/kernel/ |
| D | perf_event.c | 1341 events[n] = group->hw.event_base; in collect_events()
1350 events[n] = event->hw.event_base; in collect_events()
1370 cpuc->events[n0] = event->hw.event_base; in sparc_pmu_add()
1440 hwc->event_base = perf_event_encode(pmap); in sparc_pmu_event_init()
1446 hwc->event_base = attr->config; in sparc_pmu_event_init()
1466 events[n] = hwc->event_base; in sparc_pmu_event_init()
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| /linux-4.1.27/arch/powerpc/perf/ |
| D | core-book3s.c | 1384 flags[n] = group->hw.event_base; in collect_events()
1393 flags[n] = event->hw.event_base; in collect_events()
1426 cpuhw->flags[n0] = event->hw.event_base; in power_pmu_add()
1860 event->hw.event_base = cflags[n]; in power_pmu_event_init()
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| /linux-4.1.27/drivers/bus/ |
| D | arm-ccn.c | 814 dt_cfg = hw->event_base; in arm_ccn_pmu_xp_dt_config()
884 hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__WATCHPOINT(wp); in arm_ccn_pmu_xp_watchpoint_config()
927 hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__XP_PMU_EVENT(hw->config_base); in arm_ccn_pmu_xp_event_config()
950 hw->event_base = CCN_XP_DT_CONFIG__DT_CFG__DEVICE_PMU_EVENT(port, in arm_ccn_pmu_node_event_config()
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| D | arm-cci.c | 702 hwc->event_base = 0; in __hw_perf_event_init()
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| /linux-4.1.27/arch/mips/kernel/ |
| D | perf_event_mipsxx.c | 320 unsigned long cntr_mask = (hwc->event_base >> 8) & 0xffff; in mipsxx_pmu_alloc_counter()
347 cpuc->saved_ctrl[idx] = M_PERFCTL_EVENT(evt->event_base & 0xff) | in mipsxx_pmu_enable_event()
1300 hwc->event_base = mipspmu_perf_event_encode(pev); in __hw_perf_event_init()
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| /linux-4.1.27/arch/arm/kernel/ |
| D | perf_event.c | 413 hwc->event_base = 0; in __hw_perf_event_init()
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| /linux-4.1.27/include/linux/ |
| D | perf_event.h | 105 unsigned long event_base; member
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| /linux-4.1.27/arch/arm64/kernel/ |
| D | perf_event.c | 551 hwc->event_base = 0; in __hw_perf_event_init()
|