Searched refs:crtcs (Results 1 - 89 of 89) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/armada/
H A Darmada_slave.h16 uint32_t crtcs; member in struct:armada_drm_slave_config
H A Darmada_slave.c84 slave->base.possible_crtcs = config->crtcs; armada_drm_conn_slave_create()
H A Darmada_overlay.c426 int armada_overlay_plane_create(struct drm_device *dev, unsigned long crtcs) armada_overlay_plane_create() argument
446 drm_plane_init(dev, &dplane->base, crtcs, &armada_plane_funcs, armada_overlay_plane_create()
H A Darmada_drv.c46 .crtcs = 1 << 0, /* Only LCD0 at the moment */
/linux-4.1.27/drivers/gpu/drm/omapdrm/
H A Domap_drv.c81 struct drm_crtc *crtc = priv->crtcs[i]; channel_used()
144 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs)); omap_modeset_create_crtc()
145 priv->crtcs[id] = crtc; omap_modeset_create_crtc()
172 * We use the num_crtc argument to limit the number of crtcs we create. omap_modeset_init()
213 * if we have reached the limit of the crtcs we are allowed to for_each_dss_dev()
217 * set of crtcs we create for_each_dss_dev()
249 * we have allocated crtcs according to the need of the panels/encoders,
250 * adding more crtcs here if needed
299 struct drm_crtc *crtc = priv->crtcs[id];
313 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
537 /* flush crtcs so the fbs get released */ dev_unload()
539 omap_crtc_flush(priv->crtcs[i]); dev_unload()
594 drm_object_property_set_value(&priv->crtcs[i]->base, dev_lastclose()
H A Domap_irq.c150 struct drm_crtc *crtc = priv->crtcs[crtc_id]; omap_irq_enable_vblank()
177 struct drm_crtc *crtc = priv->crtcs[crtc_id]; omap_irq_disable_vblank()
206 struct drm_crtc *crtc = priv->crtcs[id]; omap_irq_handler()
H A Domap_fbdev.c292 /* disable all the possible outputs/crtcs before entering KMS mode */ omap_fbdev_init()
H A Domap_drv.h93 struct drm_crtc *crtcs[8]; member in struct:omap_drm_private
H A Domap_plane.c294 /* helper to install properties which are common to planes and crtcs */ omap_plane_install_properties()
/linux-4.1.27/drivers/gpu/drm/msm/
H A Dmsm_atomic.c32 /* block until specified crtcs are no longer pending update, and
51 /* clear specified crtcs (no longer pending update)
194 * Figure out what crtcs we have: msm_atomic_commit()
197 struct drm_crtc *crtc = state->crtcs[i]; msm_atomic_commit()
H A Dmsm_kms.h31 * for constructing the appropriate planes/crtcs/encoders/connectors.
H A Dmsm_drv.h108 /* crtcs pending async atomic updates: */
120 struct drm_crtc *crtcs[8]; member in struct:msm_drm_private
H A Dmsm_drv.c471 return kms->funcs->enable_vblank(kms, priv->crtcs[crtc_id]); msm_enable_vblank()
481 kms->funcs->disable_vblank(kms, priv->crtcs[crtc_id]); msm_disable_vblank()
/linux-4.1.27/drivers/gpu/drm/
H A Ddrm_fb_helper.c610 * @crtc_count: maximum number of crtcs to support in this fbdev emulation
1003 /* first up get a count of crtcs now in use and new min/maxes width/heights */ drm_fb_helper_single_fb_probe()
1556 struct drm_fb_helper_crtc **crtcs, *crtc; drm_pick_crtcs() local
1570 crtcs = kzalloc(fb_helper->connector_count * drm_pick_crtcs()
1572 if (!crtcs) drm_pick_crtcs()
1609 crtcs[n] = crtc; drm_pick_crtcs()
1610 memcpy(crtcs, best_crtcs, n * sizeof(struct drm_fb_helper_crtc *)); drm_pick_crtcs()
1611 score = my_score + drm_pick_crtcs(fb_helper, crtcs, modes, n + 1, drm_pick_crtcs()
1615 memcpy(best_crtcs, crtcs, drm_pick_crtcs()
1621 kfree(crtcs); drm_pick_crtcs()
1628 struct drm_fb_helper_crtc **crtcs; drm_setup_crtcs() local
1641 crtcs = kcalloc(dev->mode_config.num_connector, drm_setup_crtcs()
1649 if (!crtcs || !modes || !enabled || !offsets) { drm_setup_crtcs()
1658 fb_helper->funcs->initial_config(fb_helper, crtcs, modes, drm_setup_crtcs()
1662 memset(crtcs, 0, dev->mode_config.num_connector*sizeof(crtcs[0])); drm_setup_crtcs()
1674 drm_pick_crtcs(fb_helper, crtcs, modes, 0, width, height); drm_setup_crtcs()
1687 struct drm_fb_helper_crtc *fb_crtc = crtcs[i]; drm_setup_crtcs()
1719 kfree(crtcs); drm_setup_crtcs()
H A Ddrm_atomic.c37 kfree(state->crtcs); kfree_state()
66 state->crtcs = kcalloc(dev->mode_config.num_crtc, drm_atomic_state_alloc()
67 sizeof(*state->crtcs), GFP_KERNEL); drm_atomic_state_alloc()
68 if (!state->crtcs) drm_atomic_state_alloc()
142 struct drm_crtc *crtc = state->crtcs[i]; drm_atomic_state_clear()
149 state->crtcs[i] = NULL; drm_atomic_state_clear()
172 * per-object state for planes, crtcs and connectors.
223 state->crtcs[index] = crtc; drm_atomic_get_crtc_state()
H A Ddrm_atomic_helper.c508 * Only crtcs and planes have check callbacks, so for any additional (global)
866 * drm_atomic_helper_wait_for_vblanks - wait for vblank on crtcs
871 * crtcs (ie. before cleaning up old framebuffers using
872 * drm_atomic_helper_cleanup_planes()). It will only wait on crtcs where the
1013 * need to synchronize with the crtc work items for changed crtcs and the global
1014 * work item, which allows nice concurrent updates on disjoint sets of crtcs.
1098 * functions for planes and crtcs. It assumes that the atomic state has already
1103 * crtcs need to be updated though.
1233 struct drm_crtc *crtc = state->crtcs[i]; drm_atomic_helper_swap_state()
H A Ddrm_fb_cma_helper.c374 /* disable all the possible outputs/crtcs before entering KMS mode */ drm_fbdev_cma_init()
H A Ddrm_crtc_helper.c212 * disconnected connectors. Then it will disable all unused encoders and crtcs
777 * state for all encoders and crtcs in the output mesh and calls the ->dpms()
H A Ddrm_crtc.c2638 * NOTE: ->set_config can also disable other crtcs (if we steal all drm_mode_set_config_internal()
2640 * crtcs. Atomic modeset will have saner semantics ... drm_mode_set_config_internal()
4715 * restrictions between encoders and crtcs are exposed to userspace through the
H A Ddrm_irq.c301 * @num_crtcs: number of crtcs supported by @dev
/linux-4.1.27/drivers/gpu/drm/msm/mdp/mdp5/
H A Dmdp5_kms.c108 mdp5_crtc_cancel_pending_flip(priv->crtcs[i], file); mdp5_preclose()
307 static const enum mdp5_pipe crtcs[] = { modeset_init() local
332 plane = mdp5_plane_init(dev, crtcs[i], true, modeset_init()
337 pipe2name(crtcs[i]), ret); modeset_init()
345 pipe2name(crtcs[i]), ret); modeset_init()
348 priv->crtcs[priv->num_crtcs++] = crtc; modeset_init()
H A Dmdp5_irq.c84 if (status & mdp5_crtc_vblank(priv->crtcs[id])) mdp5_irq_mdp()
H A Dmdp5_plane.c85 /* helper to install properties which are common to planes and crtcs */ mdp5_plane_install_properties()
/linux-4.1.27/drivers/gpu/drm/msm/mdp/mdp4/
H A Dmdp4_irq.c81 if (status & mdp4_crtc_vblank(priv->crtcs[id])) mdp4_irq()
H A Dmdp4_kms.c137 struct drm_crtc *crtc = state->crtcs[i]; mdp4_prepare_commit()
151 struct drm_crtc *crtc = state->crtcs[i]; mdp4_complete_commit()
174 mdp4_crtc_cancel_pending_flip(priv->crtcs[i], file); mdp4_preclose()
319 priv->crtcs[priv->num_crtcs++] = crtc; modeset_init()
359 priv->crtcs[priv->num_crtcs++] = crtc; modeset_init()
H A Dmdp4_plane.c61 /* helper to install properties which are common to planes and crtcs */ mdp4_plane_install_properties()
/linux-4.1.27/drivers/gpu/drm/radeon/
H A Drv515.c1243 if (rdev->mode_info.crtcs[0]->base.enabled) rv515_bandwidth_avivo_update()
1244 mode0 = &rdev->mode_info.crtcs[0]->base.mode; rv515_bandwidth_avivo_update()
1245 if (rdev->mode_info.crtcs[1]->base.enabled) rv515_bandwidth_avivo_update()
1246 mode1 = &rdev->mode_info.crtcs[1]->base.mode; rv515_bandwidth_avivo_update()
1249 rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_high, false); rv515_bandwidth_avivo_update()
1250 rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_high, false); rv515_bandwidth_avivo_update()
1252 rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_low, false); rv515_bandwidth_avivo_update()
1253 rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_low, false); rv515_bandwidth_avivo_update()
1285 if (rdev->mode_info.crtcs[0]->base.enabled) rv515_bandwidth_update()
1286 mode0 = &rdev->mode_info.crtcs[0]->base.mode; rv515_bandwidth_update()
1287 if (rdev->mode_info.crtcs[1]->base.enabled) rv515_bandwidth_update()
1288 mode1 = &rdev->mode_info.crtcs[1]->base.mode; rv515_bandwidth_update()
H A Dradeon_cursor.c150 * go past the end of the frame if both crtcs are enabled radeon_cursor_move_locked()
152 * NOTE: It is safe to access crtc->enabled of other crtcs radeon_cursor_move_locked()
H A Drs690.c588 if (rdev->mode_info.crtcs[0]->base.enabled) rs690_bandwidth_update()
589 mode0 = &rdev->mode_info.crtcs[0]->base.mode; rs690_bandwidth_update()
590 if (rdev->mode_info.crtcs[1]->base.enabled) rs690_bandwidth_update()
591 mode1 = &rdev->mode_info.crtcs[1]->base.mode; rs690_bandwidth_update()
615 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_high, false); rs690_bandwidth_update()
616 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_high, false); rs690_bandwidth_update()
618 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0_low, true); rs690_bandwidth_update()
619 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1_low, true); rs690_bandwidth_update()
H A Dradeon_display.c288 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; radeon_crtc_handle_vblank()
327 ((vpos >= (99 * rdev->mode_info.crtcs[crtc_id]->base.hwmode.crtc_vdisplay)/100) || radeon_crtc_handle_vblank()
352 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; radeon_crtc_handle_flip()
398 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[work->crtc_id]; radeon_flip_work_func()
620 /* if we have active crtcs and we don't have a power ref, radeon_crtc_set_config()
626 /* if we have no active crtcs, then drop the power ref radeon_crtc_set_config()
661 rdev->mode_info.crtcs[index] = radeon_crtc; radeon_crtc_init()
1610 /* allocate crtcs */ radeon_modeset_init()
1907 vbl_start = rdev->mode_info.crtcs[crtc]->base.hwmode.crtc_vdisplay; radeon_get_crtc_scanoutpos()
1923 vtotal = rdev->mode_info.crtcs[crtc]->base.hwmode.crtc_vtotal; radeon_get_crtc_scanoutpos()
1945 vbl_start = rdev->mode_info.crtcs[crtc]->base.hwmode.crtc_vdisplay; radeon_get_crtc_scanoutpos()
1946 vtotal = rdev->mode_info.crtcs[crtc]->base.hwmode.crtc_vtotal; radeon_get_crtc_scanoutpos()
H A Dradeon_asic.c2295 * of crtcs and the register aperture accessors (all asics).
2302 /* set the number of crtcs */ radeon_asic_init()
2403 /* set num crtcs */ radeon_asic_init()
2420 /* set num crtcs */ radeon_asic_init()
2430 /* set num crtcs */ radeon_asic_init()
2436 /* set num crtcs */ radeon_asic_init()
2446 /* set num crtcs */ radeon_asic_init()
2604 /* set num crtcs */ radeon_asic_init()
H A Drs600.c115 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rs600_page_flip()
144 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rs600_page_flip_pending()
896 if (rdev->mode_info.crtcs[0]->base.enabled) rs600_bandwidth_update()
897 mode0 = &rdev->mode_info.crtcs[0]->base.mode; rs600_bandwidth_update()
898 if (rdev->mode_info.crtcs[1]->base.enabled) rs600_bandwidth_update()
899 mode1 = &rdev->mode_info.crtcs[1]->base.mode; rs600_bandwidth_update()
H A Datombios_crtc.c460 if (rdev->mode_info.crtcs[i] && atombios_crtc_program_ss()
461 rdev->mode_info.crtcs[i]->enabled && atombios_crtc_program_ss()
463 pll_id == rdev->mode_info.crtcs[i]->pll_id) { atombios_crtc_program_ss()
1737 * crtcs/encoders.
1811 * a single PPLL can be used for all DP crtcs/encoders. For non-DP
2158 if (rdev->mode_info.crtcs[i] && atombios_crtc_disable()
2159 rdev->mode_info.crtcs[i]->enabled && atombios_crtc_disable()
2161 radeon_crtc->pll_id == rdev->mode_info.crtcs[i]->pll_id) { atombios_crtc_disable()
H A Dradeon_fb.c405 /* disable all the possible outputs/crtcs before entering KMS mode */ radeon_fbdev_init()
H A Devergreen.c1346 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; evergreen_page_flip()
1388 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; evergreen_page_flip_pending()
1897 * of crtcs. Ideally for multiple large displays we'd assign them to evergreen_line_buffer_adjust()
1898 * non-linked crtcs for maximum line buffer allocation. evergreen_line_buffer_adjust()
1990 u32 num_heads; /* number of active crtcs */
2383 if (rdev->mode_info.crtcs[i]->base.enabled) evergreen_bandwidth_update()
2387 mode0 = &rdev->mode_info.crtcs[i]->base.mode; evergreen_bandwidth_update()
2388 mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; evergreen_bandwidth_update()
2389 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); evergreen_bandwidth_update()
2390 evergreen_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); evergreen_bandwidth_update()
2391 lb_size = evergreen_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); evergreen_bandwidth_update()
2392 evergreen_program_watermarks(rdev, rdev->mode_info.crtcs[i+1], lb_size, num_heads); evergreen_bandwidth_update()
H A Dradeon_kms.c91 * (crtcs, encoders, hotplug detect, etc.).
250 crtc = (struct drm_crtc *)minfo->crtcs[i]; radeon_info_ioctl()
834 drmcrtc = &rdev->mode_info.crtcs[crtc]->base; radeon_get_vblank_timestamp_kms()
H A Dr100.c158 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; r100_page_flip()
191 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; r100_page_flip_pending()
239 /* don't use the power state if crtcs are active and no display flag is set */ r100_pm_get_dynpm_state()
3225 if (rdev->mode_info.crtcs[0]->base.enabled) { r100_bandwidth_update()
3226 mode1 = &rdev->mode_info.crtcs[0]->base.mode; r100_bandwidth_update()
3227 pixel_bytes1 = rdev->mode_info.crtcs[0]->base.primary->fb->bits_per_pixel / 8; r100_bandwidth_update()
3230 if (rdev->mode_info.crtcs[1]->base.enabled) { r100_bandwidth_update()
3231 mode2 = &rdev->mode_info.crtcs[1]->base.mode; r100_bandwidth_update()
3232 pixel_bytes2 = rdev->mode_info.crtcs[1]->base.primary->fb->bits_per_pixel / 8; r100_bandwidth_update()
H A Dradeon_legacy_crtc.c324 /* adjust pm to dpms changes BEFORE enabling crtcs */ radeon_crtc_dpms()
348 /* adjust pm to dpms changes AFTER disabling crtcs */ radeon_crtc_dpms()
H A Dsi.c1928 * of crtcs. Ideally for multiple large displays we'd assign them to dce6_line_buffer_adjust()
1929 * non-linked crtcs for maximum line buffer allocation. dce6_line_buffer_adjust()
2007 u32 num_heads; /* number of active crtcs */
2424 if (rdev->mode_info.crtcs[i]->base.enabled) dce6_bandwidth_update()
2428 mode0 = &rdev->mode_info.crtcs[i]->base.mode; dce6_bandwidth_update()
2429 mode1 = &rdev->mode_info.crtcs[i+1]->base.mode; dce6_bandwidth_update()
2430 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode0, mode1); dce6_bandwidth_update()
2431 dce6_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); dce6_bandwidth_update()
2432 lb_size = dce6_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i+1], mode1, mode0); dce6_bandwidth_update()
2433 dce6_program_watermarks(rdev, rdev->mode_info.crtcs[i+1], lb_size, num_heads); dce6_bandwidth_update()
H A Dradeon_pm.c1026 /* for pre-BTC and APUs if the num crtcs changed but state is the same, radeon_dpm_change_power_state_locked()
1039 /* for BTC+ if the num crtcs hasn't changed and state is the same, radeon_dpm_change_power_state_locked()
1040 * nothing to do, if the num crtcs is > 1 and state is the same, radeon_dpm_change_power_state_locked()
H A Drv770.c806 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rv770_page_flip()
842 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; rv770_page_flip_pending()
H A Dradeon_mode.h247 struct radeon_crtc *crtcs[RADEON_MAX_CRTCS]; member in struct:radeon_mode_info
H A Drs780_dpm.c61 crtc = (struct drm_crtc *)minfo->crtcs[i]; rs780_get_pm_mode_parameters()
H A Dcik.c9180 u32 num_heads; /* number of active crtcs */
9656 if (rdev->mode_info.crtcs[i]->base.enabled) dce8_bandwidth_update()
9660 mode = &rdev->mode_info.crtcs[i]->base.mode; dce8_bandwidth_update()
9661 lb_size = dce8_line_buffer_adjust(rdev, rdev->mode_info.crtcs[i], mode); dce8_bandwidth_update()
9662 dce8_program_watermarks(rdev, rdev->mode_info.crtcs[i], lb_size, num_heads); dce8_bandwidth_update()
H A Dsi_dpm.c3658 /* Setting this to false forces the performance state to low if the crtcs are disabled. si_program_display_gap()
3660 * for offscreen rendering or compute if there are no crtcs enabled. si_program_display_gap()
5265 radeon_crtc = rdev->mode_info.crtcs[i]; si_upload_smc_data()
H A Dradeon_device.c684 /* then check MEM_SIZE, in case the crtcs are off */ radeon_card_posted()
H A Dr600.c357 /* don't use the power state if crtcs are active and no display flag is set */ r600_pm_get_dynpm_state()
438 /* don't use the power state if crtcs are active and no display flag is set */ r600_pm_get_dynpm_state()
H A Dradeon_atombios.c413 * with different crtcs which isn't possible on the hardware radeon_atom_apply_quirks()
414 * side and leaves no crtcs for LVDS or VGA. radeon_atom_apply_quirks()
H A Dradeon.h2420 int num_crtc; /* number of crtcs */
/linux-4.1.27/drivers/gpu/drm/rcar-du/
H A Drcar_du_drv.c214 rcar_du_crtc_cancel_page_flip(&rcdu->crtcs[i], file); rcar_du_preclose()
228 rcar_du_crtc_enable_vblank(&rcdu->crtcs[crtc], true); rcar_du_enable_vblank()
237 rcar_du_crtc_enable_vblank(&rcdu->crtcs[crtc], false); rcar_du_disable_vblank()
H A Drcar_du_group.c170 ret = clk_prepare_enable(rcdu->crtcs[0].clock); rcar_du_set_dpad0_routing()
176 clk_disable_unprepare(rcdu->crtcs[0].clock); rcar_du_set_dpad0_routing()
183 struct rcar_du_crtc *crtc0 = &rgrp->dev->crtcs[rgrp->index * 2]; rcar_du_group_set_routing()
H A Drcar_du_kms.c396 u32 crtcs; member in struct:rcar_du_commit
418 rcdu->commit.pending &= ~commit->crtcs; rcar_du_atomic_complete()
458 if (state->crtcs[i]) rcar_du_atomic_commit()
459 commit->crtcs |= 1 << drm_crtc_index(state->crtcs[i]); rcar_du_atomic_commit()
464 !(rcdu->commit.pending & commit->crtcs)); rcar_du_atomic_commit()
466 rcdu->commit.pending |= commit->crtcs; rcar_du_atomic_commit()
H A Drcar_du_plane.c398 unsigned int crtcs; rcar_du_planes_init() local
428 crtcs = ((1 << rcdu->num_crtcs) - 1) & (3 << (2 * rgrp->index)); rcar_du_planes_init()
438 ret = drm_universal_plane_init(rcdu->ddev, &plane->plane, crtcs, rcar_du_planes_init()
H A Drcar_du_drv.h81 struct rcar_du_crtc crtcs[RCAR_DU_MAX_CRTCS]; member in struct:rcar_du_device
H A Drcar_du_crtc.c555 struct rcar_du_crtc *rcrtc = &rcdu->crtcs[index]; rcar_du_crtc_create()
/linux-4.1.27/include/drm/
H A Ddrm_atomic.h89 ((crtc) = (state)->crtcs[__i], \
H A Ddrm_fb_helper.h97 struct drm_fb_helper_crtc **crtcs,
H A Ddrm_crtc.h923 * @crtcs: pointer to array of CRTC pointers
936 struct drm_crtc **crtcs; member in struct:drm_atomic_state
/linux-4.1.27/drivers/gpu/drm/i915/
H A Dintel_fbdev.c329 * and stuffs them into the crtcs and modes array given to us by the
350 struct drm_fb_helper_crtc **crtcs, intel_fb_initial_config()
426 if (crtcs[j] == new_crtc) { intel_fb_initial_config()
474 crtcs[i] = new_crtc; intel_fb_initial_config()
349 intel_fb_initial_config(struct drm_fb_helper *fb_helper, struct drm_fb_helper_crtc **crtcs, struct drm_display_mode **modes, struct drm_fb_offset *offsets, bool *enabled, int width, int height) intel_fb_initial_config() argument
H A Dintel_atomic.c78 struct intel_crtc *crtc = to_intel_crtc(state->crtcs[i]); intel_atomic_check()
H A Dintel_drv.h82 /* maximum connectors per crtcs in the mode set */
298 * range fed into the crtcs.
H A Dintel_display.c3100 * Disabling the crtcs gracefully seems nicer. Also the intel_prepare_reset()
10766 /* Computes which crtcs are affected and sets the relevant bits in the mask. For
10780 /* Check which crtcs have changed outputs connected to them, these need intel_modeset_affected_pipes()
10782 * modeset across multiple crtcs, so modeset_pipes will only have one intel_modeset_affected_pipes()
11358 "pll active crtcs mismatch (expected %i, found %i)\n",
11361 "pll enabled crtcs mismatch (expected %i, found %i)\n",
11461 * and crtcs. At that point we'll need to compute the whole config intel_modeset_compute_config()
11546 * mode set on this crtc. For other crtcs we need to use the __intel_set_mode()
14031 * For correct bookkeeping mark this on active crtcs.
H A Dintel_pm.c3286 * enabled crtcs will keep the same allocation and we don't need to skl_update_other_pipe_wm()
/linux-4.1.27/drivers/gpu/drm/rockchip/
H A Drockchip_drm_fbdev.c169 /* disable all the possible outputs/crtcs before entering KMS mode */ rockchip_drm_fbdev_init()
/linux-4.1.27/drivers/gpu/drm/gma500/
H A Dframebuffer.c609 dev_priv->ops->crtcs, INTELFB_CONN_LIMIT); psb_fbdev_init()
617 /* disable all the possible outputs/crtcs before entering KMS mode */ psb_fbdev_init()
726 /* valid crtcs */ psb_setup_outputs()
H A Dpsb_device.c335 .crtcs = 2,
H A Dpsb_intel_drv.h33 /* maximum connectors per crtcs in the mode set */
H A Dmdfld_device.c531 .crtcs = 3,
H A Dcdv_device.c598 .crtcs = 2,
H A Doaktrail_device.c551 .crtcs = 2,
H A Dpsb_drv.h628 int crtcs; /* Number of CRTCs */ member in struct:psb_ops
H A Dmdfld_dsi_dpi.c1004 /*set possible crtcs and clones*/ mdfld_dsi_dpi_init()
/linux-4.1.27/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.h309 /* renders the extended crtc regs (cr19+) on all crtcs impervious:
320 /* NV11 has independently lockable extended crtcs, except when tied */ NVLockVgaCrtcs()
H A Dcrtc.c1059 /* if we get here with no crtcs active then we can drop a reference */ nouveau_crtc_set_config()
1066 /* if we have active crtcs and we don't have a power ref, nouveau_crtc_set_config()
1072 /* if we have no active crtcs, then drop the power ref nouveau_crtc_set_config()
H A Ddfp.c268 /* avoid being connected to both crtcs */ nv04_dfp_prepare()
/linux-4.1.27/drivers/gpu/drm/cirrus/
H A Dcirrus_fbdev.c327 /* disable all the possible outputs/crtcs before entering KMS mode */ cirrus_fbdev_init()
/linux-4.1.27/drivers/gpu/drm/exynos/
H A Dexynos_drm_fbdev.c278 /* disable all the possible outputs/crtcs before entering KMS mode */ exynos_drm_fbdev_init()
/linux-4.1.27/drivers/gpu/drm/mgag200/
H A Dmgag200_fb.c310 /* disable all the possible outputs/crtcs before entering KMS mode */ mgag200_fbdev_init()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv40.c93 /* wait for vblank start on active crtcs, disable memory access */ nv40_ram_prog()
/linux-4.1.27/drivers/gpu/drm/qxl/
H A Dqxl_drv.c56 MODULE_PARM_DESC(num_heads, "Number of virtual crtcs to expose (default 4)");
/linux-4.1.27/drivers/gpu/drm/i2c/
H A Dtda998x_drv.c1501 uint32_t crtcs = 0; tda998x_bind() local
1511 crtcs = drm_of_find_possible_crtcs(drm, dev->of_node); tda998x_bind()
1514 if (crtcs == 0) { tda998x_bind()
1516 crtcs = 1 << 0; tda998x_bind()
1521 priv->encoder.possible_crtcs = crtcs; tda998x_bind()
/linux-4.1.27/drivers/gpu/drm/ast/
H A Dast_fb.c345 /* disable all the possible outputs/crtcs before entering KMS mode */ ast_fbdev_init()
/linux-4.1.27/drivers/gpu/drm/imx/
H A Dimx-drm-core.c309 * crtcs/connectors/encoders must not change after this point. imx_drm_driver_load()
/linux-4.1.27/drivers/gpu/drm/nouveau/
H A Dnouveau_fbcon.c568 /* disable all the possible outputs/crtcs before entering KMS mode */ nouveau_fbcon_init()
H A Dnv50_display.c2472 int crtcs, ret, i; nv50_display_create() local
2512 crtcs = nvif_rd32(device, 0x022448); nv50_display_create()
2514 crtcs = 2; nv50_display_create()
2516 for (i = 0; i < crtcs; i++) { nv50_display_create()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dnv04.c403 /* unslave crtcs */ nv04_devinit_fini()
/linux-4.1.27/drivers/gpu/drm/udl/
H A Dudl_fb.c599 /* disable all the possible outputs/crtcs before entering KMS mode */ udl_fbdev_init()
/linux-4.1.27/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_kms.c538 /* skip any crtcs that misses the clip region */ do_surface_dirty_sou()
902 /* skip any crtcs that misses the clip region */ do_dmabuf_dirty_sou()
1308 /* skip any crtcs that misses the clip region */ vmw_kms_present()
/linux-4.1.27/include/uapi/drm/
H A Ddrm.h465 /* bits 1-6 are reserved for high crtcs */

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