| /linux-4.1.27/drivers/irqchip/ |
| D | irq-sunxi-nmi.c | 75 struct irq_chip_type *ct = gc->chip_types; in sunxi_sc_nmi_set_type()
161 gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; in sunxi_sc_nmi_irq_init()
162 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in sunxi_sc_nmi_irq_init()
163 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in sunxi_sc_nmi_irq_init()
164 gc->chip_types[0].chip.irq_eoi = irq_gc_ack_set_bit; in sunxi_sc_nmi_irq_init()
165 gc->chip_types[0].chip.irq_set_type = sunxi_sc_nmi_set_type; in sunxi_sc_nmi_irq_init()
166 gc->chip_types[0].chip.flags = IRQCHIP_EOI_THREADED | IRQCHIP_EOI_IF_HANDLED; in sunxi_sc_nmi_irq_init()
167 gc->chip_types[0].regs.ack = reg_offs->pend; in sunxi_sc_nmi_irq_init()
168 gc->chip_types[0].regs.mask = reg_offs->enable; in sunxi_sc_nmi_irq_init()
169 gc->chip_types[0].regs.type = reg_offs->ctrl; in sunxi_sc_nmi_irq_init()
[all …]
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| D | irq-tb10x.c | 157 gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; in of_tb10x_init_irq()
158 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in of_tb10x_init_irq()
159 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in of_tb10x_init_irq()
160 gc->chip_types[0].chip.irq_set_type = tb10x_irq_set_type; in of_tb10x_init_irq()
161 gc->chip_types[0].regs.mask = AB_IRQCTL_INT_ENABLE; in of_tb10x_init_irq()
163 gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; in of_tb10x_init_irq()
164 gc->chip_types[1].chip.name = gc->chip_types[0].chip.name; in of_tb10x_init_irq()
165 gc->chip_types[1].chip.irq_ack = irq_gc_ack_set_bit; in of_tb10x_init_irq()
166 gc->chip_types[1].chip.irq_mask = irq_gc_mask_clr_bit; in of_tb10x_init_irq()
167 gc->chip_types[1].chip.irq_unmask = irq_gc_mask_set_bit; in of_tb10x_init_irq()
[all …]
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| D | irq-imgpdc.c | 411 gc->chip_types[0].regs.mask = PDC_IRQ_ROUTE; in pdc_intc_probe()
412 gc->chip_types[0].chip.irq_mask = perip_irq_mask; in pdc_intc_probe()
413 gc->chip_types[0].chip.irq_unmask = perip_irq_unmask; in pdc_intc_probe()
414 gc->chip_types[0].chip.irq_set_wake = pdc_irq_set_wake; in pdc_intc_probe()
423 gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH; in pdc_intc_probe()
424 gc->chip_types[0].handler = handle_edge_irq; in pdc_intc_probe()
425 gc->chip_types[0].regs.ack = PDC_IRQ_CLEAR; in pdc_intc_probe()
426 gc->chip_types[0].regs.mask = PDC_IRQ_ENABLE; in pdc_intc_probe()
427 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in pdc_intc_probe()
428 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in pdc_intc_probe()
[all …]
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| D | irq-dw-apb-ictl.c | 144 gc->chip_types[0].regs.mask = APB_INT_MASK_L; in dw_apb_ictl_init()
145 gc->chip_types[0].regs.enable = APB_INT_ENABLE_L; in dw_apb_ictl_init()
146 gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit; in dw_apb_ictl_init()
147 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit; in dw_apb_ictl_init()
148 gc->chip_types[0].chip.irq_resume = dw_apb_ictl_resume; in dw_apb_ictl_init()
151 gc->chip_types[1].regs.mask = APB_INT_MASK_H; in dw_apb_ictl_init()
152 gc->chip_types[1].regs.enable = APB_INT_ENABLE_H; in dw_apb_ictl_init()
153 gc->chip_types[1].chip.irq_mask = irq_gc_mask_set_bit; in dw_apb_ictl_init()
154 gc->chip_types[1].chip.irq_unmask = irq_gc_mask_clr_bit; in dw_apb_ictl_init()
155 gc->chip_types[1].chip.irq_resume = dw_apb_ictl_resume; in dw_apb_ictl_init()
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| D | irq-zevio.c | 112 gc->chip_types[0].chip.irq_ack = zevio_irq_ack; in zevio_of_init()
113 gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; in zevio_of_init()
114 gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; in zevio_of_init()
115 gc->chip_types[0].regs.mask = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()
116 gc->chip_types[0].regs.enable = IO_IRQ_BASE + IO_ENABLE; in zevio_of_init()
117 gc->chip_types[0].regs.disable = IO_IRQ_BASE + IO_DISABLE; in zevio_of_init()
118 gc->chip_types[0].regs.ack = IO_IRQ_BASE + IO_RESET; in zevio_of_init()
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| D | irq-atmel-aic.c | 260 gc->chip_types[0].regs.eoi = AT91_AIC_EOICR; in aic_of_init()
261 gc->chip_types[0].regs.enable = AT91_AIC_IECR; in aic_of_init()
262 gc->chip_types[0].regs.disable = AT91_AIC_IDCR; in aic_of_init()
263 gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; in aic_of_init()
264 gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; in aic_of_init()
265 gc->chip_types[0].chip.irq_retrigger = aic_retrigger; in aic_of_init()
266 gc->chip_types[0].chip.irq_set_type = aic_set_type; in aic_of_init()
267 gc->chip_types[0].chip.irq_suspend = aic_suspend; in aic_of_init()
268 gc->chip_types[0].chip.irq_resume = aic_resume; in aic_of_init()
269 gc->chip_types[0].chip.irq_pm_shutdown = aic_pm_shutdown; in aic_of_init()
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| D | irq-orion.c | 91 gc->chip_types[0].regs.mask = ORION_IRQ_MASK; in orion_irq_init()
92 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in orion_irq_init()
93 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in orion_irq_init()
190 gc->chip_types[0].regs.ack = ORION_BRIDGE_IRQ_CAUSE; in orion_bridge_irq_init()
191 gc->chip_types[0].regs.mask = ORION_BRIDGE_IRQ_MASK; in orion_bridge_irq_init()
192 gc->chip_types[0].chip.irq_startup = orion_bridge_irq_startup; in orion_bridge_irq_init()
193 gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit; in orion_bridge_irq_init()
194 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in orion_bridge_irq_init()
195 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in orion_bridge_irq_init()
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| D | irq-nvic.c | 93 gc->chip_types[0].regs.enable = NVIC_ISER; in nvic_of_init()
94 gc->chip_types[0].regs.disable = NVIC_ICER; in nvic_of_init()
95 gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; in nvic_of_init()
96 gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; in nvic_of_init()
100 gc->chip_types[0].chip.irq_eoi = irq_gc_noop; in nvic_of_init()
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| D | irq-digicolor.c | 65 gc->chip_types[0].regs.ack = ack_reg; in digicolor_set_gc()
66 gc->chip_types[0].regs.mask = en_reg; in digicolor_set_gc()
67 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in digicolor_set_gc()
68 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in digicolor_set_gc()
69 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in digicolor_set_gc()
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| D | irq-moxart.c | 101 gc->chip_types[0].regs.mask = IRQ_MASK_REG; in moxart_of_intc_init()
102 gc->chip_types[0].regs.ack = IRQ_CLEAR_REG; in moxart_of_intc_init()
103 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in moxart_of_intc_init()
104 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in moxart_of_intc_init()
105 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in moxart_of_intc_init()
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| D | irq-atmel-aic5.c | 334 gc->chip_types[0].regs.eoi = AT91_AIC5_EOICR; in aic5_of_init()
335 gc->chip_types[0].chip.irq_mask = aic5_mask; in aic5_of_init()
336 gc->chip_types[0].chip.irq_unmask = aic5_unmask; in aic5_of_init()
337 gc->chip_types[0].chip.irq_retrigger = aic5_retrigger; in aic5_of_init()
338 gc->chip_types[0].chip.irq_set_type = aic5_set_type; in aic5_of_init()
339 gc->chip_types[0].chip.irq_suspend = aic5_suspend; in aic5_of_init()
340 gc->chip_types[0].chip.irq_resume = aic5_resume; in aic5_of_init()
341 gc->chip_types[0].chip.irq_pm_shutdown = aic5_pm_shutdown; in aic5_of_init()
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| D | irq-atmel-aic-common.c | 259 gc->chip_types[0].type = IRQ_TYPE_SENSE_MASK; in aic_common_of_init()
260 gc->chip_types[0].chip.irq_eoi = irq_gc_eoi; in aic_common_of_init()
261 gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake; in aic_common_of_init()
262 gc->chip_types[0].chip.irq_shutdown = aic_common_shutdown; in aic_common_of_init()
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| D | irq-omap-intc.c | 209 ct = gc->chip_types; in omap_alloc_gc_of()
235 ct = gc->chip_types; in omap_alloc_gc_legacy()
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| D | irq-sirfsoc.c | 44 ct = gc->chip_types; in sirfsoc_alloc_gc()
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| D | irq-brcmstb-l2.c | 181 ct = gc->chip_types; in brcmstb_l2_intc_of_init()
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| D | irq-bcm7120-l2.c | 275 ct = gc->chip_types; in bcm7120_l2_intc_probe()
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| /linux-4.1.27/drivers/gpio/ |
| D | gpio-tz1090.c | 487 gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; in tz1090_gpio_bank_probe()
488 gc->chip_types[0].handler = handle_level_irq; in tz1090_gpio_bank_probe()
489 gc->chip_types[0].regs.ack = REG_GPIO_IRQ_STS; in tz1090_gpio_bank_probe()
490 gc->chip_types[0].regs.mask = REG_GPIO_IRQ_EN; in tz1090_gpio_bank_probe()
491 gc->chip_types[0].chip.irq_startup = gpio_startup_irq; in tz1090_gpio_bank_probe()
492 gc->chip_types[0].chip.irq_ack = irq_gc_ack_clr_bit; in tz1090_gpio_bank_probe()
493 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in tz1090_gpio_bank_probe()
494 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in tz1090_gpio_bank_probe()
495 gc->chip_types[0].chip.irq_set_type = gpio_set_irq_type; in tz1090_gpio_bank_probe()
496 gc->chip_types[0].chip.irq_set_wake = gpio_set_irq_wake; in tz1090_gpio_bank_probe()
[all …]
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| D | gpio-tb10x.c | 266 gc->chip_types[0].type = IRQ_TYPE_EDGE_BOTH; in tb10x_gpio_probe()
267 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in tb10x_gpio_probe()
268 gc->chip_types[0].chip.irq_mask = irq_gc_mask_clr_bit; in tb10x_gpio_probe()
269 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_set_bit; in tb10x_gpio_probe()
270 gc->chip_types[0].chip.irq_set_type = tb10x_gpio_irq_set_type; in tb10x_gpio_probe()
271 gc->chip_types[0].regs.ack = OFFSET_TO_REG_CHANGE; in tb10x_gpio_probe()
272 gc->chip_types[0].regs.mask = OFFSET_TO_REG_INT_EN; in tb10x_gpio_probe()
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| D | gpio-dwapb.c | 332 ct = &irq_gc->chip_types[i]; in dwapb_configure_irqs()
346 irq_gc->chip_types[0].type = IRQ_TYPE_LEVEL_MASK; in dwapb_configure_irqs()
347 irq_gc->chip_types[1].type = IRQ_TYPE_EDGE_BOTH; in dwapb_configure_irqs()
348 irq_gc->chip_types[1].handler = handle_edge_irq; in dwapb_configure_irqs()
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| D | gpio-sta2x11.c | 331 ct = gc->chip_types; in gsta_alloc_irq_chip()
343 struct irq_chip_type *ct = gc->chip_types; in gsta_alloc_irq_chip()
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| D | gpio-sodaville.c | 164 ct = sd->gc->chip_types; in sdv_register_irqsupport()
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| D | gpio-mxs.c | 208 ct = gc->chip_types; in mxs_gpio_init_gc()
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| D | gpio-mvebu.c | 810 ct = &gc->chip_types[0]; in mvebu_gpio_probe()
817 ct = &gc->chip_types[1]; in mvebu_gpio_probe()
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| D | gpio-mxc.c | 351 ct = gc->chip_types; in mxc_gpio_init_gc()
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| D | gpio-pch.c | 343 ct = gc->chip_types; in pch_gpio_alloc_generic_chip()
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| D | gpio-ml-ioh.c | 397 ct = gc->chip_types; in ioh_gpio_alloc_generic_chip()
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| /linux-4.1.27/kernel/irq/ |
| D | generic-chip.c | 213 gc->chip_types->chip.name = name; in irq_init_generic_chip()
214 gc->chip_types->handler = handler; in irq_init_generic_chip()
247 struct irq_chip_type *ct = gc->chip_types; in irq_gc_init_mask_cache()
387 ct = gc->chip_types; in irq_map_generic_chip()
437 struct irq_chip_type *ct = gc->chip_types; in irq_setup_generic_chip()
480 struct irq_chip_type *ct = gc->chip_types; in irq_setup_alt_chip()
549 struct irq_chip_type *ct = gc->chip_types; in irq_gc_suspend()
566 struct irq_chip_type *ct = gc->chip_types; in irq_gc_resume()
586 struct irq_chip_type *ct = gc->chip_types; in irq_gc_shutdown()
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| /linux-4.1.27/arch/arm/mach-imx/ |
| D | avic.c | 94 struct irq_chip_type *ct = gc->chip_types; in avic_irq_suspend()
104 struct irq_chip_type *ct = gc->chip_types; in avic_irq_resume()
125 ct = gc->chip_types; in avic_init_gc()
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| D | tzic.c | 117 ct = gc->chip_types; in tzic_init_gc()
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| /linux-4.1.27/arch/mips/jz4740/ |
| D | irq.c | 59 struct irq_chip_regs *regs = &gc->chip_types->regs; in jz4740_irq_set_mask()
99 ct = gc->chip_types; in arch_init_irq()
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| D | gpio.c | 436 ct = gc->chip_types; in jz4740_gpio_chip_init()
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| /linux-4.1.27/arch/arm/plat-orion/ |
| D | irq.c | 35 ct = gc->chip_types; in orion_irq_init()
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| D | gpio.c | 594 ct = gc->chip_types; in orion_gpio_init()
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| /linux-4.1.27/arch/arm/mach-davinci/ |
| D | irq.c | 61 ct = gc->chip_types; in davinci_alloc_gc()
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| /linux-4.1.27/arch/sh/boards/mach-se/7722/ |
| D | irq.c | 82 ct = gc->chip_types; in se7722_gc_init()
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| /linux-4.1.27/arch/sh/boards/mach-se/7343/ |
| D | irq.c | 83 ct = gc->chip_types; in se7343_gc_init()
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| /linux-4.1.27/drivers/pinctrl/ |
| D | pinctrl-rockchip.c | 1606 gc->chip_types[0].regs.mask = GPIO_INTMASK; in rockchip_interrupts_register()
1607 gc->chip_types[0].regs.ack = GPIO_PORTS_EOI; in rockchip_interrupts_register()
1608 gc->chip_types[0].chip.irq_ack = irq_gc_ack_set_bit; in rockchip_interrupts_register()
1609 gc->chip_types[0].chip.irq_mask = irq_gc_mask_set_bit; in rockchip_interrupts_register()
1610 gc->chip_types[0].chip.irq_unmask = irq_gc_mask_clr_bit; in rockchip_interrupts_register()
1611 gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake; in rockchip_interrupts_register()
1612 gc->chip_types[0].chip.irq_suspend = rockchip_irq_suspend; in rockchip_interrupts_register()
1613 gc->chip_types[0].chip.irq_resume = rockchip_irq_resume; in rockchip_interrupts_register()
1614 gc->chip_types[0].chip.irq_set_type = rockchip_irq_set_type; in rockchip_interrupts_register()
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| /linux-4.1.27/drivers/mfd/ |
| D | jz4740-adc.c | 269 ct = gc->chip_types; in jz4740_adc_probe()
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| /linux-4.1.27/arch/arm/mach-omap2/ |
| D | prm_common.c | 337 ct = gc->chip_types; in omap_prcm_register_chain_handler()
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| /linux-4.1.27/include/linux/ |
| D | irq.h | 761 struct irq_chip_type chip_types[0]; member
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| /linux-4.1.27/drivers/hwmon/ |
| D | w83795.c | 331 enum chip_types {w83795g, w83795adg}; enum
337 enum chip_types chip_type;
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| /linux-4.1.27/drivers/scsi/arm/ |
| D | fas216.c | 2695 static char *chip_types[] = { variable
2892 info->scsi.type = chip_types[type]; in fas216_add()
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| /linux-4.1.27/drivers/gpu/ipu-v3/ |
| D | ipu-common.c | 1114 ct = gc->chip_types; in ipu_irq_init()
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