Searched refs:c5 (Results 1 - 75 of 75) sorted by relevance

/linux-4.1.27/samples/bpf/
H A Dtracex1_user.c19 f = popen("taskset 1 ping -c5 localhost", "r"); main()
H A Dsockex1_user.c27 f = popen("ping -c5 localhost", "r"); main()
H A Dsockex2_user.c32 f = popen("ping -c5 localhost", "r"); main()
H A Dtracex2_user.c69 f = popen("ping -c5 localhost", "r"); main()
H A Dsock_example.c97 f = popen("ping -c5 localhost", "r"); main()
/linux-4.1.27/arch/unicore32/mm/
H A Dcache-ucv2.S34 movc p0.c5, r0, #14 @ Dcache flush all
38 movc p0.c5, r0, #20 @ Icache invalidate all
73 movc p0.c5, ip, #14 @ Dcache flush all
77 movc p0.c5, ip, #20 @ Icache invalidate all
113 103: movc p0.c5, r10, #11 @ Dcache clean line of R10
123 movc p0.c5, ip, #10 @ Dcache clean all
127 movc p0.c5, ip, #20 @ Icache invalidate all
140 movc p0.c5, ip, #14 @ Dcache flush all
167 1: movc p0.c5, r10, #11 @ Dcache clean line of R10
176 movc p0.c5, ip, #10 @ Dcache clean all
208 movc p0.c5, ip, #14 @ Dcache flush all
/linux-4.1.27/arch/arm/include/asm/
H A Ddcc.h28 asm volatile("mrc p14, 0, %0, c0, c5, 0 @ read comms data reg" __dcc_getchar()
37 asm volatile("mcr p14, 0, %0, c0, c5, 0 @ write a char" __dcc_putchar()
H A Dbarrier.h21 #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
28 #define isb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
H A Dtlbflush.h329 tlb_op(TLB_V4_I_FULL | TLB_V6_I_FULL, "c8, c5, 0", zero); __local_flush_tlb_all()
376 tlb_op(TLB_V4_I_FULL, "c8, c5, 0", zero); __local_flush_tlb_mm()
382 tlb_op(TLB_V6_I_ASID, "c8, c5, 2", asid); __local_flush_tlb_mm()
430 tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", uaddr); __local_flush_tlb_page()
432 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); __local_flush_tlb_page()
437 tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", uaddr); __local_flush_tlb_page()
485 tlb_op(TLB_V4_I_PAGE, "c8, c5, 1", kaddr); __local_flush_tlb_kernel_page()
487 asm("mcr p15, 0, %0, c8, c5, 0" : : "r" (zero) : "cc"); __local_flush_tlb_kernel_page()
491 tlb_op(TLB_V6_I_PAGE, "c8, c5, 1", kaddr); __local_flush_tlb_kernel_page()
540 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero)); __local_flush_bp_all()
550 asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero)); local_flush_bp_all()
H A Dassembler.h266 mcr p15, 0, r0, c7, c5, 4
H A Dcacheflush.h188 asm("mcr p15, 0, %0, c7, c5, 0" \
/linux-4.1.27/arch/arm/mm/
H A Dcache-fa.S48 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
71 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
72 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB
74 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
94 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I line
100 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB
102 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
131 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
136 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
138 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
157 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
H A Dproc-arm946.S61 mcr p15, 0, ip, c7, c5, 0 @ flush I cache
87 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
118 mcrne p15, 0, ip, c7, c5, 0 @ flush I cache
142 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
145 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
149 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
152 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
188 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
213 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
332 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
338 mcr p15, 0, r0, c6, c5, 0
376 mcr p15, 0, r0, c5, c0, 2 @ set data access permission
377 mcr p15, 0, r0, c5, c0, 3 @ set inst. access permission
H A Dcache-v6.S43 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
44 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
45 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
46 mcr p15, 0, r0, c7, c5, 0 @ invalidate entire I-cache
52 mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache
69 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
146 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
151 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
H A Dcache-v4wt.S51 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
73 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
94 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
125 1: mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
143 mcr p15, 0, r2, c7, c5, 0 @ invalidate I cache
H A Dproc-arm940.S54 mcr p15, 0, ip, c7, c5, 0 @ flush I cache
80 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
123 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
171 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
279 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
285 mcr p15, 0, r0, c6, c5, 0
291 mcr p15, 0, r0, c6, c5, 1
323 mcr p15, 0, r0, c5, c0, 0 @ all read/write access
324 mcr p15, 0, r0, c5, c0, 1
H A Dtlb-v6.S51 mcrne p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA (was 1)
79 mcr p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA
87 mcr p15, 0, r2, c7, c5, 4 @ prefetch flush (isb)
H A Dproc-fa526.S113 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
114 mcr p15, 0, ip, c7, c5, 6 @ invalidate BTB since mm changed
116 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
147 mcr p15, 0, r0, c7, c5, 5 @ invalidate IScratchpad RAM
153 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB All
155 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
H A Dproc-xsc3.S152 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
176 mcrne p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB
178 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
199 mcrne p15, 0, r0, c7, c5, 1 @ invalidate L1 I line
205 mcrne p15, 0, ip, c7, c5, 6 @ invalidate BTB
207 mcrne p15, 0, ip, c7, c5, 4 @ prefetch flush
232 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
234 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
253 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 I cache and BTB
255 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
365 mcr p15, 0, ip, c7, c5, 0 @ invalidate L1 I cache and BTB
367 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
435 mcr p15, 0, ip, c7, c5, 4 @ flush prefetch buffer
455 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
H A Dproc-arm925.S157 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
189 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
211 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
214 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
218 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
221 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
256 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
280 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
417 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
H A Dproc-arm926.S123 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
152 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
174 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
177 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
181 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
184 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
219 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
243 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
378 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
H A Dproc-mohawk.S105 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
129 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
152 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
155 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
191 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
215 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
331 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
372 mcr p15, 0, ip, c7, c5, 4 @ flush prefetch buffer
H A Dcache-v4wb.S61 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
80 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
114 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
172 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
H A Dproc-xscale.S150 mcr p15, 0, r1, c8, c5, 0 @ invalidate I-TLB
193 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
217 mcrne p15, 0, ip, c7, c5, 0 @ Invalidate I cache & BTB
239 mcrne p15, 0, r0, c7, c5, 1 @ Invalidate I cache line
246 mcrne p15, 0, ip, c7, c5, 6 @ Invalidate BTB
270 mcr p15, 0, r0, c7, c5, 0 @ Invalidate I cache & BTB
287 mcr p15, 0, r0, c7, c5, 1 @ Invalidate I cache entry
292 mcr p15, 0, r0, c7, c5, 6 @ Invalidate BTB
313 mcr p15, 0, r0, c7, c5, 0 @ Invalidate I cache & BTB
475 mcr p15, 0, ip, c7, c5, 0 @ Invalidate I cache & BTB
H A Dproc-arm1022.S123 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
156 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
185 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
221 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
386 mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
H A Dproc-arm1026.S123 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
151 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
180 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
215 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
375 mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
H A Dproc-v6.S64 mcr p15, 0, r1, c7, c5, 4 @ ISB
105 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
157 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
173 mcr p15, 0, ip, c7, c5, 4 @ ISB
209 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
H A Dproc-arm920.S122 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
152 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
174 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
208 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
232 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
365 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
H A Dproc-arm922.S124 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
154 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
176 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
210 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
234 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
369 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
H A Dproc-arm740.S70 mcr p15, 0, r0, c6, c5
111 mcr p15, 0, r0, c5, c0 @ all read/write access
H A Dproc-feroceon.S136 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
170 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
191 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
194 mcrne p15, 0, r0, c7, c5, 1 @ invalidate I entry
230 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
255 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
269 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
488 mcreq p15, 0, ip, c7, c5, 0 @ invalidate I cache
H A Dcache-v7.S78 ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate
191 ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate
209 ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate
290 USER( mcr p15, 0, r12, c7, c5, 1 ) @ invalidate I line
296 ALT_UP(mcr p15, 0, r0, c7, c5, 6) @ invalidate BTB
H A Dproc-arm1020.S132 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
167 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
198 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
236 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
418 mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
H A Dproc-arm1020e.S132 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
166 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
195 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
230 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
402 mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
H A Dproc-v7-2level.S44 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
H A Dabort-lv4t.S20 mrc p15, 0, r1, c5, c0, 0 @ get FSR
H A Dproc-v7.S120 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
429 mcr p15, 0, r10, c7, c5, 0 @ I+BTB cache invalidate
H A Dcache-feroceon-l2.c268 __asm__("mcr p15, 0, %0, c7, c5, 0" : : "r" (0)); __invalidate_icache()
/linux-4.1.27/arch/arm/include/asm/hardware/
H A Dcp14.h55 #define RCP14_DBGDTRRXint() MRC14(0, c0, c5, 0)
70 #define RCP14_DBGBVR5() MRC14(0, c0, c5, 4)
86 #define RCP14_DBGBCR5() MRC14(0, c0, c5, 5)
102 #define RCP14_DBGWVR5() MRC14(0, c0, c5, 6)
118 #define RCP14_DBGWCR5() MRC14(0, c0, c5, 7)
135 #define RCP14_DBGBXVR5() MRC14(0, c1, c5, 1)
150 #define RCP14_DBGPRSR() MRC14(0, c1, c5, 4)
160 #define WCP14_DBGDTRTXint(val) MCR14(val, 0, c0, c5, 0)
175 #define WCP14_DBGBVR5(val) MCR14(val, 0, c0, c5, 4)
191 #define WCP14_DBGBCR5(val) MCR14(val, 0, c0, c5, 5)
207 #define WCP14_DBGWVR5(val) MCR14(val, 0, c0, c5, 6)
223 #define WCP14_DBGWCR5(val) MCR14(val, 0, c0, c5, 7)
239 #define WCP14_DBGBXVR5(val) MCR14(val, 0, c1, c5, 1)
286 #define RCP14_ETMSCR() MRC14(1, c0, c5, 0)
302 #define RCP14_ETMACVR5() MRC14(1, c0, c5, 1)
318 #define RCP14_ETMACTR5() MRC14(1, c0, c5, 2)
350 #define RCP14_ETMCNTENR1() MRC14(1, c0, c5, 5)
366 #define RCP14_ETMSQ13EVR() MRC14(1, c0, c5, 6)
381 #define RCP14_ETMIMPSPEC5() MRC14(1, c0, c5, 7)
399 #define RCP14_ETMPDSR() MRC14(1, c1, c5, 4)
408 #define RCP14_ETMPIDR5() MRC14(1, c7, c5, 7)
439 #define WCP14_ETMACVR5(val) MCR14(val, 1, c0, c5, 1)
455 #define WCP14_ETMACTR5(val) MCR14(val, 1, c0, c5, 2)
487 #define WCP14_ETMCNTENR1(val) MCR14(val, 1, c0, c5, 5)
503 #define WCP14_ETMSQ13EVR(val) MCR14(val, 1, c0, c5, 6)
518 #define WCP14_ETMIMPSPEC5(val) MCR14(val, 1, c0, c5, 7)
535 #define WCP14_ETMPDSR(val) MCR14(val, 1, c1, c5, 4)
H A Diop3xx.h269 asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (val)); write_trr1()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/volt/
H A Dgk20a.c33 int c5; member in struct:cvb_coef
42 /* MHz, c0, c1, c2, c3, c4, c5 */
76 * ((c3 * speedo / s_scale + c4 + c5 * T / t_scale) * T / t_scale)
87 DIV_ROUND_CLOSEST(coef->c5 * temp, t_scale); gk20a_volt_get_cvb_t_voltage()
/linux-4.1.27/arch/arm/mach-iop13xx/
H A Dirq.c86 asm volatile("mcr p6, 0, %0, c0, c5, 0"::"r" (val)); write_intstr_0()
93 asm volatile("mcr p6, 0, %0, c1, c5, 0"::"r" (val)); write_intstr_1()
100 asm volatile("mcr p6, 0, %0, c2, c5, 0"::"r" (val)); write_intstr_2()
107 asm volatile("mcr p6, 0, %0, c3, c5, 0"::"r" (val)); write_intstr_3()
/linux-4.1.27/arch/unicore32/boot/compressed/
H A Dhead.S87 movc p0.c5, r0, #28 @ cache invalidate all
143 movc p0.c5, r0, #14 @ flush dcache
145 movc p0.c5, r0, #20 @ icache invalidate all
/linux-4.1.27/arch/powerpc/crypto/
H A Daes-tab-4k.S41 .long R(de, 6f, 6f, b1), R(91, c5, c5, 54)
86 .long R(bb, d0, d0, 6b), R(c5, ef, ef, 2a)
88 .long R(86, 43, 43, c5), R(9a, 4d, 4d, d7)
175 .long R(4f, e5, d7, fc), R(c5, 2a, cb, d7)
198 .long R(86, c5, 7b, 9a), R(d3, 37, 08, a5)
227 .long R(80, c0, c5, 4f), R(61, dc, 20, a2)
236 .long R(44, 66, 3b, c5), R(5b, fb, 7e, 34)
/linux-4.1.27/arch/arm/mach-spear/
H A Dhotplug.c24 " mcr p15, 0, %1, c7, c5, 0\n" cpu_enter_lowpower()
/linux-4.1.27/arch/arm/mach-imx/
H A Dhotplug.c25 "mcr p15, 0, %1, c7, c5, 0\n" cpu_enter_lowpower()
H A Dsuspend-imx6.S312 mcr p15, 0, r6, c7, c5, 0
313 mcr p15, 0, r6, c7, c5, 6
H A Dmm-imx3.c51 "mcr p15, 0, %0, c7, c5, 0\n" imx3_idle()
/linux-4.1.27/arch/arm/boot/compressed/
H A Dhead.S33 mcr p14, 0, \ch, c0, c5, 0
627 mcr p15, 0, r0, c5, c0, 1 @ I-access permission
628 mcr p15, 0, r0, c5, c0, 0 @ D-access permission
632 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
642 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
655 mcr p15, 0, r0, c5, c0, 0 @ access permission
784 mcr p15, 0, r0, c7, c5, 4 @ ISB
788 mcr p15, 0, r0, c7, c5, 4 @ ISB
1052 mcr p15, 0, r0, c7, c5, 0 @ flush I-Cache
1088 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTC
1090 mcr p15, 0, r0, c7, c5, 4 @ ISB
1121 mcrne p15, 0, ip, c7, c5, 0 @ invalidate I cache
1130 mcr p15, 0, r1, c7, c5, 0 @ flush I cache
1138 mcr p15, 0, r1, c7, c5, 0 @ invalidate I+BTB
1167 mcr p15, 0, r10, c7, c5, 4 @ isb to sych the new cssr&csidr
1200 mcr p15, 0, r10, c7, c5, 0 @ invalidate I+BTB
1202 mcr p15, 0, r10, c7, c5, 4 @ ISB
1210 mcr p15, 0, r0, c7, c5, 0 @ flush I cache
1243 mcr p15, 0, r1, c7, c5, 0 @ flush I cache
H A Dmisc.c45 asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); icedcc_putc()
/linux-4.1.27/arch/unicore32/kernel/
H A Dsleep.S70 movc p0.c5, r1, #14
172 movc p0.c5, r1, #28 @ invalidate I & D caches, BTB
H A Dhead.S133 movc p0.c5, r0, #28 @ cache invalidate all
H A Dsetup.c323 "Cache clean\t: cp0 c5 ops\n" c_show()
H A Dentry.S303 movc p0.c5, r0, #14
/linux-4.1.27/arch/arm/kvm/
H A Dinterrupts_head.S281 mrc p15, 0, r6, c5, c0, 0 @ DFSR
282 mrc p15, 0, r7, c5, c0, 1 @ IFSR
283 mrc p15, 0, r8, c5, c1, 0 @ ADFSR
284 mrc p15, 0, r9, c5, c1, 1 @ AIFSR
364 mcr p15, 0, r6, c5, c0, 0 @ DFSR
365 mcr p15, 0, r7, c5, c0, 1 @ IFSR
366 mcr p15, 0, r8, c5, c1, 0 @ ADFSR
367 mcr p15, 0, r9, c5, c1, 1 @ AIFSR
H A Dinterrupts.S289 mrc p15, 4, r2, c5, c2, 0 @ HSR
295 mrc p15, 4, r2, c5, c2, 0 @ HSR
362 mrc p15, 4, r1, c5, c2, 0 @ HSR
435 mrc p15, 4, r1, c5, c2, 0 @ HSR
/linux-4.1.27/arch/arm/mach-realview/
H A Dhotplug.c23 " mcr p15, 0, %1, c7, c5, 0\n" cpu_enter_lowpower()
/linux-4.1.27/arch/arm/mach-vexpress/
H A Dhotplug.c23 "mcr p15, 0, %1, c7, c5, 0\n" cpu_enter_lowpower()
/linux-4.1.27/arch/arm/mach-iop13xx/include/mach/
H A Dtime.h119 asm volatile("mcr p6, 0, %0, c5, c9, 0" : : "r" (val)); write_trr1()
/linux-4.1.27/arch/unicore32/include/asm/
H A Dtlbflush.h149 asm("movc p0.c5, %0, #14; nop; nop; nop; nop; nop; nop; nop; nop" flush_pmd_entry()
158 asm("movc p0.c5, %0, #11; nop; nop; nop; nop; nop; nop; nop; nop" clean_pmd_entry()
162 asm("movc p0.c5, %0, #10; nop; nop; nop; nop; nop; nop; nop; nop" clean_pmd_entry()
H A Dcacheflush.h131 asm("movc p0.c5, %0, #20;\n" __flush_icache_all()
/linux-4.1.27/arch/x86/crypto/sha-mb/
H A Dsha1_x8_avx2.S74 # r2 = {c7 c6 c5 c4 c3 c2 c1 c0}
87 # r5 = {h5 g5 f5 e5 d5 c5 b5 a5}
96 vshufps $0x44, \r3, \r2, \t1 # t1 = {d5 d4 c5 c4 d1 d0 c1 c0}
98 vshufps $0xDD, \t1, \t0, \r3 # r3 = {d5 c5 b5 a5 d1 c1 b1 a1}
/linux-4.1.27/arch/arm/mach-pxa/
H A Dirq.c115 __asm__ __volatile__("mrc p6, 0, %0, c5, c0, 0\n": "=r"(ichp)); ichp_handle_irq()
/linux-4.1.27/drivers/media/tuners/
H A Dtda9887.c87 #define cDeemphasisOFF 0x00 // bit c5
88 #define cDeemphasisON 0x20 // bit c5
/linux-4.1.27/arch/arm64/kernel/
H A Darmv8_deprecated.c491 * isb - mcr p15, 0, Rt, c7, c5, 4 cp15barrier_handler()
497 "mcr p15, 0, Rt, c7, c5, 4 ; isb", regs->pc); cp15barrier_handler()
/linux-4.1.27/arch/arm/kernel/
H A Dperf_event_xscale.c415 asm volatile("mrc p14, 0, %0, c5, c1, 0" : "=r" (val)); xscale2pmu_read_overflow_flags()
422 asm volatile("mcr p14, 0, %0, c5, c1, 0" : : "r" (val)); xscale2pmu_write_overflow_flags()
H A Dhw_breakpoint.c952 ARM_DBG_READ(c1, c5, 4, val); reset_ctrl_regs()
/linux-4.1.27/drivers/media/usb/gspca/
H A Dzc3xx.c171 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
260 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
1277 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
1341 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
2821 {0xaa, 0xc5, 0x0020}, /* 00,c5,20,aa */
2841 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
2941 {0xaa, 0xc5, 0x0020}, /* 00,c5,20,aa */
2961 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
3110 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
3181 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
3904 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
3948 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
4922 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
4999 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc */
5339 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc, */
5398 {0xa0, 0x03, ZC3XX_R1C5_SHARPNESSMODE}, /* 01,c5,03,cc, */
/linux-4.1.27/arch/x86/kernel/
H A Duprobes.c369 * vex2: c5 rvvvvLpp (has no b bit) riprel_analyze()
402 * Encoding: 0f f7 modrm, 66 0f f7 modrm, vex-encoded: c5 f9 f7 modrm. riprel_analyze()
/linux-4.1.27/fs/hpfs/
H A Dhpfs.h113 __le32 magic1; /* fa52 29c5, more magic? */
/linux-4.1.27/tools/perf/util/
H A Dsvghelper.c135 fprintf(svgfile, " rect.c5 { fill:rgb(255, 44, 44); fill-opacity:0.5; stroke-width:0; } \n"); open_svg()
/linux-4.1.27/include/linux/
H A Dhyperv.h1002 * {f8615163-df3e-46c5-913f-f2d2f965ed0e}
/linux-4.1.27/drivers/staging/xgifb/
H A DXGI_main_26.c44 pr_debug("i 3c5 => %x\n", reg); dumpVGAReg()
/linux-4.1.27/arch/arm/mach-omap2/
H A Dmux34xx.c822 _OMAP3_BALLENTRY(GPMC_NCS7, "c5", NULL),
/linux-4.1.27/drivers/gpu/drm/i915/
H A Di915_reg.h4796 * |yg| = |c3 c4 c5| x |yg + yg_ioff| + |yg_ooff|

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