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Searched refs:UL (Results 1 – 200 of 558) sorted by relevance

123

/linux-4.1.27/arch/ia64/kernel/
Dperfmon_itanium.h11 /* pmc0 */ { PFM_REG_CONTROL , 0, 0x1UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
12 /* pmc1 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
13 /* pmc2 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
14 /* pmc3 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
15 … */ { PFM_REG_COUNTING, 6, 0x0UL, -1UL, NULL, NULL, {RDEP(4),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
16 … */ { PFM_REG_COUNTING, 6, 0x0UL, -1UL, NULL, NULL, {RDEP(5),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
17 … */ { PFM_REG_COUNTING, 6, 0x0UL, -1UL, NULL, NULL, {RDEP(6),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
18 … */ { PFM_REG_COUNTING, 6, 0x0UL, -1UL, NULL, NULL, {RDEP(7),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
19 …REG_CONFIG , 0, 0xf00000003ffffff8UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
20 …REG_CONFIG , 0, 0xf00000003ffffff8UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
[all …]
Dperfmon_mckinley.h11 /* pmc0 */ { PFM_REG_CONTROL , 0, 0x1UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
12 /* pmc1 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
13 /* pmc2 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
14 /* pmc3 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
15 …00000800000UL, 0xfffff7fUL, NULL, pfm_mck_pmc_check, {RDEP(4),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
16 …NG, 6, 0x0UL, 0xfffff7fUL, NULL, pfm_mck_pmc_check, {RDEP(5),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
17 …NG, 6, 0x0UL, 0xfffff7fUL, NULL, pfm_mck_pmc_check, {RDEP(6),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
18 …NG, 6, 0x0UL, 0xfffff7fUL, NULL, pfm_mck_pmc_check, {RDEP(7),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
19 …ffffffUL, 0xffffffff3ffffffbUL, NULL, pfm_mck_pmc_check, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
20 …fffffcUL, 0xffffffff3ffffffbUL, NULL, pfm_mck_pmc_check, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
[all …]
Dperfmon_generic.h10 /* pmc0 */ { PFM_REG_CONTROL , 0, 0x1UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
11 /* pmc1 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
12 /* pmc2 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
13 /* pmc3 */ { PFM_REG_CONTROL , 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL…
14 … */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(4),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
15 … */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(5),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
16 … */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(6),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
17 … */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {RDEP(7),0UL, 0UL, 0UL}, {0UL,0UL, 0UL, 0UL}},
26 …4 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(4),0UL, 0UL, 0UL}…
27 …5 */ { PFM_REG_COUNTING, 0, 0x0UL, -1UL, NULL, NULL, {0UL,0UL, 0UL, 0UL}, {RDEP(5),0UL, 0UL, 0UL}…
[all …]
Dperfmon.c65 #define PFM_INVALID_ACTIVATION (~0UL)
127 #define CTX_IS_USED_PMD(ctx, c) (((ctx)->ctx_used_pmds[0] & (1UL << (c))) != 0UL)
599 return 0UL; in pfm_protect_ctx_ctxsw()
715 ia64_set_pmc(0,0UL); in pfm_unfreeze_pmu()
978 if ((mask & 0x1) == 0UL) continue; in pfm_mask_monitoring()
1062 if ((mask & 0x1) == 0UL) continue; in pfm_restore_monitoring()
1346 if (pfm_sessions.pfs_task_sessions > 0UL) { in pfm_reserve_session()
1452 if (task->mm == NULL || size == 0UL || vaddr == NULL) { in pfm_remove_smpl_mapping()
1502 ctx->ctx_smpl_size = 0UL;
1816 unsigned long smpl_buf_size = 0UL; in pfm_flush()
[all …]
Dperfmon_default_smpl.c87 hdr->hdr_overflows = 0UL; in default_init()
88 hdr->hdr_count = 0UL; in default_init()
236 hdr->hdr_count = 0UL; in default_restart()
Defi.c57 static u64 mem_limit = ~0UL, max_addr = ~0UL, min_addr = 0UL;
311 for (k = kern_memmap; k->start != ~0UL; k++) { in walk()
501 if (min_addr != 0UL) in efi_init()
504 if (max_addr != ~0UL) in efi_init()
714 for (md = kern_memmap; md->start != ~0UL; md++) { in kern_memory_descriptor()
1310 return ~0UL; in kdump_find_rsvd_region()
Dsetup.c129 unsigned long ia64_max_iommu_merge_mask = ~0UL;
303 if (base != ~0UL) { in setup_crashkernel()
385 rsvd_region[n].start = ~0UL; in reserve_memory()
386 rsvd_region[n].end = ~0UL; in reserve_memory()
/linux-4.1.27/arch/sparc/include/uapi/asm/
Dpstate.h13 #define PSTATE_IG _AC(0x0000000000000800,UL) /* Interrupt Globals. */
14 #define PSTATE_MG _AC(0x0000000000000400,UL) /* MMU Globals. */
15 #define PSTATE_CLE _AC(0x0000000000000200,UL) /* Current Little Endian.*/
16 #define PSTATE_TLE _AC(0x0000000000000100,UL) /* Trap Little Endian. */
17 #define PSTATE_MM _AC(0x00000000000000c0,UL) /* Memory Model. */
18 #define PSTATE_TSO _AC(0x0000000000000000,UL) /* MM: TotalStoreOrder */
19 #define PSTATE_PSO _AC(0x0000000000000040,UL) /* MM: PartialStoreOrder */
20 #define PSTATE_RMO _AC(0x0000000000000080,UL) /* MM: RelaxedMemoryOrder*/
21 #define PSTATE_RED _AC(0x0000000000000020,UL) /* Reset Error Debug. */
22 #define PSTATE_PEF _AC(0x0000000000000010,UL) /* Floating Point Enable.*/
[all …]
/linux-4.1.27/arch/arm64/include/asm/
Dkvm_arm.h26 #define HCR_ID (UL(1) << 33)
27 #define HCR_CD (UL(1) << 32)
29 #define HCR_RW (UL(1) << HCR_RW_SHIFT)
30 #define HCR_TRVM (UL(1) << 30)
31 #define HCR_HCD (UL(1) << 29)
32 #define HCR_TDZ (UL(1) << 28)
33 #define HCR_TGE (UL(1) << 27)
34 #define HCR_TVM (UL(1) << 26)
35 #define HCR_TTLB (UL(1) << 25)
36 #define HCR_TPU (UL(1) << 24)
[all …]
Dpgtable-hwdef.h26 #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
36 #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
46 #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
54 #define SECTION_SIZE (_AC(1, UL) << SECTION_SHIFT)
140 #define PHYS_MASK ((UL(1) << PHYS_MASK_SHIFT) - 1)
147 #define TCR_T0SZ(x) ((UL(64) - (x)) << TCR_T0SZ_OFFSET)
148 #define TCR_T1SZ(x) ((UL(64) - (x)) << TCR_T1SZ_OFFSET)
151 #define TCR_IRGN_NC ((UL(0) << 8) | (UL(0) << 24))
152 #define TCR_IRGN_WBWA ((UL(1) << 8) | (UL(1) << 24))
153 #define TCR_IRGN_WT ((UL(2) << 8) | (UL(2) << 24))
[all …]
Desr.h74 #define ESR_ELx_EC_MASK (UL(0x3F) << ESR_ELx_EC_SHIFT)
76 #define ESR_ELx_IL (UL(1) << 25)
78 #define ESR_ELx_ISV (UL(1) << 24)
80 #define ESR_ELx_SAS (UL(3) << ESR_ELx_SAS_SHIFT)
81 #define ESR_ELx_SSE (UL(1) << 21)
83 #define ESR_ELx_SRT_MASK (UL(0x1F) << ESR_ELx_SRT_SHIFT)
84 #define ESR_ELx_SF (UL(1) << 15)
85 #define ESR_ELx_AR (UL(1) << 14)
86 #define ESR_ELx_EA (UL(1) << 9)
87 #define ESR_ELx_CM (UL(1) << 8)
[all …]
Dmemory.h33 #define UL(x) _AC(x, UL) macro
51 #define PAGE_OFFSET (UL(0xffffffffffffffff) << (VA_BITS - 1))
57 #define TASK_SIZE_64 (UL(1) << VA_BITS)
60 #define TASK_SIZE_32 UL(0x100000000)
Dpage.h28 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
/linux-4.1.27/arch/arm/mach-spear/include/mach/
Dspear.h21 #define SPEAR_ICM1_2_BASE UL(0xD0000000)
23 #define SPEAR_ICM1_UART_BASE UL(0xD0000000)
25 #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
28 #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
32 #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
34 #define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
35 #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
37 #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000)
49 #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000)
54 #define PERIP_GRP2_BASE UL(0xB3000000)
[all …]
/linux-4.1.27/arch/sparc/include/asm/
Ddcu.h7 #define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
8 #define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
9 #define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */
10 #define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */
11 #define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */
12 #define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */
13 #define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */
14 #define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
15 #define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */
16 #define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */
[all …]
Dsfafsr.h8 #define SFAFSR_ME (_AC(1,UL) << SFAFSR_ME_SHIFT)
10 #define SFAFSR_PRIV (_AC(1,UL) << SFAFSR_PRIV_SHIFT)
12 #define SFAFSR_ISAP (_AC(1,UL) << SFAFSR_ISAP_SHIFT)
14 #define SFAFSR_ETP (_AC(1,UL) << SFAFSR_ETP_SHIFT)
16 #define SFAFSR_IVUE (_AC(1,UL) << SFAFSR_IVUE_SHIFT)
18 #define SFAFSR_TO (_AC(1,UL) << SFAFSR_TO_SHIFT)
20 #define SFAFSR_BERR (_AC(1,UL) << SFAFSR_BERR_SHIFT)
22 #define SFAFSR_LDP (_AC(1,UL) << SFAFSR_LDP_SHIFT)
24 #define SFAFSR_CP (_AC(1,UL) << SFAFSR_CP_SHIFT)
26 #define SFAFSR_WP (_AC(1,UL) << SFAFSR_WP_SHIFT)
[all …]
Dpgtable_64.h34 #define TLBTEMP_BASE _AC(0x0000000006000000,UL)
35 #define TSBMAP_8K_BASE _AC(0x0000000008000000,UL)
36 #define TSBMAP_4M_BASE _AC(0x0000000008400000,UL)
37 #define MODULES_VADDR _AC(0x0000000010000000,UL)
38 #define MODULES_LEN _AC(0x00000000e0000000,UL)
39 #define MODULES_END _AC(0x00000000f0000000,UL)
40 #define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL)
41 #define HI_OBP_ADDRESS _AC(0x0000000100000000,UL)
42 #define VMALLOC_START _AC(0x0000000100000000,UL)
49 #define PMD_SIZE (_AC(1,UL) << PMD_SHIFT)
[all …]
Dlsu.h7 #define LSU_CONTROL_PM _AC(0x000001fe00000000,UL) /* Phys-watchpoint byte mask*/
8 #define LSU_CONTROL_VM _AC(0x00000001fe000000,UL) /* Virt-watchpoint byte mask*/
9 #define LSU_CONTROL_PR _AC(0x0000000001000000,UL) /* Phys-rd watchpoint enable*/
10 #define LSU_CONTROL_PW _AC(0x0000000000800000,UL) /* Phys-wr watchpoint enable*/
11 #define LSU_CONTROL_VR _AC(0x0000000000400000,UL) /* Virt-rd watchpoint enable*/
12 #define LSU_CONTROL_VW _AC(0x0000000000200000,UL) /* Virt-wr watchpoint enable*/
13 #define LSU_CONTROL_FM _AC(0x00000000000ffff0,UL) /* Parity mask enables. */
14 #define LSU_CONTROL_DM _AC(0x0000000000000008,UL) /* Data MMU enable. */
15 #define LSU_CONTROL_IM _AC(0x0000000000000004,UL) /* Instruction MMU enable. */
16 #define LSU_CONTROL_DC _AC(0x0000000000000002,UL) /* Data cache enable. */
[all …]
Dmmu_64.h10 #define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL))
19 #define CTX_VERSION_MASK ((~0UL) << CTX_VERSION_SHIFT)
21 #define CTX_PGSZ_8KB _AC(0x0,UL)
22 #define CTX_PGSZ_64KB _AC(0x1,UL)
23 #define CTX_PGSZ_512KB _AC(0x2,UL)
24 #define CTX_PGSZ_4MB _AC(0x3,UL)
25 #define CTX_PGSZ_BITS _AC(0x7,UL)
55 #define CTX_FIRST_VERSION ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL))
Dpci_32.h14 #define PCIBIOS_MIN_IO 0UL
15 #define PCIBIOS_MIN_MEM 0UL
31 *strategy_parameter = ~0UL; in pci_dma_burst_advice()
Dpage_64.h8 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
21 #define REAL_HPAGE_SIZE (_AC(1,UL) << REAL_HPAGE_SHIFT)
24 #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
115 _AC(0x0000000070000000,UL) : \
Dpci_64.h14 #define PCIBIOS_MIN_IO 0UL
15 #define PCIBIOS_MIN_MEM 0UL
Dchafsr.h221 #define CHAFSR_E_SYNDROME (0x1ffUL << 0UL) /* ch,ch+,jp */
222 #define CHAFSR_E_SYNDROME_SHIFT 0UL
Dpgtable_32.h47 #define FIRST_USER_ADDRESS 0UL
272 return ~0UL; in pte_pfn()
441 #define VMALLOC_START _AC(0xfe600000,UL)
442 #define VMALLOC_END _AC(0xffc00000,UL)
Duaccess.h10 (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
Dspinlock_64.h59 return (result == 0UL); in arch_spin_trylock()
/linux-4.1.27/arch/mips/include/asm/mach-generic/
Dspaces.h19 #define PHYS_OFFSET _AC(0, UL)
24 #define CAC_BASE _AC(0x40000000, UL)
26 #define CAC_BASE _AC(0x80000000, UL)
29 #define IO_BASE _AC(0xa0000000, UL)
32 #define UNCAC_BASE _AC(0xa0000000, UL)
37 #define MAP_BASE _AC(0x60000000, UL)
39 #define MAP_BASE _AC(0xc0000000, UL)
47 #define HIGHMEM_START _AC(0x20000000, UL)
56 #define CAC_BASE _AC(0x9800000000000000, UL)
58 #define CAC_BASE _AC(0xa800000000000000, UL)
[all …]
/linux-4.1.27/arch/x86/kernel/cpu/mtrr/
Dcyrix.c242 {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL},
243 {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}, {0UL, 0UL, 0UL}
/linux-4.1.27/arch/x86/include/asm/
Dpgtable_64_types.h48 #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
50 #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
52 #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
56 #define MAXMEM _AC(__AC(1, UL) << MAX_PHYSMEM_BITS, UL)
57 #define VMALLOC_START _AC(0xffffc90000000000, UL)
58 #define VMALLOC_END _AC(0xffffe8ffffffffff, UL)
59 #define VMEMMAP_START _AC(0xffffea0000000000, UL)
61 #define MODULES_END _AC(0xffffffffff000000, UL)
63 #define ESPFIX_PGD_ENTRY _AC(-2, UL)
65 #define EFI_VA_START ( -4 * (_AC(1, UL) << 30))
[all …]
Ddebugreg.h78 set_debugreg(0UL, 7); in hw_breakpoint_disable()
81 set_debugreg(0UL, 0); in hw_breakpoint_disable()
82 set_debugreg(0UL, 1); in hw_breakpoint_disable()
83 set_debugreg(0UL, 2); in hw_breakpoint_disable()
84 set_debugreg(0UL, 3); in hw_breakpoint_disable()
Dtlb.h11 flush_tlb_mm_range(tlb->mm, tlb->start, tlb->end, 0UL); \
13 flush_tlb_mm_range(tlb->mm, 0UL, TLB_FLUSH_ALL, 0UL); \
Dpage_64_types.h29 #define PUD_PAGE_SIZE (_AC(1, UL) << PUD_SHIFT)
38 #define __PAGE_OFFSET _AC(0xffff880000000000, UL)
40 #define __START_KERNEL_map _AC(0xffffffff80000000, UL)
Dpage_types.h9 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
20 #define PMD_PAGE_SIZE (_AC(1, UL) << PMD_SHIFT)
24 #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
Dmpspec.h148 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
149 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
Dtlbflush.h235 #define flush_tlb_mm(mm) flush_tlb_mm_range(mm, 0UL, TLB_FLUSH_ALL, 0UL)
Dboot.h19 #define MIN_KERNEL_ALIGN (_AC(1, UL) << MIN_KERNEL_ALIGN_LG2)
Dpage_32_types.h16 #define __PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
/linux-4.1.27/arch/sparc/kernel/
Dtraps_32.c175 { ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL,
176 ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL,
177 ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL,
178 ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL, ~0UL };
Dstarfire.c65 p->imap_slots[i] = 0UL; in starfire_hookup()
94 p->imap_slots[i] == 0UL) in starfire_translate()
Dpci_impl.h29 (*((STC)->strbuf_flushflag) = 0UL)
31 (*((STC)->strbuf_flushflag) != 0UL)
Dsbus.c601 (0UL << 2UL) | in sbus_iommu_init()
603 (1UL << 0UL)); in sbus_iommu_init()
626 control = (1UL << 1UL) | (1UL << 0UL); in sbus_iommu_init()
640 upa_writeq(0UL, ptag); in sbus_iommu_init()
641 upa_writeq(0UL, ltag); in sbus_iommu_init()
Dpci_common.c267 ret = ~0UL; in sun4v_read_pci_cfg()
327 ((u64)val[0] << 0UL)); in pci_get_pbm_props()
427 ((unsigned long)parent_phys_lo << 0UL)); in pci_determine_mem_io_space()
429 ((unsigned long)size_lo << 0UL)); in pci_determine_mem_io_space()
Dpci_schizo.c157 upa_writeq(0UL, err_base + (i * 8UL)); in __schizo_check_stc_error_pbm()
163 upa_writeq(0UL, tag_base + (i * 8UL)); in __schizo_check_stc_error_pbm()
164 upa_writeq(0UL, line_base + (i * 8UL)); in __schizo_check_stc_error_pbm()
206 ((lineval & SCHIZO_STCLINE_EPTR) >> 0UL), in __schizo_check_stc_error_pbm()
419 (afsr & SCHIZO_UEAFSR_ECCSYND) >> 0UL); in schizo_ue_intr()
511 (afsr & SCHIZO_UEAFSR_ECCSYND) >> 0UL); in schizo_ce_intr()
577 #define SCHIZO_PCICTRL_ARB_S (0x3fUL << 0UL) /* Safari */
578 #define SCHIZO_PCICTRL_ARB_T (0xffUL << 0UL) /* Tomatillo */
Dtraps_64.c805 if ((afsr & CHAFSR_TL1) != 0UL) in cheetah_get_error_log()
832 largest_size = 0UL; in cheetah_ecache_flush_init()
833 smallest_linesize = ~0UL; in cheetah_ecache_flush_init()
851 if (largest_size == 0UL || smallest_linesize == ~0UL) { in cheetah_ecache_flush_init()
862 if (ecache_flush_physbase == ~0UL) { in cheetah_ecache_flush_init()
1122 if ((tmp = (afsr & cheetah_error_table[i].mask)) != 0UL) in cheetah_get_hipri()
1133 if ((bit & cheetah_error_table[i].mask) != 0UL) in cheetah_get_string()
1243 while (afsr != 0UL) { in cheetah_log_errors()
1474 if (is_memory && (afsr & CHAFSR_CE) != 0UL) { in cheetah_cee_handler()
1485 if ((afsr & CHAFSR_EDC) != 0UL) { in cheetah_cee_handler()
[all …]
Dpsycho_common.c63 upa_writeq(0UL, err_base + (i * 8UL)); in psycho_check_stc_error()
69 upa_writeq(0UL, tag_base + (i * 8UL)); in psycho_check_stc_error()
70 upa_writeq(0UL, line_base + (i * 8UL)); in psycho_check_stc_error()
/linux-4.1.27/tools/lib/lockdep/uinclude/linux/
Dhardirq.h4 #define SOFTIRQ_BITS 0UL
5 #define HARDIRQ_BITS 0UL
6 #define SOFTIRQ_SHIFT 0UL
7 #define HARDIRQ_SHIFT 0UL
8 #define hardirq_count() 0UL
9 #define softirq_count() 0UL
/linux-4.1.27/arch/arm/include/asm/
Dmemory.h31 #define UL(x) _AC(x, UL) macro
34 #define PAGE_OFFSET UL(CONFIG_PAGE_OFFSET)
42 #define TASK_SIZE (UL(CONFIG_PAGE_OFFSET) - UL(SZ_16M))
48 #define TASK_SIZE_26 (UL(1) << 26)
94 #define TASK_SIZE UL(0xffffffff)
97 #define TASK_UNMAPPED_BASE UL(0x00000000)
101 #define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE)
119 #define ITCM_OFFSET UL(0xfffe0000)
120 #define DTCM_OFFSET UL(0xfffe8000)
155 #define PLAT_PHYS_OFFSET UL(CONFIG_PHYS_OFFSET)
Dpgtable-nommu.h85 #define VMALLOC_START 0UL
88 #define FIRST_USER_ADDRESS 0UL
Dpci.h40 *strategy_parameter = ~0UL; in pci_dma_burst_advice()
Ddelay.h13 #define UDELAY_MULT ((UL(2199023) * HZ) >> 11)
Dkvm_mmu.h29 #define HYP_PAGE_OFFSET_MASK UL(~0)
38 #define TRAMPOLINE_VA UL(CONFIG_VECTORS_BASE)
Dcp15.h108 #define cr_alignment UL(0)
Dpage.h15 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
/linux-4.1.27/arch/m68k/mm/
Dinit.c124 #define UL(x) ((unsigned long) (x)) in print_memmap() macro
125 #define MLK(b, t) UL(b), UL(t), (UL(t) - UL(b)) >> 10 in print_memmap()
126 #define MLM(b, t) UL(b), UL(t), (UL(t) - UL(b)) >> 20 in print_memmap()
/linux-4.1.27/tools/lib/util/
Dfind_next_bit.c37 tmp &= (~0UL << offset); in find_next_bit()
56 tmp &= (~0UL >> (BITS_PER_LONG - size)); in find_next_bit()
57 if (tmp == 0UL) /* Are any bits set? */ in find_next_bit()
83 tmp = (*p) & (~0UL >> (BITS_PER_LONG - size)); in find_first_bit()
84 if (tmp == 0UL) /* Are any bits set? */ in find_first_bit()
/linux-4.1.27/arch/unicore32/include/mach/
Dmemory.h18 #define PHYS_OFFSET UL(0x00000000)
20 #define VECTORS_BASE UL(0xffff0000)
22 #define KUSER_BASE UL(0x80000000)
52 #define KUSER_VECPAGE_BASE (KUSER_BASE + UL(0x3fff0000))
/linux-4.1.27/arch/tile/include/asm/
Dpage.h35 #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
36 #define HPAGE_SIZE (_AC(1, UL) << HPAGE_SHIFT)
177 #define PAGE_OFFSET (-(_AC(1, UL) << (MAX_VA_WIDTH - 1)))
178 #define KERNEL_HIGH_VADDR _AC(0xfffffff800000000, UL) /* high 32GB */
215 #define MEM_USER_INTRPT _AC(0xfc000000, UL)
216 #define MEM_SV_START _AC(0xfd000000, UL)
217 #define MEM_HV_START _AC(0xfe000000, UL)
230 #define PAGE_OFFSET _AC(CONFIG_PAGE_OFFSET, UL)
/linux-4.1.27/drivers/video/fbdev/core/
Dsysfillrect.c33 first = FB_SHIFT_HIGH(p, ~0UL, dst_idx); in bitfill_aligned()
34 last = ~(FB_SHIFT_HIGH(p, ~0UL, (dst_idx+n) % bits)); in bitfill_aligned()
45 if (first!= ~0UL) { in bitfill_aligned()
89 first = FB_SHIFT_HIGH(p, ~0UL, dst_idx); in bitfill_unaligned()
90 last = ~(FB_SHIFT_HIGH(p, ~0UL, (dst_idx+n) % bits)); in bitfill_unaligned()
144 first = FB_SHIFT_HIGH(p, ~0UL, dst_idx); in bitfill_aligned_rev()
145 last = ~(FB_SHIFT_HIGH(p, ~0UL, (dst_idx+n) % bits)); in bitfill_aligned_rev()
155 if (first!=0UL) { in bitfill_aligned_rev()
200 first = FB_SHIFT_HIGH(p, ~0UL, dst_idx); in bitfill_unaligned_rev()
201 last = ~(FB_SHIFT_HIGH(p, ~0UL, (dst_idx+n) % bits)); in bitfill_unaligned_rev()
[all …]
Dcfbfillrect.c55 if (first!= ~0UL) { in bitfill_aligned()
100 first = FB_SHIFT_HIGH(p, ~0UL, dst_idx); in bitfill_unaligned()
101 last = ~(FB_SHIFT_HIGH(p, ~0UL, (dst_idx+n) % bits)); in bitfill_unaligned()
168 if (first!=0UL) { in bitfill_aligned_rev()
226 first = FB_SHIFT_HIGH(p, ~0UL, dst_idx); in bitfill_unaligned_rev()
227 last = ~(FB_SHIFT_HIGH(p, ~0UL, (dst_idx+n) % bits)); in bitfill_unaligned_rev()
239 if (first != 0UL) { in bitfill_unaligned_rev()
Dfb_draw.h128 mask = FB_SHIFT_HIGH(p, ~0UL, index); in fb_shifted_pixels_mask_long()
137 mask |= FB_SHIFT_HIGH(p, ~0UL, in fb_shifted_pixels_mask_long()
168 #define fb_shifted_pixels_mask_long(p, i, b) FB_SHIFT_HIGH((p), ~0UL, (i))
Dsyscopyarea.c35 first = FB_SHIFT_HIGH(p, ~0UL, dst_idx); in bitcpy()
36 last = ~(FB_SHIFT_HIGH(p, ~0UL, (dst_idx+n) % bits)); in bitcpy()
48 if (first != ~0UL) { in bitcpy()
184 first = ~FB_SHIFT_HIGH(p, ~0UL, (dst_idx + 1) % bits); in bitcpy_rev()
185 last = FB_SHIFT_HIGH(p, ~0UL, (bits + dst_idx + 1 - n) % bits); in bitcpy_rev()
/linux-4.1.27/arch/x86/kernel/
Duprobes.c59 (((b0##UL << 0x0)|(b1##UL << 0x1)|(b2##UL << 0x2)|(b3##UL << 0x3) | \
60 (b4##UL << 0x4)|(b5##UL << 0x5)|(b6##UL << 0x6)|(b7##UL << 0x7) | \
61 (b8##UL << 0x8)|(b9##UL << 0x9)|(ba##UL << 0xa)|(bb##UL << 0xb) | \
62 (bc##UL << 0xc)|(bd##UL << 0xd)|(be##UL << 0xe)|(bf##UL << 0xf)) \
Dtest_rodata.c48 : [rodata_test] "r" (&rodata_test_data), [zero] "r" (0UL) in rodata_test()
Dtest_nx.c97 : [fake_code] "r" (address), [zero] "r" (0UL), "0" (result) in test_address()
Dioport.c70 if (t->io_bitmap_ptr[i] != ~0UL) in sys_ioperm()
/linux-4.1.27/arch/mips/include/asm/mach-cavium-octeon/
Dspaces.h15 #define CAC_BASE _AC(0x8000000000000000, UL)
16 #define UNCAC_BASE _AC(0x8000000000000000, UL)
17 #define IO_BASE _AC(0x8000000000000000, UL)
/linux-4.1.27/arch/mips/include/asm/mach-ar7/
Dspaces.h17 #define PAGE_OFFSET _AC(0x94000000, UL)
18 #define PHYS_OFFSET _AC(0x14000000, UL)
20 #define UNCAC_BASE _AC(0xb4000000, UL) /* 0xa0000000 + PHYS_OFFSET */
/linux-4.1.27/arch/mips/include/asm/mach-malta/
Dspaces.h36 #define PAGE_OFFSET _AC(0x0, UL)
37 #define PHYS_OFFSET _AC(0x80000000, UL)
38 #define HIGHMEM_START _AC(0xffff0000, UL)
/linux-4.1.27/arch/unicore32/include/asm/
Dmemory.h26 #define UL(x) _AC(x, UL) macro
33 #define PAGE_OFFSET UL(0xC0000000)
34 #define TASK_SIZE (PAGE_OFFSET - UL(0x41000000))
Dpci.h27 *strategy_parameter = ~0UL; in pci_dma_burst_advice()
Dpage.h17 #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
/linux-4.1.27/arch/x86/kernel/kprobes/
Dcore.c71 (((b0##UL << 0x0)|(b1##UL << 0x1)|(b2##UL << 0x2)|(b3##UL << 0x3) | \
72 (b4##UL << 0x4)|(b5##UL << 0x5)|(b6##UL << 0x6)|(b7##UL << 0x7) | \
73 (b8##UL << 0x8)|(b9##UL << 0x9)|(ba##UL << 0xa)|(bb##UL << 0xb) | \
74 (bc##UL << 0xc)|(bd##UL << 0xd)|(be##UL << 0xe)|(bf##UL << 0xf)) \
236 return 0UL; in __recover_probed_insn()
730 regs->orig_ax = ~0UL; in trampoline_handler()
/linux-4.1.27/lib/
Dfind_bit.c64 return _find_next_bit(addr, size, offset, 0UL); in find_next_bit()
73 return _find_next_bit(addr, size, offset, ~0UL); in find_next_zero_bit()
105 if (addr[idx] != ~0UL) in find_first_zero_bit()
179 return _find_next_bit_le(addr, size, offset, ~0UL); in find_next_zero_bit_le()
188 return _find_next_bit_le(addr, size, offset, 0UL); in find_next_bit_le()
Dlocking-selftest.c1181 o.ctx = (void *)~0UL; in ww_test_normal()
1184 WARN_ON(o.ctx != (void *)~0UL); in ww_test_normal()
1187 o.ctx = (void *)~0UL; in ww_test_normal()
1193 WARN_ON(o.ctx != (void *)~0UL); in ww_test_normal()
1196 o.ctx = (void *)~0UL; in ww_test_normal()
1202 WARN_ON(o.ctx != (void *)~0UL); in ww_test_normal()
1205 o.ctx = (void *)~0UL; in ww_test_normal()
1212 WARN_ON(o.ctx != (void *)~0UL); in ww_test_normal()
1215 o.ctx = (void *)~0UL; in ww_test_normal()
1220 WARN_ON(o.ctx != (void *)~0UL); in ww_test_normal()
[all …]
Ducs2_string.c19 return ucs2_strnlen(s, ~0UL); in ucs2_strlen()
/linux-4.1.27/arch/alpha/include/asm/
Dwrperfmon.h69 #define EV6_PCTR_0_CYCLES (0UL << 4)
86 #define EV67_PCTR_MODE_AGGREGATE (0UL<<4)
88 #define EV67_PCTR_INSTR_CYCLES (0UL<<2)
Dmmzone.h25 : (0UL))
29 : ((nid) ? (0UL) : (~0UL)))
Dbitops.h288 return (1UL & (((const int *) addr)[nr >> 5] >> (nr & 31))) != 0UL; in test_bit()
321 bits = __kernel_cmpbge(word, ~0UL); in ffz()
Dpage.h9 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
/linux-4.1.27/arch/arm/mach-spear/
Dspear310.c23 #define SPEAR310_UART1_BASE UL(0xB2000000)
24 #define SPEAR310_UART2_BASE UL(0xB2080000)
25 #define SPEAR310_UART3_BASE UL(0xB2100000)
26 #define SPEAR310_UART4_BASE UL(0xB2180000)
27 #define SPEAR310_UART5_BASE UL(0xB2200000)
Dspear320.c25 #define SPEAR320_UART1_BASE UL(0xA3000000)
26 #define SPEAR320_UART2_BASE UL(0xA4000000)
27 #define SPEAR320_SSP0_BASE UL(0xA5000000)
28 #define SPEAR320_SSP1_BASE UL(0xA6000000)
Dspear1310.c25 #define SPEAR1310_RAS_GRP1_BASE UL(0xD8000000)
26 #define VA_SPEAR1310_RAS_GRP1_BASE UL(0xFA000000)
/linux-4.1.27/arch/s390/lib/
Dfind.c32 tmp = (*p) & (~0UL << (BITS_PER_LONG - size)); in find_first_bit_inv()
53 tmp &= (~0UL >> offset); in find_next_bit_inv()
71 tmp &= (~0UL << (BITS_PER_LONG - size)); in find_next_bit_inv()
/linux-4.1.27/arch/m32r/include/asm/
Dm32r_mp_fpga.h180 #define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
187 #define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
250 #define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
261 #define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
265 #define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
Dm32102.h138 #define M32R_MFTMOD_GTSEL000 (0UL<<8) /* b21-23 : 000 */
145 #define M32R_MFTMOD_CSSEL000 (0UL<<0) /* b29-b31 : 000 */
214 #define M32R_ICUIMASK_IMSK0 (0UL<<16) /* b13-b15: Disable interrupt */
225 #define M32R_ICUCR_ISMOD00 (0UL<<4) /* b26-b27: Interrupt sense mode Edge HtoL */
229 #define M32R_ICUCR_ILEVEL0 (0UL<<0) /* b29-b31: Interrupt priority level 0 */
Dsmp.h51 #define PHYSID_MASK_ALL { {[0 ... PHYSID_ARRAY_SIZE-1] = ~0UL} }
52 #define PHYSID_MASK_NONE { {[0 ... PHYSID_ARRAY_SIZE-1] = 0UL} }
Dpage.h8 #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
/linux-4.1.27/drivers/oprofile/
Devent_buffer.h30 #define INVALID_COOKIE ~0UL
31 #define NO_COOKIE 0UL
/linux-4.1.27/drivers/md/
Ddm-cache-metadata.h48 #define DM_CACHE_FEATURE_COMPAT_SUPP 0UL
49 #define DM_CACHE_FEATURE_COMPAT_RO_SUPP 0UL
50 #define DM_CACHE_FEATURE_INCOMPAT_SUPP 0UL
Ddm-thin-metadata.h54 #define THIN_FEATURE_COMPAT_SUPP 0UL
55 #define THIN_FEATURE_COMPAT_RO_SUPP 0UL
56 #define THIN_FEATURE_INCOMPAT_SUPP 0UL
/linux-4.1.27/include/linux/irqchip/
Darm-gic-v3.h192 #define GITS_CBASER_nCnB (0UL << 59)
201 #define GITS_CBASER_NonShareable (0UL << 10)
209 #define GITS_BASER_nCnB (0UL << 59)
222 #define GITS_BASER_NonShareable (0UL << 10)
228 #define GITS_BASER_PAGE_SIZE_4K (0UL << GITS_BASER_PAGE_SIZE_SHIFT)
/linux-4.1.27/arch/mips/pci/
Dpci-ip27.c58 ioport_resource.end = ~0UL; in bridge_probe()
71 bc->mem.end = ~0UL; in bridge_probe()
76 bc->io.start = 0UL; in bridge_probe()
77 bc->io.end = ~0UL; in bridge_probe()
/linux-4.1.27/arch/powerpc/platforms/pseries/
Dhvcserver.c150 last_p_partition_ID = last_p_unit_address = ~0UL; in hvcs_get_partner_info()
170 if (last_p_partition_ID == ~0UL in hvcs_get_partner_info()
171 && last_p_unit_address == ~0UL) in hvcs_get_partner_info()
/linux-4.1.27/drivers/gpu/drm/rockchip/
Ddw_hdmi-rockchip.c107 ~0UL, {
132 ~0UL, { 0x0000, 0x0000, 0x0000},
141 { ~0UL, 0x0000, 0x0000, 0x0000}
166 for (i = 0; mpll_cfg[i].mpixelclock != (~0UL); i++) { in dw_hdmi_rockchip_mode_valid()
/linux-4.1.27/include/xen/interface/
Dxen.h378 #define UVMF_NONE (0UL<<0) /* No flushing at all. */
382 #define UVMF_MULTI (0UL<<2) /* Flush subset of TLBs. */
383 #define UVMF_LOCAL (0UL<<2) /* Flush local TLB. */
725 #define __mk_unsigned_long(x) x ## UL
/linux-4.1.27/arch/ia64/include/asm/
Dpgtable.h130 #define FIRST_USER_ADDRESS 0UL
266 #define pte_clear(mm,addr,pte) (pte_val(*(pte)) = 0UL)
272 #define pmd_present(pmd) (pmd_val(pmd) != 0UL)
273 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0UL)
279 #define pud_present(pud) (pud_val(pud) != 0UL)
280 #define pud_clear(pudp) (pud_val(*(pudp)) = 0UL)
287 #define pgd_present(pgd) (pgd_val(pgd) != 0UL)
288 #define pgd_clear(pgdp) (pgd_val(*(pgdp)) = 0UL)
Dtlb.h141 tlb->start_addr = ~0UL; in ia64_tlb_flush_mmu_free()
180 tlb->start_addr = ~0UL; in tlb_gather_mmu()
249 if (tlb->start_addr == ~0UL) in __tlb_remove_tlb_entry()
Dpci.h51 #define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
/linux-4.1.27/kernel/debug/kdb/
Dkdb_bt.c150 return kdb_bt1(p, ~0UL, argcount, 0); in kdb_bt()
161 return kdb_bt1((struct task_struct *)addr, ~0UL, argcount, 0); in kdb_bt()
204 return kdb_bt1(kdb_current_task, ~0UL, argcount, 0); in kdb_bt()
/linux-4.1.27/arch/x86/include/uapi/asm/
Dprocessor-flags.h31 #define X86_EFLAGS_IOPL (_AC(3,UL) << X86_EFLAGS_IOPL_BIT)
82 #define X86_CR3_PCID_MASK _AC(0x00000fff,UL) /* PCID Mask */
127 #define X86_CR8_TPR _AC(0x0000000f,UL) /* task priority register */
/linux-4.1.27/drivers/char/
Dmmtimer.c108 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL); in mmtimer_setup_int_0()
137 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL); in mmtimer_setup_int_1()
159 HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL); in mmtimer_setup_int_2()
212 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL); in mmtimer_disable_int()
216 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL); in mmtimer_disable_int()
220 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL); in mmtimer_disable_int()
/linux-4.1.27/tools/perf/util/include/linux/
Dbitmap.h17 (1UL<<((nbits) % BITS_PER_LONG))-1 : ~0UL \
26 *dst = 0UL; in bitmap_zero()
/linux-4.1.27/arch/avr32/mach-at32ap/
Dextint.c217 eic_writel(eic, IDR, ~0UL); in eic_probe()
218 eic_writel(eic, MODE, ~0UL); in eic_probe()
223 eic_writel(eic, EDGE, 0UL); in eic_probe()
224 eic_writel(eic, LEVEL, 0UL); in eic_probe()
/linux-4.1.27/arch/alpha/kernel/
Dsys_titan.c47 static unsigned long titan_cpu_irq_affinity[4] = { ~0UL, ~0UL, ~0UL, ~0UL };
Dsys_dp264.c42 static unsigned long cpu_irq_affinity[4] = { 0UL, 0UL, 0UL, 0UL };
/linux-4.1.27/include/linux/
Dbitops.h22 (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
192 if (((u32)word) == 0UL) in __ffs64()
Dpoll.h66 return p ? p->_key : ~0UL; in poll_requested_events()
72 pt->_key = ~0UL; /* all events enabled */ in init_poll_funcptr()
Dbitmap.h175 #define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) & (BITS_PER_LONG - 1)))
176 #define BITMAP_LAST_WORD_MASK(nbits) (~0UL >> (-(nbits) & (BITS_PER_LONG - 1)))
184 *dst = 0UL; in bitmap_zero()
Dcpumask.h257 [0 ... BITS_TO_LONGS(NR_CPUS)-1] = 0UL \
775 [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \
805 [0 ... BITS_TO_LONGS(NR_CPUS)-2] = ~0UL, \
812 [0 ... BITS_TO_LONGS(NR_CPUS)-1] = 0UL \
Dshrinker.h28 #define SHRINK_STOP (~0UL)
Dpoison.h12 # define POISON_POINTER_DELTA _AC(CONFIG_ILLEGAL_POINTER_VALUE, UL)
Dkasan.h13 #define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
/linux-4.1.27/arch/ia64/mm/
Dcontig.c204 min_low_pfn = ~0UL; in find_memory()
212 bootmap_start = ~0UL; in find_memory()
214 if (bootmap_start == ~0UL) in find_memory()
/linux-4.1.27/drivers/gpu/drm/imx/
Ddw_hdmi-imx.c51 ~0UL, {
74 ~0UL, { 0x0000, 0x0000, 0x0000 },
81 { ~0UL, 0x0000, 0x0000, 0x0000}
/linux-4.1.27/arch/alpha/mm/
Dnuma.c78 node_min_pfn = ~0UL; in setup_memory_node()
79 node_max_pfn = 0UL; in setup_memory_node()
259 min_low_pfn = ~0UL; in setup_memory()
260 max_low_pfn = 0UL; in setup_memory()
/linux-4.1.27/arch/mips/alchemy/common/
Dirq.c793 __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x0); in alchemy_gpic_suspend()
794 __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x4); in alchemy_gpic_suspend()
795 __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x8); in alchemy_gpic_suspend()
796 __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0xc); in alchemy_gpic_suspend()
815 __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x0); in alchemy_gpic_resume()
816 __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x4); in alchemy_gpic_resume()
817 __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0x8); in alchemy_gpic_resume()
818 __raw_writel(~0UL, base + AU1300_GPIC_IDIS + 0xc); in alchemy_gpic_resume()
934 __raw_writel(~0UL, bank_base + AU1300_GPIC_IDIS); in alchemy_gpic_init_irq()
936 __raw_writel(~0UL, bank_base + AU1300_GPIC_IPEND); in alchemy_gpic_init_irq()
/linux-4.1.27/drivers/crypto/
Dn2_core.c558 ent->final_auth_state_addr = 0UL; in n2_do_async_digest()
559 ent->enc_key_addr = 0UL; in n2_do_async_digest()
560 ent->enc_iv_addr = 0UL; in n2_do_async_digest()
569 ent->auth_key_addr = 0UL; in n2_do_async_digest()
570 ent->auth_iv_addr = 0UL; in n2_do_async_digest()
571 ent->final_auth_state_addr = 0UL; in n2_do_async_digest()
572 ent->enc_key_addr = 0UL; in n2_do_async_digest()
573 ent->enc_iv_addr = 0UL; in n2_do_async_digest()
574 ent->dest_addr = 0UL; in n2_do_async_digest()
610 &rctx->u, 0UL, 0); in n2_hash_async_digest()
[all …]
/linux-4.1.27/drivers/scsi/sym53c8xx_2/
Dsym_glue.c2005 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
2007 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, /* new */
2009 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
2011 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
2013 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, /* new */
2015 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
2017 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_SCSI<<8, 0xffff00, 0UL },
2019 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
2021 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
2023 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
[all …]
/linux-4.1.27/arch/sh/include/asm/
Dmmu_context.h28 #define MMU_CONTEXT_VERSION_MASK (~0UL & ~MMU_CONTEXT_ASID_MASK)
33 #define NO_CONTEXT 0UL
Dsram.h15 return 0UL; in sram_alloc()
Dpgtable.h65 #define FIRST_USER_ADDRESS 0UL
/linux-4.1.27/include/net/
Daddrconf.h98 return ~0UL; in addrconf_timeout_fixup()
317 return ((p[0] ^ cpu_to_be64(0xff02000000000000UL)) | (p[1] ^ cpu_to_be64(1))) == 0UL; in ipv6_addr_is_ll_all_nodes()
329 return ((p[0] ^ cpu_to_be64(0xff02000000000000UL)) | (p[1] ^ cpu_to_be64(2))) == 0UL; in ipv6_addr_is_ll_all_routers()
348 cpu_to_be64(0xffffffffff000000UL))) == 0UL; in ipv6_addr_is_solict_mult()
/linux-4.1.27/arch/powerpc/mm/
Dpgtable_32.c58 #define v_mapped_by_bats(x) (0UL)
59 #define p_mapped_by_bats(x) (0UL)
66 #define v_mapped_by_tlbcam(x) (0UL)
67 #define p_mapped_by_tlbcam(x) (0UL)
Dmmap.c87 unsigned long random_factor = 0UL; in arch_pick_mmap_layout()
/linux-4.1.27/arch/sparc/mm/
Dtsb.c352 new_rss_limit = ~0UL; in tsb_grow()
371 new_rss_limit = ~0UL; in tsb_grow()
379 mm->context.tsb_block[tsb_index].tsb_rss_limit = ~0UL; in tsb_grow()
477 mm->context.sparc64_ctx_val = 0UL; in init_new_context()
520 tp->tsb_reg_val = 0UL; in tsb_destroy_one()
Dinit_32.c117 unsigned long end_of_phys_memory = 0UL; in bootmem_init()
121 bytes_avail = 0UL; in bootmem_init()
309 __alloc_bootmem(i << 2, SMP_CACHE_BYTES, 0UL); in mem_init()
/linux-4.1.27/arch/x86/kvm/
Dkvm_cache_regs.h58 return kvm_read_cr0_bits(vcpu, ~0UL); in kvm_read_cr0()
78 return kvm_read_cr4_bits(vcpu, ~0UL); in kvm_read_cr4()
/linux-4.1.27/arch/x86/mm/
Dtlb.c169 flush_tlb_others(mm_cpumask(mm), mm, 0UL, TLB_FLUSH_ALL); in flush_tlb_current_task()
230 start = 0UL; in flush_tlb_mm_range()
260 flush_tlb_others(mm_cpumask(mm), mm, start, 0UL); in flush_tlb_page()
Dpageattr-test.c52 s->min_exec = ~0UL; in print_split()
94 s->min_exec != ~0UL ? s->min_exec : 0, in print_split()
Dmmap.c114 unsigned long random_factor = 0UL; in arch_pick_mmap_layout()
/linux-4.1.27/arch/nios2/include/asm/
Dpgtable.h27 #define FIRST_USER_ADDRESS 0UL
189 && (pmd_val(pmd) != 0UL); in pmd_present()
221 (unsigned long) invalid_pte_table) || (pmd_val(pmd) == 0UL); in pmd_none()
Dpage.h25 #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
/linux-4.1.27/arch/mips/include/asm/mach-ip28/
Dspaces.h14 #define PHYS_OFFSET _AC(0x20000000, UL)
/linux-4.1.27/arch/mips/include/asm/mach-loongson/
Dspaces.h5 #define CAC_BASE _AC(0x9800000000000000, UL)
/linux-4.1.27/arch/sh/include/cpu-common/cpu/
Drtc.h6 #define RTC_DEF_CAPABILITIES 0UL
/linux-4.1.27/arch/xtensa/include/uapi/asm/
Dtypes.h21 # define __XTENSA_UL_CONST(x) x##UL
/linux-4.1.27/arch/ia64/include/uapi/asm/
Dtypes.h27 # define __IA64_UL_CONST(x) x##UL
/linux-4.1.27/drivers/cpufreq/
Dsh-cpufreq.c93 policy->max = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; in sh_cpufreq_verify()
128 (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; in sh_cpufreq_cpu_init()
Dat32ap-cpufreq.c69 frequency = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; in at32_cpufreq_driver_init()
/linux-4.1.27/arch/mips/include/asm/
Dpage.h35 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
63 #define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT)
Dpci.h122 *strategy_parameter = ~0UL; in pci_dma_burst_advice()
/linux-4.1.27/arch/powerpc/include/asm/
Dhugetlb.h130 return __pte(pte_update(mm, addr, ptep, ~0UL, 0, 1)); in huge_ptep_get_and_clear()
132 return __pte(pte_update(ptep, ~0UL, 0)); in huge_ptep_get_and_clear()
Dpgtable-ppc64.h15 #define FIRST_USER_ADDRESS 0UL
82 #define USER_REGION_ID (0UL)
313 unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0); in ptep_get_and_clear()
320 pte_update(mm, addr, ptep, ~0UL, 0, 0); in pte_clear()
Dvio.h38 #define VIO_IRQ_DISABLE 0UL
/linux-4.1.27/arch/mips/include/asm/mach-ip27/
Dspaces.h26 #define HIGHMEM_START (~0UL)
/linux-4.1.27/arch/avr32/mach-at32ap/include/mach/
Dsram.h20 return 0UL; in sram_alloc()
/linux-4.1.27/arch/microblaze/include/asm/
Dasm-compat.h13 # define __ASM_CONST(x) x##UL
/linux-4.1.27/arch/arm/mach-davinci/include/mach/
Dhardware.h25 #define IO_PHYS UL(0x01c00000)
/linux-4.1.27/arch/powerpc/oprofile/
Dop_model_pa6t.c173 ctr_write(i, 0UL); in pa6t_start()
223 ctr_write(i, 0UL); in pa6t_handle_interrupt()
/linux-4.1.27/drivers/iommu/
Domap-iommu.h129 ((~0UL >> MMU_CAM_VATAG_SHIFT) << MMU_CAM_VATAG_SHIFT)
141 ((~0UL >> MMU_RAM_PADDR_SHIFT) << MMU_RAM_PADDR_SHIFT)
/linux-4.1.27/include/uapi/asm-generic/
Dresource.h57 # define RLIM_INFINITY (~0UL)
/linux-4.1.27/include/asm-generic/
Dgetorder.h52 ((n) == 0UL) ? BITS_PER_LONG - PAGE_SHIFT : \
Dmemory_model.h9 #define ARCH_PFN_OFFSET (0UL)
/linux-4.1.27/kernel/time/
Dtime.c667 if (x >= ~0UL / (HZ / USER_HZ)) in clock_t_to_jiffies()
668 return ~0UL; in clock_t_to_jiffies()
672 if (x >= ~0UL / HZ * USER_HZ) in clock_t_to_jiffies()
673 return ~0UL; in clock_t_to_jiffies()
/linux-4.1.27/include/uapi/linux/
Dconst.h24 #define _BITUL(x) (_AC(1,UL) << (x))
/linux-4.1.27/security/integrity/
Diint.c76 iint->flags = 0UL; in iint_free()
156 iint->flags = 0UL; in init_once()
/linux-4.1.27/arch/powerpc/boot/
Dpage.h15 #define __ASM_CONST(x) x##UL
Dtreeboot-currituck.c93 end_of_ram = ~0UL; in platform_init()
Dtreeboot-akebono.c137 end_of_ram = ~0UL; in platform_init()
/linux-4.1.27/drivers/staging/lustre/lustre/llite/
Dvvp_lock.c66 return atomic_read(&cob->cob_mmap_cnt) > 0 ? ~0UL >> 2 : 0; in vvp_lock_weigh()
/linux-4.1.27/arch/frv/include/asm/
Dpci.h50 *strategy_parameter = ~0UL; in pci_dma_burst_advice()
/linux-4.1.27/arch/mips/vr41xx/common/
Dinit.c30 #define IO_MEM_RESOURCE_START 0UL
/linux-4.1.27/drivers/net/ethernet/arc/
Demac_rockchip.c31 #define GRF_MODE_RMII (0UL << 0)
32 #define GRF_SPEED_10M (0UL << 1)
/linux-4.1.27/arch/um/include/asm/
Dpgtable-2level.h26 #define FIRST_USER_ADDRESS 0UL
/linux-4.1.27/arch/score/include/asm/
Dthread_info.h16 #define THREAD_MASK (THREAD_SIZE - _AC(1,UL))
Dpgalloc.h26 init = pgd_offset(&init_mm, 0UL); in pgd_alloc()
Dpgtable.h16 #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
30 #define FIRST_USER_ADDRESS 0UL
/linux-4.1.27/arch/hexagon/include/asm/
Dmem-layout.h32 #define PAGE_OFFSET _AC(0xc0000000, UL)
/linux-4.1.27/arch/arm/mach-highbank/
Dsysregs.h82 writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ); in highbank_clear_pwr_request()
/linux-4.1.27/arch/nios2/mm/
Dpgtable.c60 init = pgd_offset(&init_mm, 0UL); in pgd_alloc()
/linux-4.1.27/arch/arm/mach-omap1/include/mach/
Dmemory.h22 #define OMAP1510_LB_OFFSET UL(0x30000000)
/linux-4.1.27/arch/m68k/include/asm/
Dpage.h14 #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
Dpgtable_mm.h71 #define FIRST_USER_ADDRESS 0UL
/linux-4.1.27/net/rds/
Dsysctl.c42 static unsigned long rds_sysctl_reconnect_max = ~0UL;
Diw_sysctl.c54 static unsigned long rds_iw_sysctl_max_unsig_bytes_max = ~0UL;
/linux-4.1.27/arch/arm/mach-at91/
Dsama5.c75 .l2c_aux_mask = ~0UL,
/linux-4.1.27/arch/s390/mm/
Dmmap.c240 unsigned long random_factor = 0UL; in arch_pick_mmap_layout()
278 mmap_align_mask = 0UL; in setup_mmap_rnd()
/linux-4.1.27/arch/tile/mm/
Dmmap.c61 unsigned long random_factor = 0UL; in arch_pick_mmap_layout()
/linux-4.1.27/arch/powerpc/platforms/cell/spufs/
Dswitch.c543 out_be64(&priv2->spu_privcntl_RW, 0UL); in reset_spu_privcntl()
632 u64 idx, ch_indices[] = { 0UL, 3UL, 4UL, 24UL, 25UL, 27UL }; in save_ch_part1()
649 out_be64(&priv2->spu_chnldata_RW, 0UL); in save_ch_part1()
650 out_be64(&priv2->spu_chnlcnt_RW, 0UL); in save_ch_part1()
669 out_be64(&priv2->spu_chnlcnt_RW, 0UL); in save_spu_mb()
1082 u64 ch_indices[] = { 0UL, 3UL, 4UL, 24UL, 25UL, 27UL }; in reset_ch_part1()
1091 out_be64(&priv2->spu_chnldata_RW, 0UL); in reset_ch_part1()
1098 out_be64(&priv2->spu_chnldata_RW, 0UL); in reset_ch_part1()
1099 out_be64(&priv2->spu_chnlcnt_RW, 0UL); in reset_ch_part1()
1108 u64 ch_counts[5] = { 16UL, 1UL, 1UL, 0UL, 1UL }; in reset_ch_part2()
[all …]
/linux-4.1.27/drivers/firmware/efi/libstub/
Defistub.h6 #define EFI_ERROR (~0UL)
/linux-4.1.27/arch/x86/lib/
Dusercopy_64.c43 [zero] "r" (0UL), [eight] "r" (8UL)); in __clear_user()
/linux-4.1.27/drivers/infiniband/hw/usnic/
Dusnic_uiom.h32 #define USNIC_UIOM_MAX_MR_SIZE (~0UL)
/linux-4.1.27/drivers/staging/lustre/lustre/include/
Dlustre_lite.h145 return ~0UL - (hash + !hash); in hash_x_index()
/linux-4.1.27/arch/arm64/mm/
Dmmap.c77 unsigned long random_factor = 0UL; in arch_pick_mmap_layout()
/linux-4.1.27/arch/openrisc/include/asm/
Duaccess.h48 #define KERNEL_DS (~0UL)
317 (segment_eq(get_fs(), USER_DS) ? TASK_SIZE : ~0UL)
/linux-4.1.27/arch/mips/fw/lib/
Dcmdline.c89 unsigned long envl = 0UL; in fw_getenvl()
/linux-4.1.27/net/sched/
Dem_nbyte.c37 if (em->data == 0UL) in em_nbyte_change()
/linux-4.1.27/drivers/spi/
Dspi-omap-100k.c54 #define SPI_SETUP2_ACTIVE_EDGE_FALLING (0UL << 0)
56 #define SPI_SETUP2_NEGATIVE_LEVEL (0UL << 5)
58 #define SPI_SETUP2_LEVEL_TRIGGER (0UL << 10)
/linux-4.1.27/arch/parisc/include/asm/
Ddma.h28 #define MAX_DMA_ADDRESS (~0UL)
/linux-4.1.27/arch/cris/include/asm/
Dpage.h9 #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
/linux-4.1.27/arch/arm64/kernel/
Dhw_breakpoint.c868 write_wb_reg(AARCH64_DBG_REG_BCR, i, 0UL); in hw_breakpoint_reset()
869 write_wb_reg(AARCH64_DBG_REG_BVR, i, 0UL); in hw_breakpoint_reset()
877 write_wb_reg(AARCH64_DBG_REG_WCR, i, 0UL); in hw_breakpoint_reset()
878 write_wb_reg(AARCH64_DBG_REG_WVR, i, 0UL); in hw_breakpoint_reset()
/linux-4.1.27/drivers/s390/crypto/
Dap_bus.c150 register unsigned long reg2 asm ("2") = 0UL; in ap_instructions_available()
195 register unsigned long reg2 asm ("2") = 0UL; in ap_test_queue()
215 register unsigned long reg2 asm ("2") = 0UL; in ap_query_facilities()
232 register unsigned long reg2 asm ("2") = 0UL; in ap_reset_queue()
265 register unsigned long reg0 asm ("0") = 0UL | qid | (1UL << 23); in __ap_query_functions()
476 register unsigned long reg2 asm("2") = 0UL; in __ap_recv()
479 register unsigned long reg6 asm("6") = 0UL; in __ap_recv()
480 register unsigned long reg7 asm("7") = 0UL; in __ap_recv()
/linux-4.1.27/arch/arc/include/asm/
Dmmu_context.h48 #define MM_CTXT_NO_ASID 0UL
/linux-4.1.27/drivers/clocksource/
Dfsl_ftm_timer.c207 ftm_writel(~0UL, priv->clkevt_base + FTM_MOD); in ftm_clockevent_init()
234 ftm_writel(~0UL, priv->clksrc_base + FTM_MOD); in ftm_clocksource_init()
/linux-4.1.27/arch/x86/um/os-Linux/
Dtask_size.c19 unsigned long n = ~0UL; in page_ok()
/linux-4.1.27/arch/mips/kernel/
Dvdso.c72 unsigned long offset = 0UL; in vdso_addr()
/linux-4.1.27/drivers/net/
Deql.c300 unsigned long best_load = ~0UL; in __eql_schedule_slaves()
318 slave_load = (~0UL - (~0UL / 2)) - in __eql_schedule_slaves()
/linux-4.1.27/arch/avr32/include/asm/
Dpage.h15 #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
/linux-4.1.27/arch/ia64/sn/pci/pcibr/
Dpcibr_dma.c367 if (hwdev->dma_mask == ~0UL) { in pcibr_dma_map()
401 if (hwdev->dev.coherent_dma_mask == ~0UL) { in pcibr_dma_map_consistent()
/linux-4.1.27/drivers/acpi/
Dacpi_apd.c87 #define APD_ADDR(desc) (0UL)

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