Searched refs:STM (Results 1 – 8 of 8) sorted by relevance
11 Choose this option to enable DRM on STM stiH41x chipset17 Choose this option to enable FBDEV on top of DRM for STM stiH41x chipset
26 DT_MACHINE_START(STM, "STiH415/416 SoC with Flattened Device Tree")
22 Depends on UX500/STM DMA if running in DMA mode.
37 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||90 intricate IP blocks such as STM and CTI.100 STM: System trace Macrocell111 ETMv3.x ETMv4, PTMv1.0, PTMv1.1, STM, STM500, ITM
69 #define STM (1 << 5) /* slave transmit mode */ macro384 if (ssr_raw & STM) { in rcar_i2c_slave_irq()
773 PINMUX_IPSR_DATA(IP2_11_8, STM),
1724 cores where a 8-word STM instruction give significantly higher
791 000198CE' STM 900EF068 >> 0FA95E78 CC 2