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Searched refs:MUX (Results 1 – 44 of 44) sorted by relevance

/linux-4.1.27/drivers/clk/samsung/
Dclk-exynos5420.c508 MUX(0, "mout_aclk400_isp", mout_group3_5800_p, SRC_TOP0, 0, 3),
509 MUX(0, "mout_aclk400_mscl", mout_group3_5800_p, SRC_TOP0, 4, 3),
510 MUX(0, "mout_aclk400_wcore", mout_group2_5800_p, SRC_TOP0, 16, 3),
511 MUX(0, "mout_aclk100_noc", mout_group1_5800_p, SRC_TOP0, 20, 2),
513 MUX(0, "mout_aclk333_432_gscl", mout_group6_5800_p, SRC_TOP1, 0, 2),
514 MUX(0, "mout_aclk333_432_isp", mout_group6_5800_p, SRC_TOP1, 4, 2),
515 MUX(0, "mout_aclk333_432_isp0", mout_group6_5800_p, SRC_TOP1, 12, 2),
516 MUX(0, "mout_aclk266", mout_group5_5800_p, SRC_TOP1, 20, 2),
517 MUX(0, "mout_aclk333", mout_group1_5800_p, SRC_TOP1, 28, 2),
519 MUX(0, "mout_aclk400_disp1", mout_group7_5800_p, SRC_TOP2, 4, 3),
[all …]
Dclk-exynos4.c539 MUX(CLK_MOUT_HDMI, "mout_hdmi", mout_hdmi_p, SRC_TV, 0, 1),
540 MUX(0, "mout_mfc1", sclk_evpll_p, SRC_MFC, 4, 1),
541 MUX(0, "mout_mfc", mout_mfc_p, SRC_MFC, 8, 1),
546 MUX(0, "mout_spdif", mout_spdif_p, SRC_PERIL1, 8, 2),
547 MUX(0, "mout_onenand1", mout_onenand1_p, SRC_TOP0, 0, 1),
548 MUX(CLK_SCLK_EPLL, "sclk_epll", mout_epll_p, SRC_TOP0, 4, 1),
549 MUX(0, "mout_onenand", mout_onenand_p, SRC_TOP0, 28, 1),
551 MUX(0, "mout_dmc_bus", sclk_ampll_p4210, SRC_DMC, 4, 1),
552 MUX(0, "mout_dphy", sclk_ampll_p4210, SRC_DMC, 8, 1),
557 MUX(0, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP1, 0, 1),
[all …]
Dclk-s5pv210.c418 MUX(MOUT_FLASH, "mout_flash", mout_flash_p, CLK_SRC0, 28, 1),
419 MUX(MOUT_PSYS, "mout_psys", mout_group4_p, CLK_SRC0, 24, 1),
420 MUX(MOUT_DSYS, "mout_dsys", mout_group4_p, CLK_SRC0, 20, 1),
421 MUX(MOUT_MSYS, "mout_msys", mout_group3_p, CLK_SRC0, 16, 1),
422 MUX(MOUT_EPLL, "mout_epll", mout_epll_p, CLK_SRC0, 8, 1),
423 MUX(MOUT_MPLL, "mout_mpll", mout_mpll_p, CLK_SRC0, 4, 1),
424 MUX(MOUT_APLL, "mout_apll", mout_apll_p, CLK_SRC0, 0, 1),
426 MUX(MOUT_CLKOUT, "mout_clkout", mout_clkout_p, MISC, 8, 2),
431 MUX(MOUT_VPLL, "mout_vpll", mout_vpll_p, CLK_SRC0, 12, 1),
433 MUX(MOUT_VPLLSRC, "mout_vpllsrc", mout_vpllsrc_p, CLK_SRC1, 28, 1),
[all …]
Dclk-exynos7.c93 MUX(0, "mout_bus0_pll_ctrl", mout_bus0_pll_ctrl_p, MUX_SEL_TOPC0, 0, 1),
94 MUX(0, "mout_bus1_pll_ctrl", mout_bus1_pll_ctrl_p, MUX_SEL_TOPC0, 4, 1),
95 MUX(0, "mout_cc_pll_ctrl", mout_cc_pll_ctrl_p, MUX_SEL_TOPC0, 8, 1),
96 MUX(0, "mout_mfc_pll_ctrl", mout_mfc_pll_ctrl_p, MUX_SEL_TOPC0, 12, 1),
98 MUX(0, "mout_sclk_bus0_pll_cmuc", mout_sclk_bus0_pll_cmuc_p,
100 MUX(0, "mout_sclk_bus1_pll_cmuc", mout_sclk_bus1_pll_cmuc_p,
102 MUX(0, "mout_sclk_cc_pll_cmuc", mout_sclk_cc_pll_cmuc_p,
104 MUX(0, "mout_sclk_mfc_pll_cmuc", mout_sclk_mfc_pll_cmuc_p,
107 MUX(0, "mout_sclk_bus0_pll_out", mout_sclk_bus0_pll_out_p,
109 MUX(0, "mout_aud_pll_ctrl", mout_aud_pll_ctrl_p, MUX_SEL_TOPC1, 0, 1),
[all …]
Dclk-exynos4415.c292 MUX(CLK_MOUT_MPLL_USER_L, "mout_mpll_user_l", mout_mpll_user_p,
294 MUX(CLK_MOUT_GDL, "mout_gdl", mout_gdl_p, SRC_LEFTBUS, 0, 1),
297 MUX(CLK_MOUT_MPLL_USER_R, "mout_mpll_user_r", mout_mpll_user_p,
299 MUX(CLK_MOUT_GDR, "mout_gdr", mout_gdr_p, SRC_RIGHTBUS, 0, 1),
302 MUX(CLK_MOUT_EBI, "mout_ebi", mout_ebi_p, SRC_TOP0, 28, 1),
303 MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_mout_mpll_user_t_p,
305 MUX(CLK_MOUT_ACLK_160, "mout_aclk_160", group_mout_mpll_user_t_p,
307 MUX(CLK_MOUT_ACLK_100, "mout_aclk_100", group_mout_mpll_user_t_p,
309 MUX(CLK_MOUT_ACLK_266, "mout_aclk_266", mout_aclk_266_p,
311 MUX(CLK_MOUT_G3D_PLL, "mout_g3d_pll", mout_g3d_pll_p,
[all …]
Dclk-exynos5260.c98 MUX(AUD_MOUT_AUD_PLL_USER, "mout_aud_pll_user", mout_aud_pll_user_p,
100 MUX(AUD_MOUT_SCLK_AUD_I2S, "mout_sclk_aud_i2s", mout_sclk_aud_i2s_p,
102 MUX(AUD_MOUT_SCLK_AUD_PCM, "mout_sclk_aud_pcm", mout_sclk_aud_pcm_p,
207 MUX(DISP_MOUT_ACLK_DISP_333_USER, "mout_aclk_disp_333_user",
210 MUX(DISP_MOUT_SCLK_DISP_PIXEL_USER, "mout_sclk_disp_pixel_user",
213 MUX(DISP_MOUT_ACLK_DISP_222_USER, "mout_aclk_disp_222_user",
216 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH0_TXD_CLK_USER,
220 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH1_TXD_CLK_USER,
224 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH2_TXD_CLK_USER,
228 MUX(DISP_MOUT_PHYCLK_DPTX_PHY_CH3_TXD_CLK_USER,
[all …]
Dclk-exynos5410.c82 MUX(0, "mout_apll", apll_p, SRC_CPU, 0, 1),
83 MUX(0, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1),
85 MUX(0, "mout_kpll", kpll_p, SRC_KFC, 0, 1),
86 MUX(0, "mout_kfc", mout_kfc_p, SRC_KFC, 16, 1),
88 MUX(0, "sclk_mpll", mpll_p, SRC_CPERI1, 8, 1),
89 MUX(0, "sclk_mpll_muxed", mpll_user_p, SRC_TOP2, 20, 1),
91 MUX(0, "sclk_bpll", bpll_p, SRC_CDREX, 0, 1),
92 MUX(0, "sclk_bpll_muxed", bpll_user_p, SRC_TOP2, 24, 1),
94 MUX(0, "sclk_cpll", cpll_p, SRC_TOP2, 8, 1),
96 MUX(0, "sclk_mpll_bpll", mpll_bpll_p, SRC_TOP1, 20, 1),
[all …]
Dclk-exynos5250.c279 MUX(0, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1),
305 MUX(0, "mout_aclk166", mout_aclk166_p, SRC_TOP0, 8, 1),
306 MUX(0, "mout_aclk200", mout_aclk200_p, SRC_TOP0, 12, 1),
307 MUX(0, "mout_aclk333", mout_aclk166_p, SRC_TOP0, 16, 1),
308 MUX(0, "mout_aclk400_g3d_mid", mout_aclk200_p, SRC_TOP0, 20, 1),
310 MUX(0, "mout_aclk400_isp", mout_aclk200_p, SRC_TOP1, 24, 1),
311 MUX(0, "mout_aclk400_g3d", mout_aclk400_p, SRC_TOP1, 28, 1),
313 MUX(0, "mout_cpll", mout_cpll_p, SRC_TOP2, 8, 1),
314 MUX(0, "mout_epll", mout_epll_p, SRC_TOP2, 12, 1),
315 MUX(0, "mout_vpll", mout_vpll_p, SRC_TOP2, 16, 1),
[all …]
Dclk-exynos3250.c251 MUX(CLK_MOUT_MPLL_USER_L, "mout_mpll_user_l", mout_mpll_user_p,
253 MUX(CLK_MOUT_GDL, "mout_gdl", mout_gdl_p, SRC_LEFTBUS, 0, 1),
256 MUX(CLK_MOUT_MPLL_USER_R, "mout_mpll_user_r", mout_mpll_user_p,
258 MUX(CLK_MOUT_GDR, "mout_gdr", mout_gdr_p, SRC_RIGHTBUS, 0, 1),
261 MUX(CLK_MOUT_EBI, "mout_ebi", mout_ebi_p, SRC_TOP0, 28, 1),
262 MUX(CLK_MOUT_ACLK_200, "mout_aclk_200", group_div_mpll_pre_p,SRC_TOP0, 24, 1),
263 MUX(CLK_MOUT_ACLK_160, "mout_aclk_160", group_div_mpll_pre_p, SRC_TOP0, 20, 1),
264 MUX(CLK_MOUT_ACLK_100, "mout_aclk_100", group_div_mpll_pre_p, SRC_TOP0, 16, 1),
265 MUX(CLK_MOUT_ACLK_266_1, "mout_aclk_266_1", mout_aclk_266_1_p, SRC_TOP0, 14, 1),
266 MUX(CLK_MOUT_ACLK_266_0, "mout_aclk_266_0", mout_aclk_266_0_p, SRC_TOP0, 13, 1),
[all …]
Dclk-exynos5433.c272 MUX(CLK_MOUT_AUD_PLL, "mout_aud_pll", mout_aud_pll_p, MUX_SEL_TOP0,
274 MUX(CLK_MOUT_ISP_PLL, "mout_isp_pll", mout_isp_pll_p, MUX_SEL_TOP0,
278 MUX(CLK_MOUT_AUD_PLL_USER_T, "mout_aud_pll_user_t",
280 MUX(CLK_MOUT_MPHY_PLL_USER, "mout_mphy_pll_user", mout_mphy_pll_user_p,
282 MUX(CLK_MOUT_MFC_PLL_USER, "mout_mfc_pll_user", mout_mfc_pll_user_p,
284 MUX(CLK_MOUT_BUS_PLL_USER, "mout_bus_pll_user", mout_bus_pll_user_p,
288 MUX(CLK_MOUT_ACLK_HEVC_400, "mout_aclk_hevc_400",
290 MUX(CLK_MOUT_ACLK_CAM1_333, "mout_aclk_cam1_333",
292 MUX(CLK_MOUT_ACLK_CAM1_552_B, "mout_aclk_cam1_552_b",
294 MUX(CLK_MOUT_ACLK_CAM1_552_A, "mout_aclk_cam1_552_a",
[all …]
Dclk-s3c64xx.c193 MUX(MOUT_APLL, "mout_apll", apll_p, CLK_SRC, 0, 1),
194 MUX(MOUT_MPLL, "mout_mpll", mpll_p, CLK_SRC, 1, 1),
195 MUX(MOUT_EPLL, "mout_epll", epll_p, CLK_SRC, 2, 1),
196 MUX(MOUT_MFC, "mout_mfc", mfc_p, CLK_SRC, 4, 1),
197 MUX(MOUT_AUDIO0, "mout_audio0", audio0_p, CLK_SRC, 7, 3),
198 MUX(MOUT_AUDIO1, "mout_audio1", audio1_p, CLK_SRC, 10, 3),
199 MUX(MOUT_UART, "mout_uart", uart_p, CLK_SRC, 13, 1),
200 MUX(MOUT_SPI0, "mout_spi0", spi_mmc_p, CLK_SRC, 14, 2),
201 MUX(MOUT_SPI1, "mout_spi1", spi_mmc_p, CLK_SRC, 16, 2),
202 MUX(MOUT_MMC0, "mout_mmc0", spi_mmc_p, CLK_SRC, 18, 2),
[all …]
Dclk-s3c2412.c136 MUX(0, "erefclk", erefclk_p, CLKSRC, 14, 2),
137 MUX(0, "urefclk", urefclk_p, CLKSRC, 12, 2),
138 MUX(0, "mux_cam", camclk_p, CLKSRC, 11, 1),
139 MUX(0, "mux_usb", usbclk_p, CLKSRC, 10, 1),
140 MUX(0, "mux_i2s", i2sclk_p, CLKSRC, 9, 1),
141 MUX(0, "mux_uart", uartclk_p, CLKSRC, 8, 1),
142 MUX(USYSCLK, "usysclk", usysclk_p, CLKSRC, 5, 1),
143 MUX(MSYSCLK, "msysclk", msysclk_p, CLKSRC, 4, 1),
144 MUX(MDIVCLK, "mdivclk", mdivclk_p, CLKSRC, 3, 1),
145 MUX(ARMCLK, "armclk", armclk_p, CLKDIVN, 4, 1),
Dclk-s3c2443.c119 MUX(0, "epllref", epllref_p, CLKSRC, 7, 2),
120 MUX(ESYSCLK, "esysclk", esysclk_p, CLKSRC, 6, 1),
121 MUX(0, "mpllref", mpllref_p, CLKSRC, 3, 1),
124 MUX(0, "mux_i2s0", i2s0_p, CLKSRC, 14, 2),
253 MUX(MUX_HSMMC0, "mux_hsmmc0", s3c2416_hsmmc0_p, CLKSRC, 16, 1),
254 MUX(MUX_HSMMC1, "mux_hsmmc1", s3c2416_hsmmc1_p, CLKSRC, 17, 1),
255 MUX(MUX_HSSPI0, "mux_hsspi0", s3c2416_hsspi0_p, CLKSRC, 18, 1),
336 MUX(0, "mux_cam", s3c2450_cam_p, CLKSRC, 20, 1),
337 MUX(MUX_HSSPI1, "mux_hsspi1", s3c2450_hsspi1_p, CLKSRC, 19, 1),
338 MUX(0, "mux_i2s1", i2s1_p, CLKSRC, 12, 2),
Dclk-s3c2410.c101 MUX(FCLK, "fclk", fclk_p, CLKSLOW, 4, 1),
275 MUX(HCLK, "hclk", hclk_p, CLKDIVN, 1, 2),
276 MUX(ARMCLK, "armclk", armclk_p, CAMDIVN, 12, 1),
324 MUX(CAMIF, "camif", s3c2440_camif_p, CAMDIVN, 4, 1),
340 MUX(CAMIF, "camif", s3c2442_camif_p, CAMDIVN, 4, 2),
Dclk-exynos5440.c57 MUX(0, "mout_spi", mout_spi_p, MISC_DOUT1, 5, 1),
Dclk.h149 #define MUX(_id, cname, pnames, o, s, w) \ macro
/linux-4.1.27/drivers/clk/tegra/
Dclk-tegra-periph.c131 #define MUX(_name, _parents, _offset, \ macro
424 …MUX("i2s0", mux_pllaout0_audio0_2x_pllp_clkm, CLK_SOURCE_I2S0, 30, TEGRA_PERIPH_ON_APB, tegra_clk_…
425 …MUX("i2s1", mux_pllaout0_audio1_2x_pllp_clkm, CLK_SOURCE_I2S1, 11, TEGRA_PERIPH_ON_APB, tegra_clk_…
426 …MUX("i2s2", mux_pllaout0_audio2_2x_pllp_clkm, CLK_SOURCE_I2S2, 18, TEGRA_PERIPH_ON_APB, tegra_clk_…
427 …MUX("i2s3", mux_pllaout0_audio3_2x_pllp_clkm, CLK_SOURCE_I2S3, 101, TEGRA_PERIPH_ON_APB, tegra_clk…
428 …MUX("i2s4", mux_pllaout0_audio4_2x_pllp_clkm, CLK_SOURCE_I2S4, 102, TEGRA_PERIPH_ON_APB, tegra_clk…
429 …MUX("spdif_out", mux_pllaout0_audio_2x_pllp_clkm, CLK_SOURCE_SPDIF_OUT, 10, TEGRA_PERIPH_ON_APB, t…
430 …MUX("spdif_in", mux_pllp_pllc_pllm, CLK_SOURCE_SPDIF_IN, 10, TEGRA_PERIPH_ON_APB, tegra_clk_spdif_…
431 MUX("pwm", mux_pllp_pllc_clk32_clkm, CLK_SOURCE_PWM, 17, TEGRA_PERIPH_ON_APB, tegra_clk_pwm),
432 MUX("adx", mux_plla_pllc_pllp_clkm, CLK_SOURCE_ADX, 154, TEGRA_PERIPH_ON_APB, tegra_clk_adx),
[all …]
/linux-4.1.27/drivers/clk/pistachio/
Dclk-pistachio.c127 MUX(CLK_AUDIO_REF_MUX, "audio_refclk_mux", mux_xtal_audio_refclk,
129 MUX(CLK_MIPS_PLL_MUX, "mips_pll_mux", mux_xtal_mips, 0x200, 1),
130 MUX(CLK_AUDIO_PLL_MUX, "audio_pll_mux", mux_xtal_audio, 0x200, 2),
131 MUX(CLK_AUDIO_MUX, "audio_mux", mux_audio_debug, 0x200, 4),
132 MUX(CLK_RPU_V_PLL_MUX, "rpu_v_pll_mux", mux_xtal_rpu_v, 0x200, 5),
133 MUX(CLK_RPU_L_PLL_MUX, "rpu_l_pll_mux", mux_xtal_rpu_l, 0x200, 6),
134 MUX(CLK_RPU_L_MUX, "rpu_l_mux", mux_rpu_l_mips, 0x200, 7),
135 MUX(CLK_WIFI_PLL_MUX, "wifi_pll_mux", mux_xtal_wifi, 0x200, 8),
136 MUX(CLK_WIFI_DIV4_MUX, "wifi_div4_mux", mux_xtal_wifi_div4, 0x200, 9),
137 MUX(CLK_WIFI_DIV8_MUX, "wifi_div8_mux", mux_xtal_wifi_div8, 0x200, 10),
[all …]
Dclk.h42 #define MUX(_id, _name, _pnames, _reg, _shift) \ macro
/linux-4.1.27/drivers/clk/rockchip/
Dclk-rk3188.c303 MUX(0, "cif_src", mux_pll_src_cpll_gpll_p, 0,
308 MUX(SCLK_CIF0, "sclk_cif0", mux_sclk_cif0_p, 0,
326 MUX(SCLK_MAC, "sclk_macref", mux_sclk_macref_p, CLK_SET_RATE_PARENT,
337 MUX(SCLK_HSADC, "sclk_hsadc", mux_sclk_hsadc_p, 0,
350 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, 0,
377 MUX(0, "uart_src", mux_pll_src_gpll_cpll_p, 0,
385 MUX(SCLK_UART0, "sclk_uart0", mux_sclk_uart0_p, 0,
393 MUX(SCLK_UART1, "sclk_uart1", mux_sclk_uart1_p, 0,
401 MUX(SCLK_UART2, "sclk_uart2", mux_sclk_uart2_p, 0,
409 MUX(SCLK_UART3, "sclk_uart3", mux_sclk_uart3_p, 0,
[all …]
Dclk-rk3288.c309 MUX(0, "i2s_pre", mux_i2s_pre_p, CLK_SET_RATE_PARENT,
317 MUX(0, "spdif_src", mux_pll_src_cpll_gpll_p, 0,
541 MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,
543 MUX(0, "uart_src", mux_pll_src_cpll_gpll_p, 0,
551 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,
559 MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,
567 MUX(SCLK_UART3, "sclk_uart3", mux_uart3_p, CLK_SET_RATE_PARENT,
575 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
581 MUX(SCLK_MAC, "mac_clk", mux_mac_p, CLK_SET_RATE_PARENT,
595 MUX(SCLK_HSADC, "sclk_hsadc_out", mux_hsadcout_p, 0,
[all …]
Dclk.h328 #define MUX(_id, cname, pnames, f, o, s, w, mf) \ macro
/linux-4.1.27/Documentation/i2c/muxes/
Di2c-mux-gpio9 from a master I2C bus and a hardware MUX controlled through GPIO pins.
17 | Linux | GPIO 1..N | MUX |--------------- Devices
35 E.G. something like this for a MUX providing 4 bus segments
/linux-4.1.27/Documentation/devicetree/bindings/interrupt-controller/
Dbrcm,bcm7120-l2-intc.txt26 0 -----[ MUX ] ------------|==========> GIC interrupt 75
29 1 -----[ MUX ] --------)---|==========> GIC interrupt 76
32 2 -----[ MUX ] --------)---|==========> GIC interrupt 77
/linux-4.1.27/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.txt14 - qcom,mode : indicates MUX value for configuration of the serial interface.
18 - qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference
/linux-4.1.27/Documentation/devicetree/bindings/pinctrl/
Drockchip,pinctrl.txt60 setting. The format is rockchip,pins = <PIN_BANK PIN_BANK_IDX MUX &phandle>.
61 The MUX 0 means gpio and MUX 1 to N mean the specific device function.
/linux-4.1.27/Documentation/networking/caif/
DLinux-CAIF.txt10 CAIF is a MUX protocol used by ST-Ericsson cellular modems for
105 The MUX keeps track of the existing CAIF Channels and
129 | MUX |
/linux-4.1.27/net/caif/
DKconfig11 based connection-oriented MUX protocol developed by ST-Ericsson for use
/linux-4.1.27/Documentation/devicetree/bindings/ata/
Dapm-xgene.txt18 controller MUX memory resource if required.
/linux-4.1.27/drivers/i2c/muxes/
DKconfig26 I2C busses connected through a MUX, which is controlled
/linux-4.1.27/Documentation/serial/
Dn_gsm.txt41 being able to answer to the first MUX packet so a delay
/linux-4.1.27/drivers/pinctrl/
Dpinctrl-tz1090.c739 #define MUX(f0, f1, f2, f3, f4, mux_r, mux_b, mux_w) \ macro
777 MUX(f0, f1, f2, f3, f4, mux_r, mux_b, mux_w)
808 .mux = MUX(f0, f1, f2, f3, f4, \
/linux-4.1.27/drivers/tty/serial/
DKconfig653 tristate "Serial MUX support"
658 Saying Y here will enable the hardware MUX serial driver for
660 The hardware MUX is not 8250/16550 compatible therefore the
661 /dev/ttyB0 device is shared between the Serial MUX and the PDC
663 the Serial MUX:
672 bool "Support for console on serial MUX"
/linux-4.1.27/drivers/scsi/
Dncr53c8xx.h734 #define MUX 0x80 /* 720 host bus multiplex mode */ macro
Dncr53c8xx.c3877 np->rv_ctest4 |= MUX; /* Host bus multiplex mode */ in ncr_prepare_setting()
5192 OUTB (nc_ctest4, MUX); in ncr_chip_reset()
/linux-4.1.27/drivers/tty/
DKconfig330 tristate "GSM MUX line discipline support (EXPERIMENTAL)"
333 This line discipline provides support for the GSM MUX protocol and
/linux-4.1.27/Documentation/networking/
Dcan.txt835 U64_DATA(&msg.frame[0]) = 0xFF00000000000000ULL; /* MUX mask */
836 U64_DATA(&msg.frame[1]) = 0x01000000000000FFULL; /* data mask (MUX 0x01) */
837 U64_DATA(&msg.frame[2]) = 0x0200FFFF000000FFULL; /* data mask (MUX 0x02) */
838 U64_DATA(&msg.frame[3]) = 0x330000FFFFFF0003ULL; /* data mask (MUX 0x33) */
839 U64_DATA(&msg.frame[4]) = 0x4F07FC0FF0000000ULL; /* data mask (MUX 0x4F) */
/linux-4.1.27/Documentation/sound/alsa/
Dhda_codec.txt320 The input MUX helper callbacks for such a control are provided, too:
/linux-4.1.27/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h2223 #define MUX(b15,b14,b13,b12,b11,b10,b9,b8,b7,b6,b5,b4,b3,b2,b1,b0) \ macro
/linux-4.1.27/Documentation/
Dpinctrl.txt576 into some register named MUX to select a certain function with a certain
708 writeb((readb(MUX)|regbit), MUX)
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmsmac/phy/
Dphy_cmn.c42 #define MUX(pred, true, false) ((pred) ? (true) : (false)) macro
45 #define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1)
/linux-4.1.27/Documentation/video4linux/bttv/
DCards58 (other sound MUX setting in GPIO port needed??? somebody who fixed this???)
/linux-4.1.27/arch/blackfin/kernel/
Ddebug-mmrs.c369 __PORT(MUX, port_mux); in bfin_debug_mmrs_port()
/linux-4.1.27/
DMAINTAINERS2978 CYCLADES ASYNC MUX DRIVER