/linux-4.1.27/arch/arm/mach-shmobile/ |
D | setup-sh73a0.c | 65 DEFINE_RES_MEM(0xe6050000, 0x8000), 66 DEFINE_RES_MEM(0xe605801c, 0x000c), 84 DEFINE_RES_MEM(baseaddr, 0x100), \ 113 DEFINE_RES_MEM(0xe6138000, 0x200), 133 DEFINE_RES_MEM(0xfff60000, 0x2c), 150 [0] = DEFINE_RES_MEM(0xe6820000, 0x426), 159 [0] = DEFINE_RES_MEM(0xe6822000, 0x426), 168 [0] = DEFINE_RES_MEM(0xe6824000, 0x426), 177 [0] = DEFINE_RES_MEM(0xe6826000, 0x426), 186 [0] = DEFINE_RES_MEM(0xe6828000, 0x426), [all …]
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D | setup-r8a7778.c | 69 DEFINE_RES_MEM(baseaddr, 0x100), \ 93 DEFINE_RES_MEM(0xffd80000, 0x30), 173 DEFINE_RES_MEM(0xffe70000, 0x400), 184 DEFINE_RES_MEM(0xffe70400, 0x400), 204 DEFINE_RES_MEM(0xfffc0000, 0x118), 209 DEFINE_RES_MEM(0xffc40000 + 0x1000 * (idx), 0x30), \ 251 DEFINE_RES_MEM(0xffc70000, 0x1000), 254 DEFINE_RES_MEM(0xffc71000, 0x1000), 257 DEFINE_RES_MEM(0xffc72000, 0x1000), 260 DEFINE_RES_MEM(0xffc73000, 0x1000), [all …]
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D | setup-r8a7740.c | 76 DEFINE_RES_MEM(0xe6050000, 0x8000), 77 DEFINE_RES_MEM(0xe605800c, 0x0020), 91 DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */ 92 DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */ 93 DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */ 94 DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */ 95 DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */ 121 DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */ 122 DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */ 123 DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */ [all …]
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D | board-bockw.c | 131 DEFINE_RES_MEM(0x18300000, 0x1000), 158 DEFINE_RES_MEM(0xffe60000, 0x110), 195 DEFINE_RES_MEM(0xffe70800, 0x100), 196 DEFINE_RES_MEM(0xffe76000, 0x100), 213 DEFINE_RES_MEM(0xFFE4C000, 0x100), 219 DEFINE_RES_MEM(0xfde00000, 0x400), 284 DEFINE_RES_MEM(0xffe4e000, 0x100), 317 DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \ 335 [RSND_GEN1_SRU] = DEFINE_RES_MEM(0xffd90000, 0x1000), 336 [RSND_GEN1_SSI] = DEFINE_RES_MEM(0xffd91000, 0x1240), [all …]
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D | setup-r8a7779.c | 89 DEFINE_RES_MEM(0xfe78001c, 4), /* ICR1 */ 90 DEFINE_RES_MEM(0xfe780010, 4), /* INTPRI */ 91 DEFINE_RES_MEM(0xfe780024, 4), /* INTREQ */ 92 DEFINE_RES_MEM(0xfe780044, 4), /* INTMSK0 */ 93 DEFINE_RES_MEM(0xfe780064, 4), /* INTMSKCLR0 */ 132 DEFINE_RES_MEM(0xfffc0000, 0x023c), 144 DEFINE_RES_MEM(0xffc40000 + (0x1000 * (idx)), 0x002c), \ 199 DEFINE_RES_MEM(baseaddr, 0x100), \ 226 DEFINE_RES_MEM(0xffd80000, 0x30), 621 DEFINE_RES_MEM(0xffc08000, 0x1000), [all …]
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D | smp-r8a7790.c | 41 .iomem = DEFINE_RES_MEM(0xe6152000, 0x188), 45 .iomem = DEFINE_RES_MEM(0xe6151000, 0x188),
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D | smp-r8a7791.c | 30 .iomem = DEFINE_RES_MEM(0xe6152000, 0x188),
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D | board-marzen.c | 210 DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \
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/linux-4.1.27/arch/arm/plat-samsung/ |
D | devs.c | 75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), 98 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), 113 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), 130 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), 151 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), 195 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), 225 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), 257 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), 287 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), 318 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), [all …]
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/linux-4.1.27/arch/arm/mach-sa1100/ |
D | generic.c | 116 [0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K), 134 [0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K), 146 [0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K), 158 [0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K), 159 [1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4), 192 [0] = DEFINE_RES_MEM(0x80070000, SZ_64K), 210 [0] = DEFINE_RES_MEM(0xb0100000, SZ_64K), 249 DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24), 250 DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c), 251 DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04), [all …]
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D | pleb.c | 41 [0] = DEFINE_RES_MEM(PLEB_ETH0_P, 0x04000000), 72 [0] = DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_8M), 73 [1] = DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_8M),
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D | jornada720.c | 178 [0] = DEFINE_RES_MEM(EPSONFBSTART, EPSONFBLEN), 179 [1] = DEFINE_RES_MEM(EPSONREGSTART, EPSONREGLEN), 193 [0] = DEFINE_RES_MEM(SA1111REGSTART, SA1111REGLEN), 336 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
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D | h3xxx.c | 83 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M); 183 [0] = DEFINE_RES_MEM(H3600_EGPIO_PHYS, 0x4), 249 DEFINE_RES_MEM(0x80010000, SZ_4K), 250 DEFINE_RES_MEM(0x80020000, SZ_4K),
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D | nanoengine.c | 62 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), 63 DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
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D | cerf.c | 38 [0] = DEFINE_RES_MEM(0x80030000, SZ_64K), 129 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
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D | assabet.c | 271 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), 272 DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), 415 DEFINE_RES_MEM(0x10000000, 0x08000000), 416 DEFINE_RES_MEM(0x18000000, 0x04000000), 417 DEFINE_RES_MEM(0x40000000, SZ_8K),
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D | collie.c | 57 [0] = DEFINE_RES_MEM(0x40800000, SZ_4K), 223 [0] = DEFINE_RES_MEM(0x40000000, SZ_8K), 335 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
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D | badge4.c | 44 [0] = DEFINE_RES_MEM(BADGE4_SA1111_BASE, 0x2000), 162 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_64M);
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D | simpad.c | 181 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_16M), 182 DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_16M),
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D | shannon.c | 53 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M);
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D | hackkit.c | 188 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M);
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D | neponset.c | 242 DEFINE_RES_MEM(0x40000000, SZ_8K), in neponset_probe()
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/linux-4.1.27/arch/arm/mach-s3c64xx/ |
D | dev-uart.c | 34 [0] = DEFINE_RES_MEM(S3C_PA_UART0, SZ_256), 39 [0] = DEFINE_RES_MEM(S3C_PA_UART1, SZ_256), 44 [0] = DEFINE_RES_MEM(S3C_PA_UART2, SZ_256), 49 [0] = DEFINE_RES_MEM(S3C_PA_UART3, SZ_256),
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D | dev-audio.c | 56 [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS0, SZ_256), 77 [0] = DEFINE_RES_MEM(S3C64XX_PA_IIS1, SZ_256), 94 [0] = DEFINE_RES_MEM(S3C64XX_PA_IISV4, SZ_256), 144 [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM0, SZ_256), 165 [0] = DEFINE_RES_MEM(S3C64XX_PA_PCM1, SZ_256), 198 [0] = DEFINE_RES_MEM(S3C64XX_PA_AC97, SZ_256),
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D | mach-anw6410.c | 171 [0] = DEFINE_RES_MEM(ANW6410_PA_DM9000, 4), 172 [1] = DEFINE_RES_MEM(ANW6410_PA_DM9000 + 4, 501),
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D | mach-real6410.c | 90 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2), 91 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
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D | mach-mini6410.c | 91 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, 2), 92 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1 + 4, 2),
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D | mach-crag6410.c | 237 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2), 238 [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
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D | mach-smdk6410.c | 188 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
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/linux-4.1.27/arch/arm/mach-s3c24xx/ |
D | bast-ide.c | 38 [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRI, 8 * 0x20), 39 [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDEPRIAUX + (6 * 0x20), 0x20), 56 [0] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESEC, 8 * 0x20), 57 [1] = DEFINE_RES_MEM(BAST_IDE_CS + BAST_PA_IDESECAUX + (6 * 0x20), 0x20),
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D | mach-anubis.c | 235 [0] = DEFINE_RES_MEM(S3C2410_CS3, 8 * 32), 236 [2] = DEFINE_RES_MEM(S3C2410_CS3 + (1 << 26) + (6 * 32), 32), 252 [0] = DEFINE_RES_MEM(S3C2410_CS4, 8 * 32), 253 [1] = DEFINE_RES_MEM(S3C2410_CS4 + (1 << 26) + (6 * 32), 32), 278 [0] = DEFINE_RES_MEM(S3C2410_CS5, 0x20 * 0x20), 295 [0] = DEFINE_RES_MEM(S3C2410_CS2, SZ_8M), 296 [1] = DEFINE_RES_MEM(S3C2410_CS2 + SZ_64M - SZ_2M, SZ_2M),
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D | common.c | 261 [0] = DEFINE_RES_MEM(S3C2410_PA_UART0, SZ_16K), 268 [0] = DEFINE_RES_MEM(S3C2410_PA_UART1, SZ_16K), 275 [0] = DEFINE_RES_MEM(S3C2410_PA_UART2, SZ_16K), 282 [0] = DEFINE_RES_MEM(S3C2443_PA_UART3, SZ_16K), 310 [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA), 461 [0] = DEFINE_RES_MEM(S3C24XX_PA_DMA, S3C24XX_SZ_DMA), 556 [0] = DEFINE_RES_MEM(0x56000084, 0x4),
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D | mach-vr1000.c | 188 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000, 4), 189 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x40, 0x40), 195 [0] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0x80, 4), 196 [1] = DEFINE_RES_MEM(S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0, 0x40),
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D | mach-bast.c | 307 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000, 4), 308 [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_DM9000 + 0x40, 0x40), 385 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET, 0x18 * 0x20), 386 [1] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x1f * 0x20), 1), 403 [0] = DEFINE_RES_MEM(S3C2410_CS5 + BAST_PA_ASIXNET + (0x18 * 0x20), \
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D | mach-at2440evb.c | 122 [0] = DEFINE_RES_MEM(S3C2410_CS3, 4), 123 [1] = DEFINE_RES_MEM(S3C2410_CS3 + 4, 4),
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D | simtec-nor.c | 57 [0] = DEFINE_RES_MEM(S3C2410_CS1 + 0x4000000, SZ_8M),
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D | mach-otom.c | 77 [0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_4M),
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D | mach-osiris.c | 246 [0] = DEFINE_RES_MEM(0x0f000000, SZ_1M), 247 [1] = DEFINE_RES_MEM(0x0c000000, SZ_1M),
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D | mach-tct_hammer.c | 61 DEFINE_RES_MEM(0x00000000, SZ_16M);
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D | mach-nexcoder.c | 86 [0] = DEFINE_RES_MEM(S3C2410_CS0, SZ_8M),
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D | mach-amlm5900.c | 72 DEFINE_RES_MEM(0x00000000, SZ_16M);
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D | mach-mini2440.c | 295 [0] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE, 4), 296 [1] = DEFINE_RES_MEM(MACH_MINI2440_DM9K_BASE + 4, 4),
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D | mach-qt2410.c | 184 [0] = DEFINE_RES_MEM(0x19000000, 17),
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D | mach-gta02.c | 386 DEFINE_RES_MEM(GTA02_FLASH_BASE, GTA02_FLASH_SIZE);
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/linux-4.1.27/arch/arm/mach-clps711x/ |
D | devices.c | 25 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + HALT, SZ_128); 64 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + SYSCON1, SZ_128), 66 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + SYSCON2, SZ_128), 68 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + SYSCON3, SZ_64), 81 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + UARTDR1, SZ_128), 87 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + UARTDR2, SZ_128),
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D | board-edb7211.c | 62 DEFINE_RES_MEM(EDB7211_CS8900_BASE, SZ_1K), 81 DEFINE_RES_MEM(EDB7211_FLASH0_BASE, SZ_8M), 82 DEFINE_RES_MEM(EDB7211_FLASH1_BASE, SZ_8M), 124 DEFINE_RES_MEM(CLPS711X_PHYS_BASE + PMPCON, SZ_4);
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D | board-cdb89712.c | 48 DEFINE_RES_MEM(CDB89712_CS8900_BASE, SZ_1K), 68 DEFINE_RES_MEM(CS0_PHYS_BASE, SZ_8M), 116 DEFINE_RES_MEM(CLPS711X_SRAM_BASE, CLPS711X_SRAM_SIZE),
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D | board-autcpu12.c | 84 DEFINE_RES_MEM(AUTCPU12_CS8900_BASE, SZ_1K), 89 DEFINE_RES_MEM(AUTCPU12_SMC_BASE, SZ_16), 184 DEFINE_RES_MEM(AUTCPU12_FLASH_BASE, SZ_8M), 198 DEFINE_RES_MEM(AUTCPU12_NVRAM_BASE, 0),
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D | board-p720t.c | 229 DEFINE_RES_MEM(P720T_NAND_BASE, SZ_4),
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/linux-4.1.27/arch/arm/mach-ep93xx/ |
D | core.c | 251 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc), 294 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c), 333 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000), 394 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000), 476 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18), 539 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10), 550 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10), 618 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800), 637 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE + 666 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c), [all …]
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/linux-4.1.27/arch/sh/kernel/cpu/sh4a/ |
D | setup-sh7770.c | 25 DEFINE_RES_MEM(0xff923000, 0x100), 46 DEFINE_RES_MEM(0xff924000, 0x100), 67 DEFINE_RES_MEM(0xff925000, 0x100), 88 DEFINE_RES_MEM(0xff926000, 0x100), 109 DEFINE_RES_MEM(0xff927000, 0x100), 130 DEFINE_RES_MEM(0xff928000, 0x100), 151 DEFINE_RES_MEM(0xff929000, 0x100), 172 DEFINE_RES_MEM(0xff92a000, 0x100), 193 DEFINE_RES_MEM(0xff92b000, 0x100), 214 DEFINE_RES_MEM(0xff92c000, 0x100), [all …]
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D | setup-sh7734.c | 35 DEFINE_RES_MEM(0xffe40000, 0x100), 57 DEFINE_RES_MEM(0xffe41000, 0x100), 79 DEFINE_RES_MEM(0xffe42000, 0x100), 101 DEFINE_RES_MEM(0xffe43000, 0x100), 123 DEFINE_RES_MEM(0xffe44000, 0x100), 145 DEFINE_RES_MEM(0xffe43000, 0x100), 207 DEFINE_RES_MEM(0xffd80000, 0x30), 228 DEFINE_RES_MEM(0xffd81000, 0x30), 249 DEFINE_RES_MEM(0xffd82000, 0x30),
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D | setup-sh7723.c | 34 DEFINE_RES_MEM(0xffe00000, 0x100), 57 DEFINE_RES_MEM(0xffe10000, 0x100), 80 DEFINE_RES_MEM(0xffe20000, 0x100), 103 DEFINE_RES_MEM(0xa4e30000, 0x100), 126 DEFINE_RES_MEM(0xa4e40000, 0x100), 149 DEFINE_RES_MEM(0xa4e50000, 0x100), 252 DEFINE_RES_MEM(0x044a0000, 0x70), 271 DEFINE_RES_MEM(0xffd80000, 0x2c), 292 DEFINE_RES_MEM(0xffd90000, 0x2c),
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D | setup-sh7786.c | 38 DEFINE_RES_MEM(0xffea0000, 0x100), 66 DEFINE_RES_MEM(0xffeb0000, 0x100), 71 DEFINE_RES_MEM(0xffeb0000, 0x100), 97 DEFINE_RES_MEM(0xffec0000, 0x100), 119 DEFINE_RES_MEM(0xffed0000, 0x100), 141 DEFINE_RES_MEM(0xffee0000, 0x100), 163 DEFINE_RES_MEM(0xffef0000, 0x100), 182 DEFINE_RES_MEM(0xffd80000, 0x30), 203 DEFINE_RES_MEM(0xffda0000, 0x2c), 224 DEFINE_RES_MEM(0xffdc0000, 0x2c), [all …]
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D | setup-sh7785.c | 30 DEFINE_RES_MEM(0xffea0000, 0x100), 52 DEFINE_RES_MEM(0xffeb0000, 0x100), 74 DEFINE_RES_MEM(0xffec0000, 0x100), 96 DEFINE_RES_MEM(0xffed0000, 0x100), 118 DEFINE_RES_MEM(0xffee0000, 0x100), 140 DEFINE_RES_MEM(0xffef0000, 0x100), 159 DEFINE_RES_MEM(0xffd80000, 0x30), 180 DEFINE_RES_MEM(0xffdc0000, 0x2c),
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D | setup-sh7343.c | 27 DEFINE_RES_MEM(0xffe00000, 0x100), 48 DEFINE_RES_MEM(0xffe10000, 0x100), 69 DEFINE_RES_MEM(0xffe20000, 0x100), 90 DEFINE_RES_MEM(0xffe30000, 0x100), 235 DEFINE_RES_MEM(0x044a0000, 0x70), 254 DEFINE_RES_MEM(0xffd80000, 0x2c),
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D | setup-sh7763.c | 29 DEFINE_RES_MEM(0xffe00000, 0x100), 51 DEFINE_RES_MEM(0xffe08000, 0x100), 73 DEFINE_RES_MEM(0xffe10000, 0x100), 165 DEFINE_RES_MEM(0xffd80000, 0x30), 186 DEFINE_RES_MEM(0xffd88000, 0x2c),
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D | setup-shx3.c | 37 DEFINE_RES_MEM(0xffc30000, 0x100), 61 DEFINE_RES_MEM(0xffc40000, 0x100), 85 DEFINE_RES_MEM(0xffc60000, 0x100), 107 DEFINE_RES_MEM(0xffc10000, 0x30), 128 DEFINE_RES_MEM(0xffc20000, 0x2c),
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D | setup-sh7724.c | 301 DEFINE_RES_MEM(0xffe00000, 0x100), 324 DEFINE_RES_MEM(0xffe10000, 0x100), 347 DEFINE_RES_MEM(0xffe20000, 0x100), 370 DEFINE_RES_MEM(0xa4e30000, 0x100), 393 DEFINE_RES_MEM(0xa4e40000, 0x100), 416 DEFINE_RES_MEM(0xa4e50000, 0x100), 655 DEFINE_RES_MEM(0x044a0000, 0x70), 674 DEFINE_RES_MEM(0xffd80000, 0x2c), 695 DEFINE_RES_MEM(0xffd90000, 0x2c),
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D | setup-sh7722.c | 190 DEFINE_RES_MEM(0xffe00000, 0x100), 213 DEFINE_RES_MEM(0xffe10000, 0x100), 236 DEFINE_RES_MEM(0xffe20000, 0x100), 420 DEFINE_RES_MEM(0x044a0000, 0x70), 439 DEFINE_RES_MEM(0xffd80000, 0x2c),
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D | setup-sh7780.c | 28 DEFINE_RES_MEM(0xffe00000, 0x100), 50 DEFINE_RES_MEM(0xffe10000, 0x100), 69 DEFINE_RES_MEM(0xffd80000, 0x30), 90 DEFINE_RES_MEM(0xffdc0000, 0x2c),
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D | setup-sh7366.c | 30 DEFINE_RES_MEM(0xffe00000, 0x100), 183 DEFINE_RES_MEM(0x044a0000, 0x70), 202 DEFINE_RES_MEM(0xffd80000, 0x2c),
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D | setup-sh7757.c | 33 DEFINE_RES_MEM(0xfe4b0000, 0x100), /* SCIF2 */ 54 DEFINE_RES_MEM(0xfe4c0000, 0x100), /* SCIF3 */ 75 DEFINE_RES_MEM(0xfe4d0000, 0x100), /* SCIF4 */ 94 DEFINE_RES_MEM(0xfe430000, 0x20),
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/linux-4.1.27/arch/sh/kernel/cpu/sh2a/ |
D | setup-sh7201.c | 187 DEFINE_RES_MEM(0xfffe8000, 0x100), 208 DEFINE_RES_MEM(0xfffe8800, 0x100), 229 DEFINE_RES_MEM(0xfffe9000, 0x100), 250 DEFINE_RES_MEM(0xfffe9800, 0x100), 271 DEFINE_RES_MEM(0xfffea000, 0x100), 292 DEFINE_RES_MEM(0xfffea800, 0x100), 313 DEFINE_RES_MEM(0xfffeb000, 0x100), 334 DEFINE_RES_MEM(0xfffeb800, 0x100), 369 DEFINE_RES_MEM(0xfffe4000, 0x400),
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D | setup-sh7206.c | 143 DEFINE_RES_MEM(0xfffe8000, 0x100), 164 DEFINE_RES_MEM(0xfffe8800, 0x100), 185 DEFINE_RES_MEM(0xfffe9000, 0x100), 206 DEFINE_RES_MEM(0xfffe9800, 0x100), 225 DEFINE_RES_MEM(0xfffec000, 0x10), 241 DEFINE_RES_MEM(0xfffe4000, 0x400),
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D | setup-sh7264.c | 237 DEFINE_RES_MEM(0xfffe8000, 0x100), 263 DEFINE_RES_MEM(0xfffe8800, 0x100), 289 DEFINE_RES_MEM(0xfffe9000, 0x100), 315 DEFINE_RES_MEM(0xfffe9800, 0x100), 341 DEFINE_RES_MEM(0xfffea000, 0x100), 367 DEFINE_RES_MEM(0xfffea800, 0x100), 393 DEFINE_RES_MEM(0xfffeb000, 0x100), 419 DEFINE_RES_MEM(0xfffeb800, 0x100), 441 DEFINE_RES_MEM(0xfffec000, 0x10), 457 DEFINE_RES_MEM(0xfffe4000, 0x400),
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D | setup-sh7269.c | 259 DEFINE_RES_MEM(0xe8007000, 0x100), 285 DEFINE_RES_MEM(0xe8007800, 0x100), 311 DEFINE_RES_MEM(0xe8008000, 0x100), 337 DEFINE_RES_MEM(0xe8008800, 0x100), 363 DEFINE_RES_MEM(0xe8009000, 0x100), 389 DEFINE_RES_MEM(0xe8009800, 0x100), 415 DEFINE_RES_MEM(0xe800a000, 0x100), 441 DEFINE_RES_MEM(0xe800a800, 0x100), 463 DEFINE_RES_MEM(0xfffec000, 0x10), 479 DEFINE_RES_MEM(0xfffe4000, 0x400),
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D | setup-sh7203.c | 185 DEFINE_RES_MEM(0xfffe8000, 0x100), 208 DEFINE_RES_MEM(0xfffe8800, 0x100), 231 DEFINE_RES_MEM(0xfffe9000, 0x100), 254 DEFINE_RES_MEM(0xfffe9800, 0x100), 273 DEFINE_RES_MEM(0xfffec000, 0x10), 289 DEFINE_RES_MEM(0xfffe4000, 0x400),
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D | setup-mxg.c | 118 DEFINE_RES_MEM(0xff801000, 0x400), 138 DEFINE_RES_MEM(0xff804000, 0x100),
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/linux-4.1.27/arch/arm/mach-rpc/ |
D | riscpc.c | 104 DEFINE_RES_MEM(0x03400000, 0x00200000), 119 DEFINE_RES_MEM(0x03200000, 0x10000), 169 DEFINE_RES_MEM(0x030107c0, 0x20), 170 DEFINE_RES_MEM(0x03010fd8, 0x04),
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/linux-4.1.27/drivers/mfd/ |
D | vexpress-sysreg.c | 107 DEFINE_RES_MEM(SYS_ID, 0x4), 142 DEFINE_RES_MEM(SYS_MISC, 0x4), 150 DEFINE_RES_MEM(SYS_PROCID0, 0x8), 158 DEFINE_RES_MEM(SYS_CFGDATA, 0xc),
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/linux-4.1.27/arch/sh/kernel/cpu/sh2/ |
D | setup-sh7619.c | 70 DEFINE_RES_MEM(0xf8400000, 0x100), 91 DEFINE_RES_MEM(0xf8410000, 0x100), 112 DEFINE_RES_MEM(0xf8420000, 0x100), 160 DEFINE_RES_MEM(0xf84a0070, 0x10),
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/linux-4.1.27/arch/sh/kernel/cpu/sh3/ |
D | setup-sh770x.c | 121 DEFINE_RES_MEM(0xfffffe80, 0x10), 146 DEFINE_RES_MEM(0xa4000150, 0x10), 172 DEFINE_RES_MEM(0xa4000140, 0x10), 192 DEFINE_RES_MEM(0xfffffe90, 0x2c),
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D | setup-sh7720.c | 63 DEFINE_RES_MEM(0xa4430000, 0x100), 86 DEFINE_RES_MEM(0xa4438000, 0x100), 160 DEFINE_RES_MEM(0x044a0000, 0x60), 179 DEFINE_RES_MEM(0xa412fe90, 0x28),
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D | setup-sh7710.c | 108 DEFINE_RES_MEM(0xa4400000, 0x100), 130 DEFINE_RES_MEM(0xa4410000, 0x100), 149 DEFINE_RES_MEM(0xa412fe90, 0x28),
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D | setup-sh7705.c | 82 DEFINE_RES_MEM(0xa4410000, 0x100), 105 DEFINE_RES_MEM(0xa4400000, 0x100), 150 DEFINE_RES_MEM(0xfffffe90, 0x2c),
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/linux-4.1.27/arch/sh/kernel/cpu/sh4/ |
D | setup-sh7760.c | 138 DEFINE_RES_MEM(0xfe600000, 0x100), 163 DEFINE_RES_MEM(0xfe610000, 0x100), 188 DEFINE_RES_MEM(0xfe620000, 0x100), 213 DEFINE_RES_MEM(0xfe480000, 0x100), 234 DEFINE_RES_MEM(0xffd80000, 0x30),
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D | setup-sh7750.c | 49 DEFINE_RES_MEM(0xffe00000, 0x100), 70 DEFINE_RES_MEM(0xffe80000, 0x100), 89 DEFINE_RES_MEM(0xffd80000, 0x30), 115 DEFINE_RES_MEM(0xfe100000, 0x20),
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D | setup-sh4-202.c | 26 DEFINE_RES_MEM(0xffe80000, 0x100), 48 DEFINE_RES_MEM(0xffd80000, 0x30),
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/linux-4.1.27/arch/sh/kernel/cpu/sh5/ |
D | setup-sh5.c | 26 DEFINE_RES_MEM(PHYS_PERIPHERAL_BLOCK + 0x01030000, 0x100), 80 DEFINE_RES_MEM(TMU_BASE, 0x30),
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/linux-4.1.27/arch/arm/mach-pxa/ |
D | hx4700.c | 300 [0] = DEFINE_RES_MEM(ASIC3_PHYS, ASIC3_MAP_SIZE_16BIT), 303 [2] = DEFINE_RES_MEM(ASIC3_SD_PHYS, ASIC3_MAP_SIZE_16BIT), 331 [0] = DEFINE_RES_MEM(PXA_CS5_PHYS, 0x4), 521 [0] = DEFINE_RES_MEM(ATI_W3220_PHYS, SZ_16M), 749 [0] = DEFINE_RES_MEM(PXA_CS0_PHYS, SZ_64M), 750 [1] = DEFINE_RES_MEM(PXA_CS0_PHYS + SZ_64M, SZ_64M),
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/linux-4.1.27/arch/arm/mach-iop32x/ |
D | gpio-iop32x.h | 2 DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x07c4), 0x10),
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/linux-4.1.27/drivers/staging/board/ |
D | kzm9d.c | 8 DEFINE_RES_MEM(0xe2800000, 0x2000),
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/linux-4.1.27/include/linux/amba/ |
D | bus.h | 143 .res = DEFINE_RES_MEM(base, SZ_4K), \ 154 .res = DEFINE_RES_MEM(base, SZ_4K), \
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/linux-4.1.27/arch/arm/include/asm/ |
D | smp_twd.h | 30 DEFINE_RES_MEM(base, 0x10), \
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/linux-4.1.27/arch/arm/mach-imx/ |
D | mm-imx3.c | 167 DEFINE_RES_MEM(MX31_AUDMUX_BASE_ADDR, SZ_16K), 265 DEFINE_RES_MEM(MX35_AUDMUX_BASE_ADDR, SZ_16K),
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D | mach-mx21ads.c | 142 DEFINE_RES_MEM(MX21_CS0_BASE_ADDR, SZ_32M); 155 DEFINE_RES_MEM(MX21ADS_CS8900A_REG, SZ_1K),
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D | mm-imx27.c | 79 DEFINE_RES_MEM(MX27_AUDMUX_BASE_ADDR, SZ_4K),
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D | mm-imx21.c | 79 DEFINE_RES_MEM(MX21_AUDMUX_BASE_ADDR, SZ_4K),
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D | mach-mx31ads.c | 110 DEFINE_RES_MEM(MX31_CS4_BASE_ADDR + CS4_CS8900_MMIO_START, SZ_64K),
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/linux-4.1.27/arch/arm/mach-iop33x/ |
D | iq80331.c | 126 DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x1780), 0x10),
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D | iq80332.c | 126 DEFINE_RES_MEM((IOP3XX_PERIPHERAL_PHYS_BASE + 0x1780), 0x10),
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/linux-4.1.27/arch/arm/mach-orion5x/ |
D | ts78xx-setup.c | 299 = DEFINE_RES_MEM(TS_NAND_DATA, 4); 338 = DEFINE_RES_MEM(TS_RNG_DATA, 4);
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/linux-4.1.27/arch/arm/plat-orion/ |
D | common.c | 599 DEFINE_RES_MEM(TIMER_PHYS_BASE, 0x04), 600 DEFINE_RES_MEM(RSTOUTn_MASK_PHYS, 0x04),
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/linux-4.1.27/include/linux/ |
D | ioport.h | 124 #define DEFINE_RES_MEM(_start, _size) \ macro
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