Searched refs:kHz (Results 1 - 200 of 609) sorted by relevance

1234

/linux-4.4.14/drivers/staging/sm750fb/
H A Dmodedb.h4 /* 640x400 @ 70 Hz, 31.5 kHz hsync */
8 /* 640x480 @ 60 Hz, 31.5 kHz hsync */
12 /* 800x600 @ 56 Hz, 35.15 kHz hsync */
16 /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */
20 /* 640x400 @ 85 Hz, 37.86 kHz hsync */
24 /* 640x480 @ 72 Hz, 36.5 kHz hsync */
28 /* 640x480 @ 75 Hz, 37.50 kHz hsync */
32 /* 800x600 @ 60 Hz, 37.8 kHz hsync */
37 /* 640x480 @ 85 Hz, 43.27 kHz hsync */
41 /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */
45 /* 800x600 @ 72 Hz, 48.0 kHz hsync */
50 /* 1024x768 @ 60 Hz, 48.4 kHz hsync */
54 /* 640x480 @ 100 Hz, 53.01 kHz hsync */
58 /* 1152x864 @ 60 Hz, 53.5 kHz hsync */
62 /* 800x600 @ 85 Hz, 55.84 kHz hsync */
66 /* 1024x768 @ 70 Hz, 56.5 kHz hsync */
80 /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */
84 /* 800x600 @ 100 Hz, 64.02 kHz hsync */
88 /* 1024x768 @ 76 Hz, 62.5 kHz hsync */
92 /* 1152x864 @ 70 Hz, 62.4 kHz hsync */
96 /* 1280x1024 @ 61 Hz, 64.2 kHz hsync */
100 /* 1400x1050 @ 60Hz, 63.9 kHz hsync */
104 /* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/
109 /* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/
114 /* 1024x768 @ 85 Hz, 70.24 kHz hsync */
118 /* 1152x864 @ 78 Hz, 70.8 kHz hsync */
122 /* 1280x1024 @ 70 Hz, 74.59 kHz hsync */
126 /* 1600x1200 @ 60Hz, 75.00 kHz hsync */
131 /* 1152x864 @ 84 Hz, 76.0 kHz hsync */
135 /* 1280x1024 @ 74 Hz, 78.85 kHz hsync */
139 /* 1024x768 @ 100Hz, 80.21 kHz hsync */
143 /* 1280x1024 @ 76 Hz, 81.13 kHz hsync */
147 /* 1600x1200 @ 70 Hz, 87.50 kHz hsync */
151 /* 1152x864 @ 100 Hz, 89.62 kHz hsync */
155 /* 1280x1024 @ 85 Hz, 91.15 kHz hsync */
160 /* 1600x1200 @ 75 Hz, 93.75 kHz hsync */
165 /* 1600x1200 @ 85 Hz, 105.77 kHz hsync */
170 /* 1280x1024 @ 100 Hz, 107.16 kHz hsync */
174 /* 1800x1440 @ 64Hz, 96.15 kHz hsync */
179 /* 1800x1440 @ 70Hz, 104.52 kHz hsync */
184 /* 512x384 @ 78 Hz, 31.50 kHz hsync */
188 /* 512x384 @ 85 Hz, 34.38 kHz hsync */
192 /* 320x200 @ 70 Hz, 31.5 kHz hsync, 8:5 aspect ratio */
196 /* 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio */
200 /* 320x240 @ 72 Hz, 36.5 kHz hsync */
204 /* 400x300 @ 56 Hz, 35.2 kHz hsync, 4:3 aspect ratio */
208 /* 400x300 @ 60 Hz, 37.8 kHz hsync */
212 /* 400x300 @ 72 Hz, 48.0 kHz hsync */
216 /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */
220 /* 480x300 @ 60 Hz, 37.8 kHz hsync */
224 /* 480x300 @ 63 Hz, 39.6 kHz hsync */
228 /* 480x300 @ 72 Hz, 48.0 kHz hsync */
/linux-4.4.14/sound/ppc/
H A Dawacs.h125 #define SAMPLERATE_48000 (0x0 << 3) /* 48 or 44.1 kHz */
126 #define SAMPLERATE_32000 (0x1 << 3) /* 32 or 29.4 kHz */
127 #define SAMPLERATE_24000 (0x2 << 3) /* 24 or 22.05 kHz */
128 #define SAMPLERATE_19200 (0x3 << 3) /* 19.2 or 17.64 kHz */
129 #define SAMPLERATE_16000 (0x4 << 3) /* 16 or 14.7 kHz */
130 #define SAMPLERATE_12000 (0x5 << 3) /* 12 or 11.025 kHz */
131 #define SAMPLERATE_9600 (0x6 << 3) /* 9.6 or 8.82 kHz */
132 #define SAMPLERATE_8000 (0x7 << 3) /* 8 or 7.35 kHz */
185 #define RATE_48000 (0x0 << 8) /* 48 kHz */
186 #define RATE_44100 (0x0 << 8) /* 44.1 kHz */
187 #define RATE_32000 (0x1 << 8) /* 32 kHz */
188 #define RATE_29400 (0x1 << 8) /* 29.4 kHz */
189 #define RATE_24000 (0x2 << 8) /* 24 kHz */
190 #define RATE_22050 (0x2 << 8) /* 22.05 kHz */
191 #define RATE_19200 (0x3 << 8) /* 19.2 kHz */
192 #define RATE_17640 (0x3 << 8) /* 17.64 kHz */
193 #define RATE_16000 (0x4 << 8) /* 16 kHz */
194 #define RATE_14700 (0x4 << 8) /* 14.7 kHz */
195 #define RATE_12000 (0x5 << 8) /* 12 kHz */
196 #define RATE_11025 (0x5 << 8) /* 11.025 kHz */
197 #define RATE_9600 (0x6 << 8) /* 9.6 kHz */
198 #define RATE_8820 (0x6 << 8) /* 8.82 kHz */
199 #define RATE_8000 (0x7 << 8) /* 8 kHz */
200 #define RATE_7350 (0x7 << 8) /* 7.35 kHz */
202 #define RATE_LOW 1 /* HIGH = 48kHz, etc; LOW = 44.1kHz, etc. */
/linux-4.4.14/include/sound/
H A Dasoundef.h42 #define IEC958_AES0_PRO_FS_44100 (1<<6) /* 44.1kHz */
43 #define IEC958_AES0_PRO_FS_48000 (2<<6) /* 48kHz */
44 #define IEC958_AES0_PRO_FS_32000 (3<<6) /* 32kHz */
129 #define IEC958_AES3_CON_FS_44100 (0<<0) /* 44.1kHz */
131 #define IEC958_AES3_CON_FS_48000 (2<<0) /* 48kHz */
132 #define IEC958_AES3_CON_FS_32000 (3<<0) /* 32kHz */
133 #define IEC958_AES3_CON_FS_22050 (4<<0) /* 22.05kHz */
134 #define IEC958_AES3_CON_FS_24000 (6<<0) /* 24kHz */
135 #define IEC958_AES3_CON_FS_88200 (8<<0) /* 88.2kHz */
136 #define IEC958_AES3_CON_FS_768000 (9<<0) /* 768kHz */
137 #define IEC958_AES3_CON_FS_96000 (10<<0) /* 96kHz */
138 #define IEC958_AES3_CON_FS_176400 (12<<0) /* 176.4kHz */
139 #define IEC958_AES3_CON_FS_192000 (14<<0) /* 192kHz */
154 #define IEC958_AES4_CON_ORIGFS_192000 (1<<4) /* 192kHz */
155 #define IEC958_AES4_CON_ORIGFS_12000 (2<<4) /* 12kHz */
156 #define IEC958_AES4_CON_ORIGFS_176400 (3<<4) /* 176.4kHz */
157 #define IEC958_AES4_CON_ORIGFS_96000 (5<<4) /* 96kHz */
158 #define IEC958_AES4_CON_ORIGFS_8000 (6<<4) /* 8kHz */
159 #define IEC958_AES4_CON_ORIGFS_88200 (7<<4) /* 88.2kHz */
160 #define IEC958_AES4_CON_ORIGFS_16000 (8<<4) /* 16kHz */
161 #define IEC958_AES4_CON_ORIGFS_24000 (9<<4) /* 24kHz */
162 #define IEC958_AES4_CON_ORIGFS_11025 (10<<4) /* 11.025kHz */
163 #define IEC958_AES4_CON_ORIGFS_22050 (11<<4) /* 22.05kHz */
164 #define IEC958_AES4_CON_ORIGFS_32000 (12<<4) /* 32kHz */
165 #define IEC958_AES4_CON_ORIGFS_48000 (13<<4) /* 48kHz */
166 #define IEC958_AES4_CON_ORIGFS_44100 (15<<4) /* 44.1kHz */
197 #define CEA861_AUDIO_INFOFRAME_DB2SF_32000 (1<<2) /* 32kHz */
198 #define CEA861_AUDIO_INFOFRAME_DB2SF_44100 (2<<2) /* 44.1kHz */
199 #define CEA861_AUDIO_INFOFRAME_DB2SF_48000 (3<<2) /* 48kHz */
200 #define CEA861_AUDIO_INFOFRAME_DB2SF_88200 (4<<2) /* 88.2kHz */
201 #define CEA861_AUDIO_INFOFRAME_DB2SF_96000 (5<<2) /* 96kHz */
202 #define CEA861_AUDIO_INFOFRAME_DB2SF_176400 (6<<2) /* 176.4kHz */
203 #define CEA861_AUDIO_INFOFRAME_DB2SF_192000 (7<<2) /* 192kHz */
H A Demu10k1.h193 #define HCFG_BAUD_RATE 0x00080000 /* 0 = 48kHz, 1 = 44.1kHz */
602 #define ADCCR_SAMPLERATE_48 0x00000000 /* 48kHz sample rate */
603 #define ADCCR_SAMPLERATE_44 0x00000001 /* 44.1kHz sample rate */
604 #define ADCCR_SAMPLERATE_32 0x00000002 /* 32kHz sample rate */
605 #define ADCCR_SAMPLERATE_24 0x00000003 /* 24kHz sample rate */
606 #define ADCCR_SAMPLERATE_22 0x00000004 /* 22.05kHz sample rate */
607 #define ADCCR_SAMPLERATE_16 0x00000005 /* 16kHz sample rate */
608 #define ADCCR_SAMPLERATE_11 0x00000006 /* 11.025kHz sample rate */
609 #define ADCCR_SAMPLERATE_8 0x00000007 /* 8kHz sample rate */
610 #define A_ADCCR_SAMPLERATE_12 0x00000006 /* 12kHz sample rate */
611 #define A_ADCCR_SAMPLERATE_11 0x00000007 /* 11.025kHz sample rate */
612 #define A_ADCCR_SAMPLERATE_8 0x00000008 /* 8kHz sample rate */
744 #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
745 #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
746 #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
864 /* the Audigy can record any output (16bit, 48kHz, up to 64 channel simultaneously) */
1039 #define EMU_HANA_DOCK_LEDS_2_44K 0x01 /* 44.1 kHz LED on */
1040 #define EMU_HANA_DOCK_LEDS_2_48K 0x02 /* 48 kHz LED on */
1041 #define EMU_HANA_DOCK_LEDS_2_96K 0x04 /* 96 kHz LED on */
1042 #define EMU_HANA_DOCK_LEDS_2_192K 0x08 /* 192 kHz LED on */
1065 #define EMU_HANA_DOCK_PHONES_192_DAC1 0x00 /* DAC 1 Headphones source at 192kHz */
1066 #define EMU_HANA_DOCK_PHONES_192_DAC2 0x10 /* DAC 2 Headphones source at 192kHz */
1067 #define EMU_HANA_DOCK_PHONES_192_DAC3 0x20 /* DAC 3 Headphones source at 192kHz */
1068 #define EMU_HANA_DOCK_PHONES_192_DAC4 0x30 /* DAC 4 Headphones source at 192kHz */
1128 * Destiniations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
1159 * Destinations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
1180 * Destiniations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
1190 * Destiniations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
1200 * Destinations for SRATEX = 1X rates: 44.1 kHz or 48 kHz
1246 #define EMU_DST_DOCK_DAC1_LEFT1 0x0100 /* Audio Dock DAC1 Left, 1st or 48kHz only */
1247 #define EMU_DST_DOCK_DAC1_LEFT2 0x0101 /* Audio Dock DAC1 Left, 2nd or 96kHz */
1248 #define EMU_DST_DOCK_DAC1_LEFT3 0x0102 /* Audio Dock DAC1 Left, 3rd or 192kHz */
1249 #define EMU_DST_DOCK_DAC1_LEFT4 0x0103 /* Audio Dock DAC1 Left, 4th or 192kHz */
1250 #define EMU_DST_DOCK_DAC1_RIGHT1 0x0104 /* Audio Dock DAC1 Right, 1st or 48kHz only */
1251 #define EMU_DST_DOCK_DAC1_RIGHT2 0x0105 /* Audio Dock DAC1 Right, 2nd or 96kHz */
1252 #define EMU_DST_DOCK_DAC1_RIGHT3 0x0106 /* Audio Dock DAC1 Right, 3rd or 192kHz */
1253 #define EMU_DST_DOCK_DAC1_RIGHT4 0x0107 /* Audio Dock DAC1 Right, 4th or 192kHz */
1254 #define EMU_DST_DOCK_DAC2_LEFT1 0x0108 /* Audio Dock DAC2 Left, 1st or 48kHz only */
1255 #define EMU_DST_DOCK_DAC2_LEFT2 0x0109 /* Audio Dock DAC2 Left, 2nd or 96kHz */
1256 #define EMU_DST_DOCK_DAC2_LEFT3 0x010a /* Audio Dock DAC2 Left, 3rd or 192kHz */
1257 #define EMU_DST_DOCK_DAC2_LEFT4 0x010b /* Audio Dock DAC2 Left, 4th or 192kHz */
1258 #define EMU_DST_DOCK_DAC2_RIGHT1 0x010c /* Audio Dock DAC2 Right, 1st or 48kHz only */
1259 #define EMU_DST_DOCK_DAC2_RIGHT2 0x010d /* Audio Dock DAC2 Right, 2nd or 96kHz */
1260 #define EMU_DST_DOCK_DAC2_RIGHT3 0x010e /* Audio Dock DAC2 Right, 3rd or 192kHz */
1261 #define EMU_DST_DOCK_DAC2_RIGHT4 0x010f /* Audio Dock DAC2 Right, 4th or 192kHz */
1262 #define EMU_DST_DOCK_DAC3_LEFT1 0x0110 /* Audio Dock DAC1 Left, 1st or 48kHz only */
1263 #define EMU_DST_DOCK_DAC3_LEFT2 0x0111 /* Audio Dock DAC1 Left, 2nd or 96kHz */
1264 #define EMU_DST_DOCK_DAC3_LEFT3 0x0112 /* Audio Dock DAC1 Left, 3rd or 192kHz */
1265 #define EMU_DST_DOCK_DAC3_LEFT4 0x0113 /* Audio Dock DAC1 Left, 4th or 192kHz */
1266 #define EMU_DST_DOCK_PHONES_LEFT1 0x0112 /* Audio Dock PHONES Left, 1st or 48kHz only */
1267 #define EMU_DST_DOCK_PHONES_LEFT2 0x0113 /* Audio Dock PHONES Left, 2nd or 96kHz */
1268 #define EMU_DST_DOCK_DAC3_RIGHT1 0x0114 /* Audio Dock DAC1 Right, 1st or 48kHz only */
1269 #define EMU_DST_DOCK_DAC3_RIGHT2 0x0115 /* Audio Dock DAC1 Right, 2nd or 96kHz */
1270 #define EMU_DST_DOCK_DAC3_RIGHT3 0x0116 /* Audio Dock DAC1 Right, 3rd or 192kHz */
1271 #define EMU_DST_DOCK_DAC3_RIGHT4 0x0117 /* Audio Dock DAC1 Right, 4th or 192kHz */
1272 #define EMU_DST_DOCK_PHONES_RIGHT1 0x0116 /* Audio Dock PHONES Right, 1st or 48kHz only */
1273 #define EMU_DST_DOCK_PHONES_RIGHT2 0x0117 /* Audio Dock PHONES Right, 2nd or 96kHz */
1274 #define EMU_DST_DOCK_DAC4_LEFT1 0x0118 /* Audio Dock DAC2 Left, 1st or 48kHz only */
1275 #define EMU_DST_DOCK_DAC4_LEFT2 0x0119 /* Audio Dock DAC2 Left, 2nd or 96kHz */
1276 #define EMU_DST_DOCK_DAC4_LEFT3 0x011a /* Audio Dock DAC2 Left, 3rd or 192kHz */
1277 #define EMU_DST_DOCK_DAC4_LEFT4 0x011b /* Audio Dock DAC2 Left, 4th or 192kHz */
1278 #define EMU_DST_DOCK_SPDIF_LEFT1 0x011a /* Audio Dock SPDIF Left, 1st or 48kHz only */
1279 #define EMU_DST_DOCK_SPDIF_LEFT2 0x011b /* Audio Dock SPDIF Left, 2nd or 96kHz */
1280 #define EMU_DST_DOCK_DAC4_RIGHT1 0x011c /* Audio Dock DAC2 Right, 1st or 48kHz only */
1281 #define EMU_DST_DOCK_DAC4_RIGHT2 0x011d /* Audio Dock DAC2 Right, 2nd or 96kHz */
1282 #define EMU_DST_DOCK_DAC4_RIGHT3 0x011e /* Audio Dock DAC2 Right, 3rd or 192kHz */
1283 #define EMU_DST_DOCK_DAC4_RIGHT4 0x011f /* Audio Dock DAC2 Right, 4th or 192kHz */
1284 #define EMU_DST_DOCK_SPDIF_RIGHT1 0x011e /* Audio Dock SPDIF Right, 1st or 48kHz only */
1285 #define EMU_DST_DOCK_SPDIF_RIGHT2 0x011f /* Audio Dock SPDIF Right, 2nd or 96kHz */
1286 #define EMU_DST_HANA_SPDIF_LEFT1 0x0200 /* Hana SPDIF Left, 1st or 48kHz only */
1287 #define EMU_DST_HANA_SPDIF_LEFT2 0x0202 /* Hana SPDIF Left, 2nd or 96kHz */
1288 #define EMU_DST_HANA_SPDIF_RIGHT1 0x0201 /* Hana SPDIF Right, 1st or 48kHz only */
1289 #define EMU_DST_HANA_SPDIF_RIGHT2 0x0203 /* Hana SPDIF Right, 2nd or 96kHz */
1290 #define EMU_DST_HAMOA_DAC_LEFT1 0x0300 /* Hamoa DAC Left, 1st or 48kHz only */
1291 #define EMU_DST_HAMOA_DAC_LEFT2 0x0302 /* Hamoa DAC Left, 2nd or 96kHz */
1292 #define EMU_DST_HAMOA_DAC_LEFT3 0x0304 /* Hamoa DAC Left, 3rd or 192kHz */
1293 #define EMU_DST_HAMOA_DAC_LEFT4 0x0306 /* Hamoa DAC Left, 4th or 192kHz */
1294 #define EMU_DST_HAMOA_DAC_RIGHT1 0x0301 /* Hamoa DAC Right, 1st or 48kHz only */
1295 #define EMU_DST_HAMOA_DAC_RIGHT2 0x0303 /* Hamoa DAC Right, 2nd or 96kHz */
1296 #define EMU_DST_HAMOA_DAC_RIGHT3 0x0305 /* Hamoa DAC Right, 3rd or 192kHz */
1297 #define EMU_DST_HAMOA_DAC_RIGHT4 0x0307 /* Hamoa DAC Right, 4th or 192kHz */
1307 /* Microdock S/PDIF OUT Left, 1st or 48kHz only */
1309 /* Microdock S/PDIF OUT Left, 2nd or 96kHz */
1311 /* Microdock S/PDIF OUT Right, 1st or 48kHz only */
1313 /* Microdock S/PDIF OUT Right, 2nd or 96kHz */
1318 /* Headphone jack on 1010 cardbus? 44.1/48kHz only? */
1320 /* Headphone jack on 1010 cardbus? 44.1/48kHz only? */
1327 * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
1351 * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
1375 * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
1388 * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
1401 * Sources SRATEX = 1X rates: 44.1 kHz or 48 kHz
1429 #define EMU_SRC_DOCK_MIC_A1 0x0100 /* Audio Dock Mic A, 1st or 48kHz only */
1430 #define EMU_SRC_DOCK_MIC_A2 0x0101 /* Audio Dock Mic A, 2nd or 96kHz */
1431 #define EMU_SRC_DOCK_MIC_A3 0x0102 /* Audio Dock Mic A, 3rd or 192kHz */
1432 #define EMU_SRC_DOCK_MIC_A4 0x0103 /* Audio Dock Mic A, 4th or 192kHz */
1433 #define EMU_SRC_DOCK_MIC_B1 0x0104 /* Audio Dock Mic B, 1st or 48kHz only */
1434 #define EMU_SRC_DOCK_MIC_B2 0x0105 /* Audio Dock Mic B, 2nd or 96kHz */
1435 #define EMU_SRC_DOCK_MIC_B3 0x0106 /* Audio Dock Mic B, 3rd or 192kHz */
1436 #define EMU_SRC_DOCK_MIC_B4 0x0107 /* Audio Dock Mic B, 4th or 192kHz */
1437 #define EMU_SRC_DOCK_ADC1_LEFT1 0x0108 /* Audio Dock ADC1 Left, 1st or 48kHz only */
1438 #define EMU_SRC_DOCK_ADC1_LEFT2 0x0109 /* Audio Dock ADC1 Left, 2nd or 96kHz */
1439 #define EMU_SRC_DOCK_ADC1_LEFT3 0x010a /* Audio Dock ADC1 Left, 3rd or 192kHz */
1440 #define EMU_SRC_DOCK_ADC1_LEFT4 0x010b /* Audio Dock ADC1 Left, 4th or 192kHz */
1441 #define EMU_SRC_DOCK_ADC1_RIGHT1 0x010c /* Audio Dock ADC1 Right, 1st or 48kHz only */
1442 #define EMU_SRC_DOCK_ADC1_RIGHT2 0x010d /* Audio Dock ADC1 Right, 2nd or 96kHz */
1443 #define EMU_SRC_DOCK_ADC1_RIGHT3 0x010e /* Audio Dock ADC1 Right, 3rd or 192kHz */
1444 #define EMU_SRC_DOCK_ADC1_RIGHT4 0x010f /* Audio Dock ADC1 Right, 4th or 192kHz */
1445 #define EMU_SRC_DOCK_ADC2_LEFT1 0x0110 /* Audio Dock ADC2 Left, 1st or 48kHz only */
1446 #define EMU_SRC_DOCK_ADC2_LEFT2 0x0111 /* Audio Dock ADC2 Left, 2nd or 96kHz */
1447 #define EMU_SRC_DOCK_ADC2_LEFT3 0x0112 /* Audio Dock ADC2 Left, 3rd or 192kHz */
1448 #define EMU_SRC_DOCK_ADC2_LEFT4 0x0113 /* Audio Dock ADC2 Left, 4th or 192kHz */
1449 #define EMU_SRC_DOCK_ADC2_RIGHT1 0x0114 /* Audio Dock ADC2 Right, 1st or 48kHz only */
1450 #define EMU_SRC_DOCK_ADC2_RIGHT2 0x0115 /* Audio Dock ADC2 Right, 2nd or 96kHz */
1451 #define EMU_SRC_DOCK_ADC2_RIGHT3 0x0116 /* Audio Dock ADC2 Right, 3rd or 192kHz */
1452 #define EMU_SRC_DOCK_ADC2_RIGHT4 0x0117 /* Audio Dock ADC2 Right, 4th or 192kHz */
1453 #define EMU_SRC_DOCK_ADC3_LEFT1 0x0118 /* Audio Dock ADC3 Left, 1st or 48kHz only */
1454 #define EMU_SRC_DOCK_ADC3_LEFT2 0x0119 /* Audio Dock ADC3 Left, 2nd or 96kHz */
1455 #define EMU_SRC_DOCK_ADC3_LEFT3 0x011a /* Audio Dock ADC3 Left, 3rd or 192kHz */
1456 #define EMU_SRC_DOCK_ADC3_LEFT4 0x011b /* Audio Dock ADC3 Left, 4th or 192kHz */
1457 #define EMU_SRC_DOCK_ADC3_RIGHT1 0x011c /* Audio Dock ADC3 Right, 1st or 48kHz only */
1458 #define EMU_SRC_DOCK_ADC3_RIGHT2 0x011d /* Audio Dock ADC3 Right, 2nd or 96kHz */
1459 #define EMU_SRC_DOCK_ADC3_RIGHT3 0x011e /* Audio Dock ADC3 Right, 3rd or 192kHz */
1460 #define EMU_SRC_DOCK_ADC3_RIGHT4 0x011f /* Audio Dock ADC3 Right, 4th or 192kHz */
1461 #define EMU_SRC_HAMOA_ADC_LEFT1 0x0200 /* Hamoa ADC Left, 1st or 48kHz only */
1462 #define EMU_SRC_HAMOA_ADC_LEFT2 0x0202 /* Hamoa ADC Left, 2nd or 96kHz */
1463 #define EMU_SRC_HAMOA_ADC_LEFT3 0x0204 /* Hamoa ADC Left, 3rd or 192kHz */
1464 #define EMU_SRC_HAMOA_ADC_LEFT4 0x0206 /* Hamoa ADC Left, 4th or 192kHz */
1465 #define EMU_SRC_HAMOA_ADC_RIGHT1 0x0201 /* Hamoa ADC Right, 1st or 48kHz only */
1466 #define EMU_SRC_HAMOA_ADC_RIGHT2 0x0203 /* Hamoa ADC Right, 2nd or 96kHz */
1467 #define EMU_SRC_HAMOA_ADC_RIGHT3 0x0205 /* Hamoa ADC Right, 3rd or 192kHz */
1468 #define EMU_SRC_HAMOA_ADC_RIGHT4 0x0207 /* Hamoa ADC Right, 4th or 192kHz */
1472 #define EMU_SRC_HANA_SPDIF_LEFT1 0x0500 /* Hana SPDIF Left, 1st or 48kHz only */
1473 #define EMU_SRC_HANA_SPDIF_LEFT2 0x0502 /* Hana SPDIF Left, 2nd or 96kHz */
1474 #define EMU_SRC_HANA_SPDIF_RIGHT1 0x0501 /* Hana SPDIF Right, 1st or 48kHz only */
1475 #define EMU_SRC_HANA_SPDIF_RIGHT2 0x0503 /* Hana SPDIF Right, 2nd or 96kHz */
1478 /* Microdock S/PDIF Left, 1st or 48kHz only */
1480 /* Microdock S/PDIF Left, 2nd or 96kHz */
1482 /* Microdock S/PDIF Right, 1st or 48kHz only */
1484 /* Microdock S/PDIF Right, 2nd or 96kHz */
H A Dcs8403.h133 case IEC958_AES0_PRO_FS_44100: bits |= 0x10; break; /* 44.1kHz */ SND_CS8403_ENCODE()
134 case IEC958_AES0_PRO_FS_48000: bits |= 0x08; break; /* 48kHz */ SND_CS8403_ENCODE()
234 case IEC958_AES0_PRO_FS_44100: bits |= 0x40; break; /* 44.1kHz */ SND_CS8404_ENCODE()
235 case IEC958_AES0_PRO_FS_48000: bits |= 0x20; break; /* 48kHz */ SND_CS8404_ENCODE()
H A Dak4114.h88 #define AK4114_DEM1 (1<<2) /* 32kHz-48kHz Deemphasis Control */
89 #define AK4114_DEM0 (1<<1) /* 32kHz-48kHz Deemphasis Control */
94 #define AK4114_DFS (1<<0) /* 96kHz Deemphasis Control */
H A Dak4113.h122 /* 32kHz-48kHz Deemphasis Control */
124 /* 32kHz-48kHz Deemphasis Control */
/linux-4.4.14/arch/mips/include/asm/mach-loongson32/
H A Dcpufreq.h19 unsigned int max_freq; /* in kHz */
20 unsigned int min_freq; /* in kHz */
/linux-4.4.14/drivers/media/dvb-frontends/
H A Dtda8261.h24 TDA8261_STEP_2000 = 0, /* 2000 kHz */
25 TDA8261_STEP_1000, /* 1000 kHz */
26 TDA8261_STEP_500, /* 500 kHz */
27 TDA8261_STEP_250, /* 250 kHz */
28 TDA8261_STEP_125 /* 125 kHz */
H A Dlnbh25.h28 /* 22 kHz tone enabled. Tone output controlled by DSQIN pin */
30 /* Low power mode activated (used only with 22 kHz tone output disabled) */
32 /* DSQIN input pin is set to receive external 22 kHz TTL signal source */
H A Datbm8830.h50 u32 osc_clk_freq; /* in kHz */
53 u32 if_freq; /* in kHz */
H A Dlgs8gxx.h58 u32 if_clk_freq; /* in kHz */
61 u32 if_freq; /* in kHz */
H A Ddib0070.h30 /* offset in kHz */
H A Dzl10353.h32 /* frequencies in units of 0.1kHz */
H A Dstb6100.c327 "frequency = %u kHz, odiv = %u, psd2 = %u, fxtal = %u kHz, fvco = %u kHz, N(I) = %u, N(F) = %u", stb6100_get_frequency()
380 printk(KERN_ERR "%s: frequency out of range: %u kHz\n", __func__, frequency); stb6100_set_frequency()
504 status->bandwidth = 36000; /* kHz */ stb6100_init()
506 state->reference = status->refclock / 1000; /* kHz */ stb6100_init()
593 state->reference = config->refclock / 1000; /* kHz */ stb6100_attach()
H A Dzl10036.c57 * 64, (write 0x05 to reg), freq step size 158kHz
58 * 10, (write 0x0a to reg), freq step size 1.011kHz (used here)
59 * 5, (write 0x09 to reg), freq step size 2.022kHz
205 /* fbw is measured in kHz */ zl10036_set_bandwidth()
222 #define _BR_MAXIMUM (_XTAL/575) /* _XTAL / 575kHz = 17 */ zl10036_set_bandwidth()
331 /* scale to kHz */ zl10036_set_params()
H A Dmt352.h43 /* frequencies in kHz */
H A Dz0194a.h47 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
H A Dstv6110.c272 dprintk("%s, freq=%d kHz, mclk=%d Hz\n", __func__, stv6110_set_frequency()
354 dprintk("%s, stat1=%x, lo_freq=%d kHz, vco_frec=%d kHz\n", __func__, stv6110_set_frequency()
H A Dbsbe1.h32 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
H A Dmt352_priv.h124 /* here we assume 1/6MHz == 166.66kHz stepsize */
H A Dstv0367_priv.h188 u32 frequency; /* kHz */
H A Dbsru6.h32 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */
H A Ddib0090.h50 /* offset in kHz */
H A Ddvb_dummy_fe.c236 .frequency_stepsize = 250, /* kHz for QPSK frontends */
H A Dlnbp21.c161 if (!(override_clear & LNBH24_TEN)) /*22kHz logic controlled by demod*/ lnbx2x_attach()
H A Dtda8261.c83 static const u32 div_tab[] = { 2000, 1000, 500, 250, 125 }; /* kHz */
H A Dtua6100.c115 * The N divisor ratio (note: c->frequency is in kHz, but we tua6100_set_params()
/linux-4.4.14/include/linux/platform_data/
H A Di2c-davinci.h15 /* All frequencies are expressed in kHz */
17 unsigned int bus_freq; /* standard bus frequency (kHz) */
H A Dad7793.h13 * @AD7793_CLK_SRC_INT: Internal 64 kHz clock, not available at the CLK pin.
14 * @AD7793_CLK_SRC_INT_CO: Internal 64 kHz clock, available at the CLK pin.
H A Dcamera-mx3.h41 * @mclk_10khz: master clock frequency in 10kHz units
/linux-4.4.14/drivers/i2c/algos/
H A Di2c-algo-pcf.h58 #define I2C_PCF_TRNS90 0x00 /* 90 kHz */
59 #define I2C_PCF_TRNS45 0x01 /* 45 kHz */
60 #define I2C_PCF_TRNS11 0x02 /* 11 kHz */
61 #define I2C_PCF_TRNS15 0x03 /* 1.5 kHz */
H A Di2c-algo-pca.c427 " Using default 59kHz.\n", adap->name); pca_init()
461 " Using 1265.8kHz.\n", adap->name); pca_init()
467 " Using 60.3kHz.\n", adap->name); pca_init()
/linux-4.4.14/drivers/video/fbdev/core/
H A Dmodedb.c38 /* 640x400 @ 70 Hz, 31.5 kHz hsync */
42 /* 640x480 @ 60 Hz, 31.5 kHz hsync */
46 /* 800x600 @ 56 Hz, 35.15 kHz hsync */
50 /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */
54 /* 640x400 @ 85 Hz, 37.86 kHz hsync */
58 /* 640x480 @ 72 Hz, 36.5 kHz hsync */
62 /* 640x480 @ 75 Hz, 37.50 kHz hsync */
66 /* 800x600 @ 60 Hz, 37.8 kHz hsync */
71 /* 640x480 @ 85 Hz, 43.27 kHz hsync */
75 /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */
78 /* 800x600 @ 72 Hz, 48.0 kHz hsync */
83 /* 1024x768 @ 60 Hz, 48.4 kHz hsync */
87 /* 640x480 @ 100 Hz, 53.01 kHz hsync */
91 /* 1152x864 @ 60 Hz, 53.5 kHz hsync */
95 /* 800x600 @ 85 Hz, 55.84 kHz hsync */
99 /* 1024x768 @ 70 Hz, 56.5 kHz hsync */
103 /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */
107 /* 800x600 @ 100 Hz, 64.02 kHz hsync */
111 /* 1024x768 @ 76 Hz, 62.5 kHz hsync */
115 /* 1152x864 @ 70 Hz, 62.4 kHz hsync */
119 /* 1280x1024 @ 61 Hz, 64.2 kHz hsync */
123 /* 1400x1050 @ 60Hz, 63.9 kHz hsync */
127 /* 1400x1050 @ 75,107 Hz, 82,392 kHz +hsync +vsync*/
132 /* 1400x1050 @ 60 Hz, ? kHz +hsync +vsync*/
137 /* 1024x768 @ 85 Hz, 70.24 kHz hsync */
141 /* 1152x864 @ 78 Hz, 70.8 kHz hsync */
145 /* 1280x1024 @ 70 Hz, 74.59 kHz hsync */
149 /* 1600x1200 @ 60Hz, 75.00 kHz hsync */
154 /* 1152x864 @ 84 Hz, 76.0 kHz hsync */
158 /* 1280x1024 @ 74 Hz, 78.85 kHz hsync */
162 /* 1024x768 @ 100Hz, 80.21 kHz hsync */
166 /* 1280x1024 @ 76 Hz, 81.13 kHz hsync */
170 /* 1600x1200 @ 70 Hz, 87.50 kHz hsync */
174 /* 1152x864 @ 100 Hz, 89.62 kHz hsync */
178 /* 1280x1024 @ 85 Hz, 91.15 kHz hsync */
183 /* 1600x1200 @ 75 Hz, 93.75 kHz hsync */
188 /* 1680x1050 @ 60 Hz, 65.191 kHz hsync */
193 /* 1600x1200 @ 85 Hz, 105.77 kHz hsync */
198 /* 1280x1024 @ 100 Hz, 107.16 kHz hsync */
202 /* 1800x1440 @ 64Hz, 96.15 kHz hsync */
207 /* 1800x1440 @ 70Hz, 104.52 kHz hsync */
212 /* 512x384 @ 78 Hz, 31.50 kHz hsync */
216 /* 512x384 @ 85 Hz, 34.38 kHz hsync */
220 /* 320x200 @ 70 Hz, 31.5 kHz hsync, 8:5 aspect ratio */
224 /* 320x240 @ 60 Hz, 31.5 kHz hsync, 4:3 aspect ratio */
228 /* 320x240 @ 72 Hz, 36.5 kHz hsync */
232 /* 400x300 @ 56 Hz, 35.2 kHz hsync, 4:3 aspect ratio */
236 /* 400x300 @ 60 Hz, 37.8 kHz hsync */
240 /* 400x300 @ 72 Hz, 48.0 kHz hsync */
244 /* 480x300 @ 56 Hz, 35.2 kHz hsync, 8:5 aspect ratio */
248 /* 480x300 @ 60 Hz, 37.8 kHz hsync */
252 /* 480x300 @ 63 Hz, 39.6 kHz hsync */
256 /* 480x300 @ 72 Hz, 48.0 kHz hsync */
270 /* 1366x768, 60 Hz, 47.403 kHz hsync, WXGA 16:9 aspect ratio */
274 /* 1280x800, 60 Hz, 47.403 kHz hsync, WXGA 16:10 aspect ratio */
278 /* 720x576i @ 50 Hz, 15.625 kHz hsync (PAL RGB) */
282 /* 800x520i @ 50 Hz, 15.625 kHz hsync (PAL RGB) */
286 /* 864x480 @ 60 Hz, 35.15 kHz hsync */
/linux-4.4.14/drivers/cpufreq/
H A Dcpufreq_userspace.c27 * @freq: target frequency in kHz
35 pr_debug("cpufreq_set for cpu %u, freq %u kHz\n", policy->cpu, freq); cpufreq_set()
76 pr_debug("limit event for cpu %u: %u - %u kHz, currently %u kHz\n", cpufreq_governor_userspace()
H A Dlongrun.c22 * longrun_{low,high}_freq is needed for the conversion of cpufreq kHz
188 *low_freq = msr_lo * 1000; /* to kHz */ longrun_determine_freqs()
193 *high_freq = msr_lo * 1000; /* to kHz */ longrun_determine_freqs()
195 pr_debug("longrun table interface told %u - %u kHz\n", longrun_determine_freqs()
206 pr_debug("high frequency is %u kHz\n", *high_freq); longrun_determine_freqs()
246 *low_freq = edx * 1000; /* back to kHz */ longrun_determine_freqs()
248 pr_debug("low frequency is %u kHz\n", *low_freq); longrun_determine_freqs()
H A Dppc_cbe_cpufreq.c99 /* we need the freq in kHz */ cbe_cpufreq_cpu_init()
102 pr_debug("max clock-frequency is at %u kHz\n", max_freq); cbe_cpufreq_cpu_init()
132 pr_debug("setting frequency for cpu %d to %d kHz, " \ cbe_cpufreq_target()
H A Dcpufreq_performance.c25 pr_debug("setting to %u kHz because of event %u\n", cpufreq_governor_performance()
H A Dcpufreq_powersave.c25 pr_debug("setting to %u kHz because of event %u\n", cpufreq_governor_powersave()
H A Dfreq_table.c51 pr_debug("table entry %u: %u kHz\n", (int)(pos - table), freq); cpufreq_for_each_valid_entry()
76 pr_debug("request for verification of policy (%u - %u kHz) for cpu %u\n", cpufreq_frequency_table_verify()
98 pr_debug("verification lead to (%u - %u kHz) for cpu %u\n",
137 pr_debug("request for target %u kHz (relation: %u) for cpu %u\n", cpufreq_frequency_table_target()
205 pr_debug("target index is %u, freq is:%u kHz\n", *index,
H A Dpasemi-cpufreq.c194 /* we need the freq in kHz */ pas_cpufreq_cpu_init()
197 pr_debug("max clock-frequency is at %u kHz\n", max_freq); pas_cpufreq_cpu_init()
245 pr_debug("setting frequency for cpu %d to %d kHz, 1/%d of max frequency\n", pas_cpufreq_target()
H A Dpowernow-k6.c26 static unsigned int busfreq; /* FSB, in 10 kHz */
36 MODULE_PARM_DESC(bus_frequency, "Bus frequency in kHz");
196 printk(KERN_ERR "powernow-k6: invalid bus_frequency parameter, allowed range 50000 - 150000 kHz\n");
H A Dsh-cpufreq.c59 /* Convert target_freq from kHz to Hz */ sh_cpufreq_target()
H A Dcpufreq-nforce2.c270 pr_debug("Old CPU frequency %d kHz, new %d kHz\n", nforce2_target()
H A Dspeedstep-ich.c49 * are in kHz for the time being.
247 pr_debug("detected %u kHz as current frequency\n", speed); speedstep_get()
H A Dgx-suspmod.c136 * though. 781.25 kHz(!) for a 200 MHz processor -- wow. */
321 pr_debug("suspend modulation w/ clock speed: %d kHz.\n", freqs.new); gx_set_cpuspeed()
331 * This function checks if a given frequency range in kHz is valid
H A Dspeedstep-centrino.c65 unsigned max_freq; /* max clock in kHz */
290 * Extract clock in kHz from PERF_CTL value extract_clock()
320 /* Return the current CPU frequency in kHz */ get_cur_freq()
H A Delanfreq.c38 int clock; /* frequency in kHz */
/linux-4.4.14/arch/arm/mach-ep93xx/
H A Dtimer-ep93xx.c16 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
17 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
20 * The 508 kHz timers are ideal for use for the timer interrupt, as the
21 * most common values of HZ divide 508 kHz nicely. We pick the 32 bit
74 /* Default mode: periodic, off, 508 kHz */ ep93xx_clkevt_set_next_event()
/linux-4.4.14/drivers/media/tuners/
H A Dqt1010_priv.h54 1a d0 set frequency: 125 kHz scale, n*125 kHz
78 #define QT1010_STEP 125000 /* 125 kHz used by Windows drivers,
H A Dtda9887.c275 "- 12.5 kHz", dump_read_message()
276 "- 37.5 kHz", dump_read_message()
277 "- 62.5 kHz", dump_read_message()
278 "- 87.5 kHz", dump_read_message()
279 "-112.5 kHz", dump_read_message()
280 "-137.5 kHz", dump_read_message()
281 "-162.5 kHz", dump_read_message()
282 "-187.5 kHz [min]", dump_read_message()
283 "+187.5 kHz [max]", dump_read_message()
284 "+162.5 kHz", dump_read_message()
285 "+137.5 kHz", dump_read_message()
286 "+112.5 kHz", dump_read_message()
287 "+ 87.5 kHz", dump_read_message()
288 "+ 62.5 kHz", dump_read_message()
289 "+ 37.5 kHz", dump_read_message()
290 "+ 12.5 kHz", dump_read_message()
H A Dqm1d1c0042.h26 u32 xtal_freq; /* [kHz] */ /* currently ignored */
H A Dtuner-xc2028.h15 /* Dmoduler IF (kHz) */
H A Dmt2060.c118 #define BANDWIDTH 4000 // kHz
131 dprintk("Spurs before : f_lo1: %d f_lo2: %d (kHz)", mt2060_spurcheck()
146 dprintk("Spurs after : f_lo1: %d f_lo2: %d (kHz)", mt2060_spurcheck()
179 freq = c->frequency / 1000; /* Hz -> kHz */ mt2060_set_params()
184 // From the Comtech datasheet, the step used is 50kHz. The tuner chip could be more precise mt2060_set_params()
H A Dmsi001.c117 { 450000, 0x02}, /* 450 kHz IF */ msi001_set_tuner()
125 { 200000, 0x00}, /* 200 kHz */ msi001_set_tuner()
126 { 300000, 0x01}, /* 300 kHz */ msi001_set_tuner()
127 { 600000, 0x02}, /* 600 kHz */ msi001_set_tuner()
/linux-4.4.14/sound/firewire/bebob/
H A Dbebob_yamaha.c19 * Both of them have a capability to change its sampling rate up to 192.0kHz.
20 * At 192.0kHz, the device reports 4 PCM-in, 1 MIDI-in, 6 PCM-out, 1 MIDI-out.
28 * reccomend users to close ffado-mixer at 192.0kHz if mixer is needless.
/linux-4.4.14/drivers/media/radio/
H A Dlm7000.h28 freq /= 400; /* Convert to 25 kHz units */ lm7000_set_freq()
H A Dradio-cadet.c98 .rangelow = 8320, /* 520 kHz */
99 .rangehigh = 26400, /* 1650 kHz */
184 freq = (freq * 16) / 1000; /* Make it 1/16 kHz */ cadet_getfreq()
228 freq = freq / 16; /* Make it kHz */ cadet_setfreq()
229 freq += 10700; /* IF is 10700 kHz */ cadet_setfreq()
239 fifo = (freq / 16) + 450; /* Make it kHz */ cadet_setfreq()
380 v->rangelow = bands[0].rangelow; /* 520 kHz (start of AM band) */ vidioc_g_tuner()
391 v->rangelow = 8320; /* 520 kHz */ vidioc_g_tuner()
392 v->rangehigh = 26400; /* 1650 kHz */ vidioc_g_tuner()
H A Dradio-tea5777.c42 #define TEA5777_FM_IF 150 /* kHz */
43 #define TEA5777_FM_FREQ_STEP 50 /* kHz */
45 #define TEA5777_AM_IF 21 /* kHz */
46 #define TEA5777_AM_FREQ_STEP 1 /* kHz */
194 freq = (freq + 8) / 16; /* to kHz */ radio_tea5777_set_freq()
426 spacing = (tea->band == BAND_AM) ? (5 * 16) : (200 * 16); /* kHz */ vidioc_s_hw_freq_seek()
H A Dradio-typhoon.c68 MODULE_PARM_DESC(mutefreq, "Frequency used when muting the card (in kHz)");
163 printk(KERN_ERR "%s: You must set a frequency (in kHz) used when muting the card,\n", typhoon_init()
H A Dradio-gemtek.c84 * value 10.7 MHz), reference divisor 6.39 kHz (nominal 6.25 kHz).
95 #define GEMTEK_STDF_3_125_KHZ 0x01 /* Standard frequency 3.125 kHz */
H A Dtea575x.c186 bands[tea->band].rangehigh); /* from kHz */ snd_tea575x_val_to_freq()
196 u32 freq = tea->freq / 16; /* to kHz */ snd_tea575x_set_freq()
408 spacing = (tea->band == BAND_AM) ? 5 : 50; /* kHz */ snd_tea575x_s_hw_freq_seek()
H A Dradio-trust.c151 freq /= 160; /* Convert to 10 kHz units */ trust_s_frequency()
/linux-4.4.14/arch/alpha/include/asm/
H A Dtimex.h10 the 32.768kHz reference clock, which nicely divides down to our HZ. */
/linux-4.4.14/include/linux/
H A Di2c-ocores.h17 u32 clock_khz; /* input clock in kHz */
H A Dmc146818rtc.h79 /* divider control: refclock values 4.194 / 1.049 MHz / 32.768 kHz */
86 /* Periodic intr. / Square wave rate select. 0=none, 1=32.8kHz,... 15=2Hz */
H A Di2c-gpio.h17 * @udelay: signal toggle delay. SCL frequency is (500 / udelay) kHz
H A Dwm97xx.h52 #define WM97XX_CM_RATE_8K 0x00f0 /* 8kHz continuous rate */
53 #define WM97XX_CM_RATE_12K 0x01f0 /* 12kHz continuous rate */
54 #define WM97XX_CM_RATE_24K 0x02f0 /* 24kHz continuous rate */
55 #define WM97XX_CM_RATE_48K 0x03f0 /* 48kHz continuous rate */
H A Dds17287rtc.h55 #define DS_XCTRL4B_E32K 0x40 /* enable 32.768 kHz Output */
H A Dcpufreq.h26 * Frequency values here are CPU kHz
55 unsigned int min; /* in kHz */
56 unsigned int max; /* in kHz */
72 unsigned int min; /* in kHz */
73 unsigned int max; /* in kHz */
74 unsigned int cur; /* in kHz, only needed if cpufreq
505 unsigned int frequency; /* kHz - doesn't need to be in ascending
/linux-4.4.14/sound/soc/codecs/
H A Dwm8974.c55 static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" };
60 static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
61 static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
62 static const char *wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" };
H A Dpcm3008.c117 * Low Low De-emphasis 44.1 kHz ON pcm3008_codec_probe()
119 * High Low De-emphasis 48 kHz ON pcm3008_codec_probe()
120 * High High De-emphasis 32 kHz ON pcm3008_codec_probe()
H A Dad1836.c41 static const char *ad1836_deemp[] = {"None", "44.1kHz", "32kHz", "48kHz"};
263 /* de-emphasis: 48kHz, power-on dac */ ad1836_probe()
H A Dad193x.c33 static const char * const ad193x_deemp[] = {"None", "48kHz", "44.1kHz", "32kHz"};
364 /* de-emphasis: 48kHz, powedown dac */ ad193x_codec_probe()
H A Darizona.c533 "12kHz", "24kHz", "48kHz", "96kHz", "192kHz",
534 "11.025kHz", "22.05kHz", "44.1kHz", "88.2kHz", "176.4kHz",
535 "4kHz", "8kHz", "16kHz", "32kHz",
559 "SYNCCLK rate", "8kHz", "16kHz", "ASYNCCLK rate",
686 "1.536MHz", "3.072MHz", "6.144MHz", "768kHz",
2266 /* Configure default refclk to 32kHz if we have one */ arizona_init_fll()
H A Dwm8753.c161 {"130Hz @ 48kHz", "200Hz @ 48kHz", "100Hz @ 16kHz", "400Hz @ 48kHz",
162 "100Hz @ 8kHz", "200Hz @ 8kHz"};
163 static const char *wm8753_treble[] = {"8kHz", "4kHz"};
167 static const char *wm8753_3d_uc[] = {"2.2kHz", "1.5kHz"};
169 static const char *wm8753_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz"};
188 static const char *wm8753_adc_hp[] = {"3.4Hz @ 48kHz", "82Hz @ 16k",
189 "82Hz @ 8kHz", "170Hz @ 8kHz"};
H A Dwm8978.c114 static const char *wm8978_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz"};
115 static const char *wm8978_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz"};
116 static const char *wm8978_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz"};
905 /* Also supports 12kHz */
H A Dwm8971.c96 static const char *wm8971_bass_filter[] = { "130Hz @ 48kHz",
97 "200Hz @ 48kHz" };
98 static const char *wm8971_treble[] = { "8kHz", "4kHz" };
102 static const char *wm8971_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" };
H A Dwm8983.c172 "650Hz", "850Hz", "1.1kHz", "1.4kHz"
177 "1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz"
182 "5.3kHz", "6.9kHz", "9kHz", "11.7kHz"
H A Dwm8985.c253 "650Hz", "850Hz", "1.1kHz", "1.4kHz"
259 "1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz"
264 "5.3kHz", "6.9kHz", "9kHz", "11.7kHz"
H A Dwm8988.c132 static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
136 static const char *treble_txt[] = {"8kHz", "4kHz"};
144 static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"};
H A Dwm8750.c95 static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
96 static const char *wm8750_treble[] = {"8kHz", "4kHz"};
98 static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
H A Dak4535.c71 static const char *ak4535_deemp[] = {"44.1kHz", "Off", "48kHz", "32kHz"};
H A Dwm8350.c372 static const char *wm8350_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" };
377 static const char *wm8350_adchp[] = { "44.1kHz", "8kHz", "16kHz", "32kHz" };
H A Dak4641.c155 SOC_SINGLE_TLV("EQ3 1 kHz Volume", AK4641_EQMID, 0, 15, 1, eq_tlv),
156 SOC_SINGLE_TLV("EQ4 3.5 kHz Volume", AK4641_EQMID, 4, 15, 1, eq_tlv),
157 SOC_SINGLE_TLV("EQ5 10 kHz Volume", AK4641_EQHI, 0, 15, 1, eq_tlv),
H A Dwm8510.c117 static const char *wm8510_deemp[] = { "None", "32kHz", "44.1kHz", "48kHz" };
H A Dwm8961.c324 "None", "32kHz", "44.1kHz", "48kHz",
584 /* Sloping stop-band filter is recommended for <= 24kHz */ wm8961_hw_params()
H A Dak5386.c3 * Asahi Kasei AK5386 Single-ended 24-Bit 192kHz delta-sigma ADC
/linux-4.4.14/drivers/media/pci/cx23885/
H A Dcx23885-input.c167 /* RC-5: 2,222,222 ns = 1/36 kHz * 32 cycles * 2 marks * 1.25*/ cx23885_input_ir_start()
168 /* RC-6A: 3,333,333 ns = 1/36 kHz * 16 cycles * 6 marks * 1.25*/ cx23885_input_ir_start()
170 /* RC-5: 666,667 ns = 1/36 kHz * 32 cycles * 1 mark * 0.75 */ cx23885_input_ir_start()
171 /* RC-6A: 333,333 ns = 1/36 kHz * 16 cycles * 1 mark * 0.75 */ cx23885_input_ir_start()
194 params.carrier_freq = 37917; /* Hz, 455 kHz/12 for NEC */ cx23885_input_ir_start()
200 * NEC max pulse width: (64/3)/(455 kHz/12) * 16 nec_units cx23885_input_ir_start()
201 * (64/3)/(455 kHz/12) * 16 nec_units * 1.375 = 12378022 ns cx23885_input_ir_start()
206 * NEC noise filter min width: (64/3)/(455 kHz/12) * 1 nec_unit cx23885_input_ir_start()
207 * (64/3)/(455 kHz/12) * 1 nec_units * 0.625 = 351648 ns cx23885_input_ir_start()
/linux-4.4.14/drivers/rtc/
H A Drtc-au1xxx.c11 /* All current Au1xxx SoCs have 2 counters fed by an external 32.768 kHz
16 * no checks as to whether they really get a proper 32.768kHz clock are
28 /* 32kHz clock enabled and detected */
H A Drtc-tegra.c31 /* set to 1 = busy every eight 32kHz clocks during copy of sec+msec to AHB */
67 * every eight 32kHz clocks (~250uS).
81 * AHB side) occurs every eight 32kHz clocks (~250uS).
H A Drtc-ab3100.c23 * Bit 1: 32 kHz Oscillator, 0 = on, 1 = bypass
25 * Bit 3: 32 kHz buffer disabling, 0 = enabled, 1 = disabled
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_afmt.c33 /* 32kHz 44.1kHz 48kHz */
/linux-4.4.14/drivers/media/i2c/
H A Dtlv320aic23b.c79 case 32000: /* set sample rate to 32 kHz */ tlv320aic23b_s_clock_freq()
82 case 44100: /* set sample rate to 44.1 kHz */ tlv320aic23b_s_clock_freq()
85 case 48000: /* set sample rate to 48 kHz */ tlv320aic23b_s_clock_freq()
174 /* set sample rate to 48 kHz */ tlv320aic23b_probe()
H A Dcs5345.c2 * cs5345 Cirrus Logic 24-bit, 192 kHz Stereo Audio ADC
/linux-4.4.14/arch/mips/alchemy/common/
H A Dtime.c28 * Clocksource/event using the 32.768kHz-clocked Counter1 ('RTC' in the
44 /* 32kHz clock enabled and detected */
101 /* Check if firmware (YAMON, ...) has enabled 32kHz and clock alchemy_time_init()
120 alchemy_wrsys(0, AU1000_SYS_RTCTRIM); /* 32.768 kHz */ alchemy_time_init()
/linux-4.4.14/Documentation/EDID/
H A D800x600.S23 #define CLOCK 40000 /* kHz */
H A D1024x768.S26 #define CLOCK 65000 /* kHz */
H A D1280x1024.S26 #define CLOCK 108000 /* kHz */
H A D1600x1200.S26 #define CLOCK 162000 /* kHz */
H A D1680x1050.S26 #define CLOCK 146250 /* kHz */
H A D1920x1080.S26 #define CLOCK 148500 /* kHz */
H A Dedid.S179 /* Pixel clock in 10 kHz units. (0.-655.35 MHz, little-endian) */
256 (1-255 kHz) */
258 (1-255 kHz) */
/linux-4.4.14/arch/mips/jz4740/
H A Dreset.c94 * Range is 0 to 2 sec if RTC is clocked at 32 kHz. jz4740_power_off()
106 * Range is 0 to 125 ms if RTC is clocked at 32 kHz. jz4740_power_off()
/linux-4.4.14/drivers/isdn/hardware/eicon/
H A Ddsp_defs.h208 <word> reconfigure delay (in 8kHz samples)
247 <word> time of sync (sampled from counter at 8kHz)
252 <word> time of DCD off (sampled from counter at 8kHz)
257 <word> time of DCD on (sampled from counter at 8kHz)
265 <word> time of CTS off (sampled from counter at 8kHz)
270 <word> time of CTS on (sampled from counter at 8kHz)
/linux-4.4.14/sound/pci/ca0106/
H A Dca0106.h218 * Playback rate [23:16] (2 bits per channel) (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
247 #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
248 #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
249 #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
422 /* Estimated sample rate [19:0] Relative to 48kHz. 0x8000 = 1.0
431 * Sample output rate [1:0] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
432 * Sample input rate [3:2] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
434 * Record rate [9:8] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
436 * I2S input rate master mode [15:14] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
437 * I2S output rate [17:16] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
443 * SPDIF output rate [25:24] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
/linux-4.4.14/drivers/media/radio/si470x/
H A Dradio-si470x-common.c123 /* Spacing (kHz) */
124 /* 0: 200 kHz (USA, Australia) */
125 /* 1: 100 kHz (Europe, Japan) */
126 /* 2: 50 kHz */
129 MODULE_PARM_DESC(space, "Spacing: 0=200kHz 1=100kHz *2=50kHz*");
247 /* Spacing (kHz) */ si470x_get_step()
249 /* 0: 200 kHz (USA, Australia) */ si470x_get_step()
252 /* 1: 100 kHz (Europe, Japan) */ si470x_get_step()
255 /* 2: 50 kHz */ si470x_get_step()
273 /* Frequency (MHz) = Spacing (kHz) x Channel + Bottom of Band (MHz) */ si470x_get_freq()
289 /* Chan = [ Freq (Mhz) - Bottom of Band (MHz) ] / Spacing (kHz) */ si470x_set_freq()
H A Dradio-si470x.h204 * 62.5 kHz otherwise.
205 * The tuner is able to have a channel spacing of 50, 100 or 200 kHz.
/linux-4.4.14/sound/firewire/fireworks/
H A Dfireworks_pcm.c15 * 0: 32.0- 48.0 kHz then snd_efw_hwinfo.amdtp_XX_pcm_channels applied
16 * 1: 88.2- 96.0 kHz then snd_efw_hwinfo.amdtp_XX_pcm_channels_2x applied
17 * 2: 176.4-192.0 kHz then snd_efw_hwinfo.amdtp_XX_pcm_channels_4x applied
26 * - ADAT optical at 32.0-48.0 kHz : use input 1-8
27 * - ADAT optical at 88.2-96.0 kHz : use input 1-4 (S/MUX format)
/linux-4.4.14/arch/arm/mach-pxa/
H A Dgumstix.c135 /* Normally, the bootloader would have enabled this 32kHz clock but many
143 pr_warn("32kHz clock was not on. Bootloader may need to be updated\n"); gumstix_setup_bt_clock()
154 pr_err("Failed to start 32kHz clock\n"); gumstix_setup_bt_clock()
/linux-4.4.14/include/uapi/linux/dvb/
H A Ddmx.h139 unsigned int base; /* output: divisor for stc to get 90 kHz clock */
140 __u64 stc; /* output: stc in 'base'*90 kHz units */
H A Daudio.h86 /* 5- 4 Sample frequency fs (0=48kHz, 1=96kHz) */
/linux-4.4.14/arch/arm/plat-omap/
H A Di2c.c48 * Format: i2c_bus=bus_id,clkrate (in kHz)
90 * @clkrate: clock rate of the bus in kHz
/linux-4.4.14/sound/soc/fsl/
H A Dfsl_asrc.c35 /* 32kHz 44.1kHz 48kHz 64kHz 88.2kHz 96kHz 176kHz 192kHz */
37 {{0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 8kHz */
39 {{0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0}, {0, 0}, {0, 0},}, /* 16kHz */
41 {{0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0}, {0, 0},}, /* 32kHz */
42 {{0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, /* 44.1kHz */
43 {{0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0}, {0, 0},}, /* 48kHz */
44 {{1, 2}, {0, 2}, {0, 2}, {0, 1}, {0, 1}, {0, 1}, {0, 1}, {0, 0},}, /* 64kHz */
45 {{1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, /* 88.2kHz */
46 {{1, 2}, {1, 2}, {1, 2}, {1, 1}, {1, 1}, {1, 1}, {1, 1}, {1, 1},}, /* 96kHz */
47 {{2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, /* 176kHz */
48 {{2, 2}, {2, 2}, {2, 2}, {2, 1}, {2, 1}, {2, 1}, {2, 1}, {2, 1},}, /* 192kHz */
/linux-4.4.14/drivers/i2c/busses/
H A Di2c-designware-platdrv.c180 /* Only standard mode at 100kHz and fast mode at 400kHz dw_i2c_plat_probe()
184 dev_err(&pdev->dev, "Only 100kHz and 400kHz supported"); dw_i2c_plat_probe()
H A Di2c-isch.c57 static int backbone_speed = 33000; /* backbone speed in kHz */
59 MODULE_PARM_DESC(backbone_speed, "Backbone speed in kHz, (default = 33000)");
163 * 100 kHz. If we actually run at 25 MHz the bus will be sch_access()
164 * run ~75 kHz instead which should do no harm. sch_access()
H A Di2c-pca-isa.c39 /* Data sheet recommends 59kHz for 100kHz operation due to variation
H A Di2c-tiny-usb.c35 /* i2c bit delay, default is 10us -> 100kHz max
37 code this results in a i2c clock of about 50kHz) */
41 "(default is 10us for 100kHz max)");
H A Di2c-ismt.c143 #define ISMT_SPGT_SPD_80K 0x00 /* 80 kHz */
144 #define ISMT_SPGT_SPD_100K (0x1 << 30) /* 100 kHz */
145 #define ISMT_SPGT_SPD_400K (0x2 << 30) /* 400 kHz */
192 MODULE_PARM_DESC(bus_speed, "Bus Speed in kHz (0 = BIOS default)");
711 dev_dbg(dev, "Setting SMBus clock to 80 kHz\n"); ismt_hw_init()
717 dev_dbg(dev, "Setting SMBus clock to 100 kHz\n"); ismt_hw_init()
723 dev_dbg(dev, "Setting SMBus clock to 400 kHz\n"); ismt_hw_init()
729 dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n"); ismt_hw_init()
755 dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed); ismt_hw_init()
H A Di2c-sis630.c27 | Clock | 14kHz/56kHz | 55.56kHz/27.78kHz |
H A Di2c-gpio.c201 bit_data->udelay = 50; /* 10 kHz */ i2c_gpio_probe()
203 bit_data->udelay = 5; /* 100 kHz */ i2c_gpio_probe()
H A Di2c-kempld.c50 #define KEMPLD_I2C_FREQ_STD 100 /* 100 kHz */
76 MODULE_PARM_DESC(bus_frequency, "Set I2C bus frequency in kHz (default="
H A Di2c-mxs.c712 "Speed too high (%u.%03u kHz), using %u.%03u kHz\n", mxs_i2c_derive_timing()
722 "Speed too low (%u.%03u kHz), using %u.%03u kHz\n", mxs_i2c_derive_timing()
778 dev_warn(dev, "No I2C speed selected, using 100kHz\n"); mxs_i2c_get_ofdata()
H A Di2c-diolan-u2c.c65 #define U2C_I2C_SPEED_FAST 0 /* 400 kHz */
66 #define U2C_I2C_SPEED_STD 1 /* 100 kHz */
67 #define U2C_I2C_SPEED_2KHZ 242 /* 2 kHz, minimum speed */
/linux-4.4.14/drivers/media/platform/vivid/
H A Dvivid-radio-common.h23 /* The supported radio frequency ranges in kHz */
H A Dvivid-radio-common.c125 * For SW and FM there is a channel every 1000 kHz, for AM there is one vivid_radio_calc_sig_qual()
126 * every 100 kHz. vivid_radio_calc_sig_qual()
/linux-4.4.14/drivers/clk/hisilicon/
H A Dclk-hi6220-stub.c130 /* convert from kHz to Hz */ hi6220_stub_clk_recalc_rate()
147 unsigned long new_rate = rate / 1000; /* kHz */ hi6220_stub_clk_set_rate()
172 unsigned long new_rate = rate / 1000; /* kHz */ hi6220_stub_clk_round_rate()
178 /* convert from kHz to Hz */ hi6220_stub_clk_round_rate()
/linux-4.4.14/sound/pci/ice1712/
H A Denvy24ht.h65 #define VT1724_CFG_CLOCK512 0x00 /* 22.5692Mhz, 44.1kHz*512 */
66 #define VT1724_CFG_CLOCK384 0x40 /* 16.9344Mhz, 44.1kHz*384 */
78 #define VT1724_CFG_I2S_96KHZ 0x40 /* supports 96kHz sampling */
80 #define VT1724_CFG_I2S_192KHZ 0x08 /* supports 192kHz sampling */
H A Dpsc724.c48 * VT1722 (Envy24GT) - 6 outputs, 4 inputs (only 2 used), 24-bit/96kHz
436 /* PSC724 has buggy EEPROM (no 96&192kHz, all FFh GPIOs), so override it here */
440 [ICE_EEP2_I2S] = 0xf0, /* I2S volume, 96kHz, 24bit */
H A Ddelta.h63 /* (>48kHz must be 1) */
H A Dmaya44.c562 0x0c, 0x042, /* R12: ADC+DAC slave, ADC+DAC 44,1kHz */ wm8776_init()
639 * ADC rate to 256X (96kHz). For 256X mode (96kHz), this sets ADC set_rate()
668 /* playback rates: 32..192 kHz */
/linux-4.4.14/arch/avr32/boards/hammerhead/
H A Dsetup.c39 [0] = 32768, /* 32.768 kHz on RTC osc */
177 .udelay = 2, /* close to 100 kHz */
/linux-4.4.14/arch/avr32/boards/mimc200/
H A Dsetup.c38 [0] = 32768, /* 32.768 kHz on RTC osc */
189 .udelay = 2, /* close to 100 kHz */
/linux-4.4.14/include/linux/mfd/
H A Dsi476x-reports.h71 * @hassi: Low/High side Adjacent(100 kHz) Channel Strength Indicator
75 * @assi: Adjacent Channel(+/- 200kHz) Strength Indicator
H A Dasic3.h208 #define CLOCK_CDEX_EX0 (1 << 13) /* R/W: 32.768 kHz crystal */
214 /* R/W: INT clock source control (32.768 kHz) */
/linux-4.4.14/drivers/gpu/drm/msm/edp/
H A Dedp.h81 /* @pixel_rate is in kHz */
/linux-4.4.14/arch/m68k/atari/
H A Datasound.c73 frequency 125 kHz). */ atari_mksound()
/linux-4.4.14/arch/avr32/boards/atstk1000/
H A Datstk1004.c35 [0] = 32768, /* 32.768 kHz on RTC osc */
H A Datstk1003.c33 [0] = 32768, /* 32.768 kHz on RTC osc */
/linux-4.4.14/drivers/watchdog/
H A Dstmp3xxx_rtc_wdt.c18 #define WDOG_TICK_RATE 1000 /* 1 kHz clock */
/linux-4.4.14/sound/firewire/dice/
H A Ddice-stream.c120 * At 176.4/192.0 kHz, Dice has a quirk to transfer two PCM frames in start_stream()
122 * a half of PCM sampling frequency, i.e. PCM frames at 192.0 kHz are start_stream()
123 * transferred on AMDTP packets at 96 kHz. Two successive samples of a start_stream()
/linux-4.4.14/sound/pci/ac97/
H A Dac97_proc.c112 static const char *spdif_rates[4] = { " Rate=44.1kHz", " Rate=res", " Rate=48kHz", " Rate=32kHz" }; snd_ac97_proc_read_main()
113 static const char *spdif_rates_cs4205[4] = { " Rate=48kHz", " Rate=44.1kHz", " Rate=res", " Rate=res" }; snd_ac97_proc_read_main()
/linux-4.4.14/drivers/video/fbdev/
H A Dacornfb.c629 }, { /* 640x250 @ 50Hz, 15.6 kHz hsync */
633 }, { /* 640x256 @ 50Hz, 15.6 kHz hsync */
637 }, { /* 640x512 @ 50Hz, 26.8 kHz hsync */
641 }, { /* 640x250 @ 70Hz, 31.5 kHz hsync */
645 }, { /* 640x256 @ 70Hz, 31.5 kHz hsync */
649 }, { /* 640x352 @ 70Hz, 31.5 kHz hsync */
653 }, { /* 640x480 @ 60Hz, 31.5 kHz hsync */
657 }, { /* 800x600 @ 56Hz, 35.2 kHz hsync */
661 }, { /* 896x352 @ 60Hz, 21.8 kHz hsync */
665 }, { /* 1024x 768 @ 60Hz, 48.4 kHz hsync */
669 }, { /* 1280x1024 @ 60Hz, 63.8 kHz hsync */
H A Damifb.c821 /* 640x200, 15 kHz, 60 Hz (NTSC) */
825 /* 640x400, 15 kHz, 60 Hz interlaced (NTSC) */
829 /* 640x256, 15 kHz, 50 Hz (PAL) */
833 /* 640x512, 15 kHz, 50 Hz interlaced (PAL) */
837 /* 640x480, 29 kHz, 57 Hz */
841 /* 640x960, 29 kHz, 57 Hz interlaced */
846 /* 640x200, 15 kHz, 72 Hz */
850 /* 640x400, 15 kHz, 72 Hz interlaced */
855 /* 640x400, 29 kHz, 68 Hz */
859 /* 640x800, 29 kHz, 68 Hz interlaced */
864 /* 800x300, 23 kHz, 70 Hz */
868 /* 800x600, 23 kHz, 70 Hz interlaced */
873 /* 640x200, 27 kHz, 57 Hz doublescan */
877 /* 640x400, 27 kHz, 57 Hz */
881 /* 640x800, 27 kHz, 57 Hz interlaced */
886 /* 640x256, 27 kHz, 47 Hz doublescan */
890 /* 640x512, 27 kHz, 47 Hz */
894 /* 640x1024, 27 kHz, 47 Hz interlaced */
905 /* 640x480, 31 kHz, 60 Hz (VGA) */
909 /* 640x400, 31 kHz, 70 Hz (VGA) */
2316 * <H*> horizontal freq. in kHz amifb_setup_mcap()
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Drv770d.h891 * bit0 = 32 kHz
892 * bit1 = 44.1 kHz
893 * bit2 = 48 kHz
894 * bit3 = 88.2 kHz
895 * bit4 = 96 kHz
896 * bit5 = 176.4 kHz
897 * bit6 = 192 kHz
/linux-4.4.14/sound/pci/korg1212/
H A Dkorg1212.c263 K1212_CLKIDX_AdatAt44_1K = 0, // selects source as ADAT at 44.1 kHz
264 K1212_CLKIDX_AdatAt48K, // selects source as ADAT at 48 kHz
265 K1212_CLKIDX_WordAt44_1K, // selects source as S/PDIF at 44.1 kHz
266 K1212_CLKIDX_WordAt48K, // selects source as S/PDIF at 48 kHz
267 K1212_CLKIDX_LocalAt44_1K, // selects source as local clock at 44.1 kHz
268 K1212_CLKIDX_LocalAt48K, // selects source as local clock at 48 kHz
449 "ADAT at 44.1 kHz",
450 "ADAT at 48 kHz",
451 "S/PDIF at 44.1 kHz",
452 "S/PDIF at 48 kHz",
453 "local clock at 44.1 kHz",
454 "local clock at 48 kHz"
473 0x8000, // selects source as ADAT at 44.1 kHz
474 0x0000, // selects source as ADAT at 48 kHz
475 0x8001, // selects source as S/PDIF at 44.1 kHz
476 0x0001, // selects source as S/PDIF at 48 kHz
477 0x8002, // selects source as local clock at 44.1 kHz
478 0x0002 // selects source as local clock at 48 kHz
/linux-4.4.14/sound/pci/echoaudio/
H A Dechoaudio.h128 Note that with Gina24, Layla24, and Mona, sample rates above 50 kHz are
137 Some of the cards support 88.2 kHz and 96 kHz sampling (Darla24, Gina24,
140 sampling rate is above 50 kHz.
144 50 kHz) and double speed (above 50 kHz). The hardware detects if a single
H A Dechoaudio_dsp.h141 8, 11.025, 16, 22.05, 32, 44.1, 48, 88.2, and 96 kHz, you just set the
146 Layla24 can generate any sample rate between 25 and 50 kHz inclusive, or
147 50 to 100 kHz inclusive for double speed mode.
154 -Set double-speed mode if you want to use sample rates above 50 kHz
/linux-4.4.14/drivers/staging/comedi/drivers/
H A Damplc_dio200.c94 * 3. Internal 100 kHz clock.
95 * 4. Internal 10 kHz clock.
96 * 5. Internal 1 kHz clock.
H A Dmpc624.c40 * 0 3.52kHz 23uV 17
41 * 1 1.76kHz 3.5uV 20
H A Damplc_dio200_pci.c96 * 3. Internal 100 kHz clock.
97 * 4. Internal 10 kHz clock.
98 * 5. Internal 1 kHz clock.
/linux-4.4.14/drivers/media/pci/ivtv/
H A Divtv-gpio.c87 * 0 0 32 kHz
88 * 0 1 44.1 kHz
89 * 1 0 48 kHz
/linux-4.4.14/drivers/staging/rtl8723au/include/
H A Dwlan_bssdef.h82 u32 DSConfig; /* Frequency, units are kHz */
/linux-4.4.14/drivers/input/joystick/
H A Djoydump.c60 printk(KERN_INFO "joydump: | Speed: %28d kHz |\n", gameport->speed); joydump_connect()
/linux-4.4.14/drivers/clk/shmobile/
H A Dclk-emev2.c62 /* setup STI timer to run on 32.768 kHz and deassert reset */ emev2_smu_init()
/linux-4.4.14/net/core/
H A Dsecure_seq.c30 * suggests using a 250 kHz clock. seq_scale()
/linux-4.4.14/arch/mips/jazz/
H A Dirq.c150 * The R4030 timer receives an input clock of 1kHz which is divieded by plat_time_init()
/linux-4.4.14/arch/arm/mach-davinci/
H A Dboard-sffsdr.c114 .bus_freq = 20 /* kHz */,
H A Daemif.c61 * @clk: The input clock rate in kHz.
113 clkrate /= 1000; /* turn clock into kHz for ease of use */ davinci_aemif_setup_timing()
H A Dboard-dm355-leopard.c108 .bus_freq = 400 /* kHz */,
/linux-4.4.14/arch/arm/mach-imx/
H A Dsystem.c61 * least two writes happen in the same one 32kHz clock period. We save mxc_restart()
/linux-4.4.14/sound/soc/cirrus/
H A Dedb93xx.c43 * rates below 50kHz and 128 for higher sample rates edb93xx_hw_params()
/linux-4.4.14/include/linux/iio/gyro/
H A Ditg3200.h32 * (kHz) of DLPF */
/linux-4.4.14/sound/pci/emu10k1/
H A Demupcm.c1299 * 96kHz uses 2x channels over 48kHz snd_emu10k1_capture_efx_open()
1300 * 192kHz uses 4x channels over 48kHz snd_emu10k1_capture_efx_open()
1301 * So, for 48kHz 24bit, one has 16 channels snd_emu10k1_capture_efx_open()
1302 * for 96kHz 24bit, one has 8 channels snd_emu10k1_capture_efx_open()
1303 * for 192kHz 24bit, one has 4 channels snd_emu10k1_capture_efx_open()
1309 /* For 44.1kHz */ snd_emu10k1_capture_efx_open()
1316 /* For 48kHz */ snd_emu10k1_capture_efx_open()
1325 /* For 96kHz */ snd_emu10k1_capture_efx_open()
1331 /* For 192kHz */ snd_emu10k1_capture_efx_open()
H A Demu10k1_main.c825 * * two crystals - for 44.1kHz and 48kHz multiples
831 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
981 /* Default WCLK set to 48kHz. */ snd_emu10k1_emu1010_init()
983 /* Word Clock source, Internal 48kHz x1 */ snd_emu10k1_emu1010_init()
990 /* For 96kHz */ snd_emu10k1_emu1010_init()
1001 /* For 192kHz */ snd_emu10k1_emu1010_init()
1020 /* For 48kHz */ snd_emu10k1_emu1010_init()
1269 /* TEMP: Select 48kHz SPDIF out */ snd_emu10k1_emu1010_init()
1271 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */ snd_emu10k1_emu1010_init()
1272 /* Word Clock source, Internal 48kHz x1 */ snd_emu10k1_emu1010_init()
2013 * Sample Rate = 2 (48kHz) snd_emu10k1_create()
/linux-4.4.14/drivers/scsi/aic7xxx/
H A Daic79xx_proc.c68 * Return the frequency in kHz corresponding to the given
80 /* Period in kHz */ ahd_calc_syncsrate()
H A Daic7xxx_proc.c69 * Return the frequency in kHz corresponding to the given
81 /* Period in kHz */ ahc_calc_syncsrate()
/linux-4.4.14/drivers/media/pci/cx18/
H A Dcx18-i2c.c277 /* Hw I2C1 Clock Freq ~100kHz */ init_cx18_i2c()
282 /* Hw I2C2 Clock Freq ~100kHz */ init_cx18_i2c()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dpllnv04.c37 * "clk" parameter in kHz getMNP_single()
136 * "clk" parameter in kHz getMNP_double()
H A Dgt215.c285 u32 kHz = cstate->domain[nv_clk_src_host]; calc_host() local
288 if (kHz == 277000) { calc_host()
296 ret = gt215_clk_info(&clk->base, 0x1d, kHz, info); calc_host()
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
H A Ddm.h227 #define CFO_THRESHOLD_XTAL 10 /* kHz */
228 #define CFO_THRESHOLD_ATC 80 /* kHz */
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
H A Ddm.h218 #define CFO_THRESHOLD_XTAL 10 /* kHz */
219 #define CFO_THRESHOLD_ATC 80 /* kHz */
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Ddm.h225 #define CFO_THRESHOLD_XTAL 10 /* kHz */
226 #define CFO_THRESHOLD_ATC 80 /* kHz */
/linux-4.4.14/include/drm/
H A Ddrm_modes.h110 int clock; /* in kHz */
148 int hsync; /* in kHz */
/linux-4.4.14/arch/avr32/boards/atngw100/
H A Dsetup.c35 [0] = 32768, /* 32.768 kHz on RTC osc */
231 .udelay = 2, /* close to 100 kHz */
/linux-4.4.14/arch/arm/mach-pxa/include/mach/
H A Dpxa2xx-regs.h187 #define OSCC_OON (1 << 1) /* 32.768kHz OON (write-once only bit) */
188 #define OSCC_OOK (1 << 0) /* 32.768kHz OOK (read-only bit) */
H A Dhardware.h302 * return current memory and LCD clock frequency in units of 10kHz
/linux-4.4.14/arch/arm/mach-rockchip/
H A Dpm.c151 * switch its main clock supply to the alternative 32kHz rk3288_slp_mode_set()
152 * source. Therefore set 30ms on a 32kHz clock for pmic rk3288_slp_mode_set()
/linux-4.4.14/sound/hda/
H A Dhdac_i915.c101 * snd_hdac_get_display_clk - Get CDCLK in kHz
107 * This function queries CDCLK value in kHz from the graphics driver and
/linux-4.4.14/sound/pci/
H A Dcs5530.c9 * mode. If we're recording in 8bit 8000kHz, say, and we then attempt to
10 * simultaneously play back audio at 16bit 44100kHz, the device actually plays
/linux-4.4.14/sound/pci/hda/
H A Dhda_beep.c71 * that is from 12kHz to 93.75Hz in steps of 46.875 Hz
95 * from 47Hz to 12kHz
/linux-4.4.14/sound/soc/pxa/
H A Dzylonite.c94 * based master clock - in particular, this excludes 44.1kHz. zylonite_voice_hw_params()
96 * data so multiples of 8kHz will be the common case. zylonite_voice_hw_params()
/linux-4.4.14/drivers/ssb/
H A Ddriver_chipcommon_pmu.c51 u16 freq; /* Crystal frequency in kHz.*/
89 /* Tune the PLL to the crystal speed. crystalfreq is in kHz. */ ssb_pmu0_pllinit_r0()
178 u16 freq; /* Crystal frequency in kHz.*/
220 /* Tune the PLL to the crystal speed. crystalfreq is in kHz. */ ssb_pmu1_pllinit_r0()
320 u32 crystalfreq = 0; /* in kHz. 0 = keep default freq. */ ssb_pmu_pll_init()
/linux-4.4.14/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj.h559 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain
574 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain
590 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain
606 * \brief Offset from picture carrier to centre frequency in kHz, in RF domain
621 * \brief Offset from sound carrier to centre frequency in kHz, in RF domain
/linux-4.4.14/sound/soc/sh/rcar/
H A Dsrc.c51 * 96kHz <-> +-----+ 48kHz +-----+ 48kHz +-------+
52 * 48kHz <-> | SRC | <------> | SSI | <-----> | codec |
53 * 44.1kHz <-> +-----+ +-----+ +-------+
/linux-4.4.14/drivers/video/
H A Dhdmi.c821 return "32 kHz"; hdmi_audio_sample_frequency_get_name()
823 return "44.1 kHz (CD)"; hdmi_audio_sample_frequency_get_name()
825 return "48 kHz"; hdmi_audio_sample_frequency_get_name()
827 return "88.2 kHz"; hdmi_audio_sample_frequency_get_name()
829 return "96 kHz"; hdmi_audio_sample_frequency_get_name()
831 return "176.4 kHz"; hdmi_audio_sample_frequency_get_name()
833 return "192 kHz"; hdmi_audio_sample_frequency_get_name()
/linux-4.4.14/sound/pci/rme9652/
H A Dhdspm.c309 #define HDSPM_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz 1=48kHz/96kHz */
310 #define HDSPM_Frequency1 (1<<7) /* 0=32kHz/64kHz */
594 0001 32kHz
595 0010 44.1kHz
596 0011 48kHz
597 0100 64kHz
598 0101 88.2kHz
599 0110 96kHz
600 0111 128kHz
601 1000 176.4kHz
602 1001 192kHz
686 "32 kHz",
687 "44.1 kHz",
688 "48 kHz",
689 "64 kHz",
690 "88.2 kHz",
691 "96 kHz",
692 "128 kHz",
693 "176.4 kHz",
694 "192 kHz"
4215 static const char *const texts[] = { "44.1 kHz", "48 kHz" }; snd_hdspm_info_tco_sample_rate()
5581 * otherwise it doesn't work at 96kHz */ snd_hdspm_hw_params()
6320 /* TODO: Mac driver sets it when f_s>48kHz */ snd_hdspm_hwdep_ioctl()
H A Dhdsp.c173 #define HDSP_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
174 #define HDSP_Frequency1 (1<<7) /* 0=32kHz/64kHz/128kHz */
1023 * sample rate greater than 96kHz. The card reports the corresponding hdsp_external_sample_rate()
2037 "AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", snd_hdsp_info_clock_source()
2038 "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", snd_hdsp_info_clock_source()
2039 "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", snd_hdsp_info_clock_source()
3414 clock_source = "Internal 32 kHz"; snd_hdsp_proc_read()
3417 clock_source = "Internal 44.1 kHz"; snd_hdsp_proc_read()
3420 clock_source = "Internal 48 kHz"; snd_hdsp_proc_read()
3423 clock_source = "Internal 64 kHz"; snd_hdsp_proc_read()
3426 clock_source = "Internal 88.2 kHz"; snd_hdsp_proc_read()
3429 clock_source = "Internal 96 kHz"; snd_hdsp_proc_read()
3432 clock_source = "Internal 128 kHz"; snd_hdsp_proc_read()
3435 clock_source = "Internal 176.4 kHz"; snd_hdsp_proc_read()
3438 clock_source = "Internal 192 kHz"; snd_hdsp_proc_read()
/linux-4.4.14/sound/pci/ctxfi/
H A Dcthw20k2.c1176 * RTA [4:5] - 96kHz hw_daio_init()
1178 * RTB [12:13] - 96kHz hw_daio_init()
1180 * RTC [20:21] - 96kHz hw_daio_init()
1182 * RTD [28:29] - 96kHz */ hw_daio_init()
1219 0x02109204); /* Default to 48kHz */ hw_daio_init()
1642 data |= 0x0000; /* Single Speed Mode 0-50kHz */ hw_dac_init()
1644 data |= 0x0200; /* Double Speed Mode 50-100kHz */ hw_dac_init()
1646 data |= 0x0600; /* Quad Speed Mode 100-200kHz */ hw_dac_init()
1865 data |= 0x00; /* Single Speed Mode 32-50kHz */ hw_adc_init()
1867 data |= 0x08; /* Double Speed Mode 50-108kHz */ hw_adc_init()
1869 data |= 0x04; /* Quad Speed Mode 108kHz-216kHz */ hw_adc_init()
/linux-4.4.14/sound/usb/
H A Dformat.c190 /* C-Media CM6501 mislabels its 96 kHz altsetting */ parse_audio_format_rates_v1()
198 /* Creative VF0420/VF0470 Live Cams report 16 kHz instead of 8kHz */ parse_audio_format_rates_v1()
/linux-4.4.14/tools/power/cpupower/utils/
H A Dcpufreq-info.c77 printf("CPU%3d %9lu kHz (%3d %%) - %9lu kHz (%3d %%) - %s\n", proc_cpufreq_output()
100 printf("%lu kHz", speed); print_speed()
/linux-4.4.14/drivers/staging/rtl8712/
H A Dwlan_bssdef.h63 u32 DSConfig; /* Frequency, units are kHz */
/linux-4.4.14/drivers/hwmon/
H A Dg760a.c44 u32 clk; /* default 32kHz */
/linux-4.4.14/drivers/media/pci/bt8xx/
H A Ddst_common.h115 u32 frequency; /* intermediate frequency in kHz for QPSK */
/linux-4.4.14/drivers/input/serio/
H A Dapbps2.c172 /* Set reload register to core freq in kHz/10 */ apbps2_of_probe()
/linux-4.4.14/drivers/clocksource/
H A Dcs5535-clockevt.c29 * We are using the 32.768kHz input clock - it's the only one that has the
/linux-4.4.14/arch/mips/alchemy/
H A Dboard-gpr.c226 .udelay = 2, /* ~100 kHz */
/linux-4.4.14/arch/avr32/boards/merisc/
H A Dsetup.c47 [0] = 32768, /* 32.768 kHz on RTC osc */
/linux-4.4.14/arch/arm/mach-omap2/
H A Dsleep24xx.S57 * To work around this the code will switch to the 32kHz source prior to sleep.
/linux-4.4.14/sound/oss/
H A Dsb.h52 /* to 48kHz */

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