Searched refs:clk_name (Results 1 - 94 of 94) sorted by relevance

/linux-4.4.14/arch/m68k/include/asm/
H A Dmcfclk.h32 #define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \
34 .name = clk_name, \
43 #define DEFINE_CLK(clk_ref, clk_name, clk_rate) \
45 .name = clk_name, \
/linux-4.4.14/drivers/clk/h8300/
H A Dclk-div.c18 const char *clk_name = node->name; h8300_div_clk_setup() local
26 pr_err("%s: no parent found", clk_name); h8300_div_clk_setup()
32 pr_err("%s: failed to map divide register", clk_name); h8300_div_clk_setup()
41 clk = clk_register_divider(NULL, clk_name, parent_name, h8300_div_clk_setup()
49 __func__, clk_name, PTR_ERR(clk)); h8300_div_clk_setup()
H A Dclk-h8s2678.c88 const char *clk_name = node->name; h8s2678_pll_clk_setup() local
95 pr_err("%s: no parent found", clk_name); h8s2678_pll_clk_setup()
106 pr_err("%s: failed to map divide register", clk_name); h8s2678_pll_clk_setup()
112 pr_err("%s: failed to map multiply register", clk_name); h8s2678_pll_clk_setup()
117 init.name = clk_name; h8s2678_pll_clk_setup()
127 __func__, clk_name, PTR_ERR(clk)); h8s2678_pll_clk_setup()
/linux-4.4.14/drivers/clk/sunxi/
H A Dclk-a10-codec.c26 const char *clk_name = node->name, *parent_name; sun4i_codec_clk_setup() local
33 of_property_read_string(node, "clock-output-names", &clk_name); sun4i_codec_clk_setup()
36 clk = clk_register_gate(NULL, clk_name, parent_name, sun4i_codec_clk_setup()
H A Dclk-a10-hosc.c31 const char *clk_name = node->name; sun4i_osc_clk_setup() local
45 of_property_read_string(node, "clock-output-names", &clk_name); sun4i_osc_clk_setup()
53 clk = clk_register_composite(NULL, clk_name, sun4i_osc_clk_setup()
64 clk_register_clkdev(clk, clk_name, NULL); sun4i_osc_clk_setup()
H A Dclk-a10-pll2.c49 const char *clk_name = node->name, *parent; sun4i_pll2_setup() local
129 SUN4I_A10_PLL2_1X, &clk_name); sun4i_pll2_setup()
130 clks[SUN4I_A10_PLL2_1X] = clk_register_fixed_factor(NULL, clk_name, sun4i_pll2_setup()
144 SUN4I_A10_PLL2_2X, &clk_name); sun4i_pll2_setup()
145 clks[SUN4I_A10_PLL2_2X] = clk_register_fixed_factor(NULL, clk_name, sun4i_pll2_setup()
153 SUN4I_A10_PLL2_4X, &clk_name); sun4i_pll2_setup()
154 clks[SUN4I_A10_PLL2_4X] = clk_register_fixed_factor(NULL, clk_name, sun4i_pll2_setup()
162 SUN4I_A10_PLL2_8X, &clk_name); sun4i_pll2_setup()
163 clks[SUN4I_A10_PLL2_8X] = clk_register_fixed_factor(NULL, clk_name, sun4i_pll2_setup()
H A Dclk-sun6i-apb0-gates.c46 const char *clk_name; sun6i_a31_apb0_gates_clk_probe() local
84 j, &clk_name); sun6i_a31_apb0_gates_clk_probe()
86 clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name, sun6i_a31_apb0_gates_clk_probe()
90 clk_register_clkdev(clk_data->clks[i], clk_name, NULL); sun6i_a31_apb0_gates_clk_probe()
H A Dclk-a10-mod1.c35 const char *clk_name = node->name; sun4i_mod1_clk_setup() local
51 of_property_read_string(node, "clock-output-names", &clk_name); sun4i_mod1_clk_setup()
62 clk = clk_register_composite(NULL, clk_name, parents, i, sun4i_mod1_clk_setup()
H A Dclk-sun6i-apb0.c34 const char *clk_name = np->name; sun6i_a31_apb0_clk_probe() local
49 of_property_read_string(np, "clock-output-names", &clk_name); sun6i_a31_apb0_clk_probe()
51 clk = clk_register_divider_table(&pdev->dev, clk_name, clk_parent, sun6i_a31_apb0_clk_probe()
H A Dclk-sun8i-apb0.c25 const char *clk_name = np->name; sun8i_a23_apb0_clk_probe() local
40 of_property_read_string(np, "clock-output-names", &clk_name); sun8i_a23_apb0_clk_probe()
43 clk = clk_register_divider(&pdev->dev, clk_name, clk_parent, 0, reg, sun8i_a23_apb0_clk_probe()
H A Dclk-a20-gmac.c66 const char *clk_name = node->name; sun7i_a20_gmac_clk_setup() local
70 if (of_property_read_string(node, "clock-output-names", &clk_name)) sun7i_a20_gmac_clk_setup()
99 clk = clk_register_composite(NULL, clk_name, sun7i_a20_gmac_clk_setup()
110 clk_register_clkdev(clk, clk_name, NULL); sun7i_a20_gmac_clk_setup()
H A Dclk-factors.c173 const char *clk_name = node->name; sunxi_factors_register() local
185 clk_name = data->name; sunxi_factors_register()
187 of_property_read_string(node, "clock-output-names", &clk_name); sunxi_factors_register()
231 clk = clk_register_composite(NULL, clk_name, sunxi_factors_register()
239 clk_register_clkdev(clk, clk_name, NULL); sunxi_factors_register()
H A Dclk-simple-gates.c31 const char *clk_parent, *clk_name; sunxi_simple_gates_setup() local
60 i, &clk_name); sunxi_simple_gates_setup()
65 clk_data->clks[index] = clk_register_gate(NULL, clk_name, sunxi_simple_gates_setup()
H A Dclk-sun6i-ar100.c179 const char *clk_name = np->name; sun6i_a31_ar100_clk_probe() local
201 of_property_read_string(np, "clock-output-names", &clk_name); sun6i_a31_ar100_clk_probe()
203 init.name = clk_name; sun6i_a31_ar100_clk_probe()
H A Dclk-sun9i-mmc.c96 const char *clk_name = np->name; sun9i_a80_mmc_config_clk_probe() local
142 i, &clk_name); sun9i_a80_mmc_config_clk_probe()
144 clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name, sun9i_a80_mmc_config_clk_probe()
H A Dclk-sunxi.c197 const char *clk_name = node->name; sun6i_ahb1_clk_setup() local
208 of_property_read_string(node, "clock-output-names", &clk_name); sun6i_ahb1_clk_setup()
227 clk = clk_register_composite(NULL, clk_name, parents, i, sun6i_ahb1_clk_setup()
234 clk_register_clkdev(clk, clk_name, NULL); sun6i_ahb1_clk_setup()
785 const char *clk_name = node->name; sunxi_mux_clk_setup() local
793 of_property_read_string(node, "clock-output-names", &clk_name); sunxi_mux_clk_setup()
795 clk = clk_register_mux(NULL, clk_name, parents, i, sunxi_mux_clk_setup()
802 clk_register_clkdev(clk, clk_name, NULL); sunxi_mux_clk_setup()
867 const char *clk_name = node->name; sunxi_divider_clk_setup() local
875 of_property_read_string(node, "clock-output-names", &clk_name); sunxi_divider_clk_setup()
877 clk = clk_register_divider_table(NULL, clk_name, clk_parent, 0, sunxi_divider_clk_setup()
883 clk_register_clkdev(clk, clk_name, NULL); sunxi_divider_clk_setup()
979 const char *clk_name; sunxi_divs_clk_setup() local
1016 i, &clk_name) != 0) sunxi_divs_clk_setup()
1073 clks[i] = clk_register_composite(NULL, clk_name, &parent, 1, sunxi_divs_clk_setup()
1080 clk_register_clkdev(clks[i], clk_name, NULL); sunxi_divs_clk_setup()
H A Dclk-usb.c103 const char *clk_name; sunxi_usb_clk_setup() local
134 j, &clk_name); sunxi_usb_clk_setup()
135 clk_data->clks[i] = clk_register_gate(NULL, clk_name, sunxi_usb_clk_setup()
/linux-4.4.14/drivers/clk/rockchip/
H A Dclk-rockchip.c31 const char *clk_name; rk2928_gate_clk_init() local
67 i, &clk_name); rk2928_gate_clk_init()
70 if (!strcmp("reserved", clk_name)) rk2928_gate_clk_init()
81 clk_data->clks[i] = clk_register_gate(NULL, clk_name, rk2928_gate_clk_init()
/linux-4.4.14/drivers/clk/
H A Dclk-nspire.c73 const char *clk_name = node->name; nspire_ahbdiv_setup() local
85 of_property_read_string(node, "clock-output-names", &clk_name); nspire_ahbdiv_setup()
88 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, nspire_ahbdiv_setup()
115 const char *clk_name = node->name; nspire_clk_setup() local
126 of_property_read_string(node, "clock-output-names", &clk_name); nspire_clk_setup()
128 clk = clk_register_fixed_rate(NULL, clk_name, NULL, CLK_IS_ROOT, nspire_clk_setup()
H A Dclk-pwm.c62 const char *clk_name; clk_pwm_probe() local
93 clk_name = node->name; clk_pwm_probe()
94 of_property_read_string(node, "clock-output-names", &clk_name); clk_pwm_probe()
96 init.name = clk_name; clk_pwm_probe()
H A Dclk-fixed-factor.c112 const char *clk_name = node->name; of_fixed_factor_clk_setup() local
128 of_property_read_string(node, "clock-output-names", &clk_name); of_fixed_factor_clk_setup()
131 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, of_fixed_factor_clk_setup()
H A Dclk-fixed-rate.c116 const char *clk_name = node->name; of_fixed_clk_setup() local
125 of_property_read_string(node, "clock-output-names", &clk_name); of_fixed_clk_setup()
127 clk = clk_register_fixed_rate_with_accuracy(NULL, clk_name, NULL, of_fixed_clk_setup()
H A Dclk-xgene.c165 const char *clk_name = np->full_name; xgene_pllclk_init() local
174 of_property_read_string(np, "clock-output-names", &clk_name); xgene_pllclk_init()
176 clk_name, of_clk_get_parent_name(np, 0), xgene_pllclk_init()
180 clk_register_clkdev(clk, clk_name, NULL); xgene_pllclk_init()
181 pr_debug("Add %s clock PLL\n", clk_name); xgene_pllclk_init()
443 const char *clk_name = np->full_name; xgene_devclk_init() local
497 of_property_read_string(np, "clock-output-names", &clk_name); xgene_devclk_init()
499 clk = xgene_register_clk(NULL, clk_name, xgene_devclk_init()
503 pr_debug("Add %s clock\n", clk_name); xgene_devclk_init()
H A Dclk-palmas.c34 const char *clk_name; member in struct:palmas_clk32k_desc
138 .clk_name = "clk32kg",
154 .clk_name = "clk32kgaudio",
232 cinfo->clk_desc->clk_name, ret); palmas_clks_init_configure()
268 match_data->desc.clk_name, ret); palmas_clks_probe()
H A Dclk-max-gen.c118 const char *clk_name; max_gen_clk_probe() local
142 i, &clk_name)) max_gen_clk_probe()
143 init->name = clk_name; max_gen_clk_probe()
H A Dclk-nomadik.c512 const char *clk_name = np->name; of_nomadik_pll_setup() local
521 __func__, clk_name); of_nomadik_pll_setup()
525 clk = pll_clk_register(NULL, clk_name, parent_name, pll_id); of_nomadik_pll_setup()
535 const char *clk_name = np->name; of_nomadik_hclk_setup() local
545 clk = clk_register_divider(NULL, clk_name, parent_name, of_nomadik_hclk_setup()
559 const char *clk_name = np->name; of_nomadik_src_clk_setup() local
568 __func__, clk_name); of_nomadik_src_clk_setup()
572 clk = src_clk_register(NULL, clk_name, parent_name, clk_id); of_nomadik_src_clk_setup()
H A Dclk-vt8500.c237 const char *clk_name = node->name; vtwm_device_clk_init() local
277 of_property_read_string(node, "clock-output-names", &clk_name); vtwm_device_clk_init()
296 init.name = clk_name; vtwm_device_clk_init()
310 clk_register_clkdev(clk, clk_name, NULL); vtwm_device_clk_init()
655 const char *clk_name = node->name; vtwm_pll_clk_init() local
675 of_property_read_string(node, "clock-output-names", &clk_name); vtwm_pll_clk_init()
677 init.name = clk_name; vtwm_pll_clk_init()
692 clk_register_clkdev(clk, clk_name, NULL); vtwm_pll_clk_init()
H A Dclk-axi-clkgen.c489 const char *clk_name; axi_clkgen_probe() local
515 clk_name = pdev->dev.of_node->name; axi_clkgen_probe()
517 &clk_name); axi_clkgen_probe()
519 init.name = clk_name; axi_clkgen_probe()
H A Dclk-highbank.c280 const char *clk_name = node->name; hb_clk_init() local
300 of_property_read_string(node, "clock-output-names", &clk_name); hb_clk_init()
302 init.name = clk_name; hb_clk_init()
H A Dclk-u300.c872 const char *clk_name = np->name; of_u300_syscon_clk_init() local
882 __func__, clk_name); of_u300_syscon_clk_init()
887 __func__, clk_name); of_u300_syscon_clk_init()
915 clk_name, parent_name, of_u300_syscon_clk_init()
1146 const char *clk_name = np->name; of_u300_syscon_mclk_init() local
1150 clk = mclk_clk_register(NULL, clk_name, parent_name, false); of_u300_syscon_mclk_init()
H A Dclk.c3058 const char *clk_name; of_clk_get_parent_name() local
3089 &clk_name) < 0) {
3099 clk_name = clkspec.np->name;
3101 clk_name = NULL;
3103 clk_name = __clk_get_name(clk);
3110 return clk_name;
/linux-4.4.14/drivers/clk/mvebu/
H A Dclk-cpu.c38 const char *clk_name; member in struct:cpu_clk
200 char *clk_name = kzalloc(5, GFP_KERNEL); of_cpu_clk_setup() local
203 if (WARN_ON(!clk_name)) of_cpu_clk_setup()
210 sprintf(clk_name, "cpu%d", cpu); of_cpu_clk_setup()
213 cpuclk[cpu].clk_name = clk_name; of_cpu_clk_setup()
220 init.name = cpuclk[cpu].clk_name; of_cpu_clk_setup()
239 kfree(cpuclk[ncpus].clk_name); of_cpu_clk_setup()
H A Dclk-corediv.c244 const char *clk_name; mvebu_corediv_clk_init() local
270 i, &clk_name); mvebu_corediv_clk_init()
273 init.name = clk_name; mvebu_corediv_clk_init()
/linux-4.4.14/arch/arm/mach-exynos/
H A Dpm_domains.c158 char clk_name[8]; exynos4_pm_init_power_domain() local
160 snprintf(clk_name, sizeof(clk_name), "asb%d", i); exynos4_pm_init_power_domain()
161 pd->asb_clk[i] = of_clk_get_by_name(np, clk_name); exynos4_pm_init_power_domain()
171 char clk_name[8]; exynos4_pm_init_power_domain() local
173 snprintf(clk_name, sizeof(clk_name), "clk%d", i); exynos4_pm_init_power_domain()
174 pd->clk[i] = of_clk_get_by_name(np, clk_name); exynos4_pm_init_power_domain()
/linux-4.4.14/drivers/clk/pxa/
H A Dclk-pxa.h18 #define MUX_RO_RATE_RO_OPS(name, clk_name) \
30 return clk_register_composite(NULL, clk_name, \
38 #define RATE_RO_OPS(name, clk_name) \
45 return clk_register_composite(NULL, clk_name, \
/linux-4.4.14/arch/mips/include/asm/mach-loongson32/
H A Dcpufreq.h17 const char *clk_name; /* CPU clk */ member in struct:plat_ls1x_cpufreq
/linux-4.4.14/drivers/staging/clocking-wizard/
H A Dclk-xlnx-clock-wizard.c146 const char *clk_name; clk_wzrd_probe() local
207 clk_name = kasprintf(GFP_KERNEL, "%s_mul", dev_name(&pdev->dev)); clk_wzrd_probe()
208 if (!clk_name) { clk_wzrd_probe()
213 &pdev->dev, clk_name, clk_wzrd_probe()
216 kfree(clk_name); clk_wzrd_probe()
226 clk_name = kasprintf(GFP_KERNEL, "%s_mul_div", dev_name(&pdev->dev)); clk_wzrd_probe()
227 if (!clk_name) { clk_wzrd_probe()
233 &pdev->dev, clk_name, clk_wzrd_probe()
257 clkout_name, clk_name, 0, 1, reg); clk_wzrd_probe()
270 kfree(clk_name); clk_wzrd_probe()
296 kfree(clk_name); clk_wzrd_probe()
/linux-4.4.14/drivers/clk/meson/
H A Dclkc.h102 const char *clk_name; member in struct:clk_conf
120 .clk_name = (_cn), \
129 .clk_name = (_cn), \
139 .clk_name = (_cn), \
150 .clk_name = (_cn), \
161 .clk_name = (_cn), \
172 .clk_name = (_cn), \
H A Dclkc.c108 clk = clk_register_composite(NULL, clk_conf->clk_name, meson_clk_register_composite()
162 clk_conf->clk_name, meson_clk_register_fixed_factor()
192 clk_conf->clk_name, meson_clk_register_fixed_rate()
243 clk_conf->clk_name); meson_clk_register_clks()
H A Dclk-cpu.c204 init.name = clk_conf->clk_name; meson_clk_register_cpu()
224 __func__, clk_conf->clk_name); meson_clk_register_cpu()
H A Dclk-pll.c202 init.name = clk_conf->clk_name; meson_clk_register_pll()
/linux-4.4.14/drivers/clk/socfpga/
H A Dclk-periph.c66 const char *clk_name = node->name; __socfpga_periph_init() local
96 of_property_read_string(node, "clock-output-names", &clk_name); __socfpga_periph_init()
98 init.name = clk_name; __socfpga_periph_init()
H A Dclk-periph-a10.c76 const char *clk_name = node->name; __socfpga_periph_init() local
106 of_property_read_string(node, "clock-output-names", &clk_name); __socfpga_periph_init()
108 init.name = clk_name; __socfpga_periph_init()
126 clk_name); __socfpga_periph_init()
H A Dclk-pll-a10.c83 const char *clk_name = node->name; __socfpga_pll_init() local
101 of_property_read_string(node, "clock-output-names", &clk_name); __socfpga_pll_init()
103 init.name = clk_name; __socfpga_pll_init()
H A Dclk-pll.c89 const char *clk_name = node->name; __socfpga_pll_init() local
106 of_property_read_string(node, "clock-output-names", &clk_name); __socfpga_pll_init()
108 init.name = clk_name; __socfpga_pll_init()
H A Dclk-gate-a10.c114 const char *clk_name = node->name; __socfpga_gate_init() local
165 of_property_read_string(node, "clock-output-names", &clk_name); __socfpga_gate_init()
167 init.name = clk_name; __socfpga_gate_init()
H A Dclk-gate.c188 const char *clk_name = node->name; __socfpga_gate_init() local
230 of_property_read_string(node, "clock-output-names", &clk_name); __socfpga_gate_init()
232 init.name = clk_name; __socfpga_gate_init()
/linux-4.4.14/arch/m68k/coldfire/
H A Dclk.c77 const char *clk_name = dev ? dev_name(dev) : id ? id : NULL; clk_get() local
82 if (!strcmp(clk->name, clk_name)) clk_get()
84 pr_warn("clk_get: didn't find clock %s\n", clk_name); clk_get()
/linux-4.4.14/drivers/clk/ti/
H A Dfixed-factor.c39 const char *clk_name = node->name; of_ti_fixed_factor_clk_setup() local
59 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags, of_ti_fixed_factor_clk_setup()
H A Dapll.c45 const char *clk_name; dra7_apll_enable() local
53 clk_name = clk_hw_get_name(&clk->hw); dra7_apll_enable()
82 clk_name, (state) ? "locked" : "bypassed"); dra7_apll_enable()
86 clk_name, (state) ? "locked" : "bypassed", i); dra7_apll_enable()
H A Dclkt_dpll.c297 const char *clk_name; omap2_dpll_round_rate() local
305 clk_name = clk_hw_get_name(hw); omap2_dpll_round_rate()
307 clk_name, target_rate); omap2_dpll_round_rate()
353 clk_name, m, n, new_rate); omap2_dpll_round_rate()
361 clk_name, target_rate); omap2_dpll_round_rate()
H A Ddpll3xxx.c69 const char *clk_name; _omap3_wait_dpll_status() local
72 clk_name = clk_hw_get_name(&clk->hw); _omap3_wait_dpll_status()
84 clk_name, (state) ? "locked" : "bypassed"); _omap3_wait_dpll_status()
87 clk_name, (state) ? "locked" : "bypassed", i); _omap3_wait_dpll_status()
/linux-4.4.14/drivers/clk/versatile/
H A Dclk-versatile.c62 const char *clk_name = np->name; cm_osc_setup() local
82 clk = icst_clk_register(NULL, desc, clk_name, parent_name, cm_base); cm_osc_setup()
/linux-4.4.14/drivers/clk/keystone/
H A Dpll.c258 const char *clk_name = node->name; of_pll_div_clk_init() local
260 of_property_read_string(node, "clock-output-names", &clk_name); of_pll_div_clk_init()
283 clk = clk_register_divider(NULL, clk_name, parent_name, 0, reg, shift, of_pll_div_clk_init()
288 pr_err("%s: error registering divider %s\n", __func__, clk_name); of_pll_div_clk_init()
302 const char *clk_name = node->name; of_pll_mux_clk_init() local
304 of_property_read_string(node, "clock-output-names", &clk_name); of_pll_mux_clk_init()
327 clk = clk_register_mux(NULL, clk_name, (const char **)&parents, of_pll_mux_clk_init()
333 pr_err("%s: error registering mux %s\n", __func__, clk_name); of_pll_mux_clk_init()
H A Dgate.c203 const char *clk_name = node->name; of_psc_clk_init() local
235 of_property_read_string(node, "clock-output-names", &clk_name); of_psc_clk_init()
242 clk = clk_register_psc(NULL, clk_name, parent_name, data, lock); of_psc_clk_init()
/linux-4.4.14/arch/arm/mach-omap2/
H A Dmcbsp.c58 char clk_name[11]; omap_init_mcbsp() local
100 sprintf(clk_name, "mcbsp%d_ick", id); omap_init_mcbsp()
101 mcbsp_iclks[id] = clk_get(NULL, clk_name); omap_init_mcbsp()
H A Dclock.c97 const char *clk_name; omap2_init_clk_clkdm() local
102 clk_name = __clk_get_name(hw->clk); omap2_init_clk_clkdm()
107 clk_name, clk->clkdm_name); omap2_init_clk_clkdm()
111 clk_name, clk->clkdm_name); omap2_init_clk_clkdm()
H A Dpm.c131 static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, omap2_set_init_voltage() argument
140 if (!vdd_name || !clk_name || !oh_name) { omap2_set_init_voltage()
167 clk = clk_get(NULL, clk_name); omap2_set_init_voltage()
169 pr_err("%s: unable to get clk %s\n", __func__, clk_name); omap2_set_init_voltage()
H A Domap_device.c47 const char *clk_name) _add_clkdev()
52 if (!clk_alias || !clk_name) _add_clkdev()
55 dev_dbg(&od->pdev->dev, "Creating %s -> %s\n", clk_alias, clk_name); _add_clkdev()
65 rc = clk_add_alias(clk_alias, dev_name(&od->pdev->dev), clk_name, NULL); _add_clkdev()
72 "clk_get for %s failed\n", clk_name); _add_clkdev()
46 _add_clkdev(struct omap_device *od, const char *clk_alias, const char *clk_name) _add_clkdev() argument
/linux-4.4.14/drivers/gpu/drm/msm/dsi/pll/
H A Ddsi_pll_28nm.c519 char clk_name[32], parent1[32], parent2[32], vco_name[32]; pll_28nm_register() local
538 snprintf(clk_name, 32, "dsi%danalog_postdiv_clk", pll_28nm->id); pll_28nm_register()
540 clks[num++] = clk_register_divider(dev, clk_name, pll_28nm_register()
546 snprintf(clk_name, 32, "dsi%dindirect_path_div2_clk", pll_28nm->id); pll_28nm_register()
548 clks[num++] = clk_register_fixed_factor(dev, clk_name, pll_28nm_register()
552 snprintf(clk_name, 32, "dsi%dpll", pll_28nm->id); pll_28nm_register()
555 clk_register_divider(dev, clk_name, pll_28nm_register()
560 snprintf(clk_name, 32, "dsi%dbyte_mux", pll_28nm->id); pll_28nm_register()
563 clks[num++] = clk_register_mux(dev, clk_name, pll_28nm_register()
569 snprintf(clk_name, 32, "dsi%dpllbyte", pll_28nm->id); pll_28nm_register()
572 clk_register_fixed_factor(dev, clk_name, pll_28nm_register()
/linux-4.4.14/drivers/clk/zynq/
H A Dclkc.c114 const char *clk_name, void __iomem *fclk_ctrl_reg, zynq_clk_register_fclk()
135 mux_name = kasprintf(GFP_KERNEL, "%s_mux", clk_name); zynq_clk_register_fclk()
138 div0_name = kasprintf(GFP_KERNEL, "%s_div0", clk_name); zynq_clk_register_fclk()
141 div1_name = kasprintf(GFP_KERNEL, "%s_div1", clk_name); zynq_clk_register_fclk()
158 clks[fclk] = clk_register_gate(NULL, clk_name, zynq_clk_register_fclk()
232 char *clk_name; zynq_clk_setup() local
444 clk_name = kmalloc(tmp, GFP_KERNEL); zynq_clk_setup()
448 snprintf(clk_name, tmp, "mio_clk_%2.2d", i); zynq_clk_setup()
449 idx = of_property_match_string(np, "clock-names", clk_name); zynq_clk_setup()
456 kfree(clk_name); zynq_clk_setup()
113 zynq_clk_register_fclk(enum zynq_clk fclk, const char *clk_name, void __iomem *fclk_ctrl_reg, const char **parents, int enable) zynq_clk_register_fclk() argument
/linux-4.4.14/sound/soc/qcom/
H A Dlpass-cpu.c368 char clk_name[16]; asoc_qcom_lpass_cpu_platform_probe() local
418 sprintf(clk_name, "mi2s-osr-clk%d", i); asoc_qcom_lpass_cpu_platform_probe()
420 sprintf(clk_name, "mi2s-osr-clk"); asoc_qcom_lpass_cpu_platform_probe()
423 clk_name); asoc_qcom_lpass_cpu_platform_probe()
432 sprintf(clk_name, "mi2s-bit-clk%d", i); asoc_qcom_lpass_cpu_platform_probe()
434 sprintf(clk_name, "mi2s-bit-clk"); asoc_qcom_lpass_cpu_platform_probe()
437 clk_name); asoc_qcom_lpass_cpu_platform_probe()
/linux-4.4.14/drivers/cpufreq/
H A Dls1x-cpufreq.c145 if (!pdata || !pdata->clk_name || !pdata->osc_clk_name) ls1x_cpufreq_probe()
150 clk = devm_clk_get(&pdev->dev, pdata->clk_name); ls1x_cpufreq_probe()
153 pdata->clk_name); ls1x_cpufreq_probe()
/linux-4.4.14/drivers/clk/st/
H A Dclkgen-mux.c422 const char *clk_name; st_of_clkgena_divmux_setup() local
425 i, &clk_name)) st_of_clkgena_divmux_setup()
431 if (*clk_name == '\0') st_of_clkgena_divmux_setup()
434 clk = clk_register_genamux(clk_name, parents, num_parents, st_of_clkgena_divmux_setup()
492 const char *parent_name, *clk_name; st_of_clkgena_prediv_setup() local
513 0, &clk_name)) st_of_clkgena_prediv_setup()
516 clk = clk_register_divider_table(NULL, clk_name, parent_name, st_of_clkgena_prediv_setup()
744 const char *clk_name; st_of_clkgen_vcc_setup() local
750 i, &clk_name)) st_of_clkgen_vcc_setup()
756 if (*clk_name == '\0') st_of_clkgen_vcc_setup()
791 clk = clk_register_composite(NULL, clk_name, parents, st_of_clkgen_vcc_setup()
H A Dclkgen-pll.c844 const char *clk_name, spinlock_t *lock) clkgen_pll_register()
854 init.name = clk_name; clkgen_pll_register()
881 const char *clk_name) clkgen_c65_lsdiv_register()
885 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, 1, 2); clkgen_c65_lsdiv_register()
921 const char *clk_name; clkgena_c65_pll_setup() local
943 0, &clk_name)) clkgena_c65_pll_setup()
951 reg + CLKGENAx_PLL0_OFFSET, clk_name, NULL); clkgena_c65_pll_setup()
957 1, &clk_name)) clkgena_c65_pll_setup()
966 clk_name); clkgena_c65_pll_setup()
972 2, &clk_name)) clkgena_c65_pll_setup()
980 reg + CLKGENAx_PLL1_OFFSET, clk_name, NULL); clkgena_c65_pll_setup()
1141 const char *clk_name; clkgen_c32_pll_setup() local
1144 odf, &clk_name)) clkgen_c32_pll_setup()
1148 odf, &clkgena_c32_odf_lock, clk_name); clkgen_c32_pll_setup()
1183 const char *clk_name; clkgengpu_c32_pll_setup() local
1203 0, &clk_name)) clkgengpu_c32_pll_setup()
1209 clk = clkgen_pll_register(parent_name, data, reg, clk_name, data->lock); clkgengpu_c32_pll_setup()
841 clkgen_pll_register(const char *parent_name, struct clkgen_pll_data *pll_data, void __iomem *reg, const char *clk_name, spinlock_t *lock) clkgen_pll_register() argument
880 clkgen_c65_lsdiv_register(const char *parent_name, const char *clk_name) clkgen_c65_lsdiv_register() argument
H A Dclk-flexgen.c310 const char *clk_name; st_of_flexgen_setup() local
313 i, &clk_name)) { st_of_flexgen_setup()
320 if (*clk_name == '\0') st_of_flexgen_setup()
323 clk = clk_register_flexgen(clk_name, parents, num_parents, st_of_flexgen_setup()
H A Dclkgen-fsyn.c1112 const char *clk_name; st_of_create_quadfs_fsynths() local
1115 fschan, &clk_name)) { st_of_create_quadfs_fsynths()
1122 if (*clk_name == '\0') st_of_create_quadfs_fsynths()
1125 clk = st_clk_register_quadfs_fsynth(clk_name, pll_name, st_of_create_quadfs_fsynths()
/linux-4.4.14/drivers/clk/bcm/
H A Dclk-iproc-asiu.c223 const char *clk_name; iproc_asiu_setup() local
226 i, &clk_name); iproc_asiu_setup()
231 asiu_clk->name = clk_name; iproc_asiu_setup()
235 init.name = clk_name; iproc_asiu_setup()
H A Dclk-iproc-pll.c674 const char *clk_name; iproc_pll_clk_setup() local
680 i, &clk_name); iproc_pll_clk_setup()
685 iclk->name = clk_name; iproc_pll_clk_setup()
689 init.name = clk_name; iproc_pll_clk_setup()
/linux-4.4.14/drivers/gpu/drm/sti/
H A Dsti_gdp.c349 char *clk_name; sti_gdp_init() local
353 clk_name = "pix_gdp1"; sti_gdp_init()
356 clk_name = "pix_gdp2"; sti_gdp_init()
359 clk_name = "pix_gdp3"; sti_gdp_init()
362 clk_name = "pix_gdp4"; sti_gdp_init()
369 gdp->clk_pix = devm_clk_get(gdp->dev, clk_name); sti_gdp_init()
371 DRM_ERROR("Cannot get %s clock\n", clk_name); sti_gdp_init()
/linux-4.4.14/drivers/acpi/
H A Dacpi_lpss.c280 const char *parent, *clk_name; register_device_clock() local
315 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname); register_device_clock()
316 if (!clk_name) register_device_clock()
318 clk = clk_register_fractional_divider(NULL, clk_name, parent, register_device_clock()
321 parent = clk_name; register_device_clock()
323 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname); register_device_clock()
324 if (!clk_name) { register_device_clock()
328 clk = clk_register_gate(NULL, clk_name, parent, register_device_clock()
332 kfree(clk_name); register_device_clock()
/linux-4.4.14/drivers/media/usb/em28xx/
H A Dem28xx-camera.c325 char clk_name[V4L2_SUBDEV_NAME_SIZE]; em28xx_init_camera() local
331 v4l2_clk_name_i2c(clk_name, sizeof(clk_name), em28xx_init_camera()
333 v4l2->clk = v4l2_clk_register_fixed(clk_name, -EINVAL); em28xx_init_camera()
/linux-4.4.14/drivers/gpu/drm/rcar-du/
H A Drcar_du_crtc.c579 char clk_name[9]; rcar_du_crtc_create() local
586 sprintf(clk_name, "du.%u", index); rcar_du_crtc_create()
587 name = clk_name; rcar_du_crtc_create()
598 sprintf(clk_name, "dclkin.%u", index); rcar_du_crtc_create()
599 clk = devm_clk_get(rcdu->dev, clk_name); rcar_du_crtc_create()
/linux-4.4.14/drivers/clk/samsung/
H A Dclk.c311 unsigned long _get_rate(const char *clk_name) _get_rate() argument
315 clk = __clk_lookup(clk_name); _get_rate()
317 pr_err("%s: could not find clock %s\n", __func__, clk_name); _get_rate()
H A Dclk.h400 extern unsigned long _get_rate(const char *clk_name);
/linux-4.4.14/drivers/media/platform/exynos4-is/
H A Dmedia-dev.c972 char clk_name[32]; fimc_md_get_clocks() local
980 snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i); fimc_md_get_clocks()
981 clock = clk_get(dev, clk_name); fimc_md_get_clocks()
984 dev_err(dev, "Failed to get clock: %s\n", clk_name); fimc_md_get_clocks()
1002 snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i); fimc_md_get_clocks()
1003 clock = clk_get(dev, clk_name); fimc_md_get_clocks()
1006 clk_name); fimc_md_get_clocks()
/linux-4.4.14/arch/mips/loongson32/common/
H A Dplatform.c67 .clk_name = "cpu_clk",
/linux-4.4.14/drivers/media/platform/soc_camera/
H A Dsoc_camera.c1363 char clk_name[V4L2_SUBDEV_NAME_SIZE]; soc_camera_i2c_init() local
1394 snprintf(clk_name, sizeof(clk_name), "%d-%04x", soc_camera_i2c_init()
1397 icd->clk = v4l2_clk_register(&soc_camera_clk_ops, clk_name, icd); soc_camera_i2c_init()
1529 char clk_name[V4L2_SUBDEV_NAME_SIZE]; scan_async_group() local
1575 snprintf(clk_name, sizeof(clk_name), "%d-%04x", scan_async_group()
1578 icd->clk = v4l2_clk_register(&soc_camera_clk_ops, clk_name, icd); scan_async_group()
1634 char clk_name[V4L2_SUBDEV_NAME_SIZE + 32]; soc_of_bind() local
1677 snprintf(clk_name, sizeof(clk_name), "%d-%04x", soc_of_bind()
1680 snprintf(clk_name, sizeof(clk_name), "of-%s", soc_of_bind()
1683 icd->clk = v4l2_clk_register(&soc_camera_clk_ops, clk_name, icd); soc_of_bind()
/linux-4.4.14/drivers/net/irda/
H A Dsh_sir.c709 char clk_name[8]; sh_sir_probe() local
736 snprintf(clk_name, sizeof(clk_name), "irda%d", pdev->id); sh_sir_probe()
737 self->clk = clk_get(&pdev->dev, clk_name); sh_sir_probe()
739 dev_err(&pdev->dev, "cannot get clock \"%s\"\n", clk_name); sh_sir_probe()
/linux-4.4.14/sound/soc/codecs/
H A Dak4642.c602 const char *clk_name = np->name; ak4642_of_parse_mcko() local
612 of_property_read_string(np, "clock-output-names", &clk_name); ak4642_of_parse_mcko()
614 clk = clk_register_fixed_rate(dev, clk_name, parent_clk_name, ak4642_of_parse_mcko()
/linux-4.4.14/drivers/rtc/
H A Drtc-sh.c593 char clk_name[6]; sh_rtc_probe() local
636 snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id); sh_rtc_probe()
638 rtc->clk = devm_clk_get(&pdev->dev, clk_name); sh_rtc_probe()
/linux-4.4.14/arch/arm/mach-mmp/
H A Dttc_dkb.c207 .clk_name = "disp0",
/linux-4.4.14/drivers/spi/
H A Dspi-s3c64xx.c1036 char clk_name[16]; s3c64xx_spi_probe() local
1153 sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr); s3c64xx_spi_probe()
1154 sdd->src_clk = devm_clk_get(&pdev->dev, clk_name); s3c64xx_spi_probe()
1157 "Unable to acquire clock '%s'\n", clk_name); s3c64xx_spi_probe()
1163 dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name); s3c64xx_spi_probe()
/linux-4.4.14/drivers/crypto/caam/
H A Dctrl.c24 char *clk_name) caam_drv_identify_clk()
26 return devm_clk_get(dev, clk_name); caam_drv_identify_clk()
30 char *clk_name) caam_drv_identify_clk()
23 caam_drv_identify_clk(struct device *dev, char *clk_name) caam_drv_identify_clk() argument
29 caam_drv_identify_clk(struct device *dev, char *clk_name) caam_drv_identify_clk() argument
/linux-4.4.14/drivers/video/fbdev/mmp/hw/
H A Dmmp_ctrl.c523 ctrl->clk = devm_clk_get(ctrl->dev, mi->clk_name); mmphw_probe()
525 dev_err(ctrl->dev, "unable to get clk %s\n", mi->clk_name); mmphw_probe()
/linux-4.4.14/sound/soc/sh/rcar/
H A Dadg.c415 static const char * const clk_name[] = { rsnd_adg_get_clkin() local
424 clk = devm_clk_get(dev, clk_name[i]); rsnd_adg_get_clkin()
/linux-4.4.14/include/video/
H A Dmmp_disp.h347 const char *clk_name; member in struct:mmp_mach_plat_info
/linux-4.4.14/sound/soc/samsung/
H A Di2s.c1165 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" }; i2s_register_clock_provider() local
1177 rclksrc = clk_get(dev, clk_name[i]); i2s_register_clock_provider()
1204 "clock-output-names", 0, &clk_name[0]); i2s_register_clock_provider()
1206 i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0], i2s_register_clock_provider()
/linux-4.4.14/drivers/usb/gadget/udc/
H A Dm66592-udc.c1558 char clk_name[8]; m66592_probe() local
1620 snprintf(clk_name, sizeof(clk_name), "usbf%d", pdev->id); m66592_probe()
1621 m66592->clk = clk_get(&pdev->dev, clk_name); m66592_probe()
1624 clk_name); m66592_probe()
H A Dr8a66597-udc.c1855 char clk_name[8]; r8a66597_probe() local
1898 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); r8a66597_probe()
1899 r8a66597->clk = devm_clk_get(dev, clk_name); r8a66597_probe()
1901 dev_err(dev, "cannot get clock \"%s\"\n", clk_name); r8a66597_probe()
/linux-4.4.14/drivers/dma/
H A Ds3c24xx-dma.c1239 char clk_name[6]; s3c24xx_dma_probe() local
1261 sprintf(clk_name, "dma.%d", i); s3c24xx_dma_probe()
1262 phy->clk = devm_clk_get(&pdev->dev, clk_name); s3c24xx_dma_probe()
/linux-4.4.14/drivers/usb/host/
H A Dr8a66597-hcd.c2410 char clk_name[8]; r8a66597_probe() local
2474 snprintf(clk_name, sizeof(clk_name), "usb%d", pdev->id); r8a66597_probe()
2475 r8a66597->clk = clk_get(&pdev->dev, clk_name); r8a66597_probe()
2478 clk_name); r8a66597_probe()
/linux-4.4.14/drivers/net/ethernet/broadcom/
H A Dbcm63xx_enet.c1735 const char *clk_name; bcm_enet_probe() local
1778 clk_name = "enet0"; bcm_enet_probe()
1782 clk_name = "enet1"; bcm_enet_probe()
1785 priv->mac_clk = clk_get(&pdev->dev, clk_name); bcm_enet_probe()
/linux-4.4.14/drivers/tty/serial/
H A Dsamsung.c2038 char clk_name[MAX_CLK_NAME_LENGTH]; s3c24xx_serial_get_options() local
2082 sprintf(clk_name, "clk_uart_baud%d", clk_sel); s3c24xx_serial_get_options()
2084 clk = clk_get(port->dev, clk_name); s3c24xx_serial_get_options()

Completed in 4184 milliseconds