Searched refs:mmcr (Results 1 - 16 of 16) sorted by relevance

/linux-4.1.27/arch/powerpc/perf/
H A Dmpc7450-pmu.c264 unsigned long mmcr[], mpc7450_compute_mmcr()
328 mmcr[0] = mmcr0; mpc7450_compute_mmcr()
329 mmcr[1] = mmcr1; mpc7450_compute_mmcr()
330 mmcr[2] = mmcr2; mpc7450_compute_mmcr()
338 static void mpc7450_disable_pmc(unsigned int pmc, unsigned long mmcr[]) mpc7450_disable_pmc() argument
341 mmcr[0] &= ~(pmcsel_mask[pmc] << pmcsel_shift[pmc]); mpc7450_disable_pmc()
343 mmcr[1] &= ~(pmcsel_mask[pmc] << pmcsel_shift[pmc]); mpc7450_disable_pmc()
263 mpc7450_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) mpc7450_compute_mmcr() argument
H A Dpower7-pmu.c248 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) power7_compute_mmcr()
304 mmcr[0] = 0; power7_compute_mmcr()
306 mmcr[0] = MMCR0_PMC1CE; power7_compute_mmcr()
308 mmcr[0] |= MMCR0_PMCjCE; power7_compute_mmcr()
309 mmcr[1] = mmcr1; power7_compute_mmcr()
310 mmcr[2] = mmcra; power7_compute_mmcr()
314 static void power7_disable_pmc(unsigned int pmc, unsigned long mmcr[]) power7_disable_pmc() argument
317 mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SH(pmc)); power7_disable_pmc()
247 power7_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) power7_compute_mmcr() argument
H A Dppc970-pmu.c260 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) p970_compute_mmcr()
400 mmcr[0] = mmcr0; p970_compute_mmcr()
401 mmcr[1] = mmcr1; p970_compute_mmcr()
402 mmcr[2] = mmcra; p970_compute_mmcr()
406 static void p970_disable_pmc(unsigned int pmc, unsigned long mmcr[]) p970_disable_pmc() argument
420 mmcr[i] = (mmcr[i] & ~(0x1fUL << shift)) | (0x08UL << shift); p970_disable_pmc()
259 p970_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) p970_compute_mmcr() argument
H A Dpower5+-pmu.c455 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) power5p_compute_mmcr()
593 mmcr[0] = 0; power5p_compute_mmcr()
595 mmcr[0] = MMCR0_PMC1CE; power5p_compute_mmcr()
597 mmcr[0] |= MMCR0_PMCjCE; power5p_compute_mmcr()
598 mmcr[1] = mmcr1; power5p_compute_mmcr()
599 mmcr[2] = mmcra; power5p_compute_mmcr()
603 static void power5p_disable_pmc(unsigned int pmc, unsigned long mmcr[]) power5p_disable_pmc() argument
606 mmcr[1] &= ~(0x7fUL << MMCR1_PMCSEL_SH(pmc)); power5p_disable_pmc()
454 power5p_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) power5p_compute_mmcr() argument
H A Dpower5-pmu.c386 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) power5_compute_mmcr()
535 mmcr[0] = 0; power5_compute_mmcr()
537 mmcr[0] = MMCR0_PMC1CE; power5_compute_mmcr()
539 mmcr[0] |= MMCR0_PMCjCE; power5_compute_mmcr()
540 mmcr[1] = mmcr1; power5_compute_mmcr()
541 mmcr[2] = mmcra; power5_compute_mmcr()
545 static void power5_disable_pmc(unsigned int pmc, unsigned long mmcr[]) power5_disable_pmc() argument
548 mmcr[1] &= ~(0x7fUL << MMCR1_PMCSEL_SH(pmc)); power5_disable_pmc()
385 power5_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) power5_compute_mmcr() argument
H A Dpower6-pmu.c178 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) p6_compute_mmcr()
250 mmcr[0] = 0; p6_compute_mmcr()
252 mmcr[0] = MMCR0_PMC1CE; p6_compute_mmcr()
254 mmcr[0] |= MMCR0_PMCjCE; p6_compute_mmcr()
255 mmcr[1] = mmcr1; p6_compute_mmcr()
256 mmcr[2] = mmcra; p6_compute_mmcr()
464 static void p6_disable_pmc(unsigned int pmc, unsigned long mmcr[]) p6_disable_pmc() argument
468 mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SH(pmc)); p6_disable_pmc()
177 p6_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) p6_compute_mmcr() argument
H A Dpower4-pmu.c359 unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) p4_compute_mmcr()
522 mmcr[0] = mmcr0; p4_compute_mmcr()
523 mmcr[1] = mmcr1; p4_compute_mmcr()
524 mmcr[2] = mmcra; p4_compute_mmcr()
528 static void p4_disable_pmc(unsigned int pmc, unsigned long mmcr[]) p4_disable_pmc() argument
535 mmcr[0] &= ~(0x1fUL << (MMCR0_PMC1SEL_SH - 7 * pmc)); p4_disable_pmc()
537 mmcr[1] &= ~(0x1fUL << (MMCR1_PMC3SEL_SH - 5 * (pmc - 2))); p4_disable_pmc()
539 mmcr[2] &= ~(1UL << MMCRA_PMC8SEL0_SH); p4_disable_pmc()
358 p4_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) p4_compute_mmcr() argument
H A Dpower8-pmu.c402 unsigned int hwc[], unsigned long mmcr[], power8_compute_mmcr()
499 mmcr[0] = 0; power8_compute_mmcr()
503 mmcr[0] = MMCR0_PMC1CE; power8_compute_mmcr()
506 mmcr[0] |= MMCR0_PMCjCE; power8_compute_mmcr()
510 mmcr[0] |= MMCR0_FC56; power8_compute_mmcr()
512 mmcr[1] = mmcr1; power8_compute_mmcr()
513 mmcr[2] = mmcra; power8_compute_mmcr()
514 mmcr[3] = mmcr2; power8_compute_mmcr()
601 static void power8_disable_pmc(unsigned int pmc, unsigned long mmcr[]) power8_disable_pmc() argument
604 mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1)); power8_disable_pmc()
401 power8_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]) power8_compute_mmcr() argument
H A Dcore-book3s.c44 unsigned long mmcr[4]; member in struct:cpu_hw_events
122 return cpuhw->mmcr[0]; ebb_switch_in()
566 unsigned long mmcr0 = cpuhw->mmcr[0]; ebb_switch_in()
600 mtspr(SPRN_MMCR2, cpuhw->mmcr[3] | current->thread.mmcr2); ebb_switch_in()
1191 if (cpuhw->mmcr[2] & MMCRA_SAMPLE_ENABLE) { power_pmu_disable()
1193 cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); power_pmu_disable()
1253 mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); power_pmu_enable()
1254 mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); power_pmu_enable()
1261 memset(cpuhw->mmcr, 0, sizeof(cpuhw->mmcr)); power_pmu_enable()
1264 cpuhw->mmcr, cpuhw->event)) { power_pmu_enable()
1278 cpuhw->mmcr[0] |= MMCR0_FCP; power_pmu_enable()
1280 cpuhw->mmcr[0] |= freeze_events_kernel; power_pmu_enable()
1282 cpuhw->mmcr[0] |= MMCR0_FCHV; power_pmu_enable()
1291 mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); power_pmu_enable()
1292 mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); power_pmu_enable()
1293 mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE)) power_pmu_enable()
1296 mtspr(SPRN_MMCR2, cpuhw->mmcr[3]); power_pmu_enable()
1347 cpuhw->mmcr[0] |= MMCR0_PMXE | MMCR0_FCECE; power_pmu_enable()
1363 if (cpuhw->mmcr[2] & MMCRA_SAMPLE_ENABLE) { power_pmu_enable()
1365 mtspr(SPRN_MMCRA, cpuhw->mmcr[2]); power_pmu_enable()
1495 ppmu->disable_pmc(event->hw.idx - 1, cpuhw->mmcr); power_pmu_del()
1516 cpuhw->mmcr[0] &= ~(MMCR0_PMXE | MMCR0_FCECE); power_pmu_del()
2129 write_mmcr0(cpuhw, cpuhw->mmcr[0]); perf_event_interrupt()
2144 cpuhw->mmcr[0] = MMCR0_FC; power_pmu_setup()
/linux-4.1.27/drivers/mtd/maps/
H A Dsc520cdp.c186 unsigned long __iomem *mmcr; sc520cdp_setup_par() local
191 mmcr = ioremap_nocache(SC520_MMCR_BASE, SC520_MMCR_EXTENT); sc520cdp_setup_par()
192 if(!mmcr) { /* ioremap_nocache failed: skip the PAR reprogramming */ sc520cdp_setup_par()
206 mmcr_val = readl(&mmcr[SC520_PAR(j)]); sc520cdp_setup_par()
210 writel(par_table[i].new_par, &mmcr[SC520_PAR(j)]); sc520cdp_setup_par()
223 iounmap(mmcr); sc520cdp_setup_par()
/linux-4.1.27/arch/powerpc/include/asm/
H A Dperf_event_server.h35 unsigned int hwc[], unsigned long mmcr[],
43 void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]);
H A Dkvm_host.h523 u64 mmcr[5]; member in struct:kvmppc_slb::kvm_vcpu_arch
/linux-4.1.27/arch/powerpc/oprofile/
H A Dop_model_pa6t.c34 /* mmcr values are set in pa6t_reg_setup, used in pa6t_cpu_setup */
H A Dop_model_power4.c36 /* mmcr values are set in power4_reg_setup, used in power4_cpu_setup */
/linux-4.1.27/arch/powerpc/kvm/
H A Dbook3s_hv.c1060 *val = get_reg_val(id, vcpu->arch.mmcr[i]); kvmppc_get_one_reg_hv()
1252 vcpu->arch.mmcr[i] = set_reg_val(id, *val); kvmppc_set_one_reg_hv()
1632 vcpu->arch.mmcr[0] = MMCR0_FC; kvmppc_core_vcpu_create_hv()
/linux-4.1.27/arch/powerpc/kernel/
H A Dasm-offsets.c538 DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr)); main()

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