| /linux-4.4.14/drivers/tty/serial/ |
| H A D | omap-serial.c | 180 static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1);
182 static inline unsigned int serial_in(struct uart_omap_port *up, int offset) serial_in() argument
184 offset <<= up->port.regshift; serial_in()
185 return readw(up->port.membase + offset); serial_in()
188 static inline void serial_out(struct uart_omap_port *up, int offset, int value) serial_out() argument
190 offset <<= up->port.regshift; serial_out()
191 writew(value, up->port.membase + offset); serial_out()
194 static inline void serial_omap_clear_fifos(struct uart_omap_port *up) serial_omap_clear_fifos() argument
196 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); serial_omap_clear_fifos()
197 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | serial_omap_clear_fifos()
199 serial_out(up, UART_FCR, 0); serial_omap_clear_fifos()
203 static int serial_omap_get_context_loss_count(struct uart_omap_port *up) serial_omap_get_context_loss_count() argument
205 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); serial_omap_get_context_loss_count()
210 return pdata->get_context_loss_count(up->dev); serial_omap_get_context_loss_count()
214 static void serial_omap_enable_wakeup(struct uart_omap_port *up, bool enable) serial_omap_enable_wakeup() argument
216 struct omap_uart_port_info *pdata = dev_get_platdata(up->dev); serial_omap_enable_wakeup()
221 pdata->enable_wakeup(up->dev, enable); serial_omap_enable_wakeup()
284 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_enable_ms() local
286 dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->port.line); serial_omap_enable_ms()
288 pm_runtime_get_sync(up->dev); serial_omap_enable_ms()
289 up->ier |= UART_IER_MSI; serial_omap_enable_ms()
290 serial_out(up, UART_IER, up->ier); serial_omap_enable_ms()
291 pm_runtime_mark_last_busy(up->dev); serial_omap_enable_ms()
292 pm_runtime_put_autosuspend(up->dev); serial_omap_enable_ms()
297 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_stop_tx() local
300 pm_runtime_get_sync(up->dev); serial_omap_stop_tx()
304 if (up->scr & OMAP_UART_SCR_TX_EMPTY) { serial_omap_stop_tx()
312 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; serial_omap_stop_tx()
313 serial_out(up, UART_OMAP_SCR, up->scr); serial_omap_stop_tx()
316 if (gpio_get_value(up->rts_gpio) != res) { serial_omap_stop_tx()
320 gpio_set_value(up->rts_gpio, res); serial_omap_stop_tx()
331 up->scr |= OMAP_UART_SCR_TX_EMPTY; serial_omap_stop_tx()
332 serial_out(up, UART_OMAP_SCR, up->scr); serial_omap_stop_tx()
337 if (up->ier & UART_IER_THRI) { serial_omap_stop_tx()
338 up->ier &= ~UART_IER_THRI; serial_omap_stop_tx()
339 serial_out(up, UART_IER, up->ier); serial_omap_stop_tx()
348 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_RCVR); serial_omap_stop_tx()
350 up->ier |= UART_IER_RLSI | UART_IER_RDI; serial_omap_stop_tx()
351 up->port.read_status_mask |= UART_LSR_DR; serial_omap_stop_tx()
352 serial_out(up, UART_IER, up->ier); serial_omap_stop_tx()
355 pm_runtime_mark_last_busy(up->dev); serial_omap_stop_tx()
356 pm_runtime_put_autosuspend(up->dev); serial_omap_stop_tx()
361 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_stop_rx() local
363 pm_runtime_get_sync(up->dev); serial_omap_stop_rx()
364 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); serial_omap_stop_rx()
365 up->port.read_status_mask &= ~UART_LSR_DR; serial_omap_stop_rx()
366 serial_out(up, UART_IER, up->ier); serial_omap_stop_rx()
367 pm_runtime_mark_last_busy(up->dev); serial_omap_stop_rx()
368 pm_runtime_put_autosuspend(up->dev); serial_omap_stop_rx()
371 static void transmit_chars(struct uart_omap_port *up, unsigned int lsr) transmit_chars() argument
373 struct circ_buf *xmit = &up->port.state->xmit; transmit_chars()
376 if (up->port.x_char) { transmit_chars()
377 serial_out(up, UART_TX, up->port.x_char); transmit_chars()
378 up->port.icount.tx++; transmit_chars()
379 up->port.x_char = 0; transmit_chars()
382 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { transmit_chars()
383 serial_omap_stop_tx(&up->port); transmit_chars()
386 count = up->port.fifosize / 4; transmit_chars()
388 serial_out(up, UART_TX, xmit->buf[xmit->tail]); transmit_chars()
390 up->port.icount.tx++; transmit_chars()
396 uart_write_wakeup(&up->port); transmit_chars()
399 serial_omap_stop_tx(&up->port); transmit_chars()
402 static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up) serial_omap_enable_ier_thri() argument
404 if (!(up->ier & UART_IER_THRI)) { serial_omap_enable_ier_thri()
405 up->ier |= UART_IER_THRI; serial_omap_enable_ier_thri()
406 serial_out(up, UART_IER, up->ier); serial_omap_enable_ier_thri()
412 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_start_tx() local
415 pm_runtime_get_sync(up->dev); serial_omap_start_tx()
420 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; serial_omap_start_tx()
421 serial_out(up, UART_OMAP_SCR, up->scr); serial_omap_start_tx()
425 if (gpio_get_value(up->rts_gpio) != res) { serial_omap_start_tx()
426 gpio_set_value(up->rts_gpio, res); serial_omap_start_tx()
436 serial_omap_enable_ier_thri(up); serial_omap_start_tx()
437 pm_runtime_mark_last_busy(up->dev); serial_omap_start_tx()
438 pm_runtime_put_autosuspend(up->dev); serial_omap_start_tx()
443 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_throttle() local
446 pm_runtime_get_sync(up->dev); serial_omap_throttle()
447 spin_lock_irqsave(&up->port.lock, flags); serial_omap_throttle()
448 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); serial_omap_throttle()
449 serial_out(up, UART_IER, up->ier); serial_omap_throttle()
450 spin_unlock_irqrestore(&up->port.lock, flags); serial_omap_throttle()
451 pm_runtime_mark_last_busy(up->dev); serial_omap_throttle()
452 pm_runtime_put_autosuspend(up->dev); serial_omap_throttle()
457 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_unthrottle() local
460 pm_runtime_get_sync(up->dev); serial_omap_unthrottle()
461 spin_lock_irqsave(&up->port.lock, flags); serial_omap_unthrottle()
462 up->ier |= UART_IER_RLSI | UART_IER_RDI; serial_omap_unthrottle()
463 serial_out(up, UART_IER, up->ier); serial_omap_unthrottle()
464 spin_unlock_irqrestore(&up->port.lock, flags); serial_omap_unthrottle()
465 pm_runtime_mark_last_busy(up->dev); serial_omap_unthrottle()
466 pm_runtime_put_autosuspend(up->dev); serial_omap_unthrottle()
469 static unsigned int check_modem_status(struct uart_omap_port *up) check_modem_status() argument
473 status = serial_in(up, UART_MSR); check_modem_status()
474 status |= up->msr_saved_flags; check_modem_status()
475 up->msr_saved_flags = 0; check_modem_status()
479 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && check_modem_status()
480 up->port.state != NULL) { check_modem_status()
482 up->port.icount.rng++; check_modem_status()
484 up->port.icount.dsr++; check_modem_status()
487 (&up->port, status & UART_MSR_DCD); check_modem_status()
490 (&up->port, status & UART_MSR_CTS); check_modem_status()
491 wake_up_interruptible(&up->port.state->port.delta_msr_wait); check_modem_status()
497 static void serial_omap_rlsi(struct uart_omap_port *up, unsigned int lsr) serial_omap_rlsi() argument
503 ch = serial_in(up, UART_RX); serial_omap_rlsi()
505 up->port.icount.rx++; serial_omap_rlsi()
511 up->port.icount.brk++; serial_omap_rlsi()
518 if (uart_handle_break(&up->port)) serial_omap_rlsi()
525 up->port.icount.parity++; serial_omap_rlsi()
530 up->port.icount.frame++; serial_omap_rlsi()
534 up->port.icount.overrun++; serial_omap_rlsi()
537 if (up->port.line == up->port.cons->index) { serial_omap_rlsi()
539 lsr |= up->lsr_break_flag; serial_omap_rlsi()
542 uart_insert_char(&up->port, lsr, UART_LSR_OE, 0, flag); serial_omap_rlsi()
545 static void serial_omap_rdi(struct uart_omap_port *up, unsigned int lsr) serial_omap_rdi() argument
553 ch = serial_in(up, UART_RX); serial_omap_rdi()
555 up->port.icount.rx++; serial_omap_rdi()
557 if (uart_handle_sysrq_char(&up->port, ch)) serial_omap_rdi()
560 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag); serial_omap_rdi()
570 struct uart_omap_port *up = dev_id; serial_omap_irq() local
576 spin_lock(&up->port.lock); serial_omap_irq()
577 pm_runtime_get_sync(up->dev); serial_omap_irq()
580 iir = serial_in(up, UART_IIR); serial_omap_irq()
585 lsr = serial_in(up, UART_LSR); serial_omap_irq()
592 check_modem_status(up); serial_omap_irq()
595 transmit_chars(up, lsr); serial_omap_irq()
600 serial_omap_rdi(up, lsr); serial_omap_irq()
603 serial_omap_rlsi(up, lsr); serial_omap_irq()
615 spin_unlock(&up->port.lock); serial_omap_irq()
617 tty_flip_buffer_push(&up->port.state->port); serial_omap_irq()
619 pm_runtime_mark_last_busy(up->dev); serial_omap_irq()
620 pm_runtime_put_autosuspend(up->dev); serial_omap_irq()
621 up->port_activity = jiffies; serial_omap_irq()
628 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_tx_empty() local
632 pm_runtime_get_sync(up->dev); serial_omap_tx_empty()
633 dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->port.line); serial_omap_tx_empty()
634 spin_lock_irqsave(&up->port.lock, flags); serial_omap_tx_empty()
635 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; serial_omap_tx_empty()
636 spin_unlock_irqrestore(&up->port.lock, flags); serial_omap_tx_empty()
637 pm_runtime_mark_last_busy(up->dev); serial_omap_tx_empty()
638 pm_runtime_put_autosuspend(up->dev); serial_omap_tx_empty()
644 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_get_mctrl() local
648 pm_runtime_get_sync(up->dev); serial_omap_get_mctrl()
649 status = check_modem_status(up); serial_omap_get_mctrl()
650 pm_runtime_mark_last_busy(up->dev); serial_omap_get_mctrl()
651 pm_runtime_put_autosuspend(up->dev); serial_omap_get_mctrl()
653 dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->port.line); serial_omap_get_mctrl()
668 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_set_mctrl() local
671 dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->port.line); serial_omap_set_mctrl()
683 pm_runtime_get_sync(up->dev); serial_omap_set_mctrl()
684 old_mcr = serial_in(up, UART_MCR); serial_omap_set_mctrl()
687 up->mcr = old_mcr | mcr; serial_omap_set_mctrl()
688 serial_out(up, UART_MCR, up->mcr); serial_omap_set_mctrl()
691 lcr = serial_in(up, UART_LCR); serial_omap_set_mctrl()
692 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_set_mctrl()
694 up->efr |= UART_EFR_RTS; serial_omap_set_mctrl()
696 up->efr &= UART_EFR_RTS; serial_omap_set_mctrl()
697 serial_out(up, UART_EFR, up->efr); serial_omap_set_mctrl()
698 serial_out(up, UART_LCR, lcr); serial_omap_set_mctrl()
700 pm_runtime_mark_last_busy(up->dev); serial_omap_set_mctrl()
701 pm_runtime_put_autosuspend(up->dev); serial_omap_set_mctrl()
706 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_break_ctl() local
709 dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->port.line); serial_omap_break_ctl()
710 pm_runtime_get_sync(up->dev); serial_omap_break_ctl()
711 spin_lock_irqsave(&up->port.lock, flags); serial_omap_break_ctl()
713 up->lcr |= UART_LCR_SBC; serial_omap_break_ctl()
715 up->lcr &= ~UART_LCR_SBC; serial_omap_break_ctl()
716 serial_out(up, UART_LCR, up->lcr); serial_omap_break_ctl()
717 spin_unlock_irqrestore(&up->port.lock, flags); serial_omap_break_ctl()
718 pm_runtime_mark_last_busy(up->dev); serial_omap_break_ctl()
719 pm_runtime_put_autosuspend(up->dev); serial_omap_break_ctl()
724 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_startup() local
731 retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags, serial_omap_startup()
732 up->name, up); serial_omap_startup()
736 /* Optional wake-up IRQ */ serial_omap_startup()
737 if (up->wakeirq) { serial_omap_startup()
738 retval = dev_pm_set_dedicated_wake_irq(up->dev, up->wakeirq); serial_omap_startup()
740 free_irq(up->port.irq, up); serial_omap_startup()
745 dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->port.line); serial_omap_startup()
747 pm_runtime_get_sync(up->dev); serial_omap_startup()
752 serial_omap_clear_fifos(up); serial_omap_startup()
757 (void) serial_in(up, UART_LSR); serial_omap_startup()
758 if (serial_in(up, UART_LSR) & UART_LSR_DR) serial_omap_startup()
759 (void) serial_in(up, UART_RX); serial_omap_startup()
760 (void) serial_in(up, UART_IIR); serial_omap_startup()
761 (void) serial_in(up, UART_MSR); serial_omap_startup()
766 serial_out(up, UART_LCR, UART_LCR_WLEN8); serial_omap_startup()
767 spin_lock_irqsave(&up->port.lock, flags); serial_omap_startup()
771 up->port.mctrl |= TIOCM_OUT2; serial_omap_startup()
772 serial_omap_set_mctrl(&up->port, up->port.mctrl); serial_omap_startup()
773 spin_unlock_irqrestore(&up->port.lock, flags); serial_omap_startup()
775 up->msr_saved_flags = 0; serial_omap_startup()
781 up->ier = UART_IER_RLSI | UART_IER_RDI; serial_omap_startup()
782 serial_out(up, UART_IER, up->ier); serial_omap_startup()
784 /* Enable module level wake up */ serial_omap_startup()
785 up->wer = OMAP_UART_WER_MOD_WKUP; serial_omap_startup()
786 if (up->features & OMAP_UART_WER_HAS_TX_WAKEUP) serial_omap_startup()
787 up->wer |= OMAP_UART_TX_WAKEUP_EN; serial_omap_startup()
789 serial_out(up, UART_OMAP_WER, up->wer); serial_omap_startup()
791 pm_runtime_mark_last_busy(up->dev); serial_omap_startup()
792 pm_runtime_put_autosuspend(up->dev); serial_omap_startup()
793 up->port_activity = jiffies; serial_omap_startup()
799 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_shutdown() local
802 dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->port.line); serial_omap_shutdown()
804 pm_runtime_get_sync(up->dev); serial_omap_shutdown()
808 up->ier = 0; serial_omap_shutdown()
809 serial_out(up, UART_IER, 0); serial_omap_shutdown()
811 spin_lock_irqsave(&up->port.lock, flags); serial_omap_shutdown()
812 up->port.mctrl &= ~TIOCM_OUT2; serial_omap_shutdown()
813 serial_omap_set_mctrl(&up->port, up->port.mctrl); serial_omap_shutdown()
814 spin_unlock_irqrestore(&up->port.lock, flags); serial_omap_shutdown()
819 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); serial_omap_shutdown()
820 serial_omap_clear_fifos(up); serial_omap_shutdown()
825 if (serial_in(up, UART_LSR) & UART_LSR_DR) serial_omap_shutdown()
826 (void) serial_in(up, UART_RX); serial_omap_shutdown()
828 pm_runtime_mark_last_busy(up->dev); serial_omap_shutdown()
829 pm_runtime_put_autosuspend(up->dev); serial_omap_shutdown()
830 free_irq(up->port.irq, up); serial_omap_shutdown()
831 dev_pm_clear_wake_irq(up->dev); serial_omap_shutdown()
836 struct uart_omap_port *up = container_of(work, struct uart_omap_port, serial_omap_uart_qos_work() local
839 pm_qos_update_request(&up->pm_qos_request, up->latency); serial_omap_uart_qos_work()
846 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_set_termios() local
884 up->calc_latency = (USEC_PER_SEC * up->port.fifosize) / (baud / 8); serial_omap_set_termios()
885 up->latency = up->calc_latency; serial_omap_set_termios()
886 schedule_work(&up->qos_work); serial_omap_set_termios()
888 up->dll = quot & 0xff; serial_omap_set_termios()
889 up->dlh = quot >> 8; serial_omap_set_termios()
890 up->mdr1 = UART_OMAP_MDR1_DISABLE; serial_omap_set_termios()
892 up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 | serial_omap_set_termios()
899 pm_runtime_get_sync(up->dev); serial_omap_set_termios()
900 spin_lock_irqsave(&up->port.lock, flags); serial_omap_set_termios()
907 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; serial_omap_set_termios()
909 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; serial_omap_set_termios()
911 up->port.read_status_mask |= UART_LSR_BI; serial_omap_set_termios()
916 up->port.ignore_status_mask = 0; serial_omap_set_termios()
918 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; serial_omap_set_termios()
920 up->port.ignore_status_mask |= UART_LSR_BI; serial_omap_set_termios()
926 up->port.ignore_status_mask |= UART_LSR_OE; serial_omap_set_termios()
933 up->port.ignore_status_mask |= UART_LSR_DR; serial_omap_set_termios()
938 up->ier &= ~UART_IER_MSI; serial_omap_set_termios()
939 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) serial_omap_set_termios()
940 up->ier |= UART_IER_MSI; serial_omap_set_termios()
941 serial_out(up, UART_IER, up->ier); serial_omap_set_termios()
942 serial_out(up, UART_LCR, cval); /* reset DLAB */ serial_omap_set_termios()
943 up->lcr = cval; serial_omap_set_termios()
944 up->scr = 0; serial_omap_set_termios()
952 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_omap_set_termios()
953 serial_out(up, UART_DLL, 0); serial_omap_set_termios()
954 serial_out(up, UART_DLM, 0); serial_omap_set_termios()
955 serial_out(up, UART_LCR, 0); serial_omap_set_termios()
957 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_set_termios()
959 up->efr = serial_in(up, UART_EFR) & ~UART_EFR_ECB; serial_omap_set_termios()
960 up->efr &= ~UART_EFR_SCD; serial_omap_set_termios()
961 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); serial_omap_set_termios()
963 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_omap_set_termios()
964 up->mcr = serial_in(up, UART_MCR) & ~UART_MCR_TCRTLR; serial_omap_set_termios()
965 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); serial_omap_set_termios()
968 up->scr |= OMAP_UART_SCR_RX_TRIG_GRANU1_MASK; serial_omap_set_termios()
982 up->fcr &= ~OMAP_UART_FCR_RX_FIFO_TRIG_MASK; serial_omap_set_termios()
983 up->fcr &= ~OMAP_UART_FCR_TX_FIFO_TRIG_MASK; serial_omap_set_termios()
984 up->fcr |= UART_FCR6_R_TRIGGER_16 | UART_FCR6_T_TRIGGER_24 | serial_omap_set_termios()
987 serial_out(up, UART_FCR, up->fcr); serial_omap_set_termios()
988 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_set_termios()
990 serial_out(up, UART_OMAP_SCR, up->scr); serial_omap_set_termios()
993 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_omap_set_termios()
994 serial_out(up, UART_MCR, up->mcr); serial_omap_set_termios()
995 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_set_termios()
996 serial_out(up, UART_EFR, up->efr); serial_omap_set_termios()
997 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_omap_set_termios()
1001 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) serial_omap_set_termios()
1002 serial_omap_mdr1_errataset(up, up->mdr1); serial_omap_set_termios()
1004 serial_out(up, UART_OMAP_MDR1, up->mdr1); serial_omap_set_termios()
1006 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_set_termios()
1007 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); serial_omap_set_termios()
1009 serial_out(up, UART_LCR, 0); serial_omap_set_termios()
1010 serial_out(up, UART_IER, 0); serial_omap_set_termios()
1011 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_set_termios()
1013 serial_out(up, UART_DLL, up->dll); /* LS of divisor */ serial_omap_set_termios()
1014 serial_out(up, UART_DLM, up->dlh); /* MS of divisor */ serial_omap_set_termios()
1016 serial_out(up, UART_LCR, 0); serial_omap_set_termios()
1017 serial_out(up, UART_IER, up->ier); serial_omap_set_termios()
1018 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_set_termios()
1020 serial_out(up, UART_EFR, up->efr); serial_omap_set_termios()
1021 serial_out(up, UART_LCR, cval); serial_omap_set_termios()
1024 up->mdr1 = UART_OMAP_MDR1_13X_MODE; serial_omap_set_termios()
1026 up->mdr1 = UART_OMAP_MDR1_16X_MODE; serial_omap_set_termios()
1028 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) serial_omap_set_termios()
1029 serial_omap_mdr1_errataset(up, up->mdr1); serial_omap_set_termios()
1031 serial_out(up, UART_OMAP_MDR1, up->mdr1); serial_omap_set_termios()
1034 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_set_termios()
1037 serial_out(up, UART_XON1, termios->c_cc[VSTART]); serial_omap_set_termios()
1038 serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]); serial_omap_set_termios()
1041 serial_out(up, UART_EFR, up->efr | UART_EFR_ECB); serial_omap_set_termios()
1042 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_omap_set_termios()
1043 serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR); serial_omap_set_termios()
1045 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG); serial_omap_set_termios()
1047 up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); serial_omap_set_termios()
1049 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { serial_omap_set_termios()
1051 up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; serial_omap_set_termios()
1052 up->efr |= UART_EFR_CTS; serial_omap_set_termios()
1055 up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS); serial_omap_set_termios()
1058 if (up->port.flags & UPF_SOFT_FLOW) { serial_omap_set_termios()
1060 up->efr &= OMAP_UART_SW_CLR; serial_omap_set_termios()
1068 up->efr |= OMAP_UART_SW_RX; serial_omap_set_termios()
1076 up->port.status |= UPSTAT_AUTOXOFF; serial_omap_set_termios()
1077 up->efr |= OMAP_UART_SW_TX; serial_omap_set_termios()
1087 up->mcr |= UART_MCR_XONANY; serial_omap_set_termios()
1089 up->mcr &= ~UART_MCR_XONANY; serial_omap_set_termios()
1091 serial_out(up, UART_MCR, up->mcr); serial_omap_set_termios()
1092 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_set_termios()
1093 serial_out(up, UART_EFR, up->efr); serial_omap_set_termios()
1094 serial_out(up, UART_LCR, up->lcr); serial_omap_set_termios()
1096 serial_omap_set_mctrl(&up->port, up->port.mctrl); serial_omap_set_termios()
1098 spin_unlock_irqrestore(&up->port.lock, flags); serial_omap_set_termios()
1099 pm_runtime_mark_last_busy(up->dev); serial_omap_set_termios()
1100 pm_runtime_put_autosuspend(up->dev); serial_omap_set_termios()
1101 dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->port.line); serial_omap_set_termios()
1108 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_pm() local
1111 dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->port.line); serial_omap_pm()
1113 pm_runtime_get_sync(up->dev); serial_omap_pm()
1114 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_pm()
1115 efr = serial_in(up, UART_EFR); serial_omap_pm()
1116 serial_out(up, UART_EFR, efr | UART_EFR_ECB); serial_omap_pm()
1117 serial_out(up, UART_LCR, 0); serial_omap_pm()
1119 serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); serial_omap_pm()
1120 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial_omap_pm()
1121 serial_out(up, UART_EFR, efr); serial_omap_pm()
1122 serial_out(up, UART_LCR, 0); serial_omap_pm()
1124 pm_runtime_mark_last_busy(up->dev); serial_omap_pm()
1125 pm_runtime_put_autosuspend(up->dev); serial_omap_pm()
1141 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_config_port() local
1143 dev_dbg(up->port.dev, "serial_omap_config_port+%d\n", serial_omap_config_port()
1144 up->port.line); serial_omap_config_port()
1145 up->port.type = PORT_OMAP; serial_omap_config_port()
1146 up->port.flags |= UPF_SOFT_FLOW | UPF_HARD_FLOW; serial_omap_config_port()
1160 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_type() local
1162 dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->port.line); serial_omap_type()
1163 return up->name; serial_omap_type()
1168 static inline void wait_for_xmitr(struct uart_omap_port *up) wait_for_xmitr() argument
1172 /* Wait up to 10ms for the character(s) to be sent. */ wait_for_xmitr()
1174 status = serial_in(up, UART_LSR); wait_for_xmitr()
1177 up->lsr_break_flag = UART_LSR_BI; wait_for_xmitr()
1184 /* Wait up to 1s for flow control if necessary */ wait_for_xmitr()
1185 if (up->port.flags & UPF_CONS_FLOW) { wait_for_xmitr()
1188 unsigned int msr = serial_in(up, UART_MSR); wait_for_xmitr()
1190 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; wait_for_xmitr()
1203 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_poll_put_char() local
1205 pm_runtime_get_sync(up->dev); serial_omap_poll_put_char()
1206 wait_for_xmitr(up); serial_omap_poll_put_char()
1207 serial_out(up, UART_TX, ch); serial_omap_poll_put_char()
1208 pm_runtime_mark_last_busy(up->dev); serial_omap_poll_put_char()
1209 pm_runtime_put_autosuspend(up->dev); serial_omap_poll_put_char()
1214 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_poll_get_char() local
1217 pm_runtime_get_sync(up->dev); serial_omap_poll_get_char()
1218 status = serial_in(up, UART_LSR); serial_omap_poll_get_char()
1224 status = serial_in(up, UART_RX); serial_omap_poll_get_char()
1227 pm_runtime_mark_last_busy(up->dev); serial_omap_poll_get_char()
1228 pm_runtime_put_autosuspend(up->dev); serial_omap_poll_get_char()
1243 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_console_putchar() local
1245 wait_for_xmitr(up); serial_omap_console_putchar()
1246 serial_out(up, UART_TX, ch); serial_omap_console_putchar()
1253 struct uart_omap_port *up = serial_omap_console_ports[co->index]; serial_omap_console_write() local
1258 pm_runtime_get_sync(up->dev); serial_omap_console_write()
1261 if (up->port.sysrq) serial_omap_console_write()
1264 locked = spin_trylock(&up->port.lock); serial_omap_console_write()
1266 spin_lock(&up->port.lock); serial_omap_console_write()
1271 ier = serial_in(up, UART_IER); serial_omap_console_write()
1272 serial_out(up, UART_IER, 0); serial_omap_console_write()
1274 uart_console_write(&up->port, s, count, serial_omap_console_putchar); serial_omap_console_write()
1280 wait_for_xmitr(up); serial_omap_console_write()
1281 serial_out(up, UART_IER, ier); serial_omap_console_write()
1289 if (up->msr_saved_flags) serial_omap_console_write()
1290 check_modem_status(up); serial_omap_console_write()
1292 pm_runtime_mark_last_busy(up->dev); serial_omap_console_write()
1293 pm_runtime_put_autosuspend(up->dev); serial_omap_console_write()
1295 spin_unlock(&up->port.lock); serial_omap_console_write()
1302 struct uart_omap_port *up; serial_omap_console_setup() local
1310 up = serial_omap_console_ports[co->index]; serial_omap_console_setup()
1315 return uart_set_options(&up->port, co, baud, parity, bits, flow); serial_omap_console_setup()
1328 static void serial_omap_add_console_port(struct uart_omap_port *up) serial_omap_add_console_port() argument
1330 serial_omap_console_ports[up->port.line] = up; serial_omap_add_console_port()
1339 static inline void serial_omap_add_console_port(struct uart_omap_port *up) serial_omap_add_console_port() argument
1348 struct uart_omap_port *up = to_uart_omap_port(port); serial_omap_config_rs485() local
1352 pm_runtime_get_sync(up->dev); serial_omap_config_rs485()
1355 mode = up->ier; serial_omap_config_rs485()
1356 up->ier = 0; serial_omap_config_rs485()
1357 serial_out(up, UART_IER, 0); serial_omap_config_rs485()
1370 if (gpio_is_valid(up->rts_gpio)) { serial_omap_config_rs485()
1375 gpio_set_value(up->rts_gpio, val); serial_omap_config_rs485()
1380 up->ier = mode; serial_omap_config_rs485()
1381 serial_out(up, UART_IER, up->ier); serial_omap_config_rs485()
1387 (up->scr & OMAP_UART_SCR_TX_EMPTY)) { serial_omap_config_rs485()
1388 up->scr &= ~OMAP_UART_SCR_TX_EMPTY; serial_omap_config_rs485()
1389 serial_out(up, UART_OMAP_SCR, up->scr); serial_omap_config_rs485()
1392 pm_runtime_mark_last_busy(up->dev); serial_omap_config_rs485()
1393 pm_runtime_put_autosuspend(up->dev); serial_omap_config_rs485()
1435 struct uart_omap_port *up = dev_get_drvdata(dev); serial_omap_prepare() local
1437 up->is_suspending = true; serial_omap_prepare()
1444 struct uart_omap_port *up = dev_get_drvdata(dev); serial_omap_complete() local
1446 up->is_suspending = false; serial_omap_complete()
1451 struct uart_omap_port *up = dev_get_drvdata(dev); serial_omap_suspend() local
1453 uart_suspend_port(&serial_omap_reg, &up->port); serial_omap_suspend()
1454 flush_work(&up->qos_work); serial_omap_suspend()
1457 serial_omap_enable_wakeup(up, true); serial_omap_suspend()
1459 serial_omap_enable_wakeup(up, false); serial_omap_suspend()
1466 struct uart_omap_port *up = dev_get_drvdata(dev); serial_omap_resume() local
1469 serial_omap_enable_wakeup(up, false); serial_omap_resume()
1471 uart_resume_port(&serial_omap_reg, &up->port); serial_omap_resume()
1480 static void omap_serial_fill_features_erratas(struct uart_omap_port *up) omap_serial_fill_features_erratas() argument
1485 mvr = readl(up->port.membase + (UART_OMAP_MVER << up->port.regshift)); omap_serial_fill_features_erratas()
1505 dev_warn(up->dev, omap_serial_fill_features_erratas()
1507 up->name); omap_serial_fill_features_erratas()
1518 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | omap_serial_fill_features_erratas()
1522 up->errata |= (UART_ERRATA_i202_MDR1_ACCESS | omap_serial_fill_features_erratas()
1524 up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; omap_serial_fill_features_erratas()
1527 up->errata |= UART_ERRATA_i202_MDR1_ACCESS; omap_serial_fill_features_erratas()
1528 up->features |= OMAP_UART_WER_HAS_TX_WAKEUP; omap_serial_fill_features_erratas()
1548 static int serial_omap_probe_rs485(struct uart_omap_port *up, serial_omap_probe_rs485() argument
1551 struct serial_rs485 *rs485conf = &up->port.rs485; serial_omap_probe_rs485()
1557 up->rts_gpio = -EINVAL; serial_omap_probe_rs485()
1568 up->rts_gpio = of_get_named_gpio_flags(np, "rts-gpio", 0, &flags); serial_omap_probe_rs485()
1569 if (gpio_is_valid(up->rts_gpio)) { serial_omap_probe_rs485()
1570 ret = devm_gpio_request(up->dev, up->rts_gpio, "omap-serial"); serial_omap_probe_rs485()
1573 ret = gpio_direction_output(up->rts_gpio, serial_omap_probe_rs485()
1577 } else if (up->rts_gpio == -EPROBE_DEFER) { serial_omap_probe_rs485()
1580 up->rts_gpio = -EINVAL; serial_omap_probe_rs485()
1601 struct uart_omap_port *up; serial_omap_probe() local
1622 up = devm_kzalloc(&pdev->dev, sizeof(*up), GFP_KERNEL); serial_omap_probe()
1623 if (!up) serial_omap_probe()
1631 up->dev = &pdev->dev; serial_omap_probe()
1632 up->port.dev = &pdev->dev; serial_omap_probe()
1633 up->port.type = PORT_OMAP; serial_omap_probe()
1634 up->port.iotype = UPIO_MEM; serial_omap_probe()
1635 up->port.irq = uartirq; serial_omap_probe()
1636 up->port.regshift = 2; serial_omap_probe()
1637 up->port.fifosize = 64; serial_omap_probe()
1638 up->port.ops = &serial_omap_pops; serial_omap_probe()
1650 up->port.line = ret; serial_omap_probe()
1652 if (up->port.line >= OMAP_MAX_HSUART_PORTS) { serial_omap_probe()
1653 dev_err(&pdev->dev, "uart ID %d > MAX %d.\n", up->port.line, serial_omap_probe()
1659 up->wakeirq = wakeirq; serial_omap_probe()
1660 if (!up->wakeirq) serial_omap_probe()
1661 dev_info(up->port.dev, "no wakeirq for uart%d\n", serial_omap_probe()
1662 up->port.line); serial_omap_probe()
1664 ret = serial_omap_probe_rs485(up, pdev->dev.of_node); serial_omap_probe()
1668 sprintf(up->name, "OMAP UART%d", up->port.line); serial_omap_probe()
1669 up->port.mapbase = mem->start; serial_omap_probe()
1670 up->port.membase = base; serial_omap_probe()
1671 up->port.flags = omap_up_info->flags; serial_omap_probe()
1672 up->port.uartclk = omap_up_info->uartclk; serial_omap_probe()
1673 up->port.rs485_config = serial_omap_config_rs485; serial_omap_probe()
1674 if (!up->port.uartclk) { serial_omap_probe()
1675 up->port.uartclk = DEFAULT_CLK_SPEED; serial_omap_probe()
1681 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; serial_omap_probe()
1682 up->calc_latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; serial_omap_probe()
1683 pm_qos_add_request(&up->pm_qos_request, serial_omap_probe()
1684 PM_QOS_CPU_DMA_LATENCY, up->latency); serial_omap_probe()
1685 INIT_WORK(&up->qos_work, serial_omap_uart_qos_work); serial_omap_probe()
1687 platform_set_drvdata(pdev, up); serial_omap_probe()
1691 device_init_wakeup(up->dev, true); serial_omap_probe()
1701 omap_serial_fill_features_erratas(up); serial_omap_probe()
1703 ui[up->port.line] = up; serial_omap_probe()
1704 serial_omap_add_console_port(up); serial_omap_probe()
1706 ret = uart_add_one_port(&serial_omap_reg, &up->port); serial_omap_probe()
1710 pm_runtime_mark_last_busy(up->dev); serial_omap_probe()
1711 pm_runtime_put_autosuspend(up->dev); serial_omap_probe()
1717 pm_qos_remove_request(&up->pm_qos_request); serial_omap_probe()
1718 device_init_wakeup(up->dev, false); serial_omap_probe()
1726 struct uart_omap_port *up = platform_get_drvdata(dev); serial_omap_remove() local
1728 pm_runtime_put_sync(up->dev); serial_omap_remove()
1729 pm_runtime_disable(up->dev); serial_omap_remove()
1730 uart_remove_one_port(&serial_omap_reg, &up->port); serial_omap_remove()
1731 pm_qos_remove_request(&up->pm_qos_request); serial_omap_remove()
1746 static void serial_omap_mdr1_errataset(struct uart_omap_port *up, u8 mdr1) serial_omap_mdr1_errataset() argument
1750 serial_out(up, UART_OMAP_MDR1, mdr1); serial_omap_mdr1_errataset()
1752 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | serial_omap_mdr1_errataset()
1758 while (UART_LSR_THRE != (serial_in(up, UART_LSR) & serial_omap_mdr1_errataset()
1763 dev_crit(up->dev, "Errata i202: timedout %x\n", serial_omap_mdr1_errataset()
1764 serial_in(up, UART_LSR)); serial_omap_mdr1_errataset()
1772 static void serial_omap_restore_context(struct uart_omap_port *up) serial_omap_restore_context() argument
1774 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) serial_omap_restore_context()
1775 serial_omap_mdr1_errataset(up, UART_OMAP_MDR1_DISABLE); serial_omap_restore_context()
1777 serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE); serial_omap_restore_context()
1779 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ serial_omap_restore_context()
1780 serial_out(up, UART_EFR, UART_EFR_ECB); serial_omap_restore_context()
1781 serial_out(up, UART_LCR, 0x0); /* Operational mode */ serial_omap_restore_context()
1782 serial_out(up, UART_IER, 0x0); serial_omap_restore_context()
1783 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ serial_omap_restore_context()
1784 serial_out(up, UART_DLL, up->dll); serial_omap_restore_context()
1785 serial_out(up, UART_DLM, up->dlh); serial_omap_restore_context()
1786 serial_out(up, UART_LCR, 0x0); /* Operational mode */ serial_omap_restore_context()
1787 serial_out(up, UART_IER, up->ier); serial_omap_restore_context()
1788 serial_out(up, UART_FCR, up->fcr); serial_omap_restore_context()
1789 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); serial_omap_restore_context()
1790 serial_out(up, UART_MCR, up->mcr); serial_omap_restore_context()
1791 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); /* Config B mode */ serial_omap_restore_context()
1792 serial_out(up, UART_OMAP_SCR, up->scr); serial_omap_restore_context()
1793 serial_out(up, UART_EFR, up->efr); serial_omap_restore_context()
1794 serial_out(up, UART_LCR, up->lcr); serial_omap_restore_context()
1795 if (up->errata & UART_ERRATA_i202_MDR1_ACCESS) serial_omap_restore_context()
1796 serial_omap_mdr1_errataset(up, up->mdr1); serial_omap_restore_context()
1798 serial_out(up, UART_OMAP_MDR1, up->mdr1); serial_omap_restore_context()
1799 serial_out(up, UART_OMAP_WER, up->wer); serial_omap_restore_context()
1804 struct uart_omap_port *up = dev_get_drvdata(dev); serial_omap_runtime_suspend() local
1806 if (!up) serial_omap_runtime_suspend()
1815 if (up->is_suspending && !console_suspend_enabled && serial_omap_runtime_suspend()
1816 uart_console(&up->port)) serial_omap_runtime_suspend()
1819 up->context_loss_cnt = serial_omap_get_context_loss_count(up); serial_omap_runtime_suspend()
1821 serial_omap_enable_wakeup(up, true); serial_omap_runtime_suspend()
1823 up->latency = PM_QOS_CPU_DMA_LAT_DEFAULT_VALUE; serial_omap_runtime_suspend()
1824 schedule_work(&up->qos_work); serial_omap_runtime_suspend()
1831 struct uart_omap_port *up = dev_get_drvdata(dev); serial_omap_runtime_resume() local
1833 int loss_cnt = serial_omap_get_context_loss_count(up); serial_omap_runtime_resume()
1835 serial_omap_enable_wakeup(up, false); serial_omap_runtime_resume()
1840 serial_omap_restore_context(up); serial_omap_runtime_resume()
1841 } else if (up->context_loss_cnt != loss_cnt) { serial_omap_runtime_resume()
1842 serial_omap_restore_context(up); serial_omap_runtime_resume()
1844 up->latency = up->calc_latency; serial_omap_runtime_resume()
1845 schedule_work(&up->qos_work); serial_omap_runtime_resume()
|
| H A D | nwpserial.c | 44 static void wait_for_bits(struct nwpserial_port *up, int bits) wait_for_bits() argument
48 /* Wait up to 10ms for the character(s) to be sent. */ wait_for_bits()
50 status = dcr_read(up->dcr_host, UART_LSR); wait_for_bits()
61 struct nwpserial_port *up; nwpserial_console_putchar() local
62 up = container_of(port, struct nwpserial_port, port); nwpserial_console_putchar()
64 wait_for_bits(up, UART_LSR_THRE); nwpserial_console_putchar()
65 dcr_write(up->dcr_host, UART_TX, c); nwpserial_console_putchar()
66 up->port.icount.tx++; nwpserial_console_putchar()
72 struct nwpserial_port *up = &nwpserial_ports[co->index]; nwpserial_console_write() local
77 locked = spin_trylock_irqsave(&up->port.lock, flags); nwpserial_console_write()
79 spin_lock_irqsave(&up->port.lock, flags); nwpserial_console_write()
82 up->ier = dcr_read(up->dcr_host, UART_IER); nwpserial_console_write()
83 dcr_write(up->dcr_host, UART_IER, up->ier & ~UART_IER_RDI); nwpserial_console_write()
85 uart_console_write(&up->port, s, count, nwpserial_console_putchar); nwpserial_console_write()
88 while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0) nwpserial_console_write()
92 dcr_write(up->dcr_host, UART_IER, up->ier); nwpserial_console_write()
95 spin_unlock_irqrestore(&up->port.lock, flags); nwpserial_console_write()
131 struct nwpserial_port *up = dev_id; nwpserial_interrupt() local
132 struct tty_port *port = &up->port.state->port; nwpserial_interrupt()
137 spin_lock(&up->port.lock); nwpserial_interrupt()
140 iir = dcr_read(up->dcr_host, UART_IIR); nwpserial_interrupt()
147 up->port.icount.rx++; nwpserial_interrupt()
148 ch = dcr_read(up->dcr_host, UART_RX); nwpserial_interrupt()
149 if (up->port.ignore_status_mask != NWPSERIAL_STATUS_RXVALID) nwpserial_interrupt()
151 } while (dcr_read(up->dcr_host, UART_LSR) & UART_LSR_DR); nwpserial_interrupt()
153 spin_unlock(&up->port.lock); nwpserial_interrupt()
155 spin_lock(&up->port.lock); nwpserial_interrupt()
160 dcr_write(up->dcr_host, UART_IIR, 1); nwpserial_interrupt()
162 spin_unlock(&up->port.lock); nwpserial_interrupt()
168 struct nwpserial_port *up; nwpserial_startup() local
171 up = container_of(port, struct nwpserial_port, port); nwpserial_startup()
174 up->mcr = dcr_read(up->dcr_host, UART_MCR) & ~UART_MCR_AFE; nwpserial_startup()
175 dcr_write(up->dcr_host, UART_MCR, up->mcr); nwpserial_startup()
178 err = request_irq(up->port.irq, nwpserial_interrupt, nwpserial_startup()
179 IRQF_SHARED, "nwpserial", up); nwpserial_startup()
184 up->ier = UART_IER_RDI; nwpserial_startup()
185 dcr_write(up->dcr_host, UART_IER, up->ier); nwpserial_startup()
188 up->port.ignore_status_mask &= ~NWPSERIAL_STATUS_RXVALID; nwpserial_startup()
195 struct nwpserial_port *up; nwpserial_shutdown() local
196 up = container_of(port, struct nwpserial_port, port); nwpserial_shutdown()
199 up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID; nwpserial_shutdown()
202 up->ier = 0; nwpserial_shutdown()
203 dcr_write(up->dcr_host, UART_IER, up->ier); nwpserial_shutdown()
206 free_irq(up->port.irq, up); nwpserial_shutdown()
223 struct nwpserial_port *up; nwpserial_set_termios() local
224 up = container_of(port, struct nwpserial_port, port); nwpserial_set_termios()
226 up->port.read_status_mask = NWPSERIAL_STATUS_RXVALID nwpserial_set_termios()
229 up->port.ignore_status_mask = 0; nwpserial_set_termios()
232 up->port.ignore_status_mask |= NWPSERIAL_STATUS_RXVALID; nwpserial_set_termios()
246 struct nwpserial_port *up; nwpserial_stop_rx() local
247 up = container_of(port, struct nwpserial_port, port); nwpserial_stop_rx()
249 up->port.ignore_status_mask = NWPSERIAL_STATUS_RXVALID; nwpserial_stop_rx()
252 static void nwpserial_putchar(struct nwpserial_port *up, unsigned char c) nwpserial_putchar() argument
255 wait_for_bits(up, UART_LSR_THRE); nwpserial_putchar()
256 dcr_write(up->dcr_host, UART_TX, c); nwpserial_putchar()
257 up->port.icount.tx++; nwpserial_putchar()
262 struct nwpserial_port *up; nwpserial_start_tx() local
264 up = container_of(port, struct nwpserial_port, port); nwpserial_start_tx()
265 xmit = &up->port.state->xmit; nwpserial_start_tx()
268 nwpserial_putchar(up, up->port.x_char); nwpserial_start_tx()
272 while (!(uart_circ_empty(xmit) || uart_tx_stopped(&up->port))) { nwpserial_start_tx()
273 nwpserial_putchar(up, xmit->buf[xmit->tail]); nwpserial_start_tx()
295 struct nwpserial_port *up; nwpserial_tx_empty() local
298 up = container_of(port, struct nwpserial_port, port); nwpserial_tx_empty()
300 spin_lock_irqsave(&up->port.lock, flags); nwpserial_tx_empty()
301 ret = dcr_read(up->dcr_host, UART_LSR); nwpserial_tx_empty()
302 spin_unlock_irqrestore(&up->port.lock, flags); nwpserial_tx_empty()
337 struct nwpserial_port *up = NULL; nwpserial_register_port() local
357 up = &nwpserial_ports[i]; nwpserial_register_port()
362 if (up == NULL) nwpserial_register_port()
366 up = &nwpserial_ports[i]; nwpserial_register_port()
370 if (up == NULL) { nwpserial_register_port()
379 up->port.membase = port->membase; nwpserial_register_port()
380 up->port.irq = port->irq; nwpserial_register_port()
381 up->port.uartclk = port->uartclk; nwpserial_register_port()
382 up->port.fifosize = port->fifosize; nwpserial_register_port()
383 up->port.regshift = port->regshift; nwpserial_register_port()
384 up->port.iotype = port->iotype; nwpserial_register_port()
385 up->port.flags = port->flags; nwpserial_register_port()
386 up->port.mapbase = port->mapbase; nwpserial_register_port()
387 up->port.private_data = port->private_data; nwpserial_register_port()
390 up->port.dev = port->dev; nwpserial_register_port()
392 if (up->port.iobase != dcr_base) { nwpserial_register_port()
393 up->port.ops = &nwpserial_pops; nwpserial_register_port()
394 up->port.fifosize = 16; nwpserial_register_port()
396 spin_lock_init(&up->port.lock); nwpserial_register_port()
398 up->port.iobase = dcr_base; nwpserial_register_port()
401 up->dcr_host = dcr_map(dn, dcr_base, dcr_len); nwpserial_register_port()
402 if (!DCR_MAP_OK(up->dcr_host)) { nwpserial_register_port()
408 ret = uart_add_one_port(&nwpserial_reg, &up->port); nwpserial_register_port()
410 ret = up->port.line; nwpserial_register_port()
421 struct nwpserial_port *up = &nwpserial_ports[line]; nwpserial_unregister_port() local
423 uart_remove_one_port(&nwpserial_reg, &up->port); nwpserial_unregister_port()
425 up->port.type = PORT_UNKNOWN; nwpserial_unregister_port()
434 struct nwpserial_port *up = NULL; nwpserial_console_init() local
444 up = &nwpserial_ports[i]; nwpserial_console_init()
448 if (up == NULL) nwpserial_console_init()
459 spin_lock_init(&up->port.lock); nwpserial_console_init()
460 up->port.ops = &nwpserial_pops; nwpserial_console_init()
461 up->port.type = PORT_NWPSERIAL; nwpserial_console_init()
462 up->port.fifosize = 16; nwpserial_console_init()
466 up->port.iobase = dcr_base; nwpserial_console_init()
468 up->dcr_host = dcr_map(dn, dcr_base, dcr_len); nwpserial_console_init()
469 if (!DCR_MAP_OK(up->dcr_host)) { nwpserial_console_init()
|
| H A D | ar933x_uart.c | 60 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, ar933x_uart_read() argument
63 return readl(up->port.membase + offset); ar933x_uart_read()
66 static inline void ar933x_uart_write(struct ar933x_uart_port *up, ar933x_uart_write() argument
69 writel(value, up->port.membase + offset); ar933x_uart_write()
72 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up, ar933x_uart_rmw() argument
79 t = ar933x_uart_read(up, offset); ar933x_uart_rmw()
82 ar933x_uart_write(up, offset, t); ar933x_uart_rmw()
85 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up, ar933x_uart_rmw_set() argument
89 ar933x_uart_rmw(up, offset, 0, val); ar933x_uart_rmw_set()
92 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up, ar933x_uart_rmw_clear() argument
96 ar933x_uart_rmw(up, offset, val, 0); ar933x_uart_rmw_clear()
99 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up) ar933x_uart_start_tx_interrupt() argument
101 up->ier |= AR933X_UART_INT_TX_EMPTY; ar933x_uart_start_tx_interrupt()
102 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); ar933x_uart_start_tx_interrupt()
105 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up) ar933x_uart_stop_tx_interrupt() argument
107 up->ier &= ~AR933X_UART_INT_TX_EMPTY; ar933x_uart_stop_tx_interrupt()
108 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); ar933x_uart_stop_tx_interrupt()
111 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) ar933x_uart_putc() argument
117 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata); ar933x_uart_putc()
122 struct ar933x_uart_port *up = ar933x_uart_tx_empty() local
127 spin_lock_irqsave(&up->port.lock, flags); ar933x_uart_tx_empty()
128 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); ar933x_uart_tx_empty()
129 spin_unlock_irqrestore(&up->port.lock, flags); ar933x_uart_tx_empty()
145 struct ar933x_uart_port *up = ar933x_uart_start_tx() local
148 ar933x_uart_start_tx_interrupt(up); ar933x_uart_start_tx()
153 struct ar933x_uart_port *up = ar933x_uart_stop_tx() local
156 ar933x_uart_stop_tx_interrupt(up); ar933x_uart_stop_tx()
161 struct ar933x_uart_port *up = ar933x_uart_stop_rx() local
164 up->ier &= ~AR933X_UART_INT_RX_VALID; ar933x_uart_stop_rx()
165 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); ar933x_uart_stop_rx()
170 struct ar933x_uart_port *up = ar933x_uart_break_ctl() local
174 spin_lock_irqsave(&up->port.lock, flags); ar933x_uart_break_ctl()
176 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, ar933x_uart_break_ctl()
179 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, ar933x_uart_break_ctl()
181 spin_unlock_irqrestore(&up->port.lock, flags); ar933x_uart_break_ctl()
239 struct ar933x_uart_port *up = ar933x_uart_set_termios() local
265 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud); ar933x_uart_set_termios()
272 spin_lock_irqsave(&up->port.lock, flags); ar933x_uart_set_termios()
275 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, ar933x_uart_set_termios()
281 up->port.ignore_status_mask = 0; ar933x_uart_set_termios()
285 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD; ar933x_uart_set_termios()
287 ar933x_uart_write(up, AR933X_UART_CLOCK_REG, ar933x_uart_set_termios()
291 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs); ar933x_uart_set_termios()
294 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, ar933x_uart_set_termios()
298 ar933x_uart_rmw(up, AR933X_UART_CS_REG, ar933x_uart_set_termios()
302 spin_unlock_irqrestore(&up->port.lock, flags); ar933x_uart_set_termios()
308 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up) ar933x_uart_rx_chars() argument
310 struct tty_port *port = &up->port.state->port; ar933x_uart_rx_chars()
317 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); ar933x_uart_rx_chars()
322 ar933x_uart_write(up, AR933X_UART_DATA_REG, ar933x_uart_rx_chars()
325 up->port.icount.rx++; ar933x_uart_rx_chars()
328 if (uart_handle_sysrq_char(&up->port, ch)) ar933x_uart_rx_chars()
331 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0) ar933x_uart_rx_chars()
335 spin_unlock(&up->port.lock); ar933x_uart_rx_chars()
337 spin_lock(&up->port.lock); ar933x_uart_rx_chars()
340 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) ar933x_uart_tx_chars() argument
342 struct circ_buf *xmit = &up->port.state->xmit; ar933x_uart_tx_chars()
345 if (uart_tx_stopped(&up->port)) ar933x_uart_tx_chars()
348 count = up->port.fifosize; ar933x_uart_tx_chars()
352 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG); ar933x_uart_tx_chars()
356 if (up->port.x_char) { ar933x_uart_tx_chars()
357 ar933x_uart_putc(up, up->port.x_char); ar933x_uart_tx_chars()
358 up->port.icount.tx++; ar933x_uart_tx_chars()
359 up->port.x_char = 0; ar933x_uart_tx_chars()
366 ar933x_uart_putc(up, xmit->buf[xmit->tail]); ar933x_uart_tx_chars()
369 up->port.icount.tx++; ar933x_uart_tx_chars()
373 uart_write_wakeup(&up->port); ar933x_uart_tx_chars()
376 ar933x_uart_start_tx_interrupt(up); ar933x_uart_tx_chars()
381 struct ar933x_uart_port *up = dev_id; ar933x_uart_interrupt() local
384 status = ar933x_uart_read(up, AR933X_UART_CS_REG); ar933x_uart_interrupt()
388 spin_lock(&up->port.lock); ar933x_uart_interrupt()
390 status = ar933x_uart_read(up, AR933X_UART_INT_REG); ar933x_uart_interrupt()
391 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG); ar933x_uart_interrupt()
394 ar933x_uart_write(up, AR933X_UART_INT_REG, ar933x_uart_interrupt()
396 ar933x_uart_rx_chars(up); ar933x_uart_interrupt()
400 ar933x_uart_write(up, AR933X_UART_INT_REG, ar933x_uart_interrupt()
402 ar933x_uart_stop_tx_interrupt(up); ar933x_uart_interrupt()
403 ar933x_uart_tx_chars(up); ar933x_uart_interrupt()
406 spin_unlock(&up->port.lock); ar933x_uart_interrupt()
413 struct ar933x_uart_port *up = ar933x_uart_startup() local
418 ret = request_irq(up->port.irq, ar933x_uart_interrupt, ar933x_uart_startup()
419 up->port.irqflags, dev_name(up->port.dev), up); ar933x_uart_startup()
423 spin_lock_irqsave(&up->port.lock, flags); ar933x_uart_startup()
426 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, ar933x_uart_startup()
430 up->ier = AR933X_UART_INT_RX_VALID; ar933x_uart_startup()
431 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); ar933x_uart_startup()
433 spin_unlock_irqrestore(&up->port.lock, flags); ar933x_uart_startup()
440 struct ar933x_uart_port *up = ar933x_uart_shutdown() local
444 up->ier = 0; ar933x_uart_shutdown()
445 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); ar933x_uart_shutdown()
448 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG, ar933x_uart_shutdown()
451 free_irq(up->port.irq, up); ar933x_uart_shutdown()
479 struct ar933x_uart_port *up = ar933x_uart_verify_port() local
489 if (ser->baud_base < up->min_baud || ar933x_uart_verify_port()
490 ser->baud_base > up->max_baud) ar933x_uart_verify_port()
517 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up) ar933x_uart_wait_xmitr() argument
522 /* Wait up to 60ms for the character(s) to be sent. */ ar933x_uart_wait_xmitr()
524 status = ar933x_uart_read(up, AR933X_UART_DATA_REG); ar933x_uart_wait_xmitr()
533 struct ar933x_uart_port *up = ar933x_uart_console_putchar() local
536 ar933x_uart_wait_xmitr(up); ar933x_uart_console_putchar()
537 ar933x_uart_putc(up, ch); ar933x_uart_console_putchar()
543 struct ar933x_uart_port *up = ar933x_console_ports[co->index]; ar933x_uart_console_write() local
550 if (up->port.sysrq) ar933x_uart_console_write()
553 locked = spin_trylock(&up->port.lock); ar933x_uart_console_write()
555 spin_lock(&up->port.lock); ar933x_uart_console_write()
560 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG); ar933x_uart_console_write()
561 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0); ar933x_uart_console_write()
563 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar); ar933x_uart_console_write()
569 ar933x_uart_wait_xmitr(up); ar933x_uart_console_write()
570 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en); ar933x_uart_console_write()
572 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS); ar933x_uart_console_write()
575 spin_unlock(&up->port.lock); ar933x_uart_console_write()
582 struct ar933x_uart_port *up; ar933x_uart_console_setup() local
591 up = ar933x_console_ports[co->index]; ar933x_uart_console_setup()
592 if (!up) ar933x_uart_console_setup()
598 return uart_set_options(&up->port, co, baud, parity, bits, flow); ar933x_uart_console_setup()
611 static void ar933x_uart_add_console_port(struct ar933x_uart_port *up) ar933x_uart_add_console_port() argument
616 ar933x_console_ports[up->port.line] = up; ar933x_uart_add_console_port()
629 struct ar933x_uart_port *up; ar933x_uart_probe() local
661 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port), ar933x_uart_probe()
663 if (!up) ar933x_uart_probe()
666 up->clk = devm_clk_get(&pdev->dev, "uart"); ar933x_uart_probe()
667 if (IS_ERR(up->clk)) { ar933x_uart_probe()
669 return PTR_ERR(up->clk); ar933x_uart_probe()
672 port = &up->port; ar933x_uart_probe()
679 ret = clk_prepare_enable(up->clk); ar933x_uart_probe()
683 port->uartclk = clk_get_rate(up->clk); ar933x_uart_probe()
701 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); ar933x_uart_probe()
704 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); ar933x_uart_probe()
706 ar933x_uart_add_console_port(up); ar933x_uart_probe()
708 ret = uart_add_one_port(&ar933x_uart_driver, &up->port); ar933x_uart_probe()
712 platform_set_drvdata(pdev, up); ar933x_uart_probe()
716 clk_disable_unprepare(up->clk); ar933x_uart_probe()
722 struct ar933x_uart_port *up; ar933x_uart_remove() local
724 up = platform_get_drvdata(pdev); ar933x_uart_remove()
726 if (up) { ar933x_uart_remove()
727 uart_remove_one_port(&ar933x_uart_driver, &up->port); ar933x_uart_remove()
728 clk_disable_unprepare(up->clk); ar933x_uart_remove()
|
| H A D | sunsu.c | 107 static unsigned int serial_in(struct uart_sunsu_port *up, int offset) serial_in() argument
109 offset <<= up->port.regshift; serial_in()
111 switch (up->port.iotype) { serial_in()
113 outb(up->port.hub6 - 1 + offset, up->port.iobase); serial_in()
114 return inb(up->port.iobase + 1); serial_in()
117 return readb(up->port.membase + offset); serial_in()
120 return inb(up->port.iobase + offset); serial_in()
124 static void serial_out(struct uart_sunsu_port *up, int offset, int value) serial_out() argument
138 offset <<= up->port.regshift; serial_out()
140 switch (up->port.iotype) { serial_out()
142 outb(up->port.hub6 - 1 + offset, up->port.iobase); serial_out()
143 outb(value, up->port.iobase + 1); serial_out()
147 writeb(value, up->port.membase + offset); serial_out()
151 outb(value, up->port.iobase + offset); serial_out()
161 #define serial_inp(up, offset) serial_in(up, offset)
162 #define serial_outp(up, offset, value) serial_out(up, offset, value)
168 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value) serial_icr_write() argument
170 serial_out(up, UART_SCR, offset); serial_icr_write()
171 serial_out(up, UART_ICR, value); serial_icr_write()
175 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
179 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
180 serial_out(up, UART_SCR, offset);
181 value = serial_in(up, UART_ICR);
182 serial_icr_write(up, UART_ACR, up->acr);
193 static int __enable_rsa(struct uart_sunsu_port *up) __enable_rsa() argument
198 mode = serial_inp(up, UART_RSA_MSR); __enable_rsa()
202 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO); __enable_rsa()
203 mode = serial_inp(up, UART_RSA_MSR); __enable_rsa()
208 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16; __enable_rsa()
213 static void enable_rsa(struct uart_sunsu_port *up) enable_rsa() argument
215 if (up->port.type == PORT_RSA) { enable_rsa()
216 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) { enable_rsa()
217 spin_lock_irq(&up->port.lock); enable_rsa()
218 __enable_rsa(up); enable_rsa()
219 spin_unlock_irq(&up->port.lock); enable_rsa()
221 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) enable_rsa()
222 serial_outp(up, UART_RSA_FRR, 0); enable_rsa()
232 static void disable_rsa(struct uart_sunsu_port *up) disable_rsa() argument
237 if (up->port.type == PORT_RSA && disable_rsa()
238 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { disable_rsa()
239 spin_lock_irq(&up->port.lock); disable_rsa()
241 mode = serial_inp(up, UART_RSA_MSR); disable_rsa()
245 serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO); disable_rsa()
246 mode = serial_inp(up, UART_RSA_MSR); disable_rsa()
251 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16; disable_rsa()
252 spin_unlock_irq(&up->port.lock); disable_rsa()
267 struct uart_sunsu_port *up = sunsu_stop_tx() local
270 __stop_tx(up); sunsu_stop_tx()
275 if (up->port.type == PORT_16C950) { sunsu_stop_tx()
276 up->acr |= UART_ACR_TXDIS; sunsu_stop_tx()
277 serial_icr_write(up, UART_ACR, up->acr); sunsu_stop_tx()
283 struct uart_sunsu_port *up = sunsu_start_tx() local
286 if (!(up->ier & UART_IER_THRI)) { sunsu_start_tx()
287 up->ier |= UART_IER_THRI; sunsu_start_tx()
288 serial_out(up, UART_IER, up->ier); sunsu_start_tx()
294 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { sunsu_start_tx()
295 up->acr &= ~UART_ACR_TXDIS; sunsu_start_tx()
296 serial_icr_write(up, UART_ACR, up->acr); sunsu_start_tx()
302 struct uart_sunsu_port *up = sunsu_stop_rx() local
305 up->ier &= ~UART_IER_RLSI; sunsu_stop_rx()
306 up->port.read_status_mask &= ~UART_LSR_DR; sunsu_stop_rx()
307 serial_out(up, UART_IER, up->ier); sunsu_stop_rx()
312 struct uart_sunsu_port *up = sunsu_enable_ms() local
316 spin_lock_irqsave(&up->port.lock, flags); sunsu_enable_ms()
317 up->ier |= UART_IER_MSI; sunsu_enable_ms()
318 serial_out(up, UART_IER, up->ier); sunsu_enable_ms()
319 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_enable_ms()
323 receive_chars(struct uart_sunsu_port *up, unsigned char *status) receive_chars() argument
325 struct tty_port *port = &up->port.state->port; receive_chars()
331 ch = serial_inp(up, UART_RX); receive_chars()
333 up->port.icount.rx++; receive_chars()
342 up->port.icount.brk++; receive_chars()
343 if (up->port.cons != NULL && receive_chars()
344 up->port.line == up->port.cons->index) receive_chars()
352 if (uart_handle_break(&up->port)) receive_chars()
355 up->port.icount.parity++; receive_chars()
357 up->port.icount.frame++; receive_chars()
359 up->port.icount.overrun++; receive_chars()
364 *status &= up->port.read_status_mask; receive_chars()
366 if (up->port.cons != NULL && receive_chars()
367 up->port.line == up->port.cons->index) { receive_chars()
369 *status |= up->lsr_break_flag; receive_chars()
370 up->lsr_break_flag = 0; receive_chars()
380 if (uart_handle_sysrq_char(&up->port, ch)) receive_chars()
382 if ((*status & up->port.ignore_status_mask) == 0) receive_chars()
392 *status = serial_inp(up, UART_LSR); receive_chars()
399 static void transmit_chars(struct uart_sunsu_port *up) transmit_chars() argument
401 struct circ_buf *xmit = &up->port.state->xmit; transmit_chars()
404 if (up->port.x_char) { transmit_chars()
405 serial_outp(up, UART_TX, up->port.x_char); transmit_chars()
406 up->port.icount.tx++; transmit_chars()
407 up->port.x_char = 0; transmit_chars()
410 if (uart_tx_stopped(&up->port)) { transmit_chars()
411 sunsu_stop_tx(&up->port); transmit_chars()
415 __stop_tx(up); transmit_chars()
419 count = up->port.fifosize; transmit_chars()
421 serial_out(up, UART_TX, xmit->buf[xmit->tail]); transmit_chars()
423 up->port.icount.tx++; transmit_chars()
429 uart_write_wakeup(&up->port); transmit_chars()
432 __stop_tx(up); transmit_chars()
435 static void check_modem_status(struct uart_sunsu_port *up) check_modem_status() argument
439 status = serial_in(up, UART_MSR); check_modem_status()
445 up->port.icount.rng++; check_modem_status()
447 up->port.icount.dsr++; check_modem_status()
449 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); check_modem_status()
451 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); check_modem_status()
453 wake_up_interruptible(&up->port.state->port.delta_msr_wait); check_modem_status()
458 struct uart_sunsu_port *up = dev_id; sunsu_serial_interrupt() local
462 spin_lock_irqsave(&up->port.lock, flags); sunsu_serial_interrupt()
465 status = serial_inp(up, UART_LSR); sunsu_serial_interrupt()
467 receive_chars(up, &status); sunsu_serial_interrupt()
468 check_modem_status(up); sunsu_serial_interrupt()
470 transmit_chars(up); sunsu_serial_interrupt()
472 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_serial_interrupt()
474 tty_flip_buffer_push(&up->port.state->port); sunsu_serial_interrupt()
476 spin_lock_irqsave(&up->port.lock, flags); sunsu_serial_interrupt()
478 } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)); sunsu_serial_interrupt()
480 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_serial_interrupt()
491 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up) sunsu_change_mouse_baud() argument
493 unsigned int cur_cflag = up->cflag; sunsu_change_mouse_baud()
496 up->cflag &= ~CBAUD; sunsu_change_mouse_baud()
497 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud); sunsu_change_mouse_baud()
499 quot = up->port.uartclk / (16 * new_baud); sunsu_change_mouse_baud()
501 sunsu_change_speed(&up->port, up->cflag, 0, quot); sunsu_change_mouse_baud()
504 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break) receive_kbd_ms_chars() argument
507 unsigned char ch = serial_inp(up, UART_RX); receive_kbd_ms_chars()
510 if (up->su_type == SU_PORT_KBD) { receive_kbd_ms_chars()
512 serio_interrupt(&up->serio, ch, 0); receive_kbd_ms_chars()
514 } else if (up->su_type == SU_PORT_MS) { receive_kbd_ms_chars()
519 sunsu_change_mouse_baud(up); receive_kbd_ms_chars()
526 serio_interrupt(&up->serio, ch, 0); receive_kbd_ms_chars()
531 } while (serial_in(up, UART_LSR) & UART_LSR_DR); receive_kbd_ms_chars()
536 struct uart_sunsu_port *up = dev_id; sunsu_kbd_ms_interrupt() local
538 if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) { sunsu_kbd_ms_interrupt()
539 unsigned char status = serial_inp(up, UART_LSR); sunsu_kbd_ms_interrupt()
542 receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0); sunsu_kbd_ms_interrupt()
550 struct uart_sunsu_port *up = sunsu_tx_empty() local
555 spin_lock_irqsave(&up->port.lock, flags); sunsu_tx_empty()
556 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; sunsu_tx_empty()
557 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_tx_empty()
564 struct uart_sunsu_port *up = sunsu_get_mctrl() local
569 status = serial_in(up, UART_MSR); sunsu_get_mctrl()
585 struct uart_sunsu_port *up = sunsu_set_mctrl() local
600 serial_out(up, UART_MCR, mcr); sunsu_set_mctrl()
605 struct uart_sunsu_port *up = sunsu_break_ctl() local
609 spin_lock_irqsave(&up->port.lock, flags); sunsu_break_ctl()
611 up->lcr |= UART_LCR_SBC; sunsu_break_ctl()
613 up->lcr &= ~UART_LCR_SBC; sunsu_break_ctl()
614 serial_out(up, UART_LCR, up->lcr); sunsu_break_ctl()
615 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_break_ctl()
620 struct uart_sunsu_port *up = sunsu_startup() local
625 if (up->port.type == PORT_16C950) { sunsu_startup()
626 /* Wake up and initialize UART */ sunsu_startup()
627 up->acr = 0; sunsu_startup()
628 serial_outp(up, UART_LCR, 0xBF); sunsu_startup()
629 serial_outp(up, UART_EFR, UART_EFR_ECB); sunsu_startup()
630 serial_outp(up, UART_IER, 0); sunsu_startup()
631 serial_outp(up, UART_LCR, 0); sunsu_startup()
632 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */ sunsu_startup()
633 serial_outp(up, UART_LCR, 0xBF); sunsu_startup()
634 serial_outp(up, UART_EFR, UART_EFR_ECB); sunsu_startup()
635 serial_outp(up, UART_LCR, 0); sunsu_startup()
640 * If this is an RSA port, see if we can kick it up to the sunsu_startup()
643 enable_rsa(up); sunsu_startup()
650 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) { sunsu_startup()
651 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_startup()
652 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | sunsu_startup()
654 serial_outp(up, UART_FCR, 0); sunsu_startup()
660 (void) serial_inp(up, UART_LSR); sunsu_startup()
661 (void) serial_inp(up, UART_RX); sunsu_startup()
662 (void) serial_inp(up, UART_IIR); sunsu_startup()
663 (void) serial_inp(up, UART_MSR); sunsu_startup()
670 if (!(up->port.flags & UPF_BUGGY_UART) && sunsu_startup()
671 (serial_inp(up, UART_LSR) == 0xff)) { sunsu_startup()
672 printk("ttyS%d: LSR safety check engaged!\n", up->port.line); sunsu_startup()
676 if (up->su_type != SU_PORT_PORT) { sunsu_startup()
677 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt, sunsu_startup()
678 IRQF_SHARED, su_typev[up->su_type], up); sunsu_startup()
680 retval = request_irq(up->port.irq, sunsu_serial_interrupt, sunsu_startup()
681 IRQF_SHARED, su_typev[up->su_type], up); sunsu_startup()
684 printk("su: Cannot register IRQ %d\n", up->port.irq); sunsu_startup()
691 serial_outp(up, UART_LCR, UART_LCR_WLEN8); sunsu_startup()
693 spin_lock_irqsave(&up->port.lock, flags); sunsu_startup()
695 up->port.mctrl |= TIOCM_OUT2; sunsu_startup()
697 sunsu_set_mctrl(&up->port, up->port.mctrl); sunsu_startup()
698 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_startup()
705 up->ier = UART_IER_RLSI | UART_IER_RDI; sunsu_startup()
706 serial_outp(up, UART_IER, up->ier); sunsu_startup()
708 if (up->port.flags & UPF_FOURPORT) { sunsu_startup()
713 icp = (up->port.iobase & 0xfe0) | 0x01f; sunsu_startup()
721 (void) serial_inp(up, UART_LSR); sunsu_startup()
722 (void) serial_inp(up, UART_RX); sunsu_startup()
723 (void) serial_inp(up, UART_IIR); sunsu_startup()
724 (void) serial_inp(up, UART_MSR); sunsu_startup()
731 struct uart_sunsu_port *up = sunsu_shutdown() local
738 up->ier = 0; sunsu_shutdown()
739 serial_outp(up, UART_IER, 0); sunsu_shutdown()
741 spin_lock_irqsave(&up->port.lock, flags); sunsu_shutdown()
742 if (up->port.flags & UPF_FOURPORT) { sunsu_shutdown()
744 inb((up->port.iobase & 0xfe0) | 0x1f); sunsu_shutdown()
745 up->port.mctrl |= TIOCM_OUT1; sunsu_shutdown()
747 up->port.mctrl &= ~TIOCM_OUT2; sunsu_shutdown()
749 sunsu_set_mctrl(&up->port, up->port.mctrl); sunsu_shutdown()
750 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_shutdown()
755 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC); sunsu_shutdown()
756 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | sunsu_shutdown()
759 serial_outp(up, UART_FCR, 0); sunsu_shutdown()
765 disable_rsa(up); sunsu_shutdown()
771 (void) serial_in(up, UART_RX); sunsu_shutdown()
773 free_irq(up->port.irq, up); sunsu_shutdown()
780 struct uart_sunsu_port *up = sunsu_change_speed() local
817 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 && sunsu_change_speed()
818 up->rev == 0x5201) sunsu_change_speed()
821 if (uart_config[up->port.type].flags & UART_USE_FIFO) { sunsu_change_speed()
822 if ((up->port.uartclk / quot) < (2400 * 16)) sunsu_change_speed()
825 else if (up->port.type == PORT_RSA) sunsu_change_speed()
831 if (up->port.type == PORT_16750) sunsu_change_speed()
838 spin_lock_irqsave(&up->port.lock, flags); sunsu_change_speed()
845 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; sunsu_change_speed()
847 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; sunsu_change_speed()
849 up->port.read_status_mask |= UART_LSR_BI; sunsu_change_speed()
854 up->port.ignore_status_mask = 0; sunsu_change_speed()
856 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; sunsu_change_speed()
858 up->port.ignore_status_mask |= UART_LSR_BI; sunsu_change_speed()
864 up->port.ignore_status_mask |= UART_LSR_OE; sunsu_change_speed()
871 up->port.ignore_status_mask |= UART_LSR_DR; sunsu_change_speed()
876 up->ier &= ~UART_IER_MSI; sunsu_change_speed()
877 if (UART_ENABLE_MS(&up->port, cflag)) sunsu_change_speed()
878 up->ier |= UART_IER_MSI; sunsu_change_speed()
880 serial_out(up, UART_IER, up->ier); sunsu_change_speed()
882 if (uart_config[up->port.type].flags & UART_STARTECH) { sunsu_change_speed()
883 serial_outp(up, UART_LCR, 0xBF); sunsu_change_speed()
884 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0); sunsu_change_speed()
886 serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ sunsu_change_speed()
887 serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */ sunsu_change_speed()
888 serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */ sunsu_change_speed()
889 if (up->port.type == PORT_16750) sunsu_change_speed()
890 serial_outp(up, UART_FCR, fcr); /* set fcr */ sunsu_change_speed()
891 serial_outp(up, UART_LCR, cval); /* reset DLAB */ sunsu_change_speed()
892 up->lcr = cval; /* Save LCR */ sunsu_change_speed()
893 if (up->port.type != PORT_16750) { sunsu_change_speed()
896 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_change_speed()
898 serial_outp(up, UART_FCR, fcr); /* set fcr */ sunsu_change_speed()
901 up->cflag = cflag; sunsu_change_speed()
903 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_change_speed()
932 struct uart_sunsu_port *up = sunsu_config_port() local
941 port->type = up->type_probed; /* XXX */ sunsu_config_port()
991 struct uart_sunsu_port *up = serio->port_data; sunsu_serio_write() local
998 lsr = serial_in(up, UART_LSR); sunsu_serio_write()
1002 serial_out(up, UART_TX, ch); sunsu_serio_write()
1011 struct uart_sunsu_port *up = serio->port_data; sunsu_serio_open() local
1016 if (!up->serio_open) { sunsu_serio_open()
1017 up->serio_open = 1; sunsu_serio_open()
1028 struct uart_sunsu_port *up = serio->port_data; sunsu_serio_close() local
1032 up->serio_open = 0; sunsu_serio_close()
1038 static void sunsu_autoconfig(struct uart_sunsu_port *up) sunsu_autoconfig() argument
1044 if (up->su_type == SU_PORT_NONE) sunsu_autoconfig()
1047 up->type_probed = PORT_UNKNOWN; sunsu_autoconfig()
1048 up->port.iotype = UPIO_MEM; sunsu_autoconfig()
1050 spin_lock_irqsave(&up->port.lock, flags); sunsu_autoconfig()
1052 if (!(up->port.flags & UPF_BUGGY_UART)) { sunsu_autoconfig()
1062 scratch = serial_inp(up, UART_IER); sunsu_autoconfig()
1063 serial_outp(up, UART_IER, 0); sunsu_autoconfig()
1067 scratch2 = serial_inp(up, UART_IER); sunsu_autoconfig()
1068 serial_outp(up, UART_IER, 0x0f); sunsu_autoconfig()
1072 scratch3 = serial_inp(up, UART_IER); sunsu_autoconfig()
1073 serial_outp(up, UART_IER, scratch); sunsu_autoconfig()
1078 save_mcr = serial_in(up, UART_MCR); sunsu_autoconfig()
1079 save_lcr = serial_in(up, UART_LCR); sunsu_autoconfig()
1090 if (!(up->port.flags & UPF_SKIP_TEST)) { sunsu_autoconfig()
1091 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A); sunsu_autoconfig()
1092 status1 = serial_inp(up, UART_MSR) & 0xF0; sunsu_autoconfig()
1093 serial_outp(up, UART_MCR, save_mcr); sunsu_autoconfig()
1097 serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */ sunsu_autoconfig()
1098 serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */ sunsu_autoconfig()
1099 serial_outp(up, UART_LCR, 0); sunsu_autoconfig()
1100 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_autoconfig()
1101 scratch = serial_in(up, UART_IIR) >> 6; sunsu_autoconfig()
1104 up->port.type = PORT_16450; sunsu_autoconfig()
1107 up->port.type = PORT_UNKNOWN; sunsu_autoconfig()
1110 up->port.type = PORT_16550; sunsu_autoconfig()
1113 up->port.type = PORT_16550A; sunsu_autoconfig()
1116 if (up->port.type == PORT_16550A) { sunsu_autoconfig()
1118 serial_outp(up, UART_LCR, UART_LCR_DLAB); sunsu_autoconfig()
1119 if (serial_in(up, UART_EFR) == 0) { sunsu_autoconfig()
1120 up->port.type = PORT_16650; sunsu_autoconfig()
1122 serial_outp(up, UART_LCR, 0xBF); sunsu_autoconfig()
1123 if (serial_in(up, UART_EFR) == 0) sunsu_autoconfig()
1124 up->port.type = PORT_16650V2; sunsu_autoconfig()
1127 if (up->port.type == PORT_16550A) { sunsu_autoconfig()
1129 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB); sunsu_autoconfig()
1130 serial_outp(up, UART_FCR, sunsu_autoconfig()
1132 scratch = serial_in(up, UART_IIR) >> 5; sunsu_autoconfig()
1140 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_autoconfig()
1141 serial_outp(up, UART_LCR, 0); sunsu_autoconfig()
1142 serial_outp(up, UART_FCR, sunsu_autoconfig()
1144 scratch = serial_in(up, UART_IIR) >> 5; sunsu_autoconfig()
1146 up->port.type = PORT_16750; sunsu_autoconfig()
1148 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO); sunsu_autoconfig()
1150 serial_outp(up, UART_LCR, save_lcr); sunsu_autoconfig()
1151 if (up->port.type == PORT_16450) { sunsu_autoconfig()
1152 scratch = serial_in(up, UART_SCR); sunsu_autoconfig()
1153 serial_outp(up, UART_SCR, 0xa5); sunsu_autoconfig()
1154 status1 = serial_in(up, UART_SCR); sunsu_autoconfig()
1155 serial_outp(up, UART_SCR, 0x5a); sunsu_autoconfig()
1156 status2 = serial_in(up, UART_SCR); sunsu_autoconfig()
1157 serial_outp(up, UART_SCR, scratch); sunsu_autoconfig()
1160 up->port.type = PORT_8250; sunsu_autoconfig()
1163 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size; sunsu_autoconfig()
1165 if (up->port.type == PORT_UNKNOWN) sunsu_autoconfig()
1167 up->type_probed = up->port.type; /* XXX */ sunsu_autoconfig()
1173 if (up->port.type == PORT_RSA) sunsu_autoconfig()
1174 serial_outp(up, UART_RSA_FRR, 0); sunsu_autoconfig()
1176 serial_outp(up, UART_MCR, save_mcr); sunsu_autoconfig()
1177 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO | sunsu_autoconfig()
1180 serial_outp(up, UART_FCR, 0); sunsu_autoconfig()
1181 (void)serial_in(up, UART_RX); sunsu_autoconfig()
1182 serial_outp(up, UART_IER, 0); sunsu_autoconfig()
1185 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_autoconfig()
1195 static int sunsu_kbd_ms_init(struct uart_sunsu_port *up) sunsu_kbd_ms_init() argument
1202 if (up->su_type == SU_PORT_KBD) { sunsu_kbd_ms_init()
1203 up->cflag = B1200 | CS8 | CLOCAL | CREAD; sunsu_kbd_ms_init()
1206 up->cflag = B4800 | CS8 | CLOCAL | CREAD; sunsu_kbd_ms_init()
1209 quot = up->port.uartclk / (16 * baud); sunsu_kbd_ms_init()
1211 sunsu_autoconfig(up); sunsu_kbd_ms_init()
1212 if (up->port.type == PORT_UNKNOWN) sunsu_kbd_ms_init()
1216 up->port.dev->of_node->full_name, sunsu_kbd_ms_init()
1217 (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse", sunsu_kbd_ms_init()
1218 (unsigned long long) up->port.mapbase, sunsu_kbd_ms_init()
1219 up->port.irq); sunsu_kbd_ms_init()
1222 serio = &up->serio; sunsu_kbd_ms_init()
1223 serio->port_data = up; sunsu_kbd_ms_init()
1226 if (up->su_type == SU_PORT_KBD) { sunsu_kbd_ms_init()
1235 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"), sunsu_kbd_ms_init()
1241 serio->dev.parent = up->port.dev; sunsu_kbd_ms_init()
1246 sunsu_change_speed(&up->port, up->cflag, 0, quot); sunsu_kbd_ms_init()
1248 sunsu_startup(&up->port); sunsu_kbd_ms_init()
1265 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up) wait_for_xmitr() argument
1269 /* Wait up to 10ms for the character(s) to be sent. */ wait_for_xmitr()
1271 status = serial_in(up, UART_LSR); wait_for_xmitr()
1274 up->lsr_break_flag = UART_LSR_BI; wait_for_xmitr()
1281 /* Wait up to 1s for flow control if necessary */ wait_for_xmitr()
1282 if (up->port.flags & UPF_CONS_FLOW) { wait_for_xmitr()
1285 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) wait_for_xmitr()
1292 struct uart_sunsu_port *up = sunsu_console_putchar() local
1295 wait_for_xmitr(up); sunsu_console_putchar()
1296 serial_out(up, UART_TX, ch); sunsu_console_putchar()
1306 struct uart_sunsu_port *up = &sunsu_ports[co->index]; sunsu_console_write() local
1311 if (up->port.sysrq || oops_in_progress) sunsu_console_write()
1312 locked = spin_trylock_irqsave(&up->port.lock, flags); sunsu_console_write()
1314 spin_lock_irqsave(&up->port.lock, flags); sunsu_console_write()
1319 ier = serial_in(up, UART_IER); sunsu_console_write()
1320 serial_out(up, UART_IER, 0); sunsu_console_write()
1322 uart_console_write(&up->port, s, count, sunsu_console_putchar); sunsu_console_write()
1328 wait_for_xmitr(up); sunsu_console_write()
1329 serial_out(up, UART_IER, ier); sunsu_console_write()
1332 spin_unlock_irqrestore(&up->port.lock, flags); sunsu_console_write()
1417 struct uart_sunsu_port *up; su_probe() local
1427 up = &sunsu_ports[nr_inst]; su_probe()
1429 up = kzalloc(sizeof(*up), GFP_KERNEL); su_probe()
1430 if (!up) su_probe()
1434 up->port.line = nr_inst; su_probe()
1436 spin_lock_init(&up->port.lock); su_probe()
1438 up->su_type = type; su_probe()
1441 up->port.mapbase = rp->start; su_probe()
1442 up->reg_size = resource_size(rp); su_probe()
1443 up->port.membase = of_ioremap(rp, 0, up->reg_size, "su"); su_probe()
1444 if (!up->port.membase) { su_probe()
1446 kfree(up); su_probe()
1450 up->port.irq = op->archdata.irqs[0]; su_probe()
1452 up->port.dev = &op->dev; su_probe()
1454 up->port.type = PORT_UNKNOWN; su_probe()
1455 up->port.uartclk = (SU_BASE_BAUD * 16); su_probe()
1458 if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) { su_probe()
1459 err = sunsu_kbd_ms_init(up); su_probe()
1462 up->port.membase, up->reg_size); su_probe()
1463 kfree(up); su_probe()
1466 platform_set_drvdata(op, up); su_probe()
1473 up->port.flags |= UPF_BOOT_AUTOCONF; su_probe()
1475 sunsu_autoconfig(up); su_probe()
1478 if (up->port.type == PORT_UNKNOWN) su_probe()
1481 up->port.ops = &sunsu_pops; su_probe()
1489 &sunsu_reg, up->port.line, su_probe()
1491 err = uart_add_one_port(&sunsu_reg, &up->port); su_probe()
1495 platform_set_drvdata(op, up); su_probe()
1502 of_iounmap(&op->resource[0], up->port.membase, up->reg_size); su_probe()
1508 struct uart_sunsu_port *up = platform_get_drvdata(op); su_remove() local
1511 if (up->su_type == SU_PORT_MS || su_remove()
1512 up->su_type == SU_PORT_KBD) su_remove()
1517 serio_unregister_port(&up->serio); su_remove()
1519 } else if (up->port.type != PORT_UNKNOWN) su_remove()
1520 uart_remove_one_port(&sunsu_reg, &up->port); su_remove()
1522 if (up->port.membase) su_remove()
1523 of_iounmap(&op->resource[0], up->port.membase, up->reg_size); su_remove()
1526 kfree(up); su_remove()
|
| H A D | pxa.c | 60 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset) serial_in() argument
63 return readl(up->port.membase + offset); serial_in()
66 static inline void serial_out(struct uart_pxa_port *up, int offset, int value) serial_out() argument
69 writel(value, up->port.membase + offset); serial_out()
74 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_enable_ms() local
76 up->ier |= UART_IER_MSI; serial_pxa_enable_ms()
77 serial_out(up, UART_IER, up->ier); serial_pxa_enable_ms()
82 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_stop_tx() local
84 if (up->ier & UART_IER_THRI) { serial_pxa_stop_tx()
85 up->ier &= ~UART_IER_THRI; serial_pxa_stop_tx()
86 serial_out(up, UART_IER, up->ier); serial_pxa_stop_tx()
92 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_stop_rx() local
94 up->ier &= ~UART_IER_RLSI; serial_pxa_stop_rx()
95 up->port.read_status_mask &= ~UART_LSR_DR; serial_pxa_stop_rx()
96 serial_out(up, UART_IER, up->ier); serial_pxa_stop_rx()
99 static inline void receive_chars(struct uart_pxa_port *up, int *status) receive_chars() argument
112 up->ier &= ~UART_IER_RTOIE; receive_chars()
113 serial_out(up, UART_IER, up->ier); receive_chars()
115 ch = serial_in(up, UART_RX); receive_chars()
117 up->port.icount.rx++; receive_chars()
126 up->port.icount.brk++; receive_chars()
133 if (uart_handle_break(&up->port)) receive_chars()
136 up->port.icount.parity++; receive_chars()
138 up->port.icount.frame++; receive_chars()
140 up->port.icount.overrun++; receive_chars()
145 *status &= up->port.read_status_mask; receive_chars()
148 if (up->port.line == up->port.cons->index) { receive_chars()
150 *status |= up->lsr_break_flag; receive_chars()
151 up->lsr_break_flag = 0; receive_chars()
162 if (uart_handle_sysrq_char(&up->port, ch)) receive_chars()
165 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag); receive_chars()
168 *status = serial_in(up, UART_LSR); receive_chars()
170 tty_flip_buffer_push(&up->port.state->port); receive_chars()
179 up->ier |= UART_IER_RTOIE; receive_chars()
180 serial_out(up, UART_IER, up->ier); receive_chars()
183 static void transmit_chars(struct uart_pxa_port *up) transmit_chars() argument
185 struct circ_buf *xmit = &up->port.state->xmit; transmit_chars()
188 if (up->port.x_char) { transmit_chars()
189 serial_out(up, UART_TX, up->port.x_char); transmit_chars()
190 up->port.icount.tx++; transmit_chars()
191 up->port.x_char = 0; transmit_chars()
194 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { transmit_chars()
195 serial_pxa_stop_tx(&up->port); transmit_chars()
199 count = up->port.fifosize / 2; transmit_chars()
201 serial_out(up, UART_TX, xmit->buf[xmit->tail]); transmit_chars()
203 up->port.icount.tx++; transmit_chars()
209 uart_write_wakeup(&up->port); transmit_chars()
213 serial_pxa_stop_tx(&up->port); transmit_chars()
218 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_start_tx() local
220 if (!(up->ier & UART_IER_THRI)) { serial_pxa_start_tx()
221 up->ier |= UART_IER_THRI; serial_pxa_start_tx()
222 serial_out(up, UART_IER, up->ier); serial_pxa_start_tx()
226 /* should hold up->port.lock */ check_modem_status()
227 static inline void check_modem_status(struct uart_pxa_port *up) check_modem_status() argument
231 status = serial_in(up, UART_MSR); check_modem_status()
237 up->port.icount.rng++; check_modem_status()
239 up->port.icount.dsr++; check_modem_status()
241 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD); check_modem_status()
243 uart_handle_cts_change(&up->port, status & UART_MSR_CTS); check_modem_status()
245 wake_up_interruptible(&up->port.state->port.delta_msr_wait); check_modem_status()
253 struct uart_pxa_port *up = dev_id; serial_pxa_irq() local
256 iir = serial_in(up, UART_IIR); serial_pxa_irq()
259 spin_lock(&up->port.lock); serial_pxa_irq()
260 lsr = serial_in(up, UART_LSR); serial_pxa_irq()
262 receive_chars(up, &lsr); serial_pxa_irq()
263 check_modem_status(up); serial_pxa_irq()
265 transmit_chars(up); serial_pxa_irq()
266 spin_unlock(&up->port.lock); serial_pxa_irq()
272 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_tx_empty() local
276 spin_lock_irqsave(&up->port.lock, flags); serial_pxa_tx_empty()
277 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; serial_pxa_tx_empty()
278 spin_unlock_irqrestore(&up->port.lock, flags); serial_pxa_tx_empty()
285 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_get_mctrl() local
289 status = serial_in(up, UART_MSR); serial_pxa_get_mctrl()
305 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_set_mctrl() local
319 mcr |= up->mcr; serial_pxa_set_mctrl()
321 serial_out(up, UART_MCR, mcr); serial_pxa_set_mctrl()
326 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_break_ctl() local
329 spin_lock_irqsave(&up->port.lock, flags); serial_pxa_break_ctl()
331 up->lcr |= UART_LCR_SBC; serial_pxa_break_ctl()
333 up->lcr &= ~UART_LCR_SBC; serial_pxa_break_ctl()
334 serial_out(up, UART_LCR, up->lcr); serial_pxa_break_ctl()
335 spin_unlock_irqrestore(&up->port.lock, flags); serial_pxa_break_ctl()
340 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_startup() local
345 up->mcr |= UART_MCR_AFE; serial_pxa_startup()
347 up->mcr = 0; serial_pxa_startup()
349 up->port.uartclk = clk_get_rate(up->clk); serial_pxa_startup()
354 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up); serial_pxa_startup()
362 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); serial_pxa_startup()
363 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | serial_pxa_startup()
365 serial_out(up, UART_FCR, 0); serial_pxa_startup()
370 (void) serial_in(up, UART_LSR); serial_pxa_startup()
371 (void) serial_in(up, UART_RX); serial_pxa_startup()
372 (void) serial_in(up, UART_IIR); serial_pxa_startup()
373 (void) serial_in(up, UART_MSR); serial_pxa_startup()
378 serial_out(up, UART_LCR, UART_LCR_WLEN8); serial_pxa_startup()
380 spin_lock_irqsave(&up->port.lock, flags); serial_pxa_startup()
381 up->port.mctrl |= TIOCM_OUT2; serial_pxa_startup()
382 serial_pxa_set_mctrl(&up->port, up->port.mctrl); serial_pxa_startup()
383 spin_unlock_irqrestore(&up->port.lock, flags); serial_pxa_startup()
390 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE; serial_pxa_startup()
391 serial_out(up, UART_IER, up->ier); serial_pxa_startup()
396 (void) serial_in(up, UART_LSR); serial_pxa_startup()
397 (void) serial_in(up, UART_RX); serial_pxa_startup()
398 (void) serial_in(up, UART_IIR); serial_pxa_startup()
399 (void) serial_in(up, UART_MSR); serial_pxa_startup()
406 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_shutdown() local
409 free_irq(up->port.irq, up); serial_pxa_shutdown()
414 up->ier = 0; serial_pxa_shutdown()
415 serial_out(up, UART_IER, 0); serial_pxa_shutdown()
417 spin_lock_irqsave(&up->port.lock, flags); serial_pxa_shutdown()
418 up->port.mctrl &= ~TIOCM_OUT2; serial_pxa_shutdown()
419 serial_pxa_set_mctrl(&up->port, up->port.mctrl); serial_pxa_shutdown()
420 spin_unlock_irqrestore(&up->port.lock, flags); serial_pxa_shutdown()
425 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC); serial_pxa_shutdown()
426 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | serial_pxa_shutdown()
429 serial_out(up, UART_FCR, 0); serial_pxa_shutdown()
436 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_set_termios() local
471 if ((up->port.uartclk / quot) < (2400 * 16)) serial_pxa_set_termios()
473 else if ((up->port.uartclk / quot) < (230400 * 16)) serial_pxa_set_termios()
482 spin_lock_irqsave(&up->port.lock, flags); serial_pxa_set_termios()
488 up->ier |= UART_IER_UUE; serial_pxa_set_termios()
495 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; serial_pxa_set_termios()
497 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; serial_pxa_set_termios()
499 up->port.read_status_mask |= UART_LSR_BI; serial_pxa_set_termios()
504 up->port.ignore_status_mask = 0; serial_pxa_set_termios()
506 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; serial_pxa_set_termios()
508 up->port.ignore_status_mask |= UART_LSR_BI; serial_pxa_set_termios()
514 up->port.ignore_status_mask |= UART_LSR_OE; serial_pxa_set_termios()
521 up->port.ignore_status_mask |= UART_LSR_DR; serial_pxa_set_termios()
526 up->ier &= ~UART_IER_MSI; serial_pxa_set_termios()
527 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) serial_pxa_set_termios()
528 up->ier |= UART_IER_MSI; serial_pxa_set_termios()
530 serial_out(up, UART_IER, up->ier); serial_pxa_set_termios()
533 up->mcr |= UART_MCR_AFE; serial_pxa_set_termios()
535 up->mcr &= ~UART_MCR_AFE; serial_pxa_set_termios()
537 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ serial_pxa_set_termios()
538 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */ serial_pxa_set_termios()
544 dll = serial_in(up, UART_DLL); serial_pxa_set_termios()
547 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */ serial_pxa_set_termios()
548 serial_out(up, UART_LCR, cval); /* reset DLAB */ serial_pxa_set_termios()
549 up->lcr = cval; /* Save LCR */ serial_pxa_set_termios()
550 serial_pxa_set_mctrl(&up->port, up->port.mctrl); serial_pxa_set_termios()
551 serial_out(up, UART_FCR, fcr); serial_pxa_set_termios()
552 spin_unlock_irqrestore(&up->port.lock, flags); serial_pxa_set_termios()
559 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_pm() local
562 clk_prepare_enable(up->clk); serial_pxa_pm()
564 clk_disable_unprepare(up->clk); serial_pxa_pm()
578 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_config_port() local
579 up->port.type = PORT_PXA; serial_pxa_config_port()
592 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_type() local
593 return up->name; serial_pxa_type()
606 static inline void wait_for_xmitr(struct uart_pxa_port *up) wait_for_xmitr() argument
610 /* Wait up to 10ms for the character(s) to be sent. */ wait_for_xmitr()
612 status = serial_in(up, UART_LSR); wait_for_xmitr()
615 up->lsr_break_flag = UART_LSR_BI; wait_for_xmitr()
622 /* Wait up to 1s for flow control if necessary */ wait_for_xmitr()
623 if (up->port.flags & UPF_CONS_FLOW) { wait_for_xmitr()
626 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0)) wait_for_xmitr()
633 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_console_putchar() local
635 wait_for_xmitr(up); serial_pxa_console_putchar()
636 serial_out(up, UART_TX, ch); serial_pxa_console_putchar()
648 struct uart_pxa_port *up = serial_pxa_ports[co->index]; serial_pxa_console_write() local
653 clk_enable(up->clk); serial_pxa_console_write()
655 if (up->port.sysrq) serial_pxa_console_write()
658 locked = spin_trylock(&up->port.lock); serial_pxa_console_write()
660 spin_lock(&up->port.lock); serial_pxa_console_write()
665 ier = serial_in(up, UART_IER); serial_pxa_console_write()
666 serial_out(up, UART_IER, UART_IER_UUE); serial_pxa_console_write()
668 uart_console_write(&up->port, s, count, serial_pxa_console_putchar); serial_pxa_console_write()
674 wait_for_xmitr(up); serial_pxa_console_write()
675 serial_out(up, UART_IER, ier); serial_pxa_console_write()
678 spin_unlock(&up->port.lock); serial_pxa_console_write()
680 clk_disable(up->clk); serial_pxa_console_write()
692 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_get_poll_char() local
693 unsigned char lsr = serial_in(up, UART_LSR); serial_pxa_get_poll_char()
696 lsr = serial_in(up, UART_LSR); serial_pxa_get_poll_char()
698 return serial_in(up, UART_RX); serial_pxa_get_poll_char()
706 struct uart_pxa_port *up = (struct uart_pxa_port *)port; serial_pxa_put_poll_char() local
711 ier = serial_in(up, UART_IER); serial_pxa_put_poll_char()
712 serial_out(up, UART_IER, UART_IER_UUE); serial_pxa_put_poll_char()
714 wait_for_xmitr(up); serial_pxa_put_poll_char()
718 serial_out(up, UART_TX, c); serial_pxa_put_poll_char()
724 wait_for_xmitr(up); serial_pxa_put_poll_char()
725 serial_out(up, UART_IER, ier); serial_pxa_put_poll_char()
733 struct uart_pxa_port *up; serial_pxa_console_setup() local
741 up = serial_pxa_ports[co->index]; serial_pxa_console_setup()
742 if (!up) serial_pxa_console_setup()
748 return uart_set_options(&up->port, co, baud, parity, bits, flow); serial_pxa_console_setup()
|
| H A D | sunsab.c | 94 static __inline__ void sunsab_tec_wait(struct uart_sunsab_port *up) sunsab_tec_wait() argument
96 int timeout = up->tec_timeout; sunsab_tec_wait()
98 while ((readb(&up->regs->r.star) & SAB82532_STAR_TEC) && --timeout) sunsab_tec_wait()
102 static __inline__ void sunsab_cec_wait(struct uart_sunsab_port *up) sunsab_cec_wait() argument
104 int timeout = up->cec_timeout; sunsab_cec_wait()
106 while ((readb(&up->regs->r.star) & SAB82532_STAR_CEC) && --timeout) sunsab_cec_wait()
111 receive_chars(struct uart_sunsab_port *up, receive_chars() argument
121 if (up->port.state != NULL) /* Unopened serial console */ receive_chars()
122 port = &up->port.state->port; receive_chars()
131 count = readb(&up->regs->r.rbcl) & (SAB82532_RECV_FIFO_SIZE - 1); receive_chars()
137 sunsab_cec_wait(up); receive_chars()
138 writeb(SAB82532_CMDR_RFRD, &up->regs->w.cmdr); receive_chars()
147 buf[i] = readb(&up->regs->r.rfifo[i]); receive_chars()
151 sunsab_cec_wait(up); receive_chars()
152 writeb(SAB82532_CMDR_RMC, &up->regs->w.cmdr); receive_chars()
157 (up->port.line == up->port.cons->index)) receive_chars()
164 up->port.icount.brk++; receive_chars()
165 uart_handle_break(&up->port); receive_chars()
173 up->port.icount.rx++; receive_chars()
185 up->port.icount.brk++; receive_chars()
192 if (uart_handle_break(&up->port)) receive_chars()
195 up->port.icount.parity++; receive_chars()
197 up->port.icount.frame++; receive_chars()
199 up->port.icount.overrun++; receive_chars()
204 stat->sreg.isr0 &= (up->port.read_status_mask & 0xff); receive_chars()
205 stat->sreg.isr1 &= ((up->port.read_status_mask >> 8) & 0xff); receive_chars()
215 if (uart_handle_sysrq_char(&up->port, ch) || !port) receive_chars()
218 if ((stat->sreg.isr0 & (up->port.ignore_status_mask & 0xff)) == 0 && receive_chars()
219 (stat->sreg.isr1 & ((up->port.ignore_status_mask >> 8) & 0xff)) == 0) receive_chars()
234 static void transmit_chars(struct uart_sunsab_port *up, transmit_chars() argument
237 struct circ_buf *xmit = &up->port.state->xmit; transmit_chars()
241 up->interrupt_mask1 |= SAB82532_IMR1_ALLS; transmit_chars()
242 writeb(up->interrupt_mask1, &up->regs->w.imr1); transmit_chars()
243 set_bit(SAB82532_ALLS, &up->irqflags); transmit_chars()
251 if (!(readb(&up->regs->r.star) & SAB82532_STAR_XFW)) transmit_chars()
254 set_bit(SAB82532_XPR, &up->irqflags); transmit_chars()
255 sunsab_tx_idle(up); transmit_chars()
257 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { transmit_chars()
258 up->interrupt_mask1 |= SAB82532_IMR1_XPR; transmit_chars()
259 writeb(up->interrupt_mask1, &up->regs->w.imr1); transmit_chars()
263 up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR); transmit_chars()
264 writeb(up->interrupt_mask1, &up->regs->w.imr1); transmit_chars()
265 clear_bit(SAB82532_ALLS, &up->irqflags); transmit_chars()
268 clear_bit(SAB82532_XPR, &up->irqflags); transmit_chars()
269 for (i = 0; i < up->port.fifosize; i++) { transmit_chars()
271 &up->regs->w.xfifo[i]); transmit_chars()
273 up->port.icount.tx++; transmit_chars()
279 sunsab_cec_wait(up); transmit_chars()
280 writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr); transmit_chars()
283 uart_write_wakeup(&up->port); transmit_chars()
286 sunsab_stop_tx(&up->port); transmit_chars()
289 static void check_status(struct uart_sunsab_port *up, check_status() argument
293 uart_handle_dcd_change(&up->port, check_status()
294 !(readb(&up->regs->r.vstr) & SAB82532_VSTR_CD)); check_status()
297 uart_handle_cts_change(&up->port, check_status()
298 (readb(&up->regs->r.star) & SAB82532_STAR_CTS)); check_status()
300 if ((readb(&up->regs->r.pvr) & up->pvr_dsr_bit) ^ up->dsr) { check_status()
301 up->dsr = (readb(&up->regs->r.pvr) & up->pvr_dsr_bit) ? 0 : 1; check_status()
302 up->port.icount.dsr++; check_status()
305 wake_up_interruptible(&up->port.state->port.delta_msr_wait); check_status()
310 struct uart_sunsab_port *up = dev_id; sunsab_interrupt() local
316 spin_lock_irqsave(&up->port.lock, flags); sunsab_interrupt()
319 gis = readb(&up->regs->r.gis) >> up->gis_shift; sunsab_interrupt()
321 status.sreg.isr0 = readb(&up->regs->r.isr0); sunsab_interrupt()
323 status.sreg.isr1 = readb(&up->regs->r.isr1); sunsab_interrupt()
329 port = receive_chars(up, &status); sunsab_interrupt()
332 check_status(up, &status); sunsab_interrupt()
334 transmit_chars(up, &status); sunsab_interrupt()
337 spin_unlock_irqrestore(&up->port.lock, flags); sunsab_interrupt()
348 struct uart_sunsab_port *up = sunsab_tx_empty() local
353 if (test_bit(SAB82532_ALLS, &up->irqflags)) sunsab_tx_empty()
364 struct uart_sunsab_port *up = sunsab_set_mctrl() local
368 up->cached_mode &= ~SAB82532_MODE_FRTS; sunsab_set_mctrl()
369 up->cached_mode |= SAB82532_MODE_RTS; sunsab_set_mctrl()
371 up->cached_mode |= (SAB82532_MODE_FRTS | sunsab_set_mctrl()
375 up->cached_pvr &= ~(up->pvr_dtr_bit); sunsab_set_mctrl()
377 up->cached_pvr |= up->pvr_dtr_bit; sunsab_set_mctrl()
380 set_bit(SAB82532_REGS_PENDING, &up->irqflags); sunsab_set_mctrl()
381 if (test_bit(SAB82532_XPR, &up->irqflags)) sunsab_set_mctrl()
382 sunsab_tx_idle(up); sunsab_set_mctrl()
388 struct uart_sunsab_port *up = sunsab_get_mctrl() local
395 val = readb(&up->regs->r.pvr); sunsab_get_mctrl()
396 result |= (val & up->pvr_dsr_bit) ? 0 : TIOCM_DSR; sunsab_get_mctrl()
398 val = readb(&up->regs->r.vstr); sunsab_get_mctrl()
401 val = readb(&up->regs->r.star); sunsab_get_mctrl()
410 struct uart_sunsab_port *up = sunsab_stop_tx() local
413 up->interrupt_mask1 |= SAB82532_IMR1_XPR; sunsab_stop_tx()
414 writeb(up->interrupt_mask1, &up->regs->w.imr1); sunsab_stop_tx()
418 static void sunsab_tx_idle(struct uart_sunsab_port *up) sunsab_tx_idle() argument
420 if (test_bit(SAB82532_REGS_PENDING, &up->irqflags)) { sunsab_tx_idle()
423 clear_bit(SAB82532_REGS_PENDING, &up->irqflags); sunsab_tx_idle()
424 writeb(up->cached_mode, &up->regs->rw.mode); sunsab_tx_idle()
425 writeb(up->cached_pvr, &up->regs->rw.pvr); sunsab_tx_idle()
426 writeb(up->cached_dafo, &up->regs->w.dafo); sunsab_tx_idle()
428 writeb(up->cached_ebrg & 0xff, &up->regs->w.bgr); sunsab_tx_idle()
429 tmp = readb(&up->regs->rw.ccr2); sunsab_tx_idle()
431 tmp |= (up->cached_ebrg >> 2) & 0xc0; sunsab_tx_idle()
432 writeb(tmp, &up->regs->rw.ccr2); sunsab_tx_idle()
439 struct uart_sunsab_port *up = sunsab_start_tx() local
441 struct circ_buf *xmit = &up->port.state->xmit; sunsab_start_tx()
447 up->interrupt_mask1 &= ~(SAB82532_IMR1_ALLS|SAB82532_IMR1_XPR); sunsab_start_tx()
448 writeb(up->interrupt_mask1, &up->regs->w.imr1); sunsab_start_tx()
450 if (!test_bit(SAB82532_XPR, &up->irqflags)) sunsab_start_tx()
453 clear_bit(SAB82532_ALLS, &up->irqflags); sunsab_start_tx()
454 clear_bit(SAB82532_XPR, &up->irqflags); sunsab_start_tx()
456 for (i = 0; i < up->port.fifosize; i++) { sunsab_start_tx()
458 &up->regs->w.xfifo[i]); sunsab_start_tx()
460 up->port.icount.tx++; sunsab_start_tx()
466 sunsab_cec_wait(up); sunsab_start_tx()
467 writeb(SAB82532_CMDR_XF, &up->regs->w.cmdr); sunsab_start_tx()
473 struct uart_sunsab_port *up = sunsab_send_xchar() local
480 spin_lock_irqsave(&up->port.lock, flags); sunsab_send_xchar()
482 sunsab_tec_wait(up); sunsab_send_xchar()
483 writeb(ch, &up->regs->w.tic); sunsab_send_xchar()
485 spin_unlock_irqrestore(&up->port.lock, flags); sunsab_send_xchar()
491 struct uart_sunsab_port *up = sunsab_stop_rx() local
494 up->interrupt_mask0 |= SAB82532_IMR0_TCD; sunsab_stop_rx()
495 writeb(up->interrupt_mask1, &up->regs->w.imr0); sunsab_stop_rx()
501 struct uart_sunsab_port *up = sunsab_break_ctl() local
506 spin_lock_irqsave(&up->port.lock, flags); sunsab_break_ctl()
508 val = up->cached_dafo; sunsab_break_ctl()
513 up->cached_dafo = val; sunsab_break_ctl()
515 set_bit(SAB82532_REGS_PENDING, &up->irqflags); sunsab_break_ctl()
516 if (test_bit(SAB82532_XPR, &up->irqflags)) sunsab_break_ctl()
517 sunsab_tx_idle(up); sunsab_break_ctl()
519 spin_unlock_irqrestore(&up->port.lock, flags); sunsab_break_ctl()
525 struct uart_sunsab_port *up = sunsab_startup() local
529 int err = request_irq(up->port.irq, sunsab_interrupt, sunsab_startup()
530 IRQF_SHARED, "sab", up); sunsab_startup()
534 spin_lock_irqsave(&up->port.lock, flags); sunsab_startup()
539 sunsab_cec_wait(up); sunsab_startup()
540 sunsab_tec_wait(up); sunsab_startup()
545 writeb(SAB82532_CMDR_RRES, &up->regs->w.cmdr); sunsab_startup()
546 sunsab_cec_wait(up); sunsab_startup()
547 writeb(SAB82532_CMDR_XRES, &up->regs->w.cmdr); sunsab_startup()
552 (void) readb(&up->regs->r.isr0); sunsab_startup()
553 (void) readb(&up->regs->r.isr1); sunsab_startup()
558 writeb(0, &up->regs->w.ccr0); /* power-down */ sunsab_startup()
560 SAB82532_CCR0_SM_ASYNC, &up->regs->w.ccr0); sunsab_startup()
561 writeb(SAB82532_CCR1_ODS | SAB82532_CCR1_BCR | 7, &up->regs->w.ccr1); sunsab_startup()
563 SAB82532_CCR2_TOE, &up->regs->w.ccr2); sunsab_startup()
564 writeb(0, &up->regs->w.ccr3); sunsab_startup()
565 writeb(SAB82532_CCR4_MCK4 | SAB82532_CCR4_EBRG, &up->regs->w.ccr4); sunsab_startup()
566 up->cached_mode = (SAB82532_MODE_RTS | SAB82532_MODE_FCTS | sunsab_startup()
568 writeb(up->cached_mode, &up->regs->w.mode); sunsab_startup()
569 writeb(SAB82532_RFC_DPS|SAB82532_RFC_RFTH_32, &up->regs->w.rfc); sunsab_startup()
571 tmp = readb(&up->regs->rw.ccr0); sunsab_startup()
572 tmp |= SAB82532_CCR0_PU; /* power-up */ sunsab_startup()
573 writeb(tmp, &up->regs->rw.ccr0); sunsab_startup()
578 up->interrupt_mask0 = (SAB82532_IMR0_PERR | SAB82532_IMR0_FERR | sunsab_startup()
580 writeb(up->interrupt_mask0, &up->regs->w.imr0); sunsab_startup()
581 up->interrupt_mask1 = (SAB82532_IMR1_BRKT | SAB82532_IMR1_ALLS | sunsab_startup()
585 writeb(up->interrupt_mask1, &up->regs->w.imr1); sunsab_startup()
586 set_bit(SAB82532_ALLS, &up->irqflags); sunsab_startup()
587 set_bit(SAB82532_XPR, &up->irqflags); sunsab_startup()
589 spin_unlock_irqrestore(&up->port.lock, flags); sunsab_startup()
597 struct uart_sunsab_port *up = sunsab_shutdown() local
601 spin_lock_irqsave(&up->port.lock, flags); sunsab_shutdown()
604 up->interrupt_mask0 = 0xff; sunsab_shutdown()
605 writeb(up->interrupt_mask0, &up->regs->w.imr0); sunsab_shutdown()
606 up->interrupt_mask1 = 0xff; sunsab_shutdown()
607 writeb(up->interrupt_mask1, &up->regs->w.imr1); sunsab_shutdown()
610 up->cached_dafo = readb(&up->regs->rw.dafo); sunsab_shutdown()
611 up->cached_dafo &= ~SAB82532_DAFO_XBRK; sunsab_shutdown()
612 writeb(up->cached_dafo, &up->regs->rw.dafo); sunsab_shutdown()
615 up->cached_mode &= ~SAB82532_MODE_RAC; sunsab_shutdown()
616 writeb(up->cached_mode, &up->regs->rw.mode); sunsab_shutdown()
630 tmp = readb(&up->regs->rw.ccr0); sunsab_shutdown()
632 writeb(tmp, &up->regs->rw.ccr0); sunsab_shutdown()
635 spin_unlock_irqrestore(&up->port.lock, flags); sunsab_shutdown()
636 free_irq(up->port.irq, up); sunsab_shutdown()
682 static void sunsab_convert_to_sab(struct uart_sunsab_port *up, unsigned int cflag, sunsab_convert_to_sab() argument
714 up->cached_dafo = dafo; sunsab_convert_to_sab()
718 up->cached_ebrg = n | (m << 6); sunsab_convert_to_sab()
720 up->tec_timeout = (10 * 1000000) / baud; sunsab_convert_to_sab()
721 up->cec_timeout = up->tec_timeout >> 2; sunsab_convert_to_sab()
732 up->port.read_status_mask = (SAB82532_ISR0_TCD | SAB82532_ISR0_TIME | sunsab_convert_to_sab()
735 up->port.read_status_mask |= (SAB82532_ISR1_CSC | sunsab_convert_to_sab()
739 up->port.read_status_mask |= (SAB82532_ISR0_PERR | sunsab_convert_to_sab()
742 up->port.read_status_mask |= (SAB82532_ISR1_BRK << 8); sunsab_convert_to_sab()
747 up->port.ignore_status_mask = 0; sunsab_convert_to_sab()
749 up->port.ignore_status_mask |= (SAB82532_ISR0_PERR | sunsab_convert_to_sab()
752 up->port.ignore_status_mask |= (SAB82532_ISR1_BRK << 8); sunsab_convert_to_sab()
758 up->port.ignore_status_mask |= SAB82532_ISR0_RFO; sunsab_convert_to_sab()
765 up->port.ignore_status_mask |= (SAB82532_ISR0_RPF | sunsab_convert_to_sab()
768 uart_update_timeout(&up->port, cflag, sunsab_convert_to_sab()
769 (up->port.uartclk / (16 * quot))); sunsab_convert_to_sab()
774 up->cached_mode |= SAB82532_MODE_RAC; sunsab_convert_to_sab()
775 set_bit(SAB82532_REGS_PENDING, &up->irqflags); sunsab_convert_to_sab()
776 if (test_bit(SAB82532_XPR, &up->irqflags)) sunsab_convert_to_sab()
777 sunsab_tx_idle(up); sunsab_convert_to_sab()
784 struct uart_sunsab_port *up = sunsab_set_termios() local
790 spin_lock_irqsave(&up->port.lock, flags); sunsab_set_termios()
791 sunsab_convert_to_sab(up, termios->c_cflag, termios->c_iflag, baud, quot); sunsab_set_termios()
792 spin_unlock_irqrestore(&up->port.lock, flags); sunsab_set_termios()
797 struct uart_sunsab_port *up = (void *)port; sunsab_type() local
800 sprintf(buf, "SAB82532 %s", sab82532_version[up->type]); sunsab_type()
854 struct uart_sunsab_port *up = sunsab_console_putchar() local
857 sunsab_tec_wait(up); sunsab_console_putchar()
858 writeb(c, &up->regs->w.tic); sunsab_console_putchar()
863 struct uart_sunsab_port *up = &sunsab_ports[con->index]; sunsab_console_write() local
867 if (up->port.sysrq || oops_in_progress) sunsab_console_write()
868 locked = spin_trylock_irqsave(&up->port.lock, flags); sunsab_console_write()
870 spin_lock_irqsave(&up->port.lock, flags); sunsab_console_write()
872 uart_console_write(&up->port, s, n, sunsab_console_putchar); sunsab_console_write()
873 sunsab_tec_wait(up); sunsab_console_write()
876 spin_unlock_irqrestore(&up->port.lock, flags); sunsab_console_write()
881 struct uart_sunsab_port *up = &sunsab_ports[con->index]; sunsab_console_setup() local
891 if (up->port.type != PORT_SUNSAB) sunsab_console_setup()
897 sunserial_console_termios(con, up->port.dev->of_node); sunsab_console_setup()
918 spin_lock_init(&up->port.lock); sunsab_console_setup()
923 sunsab_startup(&up->port); sunsab_console_setup()
925 spin_lock_irqsave(&up->port.lock, flags); sunsab_console_setup()
930 up->interrupt_mask0 = SAB82532_IMR0_PERR | SAB82532_IMR0_FERR | sunsab_console_setup()
932 writeb(up->interrupt_mask0, &up->regs->w.imr0); sunsab_console_setup()
933 up->interrupt_mask1 = SAB82532_IMR1_BRKT | SAB82532_IMR1_ALLS | sunsab_console_setup()
937 writeb(up->interrupt_mask1, &up->regs->w.imr1); sunsab_console_setup()
939 quot = uart_get_divisor(&up->port, baud); sunsab_console_setup()
940 sunsab_convert_to_sab(up, con->cflag, 0, baud, quot); sunsab_console_setup()
941 sunsab_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); sunsab_console_setup()
943 spin_unlock_irqrestore(&up->port.lock, flags); sunsab_console_setup()
967 static int sunsab_init_one(struct uart_sunsab_port *up, sunsab_init_one() argument
972 up->port.line = line; sunsab_init_one()
973 up->port.dev = &op->dev; sunsab_init_one()
975 up->port.mapbase = op->resource[0].start + offset; sunsab_init_one()
976 up->port.membase = of_ioremap(&op->resource[0], offset, sunsab_init_one()
979 if (!up->port.membase) sunsab_init_one()
981 up->regs = (union sab82532_async_regs __iomem *) up->port.membase; sunsab_init_one()
983 up->port.irq = op->archdata.irqs[0]; sunsab_init_one()
985 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE; sunsab_init_one()
986 up->port.iotype = UPIO_MEM; sunsab_init_one()
988 writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc); sunsab_init_one()
990 up->port.ops = &sunsab_pops; sunsab_init_one()
991 up->port.type = PORT_SUNSAB; sunsab_init_one()
992 up->port.uartclk = SAB_BASE_BAUD; sunsab_init_one()
994 up->type = readb(&up->regs->r.vstr) & 0x0f; sunsab_init_one()
995 writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr); sunsab_init_one()
996 writeb(0xff, &up->regs->w.pim); sunsab_init_one()
997 if ((up->port.line & 0x1) == 0) { sunsab_init_one()
998 up->pvr_dsr_bit = (1 << 0); sunsab_init_one()
999 up->pvr_dtr_bit = (1 << 1); sunsab_init_one()
1000 up->gis_shift = 2; sunsab_init_one()
1002 up->pvr_dsr_bit = (1 << 3); sunsab_init_one()
1003 up->pvr_dtr_bit = (1 << 2); sunsab_init_one()
1004 up->gis_shift = 0; sunsab_init_one()
1006 up->cached_pvr = (1 << 1) | (1 << 2) | (1 << 4); sunsab_init_one()
1007 writeb(up->cached_pvr, &up->regs->w.pvr); sunsab_init_one()
1008 up->cached_mode = readb(&up->regs->rw.mode); sunsab_init_one()
1009 up->cached_mode |= SAB82532_MODE_FRTS; sunsab_init_one()
1010 writeb(up->cached_mode, &up->regs->rw.mode); sunsab_init_one()
1011 up->cached_mode |= SAB82532_MODE_RTS; sunsab_init_one()
1012 writeb(up->cached_mode, &up->regs->rw.mode); sunsab_init_one()
1014 up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT; sunsab_init_one()
1015 up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT; sunsab_init_one()
1023 struct uart_sunsab_port *up; sab_probe() local
1026 up = &sunsab_ports[inst * 2]; sab_probe()
1028 err = sunsab_init_one(&up[0], op, sab_probe()
1034 err = sunsab_init_one(&up[1], op, sab_probe()
1041 &sunsab_reg, up[0].port.line, sab_probe()
1045 &sunsab_reg, up[1].port.line, sab_probe()
1048 err = uart_add_one_port(&sunsab_reg, &up[0].port); sab_probe()
1052 err = uart_add_one_port(&sunsab_reg, &up[1].port); sab_probe()
1056 platform_set_drvdata(op, &up[0]); sab_probe()
1063 uart_remove_one_port(&sunsab_reg, &up[0].port); sab_probe()
1066 up[1].port.membase, sab_probe()
1070 up[0].port.membase, sab_probe()
1078 struct uart_sunsab_port *up = platform_get_drvdata(op); sab_remove() local
1080 uart_remove_one_port(&sunsab_reg, &up[1].port); sab_remove()
1081 uart_remove_one_port(&sunsab_reg, &up[0].port); sab_remove()
1083 up[1].port.membase, sab_remove()
1086 up[0].port.membase, sab_remove()
|
| H A D | bfin_sport_uart.c | 59 static int sport_uart_tx_chars(struct sport_uart_port *up);
62 static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value) tx_one_byte() argument
65 up->txmask1, up->txmask2); tx_one_byte()
73 : [mask1]"d"(up->txmask1), [mask2]"d"(up->txmask2) tx_one_byte()
78 SPORT_PUT_TX(up, value); tx_one_byte()
81 static inline unsigned char rx_one_byte(struct sport_uart_port *up) rx_one_byte() argument
87 if ((up->csize + up->stopb) > 7) rx_one_byte()
88 value = SPORT_GET_RX32(up); rx_one_byte()
90 value = SPORT_GET_RX(up); rx_one_byte()
93 up->csize, up->rxmask); rx_one_byte()
111 : [val]"d"(value), [rxmask]"d"(up->rxmask), [lc]"a"(up->csize) rx_one_byte()
119 static int sport_uart_setup(struct sport_uart_port *up, int size, int baud_rate) sport_uart_setup() argument
125 SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK)); sport_uart_setup()
126 SPORT_PUT_TCR2(up, size + 1); sport_uart_setup()
127 pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up)); sport_uart_setup()
130 SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK)); sport_uart_setup()
131 SPORT_PUT_RCR2(up, (size + 1) * 2 - 1); sport_uart_setup()
132 pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up)); sport_uart_setup()
141 SPORT_PUT_TCLKDIV(up, tclkdiv); sport_uart_setup()
142 SPORT_PUT_RCLKDIV(up, rclkdiv); sport_uart_setup()
152 struct sport_uart_port *up = dev_id; sport_uart_rx_irq() local
153 struct tty_port *port = &up->port.state->port; sport_uart_rx_irq()
156 spin_lock(&up->port.lock); sport_uart_rx_irq()
158 while (SPORT_GET_STAT(up) & RXNE) { sport_uart_rx_irq()
159 ch = rx_one_byte(up); sport_uart_rx_irq()
160 up->port.icount.rx++; sport_uart_rx_irq()
162 if (!uart_handle_sysrq_char(&up->port, ch)) sport_uart_rx_irq()
166 spin_unlock(&up->port.lock); sport_uart_rx_irq()
176 struct sport_uart_port *up = dev_id; sport_uart_tx_irq() local
178 spin_lock(&up->port.lock); sport_uart_tx_irq()
179 sport_uart_tx_chars(up); sport_uart_tx_irq()
180 spin_unlock(&up->port.lock); sport_uart_tx_irq()
187 struct sport_uart_port *up = dev_id; sport_uart_err_irq() local
188 unsigned int stat = SPORT_GET_STAT(up); sport_uart_err_irq()
190 spin_lock(&up->port.lock); sport_uart_err_irq()
194 up->port.icount.overrun++; sport_uart_err_irq()
195 tty_insert_flip_char(&up->port.state->port, 0, TTY_OVERRUN); sport_uart_err_irq()
196 SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */ sport_uart_err_irq()
204 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN); sport_uart_err_irq()
205 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN); sport_uart_err_irq()
209 spin_unlock(&up->port.lock); sport_uart_err_irq()
218 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_get_mctrl() local
219 if (up->cts_pin < 0) sport_get_mctrl()
223 if (SPORT_UART_GET_CTS(up)) sport_get_mctrl()
231 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_set_mctrl() local
232 if (up->rts_pin < 0) sport_set_mctrl()
237 SPORT_UART_ENABLE_RTS(up); sport_set_mctrl()
239 SPORT_UART_DISABLE_RTS(up); sport_set_mctrl()
247 struct sport_uart_port *up = (struct sport_uart_port *)dev_id; sport_mctrl_cts_int() local
250 status = sport_get_mctrl(&up->port); sport_mctrl_cts_int()
251 uart_handle_cts_change(&up->port, status & TIOCM_CTS); sport_mctrl_cts_int()
271 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_startup() local
275 ret = request_irq(up->port.irq, sport_uart_rx_irq, 0, sport_startup()
276 "SPORT_UART_RX", up); sport_startup()
282 ret = request_irq(up->port.irq+1, sport_uart_tx_irq, 0, sport_startup()
283 "SPORT_UART_TX", up); sport_startup()
289 ret = request_irq(up->err_irq, sport_uart_err_irq, 0, sport_startup()
290 "SPORT_UART_STATUS", up); sport_startup()
297 if (up->cts_pin >= 0) { sport_startup()
298 if (request_irq(gpio_to_irq(up->cts_pin), sport_startup()
301 0, "BFIN_SPORT_UART_CTS", up)) { sport_startup()
302 up->cts_pin = -1; sport_startup()
306 if (up->rts_pin >= 0) { sport_startup()
307 if (gpio_request(up->rts_pin, DRV_NAME)) { sport_startup()
308 dev_info(port->dev, "fail to request RTS PIN at GPIO_%d\n", up->rts_pin); sport_startup()
309 up->rts_pin = -1; sport_startup()
311 gpio_direction_output(up->rts_pin, 0); sport_startup()
317 free_irq(up->port.irq+1, up); sport_startup()
319 free_irq(up->port.irq, up); sport_startup()
330 static int sport_uart_tx_chars(struct sport_uart_port *up) sport_uart_tx_chars() argument
332 struct circ_buf *xmit = &up->port.state->xmit; sport_uart_tx_chars()
334 if (SPORT_GET_STAT(up) & TXF) sport_uart_tx_chars()
337 if (up->port.x_char) { sport_uart_tx_chars()
338 tx_one_byte(up, up->port.x_char); sport_uart_tx_chars()
339 up->port.icount.tx++; sport_uart_tx_chars()
340 up->port.x_char = 0; sport_uart_tx_chars()
344 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { sport_uart_tx_chars()
350 if (SPORT_GET_STAT(up) & TXHRE) sport_uart_tx_chars()
351 sport_stop_tx(&up->port); sport_uart_tx_chars()
355 while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) { sport_uart_tx_chars()
356 tx_one_byte(up, xmit->buf[xmit->tail]); sport_uart_tx_chars()
358 up->port.icount.tx++; sport_uart_tx_chars()
362 uart_write_wakeup(&up->port); sport_uart_tx_chars()
369 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_tx_empty() local
372 stat = SPORT_GET_STAT(up); sport_tx_empty()
382 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_stop_tx() local
386 if (!(SPORT_GET_TCR1(up) & TSPEN)) sport_stop_tx()
394 SPORT_PUT_TX(up, 0xffff); sport_stop_tx()
395 while (!(SPORT_GET_STAT(up) & TXHRE)) sport_stop_tx()
398 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN)); sport_stop_tx()
406 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_start_tx() local
411 if (sport_uart_tx_chars(up)) { sport_start_tx()
413 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN)); sport_start_tx()
422 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_stop_rx() local
426 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN)); sport_stop_rx()
437 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_shutdown() local
442 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN)); sport_shutdown()
443 SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN)); sport_shutdown()
446 free_irq(up->port.irq, up); sport_shutdown()
447 free_irq(up->port.irq+1, up); sport_shutdown()
448 free_irq(up->err_irq, up); sport_shutdown()
450 if (up->cts_pin >= 0) sport_shutdown()
451 free_irq(gpio_to_irq(up->cts_pin), up); sport_shutdown()
452 if (up->rts_pin >= 0) sport_shutdown()
453 gpio_free(up->rts_pin); sport_shutdown()
459 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_type() local
462 return up->port.type == PORT_BFIN_SPORT ? "BFIN-SPORT-UART" : NULL; sport_type()
478 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_config_port() local
481 up->port.type = PORT_BFIN_SPORT; sport_config_port()
493 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_set_termios() local
500 if (old == NULL && up->cts_pin != -1) sport_set_termios()
502 else if (up->cts_pin == -1) sport_set_termios()
508 up->csize = 8; sport_set_termios()
511 up->csize = 7; sport_set_termios()
514 up->csize = 6; sport_set_termios()
517 up->csize = 5; sport_set_termios()
525 up->stopb = 1; sport_set_termios()
529 /* up->parib = 1; */ sport_set_termios()
532 spin_lock_irqsave(&up->port.lock, flags); sport_set_termios()
542 up->rxmask = 0x01 | (((up->csize + up->stopb) * 2 - 1) << 0x8); sport_set_termios()
547 for (i = 0, up->txmask1 = 0; i < up->csize; i++) sport_set_termios()
548 up->txmask1 |= (1<<i); sport_set_termios()
549 up->txmask2 = (1<<i); sport_set_termios()
550 if (up->stopb) { sport_set_termios()
552 up->txmask2 |= (1<<i); sport_set_termios()
554 up->txmask1 <<= 1; sport_set_termios()
555 up->txmask2 <<= 1; sport_set_termios()
560 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN); sport_set_termios()
561 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN); sport_set_termios()
563 sport_uart_setup(up, up->csize + up->stopb, port->uartclk); sport_set_termios()
568 SPORT_PUT_TX(up, 0xffff); sport_set_termios()
569 SPORT_PUT_TX(up, 0xffff); sport_set_termios()
570 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN)); sport_set_termios()
572 while (!(SPORT_GET_STAT(up) & TXHRE)) sport_set_termios()
574 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN); sport_set_termios()
581 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) | RSPEN); sport_set_termios()
584 spin_unlock_irqrestore(&up->port.lock, flags); sport_set_termios()
615 struct sport_uart_port *up; sport_uart_console_setup() local
629 up = bfin_sport_uart_ports[co->index]; sport_uart_console_setup()
630 if (!up) sport_uart_console_setup()
636 return uart_set_options(&up->port, co, baud, parity, bits, flow); sport_uart_console_setup()
641 struct sport_uart_port *up = (struct sport_uart_port *)port; sport_uart_console_putchar() local
643 while (SPORT_GET_STAT(up) & TXF) sport_uart_console_putchar()
646 tx_one_byte(up, ch); sport_uart_console_putchar()
655 struct sport_uart_port *up = bfin_sport_uart_ports[co->index]; sport_uart_console_write() local
658 spin_lock_irqsave(&up->port.lock, flags); sport_uart_console_write()
660 if (SPORT_GET_TCR1(up) & TSPEN) sport_uart_console_write()
661 uart_console_write(&up->port, s, count, sport_uart_console_putchar); sport_uart_console_write()
664 while (SPORT_GET_STAT(up) & TXF) sport_uart_console_write()
666 SPORT_PUT_TX(up, 0xffff); sport_uart_console_write()
668 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN)); sport_uart_console_write()
671 uart_console_write(&up->port, s, count, sport_uart_console_putchar); sport_uart_console_write()
678 while (SPORT_GET_STAT(up) & TXF) sport_uart_console_write()
680 SPORT_PUT_TX(up, 0xffff); sport_uart_console_write()
681 while (!(SPORT_GET_STAT(up) & TXHRE)) sport_uart_console_write()
685 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN)); sport_uart_console_write()
689 spin_unlock_irqrestore(&up->port.lock, flags); sport_uart_console_write()
|
| H A D | sunzilog.c | 271 static void sunzilog_maybe_update_regs(struct uart_sunzilog_port *up, sunzilog_maybe_update_regs() argument
274 if (!ZS_REGS_HELD(up)) { sunzilog_maybe_update_regs()
275 if (ZS_TX_ACTIVE(up)) { sunzilog_maybe_update_regs()
276 up->flags |= SUNZILOG_FLAG_REGS_HELD; sunzilog_maybe_update_regs()
278 __load_zsregs(channel, up->curregs); sunzilog_maybe_update_regs()
283 static void sunzilog_change_mouse_baud(struct uart_sunzilog_port *up) sunzilog_change_mouse_baud() argument
285 unsigned int cur_cflag = up->cflag; sunzilog_change_mouse_baud()
288 up->cflag &= ~CBAUD; sunzilog_change_mouse_baud()
289 up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud); sunzilog_change_mouse_baud()
292 up->curregs[R12] = (brg & 0xff); sunzilog_change_mouse_baud()
293 up->curregs[R13] = (brg >> 8) & 0xff; sunzilog_change_mouse_baud()
294 sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(&up->port)); sunzilog_change_mouse_baud()
297 static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up, sunzilog_kbdms_receive_chars() argument
300 if (ZS_IS_KEYB(up)) { sunzilog_kbdms_receive_chars()
303 if (up->serio_open) sunzilog_kbdms_receive_chars()
304 serio_interrupt(&up->serio, ch, 0); sunzilog_kbdms_receive_chars()
306 } else if (ZS_IS_MOUSE(up)) { sunzilog_kbdms_receive_chars()
311 sunzilog_change_mouse_baud(up); sunzilog_kbdms_receive_chars()
318 if (up->serio_open) sunzilog_kbdms_receive_chars()
319 serio_interrupt(&up->serio, ch, 0); sunzilog_kbdms_receive_chars()
327 sunzilog_receive_chars(struct uart_sunzilog_port *up, sunzilog_receive_chars() argument
333 if (up->port.state != NULL) /* Unopened serial console */ sunzilog_receive_chars()
334 port = &up->port.state->port; sunzilog_receive_chars()
360 ch &= up->parity_mask; sunzilog_receive_chars()
362 if (unlikely(ZS_IS_KEYB(up)) || unlikely(ZS_IS_MOUSE(up))) { sunzilog_receive_chars()
363 sunzilog_kbdms_receive_chars(up, ch, 0); sunzilog_receive_chars()
369 up->port.icount.rx++; sunzilog_receive_chars()
373 up->port.icount.brk++; sunzilog_receive_chars()
374 if (uart_handle_break(&up->port)) sunzilog_receive_chars()
378 up->port.icount.parity++; sunzilog_receive_chars()
380 up->port.icount.frame++; sunzilog_receive_chars()
382 up->port.icount.overrun++; sunzilog_receive_chars()
383 r1 &= up->port.read_status_mask; sunzilog_receive_chars()
391 if (uart_handle_sysrq_char(&up->port, ch) || !port) sunzilog_receive_chars()
394 if (up->port.ignore_status_mask == 0xff || sunzilog_receive_chars()
395 (r1 & up->port.ignore_status_mask) == 0) { sunzilog_receive_chars()
405 static void sunzilog_status_handle(struct uart_sunzilog_port *up, sunzilog_status_handle() argument
418 if (ZS_IS_MOUSE(up)) sunzilog_status_handle()
419 sunzilog_kbdms_receive_chars(up, 0, 1); sunzilog_status_handle()
420 if (ZS_IS_CONS(up)) { sunzilog_status_handle()
435 if (ZS_WANTS_MODEM_STATUS(up)) { sunzilog_status_handle()
437 up->port.icount.dsr++; sunzilog_status_handle()
443 if ((status ^ up->prev_status) ^ DCD) sunzilog_status_handle()
444 uart_handle_dcd_change(&up->port, sunzilog_status_handle()
446 if ((status ^ up->prev_status) ^ CTS) sunzilog_status_handle()
447 uart_handle_cts_change(&up->port, sunzilog_status_handle()
450 wake_up_interruptible(&up->port.state->port.delta_msr_wait); sunzilog_status_handle()
453 up->prev_status = status; sunzilog_status_handle()
456 static void sunzilog_transmit_chars(struct uart_sunzilog_port *up, sunzilog_transmit_chars() argument
461 if (ZS_IS_CONS(up)) { sunzilog_transmit_chars()
477 up->flags &= ~SUNZILOG_FLAG_TX_ACTIVE; sunzilog_transmit_chars()
479 if (ZS_REGS_HELD(up)) { sunzilog_transmit_chars()
480 __load_zsregs(channel, up->curregs); sunzilog_transmit_chars()
481 up->flags &= ~SUNZILOG_FLAG_REGS_HELD; sunzilog_transmit_chars()
484 if (ZS_TX_STOPPED(up)) { sunzilog_transmit_chars()
485 up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; sunzilog_transmit_chars()
489 if (up->port.x_char) { sunzilog_transmit_chars()
490 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; sunzilog_transmit_chars()
491 writeb(up->port.x_char, &channel->data); sunzilog_transmit_chars()
495 up->port.icount.tx++; sunzilog_transmit_chars()
496 up->port.x_char = 0; sunzilog_transmit_chars()
500 if (up->port.state == NULL) sunzilog_transmit_chars()
502 xmit = &up->port.state->xmit; sunzilog_transmit_chars()
506 if (uart_tx_stopped(&up->port)) sunzilog_transmit_chars()
509 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; sunzilog_transmit_chars()
515 up->port.icount.tx++; sunzilog_transmit_chars()
518 uart_write_wakeup(&up->port); sunzilog_transmit_chars()
530 struct uart_sunzilog_port *up = dev_id; sunzilog_interrupt() local
532 while (up) { sunzilog_interrupt()
534 = ZILOG_CHANNEL_FROM_PORT(&up->port); sunzilog_interrupt()
538 spin_lock(&up->port.lock); sunzilog_interrupt()
549 port = sunzilog_receive_chars(up, channel); sunzilog_interrupt()
551 sunzilog_status_handle(up, channel); sunzilog_interrupt()
553 sunzilog_transmit_chars(up, channel); sunzilog_interrupt()
555 spin_unlock(&up->port.lock); sunzilog_interrupt()
561 up = up->next; sunzilog_interrupt()
562 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); sunzilog_interrupt()
564 spin_lock(&up->port.lock); sunzilog_interrupt()
572 port = sunzilog_receive_chars(up, channel); sunzilog_interrupt()
574 sunzilog_status_handle(up, channel); sunzilog_interrupt()
576 sunzilog_transmit_chars(up, channel); sunzilog_interrupt()
578 spin_unlock(&up->port.lock); sunzilog_interrupt()
583 up = up->next; sunzilog_interrupt()
647 struct uart_sunzilog_port *up = sunzilog_set_mctrl() local
664 up->curregs[R5] |= set_bits; sunzilog_set_mctrl()
665 up->curregs[R5] &= ~clear_bits; sunzilog_set_mctrl()
666 write_zsreg(channel, R5, up->curregs[R5]); sunzilog_set_mctrl()
672 struct uart_sunzilog_port *up = sunzilog_stop_tx() local
675 up->flags |= SUNZILOG_FLAG_TX_STOPPED; sunzilog_stop_tx()
681 struct uart_sunzilog_port *up = sunzilog_start_tx() local
686 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; sunzilog_start_tx()
687 up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; sunzilog_start_tx()
719 uart_write_wakeup(&up->port); sunzilog_start_tx()
726 struct uart_sunzilog_port *up = UART_ZILOG(port); sunzilog_stop_rx() local
729 if (ZS_IS_CONS(up)) sunzilog_stop_rx()
735 up->curregs[R1] &= ~RxINT_MASK; sunzilog_stop_rx()
736 sunzilog_maybe_update_regs(up, channel); sunzilog_stop_rx()
742 struct uart_sunzilog_port *up = sunzilog_enable_ms() local
747 new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); sunzilog_enable_ms()
748 if (new_reg != up->curregs[R15]) { sunzilog_enable_ms()
749 up->curregs[R15] = new_reg; sunzilog_enable_ms()
752 write_zsreg(channel, R15, up->curregs[R15] & ~WR7pEN); sunzilog_enable_ms()
759 struct uart_sunzilog_port *up = sunzilog_break_ctl() local
774 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; sunzilog_break_ctl()
775 if (new_reg != up->curregs[R5]) { sunzilog_break_ctl()
776 up->curregs[R5] = new_reg; sunzilog_break_ctl()
779 write_zsreg(channel, R5, up->curregs[R5]); sunzilog_break_ctl()
785 static void __sunzilog_startup(struct uart_sunzilog_port *up) __sunzilog_startup() argument
789 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); __sunzilog_startup()
790 up->prev_status = readb(&channel->control); __sunzilog_startup()
793 up->curregs[R3] |= RxENAB; __sunzilog_startup()
794 up->curregs[R5] |= TxENAB; __sunzilog_startup()
796 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; __sunzilog_startup()
797 sunzilog_maybe_update_regs(up, channel); __sunzilog_startup()
802 struct uart_sunzilog_port *up = UART_ZILOG(port); sunzilog_startup() local
805 if (ZS_IS_CONS(up)) sunzilog_startup()
809 __sunzilog_startup(up); sunzilog_startup()
841 struct uart_sunzilog_port *up = UART_ZILOG(port); sunzilog_shutdown() local
845 if (ZS_IS_CONS(up)) sunzilog_shutdown()
853 up->curregs[R3] &= ~RxENAB; sunzilog_shutdown()
854 up->curregs[R5] &= ~TxENAB; sunzilog_shutdown()
857 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); sunzilog_shutdown()
858 up->curregs[R5] &= ~SND_BRK; sunzilog_shutdown()
859 sunzilog_maybe_update_regs(up, channel); sunzilog_shutdown()
868 sunzilog_convert_to_zs(struct uart_sunzilog_port *up, unsigned int cflag, sunzilog_convert_to_zs() argument
872 up->curregs[R10] = NRZ; sunzilog_convert_to_zs()
873 up->curregs[R11] = TCBR | RCBR; sunzilog_convert_to_zs()
876 up->curregs[R4] &= ~XCLK_MASK; sunzilog_convert_to_zs()
877 up->curregs[R4] |= X16CLK; sunzilog_convert_to_zs()
878 up->curregs[R12] = brg & 0xff; sunzilog_convert_to_zs()
879 up->curregs[R13] = (brg >> 8) & 0xff; sunzilog_convert_to_zs()
880 up->curregs[R14] = BRSRC | BRENAB; sunzilog_convert_to_zs()
883 up->curregs[R3] &= ~RxN_MASK; sunzilog_convert_to_zs()
884 up->curregs[R5] &= ~TxN_MASK; sunzilog_convert_to_zs()
887 up->curregs[R3] |= Rx5; sunzilog_convert_to_zs()
888 up->curregs[R5] |= Tx5; sunzilog_convert_to_zs()
889 up->parity_mask = 0x1f; sunzilog_convert_to_zs()
892 up->curregs[R3] |= Rx6; sunzilog_convert_to_zs()
893 up->curregs[R5] |= Tx6; sunzilog_convert_to_zs()
894 up->parity_mask = 0x3f; sunzilog_convert_to_zs()
897 up->curregs[R3] |= Rx7; sunzilog_convert_to_zs()
898 up->curregs[R5] |= Tx7; sunzilog_convert_to_zs()
899 up->parity_mask = 0x7f; sunzilog_convert_to_zs()
903 up->curregs[R3] |= Rx8; sunzilog_convert_to_zs()
904 up->curregs[R5] |= Tx8; sunzilog_convert_to_zs()
905 up->parity_mask = 0xff; sunzilog_convert_to_zs()
908 up->curregs[R4] &= ~0x0c; sunzilog_convert_to_zs()
910 up->curregs[R4] |= SB2; sunzilog_convert_to_zs()
912 up->curregs[R4] |= SB1; sunzilog_convert_to_zs()
914 up->curregs[R4] |= PAR_ENAB; sunzilog_convert_to_zs()
916 up->curregs[R4] &= ~PAR_ENAB; sunzilog_convert_to_zs()
918 up->curregs[R4] |= PAR_EVEN; sunzilog_convert_to_zs()
920 up->curregs[R4] &= ~PAR_EVEN; sunzilog_convert_to_zs()
922 up->port.read_status_mask = Rx_OVR; sunzilog_convert_to_zs()
924 up->port.read_status_mask |= CRC_ERR | PAR_ERR; sunzilog_convert_to_zs()
926 up->port.read_status_mask |= BRK_ABRT; sunzilog_convert_to_zs()
928 up->port.ignore_status_mask = 0; sunzilog_convert_to_zs()
930 up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; sunzilog_convert_to_zs()
932 up->port.ignore_status_mask |= BRK_ABRT; sunzilog_convert_to_zs()
934 up->port.ignore_status_mask |= Rx_OVR; sunzilog_convert_to_zs()
938 up->port.ignore_status_mask = 0xff; sunzilog_convert_to_zs()
946 struct uart_sunzilog_port *up = sunzilog_set_termios() local
953 spin_lock_irqsave(&up->port.lock, flags); sunzilog_set_termios()
957 sunzilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); sunzilog_set_termios()
959 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) sunzilog_set_termios()
960 up->flags |= SUNZILOG_FLAG_MODEM_STATUS; sunzilog_set_termios()
962 up->flags &= ~SUNZILOG_FLAG_MODEM_STATUS; sunzilog_set_termios()
964 up->cflag = termios->c_cflag; sunzilog_set_termios()
966 sunzilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); sunzilog_set_termios()
970 spin_unlock_irqrestore(&up->port.lock, flags); sunzilog_set_termios()
975 struct uart_sunzilog_port *up = UART_ZILOG(port); sunzilog_type() local
977 return (up->flags & SUNZILOG_FLAG_ESCC) ? "zs (ESCC)" : "zs"; sunzilog_type()
1007 struct uart_sunzilog_port *up = sunzilog_get_poll_char() local
1010 = ZILOG_CHANNEL_FROM_PORT(&up->port); sunzilog_get_poll_char()
1035 ch &= up->parity_mask; sunzilog_get_poll_char()
1042 struct uart_sunzilog_port *up = sunzilog_put_poll_char() local
1045 sunzilog_putchar(&up->port, ch); sunzilog_put_poll_char()
1087 struct uart_sunzilog_port *up; sunzilog_alloc_tables() local
1098 up = &sunzilog_port_table[i]; sunzilog_alloc_tables()
1100 spin_lock_init(&up->port.lock); sunzilog_alloc_tables()
1103 sunzilog_irq_chain = up; sunzilog_alloc_tables()
1106 up->next = up + 1; sunzilog_alloc_tables()
1108 up->next = NULL; sunzilog_alloc_tables()
1159 struct uart_sunzilog_port *up = serio->port_data; sunzilog_serio_write() local
1164 sunzilog_putchar(&up->port, ch); sunzilog_serio_write()
1173 struct uart_sunzilog_port *up = serio->port_data; sunzilog_serio_open() local
1178 if (!up->serio_open) { sunzilog_serio_open()
1179 up->serio_open = 1; sunzilog_serio_open()
1190 struct uart_sunzilog_port *up = serio->port_data; sunzilog_serio_close() local
1194 up->serio_open = 0; sunzilog_serio_close()
1204 struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; sunzilog_console_write() local
1208 if (up->port.sysrq || oops_in_progress) sunzilog_console_write()
1209 locked = spin_trylock_irqsave(&up->port.lock, flags); sunzilog_console_write()
1211 spin_lock_irqsave(&up->port.lock, flags); sunzilog_console_write()
1213 uart_console_write(&up->port, s, count, sunzilog_putchar); sunzilog_console_write()
1217 spin_unlock_irqrestore(&up->port.lock, flags); sunzilog_console_write()
1222 struct uart_sunzilog_port *up = &sunzilog_port_table[con->index]; sunzilog_console_setup() local
1226 if (up->port.type != PORT_SUNZILOG) sunzilog_console_setup()
1233 sunserial_console_termios(con, up->port.dev->of_node); sunzilog_console_setup()
1252 spin_lock_irqsave(&up->port.lock, flags); sunzilog_console_setup()
1254 up->curregs[R15] |= BRKIE; sunzilog_console_setup()
1255 sunzilog_convert_to_zs(up, con->cflag, 0, brg); sunzilog_console_setup()
1257 sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); sunzilog_console_setup()
1258 __sunzilog_startup(up); sunzilog_console_setup()
1260 spin_unlock_irqrestore(&up->port.lock, flags); sunzilog_console_setup()
1284 static void sunzilog_init_kbdms(struct uart_sunzilog_port *up) sunzilog_init_kbdms() argument
1288 if (up->flags & SUNZILOG_FLAG_CONS_KEYB) { sunzilog_init_kbdms()
1289 up->cflag = B1200 | CS8 | CLOCAL | CREAD; sunzilog_init_kbdms()
1292 up->cflag = B4800 | CS8 | CLOCAL | CREAD; sunzilog_init_kbdms()
1296 up->curregs[R15] |= BRKIE; sunzilog_init_kbdms()
1298 sunzilog_convert_to_zs(up, up->cflag, 0, brg); sunzilog_init_kbdms()
1299 sunzilog_set_mctrl(&up->port, TIOCM_DTR | TIOCM_RTS); sunzilog_init_kbdms()
1300 __sunzilog_startup(up); sunzilog_init_kbdms()
1304 static void sunzilog_register_serio(struct uart_sunzilog_port *up) sunzilog_register_serio() argument
1306 struct serio *serio = &up->serio; sunzilog_register_serio()
1308 serio->port_data = up; sunzilog_register_serio()
1311 if (up->flags & SUNZILOG_FLAG_CONS_KEYB) { sunzilog_register_serio()
1320 ((up->flags & SUNZILOG_FLAG_CONS_KEYB) ? sunzilog_register_serio()
1327 serio->dev.parent = up->port.dev; sunzilog_register_serio()
1333 static void sunzilog_init_hw(struct uart_sunzilog_port *up) sunzilog_init_hw() argument
1339 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); sunzilog_init_hw()
1341 spin_lock_irqsave(&up->port.lock, flags); sunzilog_init_hw()
1342 if (ZS_IS_CHANNEL_A(up)) { sunzilog_init_hw()
1348 if (up->flags & (SUNZILOG_FLAG_CONS_KEYB | sunzilog_init_hw()
1350 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; sunzilog_init_hw()
1351 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; sunzilog_init_hw()
1352 up->curregs[R3] = RxENAB | Rx8; sunzilog_init_hw()
1353 up->curregs[R5] = TxENAB | Tx8; sunzilog_init_hw()
1354 up->curregs[R6] = 0x00; /* SDLC Address */ sunzilog_init_hw()
1355 up->curregs[R7] = 0x7E; /* SDLC Flag */ sunzilog_init_hw()
1356 up->curregs[R9] = NV; sunzilog_init_hw()
1357 up->curregs[R7p] = 0x00; sunzilog_init_hw()
1358 sunzilog_init_kbdms(up); sunzilog_init_hw()
1360 if (up->flags & SUNZILOG_FLAG_ISR_HANDLER) sunzilog_init_hw()
1361 up->curregs[R9] |= MIE; sunzilog_init_hw()
1362 write_zsreg(channel, R9, up->curregs[R9]); sunzilog_init_hw()
1365 up->parity_mask = 0xff; sunzilog_init_hw()
1366 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; sunzilog_init_hw()
1367 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; sunzilog_init_hw()
1368 up->curregs[R3] = RxENAB | Rx8; sunzilog_init_hw()
1369 up->curregs[R5] = TxENAB | Tx8; sunzilog_init_hw()
1370 up->curregs[R6] = 0x00; /* SDLC Address */ sunzilog_init_hw()
1371 up->curregs[R7] = 0x7E; /* SDLC Flag */ sunzilog_init_hw()
1372 up->curregs[R9] = NV; sunzilog_init_hw()
1373 up->curregs[R10] = NRZ; sunzilog_init_hw()
1374 up->curregs[R11] = TCBR | RCBR; sunzilog_init_hw()
1377 up->curregs[R12] = (brg & 0xff); sunzilog_init_hw()
1378 up->curregs[R13] = (brg >> 8) & 0xff; sunzilog_init_hw()
1379 up->curregs[R14] = BRSRC | BRENAB; sunzilog_init_hw()
1380 up->curregs[R15] = FIFOEN; /* Use FIFO if on ESCC */ sunzilog_init_hw()
1381 up->curregs[R7p] = TxFIFO_LVL | RxFIFO_LVL; sunzilog_init_hw()
1382 if (__load_zsregs(channel, up->curregs)) { sunzilog_init_hw()
1383 up->flags |= SUNZILOG_FLAG_ESCC; sunzilog_init_hw()
1386 if (up->flags & SUNZILOG_FLAG_ISR_HANDLER) sunzilog_init_hw()
1387 up->curregs[R9] |= MIE; sunzilog_init_hw()
1388 write_zsreg(channel, R9, up->curregs[R9]); sunzilog_init_hw()
1391 spin_unlock_irqrestore(&up->port.lock, flags); sunzilog_init_hw()
1394 if (up->flags & (SUNZILOG_FLAG_CONS_KEYB | sunzilog_init_hw()
1396 sunzilog_register_serio(up); sunzilog_init_hw()
1406 struct uart_sunzilog_port *up; zs_probe() local
1431 up = &sunzilog_port_table[inst * 2]; zs_probe()
1434 up[0].port.mapbase = op->resource[0].start + 0x00; zs_probe()
1435 up[0].port.membase = (void __iomem *) &rp->channelA; zs_probe()
1436 up[0].port.iotype = UPIO_MEM; zs_probe()
1437 up[0].port.irq = op->archdata.irqs[0]; zs_probe()
1438 up[0].port.uartclk = ZS_CLOCK; zs_probe()
1439 up[0].port.fifosize = 1; zs_probe()
1440 up[0].port.ops = &sunzilog_pops; zs_probe()
1441 up[0].port.type = PORT_SUNZILOG; zs_probe()
1442 up[0].port.flags = 0; zs_probe()
1443 up[0].port.line = (inst * 2) + 0; zs_probe()
1444 up[0].port.dev = &op->dev; zs_probe()
1445 up[0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A; zs_probe()
1447 up[0].flags |= SUNZILOG_FLAG_CONS_KEYB; zs_probe()
1448 sunzilog_init_hw(&up[0]); zs_probe()
1451 up[1].port.mapbase = op->resource[0].start + 0x04; zs_probe()
1452 up[1].port.membase = (void __iomem *) &rp->channelB; zs_probe()
1453 up[1].port.iotype = UPIO_MEM; zs_probe()
1454 up[1].port.irq = op->archdata.irqs[0]; zs_probe()
1455 up[1].port.uartclk = ZS_CLOCK; zs_probe()
1456 up[1].port.fifosize = 1; zs_probe()
1457 up[1].port.ops = &sunzilog_pops; zs_probe()
1458 up[1].port.type = PORT_SUNZILOG; zs_probe()
1459 up[1].port.flags = 0; zs_probe()
1460 up[1].port.line = (inst * 2) + 1; zs_probe()
1461 up[1].port.dev = &op->dev; zs_probe()
1462 up[1].flags |= 0; zs_probe()
1464 up[1].flags |= SUNZILOG_FLAG_CONS_MOUSE; zs_probe()
1465 sunzilog_init_hw(&up[1]); zs_probe()
1469 &sunzilog_reg, up[0].port.line, zs_probe()
1471 up->flags |= SUNZILOG_FLAG_IS_CONS; zs_probe()
1472 err = uart_add_one_port(&sunzilog_reg, &up[0].port); zs_probe()
1479 &sunzilog_reg, up[1].port.line, zs_probe()
1481 up->flags |= SUNZILOG_FLAG_IS_CONS; zs_probe()
1482 err = uart_add_one_port(&sunzilog_reg, &up[1].port); zs_probe()
1484 uart_remove_one_port(&sunzilog_reg, &up[0].port); zs_probe()
1494 (unsigned long long) up[0].port.mapbase, zs_probe()
1495 op->archdata.irqs[0], sunzilog_type(&up[0].port)); zs_probe()
1499 (unsigned long long) up[1].port.mapbase, zs_probe()
1500 op->archdata.irqs[0], sunzilog_type(&up[1].port)); zs_probe()
1504 platform_set_drvdata(op, &up[0]); zs_probe()
1509 static void zs_remove_one(struct uart_sunzilog_port *up) zs_remove_one() argument
1511 if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) { zs_remove_one()
1513 serio_unregister_port(&up->serio); zs_remove_one()
1516 uart_remove_one_port(&sunzilog_reg, &up->port); zs_remove_one()
1521 struct uart_sunzilog_port *up = platform_get_drvdata(op); zs_remove() local
1524 zs_remove_one(&up[0]); zs_remove()
1525 zs_remove_one(&up[1]); zs_remove()
1527 regs = sunzilog_chip_regs[up[0].port.line / 2]; zs_remove()
1581 struct uart_sunzilog_port *up = sunzilog_irq_chain; sunzilog_init() local
1588 while (up) { sunzilog_init()
1591 /* printk (KERN_INFO "Enable IRQ for ZILOG Hardware %p\n", up); */ sunzilog_init()
1592 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); sunzilog_init()
1593 up->flags |= SUNZILOG_FLAG_ISR_HANDLER; sunzilog_init()
1594 up->curregs[R9] |= MIE; sunzilog_init()
1595 write_zsreg(channel, R9, up->curregs[R9]); sunzilog_init()
1596 up = up->next; sunzilog_init()
1622 struct uart_sunzilog_port *up = sunzilog_irq_chain; sunzilog_exit() local
1625 while (up) { sunzilog_exit()
1628 /* printk (KERN_INFO "Disable IRQ for ZILOG Hardware %p\n", up); */ sunzilog_exit()
1629 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); sunzilog_exit()
1630 up->flags &= ~SUNZILOG_FLAG_ISR_HANDLER; sunzilog_exit()
1631 up->curregs[R9] &= ~MIE; sunzilog_exit()
1632 write_zsreg(channel, R9, up->curregs[R9]); sunzilog_exit()
1633 up = up->next; sunzilog_exit()
|
| H A D | serial_txx9.c | 173 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset) sio_in() argument
175 switch (up->port.iotype) { sio_in()
177 return __raw_readl(up->port.membase + offset); sio_in()
179 return inl(up->port.iobase + offset); sio_in()
184 sio_out(struct uart_txx9_port *up, int offset, int value) sio_out() argument
186 switch (up->port.iotype) { sio_out()
188 __raw_writel(value, up->port.membase + offset); sio_out()
191 outl(value, up->port.iobase + offset); sio_out()
197 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value) sio_mask() argument
199 sio_out(up, offset, sio_in(up, offset) & ~value); sio_mask()
202 sio_set(struct uart_txx9_port *up, int offset, unsigned int value) sio_set() argument
204 sio_out(up, offset, sio_in(up, offset) | value); sio_set()
208 sio_quot_set(struct uart_txx9_port *up, int quot) sio_quot_set() argument
212 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0); sio_quot_set()
214 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2); sio_quot_set()
216 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4); sio_quot_set()
218 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6); sio_quot_set()
220 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6); sio_quot_set()
230 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_stop_tx() local
231 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE); serial_txx9_stop_tx()
236 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_start_tx() local
237 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE); serial_txx9_start_tx()
242 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_stop_rx() local
243 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS; serial_txx9_stop_rx()
248 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_initialize() local
251 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST); serial_txx9_initialize()
256 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout) serial_txx9_initialize()
259 sio_set(up, TXX9_SIFCR, serial_txx9_initialize()
262 sio_out(up, TXX9_SILCR, serial_txx9_initialize()
264 ((up->port.flags & UPF_TXX9_USE_SCLK) ? serial_txx9_initialize()
266 sio_quot_set(up, uart_get_divisor(port, 9600)); serial_txx9_initialize()
267 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */); serial_txx9_initialize()
268 sio_out(up, TXX9_SIDICR, 0); serial_txx9_initialize()
272 receive_chars(struct uart_txx9_port *up, unsigned int *status) receive_chars() argument
281 ch = sio_in(up, TXX9_SIRFIFO); receive_chars()
283 up->port.icount.rx++; receive_chars()
287 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK; receive_chars()
295 up->port.icount.brk++; receive_chars()
302 if (uart_handle_break(&up->port)) receive_chars()
305 up->port.icount.parity++; receive_chars()
307 up->port.icount.frame++; receive_chars()
309 up->port.icount.overrun++; receive_chars()
323 disr &= up->port.read_status_mask; receive_chars()
332 if (uart_handle_sysrq_char(&up->port, ch)) receive_chars()
335 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag); receive_chars()
338 up->port.ignore_status_mask = next_ignore_status_mask; receive_chars()
339 disr = sio_in(up, TXX9_SIDISR); receive_chars()
341 spin_unlock(&up->port.lock); receive_chars()
342 tty_flip_buffer_push(&up->port.state->port); receive_chars()
343 spin_lock(&up->port.lock); receive_chars()
347 static inline void transmit_chars(struct uart_txx9_port *up) transmit_chars() argument
349 struct circ_buf *xmit = &up->port.state->xmit; transmit_chars()
352 if (up->port.x_char) { transmit_chars()
353 sio_out(up, TXX9_SITFIFO, up->port.x_char); transmit_chars()
354 up->port.icount.tx++; transmit_chars()
355 up->port.x_char = 0; transmit_chars()
358 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { transmit_chars()
359 serial_txx9_stop_tx(&up->port); transmit_chars()
365 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]); transmit_chars()
367 up->port.icount.tx++; transmit_chars()
373 uart_write_wakeup(&up->port); transmit_chars()
376 serial_txx9_stop_tx(&up->port); transmit_chars()
382 struct uart_txx9_port *up = dev_id; serial_txx9_interrupt() local
386 spin_lock(&up->port.lock); serial_txx9_interrupt()
387 status = sio_in(up, TXX9_SIDISR); serial_txx9_interrupt()
388 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE)) serial_txx9_interrupt()
392 spin_unlock(&up->port.lock); serial_txx9_interrupt()
397 receive_chars(up, &status); serial_txx9_interrupt()
399 transmit_chars(up); serial_txx9_interrupt()
401 sio_mask(up, TXX9_SIDISR, serial_txx9_interrupt()
404 spin_unlock(&up->port.lock); serial_txx9_interrupt()
415 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_tx_empty() local
419 spin_lock_irqsave(&up->port.lock, flags); serial_txx9_tx_empty()
420 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0; serial_txx9_tx_empty()
421 spin_unlock_irqrestore(&up->port.lock, flags); serial_txx9_tx_empty()
428 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_get_mctrl() local
433 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS; serial_txx9_get_mctrl()
434 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS; serial_txx9_get_mctrl()
441 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_set_mctrl() local
444 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); serial_txx9_set_mctrl()
446 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC); serial_txx9_set_mctrl()
451 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_break_ctl() local
454 spin_lock_irqsave(&up->port.lock, flags); serial_txx9_break_ctl()
456 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); serial_txx9_break_ctl()
458 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); serial_txx9_break_ctl()
459 spin_unlock_irqrestore(&up->port.lock, flags); serial_txx9_break_ctl()
466 static void wait_for_xmitr(struct uart_txx9_port *up) wait_for_xmitr() argument
470 /* Wait up to 10ms for the character(s) to be sent. */ wait_for_xmitr()
472 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS)) wait_for_xmitr()
475 /* Wait up to 1s for flow control if necessary */ wait_for_xmitr()
476 if (up->port.flags & UPF_CONS_FLOW) { wait_for_xmitr()
479 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS)) wait_for_xmitr()
495 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_get_poll_char() local
500 ier = sio_in(up, TXX9_SIDICR); serial_txx9_get_poll_char()
501 sio_out(up, TXX9_SIDICR, 0); serial_txx9_get_poll_char()
503 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID) serial_txx9_get_poll_char()
506 c = sio_in(up, TXX9_SIRFIFO); serial_txx9_get_poll_char()
512 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS); serial_txx9_get_poll_char()
513 sio_out(up, TXX9_SIDICR, ier); serial_txx9_get_poll_char()
521 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_put_poll_char() local
526 ier = sio_in(up, TXX9_SIDICR); serial_txx9_put_poll_char()
527 sio_out(up, TXX9_SIDICR, 0); serial_txx9_put_poll_char()
529 wait_for_xmitr(up); serial_txx9_put_poll_char()
533 sio_out(up, TXX9_SITFIFO, c); serial_txx9_put_poll_char()
539 wait_for_xmitr(up); serial_txx9_put_poll_char()
540 sio_out(up, TXX9_SIDICR, ier); serial_txx9_put_poll_char()
547 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_startup() local
555 sio_set(up, TXX9_SIFCR, serial_txx9_startup()
558 sio_mask(up, TXX9_SIFCR, serial_txx9_startup()
560 sio_out(up, TXX9_SIDICR, 0); serial_txx9_startup()
565 sio_out(up, TXX9_SIDISR, 0); serial_txx9_startup()
567 retval = request_irq(up->port.irq, serial_txx9_interrupt, serial_txx9_startup()
568 IRQF_SHARED, "serial_txx9", up); serial_txx9_startup()
575 spin_lock_irqsave(&up->port.lock, flags); serial_txx9_startup()
576 serial_txx9_set_mctrl(&up->port, up->port.mctrl); serial_txx9_startup()
577 spin_unlock_irqrestore(&up->port.lock, flags); serial_txx9_startup()
580 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); serial_txx9_startup()
585 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE); serial_txx9_startup()
592 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_shutdown() local
598 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */ serial_txx9_shutdown()
600 spin_lock_irqsave(&up->port.lock, flags); serial_txx9_shutdown()
601 serial_txx9_set_mctrl(&up->port, up->port.mctrl); serial_txx9_shutdown()
602 spin_unlock_irqrestore(&up->port.lock, flags); serial_txx9_shutdown()
607 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK); serial_txx9_shutdown()
610 if (up->port.cons && up->port.line == up->port.cons->index) { serial_txx9_shutdown()
611 free_irq(up->port.irq, up); serial_txx9_shutdown()
616 sio_set(up, TXX9_SIFCR, serial_txx9_shutdown()
619 sio_mask(up, TXX9_SIFCR, serial_txx9_shutdown()
623 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE); serial_txx9_shutdown()
625 free_irq(up->port.irq, up); serial_txx9_shutdown()
632 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_set_termios() local
643 cval = sio_in(up, TXX9_SILCR); serial_txx9_set_termios()
675 /* Set up FIFOs */ serial_txx9_set_termios()
683 spin_lock_irqsave(&up->port.lock, flags); serial_txx9_set_termios()
690 up->port.read_status_mask = TXX9_SIDISR_UOER | serial_txx9_set_termios()
693 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER; serial_txx9_set_termios()
695 up->port.read_status_mask |= TXX9_SIDISR_UBRK; serial_txx9_set_termios()
700 up->port.ignore_status_mask = 0; serial_txx9_set_termios()
702 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER; serial_txx9_set_termios()
704 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK; serial_txx9_set_termios()
710 up->port.ignore_status_mask |= TXX9_SIDISR_UOER; serial_txx9_set_termios()
717 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS; serial_txx9_set_termios()
721 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) { serial_txx9_set_termios()
722 sio_set(up, TXX9_SIFLCR, serial_txx9_set_termios()
725 sio_mask(up, TXX9_SIFLCR, serial_txx9_set_termios()
729 sio_out(up, TXX9_SILCR, cval); serial_txx9_set_termios()
730 sio_quot_set(up, quot); serial_txx9_set_termios()
731 sio_out(up, TXX9_SIFCR, fcr); serial_txx9_set_termios()
733 serial_txx9_set_mctrl(&up->port, up->port.mctrl); serial_txx9_set_termios()
734 spin_unlock_irqrestore(&up->port.lock, flags); serial_txx9_set_termios()
753 static int serial_txx9_request_resource(struct uart_txx9_port *up) serial_txx9_request_resource() argument
758 switch (up->port.iotype) { serial_txx9_request_resource()
760 if (!up->port.mapbase) serial_txx9_request_resource()
763 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) { serial_txx9_request_resource()
768 if (up->port.flags & UPF_IOREMAP) { serial_txx9_request_resource()
769 up->port.membase = ioremap(up->port.mapbase, size); serial_txx9_request_resource()
770 if (!up->port.membase) { serial_txx9_request_resource()
771 release_mem_region(up->port.mapbase, size); serial_txx9_request_resource()
778 if (!request_region(up->port.iobase, size, "serial_txx9")) serial_txx9_request_resource()
785 static void serial_txx9_release_resource(struct uart_txx9_port *up) serial_txx9_release_resource() argument
789 switch (up->port.iotype) { serial_txx9_release_resource()
791 if (!up->port.mapbase) serial_txx9_release_resource()
794 if (up->port.flags & UPF_IOREMAP) { serial_txx9_release_resource()
795 iounmap(up->port.membase); serial_txx9_release_resource()
796 up->port.membase = NULL; serial_txx9_release_resource()
799 release_mem_region(up->port.mapbase, size); serial_txx9_release_resource()
803 release_region(up->port.iobase, size); serial_txx9_release_resource()
810 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_release_port() local
811 serial_txx9_release_resource(up); serial_txx9_release_port()
816 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_request_port() local
817 return serial_txx9_request_resource(up); serial_txx9_request_port()
822 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_config_port() local
829 ret = serial_txx9_request_resource(up); serial_txx9_config_port()
833 up->port.fifosize = TXX9_SIO_TX_FIFO; serial_txx9_config_port()
836 if (up->port.line == up->port.cons->index) serial_txx9_config_port()
878 struct uart_txx9_port *up = &serial_txx9_ports[i]; serial_txx9_register_ports() local
880 up->port.line = i; serial_txx9_register_ports()
881 up->port.ops = &serial_txx9_pops; serial_txx9_register_ports()
882 up->port.dev = dev; serial_txx9_register_ports()
883 if (up->port.iobase || up->port.mapbase) serial_txx9_register_ports()
884 uart_add_one_port(drv, &up->port); serial_txx9_register_ports()
892 struct uart_txx9_port *up = to_uart_txx9_port(port); serial_txx9_console_putchar() local
894 wait_for_xmitr(up); serial_txx9_console_putchar()
895 sio_out(up, TXX9_SITFIFO, ch); serial_txx9_console_putchar()
907 struct uart_txx9_port *up = &serial_txx9_ports[co->index]; serial_txx9_console_write() local
913 ier = sio_in(up, TXX9_SIDICR); serial_txx9_console_write()
914 sio_out(up, TXX9_SIDICR, 0); serial_txx9_console_write()
918 flcr = sio_in(up, TXX9_SIFLCR); serial_txx9_console_write()
919 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES)) serial_txx9_console_write()
920 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES); serial_txx9_console_write()
922 uart_console_write(&up->port, s, count, serial_txx9_console_putchar); serial_txx9_console_write()
928 wait_for_xmitr(up); serial_txx9_console_write()
929 sio_out(up, TXX9_SIFLCR, flcr); serial_txx9_console_write()
930 sio_out(up, TXX9_SIDICR, ier); serial_txx9_console_write()
936 struct uart_txx9_port *up; serial_txx9_console_setup() local
949 up = &serial_txx9_ports[co->index]; serial_txx9_console_setup()
950 port = &up->port; serial_txx9_console_setup()
954 serial_txx9_initialize(&up->port); serial_txx9_console_setup()
1121 struct uart_txx9_port *up = &serial_txx9_ports[i]; serial_txx9_remove() local
1123 if (up->port.dev == &dev->dev) serial_txx9_remove()
1135 struct uart_txx9_port *up = &serial_txx9_ports[i]; serial_txx9_suspend() local
1137 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) serial_txx9_suspend()
1138 uart_suspend_port(&serial_txx9_reg, &up->port); serial_txx9_suspend()
1149 struct uart_txx9_port *up = &serial_txx9_ports[i]; serial_txx9_resume() local
1151 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) serial_txx9_resume()
1152 uart_resume_port(&serial_txx9_reg, &up->port); serial_txx9_resume()
1208 struct uart_txx9_port *up = pci_get_drvdata(dev); pciserial_txx9_remove_one() local
1210 if (up) { pciserial_txx9_remove_one()
1211 serial_txx9_unregister_port(up->port.line); pciserial_txx9_remove_one()
1219 struct uart_txx9_port *up = pci_get_drvdata(dev); pciserial_txx9_suspend_one() local
1221 if (up) pciserial_txx9_suspend_one()
1222 uart_suspend_port(&serial_txx9_reg, &up->port); pciserial_txx9_suspend_one()
1230 struct uart_txx9_port *up = pci_get_drvdata(dev); pciserial_txx9_resume_one() local
1234 if (up) pciserial_txx9_resume_one()
1235 uart_resume_port(&serial_txx9_reg, &up->port); pciserial_txx9_resume_one()
1314 struct uart_txx9_port *up = &serial_txx9_ports[i]; serial_txx9_exit() local
1315 if (up->port.iobase || up->port.mapbase) serial_txx9_exit()
1316 uart_remove_one_port(&serial_txx9_reg, &up->port); serial_txx9_exit()
|
| H A D | ip22zilog.c | 236 static void ip22zilog_maybe_update_regs(struct uart_ip22zilog_port *up, ip22zilog_maybe_update_regs() argument
239 if (!ZS_REGS_HELD(up)) { ip22zilog_maybe_update_regs()
240 if (ZS_TX_ACTIVE(up)) { ip22zilog_maybe_update_regs()
241 up->flags |= IP22ZILOG_FLAG_REGS_HELD; ip22zilog_maybe_update_regs()
243 __load_zsregs(channel, up->curregs); ip22zilog_maybe_update_regs()
251 static bool ip22zilog_receive_chars(struct uart_ip22zilog_port *up, ip22zilog_receive_chars() argument
256 bool push = up->port.state != NULL; ip22zilog_receive_chars()
274 ch &= up->parity_mask; ip22zilog_receive_chars()
278 r1 |= up->tty_break; ip22zilog_receive_chars()
282 up->port.icount.rx++; ip22zilog_receive_chars()
284 up->tty_break = 0; ip22zilog_receive_chars()
287 up->port.icount.brk++; ip22zilog_receive_chars()
293 up->port.icount.parity++; ip22zilog_receive_chars()
295 up->port.icount.frame++; ip22zilog_receive_chars()
297 up->port.icount.overrun++; ip22zilog_receive_chars()
298 r1 &= up->port.read_status_mask; ip22zilog_receive_chars()
307 if (uart_handle_sysrq_char(&up->port, ch)) ip22zilog_receive_chars()
311 uart_insert_char(&up->port, r1, Rx_OVR, ch, flag); ip22zilog_receive_chars()
316 static void ip22zilog_status_handle(struct uart_ip22zilog_port *up, ip22zilog_status_handle() argument
328 if (up->curregs[R15] & BRKIE) { ip22zilog_status_handle()
329 if ((status & BRK_ABRT) && !(up->prev_status & BRK_ABRT)) { ip22zilog_status_handle()
330 if (uart_handle_break(&up->port)) ip22zilog_status_handle()
331 up->tty_break = Rx_SYS; ip22zilog_status_handle()
333 up->tty_break = Rx_BRK; ip22zilog_status_handle()
337 if (ZS_WANTS_MODEM_STATUS(up)) { ip22zilog_status_handle()
339 up->port.icount.dsr++; ip22zilog_status_handle()
345 if ((status ^ up->prev_status) ^ DCD) ip22zilog_status_handle()
346 uart_handle_dcd_change(&up->port, ip22zilog_status_handle()
348 if ((status ^ up->prev_status) ^ CTS) ip22zilog_status_handle()
349 uart_handle_cts_change(&up->port, ip22zilog_status_handle()
352 wake_up_interruptible(&up->port.state->port.delta_msr_wait); ip22zilog_status_handle()
355 up->prev_status = status; ip22zilog_status_handle()
358 static void ip22zilog_transmit_chars(struct uart_ip22zilog_port *up, ip22zilog_transmit_chars() argument
363 if (ZS_IS_CONS(up)) { ip22zilog_transmit_chars()
379 up->flags &= ~IP22ZILOG_FLAG_TX_ACTIVE; ip22zilog_transmit_chars()
381 if (ZS_REGS_HELD(up)) { ip22zilog_transmit_chars()
382 __load_zsregs(channel, up->curregs); ip22zilog_transmit_chars()
383 up->flags &= ~IP22ZILOG_FLAG_REGS_HELD; ip22zilog_transmit_chars()
386 if (ZS_TX_STOPPED(up)) { ip22zilog_transmit_chars()
387 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; ip22zilog_transmit_chars()
391 if (up->port.x_char) { ip22zilog_transmit_chars()
392 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; ip22zilog_transmit_chars()
393 writeb(up->port.x_char, &channel->data); ip22zilog_transmit_chars()
397 up->port.icount.tx++; ip22zilog_transmit_chars()
398 up->port.x_char = 0; ip22zilog_transmit_chars()
402 if (up->port.state == NULL) ip22zilog_transmit_chars()
404 xmit = &up->port.state->xmit; ip22zilog_transmit_chars()
407 if (uart_tx_stopped(&up->port)) ip22zilog_transmit_chars()
410 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; ip22zilog_transmit_chars()
416 up->port.icount.tx++; ip22zilog_transmit_chars()
419 uart_write_wakeup(&up->port); ip22zilog_transmit_chars()
431 struct uart_ip22zilog_port *up = dev_id; ip22zilog_interrupt() local
433 while (up) { ip22zilog_interrupt()
435 = ZILOG_CHANNEL_FROM_PORT(&up->port); ip22zilog_interrupt()
439 spin_lock(&up->port.lock); ip22zilog_interrupt()
449 push = ip22zilog_receive_chars(up, channel); ip22zilog_interrupt()
451 ip22zilog_status_handle(up, channel); ip22zilog_interrupt()
453 ip22zilog_transmit_chars(up, channel); ip22zilog_interrupt()
455 spin_unlock(&up->port.lock); ip22zilog_interrupt()
458 tty_flip_buffer_push(&up->port.state->port); ip22zilog_interrupt()
461 up = up->next; ip22zilog_interrupt()
462 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); ip22zilog_interrupt()
465 spin_lock(&up->port.lock); ip22zilog_interrupt()
472 push = ip22zilog_receive_chars(up, channel); ip22zilog_interrupt()
474 ip22zilog_status_handle(up, channel); ip22zilog_interrupt()
476 ip22zilog_transmit_chars(up, channel); ip22zilog_interrupt()
478 spin_unlock(&up->port.lock); ip22zilog_interrupt()
481 tty_flip_buffer_push(&up->port.state->port); ip22zilog_interrupt()
483 up = up->next; ip22zilog_interrupt()
547 struct uart_ip22zilog_port *up = ip22zilog_set_mctrl() local
564 up->curregs[R5] |= set_bits; ip22zilog_set_mctrl()
565 up->curregs[R5] &= ~clear_bits; ip22zilog_set_mctrl()
566 write_zsreg(channel, R5, up->curregs[R5]); ip22zilog_set_mctrl()
572 struct uart_ip22zilog_port *up = ip22zilog_stop_tx() local
575 up->flags |= IP22ZILOG_FLAG_TX_STOPPED; ip22zilog_stop_tx()
581 struct uart_ip22zilog_port *up = ip22zilog_start_tx() local
586 up->flags |= IP22ZILOG_FLAG_TX_ACTIVE; ip22zilog_start_tx()
587 up->flags &= ~IP22ZILOG_FLAG_TX_STOPPED; ip22zilog_start_tx()
619 uart_write_wakeup(&up->port); ip22zilog_start_tx()
626 struct uart_ip22zilog_port *up = UART_ZILOG(port); ip22zilog_stop_rx() local
629 if (ZS_IS_CONS(up)) ip22zilog_stop_rx()
635 up->curregs[R1] &= ~RxINT_MASK; ip22zilog_stop_rx()
636 ip22zilog_maybe_update_regs(up, channel); ip22zilog_stop_rx()
642 struct uart_ip22zilog_port *up = ip22zilog_enable_ms() local
647 new_reg = up->curregs[R15] | (DCDIE | SYNCIE | CTSIE); ip22zilog_enable_ms()
648 if (new_reg != up->curregs[R15]) { ip22zilog_enable_ms()
649 up->curregs[R15] = new_reg; ip22zilog_enable_ms()
652 write_zsreg(channel, R15, up->curregs[R15]); ip22zilog_enable_ms()
659 struct uart_ip22zilog_port *up = ip22zilog_break_ctl() local
674 new_reg = (up->curregs[R5] | set_bits) & ~clear_bits; ip22zilog_break_ctl()
675 if (new_reg != up->curregs[R5]) { ip22zilog_break_ctl()
676 up->curregs[R5] = new_reg; ip22zilog_break_ctl()
679 write_zsreg(channel, R5, up->curregs[R5]); ip22zilog_break_ctl()
685 static void __ip22zilog_reset(struct uart_ip22zilog_port *up) __ip22zilog_reset() argument
690 if (up->flags & IP22ZILOG_FLAG_RESET_DONE) __ip22zilog_reset()
694 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); __ip22zilog_reset()
702 if (!ZS_IS_CHANNEL_A(up)) { __ip22zilog_reset()
703 up++; __ip22zilog_reset()
704 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); __ip22zilog_reset()
710 up->flags |= IP22ZILOG_FLAG_RESET_DONE; __ip22zilog_reset()
711 up->next->flags |= IP22ZILOG_FLAG_RESET_DONE; __ip22zilog_reset()
714 static void __ip22zilog_startup(struct uart_ip22zilog_port *up) __ip22zilog_startup() argument
718 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); __ip22zilog_startup()
720 __ip22zilog_reset(up); __ip22zilog_startup()
722 __load_zsregs(channel, up->curregs); __ip22zilog_startup()
724 write_zsreg(channel, R9, up->curregs[R9]); __ip22zilog_startup()
725 up->prev_status = readb(&channel->control); __ip22zilog_startup()
728 up->curregs[R3] |= RxENAB; __ip22zilog_startup()
729 up->curregs[R5] |= TxENAB; __ip22zilog_startup()
731 up->curregs[R1] |= EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; __ip22zilog_startup()
732 ip22zilog_maybe_update_regs(up, channel); __ip22zilog_startup()
737 struct uart_ip22zilog_port *up = UART_ZILOG(port); ip22zilog_startup() local
740 if (ZS_IS_CONS(up)) ip22zilog_startup()
744 __ip22zilog_startup(up); ip22zilog_startup()
776 struct uart_ip22zilog_port *up = UART_ZILOG(port); ip22zilog_shutdown() local
780 if (ZS_IS_CONS(up)) ip22zilog_shutdown()
788 up->curregs[R3] &= ~RxENAB; ip22zilog_shutdown()
789 up->curregs[R5] &= ~TxENAB; ip22zilog_shutdown()
792 up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK); ip22zilog_shutdown()
793 up->curregs[R5] &= ~SND_BRK; ip22zilog_shutdown()
794 ip22zilog_maybe_update_regs(up, channel); ip22zilog_shutdown()
803 ip22zilog_convert_to_zs(struct uart_ip22zilog_port *up, unsigned int cflag, ip22zilog_convert_to_zs() argument
807 up->curregs[R10] = NRZ; ip22zilog_convert_to_zs()
808 up->curregs[R11] = TCBR | RCBR; ip22zilog_convert_to_zs()
811 up->curregs[R4] &= ~XCLK_MASK; ip22zilog_convert_to_zs()
812 up->curregs[R4] |= X16CLK; ip22zilog_convert_to_zs()
813 up->curregs[R12] = brg & 0xff; ip22zilog_convert_to_zs()
814 up->curregs[R13] = (brg >> 8) & 0xff; ip22zilog_convert_to_zs()
815 up->curregs[R14] = BRENAB; ip22zilog_convert_to_zs()
818 up->curregs[3] &= ~RxN_MASK; ip22zilog_convert_to_zs()
819 up->curregs[5] &= ~TxN_MASK; ip22zilog_convert_to_zs()
822 up->curregs[3] |= Rx5; ip22zilog_convert_to_zs()
823 up->curregs[5] |= Tx5; ip22zilog_convert_to_zs()
824 up->parity_mask = 0x1f; ip22zilog_convert_to_zs()
827 up->curregs[3] |= Rx6; ip22zilog_convert_to_zs()
828 up->curregs[5] |= Tx6; ip22zilog_convert_to_zs()
829 up->parity_mask = 0x3f; ip22zilog_convert_to_zs()
832 up->curregs[3] |= Rx7; ip22zilog_convert_to_zs()
833 up->curregs[5] |= Tx7; ip22zilog_convert_to_zs()
834 up->parity_mask = 0x7f; ip22zilog_convert_to_zs()
838 up->curregs[3] |= Rx8; ip22zilog_convert_to_zs()
839 up->curregs[5] |= Tx8; ip22zilog_convert_to_zs()
840 up->parity_mask = 0xff; ip22zilog_convert_to_zs()
843 up->curregs[4] &= ~0x0c; ip22zilog_convert_to_zs()
845 up->curregs[4] |= SB2; ip22zilog_convert_to_zs()
847 up->curregs[4] |= SB1; ip22zilog_convert_to_zs()
849 up->curregs[4] |= PAR_ENAB; ip22zilog_convert_to_zs()
851 up->curregs[4] &= ~PAR_ENAB; ip22zilog_convert_to_zs()
853 up->curregs[4] |= PAR_EVEN; ip22zilog_convert_to_zs()
855 up->curregs[4] &= ~PAR_EVEN; ip22zilog_convert_to_zs()
857 up->port.read_status_mask = Rx_OVR; ip22zilog_convert_to_zs()
859 up->port.read_status_mask |= CRC_ERR | PAR_ERR; ip22zilog_convert_to_zs()
861 up->port.read_status_mask |= BRK_ABRT; ip22zilog_convert_to_zs()
863 up->port.ignore_status_mask = 0; ip22zilog_convert_to_zs()
865 up->port.ignore_status_mask |= CRC_ERR | PAR_ERR; ip22zilog_convert_to_zs()
867 up->port.ignore_status_mask |= BRK_ABRT; ip22zilog_convert_to_zs()
869 up->port.ignore_status_mask |= Rx_OVR; ip22zilog_convert_to_zs()
873 up->port.ignore_status_mask = 0xff; ip22zilog_convert_to_zs()
881 struct uart_ip22zilog_port *up = ip22zilog_set_termios() local
888 spin_lock_irqsave(&up->port.lock, flags); ip22zilog_set_termios()
892 ip22zilog_convert_to_zs(up, termios->c_cflag, termios->c_iflag, brg); ip22zilog_set_termios()
894 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) ip22zilog_set_termios()
895 up->flags |= IP22ZILOG_FLAG_MODEM_STATUS; ip22zilog_set_termios()
897 up->flags &= ~IP22ZILOG_FLAG_MODEM_STATUS; ip22zilog_set_termios()
899 ip22zilog_maybe_update_regs(up, ZILOG_CHANNEL_FROM_PORT(port)); ip22zilog_set_termios()
902 spin_unlock_irqrestore(&up->port.lock, flags); ip22zilog_set_termios()
1021 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; ip22zilog_console_write() local
1024 spin_lock_irqsave(&up->port.lock, flags); ip22zilog_console_write()
1025 uart_console_write(&up->port, s, count, ip22zilog_put_char); ip22zilog_console_write()
1027 spin_unlock_irqrestore(&up->port.lock, flags); ip22zilog_console_write()
1032 struct uart_ip22zilog_port *up = &ip22zilog_port_table[con->index]; ip22zilog_console_setup() local
1038 up->flags |= IP22ZILOG_FLAG_IS_CONS; ip22zilog_console_setup()
1042 spin_lock_irqsave(&up->port.lock, flags); ip22zilog_console_setup()
1044 up->curregs[R15] |= BRKIE; ip22zilog_console_setup()
1046 __ip22zilog_startup(up); ip22zilog_console_setup()
1048 spin_unlock_irqrestore(&up->port.lock, flags); ip22zilog_console_setup()
1052 return uart_set_options(&up->port, con, baud, parity, bits, flow); ip22zilog_console_setup()
1082 struct uart_ip22zilog_port *up; ip22zilog_prepare() local
1093 up = &ip22zilog_port_table[0]; ip22zilog_prepare()
1095 up[channel].next = &up[channel - 1]; ip22zilog_prepare()
1096 up[channel].next = NULL; ip22zilog_prepare()
1102 up[(chip * 2) + 0].port.membase = (char *) &rp->channelB; ip22zilog_prepare()
1103 up[(chip * 2) + 1].port.membase = (char *) &rp->channelA; ip22zilog_prepare()
1106 up[(chip * 2) + 0].port.mapbase = ip22zilog_prepare()
1108 up[(chip * 2) + 1].port.mapbase = ip22zilog_prepare()
1113 up[(chip * 2) + 0].port.iotype = UPIO_MEM; ip22zilog_prepare()
1114 up[(chip * 2) + 0].port.irq = zilog_irq; ip22zilog_prepare()
1115 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; ip22zilog_prepare()
1116 up[(chip * 2) + 0].port.fifosize = 1; ip22zilog_prepare()
1117 up[(chip * 2) + 0].port.ops = &ip22zilog_pops; ip22zilog_prepare()
1118 up[(chip * 2) + 0].port.type = PORT_IP22ZILOG; ip22zilog_prepare()
1119 up[(chip * 2) + 0].port.flags = 0; ip22zilog_prepare()
1120 up[(chip * 2) + 0].port.line = (chip * 2) + 0; ip22zilog_prepare()
1121 up[(chip * 2) + 0].flags = 0; ip22zilog_prepare()
1124 up[(chip * 2) + 1].port.iotype = UPIO_MEM; ip22zilog_prepare()
1125 up[(chip * 2) + 1].port.irq = zilog_irq; ip22zilog_prepare()
1126 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; ip22zilog_prepare()
1127 up[(chip * 2) + 1].port.fifosize = 1; ip22zilog_prepare()
1128 up[(chip * 2) + 1].port.ops = &ip22zilog_pops; ip22zilog_prepare()
1129 up[(chip * 2) + 1].port.type = PORT_IP22ZILOG; ip22zilog_prepare()
1130 up[(chip * 2) + 1].port.line = (chip * 2) + 1; ip22zilog_prepare()
1131 up[(chip * 2) + 1].flags |= IP22ZILOG_FLAG_IS_CHANNEL_A; ip22zilog_prepare()
1135 struct uart_ip22zilog_port *up = &ip22zilog_port_table[channel]; ip22zilog_prepare() local
1139 up->parity_mask = 0xff; ip22zilog_prepare()
1140 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; ip22zilog_prepare()
1141 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; ip22zilog_prepare()
1142 up->curregs[R3] = RxENAB | Rx8; ip22zilog_prepare()
1143 up->curregs[R5] = TxENAB | Tx8; ip22zilog_prepare()
1144 up->curregs[R9] = NV | MIE; ip22zilog_prepare()
1145 up->curregs[R10] = NRZ; ip22zilog_prepare()
1146 up->curregs[R11] = TCBR | RCBR; ip22zilog_prepare()
1148 up->curregs[R12] = (brg & 0xff); ip22zilog_prepare()
1149 up->curregs[R13] = (brg >> 8) & 0xff; ip22zilog_prepare()
1150 up->curregs[R14] = BRENAB; ip22zilog_prepare()
1172 struct uart_ip22zilog_port *up = &ip22zilog_port_table[i]; ip22zilog_ports_init() local
1174 uart_add_one_port(&ip22zilog_reg, &up->port); ip22zilog_ports_init()
1193 struct uart_ip22zilog_port *up; ip22zilog_exit() local
1196 up = &ip22zilog_port_table[i]; ip22zilog_exit()
1198 uart_remove_one_port(&ip22zilog_reg, &up->port); ip22zilog_exit()
1202 up = &ip22zilog_port_table[0]; ip22zilog_exit()
1204 if (up[(i * 2) + 0].port.mapbase) { ip22zilog_exit()
1205 iounmap((void*)up[(i * 2) + 0].port.mapbase); ip22zilog_exit()
1206 up[(i * 2) + 0].port.mapbase = 0; ip22zilog_exit()
1208 if (up[(i * 2) + 1].port.mapbase) { ip22zilog_exit()
1209 iounmap((void*)up[(i * 2) + 1].port.mapbase); ip22zilog_exit()
1210 up[(i * 2) + 1].port.mapbase = 0; ip22zilog_exit()
|
| H A D | m32r_sio.c | 224 static unsigned int sio_in(struct uart_sio_port *up, int offset) sio_in() argument
226 return __sio_in(up->port.iobase + offset); sio_in()
229 static void sio_out(struct uart_sio_port *up, int offset, int value) sio_out() argument
231 __sio_out(value, up->port.iobase + offset); sio_out()
234 static unsigned int serial_in(struct uart_sio_port *up, int offset) serial_in() argument
242 static void serial_out(struct uart_sio_port *up, int offset, int value) serial_out() argument
252 struct uart_sio_port *up = m32r_sio_stop_tx() local
255 if (up->ier & UART_IER_THRI) { m32r_sio_stop_tx()
256 up->ier &= ~UART_IER_THRI; m32r_sio_stop_tx()
257 serial_out(up, UART_IER, up->ier); m32r_sio_stop_tx()
264 struct uart_sio_port *up = m32r_sio_start_tx() local
266 struct circ_buf *xmit = &up->port.state->xmit; m32r_sio_start_tx()
268 if (!(up->ier & UART_IER_THRI)) { m32r_sio_start_tx()
269 up->ier |= UART_IER_THRI; m32r_sio_start_tx()
270 serial_out(up, UART_IER, up->ier); m32r_sio_start_tx()
272 serial_out(up, UART_TX, xmit->buf[xmit->tail]); m32r_sio_start_tx()
274 up->port.icount.tx++; m32r_sio_start_tx()
277 while((serial_in(up, UART_LSR) & UART_EMPTY) != UART_EMPTY); m32r_sio_start_tx()
279 struct uart_sio_port *up = m32r_sio_start_tx()
282 if (!(up->ier & UART_IER_THRI)) { m32r_sio_start_tx()
283 up->ier |= UART_IER_THRI; m32r_sio_start_tx()
284 serial_out(up, UART_IER, up->ier); m32r_sio_start_tx()
291 struct uart_sio_port *up = m32r_sio_stop_rx() local
294 up->ier &= ~UART_IER_RLSI; m32r_sio_stop_rx()
295 up->port.read_status_mask &= ~UART_LSR_DR; m32r_sio_stop_rx()
296 serial_out(up, UART_IER, up->ier); m32r_sio_stop_rx()
301 struct uart_sio_port *up = m32r_sio_enable_ms() local
304 up->ier |= UART_IER_MSI; m32r_sio_enable_ms()
305 serial_out(up, UART_IER, up->ier); m32r_sio_enable_ms()
308 static void receive_chars(struct uart_sio_port *up, int *status) receive_chars() argument
310 struct tty_port *port = &up->port.state->port; receive_chars()
316 ch = sio_in(up, SIORXB); receive_chars()
318 up->port.icount.rx++; receive_chars()
327 up->port.icount.brk++; receive_chars()
334 if (uart_handle_break(&up->port)) receive_chars()
337 up->port.icount.parity++; receive_chars()
339 up->port.icount.frame++; receive_chars()
341 up->port.icount.overrun++; receive_chars()
346 *status &= up->port.read_status_mask; receive_chars()
348 if (up->port.line == up->port.cons->index) { receive_chars()
350 *status |= up->lsr_break_flag; receive_chars()
351 up->lsr_break_flag = 0; receive_chars()
362 if (uart_handle_sysrq_char(&up->port, ch)) receive_chars()
364 if ((*status & up->port.ignore_status_mask) == 0) receive_chars()
376 *status = serial_in(up, UART_LSR); receive_chars()
379 spin_unlock(&up->port.lock); receive_chars()
381 spin_lock(&up->port.lock); receive_chars()
384 static void transmit_chars(struct uart_sio_port *up) transmit_chars() argument
386 struct circ_buf *xmit = &up->port.state->xmit; transmit_chars()
389 if (up->port.x_char) { transmit_chars()
391 serial_out(up, UART_TX, up->port.x_char); transmit_chars()
393 up->port.icount.tx++; transmit_chars()
394 up->port.x_char = 0; transmit_chars()
397 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { transmit_chars()
398 m32r_sio_stop_tx(&up->port); transmit_chars()
402 count = up->port.fifosize; transmit_chars()
404 serial_out(up, UART_TX, xmit->buf[xmit->tail]); transmit_chars()
406 up->port.icount.tx++; transmit_chars()
409 while (!(serial_in(up, UART_LSR) & UART_LSR_THRE)); transmit_chars()
414 uart_write_wakeup(&up->port); transmit_chars()
419 m32r_sio_stop_tx(&up->port); transmit_chars()
425 static inline void m32r_sio_handle_port(struct uart_sio_port *up, m32r_sio_handle_port() argument
431 receive_chars(up, &status); m32r_sio_handle_port()
433 transmit_chars(up); m32r_sio_handle_port()
470 struct uart_sio_port *up; m32r_sio_interrupt() local
473 up = list_entry(l, struct uart_sio_port, list); m32r_sio_interrupt()
475 sts = sio_in(up, SIOSTS); m32r_sio_interrupt()
477 spin_lock(&up->port.lock); m32r_sio_interrupt()
478 m32r_sio_handle_port(up, sts); m32r_sio_interrupt()
479 spin_unlock(&up->port.lock); m32r_sio_interrupt()
508 static void serial_do_unlink(struct irq_info *i, struct uart_sio_port *up) serial_do_unlink() argument
513 if (i->head == &up->list) serial_do_unlink()
515 list_del(&up->list); serial_do_unlink()
517 BUG_ON(i->head != &up->list); serial_do_unlink()
524 static int serial_link_irq_chain(struct uart_sio_port *up) serial_link_irq_chain() argument
526 struct irq_info *i = irq_lists + up->port.irq; serial_link_irq_chain()
532 list_add(&up->list, i->head); serial_link_irq_chain()
537 INIT_LIST_HEAD(&up->list); serial_link_irq_chain()
538 i->head = &up->list; serial_link_irq_chain()
541 ret = request_irq(up->port.irq, m32r_sio_interrupt, serial_link_irq_chain()
543 ret |= request_irq(up->port.irq + 1, m32r_sio_interrupt, serial_link_irq_chain()
546 serial_do_unlink(i, up); serial_link_irq_chain()
552 static void serial_unlink_irq_chain(struct uart_sio_port *up) serial_unlink_irq_chain() argument
554 struct irq_info *i = irq_lists + up->port.irq; serial_unlink_irq_chain()
559 free_irq(up->port.irq, i); serial_unlink_irq_chain()
560 free_irq(up->port.irq + 1, i); serial_unlink_irq_chain()
563 serial_do_unlink(i, up); serial_unlink_irq_chain()
571 struct uart_sio_port *up = (struct uart_sio_port *)data; m32r_sio_timeout() local
575 sts = sio_in(up, SIOSTS); m32r_sio_timeout()
577 spin_lock(&up->port.lock); m32r_sio_timeout()
578 m32r_sio_handle_port(up, sts); m32r_sio_timeout()
579 spin_unlock(&up->port.lock); m32r_sio_timeout()
582 timeout = up->port.timeout; m32r_sio_timeout()
584 mod_timer(&up->timer, jiffies + timeout); m32r_sio_timeout()
589 struct uart_sio_port *up = m32r_sio_tx_empty() local
594 spin_lock_irqsave(&up->port.lock, flags); m32r_sio_tx_empty()
595 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0; m32r_sio_tx_empty()
596 spin_unlock_irqrestore(&up->port.lock, flags); m32r_sio_tx_empty()
618 struct uart_sio_port *up = m32r_sio_startup() local
629 if (!up->port.irq) { m32r_sio_startup()
630 unsigned int timeout = up->port.timeout; m32r_sio_startup()
634 up->timer.data = (unsigned long)up; m32r_sio_startup()
635 mod_timer(&up->timer, jiffies + timeout); m32r_sio_startup()
637 retval = serial_link_irq_chain(up); m32r_sio_startup()
649 up->ier = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; m32r_sio_startup()
650 sio_out(up, SIOTRCR, up->ier); m32r_sio_startup()
662 struct uart_sio_port *up = m32r_sio_shutdown() local
668 up->ier = 0; m32r_sio_shutdown()
669 sio_out(up, SIOTRCR, 0); m32r_sio_shutdown()
677 if (!up->port.irq) m32r_sio_shutdown()
678 del_timer_sync(&up->timer); m32r_sio_shutdown()
680 serial_unlink_irq_chain(up); m32r_sio_shutdown()
692 struct uart_sio_port *up = m32r_sio_set_termios() local
739 spin_lock_irqsave(&up->port.lock, flags); m32r_sio_set_termios()
748 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; m32r_sio_set_termios()
750 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; m32r_sio_set_termios()
752 up->port.read_status_mask |= UART_LSR_BI; m32r_sio_set_termios()
757 up->port.ignore_status_mask = 0; m32r_sio_set_termios()
759 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; m32r_sio_set_termios()
761 up->port.ignore_status_mask |= UART_LSR_BI; m32r_sio_set_termios()
767 up->port.ignore_status_mask |= UART_LSR_OE; m32r_sio_set_termios()
774 up->port.ignore_status_mask |= UART_LSR_DR; m32r_sio_set_termios()
779 up->ier &= ~UART_IER_MSI; m32r_sio_set_termios()
780 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) m32r_sio_set_termios()
781 up->ier |= UART_IER_MSI; m32r_sio_set_termios()
783 serial_out(up, UART_IER, up->ier); m32r_sio_set_termios()
785 up->lcr = cval; /* Save LCR */ m32r_sio_set_termios()
786 spin_unlock_irqrestore(&up->port.lock, flags); m32r_sio_set_termios()
792 struct uart_sio_port *up = m32r_sio_pm() local
795 if (up->pm) m32r_sio_pm()
796 up->pm(port, state, oldstate); m32r_sio_pm()
805 m32r_sio_request_std_resource(struct uart_sio_port *up, struct resource **res) m32r_sio_request_std_resource() argument
807 unsigned int size = 8 << up->port.regshift; m32r_sio_request_std_resource()
813 switch (up->port.iotype) { m32r_sio_request_std_resource()
815 if (up->port.mapbase) { m32r_sio_request_std_resource()
817 *res = request_mem_region(up->port.mapbase, size, "serial"); m32r_sio_request_std_resource()
819 start = up->port.mapbase; m32r_sio_request_std_resource()
828 *res = request_region(up->port.iobase, size, "serial"); m32r_sio_request_std_resource()
838 struct uart_sio_port *up = m32r_sio_release_port() local
842 size <<= up->port.regshift; m32r_sio_release_port()
844 switch (up->port.iotype) { m32r_sio_release_port()
846 if (up->port.mapbase) { m32r_sio_release_port()
850 iounmap(up->port.membase); m32r_sio_release_port()
851 up->port.membase = NULL; m32r_sio_release_port()
853 start = up->port.mapbase; m32r_sio_release_port()
857 release_mem_region(start, 8 << up->port.regshift); m32r_sio_release_port()
862 start = up->port.iobase; m32r_sio_release_port()
866 release_region(start + offset, 8 << up->port.regshift); m32r_sio_release_port()
876 struct uart_sio_port *up = m32r_sio_request_port() local
881 ret = m32r_sio_request_std_resource(up, &res); m32r_sio_request_port()
886 if (ret == 0 && up->port.flags & UPF_IOREMAP) { m32r_sio_request_port()
889 up->port.membase = ioremap(up->port.mapbase, size); m32r_sio_request_port()
890 if (!up->port.membase) m32r_sio_request_port()
904 struct uart_sio_port *up = m32r_sio_config_port() local
908 spin_lock_irqsave(&up->port.lock, flags); m32r_sio_config_port()
910 up->port.fifosize = 1; m32r_sio_config_port()
912 spin_unlock_irqrestore(&up->port.lock, flags); m32r_sio_config_port()
946 struct uart_sio_port *up; m32r_sio_init_ports() local
954 for (i = 0, up = m32r_sio_ports; i < ARRAY_SIZE(old_serial_port); m32r_sio_init_ports()
955 i++, up++) { m32r_sio_init_ports()
956 up->port.iobase = old_serial_port[i].port; m32r_sio_init_ports()
957 up->port.irq = irq_canonicalize(old_serial_port[i].irq); m32r_sio_init_ports()
958 up->port.uartclk = old_serial_port[i].baud_base * 16; m32r_sio_init_ports()
959 up->port.flags = old_serial_port[i].flags; m32r_sio_init_ports()
960 up->port.membase = old_serial_port[i].iomem_base; m32r_sio_init_ports()
961 up->port.iotype = old_serial_port[i].io_type; m32r_sio_init_ports()
962 up->port.regshift = old_serial_port[i].iomem_reg_shift; m32r_sio_init_ports()
963 up->port.ops = &m32r_sio_pops; m32r_sio_init_ports()
974 struct uart_sio_port *up = &m32r_sio_ports[i]; m32r_sio_register_ports() local
976 up->port.line = i; m32r_sio_register_ports()
977 up->port.ops = &m32r_sio_pops; m32r_sio_register_ports()
978 init_timer(&up->timer); m32r_sio_register_ports()
979 up->timer.function = m32r_sio_timeout; m32r_sio_register_ports()
981 up->mcr_mask = ~0; m32r_sio_register_ports()
982 up->mcr_force = 0; m32r_sio_register_ports()
984 uart_add_one_port(drv, &up->port); m32r_sio_register_ports()
993 static inline void wait_for_xmitr(struct uart_sio_port *up) wait_for_xmitr() argument
997 /* Wait up to 10ms for the character(s) to be sent. */ wait_for_xmitr()
999 status = sio_in(up, SIOSTS); wait_for_xmitr()
1006 /* Wait up to 1s for flow control if necessary */ wait_for_xmitr()
1007 if (up->port.flags & UPF_CONS_FLOW) { wait_for_xmitr()
1016 struct uart_sio_port *up = m32r_sio_console_putchar() local
1019 wait_for_xmitr(up); m32r_sio_console_putchar()
1020 sio_out(up, SIOTXB, ch); m32r_sio_console_putchar()
1032 struct uart_sio_port *up = &m32r_sio_ports[co->index]; m32r_sio_console_write() local
1038 ier = sio_in(up, SIOTRCR); m32r_sio_console_write()
1039 sio_out(up, SIOTRCR, 0); m32r_sio_console_write()
1041 uart_console_write(&up->port, s, count, m32r_sio_console_putchar); m32r_sio_console_write()
1047 wait_for_xmitr(up); m32r_sio_console_write()
1048 sio_out(up, SIOTRCR, ier); m32r_sio_console_write()
|
| H A D | rp2.c | 237 static void rp2_rmw(struct rp2_uart_port *up, int reg, rp2_rmw() argument
240 u32 tmp = readl(up->base + reg); rp2_rmw()
243 writel(tmp, up->base + reg); rp2_rmw()
246 static void rp2_rmw_clr(struct rp2_uart_port *up, int reg, u32 val) rp2_rmw_clr() argument
248 rp2_rmw(up, reg, val, 0); rp2_rmw_clr()
251 static void rp2_rmw_set(struct rp2_uart_port *up, int reg, u32 val) rp2_rmw_set() argument
253 rp2_rmw(up, reg, 0, val); rp2_rmw_set()
256 static void rp2_mask_ch_irq(struct rp2_uart_port *up, int ch_num, rp2_mask_ch_irq() argument
261 spin_lock_irqsave(&up->card->card_lock, flags); rp2_mask_ch_irq()
263 irq_mask = readl(up->asic_base + RP2_CH_IRQ_MASK); rp2_mask_ch_irq()
268 writel(irq_mask, up->asic_base + RP2_CH_IRQ_MASK); rp2_mask_ch_irq()
270 spin_unlock_irqrestore(&up->card->card_lock, flags); rp2_mask_ch_irq()
275 struct rp2_uart_port *up = port_to_up(port); rp2_uart_tx_empty() local
283 spin_lock_irqsave(&up->port.lock, flags); rp2_uart_tx_empty()
284 tx_fifo_bytes = readw(up->base + RP2_TX_FIFO_COUNT); rp2_uart_tx_empty()
285 spin_unlock_irqrestore(&up->port.lock, flags); rp2_uart_tx_empty()
292 struct rp2_uart_port *up = port_to_up(port); rp2_uart_get_mctrl() local
295 status = readl(up->base + RP2_CHAN_STAT); rp2_uart_get_mctrl()
341 static void __rp2_uart_set_termios(struct rp2_uart_port *up, __rp2_uart_set_termios() argument
347 writew(baud_div - 1, up->base + RP2_BAUD); __rp2_uart_set_termios()
350 rp2_rmw(up, RP2_UART_CTL, __rp2_uart_set_termios()
359 rp2_rmw(up, RP2_TXRX_CTL, __rp2_uart_set_termios()
372 up->ucode + RP2_TX_SWFLOW); __rp2_uart_set_termios()
374 up->ucode + RP2_RX_SWFLOW); __rp2_uart_set_termios()
381 struct rp2_uart_port *up = port_to_up(port); rp2_uart_set_termios() local
396 __rp2_uart_set_termios(up, new->c_cflag, new->c_iflag, baud_div); rp2_uart_set_termios()
402 static void rp2_rx_chars(struct rp2_uart_port *up) rp2_rx_chars() argument
404 u16 bytes = readw(up->base + RP2_RX_FIFO_COUNT); rp2_rx_chars()
405 struct tty_port *port = &up->port.state->port; rp2_rx_chars()
408 u32 byte = readw(up->base + RP2_DATA_BYTE) | RP2_DUMMY_READ; rp2_rx_chars()
412 if (!uart_handle_sysrq_char(&up->port, ch)) rp2_rx_chars()
413 uart_insert_char(&up->port, byte, 0, ch, rp2_rx_chars()
424 uart_insert_char(&up->port, byte, rp2_rx_chars()
427 up->port.icount.rx++; rp2_rx_chars()
430 spin_unlock(&up->port.lock); rp2_rx_chars()
432 spin_lock(&up->port.lock); rp2_rx_chars()
435 static void rp2_tx_chars(struct rp2_uart_port *up) rp2_tx_chars() argument
437 u16 max_tx = FIFO_SIZE - readw(up->base + RP2_TX_FIFO_COUNT); rp2_tx_chars()
438 struct circ_buf *xmit = &up->port.state->xmit; rp2_tx_chars()
440 if (uart_tx_stopped(&up->port)) { rp2_tx_chars()
441 rp2_uart_stop_tx(&up->port); rp2_tx_chars()
446 if (up->port.x_char) { rp2_tx_chars()
447 writeb(up->port.x_char, up->base + RP2_DATA_BYTE); rp2_tx_chars()
448 up->port.x_char = 0; rp2_tx_chars()
449 up->port.icount.tx++; rp2_tx_chars()
453 rp2_uart_stop_tx(&up->port); rp2_tx_chars()
456 writeb(xmit->buf[xmit->tail], up->base + RP2_DATA_BYTE); rp2_tx_chars()
458 up->port.icount.tx++; rp2_tx_chars()
462 uart_write_wakeup(&up->port); rp2_tx_chars()
465 static void rp2_ch_interrupt(struct rp2_uart_port *up) rp2_ch_interrupt() argument
469 spin_lock(&up->port.lock); rp2_ch_interrupt()
475 status = readl(up->base + RP2_CHAN_STAT); rp2_ch_interrupt()
476 writel(status, up->base + RP2_CHAN_STAT); rp2_ch_interrupt()
479 rp2_rx_chars(up); rp2_ch_interrupt()
481 rp2_tx_chars(up); rp2_ch_interrupt()
483 wake_up_interruptible(&up->port.state->port.delta_msr_wait); rp2_ch_interrupt()
485 spin_unlock(&up->port.lock); rp2_ch_interrupt()
514 static inline void rp2_flush_fifos(struct rp2_uart_port *up) rp2_flush_fifos() argument
516 rp2_rmw_set(up, RP2_UART_CTL, rp2_flush_fifos()
518 readl(up->base + RP2_UART_CTL); rp2_flush_fifos()
520 rp2_rmw_clr(up, RP2_UART_CTL, rp2_flush_fifos()
526 struct rp2_uart_port *up = port_to_up(port); rp2_uart_startup() local
528 rp2_flush_fifos(up); rp2_uart_startup()
529 rp2_rmw(up, RP2_TXRX_CTL, RP2_TXRX_CTL_MSRIRQ_m, RP2_TXRX_CTL_RXIRQ_m); rp2_uart_startup()
530 rp2_rmw(up, RP2_TXRX_CTL, RP2_TXRX_CTL_RX_TRIG_m, rp2_uart_startup()
532 rp2_rmw(up, RP2_CHAN_STAT, 0, 0); rp2_uart_startup()
533 rp2_mask_ch_irq(up, up->idx, 1); rp2_uart_startup()
540 struct rp2_uart_port *up = port_to_up(port); rp2_uart_shutdown() local
546 rp2_mask_ch_irq(up, up->idx, 0); rp2_uart_shutdown()
547 rp2_rmw(up, RP2_CHAN_STAT, 0, 0); rp2_uart_shutdown()
633 static void rp2_init_port(struct rp2_uart_port *up, const struct firmware *fw) rp2_init_port() argument
637 writel(RP2_UART_CTL_RESET_CH_m, up->base + RP2_UART_CTL); rp2_init_port()
638 readl(up->base + RP2_UART_CTL); rp2_init_port()
641 writel(0, up->base + RP2_TXRX_CTL); rp2_init_port()
642 writel(0, up->base + RP2_UART_CTL); rp2_init_port()
643 readl(up->base + RP2_UART_CTL); rp2_init_port()
646 rp2_flush_fifos(up); rp2_init_port()
649 writeb(fw->data[i], up->ucode + i); rp2_init_port()
651 __rp2_uart_set_termios(up, CS8 | CREAD | CLOCAL, 0, DEFAULT_BAUD_DIV); rp2_init_port()
652 rp2_uart_set_mctrl(&up->port, 0); rp2_init_port()
654 writeb(RP2_RX_FIFO_ena, up->ucode + RP2_RX_FIFO); rp2_init_port()
655 rp2_rmw(up, RP2_UART_CTL, RP2_UART_CTL_MODE_m, rp2_init_port()
657 rp2_rmw_set(up, RP2_TXRX_CTL, rp2_init_port()
|
| H A D | etraxfs-uart.c | 51 struct uart_cris_port *up; cris_console_write() local
56 up = etraxfs_uart_ports[co->index]; cris_console_write()
58 if (!up) cris_console_write()
62 tr_dma_en = old = REG_RD(ser, up->regi_ser, rw_tr_dma_en); cris_console_write()
65 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en); cris_console_write()
73 stat = REG_RD(ser, up->regi_ser, r_stat_din); cris_console_write()
75 REG_WR_INT(ser, up->regi_ser, rw_dout, '\r'); cris_console_write()
79 stat = REG_RD(ser, up->regi_ser, r_stat_din); cris_console_write()
81 REG_WR_INT(ser, up->regi_ser, rw_dout, s[i]); cris_console_write()
86 REG_WR(ser, up->regi_ser, rw_tr_dma_en, old); cris_console_write()
137 static inline int crisv32_serial_get_rts(struct uart_cris_port *up) crisv32_serial_get_rts() argument
139 void __iomem *regi_ser = up->regi_ser; crisv32_serial_get_rts()
153 static inline void crisv32_serial_set_rts(struct uart_cris_port *up, crisv32_serial_set_rts() argument
156 void __iomem *regi_ser = up->regi_ser; crisv32_serial_set_rts()
172 static inline int crisv32_serial_get_cts(struct uart_cris_port *up) crisv32_serial_get_cts() argument
174 void __iomem *regi_ser = up->regi_ser; crisv32_serial_get_cts()
183 * function, so we don't mix up this case with possibly enabling transmission
184 * of queued-up data (in case that's disabled after *receiving* an XOFF or
193 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_send_xchar() local
198 void __iomem *regi_ser = up->regi_ser; etraxfs_uart_send_xchar()
232 up->port.icount.tx++; etraxfs_uart_send_xchar()
235 rstat = REG_RD(ser, up->regi_ser, r_stat_din); etraxfs_uart_send_xchar()
273 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_start_tx() local
276 if (up->write_ongoing) etraxfs_uart_start_tx()
280 up->write_ongoing = 1; etraxfs_uart_start_tx()
287 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_start_tx_bottom() local
288 void __iomem *regi_ser = up->regi_ser; etraxfs_uart_start_tx_bottom()
312 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_stop_tx() local
313 void __iomem *regi_ser = up->regi_ser; etraxfs_uart_stop_tx()
346 * those single characters without also giving go-ahead for queued up etraxfs_uart_stop_tx()
355 up->write_ongoing = 0; etraxfs_uart_stop_tx()
360 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_stop_rx() local
361 void __iomem *regi_ser = up->regi_ser; etraxfs_uart_stop_rx()
370 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_tx_empty() local
375 spin_lock_irqsave(&up->port.lock, flags); etraxfs_uart_tx_empty()
377 rstat = REG_RD(ser, up->regi_ser, r_stat_din); etraxfs_uart_tx_empty()
380 spin_unlock_irqrestore(&up->port.lock, flags); etraxfs_uart_tx_empty()
385 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_get_mctrl() local
389 if (crisv32_serial_get_rts(up)) etraxfs_uart_get_mctrl()
391 if (crisv32_serial_get_cts(up)) etraxfs_uart_get_mctrl()
393 return mctrl_gpio_get(up->gpios, &ret); etraxfs_uart_get_mctrl()
398 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_set_mctrl() local
400 crisv32_serial_set_rts(up, mctrl & TIOCM_RTS ? 1 : 0, 0); etraxfs_uart_set_mctrl()
401 mctrl_gpio_set(up->gpios, mctrl); etraxfs_uart_set_mctrl()
406 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_break_ctl() local
412 spin_lock_irqsave(&up->port.lock, flags); etraxfs_uart_break_ctl()
413 tr_ctrl = REG_RD(ser, up->regi_ser, rw_tr_ctrl); etraxfs_uart_break_ctl()
414 tr_dma_en = REG_RD(ser, up->regi_ser, rw_tr_dma_en); etraxfs_uart_break_ctl()
415 intr_mask = REG_RD(ser, up->regi_ser, rw_intr_mask); etraxfs_uart_break_ctl()
440 REG_WR(ser, up->regi_ser, rw_tr_ctrl, tr_ctrl); etraxfs_uart_break_ctl()
441 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tr_dma_en); etraxfs_uart_break_ctl()
442 REG_WR(ser, up->regi_ser, rw_intr_mask, intr_mask); etraxfs_uart_break_ctl()
444 spin_unlock_irqrestore(&up->port.lock, flags); etraxfs_uart_break_ctl()
448 transmit_chars_no_dma(struct uart_cris_port *up) transmit_chars_no_dma() argument
451 struct circ_buf *xmit = &up->port.state->xmit; transmit_chars_no_dma()
453 void __iomem *regi_ser = up->regi_ser; transmit_chars_no_dma()
457 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) { transmit_chars_no_dma()
465 up->write_ongoing = 0; transmit_chars_no_dma()
469 /* If the serport is fast, we send up to max_count bytes before transmit_chars_no_dma()
478 up->port.icount.tx++; transmit_chars_no_dma()
485 uart_write_wakeup(&up->port); transmit_chars_no_dma()
488 static void receive_chars_no_dma(struct uart_cris_port *up) receive_chars_no_dma() argument
498 rstat = REG_RD(ser, up->regi_ser, r_stat_din); receive_chars_no_dma()
499 icount = &up->port.icount; receive_chars_no_dma()
500 port = &up->port.state->port; receive_chars_no_dma()
503 stat_din = REG_RD(ser, up->regi_ser, rs_stat_din); receive_chars_no_dma()
507 REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr); receive_chars_no_dma()
534 rstat = REG_RD(ser, up->regi_ser, r_stat_din); receive_chars_no_dma()
536 spin_unlock(&up->port.lock); receive_chars_no_dma()
538 spin_lock(&up->port.lock); receive_chars_no_dma()
544 struct uart_cris_port *up = (struct uart_cris_port *)dev_id; ser_interrupt() local
548 spin_lock(&up->port.lock); ser_interrupt()
550 regi_ser = up->regi_ser; ser_interrupt()
562 receive_chars_no_dma(up); ser_interrupt()
567 transmit_chars_no_dma(up); ser_interrupt()
571 spin_unlock(&up->port.lock); ser_interrupt()
580 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_get_poll_char() local
583 stat = REG_RD(ser, up->regi_ser, rs_stat_din); etraxfs_uart_get_poll_char()
588 REG_WR(ser, up->regi_ser, rw_ack_intr, ack_intr); etraxfs_uart_get_poll_char()
597 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_put_poll_char() local
600 stat = REG_RD(ser, up->regi_ser, r_stat_din); etraxfs_uart_put_poll_char()
602 REG_WR_INT(ser, up->regi_ser, rw_dout, c); etraxfs_uart_put_poll_char()
608 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_startup() local
618 spin_lock_irqsave(&up->port.lock, flags); etraxfs_uart_startup()
620 REG_WR(ser, up->regi_ser, rw_intr_mask, ser_intr_mask); etraxfs_uart_startup()
622 etraxfs_uart_set_mctrl(&up->port, up->port.mctrl); etraxfs_uart_startup()
624 spin_unlock_irqrestore(&up->port.lock, flags); etraxfs_uart_startup()
631 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_shutdown() local
634 spin_lock_irqsave(&up->port.lock, flags); etraxfs_uart_shutdown()
642 etraxfs_uart_set_mctrl(&up->port, up->port.mctrl); etraxfs_uart_shutdown()
644 spin_unlock_irqrestore(&up->port.lock, flags); etraxfs_uart_shutdown()
652 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_set_termios() local
763 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en); etraxfs_uart_set_termios()
767 MODIFY_REG(up->regi_ser, rw_rec_baud_div, rx_baud_div); etraxfs_uart_set_termios()
768 MODIFY_REG(up->regi_ser, rw_rec_ctrl, rx_ctrl); etraxfs_uart_set_termios()
770 MODIFY_REG(up->regi_ser, rw_tr_baud_div, tx_baud_div); etraxfs_uart_set_termios()
771 MODIFY_REG(up->regi_ser, rw_tr_ctrl, tx_ctrl); etraxfs_uart_set_termios()
774 REG_WR(ser, up->regi_ser, rw_tr_dma_en, tx_dma_en); etraxfs_uart_set_termios()
776 xoff = REG_RD(ser, up->regi_ser, rw_xoff); etraxfs_uart_set_termios()
778 if (up->port.state && up->port.state->port.tty && etraxfs_uart_set_termios()
779 (up->port.state->port.tty->termios.c_iflag & IXON)) { etraxfs_uart_set_termios()
780 xoff.chr = STOP_CHAR(up->port.state->port.tty); etraxfs_uart_set_termios()
785 MODIFY_REG(up->regi_ser, rw_xoff, xoff); etraxfs_uart_set_termios()
792 REG_WR(ser, up->regi_ser, rw_xoff_clr, xoff_clr); etraxfs_uart_set_termios()
794 etraxfs_uart_set_mctrl(&up->port, up->port.mctrl); etraxfs_uart_set_termios()
795 spin_unlock_irqrestore(&up->port.lock, flags); etraxfs_uart_set_termios()
815 struct uart_cris_port *up = (struct uart_cris_port *)port; etraxfs_uart_config_port() local
817 up->port.type = PORT_CRIS; etraxfs_uart_config_port()
844 struct uart_cris_port *up = (struct uart_cris_port *)port; cris_serial_port_init() local
846 if (up->initialized) cris_serial_port_init()
848 up->initialized = 1; cris_serial_port_init()
852 port->irq = up->irq; cris_serial_port_init()
853 port->iobase = (unsigned long) up->regi_ser; cris_serial_port_init()
872 struct uart_cris_port *up; etraxfs_uart_probe() local
888 up = devm_kzalloc(&pdev->dev, sizeof(struct uart_cris_port), etraxfs_uart_probe()
890 if (!up) etraxfs_uart_probe()
893 up->irq = irq_of_parse_and_map(np, 0); etraxfs_uart_probe()
894 up->regi_ser = of_iomap(np, 0); etraxfs_uart_probe()
895 up->port.dev = &pdev->dev; etraxfs_uart_probe()
897 up->gpios = mctrl_gpio_init_noauto(&pdev->dev, 0); etraxfs_uart_probe()
898 if (IS_ERR(up->gpios)) etraxfs_uart_probe()
899 return PTR_ERR(up->gpios); etraxfs_uart_probe()
901 cris_serial_port_init(&up->port, dev_id); etraxfs_uart_probe()
903 etraxfs_uart_ports[dev_id] = up; etraxfs_uart_probe()
904 platform_set_drvdata(pdev, &up->port); etraxfs_uart_probe()
905 uart_add_one_port(&etraxfs_uart_driver, &up->port); etraxfs_uart_probe()
|
| /linux-4.4.14/drivers/mtd/maps/ |
| H A D | sun_uflash.c | 52 struct uflash_dev *up; uflash_devinit() local
64 up = kzalloc(sizeof(struct uflash_dev), GFP_KERNEL); uflash_devinit()
65 if (!up) { uflash_devinit()
71 memcpy(&up->map, &uflash_map_templ, sizeof(uflash_map_templ)); uflash_devinit()
73 up->map.size = resource_size(&op->resource[0]); uflash_devinit()
75 up->name = of_get_property(dp, "model", NULL); uflash_devinit()
76 if (up->name && 0 < strlen(up->name)) uflash_devinit()
77 up->map.name = up->name; uflash_devinit()
79 up->map.phys = op->resource[0].start; uflash_devinit()
81 up->map.virt = of_ioremap(&op->resource[0], 0, up->map.size, uflash_devinit()
83 if (!up->map.virt) { uflash_devinit()
85 kfree(up); uflash_devinit()
90 simple_map_init(&up->map); uflash_devinit()
93 up->mtd = do_map_probe("cfi_probe", &up->map); uflash_devinit()
94 if (!up->mtd) { uflash_devinit()
95 of_iounmap(&op->resource[0], up->map.virt, up->map.size); uflash_devinit()
96 kfree(up); uflash_devinit()
101 up->mtd->owner = THIS_MODULE; uflash_devinit()
103 mtd_device_register(up->mtd, NULL, 0); uflash_devinit()
105 dev_set_drvdata(&op->dev, up); uflash_devinit()
125 struct uflash_dev *up = dev_get_drvdata(&op->dev); uflash_remove() local
127 if (up->mtd) { uflash_remove()
128 mtd_device_unregister(up->mtd); uflash_remove()
129 map_destroy(up->mtd); uflash_remove()
131 if (up->map.virt) { uflash_remove()
132 of_iounmap(&op->resource[0], up->map.virt, up->map.size); uflash_remove()
133 up->map.virt = NULL; uflash_remove()
136 kfree(up); uflash_remove()
|
| /linux-4.4.14/drivers/tty/serial/8250/ |
| H A D | 8250_fsl.c | 31 struct uart_8250_port *up = up_to_u8250p(port); fsl8250_handle_irq() local
33 spin_lock_irqsave(&up->port.lock, flags); fsl8250_handle_irq()
37 spin_unlock_irqrestore(&up->port.lock, flags); fsl8250_handle_irq()
42 if (unlikely(up->lsr_saved_flags & UART_LSR_BI)) { fsl8250_handle_irq()
43 up->lsr_saved_flags &= ~UART_LSR_BI; fsl8250_handle_irq()
45 spin_unlock_irqrestore(&up->port.lock, flags); fsl8250_handle_irq()
49 lsr = orig_lsr = up->port.serial_in(&up->port, UART_LSR); fsl8250_handle_irq()
52 lsr = serial8250_rx_chars(up, lsr); fsl8250_handle_irq()
54 serial8250_modem_status(up); fsl8250_handle_irq()
57 serial8250_tx_chars(up); fsl8250_handle_irq()
59 up->lsr_saved_flags = orig_lsr; fsl8250_handle_irq()
60 spin_unlock_irqrestore(&up->port.lock, flags); fsl8250_handle_irq()
|
| H A D | 8250_omap.c | 118 static u32 uart_read(struct uart_8250_port *up, u32 reg) uart_read() argument
120 return readl(up->port.membase + (reg << up->port.regshift)); uart_read()
125 struct uart_8250_port *up = up_to_u8250p(port); omap8250_set_mctrl() local
126 struct omap8250_priv *priv = up->port.private_data; omap8250_set_mctrl()
135 lcr = serial_in(up, UART_LCR); omap8250_set_mctrl()
136 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); omap8250_set_mctrl()
141 serial_out(up, UART_EFR, priv->efr); omap8250_set_mctrl()
142 serial_out(up, UART_LCR, lcr); omap8250_set_mctrl()
154 static void omap_8250_mdr1_errataset(struct uart_8250_port *up, omap_8250_mdr1_errataset() argument
160 old_mdr1 = serial_in(up, UART_OMAP_MDR1); omap_8250_mdr1_errataset()
164 serial_out(up, UART_OMAP_MDR1, priv->mdr1); omap_8250_mdr1_errataset()
166 serial_out(up, UART_FCR, up->fcr | UART_FCR_CLEAR_XMIT | omap_8250_mdr1_errataset()
172 while (UART_LSR_THRE != (serial_in(up, UART_LSR) & omap_8250_mdr1_errataset()
177 dev_crit(up->port.dev, "Errata i202: timedout %x\n", omap_8250_mdr1_errataset()
178 serial_in(up, UART_LSR)); omap_8250_mdr1_errataset()
228 static void omap8250_update_scr(struct uart_8250_port *up, omap8250_update_scr() argument
233 old_scr = serial_in(up, UART_OMAP_SCR); omap8250_update_scr()
243 serial_out(up, UART_OMAP_SCR, omap8250_update_scr()
245 serial_out(up, UART_OMAP_SCR, priv->scr); omap8250_update_scr()
248 static void omap8250_update_mdr1(struct uart_8250_port *up, omap8250_update_mdr1() argument
252 omap_8250_mdr1_errataset(up, priv); omap8250_update_mdr1()
254 serial_out(up, UART_OMAP_MDR1, priv->mdr1); omap8250_update_mdr1()
257 static void omap8250_restore_regs(struct uart_8250_port *up) omap8250_restore_regs() argument
259 struct omap8250_priv *priv = up->port.private_data; omap8250_restore_regs()
260 struct uart_8250_dma *dma = up->dma; omap8250_restore_regs()
273 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); omap8250_restore_regs()
274 serial_out(up, UART_EFR, UART_EFR_ECB); omap8250_restore_regs()
276 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); omap8250_restore_regs()
277 serial_out(up, UART_MCR, UART_MCR_TCRTLR); omap8250_restore_regs()
278 serial_out(up, UART_FCR, up->fcr); omap8250_restore_regs()
280 omap8250_update_scr(up, priv); omap8250_restore_regs()
282 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); omap8250_restore_regs()
284 serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_RESTORE(16) | omap8250_restore_regs()
286 serial_out(up, UART_TI752_TLR, omap8250_restore_regs()
290 serial_out(up, UART_LCR, 0); omap8250_restore_regs()
293 serial_out(up, UART_MCR, up->mcr); omap8250_restore_regs()
294 serial_out(up, UART_IER, up->ier); omap8250_restore_regs()
296 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); omap8250_restore_regs()
297 serial_dl_write(up, priv->quot); omap8250_restore_regs()
299 serial_out(up, UART_EFR, priv->efr); omap8250_restore_regs()
302 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); omap8250_restore_regs()
303 serial_out(up, UART_XON1, priv->xon); omap8250_restore_regs()
304 serial_out(up, UART_XOFF1, priv->xoff); omap8250_restore_regs()
306 serial_out(up, UART_LCR, up->lcr); omap8250_restore_regs()
308 omap8250_update_mdr1(up, priv); omap8250_restore_regs()
310 up->port.ops->set_mctrl(&up->port, up->port.mctrl); omap8250_restore_regs()
321 struct uart_8250_port *up = omap_8250_set_termios() local
323 struct omap8250_priv *priv = up->port.private_data; omap_8250_set_termios()
372 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; omap_8250_set_termios()
374 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE; omap_8250_set_termios()
376 up->port.read_status_mask |= UART_LSR_BI; omap_8250_set_termios()
381 up->port.ignore_status_mask = 0; omap_8250_set_termios()
383 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE; omap_8250_set_termios()
385 up->port.ignore_status_mask |= UART_LSR_BI; omap_8250_set_termios()
391 up->port.ignore_status_mask |= UART_LSR_OE; omap_8250_set_termios()
398 up->port.ignore_status_mask |= UART_LSR_DR; omap_8250_set_termios()
403 up->ier &= ~UART_IER_MSI; omap_8250_set_termios()
404 if (UART_ENABLE_MS(&up->port, termios->c_cflag)) omap_8250_set_termios()
405 up->ier |= UART_IER_MSI; omap_8250_set_termios()
407 up->lcr = cval; omap_8250_set_termios()
427 up->fcr = UART_FCR_ENABLE_FIFO; omap_8250_set_termios()
428 up->fcr |= TRIGGER_FCR_MASK(TX_TRIGGER) << OMAP_UART_FCR_TX_TRIG; omap_8250_set_termios()
429 up->fcr |= TRIGGER_FCR_MASK(RX_TRIGGER) << OMAP_UART_FCR_RX_TRIG; omap_8250_set_termios()
434 if (up->dma) omap_8250_set_termios()
442 up->port.status &= ~(UPSTAT_AUTOCTS | UPSTAT_AUTORTS | UPSTAT_AUTOXOFF); omap_8250_set_termios()
444 if (termios->c_cflag & CRTSCTS && up->port.flags & UPF_HARD_FLOW) { omap_8250_set_termios()
446 up->port.status |= UPSTAT_AUTOCTS | UPSTAT_AUTORTS; omap_8250_set_termios()
448 } else if (up->port.flags & UPF_SOFT_FLOW) { omap_8250_set_termios()
460 up->port.status |= UPSTAT_AUTOXOFF; omap_8250_set_termios()
464 omap8250_restore_regs(up); omap_8250_set_termios()
466 spin_unlock_irq(&up->port.lock); omap_8250_set_termios()
485 struct uart_8250_port *up = up_to_u8250p(port); omap_8250_pm() local
489 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); omap_8250_pm()
490 efr = serial_in(up, UART_EFR); omap_8250_pm()
491 serial_out(up, UART_EFR, efr | UART_EFR_ECB); omap_8250_pm()
492 serial_out(up, UART_LCR, 0); omap_8250_pm()
494 serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0); omap_8250_pm()
495 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); omap_8250_pm()
496 serial_out(up, UART_EFR, efr); omap_8250_pm()
497 serial_out(up, UART_LCR, 0); omap_8250_pm()
503 static void omap_serial_fill_features_erratas(struct uart_8250_port *up, omap_serial_fill_features_erratas() argument
509 mvr = uart_read(up, UART_OMAP_MVER); omap_serial_fill_features_erratas()
529 dev_warn(up->port.dev, omap_serial_fill_features_erratas()
570 struct uart_8250_port *up = up_to_u8250p(port); omap8250_irq() local
575 if (up->dma) { omap8250_irq()
581 serial8250_rpm_get(up); omap8250_irq()
584 serial8250_rpm_put(up); omap8250_irq()
591 struct uart_8250_port *up = up_to_u8250p(port); omap_8250_startup() local
603 up->mcr = 0; omap_8250_startup()
604 serial_out(up, UART_FCR, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); omap_8250_startup()
606 serial_out(up, UART_LCR, UART_LCR_WLEN8); omap_8250_startup()
608 up->lsr_saved_flags = 0; omap_8250_startup()
609 up->msr_saved_flags = 0; omap_8250_startup()
611 if (up->dma) { omap_8250_startup()
612 ret = serial8250_request_dma(up); omap_8250_startup()
616 up->dma = NULL; omap_8250_startup()
625 up->ier = UART_IER_RLSI | UART_IER_RDI; omap_8250_startup()
626 serial_out(up, UART_IER, up->ier); omap_8250_startup()
629 up->capabilities |= UART_CAP_RPM; omap_8250_startup()
632 /* Enable module level wake up */ omap_8250_startup()
636 serial_out(up, UART_OMAP_WER, priv->wer); omap_8250_startup()
638 if (up->dma) omap_8250_startup()
639 up->dma->rx_dma(up, 0); omap_8250_startup()
653 struct uart_8250_port *up = up_to_u8250p(port); omap_8250_shutdown() local
657 if (up->dma) omap_8250_shutdown()
658 up->dma->rx_dma(up, UART_IIR_RX_TIMEOUT); omap_8250_shutdown()
662 serial_out(up, UART_OMAP_WER, 0); omap_8250_shutdown()
664 up->ier = 0; omap_8250_shutdown()
665 serial_out(up, UART_IER, 0); omap_8250_shutdown()
667 if (up->dma) omap_8250_shutdown()
668 serial8250_release_dma(up); omap_8250_shutdown()
673 if (up->lcr & UART_LCR_SBC) omap_8250_shutdown()
674 serial_out(up, UART_LCR, up->lcr & ~UART_LCR_SBC); omap_8250_shutdown()
675 serial_out(up, UART_FCR, UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT); omap_8250_shutdown()
686 struct uart_8250_port *up = omap_8250_throttle() local
692 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); omap_8250_throttle()
693 serial_out(up, UART_IER, up->ier); omap_8250_throttle()
703 struct uart_8250_port *up = omap_8250_unthrottle() local
709 up->ier |= UART_IER_RLSI | UART_IER_RDI; omap_8250_unthrottle()
710 serial_out(up, UART_IER, up->ier); omap_8250_unthrottle()
1005 struct uart_8250_port *up = up_to_u8250p(port); omap_8250_dma_handle_irq() local
1011 serial8250_rpm_get(up); omap_8250_dma_handle_irq()
1015 serial8250_rpm_put(up); omap_8250_dma_handle_irq()
1025 dma_err = omap_8250_rx_dma(up, iir); omap_8250_dma_handle_irq()
1027 status = serial8250_rx_chars(up, status); omap_8250_dma_handle_irq()
1028 omap_8250_rx_dma(up, 0); omap_8250_dma_handle_irq()
1031 serial8250_modem_status(up); omap_8250_dma_handle_irq()
1032 if (status & UART_LSR_THRE && up->dma->tx_err) { omap_8250_dma_handle_irq()
1033 if (uart_tx_stopped(&up->port) || omap_8250_dma_handle_irq()
1034 uart_circ_empty(&up->port.state->xmit)) { omap_8250_dma_handle_irq()
1035 up->dma->tx_err = 0; omap_8250_dma_handle_irq()
1036 serial8250_tx_chars(up); omap_8250_dma_handle_irq()
1042 dma_err = omap_8250_tx_dma(up); omap_8250_dma_handle_irq()
1044 serial8250_tx_chars(up); omap_8250_dma_handle_irq()
1049 serial8250_rpm_put(up); omap_8250_dma_handle_irq()
1092 struct uart_8250_port up; omap8250_probe() local
1110 memset(&up, 0, sizeof(up)); omap8250_probe()
1111 up.port.dev = &pdev->dev; omap8250_probe()
1112 up.port.mapbase = regs->start; omap8250_probe()
1113 up.port.membase = membase; omap8250_probe()
1114 up.port.irq = irq->start; omap8250_probe()
1123 up.port.type = PORT_8250; omap8250_probe()
1124 up.port.iotype = UPIO_MEM; omap8250_probe()
1125 up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE | UPF_SOFT_FLOW | omap8250_probe()
1127 up.port.private_data = priv; omap8250_probe()
1129 up.port.regshift = 2; omap8250_probe()
1130 up.port.fifosize = 64; omap8250_probe()
1131 up.tx_loadsz = 64; omap8250_probe()
1132 up.capabilities = UART_CAP_FIFO; omap8250_probe()
1140 up.capabilities |= UART_CAP_RPM; omap8250_probe()
1142 up.port.set_termios = omap_8250_set_termios; omap8250_probe()
1143 up.port.set_mctrl = omap8250_set_mctrl; omap8250_probe()
1144 up.port.pm = omap_8250_pm; omap8250_probe()
1145 up.port.startup = omap_8250_startup; omap8250_probe()
1146 up.port.shutdown = omap_8250_shutdown; omap8250_probe()
1147 up.port.throttle = omap_8250_throttle; omap8250_probe()
1148 up.port.unthrottle = omap_8250_unthrottle; omap8250_probe()
1156 &up.port.uartclk); omap8250_probe()
1169 up.port.line = ret; omap8250_probe()
1171 if (!up.port.uartclk) { omap8250_probe()
1172 up.port.uartclk = DEFAULT_CLK_SPEED; omap8250_probe()
1195 omap_serial_fill_features_erratas(&up, priv); omap8250_probe()
1196 up.port.handle_irq = omap8250_no_handle_irq; omap8250_probe()
1209 up.dma = &priv->omap8250_dma; omap8250_probe()
1227 ret = serial8250_register_8250_port(&up); omap8250_probe()
1297 static int omap8250_lost_context(struct uart_8250_port *up) omap8250_lost_context() argument
1301 val = serial_in(up, UART_OMAP_SCR); omap8250_lost_context()
1316 struct uart_8250_port *up = serial8250_get_port(priv->line); omap8250_soft_reset() local
1321 sysc = serial_in(up, UART_OMAP_SYSC); omap8250_soft_reset()
1325 serial_out(up, UART_OMAP_SYSC, sysc); omap8250_soft_reset()
1330 syss = serial_in(up, UART_OMAP_SYSS); omap8250_soft_reset()
1344 struct uart_8250_port *up; omap8250_runtime_suspend() local
1346 up = serial8250_get_port(priv->line); omap8250_runtime_suspend()
1354 if (uart_console(&up->port)) omap8250_runtime_suspend()
1366 omap8250_update_mdr1(up, priv); omap8250_runtime_suspend()
1369 if (up->dma && up->dma->rxchan) omap8250_runtime_suspend()
1370 omap_8250_rx_dma(up, UART_IIR_RX_TIMEOUT); omap8250_runtime_suspend()
1381 struct uart_8250_port *up; omap8250_runtime_resume() local
1388 up = serial8250_get_port(priv->line); omap8250_runtime_resume()
1389 loss_cntx = omap8250_lost_context(up); omap8250_runtime_resume()
1392 omap8250_restore_regs(up); omap8250_runtime_resume()
1394 if (up->dma && up->dma->rxchan) omap8250_runtime_resume()
1395 omap_8250_rx_dma(up, 0); omap8250_runtime_resume()
|
| H A D | 8250_port.c | 275 static int default_serial_dl_read(struct uart_8250_port *up) default_serial_dl_read() argument
277 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8; default_serial_dl_read()
281 static void default_serial_dl_write(struct uart_8250_port *up, int value) default_serial_dl_write() argument
283 serial_out(up, UART_DLL, value & 0xff); default_serial_dl_write()
284 serial_out(up, UART_DLM, value >> 8 & 0xff); default_serial_dl_write()
333 static int au_serial_dl_read(struct uart_8250_port *up) au_serial_dl_read() argument
335 return __raw_readl(up->port.membase + 0x28); au_serial_dl_read()
338 static void au_serial_dl_write(struct uart_8250_port *up, int value) au_serial_dl_write() argument
340 __raw_writel(value, up->port.membase + 0x28); au_serial_dl_write()
412 struct uart_8250_port *up = up_to_u8250p(p); set_io_from_upio() local
414 up->dl_read = default_serial_dl_read; set_io_from_upio()
415 up->dl_write = default_serial_dl_write; set_io_from_upio()
442 up->dl_read = au_serial_dl_read; set_io_from_upio()
443 up->dl_write = au_serial_dl_write; set_io_from_upio()
453 up->cur_iotype = p->iotype; set_io_from_upio()
476 static void serial_icr_write(struct uart_8250_port *up, int offset, int value) serial_icr_write() argument
478 serial_out(up, UART_SCR, offset); serial_icr_write()
479 serial_out(up, UART_ICR, value); serial_icr_write()
482 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset) serial_icr_read() argument
486 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD); serial_icr_read()
487 serial_out(up, UART_SCR, offset); serial_icr_read()
488 value = serial_in(up, UART_ICR); serial_icr_read()
489 serial_icr_write(up, UART_ACR, up->acr); serial_icr_read()
609 static int __enable_rsa(struct uart_8250_port *up) __enable_rsa() argument
614 mode = serial_in(up, UART_RSA_MSR); __enable_rsa()
618 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO); __enable_rsa()
619 mode = serial_in(up, UART_RSA_MSR); __enable_rsa()
624 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16; __enable_rsa()
629 static void enable_rsa(struct uart_8250_port *up) enable_rsa() argument
631 if (up->port.type == PORT_RSA) { enable_rsa()
632 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) { enable_rsa()
633 spin_lock_irq(&up->port.lock); enable_rsa()
634 __enable_rsa(up); enable_rsa()
635 spin_unlock_irq(&up->port.lock); enable_rsa()
637 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) enable_rsa()
638 serial_out(up, UART_RSA_FRR, 0); enable_rsa()
648 static void disable_rsa(struct uart_8250_port *up) disable_rsa() argument
653 if (up->port.type == PORT_RSA && disable_rsa()
654 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) { disable_rsa()
655 spin_lock_irq(&up->port.lock); disable_rsa()
657 mode = serial_in(up, UART_RSA_MSR); disable_rsa()
661 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO); disable_rsa()
662 mode = serial_in(up, UART_RSA_MSR); disable_rsa()
667 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16; disable_rsa()
668 spin_unlock_irq(&up->port.lock); disable_rsa()
677 static int size_fifo(struct uart_8250_port *up) size_fifo() argument
683 old_lcr = serial_in(up, UART_LCR); size_fifo()
684 serial_out(up, UART_LCR, 0); size_fifo()
685 old_fcr = serial_in(up, UART_FCR); size_fifo()
686 old_mcr = serial_in(up, UART_MCR); size_fifo()
687 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | size_fifo()
689 serial_out(up, UART_MCR, UART_MCR_LOOP); size_fifo()
690 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); size_fifo()
691 old_dl = serial_dl_read(up); size_fifo()
692 serial_dl_write(up, 0x0001); size_fifo()
693 serial_out(up, UART_LCR, 0x03); size_fifo()
695 serial_out(up, UART_TX, count); size_fifo()
697 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) && size_fifo()
699 serial_in(up, UART_RX); size_fifo()
700 serial_out(up, UART_FCR, old_fcr); size_fifo()
701 serial_out(up, UART_MCR, old_mcr); size_fifo()
702 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); size_fifo()
703 serial_dl_write(up, old_dl); size_fifo()
704 serial_out(up, UART_LCR, old_lcr); size_fifo()
741 static void autoconfig_has_efr(struct uart_8250_port *up) autoconfig_has_efr() argument
748 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; autoconfig_has_efr()
754 * Semiconductor clone chips lock up if you try writing to the autoconfig_has_efr()
767 up->acr = 0; autoconfig_has_efr()
768 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); autoconfig_has_efr()
769 serial_out(up, UART_EFR, UART_EFR_ECB); autoconfig_has_efr()
770 serial_out(up, UART_LCR, 0x00); autoconfig_has_efr()
771 id1 = serial_icr_read(up, UART_ID1); autoconfig_has_efr()
772 id2 = serial_icr_read(up, UART_ID2); autoconfig_has_efr()
773 id3 = serial_icr_read(up, UART_ID3); autoconfig_has_efr()
774 rev = serial_icr_read(up, UART_REV); autoconfig_has_efr()
780 up->port.type = PORT_16C950; autoconfig_has_efr()
788 up->bugs |= UART_BUG_QUOT; autoconfig_has_efr()
800 id1 = autoconfig_read_divisor_id(up); autoconfig_has_efr()
805 up->port.type = PORT_16850; autoconfig_has_efr()
818 if (size_fifo(up) == 64) autoconfig_has_efr()
819 up->port.type = PORT_16654; autoconfig_has_efr()
821 up->port.type = PORT_16650V2; autoconfig_has_efr()
829 static void autoconfig_8250(struct uart_8250_port *up) autoconfig_8250() argument
833 up->port.type = PORT_8250; autoconfig_8250()
835 scratch = serial_in(up, UART_SCR); autoconfig_8250()
836 serial_out(up, UART_SCR, 0xa5); autoconfig_8250()
837 status1 = serial_in(up, UART_SCR); autoconfig_8250()
838 serial_out(up, UART_SCR, 0x5a); autoconfig_8250()
839 status2 = serial_in(up, UART_SCR); autoconfig_8250()
840 serial_out(up, UART_SCR, scratch); autoconfig_8250()
843 up->port.type = PORT_16450; autoconfig_8250()
846 static int broken_efr(struct uart_8250_port *up) broken_efr() argument
853 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16) broken_efr()
865 static void autoconfig_16550a(struct uart_8250_port *up) autoconfig_16550a() argument
870 up->port.type = PORT_16550A; autoconfig_16550a()
871 up->capabilities |= UART_CAP_FIFO; autoconfig_16550a()
881 if (up->port.flags & UPF_EXAR_EFR) { autoconfig_16550a()
882 status1 = serial_in(up, UART_EXAR_DVID); autoconfig_16550a()
885 up->port.type = PORT_XR17V35X; autoconfig_16550a()
886 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR | autoconfig_16550a()
898 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); autoconfig_16550a()
899 if (serial_in(up, UART_EFR) == 0) { autoconfig_16550a()
900 serial_out(up, UART_EFR, 0xA8); autoconfig_16550a()
901 if (serial_in(up, UART_EFR) != 0) { autoconfig_16550a()
903 up->port.type = PORT_16650; autoconfig_16550a()
904 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP; autoconfig_16550a()
906 serial_out(up, UART_LCR, 0); autoconfig_16550a()
907 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | autoconfig_16550a()
909 status1 = serial_in(up, UART_IIR) >> 5; autoconfig_16550a()
910 serial_out(up, UART_FCR, 0); autoconfig_16550a()
911 serial_out(up, UART_LCR, 0); autoconfig_16550a()
914 up->port.type = PORT_16550A_FSL64; autoconfig_16550a()
918 serial_out(up, UART_EFR, 0); autoconfig_16550a()
926 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); autoconfig_16550a()
927 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) { autoconfig_16550a()
929 autoconfig_has_efr(up); autoconfig_16550a()
940 serial_out(up, UART_LCR, 0); autoconfig_16550a()
941 status1 = serial_in(up, UART_MCR); autoconfig_16550a()
942 serial_out(up, UART_LCR, 0xE0); autoconfig_16550a()
943 status2 = serial_in(up, 0x02); /* EXCR1 */ autoconfig_16550a()
946 serial_out(up, UART_LCR, 0); autoconfig_16550a()
947 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP); autoconfig_16550a()
948 serial_out(up, UART_LCR, 0xE0); autoconfig_16550a()
949 status2 = serial_in(up, 0x02); /* EXCR1 */ autoconfig_16550a()
950 serial_out(up, UART_LCR, 0); autoconfig_16550a()
951 serial_out(up, UART_MCR, status1); autoconfig_16550a()
956 serial_out(up, UART_LCR, 0xE0); autoconfig_16550a()
958 quot = serial_dl_read(up); autoconfig_16550a()
961 if (ns16550a_goto_highspeed(up)) autoconfig_16550a()
962 serial_dl_write(up, quot); autoconfig_16550a()
964 serial_out(up, UART_LCR, 0); autoconfig_16550a()
966 up->port.uartclk = 921600*16; autoconfig_16550a()
967 up->port.type = PORT_NS16550A; autoconfig_16550a()
968 up->capabilities |= UART_NATSEMI; autoconfig_16550a()
979 serial_out(up, UART_LCR, 0); autoconfig_16550a()
980 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); autoconfig_16550a()
981 status1 = serial_in(up, UART_IIR) >> 5; autoconfig_16550a()
982 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); autoconfig_16550a()
983 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A); autoconfig_16550a()
984 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE); autoconfig_16550a()
985 status2 = serial_in(up, UART_IIR) >> 5; autoconfig_16550a()
986 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); autoconfig_16550a()
987 serial_out(up, UART_LCR, 0); autoconfig_16550a()
992 up->port.type = PORT_16750; autoconfig_16550a()
993 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP; autoconfig_16550a()
1005 iersave = serial_in(up, UART_IER); autoconfig_16550a()
1006 serial_out(up, UART_IER, iersave & ~UART_IER_UUE); autoconfig_16550a()
1007 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) { autoconfig_16550a()
1012 serial_out(up, UART_IER, iersave | UART_IER_UUE); autoconfig_16550a()
1013 if (serial_in(up, UART_IER) & UART_IER_UUE) { autoconfig_16550a()
1019 up->port.type = PORT_XSCALE; autoconfig_16550a()
1020 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE; autoconfig_16550a()
1030 serial_out(up, UART_IER, iersave); autoconfig_16550a()
1035 if (up->port.flags & UPF_EXAR_EFR) { autoconfig_16550a()
1037 up->port.type = PORT_XR17D15X; autoconfig_16550a()
1038 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR | autoconfig_16550a()
1048 if (up->port.type == PORT_16550A && size_fifo(up) == 64) { autoconfig_16550a()
1049 up->port.type = PORT_U6_16550A; autoconfig_16550a()
1050 up->capabilities |= UART_CAP_AFE; autoconfig_16550a()
1061 static void autoconfig(struct uart_8250_port *up) autoconfig() argument
1065 struct uart_port *port = &up->port; autoconfig()
1081 up->capabilities = 0; autoconfig()
1082 up->bugs = 0; autoconfig()
1098 scratch = serial_in(up, UART_IER); autoconfig()
1099 serial_out(up, UART_IER, 0); autoconfig()
1107 scratch2 = serial_in(up, UART_IER) & 0x0f; autoconfig()
1108 serial_out(up, UART_IER, 0x0F); autoconfig()
1112 scratch3 = serial_in(up, UART_IER) & 0x0f; autoconfig()
1113 serial_out(up, UART_IER, scratch); autoconfig()
1125 save_mcr = serial_in(up, UART_MCR); autoconfig()
1126 save_lcr = serial_in(up, UART_LCR); autoconfig()
1138 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A); autoconfig()
1139 status1 = serial_in(up, UART_MSR) & 0xF0; autoconfig()
1140 serial_out(up, UART_MCR, save_mcr); autoconfig()
1158 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); autoconfig()
1159 serial_out(up, UART_EFR, 0); autoconfig()
1160 serial_out(up, UART_LCR, 0); autoconfig()
1162 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO); autoconfig()
1163 scratch = serial_in(up, UART_IIR) >> 6; autoconfig()
1167 autoconfig_8250(up); autoconfig()
1176 autoconfig_16550a(up); autoconfig()
1184 if (port->type == PORT_16550A && up->probe & UART_PROBE_RSA && autoconfig()
1185 __enable_rsa(up)) autoconfig()
1189 serial_out(up, UART_LCR, save_lcr); autoconfig()
1191 port->fifosize = uart_config[up->port.type].fifo_size; autoconfig()
1192 old_capabilities = up->capabilities; autoconfig()
1193 up->capabilities = uart_config[port->type].flags; autoconfig()
1194 up->tx_loadsz = uart_config[port->type].tx_loadsz; autoconfig()
1204 serial_out(up, UART_RSA_FRR, 0); autoconfig()
1206 serial_out(up, UART_MCR, save_mcr); autoconfig()
1207 serial8250_clear_fifos(up); autoconfig()
1208 serial_in(up, UART_RX); autoconfig()
1209 if (up->capabilities & UART_CAP_UUE) autoconfig()
1210 serial_out(up, UART_IER, UART_IER_UUE); autoconfig()
1212 serial_out(up, UART_IER, 0); autoconfig()
1216 if (up->capabilities != old_capabilities) { autoconfig()
1220 up->capabilities); autoconfig()
1227 static void autoconfig_irq(struct uart_8250_port *up) autoconfig_irq() argument
1229 struct uart_port *port = &up->port; autoconfig_irq()
1248 save_mcr = serial_in(up, UART_MCR); autoconfig_irq()
1249 save_ier = serial_in(up, UART_IER); autoconfig_irq()
1250 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2); autoconfig_irq()
1253 serial_out(up, UART_MCR, 0); autoconfig_irq()
1256 serial_out(up, UART_MCR, autoconfig_irq()
1259 serial_out(up, UART_MCR, autoconfig_irq()
1262 serial_out(up, UART_IER, 0x0f); /* enable all intrs */ autoconfig_irq()
1263 serial_in(up, UART_LSR); autoconfig_irq()
1264 serial_in(up, UART_RX); autoconfig_irq()
1265 serial_in(up, UART_IIR); autoconfig_irq()
1266 serial_in(up, UART_MSR); autoconfig_irq()
1267 serial_out(up, UART_TX, 0xFF); autoconfig_irq()
1271 serial_out(up, UART_MCR, save_mcr); autoconfig_irq()
1272 serial_out(up, UART_IER, save_ier); autoconfig_irq()
1294 struct uart_8250_port *up = up_to_u8250p(port); serial8250_stop_tx() local
1296 serial8250_rpm_get(up); serial8250_stop_tx()
1297 __stop_tx(up); serial8250_stop_tx()
1303 up->acr |= UART_ACR_TXDIS; serial8250_stop_tx()
1304 serial_icr_write(up, UART_ACR, up->acr); serial8250_stop_tx()
1306 serial8250_rpm_put(up); serial8250_stop_tx()
1311 struct uart_8250_port *up = up_to_u8250p(port); serial8250_start_tx() local
1313 serial8250_rpm_get_tx(up); serial8250_start_tx()
1315 if (up->dma && !up->dma->tx_dma(up)) serial8250_start_tx()
1318 if (!(up->ier & UART_IER_THRI)) { serial8250_start_tx()
1319 up->ier |= UART_IER_THRI; serial8250_start_tx()
1320 serial_port_out(port, UART_IER, up->ier); serial8250_start_tx()
1322 if (up->bugs & UART_BUG_TXEN) { serial8250_start_tx()
1324 lsr = serial_in(up, UART_LSR); serial8250_start_tx()
1325 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; serial8250_start_tx()
1327 serial8250_tx_chars(up); serial8250_start_tx()
1334 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) { serial8250_start_tx()
1335 up->acr &= ~UART_ACR_TXDIS; serial8250_start_tx()
1336 serial_icr_write(up, UART_ACR, up->acr); serial8250_start_tx()
1352 struct uart_8250_port *up = up_to_u8250p(port); serial8250_stop_rx() local
1354 serial8250_rpm_get(up); serial8250_stop_rx()
1356 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI); serial8250_stop_rx()
1357 up->port.read_status_mask &= ~UART_LSR_DR; serial8250_stop_rx()
1358 serial_port_out(port, UART_IER, up->ier); serial8250_stop_rx()
1360 serial8250_rpm_put(up); serial8250_stop_rx()
1365 struct uart_8250_port *up = serial8250_disable_ms() local
1369 if (up->bugs & UART_BUG_NOMSR) serial8250_disable_ms()
1372 up->ier &= ~UART_IER_MSI; serial8250_disable_ms()
1373 serial_port_out(port, UART_IER, up->ier); serial8250_disable_ms()
1378 struct uart_8250_port *up = up_to_u8250p(port); serial8250_enable_ms() local
1381 if (up->bugs & UART_BUG_NOMSR) serial8250_enable_ms()
1384 up->ier |= UART_IER_MSI; serial8250_enable_ms()
1386 serial8250_rpm_get(up); serial8250_enable_ms()
1387 serial_port_out(port, UART_IER, up->ier); serial8250_enable_ms()
1388 serial8250_rpm_put(up); serial8250_enable_ms()
1397 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr) serial8250_rx_chars() argument
1399 struct uart_port *port = &up->port; serial8250_rx_chars()
1406 ch = serial_in(up, UART_RX); serial8250_rx_chars()
1420 lsr |= up->lsr_saved_flags; serial8250_rx_chars()
1421 up->lsr_saved_flags = 0; serial8250_rx_chars()
1461 lsr = serial_in(up, UART_LSR); serial8250_rx_chars()
1470 void serial8250_tx_chars(struct uart_8250_port *up) serial8250_tx_chars() argument
1472 struct uart_port *port = &up->port; serial8250_tx_chars()
1477 serial_out(up, UART_TX, port->x_char); serial8250_tx_chars()
1487 __stop_tx(up); serial8250_tx_chars()
1491 count = up->tx_loadsz; serial8250_tx_chars()
1493 serial_out(up, UART_TX, xmit->buf[xmit->tail]); serial8250_tx_chars()
1498 if (up->capabilities & UART_CAP_HFIFO) { serial8250_tx_chars()
1515 if (uart_circ_empty(xmit) && !(up->capabilities & UART_CAP_RPM)) serial8250_tx_chars()
1516 __stop_tx(up); serial8250_tx_chars()
1521 unsigned int serial8250_modem_status(struct uart_8250_port *up) serial8250_modem_status() argument
1523 struct uart_port *port = &up->port; serial8250_modem_status()
1524 unsigned int status = serial_in(up, UART_MSR); serial8250_modem_status()
1526 status |= up->msr_saved_flags; serial8250_modem_status()
1527 up->msr_saved_flags = 0; serial8250_modem_status()
1528 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI && serial8250_modem_status()
1553 struct uart_8250_port *up = up_to_u8250p(port); serial8250_handle_irq() local
1566 if (up->dma) serial8250_handle_irq()
1567 dma_err = up->dma->rx_dma(up, iir); serial8250_handle_irq()
1569 if (!up->dma || dma_err) serial8250_handle_irq()
1570 status = serial8250_rx_chars(up, status); serial8250_handle_irq()
1572 serial8250_modem_status(up); serial8250_handle_irq()
1573 if ((!up->dma || (up->dma && up->dma->tx_err)) && serial8250_handle_irq()
1575 serial8250_tx_chars(up); serial8250_handle_irq()
1584 struct uart_8250_port *up = up_to_u8250p(port); serial8250_default_handle_irq() local
1588 serial8250_rpm_get(up); serial8250_default_handle_irq()
1593 serial8250_rpm_put(up); serial8250_default_handle_irq()
1624 struct uart_8250_port *up = up_to_u8250p(port); serial8250_tx_empty() local
1628 serial8250_rpm_get(up); serial8250_tx_empty()
1632 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; serial8250_tx_empty()
1635 serial8250_rpm_put(up); serial8250_tx_empty()
1642 struct uart_8250_port *up = up_to_u8250p(port); serial8250_get_mctrl() local
1646 serial8250_rpm_get(up); serial8250_get_mctrl()
1647 status = serial8250_modem_status(up); serial8250_get_mctrl()
1648 serial8250_rpm_put(up); serial8250_get_mctrl()
1664 struct uart_8250_port *up = up_to_u8250p(port); serial8250_do_set_mctrl() local
1678 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr; serial8250_do_set_mctrl()
1694 struct uart_8250_port *up = up_to_u8250p(port); serial8250_break_ctl() local
1697 serial8250_rpm_get(up); serial8250_break_ctl()
1700 up->lcr |= UART_LCR_SBC; serial8250_break_ctl()
1702 up->lcr &= ~UART_LCR_SBC; serial8250_break_ctl()
1703 serial_port_out(port, UART_LCR, up->lcr); serial8250_break_ctl()
1705 serial8250_rpm_put(up); serial8250_break_ctl()
1711 static void wait_for_xmitr(struct uart_8250_port *up, int bits) wait_for_xmitr() argument
1715 /* Wait up to 10ms for the character(s) to be sent. */ wait_for_xmitr()
1717 status = serial_in(up, UART_LSR); wait_for_xmitr()
1719 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS; wait_for_xmitr()
1728 /* Wait up to 1s for flow control if necessary */ wait_for_xmitr()
1729 if (up->port.flags & UPF_CONS_FLOW) { wait_for_xmitr()
1732 unsigned int msr = serial_in(up, UART_MSR); wait_for_xmitr()
1733 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS; wait_for_xmitr()
1750 struct uart_8250_port *up = up_to_u8250p(port); serial8250_get_poll_char() local
1754 serial8250_rpm_get(up); serial8250_get_poll_char()
1765 serial8250_rpm_put(up); serial8250_get_poll_char()
1774 struct uart_8250_port *up = up_to_u8250p(port); serial8250_put_poll_char() local
1776 serial8250_rpm_get(up); serial8250_put_poll_char()
1781 if (up->capabilities & UART_CAP_UUE) serial8250_put_poll_char()
1786 wait_for_xmitr(up, BOTH_EMPTY); serial8250_put_poll_char()
1796 wait_for_xmitr(up, BOTH_EMPTY); serial8250_put_poll_char()
1798 serial8250_rpm_put(up); serial8250_put_poll_char()
1805 struct uart_8250_port *up = up_to_u8250p(port); serial8250_do_startup() local
1812 if (!up->tx_loadsz) serial8250_do_startup()
1813 up->tx_loadsz = uart_config[port->type].tx_loadsz; serial8250_do_startup()
1814 if (!up->capabilities) serial8250_do_startup()
1815 up->capabilities = uart_config[port->type].flags; serial8250_do_startup()
1816 up->mcr = 0; serial8250_do_startup()
1818 if (port->iotype != up->cur_iotype) serial8250_do_startup()
1821 serial8250_rpm_get(up); serial8250_do_startup()
1823 /* Wake up and initialize UART */ serial8250_do_startup()
1824 up->acr = 0; serial8250_do_startup()
1829 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */ serial8250_do_startup()
1837 * If this is an RSA port, see if we can kick it up to the serial8250_do_startup()
1840 enable_rsa(up); serial8250_do_startup()
1861 serial8250_clear_fifos(up); serial8250_do_startup()
1890 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B); serial8250_do_startup()
1892 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX); serial8250_do_startup()
1914 if (up->port.irqflags & IRQF_SHARED) serial8250_do_startup()
1917 wait_for_xmitr(up, UART_LSR_THRE); serial8250_do_startup()
1937 up->port.flags & UPF_BUG_THRE) { serial8250_do_startup()
1938 up->bugs |= UART_BUG_THRE; serial8250_do_startup()
1942 retval = up->ops->setup_irq(up); serial8250_do_startup()
1952 if (up->port.flags & UPF_FOURPORT) { serial8250_do_startup()
1953 if (!up->port.irq) serial8250_do_startup()
1954 up->port.mctrl |= TIOCM_OUT1; serial8250_do_startup()
1960 up->port.mctrl |= TIOCM_OUT2; serial8250_do_startup()
1975 if (up->port.flags & UPF_NO_TXEN_TEST) serial8250_do_startup()
1988 if (!(up->bugs & UART_BUG_TXEN)) { serial8250_do_startup()
1989 up->bugs |= UART_BUG_TXEN; serial8250_do_startup()
1994 up->bugs &= ~UART_BUG_TXEN; serial8250_do_startup()
2009 up->lsr_saved_flags = 0; serial8250_do_startup()
2010 up->msr_saved_flags = 0; serial8250_do_startup()
2015 if (up->dma) { serial8250_do_startup()
2016 retval = serial8250_request_dma(up); serial8250_do_startup()
2020 up->dma = NULL; serial8250_do_startup()
2029 up->ier = UART_IER_RLSI | UART_IER_RDI; serial8250_do_startup()
2042 serial8250_rpm_put(up); serial8250_do_startup()
2056 struct uart_8250_port *up = up_to_u8250p(port); serial8250_do_shutdown() local
2059 serial8250_rpm_get(up); serial8250_do_shutdown()
2063 up->ier = 0; serial8250_do_shutdown()
2066 if (up->dma) serial8250_do_shutdown()
2067 serial8250_release_dma(up); serial8250_do_shutdown()
2085 serial8250_clear_fifos(up); serial8250_do_shutdown()
2091 disable_rsa(up); serial8250_do_shutdown()
2099 serial8250_rpm_put(up); serial8250_do_shutdown()
2101 up->ops->release_irq(up); serial8250_do_shutdown()
2117 static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up, xr17v35x_get_divisor() argument
2121 struct uart_port *port = &up->port; xr17v35x_get_divisor()
2130 static unsigned int serial8250_get_divisor(struct uart_8250_port *up, serial8250_get_divisor() argument
2134 struct uart_port *port = &up->port; serial8250_get_divisor()
2148 else if (up->port.type == PORT_XR17V35X) serial8250_get_divisor()
2149 quot = xr17v35x_get_divisor(up, baud, frac); serial8250_get_divisor()
2156 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0) serial8250_get_divisor()
2162 static unsigned char serial8250_compute_lcr(struct uart_8250_port *up, serial8250_compute_lcr() argument
2187 if (up->bugs & UART_BUG_PARITY) serial8250_compute_lcr()
2188 up->fifo_bug = true; serial8250_compute_lcr()
2203 struct uart_8250_port *up = up_to_u8250p(port); serial8250_set_divisor() local
2206 if (is_omap1510_8250(up)) { serial8250_set_divisor()
2218 if (up->capabilities & UART_NATSEMI) serial8250_set_divisor()
2221 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB); serial8250_set_divisor()
2223 serial_dl_write(up, quot); serial8250_set_divisor()
2226 if (up->port.type == PORT_XR17V35X) serial8250_set_divisor()
2251 struct uart_8250_port *up = up_to_u8250p(port); serial8250_do_set_termios() local
2256 cval = serial8250_compute_lcr(up, termios->c_cflag); serial8250_do_set_termios()
2259 quot = serial8250_get_divisor(up, baud, &frac); serial8250_do_set_termios()
2265 serial8250_rpm_get(up); serial8250_do_set_termios()
2268 up->lcr = cval; /* Save computed LCR */ serial8250_do_set_termios()
2270 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) { serial8250_do_set_termios()
2272 if ((baud < 2400 && !up->dma) || up->fifo_bug) { serial8250_do_set_termios()
2273 up->fcr &= ~UART_FCR_TRIGGER_MASK; serial8250_do_set_termios()
2274 up->fcr |= UART_FCR_TRIGGER_1; serial8250_do_set_termios()
2286 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) { serial8250_do_set_termios()
2287 up->mcr &= ~UART_MCR_AFE; serial8250_do_set_termios()
2289 up->mcr |= UART_MCR_AFE; serial8250_do_set_termios()
2328 up->ier &= ~UART_IER_MSI; serial8250_do_set_termios()
2329 if (!(up->bugs & UART_BUG_NOMSR) && serial8250_do_set_termios()
2330 UART_ENABLE_MS(&up->port, termios->c_cflag)) serial8250_do_set_termios()
2331 up->ier |= UART_IER_MSI; serial8250_do_set_termios()
2332 if (up->capabilities & UART_CAP_UUE) serial8250_do_set_termios()
2333 up->ier |= UART_IER_UUE; serial8250_do_set_termios()
2334 if (up->capabilities & UART_CAP_RTOIE) serial8250_do_set_termios()
2335 up->ier |= UART_IER_RTOIE; serial8250_do_set_termios()
2337 serial_port_out(port, UART_IER, up->ier); serial8250_do_set_termios()
2339 if (up->capabilities & UART_CAP_EFR) { serial8250_do_set_termios()
2363 serial_port_out(port, UART_FCR, up->fcr); serial8250_do_set_termios()
2365 serial_port_out(port, UART_LCR, up->lcr); /* reset DLAB */ serial8250_do_set_termios()
2368 if (up->fcr & UART_FCR_ENABLE_FIFO) serial8250_do_set_termios()
2370 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */ serial8250_do_set_termios()
2374 serial8250_rpm_put(up); serial8250_do_set_termios()
2448 static int serial8250_request_std_resource(struct uart_8250_port *up) serial8250_request_std_resource() argument
2450 unsigned int size = serial8250_port_size(up); serial8250_request_std_resource()
2451 struct uart_port *port = &up->port; serial8250_request_std_resource()
2486 static void serial8250_release_std_resource(struct uart_8250_port *up) serial8250_release_std_resource() argument
2488 unsigned int size = serial8250_port_size(up); serial8250_release_std_resource()
2489 struct uart_port *port = &up->port; serial8250_release_std_resource()
2517 struct uart_8250_port *up = up_to_u8250p(port); serial8250_release_port() local
2519 serial8250_release_std_resource(up); serial8250_release_port()
2524 struct uart_8250_port *up = up_to_u8250p(port); serial8250_request_port() local
2526 return serial8250_request_std_resource(up); serial8250_request_port()
2529 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up) fcr_get_rxtrig_bytes() argument
2531 const struct serial8250_config *conf_type = &uart_config[up->port.type]; fcr_get_rxtrig_bytes()
2534 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)]; fcr_get_rxtrig_bytes()
2539 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes) bytes_to_fcr_rxtrig() argument
2541 const struct serial8250_config *conf_type = &uart_config[up->port.type]; bytes_to_fcr_rxtrig()
2560 struct uart_8250_port *up = do_get_rxtrig() local
2563 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1) do_get_rxtrig()
2566 return fcr_get_rxtrig_bytes(up); do_get_rxtrig()
2597 struct uart_8250_port *up = do_set_rxtrig() local
2601 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 || do_set_rxtrig()
2602 up->fifo_bug) do_set_rxtrig()
2605 rxtrig = bytes_to_fcr_rxtrig(up, bytes); do_set_rxtrig()
2609 serial8250_clear_fifos(up); do_set_rxtrig()
2610 up->fcr &= ~UART_FCR_TRIGGER_MASK; do_set_rxtrig()
2611 up->fcr |= (unsigned char)rxtrig; do_set_rxtrig()
2612 serial_out(up, UART_FCR, up->fcr); do_set_rxtrig()
2661 static void register_dev_spec_attr_grp(struct uart_8250_port *up) register_dev_spec_attr_grp() argument
2663 const struct serial8250_config *conf_type = &uart_config[up->port.type]; register_dev_spec_attr_grp()
2666 up->port.attr_group = &serial8250_dev_attr_group; register_dev_spec_attr_grp()
2671 struct uart_8250_port *up = up_to_u8250p(port); serial8250_config_port() local
2678 ret = serial8250_request_std_resource(up); serial8250_config_port()
2682 if (port->iotype != up->cur_iotype) serial8250_config_port()
2686 autoconfig(up); serial8250_config_port()
2690 up->bugs |= UART_BUG_NOMSR; serial8250_config_port()
2694 up->bugs |= UART_BUG_NOMSR; serial8250_config_port()
2697 autoconfig_irq(up); serial8250_config_port()
2700 serial8250_release_std_resource(up); serial8250_config_port()
2707 register_dev_spec_attr_grp(up); serial8250_config_port()
2708 up->fcr = uart_config[up->port.type].fcr; serial8250_config_port()
2759 void serial8250_init_port(struct uart_8250_port *up) serial8250_init_port() argument
2761 struct uart_port *port = &up->port; serial8250_init_port()
2766 up->cur_iotype = 0xFF; serial8250_init_port()
2770 void serial8250_set_defaults(struct uart_8250_port *up) serial8250_set_defaults() argument
2772 struct uart_port *port = &up->port; serial8250_set_defaults()
2774 if (up->port.flags & UPF_FIXED_TYPE) { serial8250_set_defaults()
2775 unsigned int type = up->port.type; serial8250_set_defaults()
2777 if (!up->port.fifosize) serial8250_set_defaults()
2778 up->port.fifosize = uart_config[type].fifo_size; serial8250_set_defaults()
2779 if (!up->tx_loadsz) serial8250_set_defaults()
2780 up->tx_loadsz = uart_config[type].tx_loadsz; serial8250_set_defaults()
2781 if (!up->capabilities) serial8250_set_defaults()
2782 up->capabilities = uart_config[type].flags; serial8250_set_defaults()
2788 if (up->dma) { serial8250_set_defaults()
2789 if (!up->dma->tx_dma) serial8250_set_defaults()
2790 up->dma->tx_dma = serial8250_tx_dma; serial8250_set_defaults()
2791 if (!up->dma->rx_dma) serial8250_set_defaults()
2792 up->dma->rx_dma = serial8250_rx_dma; serial8250_set_defaults()
2801 struct uart_8250_port *up = up_to_u8250p(port); serial8250_console_putchar() local
2803 wait_for_xmitr(up, UART_LSR_THRE); serial8250_console_putchar()
2810 static void serial8250_console_restore(struct uart_8250_port *up) serial8250_console_restore() argument
2812 struct uart_port *port = &up->port; serial8250_console_restore()
2821 quot = serial8250_get_divisor(up, baud, &frac); serial8250_console_restore()
2824 serial_port_out(port, UART_LCR, up->lcr); serial8250_console_restore()
2834 void serial8250_console_write(struct uart_8250_port *up, const char *s, serial8250_console_write() argument
2837 struct uart_port *port = &up->port; serial8250_console_write()
2844 serial8250_rpm_get(up); serial8250_console_write()
2858 if (up->capabilities & UART_CAP_UUE) serial8250_console_write()
2864 if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) { serial8250_console_write()
2865 serial8250_console_restore(up); serial8250_console_write()
2866 up->canary = 0; serial8250_console_write()
2875 wait_for_xmitr(up, BOTH_EMPTY); serial8250_console_write()
2885 if (up->msr_saved_flags) serial8250_console_write()
2886 serial8250_modem_status(up); serial8250_console_write()
2890 serial8250_rpm_put(up); serial8250_console_write()
|
| H A D | 8250_core.c | 123 struct uart_8250_port *up; serial8250_interrupt() local
126 up = list_entry(l, struct uart_8250_port, list); serial8250_interrupt()
127 port = &up->port; serial8250_interrupt()
159 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up) serial_do_unlink() argument
164 if (i->head == &up->list) serial_do_unlink()
166 list_del(&up->list); serial_do_unlink()
168 BUG_ON(i->head != &up->list); serial_do_unlink()
179 static int serial_link_irq_chain(struct uart_8250_port *up) serial_link_irq_chain() argument
184 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0; serial_link_irq_chain()
188 h = &irq_lists[up->port.irq % NR_IRQ_HASH]; serial_link_irq_chain()
192 if (i->irq == up->port.irq) hlist_for_each()
203 i->irq = up->port.irq;
211 list_add(&up->list, i->head);
216 INIT_LIST_HEAD(&up->list);
217 i->head = &up->list;
219 irq_flags |= up->port.irqflags;
220 ret = request_irq(up->port.irq, serial8250_interrupt,
223 serial_do_unlink(i, up);
229 static void serial_unlink_irq_chain(struct uart_8250_port *up) serial_unlink_irq_chain() argument
241 h = &irq_lists[up->port.irq % NR_IRQ_HASH]; serial_unlink_irq_chain()
245 if (i->irq == up->port.irq) hlist_for_each()
253 free_irq(up->port.irq, i);
255 serial_do_unlink(i, up);
267 struct uart_8250_port *up = (struct uart_8250_port *)data; serial8250_timeout() local
269 up->port.handle_irq(&up->port); serial8250_timeout()
270 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port)); serial8250_timeout()
275 struct uart_8250_port *up = (struct uart_8250_port *)data; serial8250_backup_timeout() local
279 spin_lock_irqsave(&up->port.lock, flags); serial8250_backup_timeout()
285 if (up->port.irq) { serial8250_backup_timeout()
286 ier = serial_in(up, UART_IER); serial8250_backup_timeout()
287 serial_out(up, UART_IER, 0); serial8250_backup_timeout()
290 iir = serial_in(up, UART_IIR); serial8250_backup_timeout()
298 lsr = serial_in(up, UART_LSR); serial8250_backup_timeout()
299 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS; serial8250_backup_timeout()
300 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) && serial8250_backup_timeout()
301 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) && serial8250_backup_timeout()
308 serial8250_tx_chars(up); serial8250_backup_timeout()
310 if (up->port.irq) serial8250_backup_timeout()
311 serial_out(up, UART_IER, ier); serial8250_backup_timeout()
313 spin_unlock_irqrestore(&up->port.lock, flags); serial8250_backup_timeout()
316 mod_timer(&up->timer, serial8250_backup_timeout()
317 jiffies + uart_poll_timeout(&up->port) + HZ / 5); serial8250_backup_timeout()
320 static int univ8250_setup_irq(struct uart_8250_port *up) univ8250_setup_irq() argument
322 struct uart_port *port = &up->port; univ8250_setup_irq()
329 if (up->bugs & UART_BUG_THRE) { univ8250_setup_irq()
332 up->timer.function = serial8250_backup_timeout; univ8250_setup_irq()
333 up->timer.data = (unsigned long)up; univ8250_setup_irq()
334 mod_timer(&up->timer, jiffies + univ8250_setup_irq()
344 up->timer.data = (unsigned long)up; univ8250_setup_irq()
345 mod_timer(&up->timer, jiffies + uart_poll_timeout(port)); univ8250_setup_irq()
347 retval = serial_link_irq_chain(up); univ8250_setup_irq()
352 static void univ8250_release_irq(struct uart_8250_port *up) univ8250_release_irq() argument
354 struct uart_port *port = &up->port; univ8250_release_irq()
356 del_timer_sync(&up->timer); univ8250_release_irq()
357 up->timer.function = serial8250_timeout; univ8250_release_irq()
359 serial_unlink_irq_chain(up); univ8250_release_irq()
363 static int serial8250_request_rsa_resource(struct uart_8250_port *up) serial8250_request_rsa_resource() argument
365 unsigned long start = UART_RSA_BASE << up->port.regshift; serial8250_request_rsa_resource()
366 unsigned int size = 8 << up->port.regshift; serial8250_request_rsa_resource()
367 struct uart_port *port = &up->port; serial8250_request_rsa_resource()
384 static void serial8250_release_rsa_resource(struct uart_8250_port *up) serial8250_release_rsa_resource() argument
386 unsigned long offset = UART_RSA_BASE << up->port.regshift; serial8250_release_rsa_resource()
387 unsigned int size = 8 << up->port.regshift; serial8250_release_rsa_resource()
388 struct uart_port *port = &up->port; serial8250_release_rsa_resource()
427 static void (*serial8250_isa_config)(int port, struct uart_port *up,
431 void (*v)(int port, struct uart_port *up, unsigned short *capabilities)) serial8250_set_isa_configurator()
441 struct uart_8250_port *up = up_to_u8250p(port); univ8250_config_port() local
443 up->probe &= ~UART_PROBE_RSA; univ8250_config_port()
445 if (serial8250_request_rsa_resource(up) == 0) univ8250_config_port()
446 up->probe |= UART_PROBE_RSA; univ8250_config_port()
451 if (probe_rsa[i] == up->port.iobase) { univ8250_config_port()
452 if (serial8250_request_rsa_resource(up) == 0) univ8250_config_port()
453 up->probe |= UART_PROBE_RSA; univ8250_config_port()
461 if (port->type != PORT_RSA && up->probe & UART_PROBE_RSA) univ8250_config_port()
462 serial8250_release_rsa_resource(up); univ8250_config_port()
467 struct uart_8250_port *up = up_to_u8250p(port); univ8250_request_port() local
472 ret = serial8250_request_rsa_resource(up); univ8250_request_port()
482 struct uart_8250_port *up = up_to_u8250p(port); univ8250_release_port() local
485 serial8250_release_rsa_resource(up); univ8250_release_port()
502 struct uart_8250_port *up; serial8250_isa_init_ports() local
514 struct uart_8250_port *up = &serial8250_ports[i]; serial8250_isa_init_ports() local
515 struct uart_port *port = &up->port; serial8250_isa_init_ports()
518 serial8250_init_port(up); serial8250_isa_init_ports()
523 init_timer(&up->timer); serial8250_isa_init_ports()
524 up->timer.function = serial8250_timeout; serial8250_isa_init_ports()
526 up->ops = &univ8250_driver_ops; serial8250_isa_init_ports()
531 up->mcr_mask = ~ALPHA_KLUDGE_MCR; serial8250_isa_init_ports()
532 up->mcr_force = ALPHA_KLUDGE_MCR; serial8250_isa_init_ports()
542 for (i = 0, up = serial8250_ports; serial8250_isa_init_ports()
544 i++, up++) { serial8250_isa_init_ports()
545 struct uart_port *port = &up->port; serial8250_isa_init_ports()
556 serial8250_set_defaults(up); serial8250_isa_init_ports()
560 serial8250_isa_config(i, &up->port, &up->capabilities); serial8250_isa_init_ports()
570 struct uart_8250_port *up = &serial8250_ports[i]; serial8250_register_ports() local
572 if (up->port.type == PORT_8250_CIR) serial8250_register_ports()
575 if (up->port.dev) serial8250_register_ports()
578 up->port.dev = dev; serial8250_register_ports()
581 up->port.flags |= UPF_NO_TXEN_TEST; serial8250_register_ports()
583 uart_add_one_port(drv, &up->port); serial8250_register_ports()
592 struct uart_8250_port *up = &serial8250_ports[co->index]; univ8250_console_write() local
594 serial8250_console_write(up, s, count); univ8250_console_write()
753 struct uart_8250_port *up = &serial8250_ports[line]; serial8250_suspend_port() local
754 struct uart_port *port = &up->port; serial8250_suspend_port()
759 serial_out(up, UART_SCR, canary); serial8250_suspend_port()
760 if (serial_in(up, UART_SCR) == canary) serial8250_suspend_port()
761 up->canary = canary; serial8250_suspend_port()
775 struct uart_8250_port *up = &serial8250_ports[line]; serial8250_resume_port() local
776 struct uart_port *port = &up->port; serial8250_resume_port()
778 up->canary = 0; serial8250_resume_port()
780 if (up->capabilities & UART_NATSEMI) { serial8250_resume_port()
784 ns16550a_goto_highspeed(up); serial8250_resume_port()
848 struct uart_8250_port *up = &serial8250_ports[i]; serial8250_remove() local
850 if (up->port.dev == &dev->dev) serial8250_remove()
861 struct uart_8250_port *up = &serial8250_ports[i]; serial8250_suspend() local
863 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) serial8250_suspend()
864 uart_suspend_port(&serial8250_reg, &up->port); serial8250_suspend()
875 struct uart_8250_port *up = &serial8250_ports[i]; serial8250_resume() local
877 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev) serial8250_resume()
946 * @up: serial port template
949 * port exists and is in use, it is hung up and unregistered
957 int serial8250_register_8250_port(struct uart_8250_port *up) serial8250_register_8250_port() argument
962 if (up->port.uartclk == 0) serial8250_register_8250_port()
967 uart = serial8250_find_match_or_unused(&up->port); serial8250_register_8250_port()
972 uart->port.iobase = up->port.iobase; serial8250_register_8250_port()
973 uart->port.membase = up->port.membase; serial8250_register_8250_port()
974 uart->port.irq = up->port.irq; serial8250_register_8250_port()
975 uart->port.irqflags = up->port.irqflags; serial8250_register_8250_port()
976 uart->port.uartclk = up->port.uartclk; serial8250_register_8250_port()
977 uart->port.fifosize = up->port.fifosize; serial8250_register_8250_port()
978 uart->port.regshift = up->port.regshift; serial8250_register_8250_port()
979 uart->port.iotype = up->port.iotype; serial8250_register_8250_port()
980 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF; serial8250_register_8250_port()
981 uart->bugs = up->bugs; serial8250_register_8250_port()
982 uart->port.mapbase = up->port.mapbase; serial8250_register_8250_port()
983 uart->port.mapsize = up->port.mapsize; serial8250_register_8250_port()
984 uart->port.private_data = up->port.private_data; serial8250_register_8250_port()
985 uart->tx_loadsz = up->tx_loadsz; serial8250_register_8250_port()
986 uart->capabilities = up->capabilities; serial8250_register_8250_port()
987 uart->port.throttle = up->port.throttle; serial8250_register_8250_port()
988 uart->port.unthrottle = up->port.unthrottle; serial8250_register_8250_port()
989 uart->port.rs485_config = up->port.rs485_config; serial8250_register_8250_port()
990 uart->port.rs485 = up->port.rs485; serial8250_register_8250_port()
991 uart->dma = up->dma; serial8250_register_8250_port()
997 if (up->port.dev) serial8250_register_8250_port()
998 uart->port.dev = up->port.dev; serial8250_register_8250_port()
1003 if (up->port.flags & UPF_FIXED_TYPE) serial8250_register_8250_port()
1004 uart->port.type = up->port.type; serial8250_register_8250_port()
1009 if (up->port.serial_in) serial8250_register_8250_port()
1010 uart->port.serial_in = up->port.serial_in; serial8250_register_8250_port()
1011 if (up->port.serial_out) serial8250_register_8250_port()
1012 uart->port.serial_out = up->port.serial_out; serial8250_register_8250_port()
1013 if (up->port.handle_irq) serial8250_register_8250_port()
1014 uart->port.handle_irq = up->port.handle_irq; serial8250_register_8250_port()
1016 if (up->port.set_termios) serial8250_register_8250_port()
1017 uart->port.set_termios = up->port.set_termios; serial8250_register_8250_port()
1018 if (up->port.set_mctrl) serial8250_register_8250_port()
1019 uart->port.set_mctrl = up->port.set_mctrl; serial8250_register_8250_port()
1020 if (up->port.startup) serial8250_register_8250_port()
1021 uart->port.startup = up->port.startup; serial8250_register_8250_port()
1022 if (up->port.shutdown) serial8250_register_8250_port()
1023 uart->port.shutdown = up->port.shutdown; serial8250_register_8250_port()
1024 if (up->port.pm) serial8250_register_8250_port()
1025 uart->port.pm = up->port.pm; serial8250_register_8250_port()
1026 if (up->port.handle_break) serial8250_register_8250_port()
1027 uart->port.handle_break = up->port.handle_break; serial8250_register_8250_port()
1028 if (up->dl_read) serial8250_register_8250_port()
1029 uart->dl_read = up->dl_read; serial8250_register_8250_port()
1030 if (up->dl_write) serial8250_register_8250_port()
1031 uart->dl_write = up->dl_write; serial8250_register_8250_port()
430 serial8250_set_isa_configurator( void (*v)(int port, struct uart_port *up, unsigned short *capabilities)) serial8250_set_isa_configurator() argument
|
| H A D | 8250_em.c | 79 static int serial8250_em_serial_dl_read(struct uart_8250_port *up) serial8250_em_serial_dl_read() argument
81 return serial_in(up, UART_DLL_EM) | serial_in(up, UART_DLM_EM) << 8; serial8250_em_serial_dl_read()
84 static void serial8250_em_serial_dl_write(struct uart_8250_port *up, int value) serial8250_em_serial_dl_write() argument
86 serial_out(up, UART_DLL_EM, value & 0xff); serial8250_em_serial_dl_write()
87 serial_out(up, UART_DLM_EM, value >> 8 & 0xff); serial8250_em_serial_dl_write()
95 struct uart_8250_port up; serial8250_em_probe() local
113 memset(&up, 0, sizeof(up)); serial8250_em_probe()
114 up.port.mapbase = regs->start; serial8250_em_probe()
115 up.port.irq = irq->start; serial8250_em_probe()
116 up.port.type = PORT_UNKNOWN; serial8250_em_probe()
117 up.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT | UPF_IOREMAP; serial8250_em_probe()
118 up.port.dev = &pdev->dev; serial8250_em_probe()
119 up.port.private_data = priv; serial8250_em_probe()
122 up.port.uartclk = clk_get_rate(priv->sclk); serial8250_em_probe()
124 up.port.iotype = UPIO_MEM32; serial8250_em_probe()
125 up.port.serial_in = serial8250_em_serial_in; serial8250_em_probe()
126 up.port.serial_out = serial8250_em_serial_out; serial8250_em_probe()
127 up.dl_read = serial8250_em_serial_dl_read; serial8250_em_probe()
128 up.dl_write = serial8250_em_serial_dl_write; serial8250_em_probe()
130 ret = serial8250_register_8250_port(&up); serial8250_em_probe()
|
| H A D | 8250_uniphier.c | 116 static int uniphier_serial_dl_read(struct uart_8250_port *up) uniphier_serial_dl_read() argument
118 int offset = UNIPHIER_UART_DLR << up->port.regshift; uniphier_serial_dl_read()
120 return readl(up->port.membase + offset); uniphier_serial_dl_read()
123 static void uniphier_serial_dl_write(struct uart_8250_port *up, int value) uniphier_serial_dl_write() argument
125 int offset = UNIPHIER_UART_DLR << up->port.regshift; uniphier_serial_dl_write()
127 writel(value, up->port.membase + offset); uniphier_serial_dl_write()
169 struct uart_8250_port up; uniphier_uart_probe() local
196 memset(&up, 0, sizeof(up)); uniphier_uart_probe()
198 ret = uniphier_of_serial_setup(dev, &up.port, priv); uniphier_uart_probe()
204 up.port.dev = dev; uniphier_uart_probe()
205 up.port.private_data = priv; uniphier_uart_probe()
206 up.port.mapbase = regs->start; uniphier_uart_probe()
207 up.port.mapsize = resource_size(regs); uniphier_uart_probe()
208 up.port.membase = membase; uniphier_uart_probe()
209 up.port.irq = irq; uniphier_uart_probe()
211 up.port.type = PORT_16550A; uniphier_uart_probe()
212 up.port.iotype = UPIO_MEM32; uniphier_uart_probe()
213 up.port.regshift = 2; uniphier_uart_probe()
214 up.port.flags = UPF_FIXED_PORT | UPF_FIXED_TYPE; uniphier_uart_probe()
215 up.capabilities = UART_CAP_FIFO; uniphier_uart_probe()
217 up.port.serial_in = uniphier_serial_in; uniphier_uart_probe()
218 up.port.serial_out = uniphier_serial_out; uniphier_uart_probe()
219 up.dl_read = uniphier_serial_dl_read; uniphier_uart_probe()
220 up.dl_write = uniphier_serial_dl_write; uniphier_uart_probe()
222 ret = serial8250_register_8250_port(&up); uniphier_uart_probe()
|
| H A D | 8250.h | 95 static inline int serial_in(struct uart_8250_port *up, int offset) serial_in() argument
97 return up->port.serial_in(&up->port, offset); serial_in()
100 static inline void serial_out(struct uart_8250_port *up, int offset, int value) serial_out() argument
102 up->port.serial_out(&up->port, offset, value); serial_out()
107 static inline int serial_dl_read(struct uart_8250_port *up) serial_dl_read() argument
109 return up->dl_read(up); serial_dl_read()
112 static inline void serial_dl_write(struct uart_8250_port *up, int value) serial_dl_write() argument
114 up->dl_write(up, value); serial_dl_write()
125 * is cleared, the machine locks up with endless interrupts.
198 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up) ns16550a_goto_highspeed() argument
202 status = serial_in(up, 0x04); /* EXCR2 */ ns16550a_goto_highspeed()
210 serial_out(up, 0x04, status); ns16550a_goto_highspeed()
|
| /linux-4.4.14/drivers/media/v4l2-core/ |
| H A D | v4l2-compat-ioctl32.c | 48 static int get_v4l2_window32(struct v4l2_window *kp, struct v4l2_window32 __user *up) get_v4l2_window32() argument
50 if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_window32)) || get_v4l2_window32()
51 copy_from_user(&kp->w, &up->w, sizeof(up->w)) || get_v4l2_window32()
52 get_user(kp->field, &up->field) || get_v4l2_window32()
53 get_user(kp->chromakey, &up->chromakey) || get_v4l2_window32()
54 get_user(kp->clipcount, &up->clipcount)) get_v4l2_window32()
64 if (get_user(p, &up->clips)) get_v4l2_window32()
82 static int put_v4l2_window32(struct v4l2_window *kp, struct v4l2_window32 __user *up) put_v4l2_window32() argument
84 if (copy_to_user(&up->w, &kp->w, sizeof(kp->w)) || put_v4l2_window32()
85 put_user(kp->field, &up->field) || put_v4l2_window32()
86 put_user(kp->chromakey, &up->chromakey) || put_v4l2_window32()
87 put_user(kp->clipcount, &up->clipcount)) put_v4l2_window32()
92 static inline int get_v4l2_pix_format(struct v4l2_pix_format *kp, struct v4l2_pix_format __user *up) get_v4l2_pix_format() argument
94 if (copy_from_user(kp, up, sizeof(struct v4l2_pix_format))) get_v4l2_pix_format()
100 struct v4l2_pix_format_mplane __user *up) get_v4l2_pix_format_mplane()
102 if (copy_from_user(kp, up, sizeof(struct v4l2_pix_format_mplane))) get_v4l2_pix_format_mplane()
107 static inline int put_v4l2_pix_format(struct v4l2_pix_format *kp, struct v4l2_pix_format __user *up) put_v4l2_pix_format() argument
109 if (copy_to_user(up, kp, sizeof(struct v4l2_pix_format))) put_v4l2_pix_format()
115 struct v4l2_pix_format_mplane __user *up) put_v4l2_pix_format_mplane()
117 if (copy_to_user(up, kp, sizeof(struct v4l2_pix_format_mplane))) put_v4l2_pix_format_mplane()
122 static inline int get_v4l2_vbi_format(struct v4l2_vbi_format *kp, struct v4l2_vbi_format __user *up) get_v4l2_vbi_format() argument
124 if (copy_from_user(kp, up, sizeof(struct v4l2_vbi_format))) get_v4l2_vbi_format()
129 static inline int put_v4l2_vbi_format(struct v4l2_vbi_format *kp, struct v4l2_vbi_format __user *up) put_v4l2_vbi_format() argument
131 if (copy_to_user(up, kp, sizeof(struct v4l2_vbi_format))) put_v4l2_vbi_format()
136 static inline int get_v4l2_sliced_vbi_format(struct v4l2_sliced_vbi_format *kp, struct v4l2_sliced_vbi_format __user *up) get_v4l2_sliced_vbi_format() argument
138 if (copy_from_user(kp, up, sizeof(struct v4l2_sliced_vbi_format))) get_v4l2_sliced_vbi_format()
143 static inline int put_v4l2_sliced_vbi_format(struct v4l2_sliced_vbi_format *kp, struct v4l2_sliced_vbi_format __user *up) put_v4l2_sliced_vbi_format() argument
145 if (copy_to_user(up, kp, sizeof(struct v4l2_sliced_vbi_format))) put_v4l2_sliced_vbi_format()
150 static inline int get_v4l2_sdr_format(struct v4l2_sdr_format *kp, struct v4l2_sdr_format __user *up) get_v4l2_sdr_format() argument
152 if (copy_from_user(kp, up, sizeof(struct v4l2_sdr_format))) get_v4l2_sdr_format()
157 static inline int put_v4l2_sdr_format(struct v4l2_sdr_format *kp, struct v4l2_sdr_format __user *up) put_v4l2_sdr_format() argument
159 if (copy_to_user(up, kp, sizeof(struct v4l2_sdr_format))) put_v4l2_sdr_format()
194 static int __get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up) __get_v4l2_format32() argument
196 if (get_user(kp->type, &up->type)) __get_v4l2_format32()
202 return get_v4l2_pix_format(&kp->fmt.pix, &up->fmt.pix); __get_v4l2_format32()
206 &up->fmt.pix_mp); __get_v4l2_format32()
209 return get_v4l2_window32(&kp->fmt.win, &up->fmt.win); __get_v4l2_format32()
212 return get_v4l2_vbi_format(&kp->fmt.vbi, &up->fmt.vbi); __get_v4l2_format32()
215 return get_v4l2_sliced_vbi_format(&kp->fmt.sliced, &up->fmt.sliced); __get_v4l2_format32()
218 return get_v4l2_sdr_format(&kp->fmt.sdr, &up->fmt.sdr); __get_v4l2_format32()
226 static int get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up) get_v4l2_format32() argument
228 if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_format32))) get_v4l2_format32()
230 return __get_v4l2_format32(kp, up); get_v4l2_format32()
233 static int get_v4l2_create32(struct v4l2_create_buffers *kp, struct v4l2_create_buffers32 __user *up) get_v4l2_create32() argument
235 if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_create_buffers32)) || get_v4l2_create32()
236 copy_from_user(kp, up, offsetof(struct v4l2_create_buffers32, format))) get_v4l2_create32()
238 return __get_v4l2_format32(&kp->format, &up->format); get_v4l2_create32()
241 static int __put_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up) __put_v4l2_format32() argument
243 if (put_user(kp->type, &up->type)) __put_v4l2_format32()
249 return put_v4l2_pix_format(&kp->fmt.pix, &up->fmt.pix); __put_v4l2_format32()
253 &up->fmt.pix_mp); __put_v4l2_format32()
256 return put_v4l2_window32(&kp->fmt.win, &up->fmt.win); __put_v4l2_format32()
259 return put_v4l2_vbi_format(&kp->fmt.vbi, &up->fmt.vbi); __put_v4l2_format32()
262 return put_v4l2_sliced_vbi_format(&kp->fmt.sliced, &up->fmt.sliced); __put_v4l2_format32()
265 return put_v4l2_sdr_format(&kp->fmt.sdr, &up->fmt.sdr); __put_v4l2_format32()
273 static int put_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up) put_v4l2_format32() argument
275 if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_format32))) put_v4l2_format32()
277 return __put_v4l2_format32(kp, up); put_v4l2_format32()
280 static int put_v4l2_create32(struct v4l2_create_buffers *kp, struct v4l2_create_buffers32 __user *up) put_v4l2_create32() argument
282 if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_create_buffers32)) || put_v4l2_create32()
283 copy_to_user(up, kp, offsetof(struct v4l2_create_buffers32, format)) || put_v4l2_create32()
284 copy_to_user(up->reserved, kp->reserved, sizeof(kp->reserved))) put_v4l2_create32()
286 return __put_v4l2_format32(&kp->format, &up->format); put_v4l2_create32()
298 static int get_v4l2_standard32(struct v4l2_standard *kp, struct v4l2_standard32 __user *up) get_v4l2_standard32() argument
301 if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_standard32)) || get_v4l2_standard32()
302 get_user(kp->index, &up->index)) get_v4l2_standard32()
307 static int put_v4l2_standard32(struct v4l2_standard *kp, struct v4l2_standard32 __user *up) put_v4l2_standard32() argument
309 if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_standard32)) || put_v4l2_standard32()
310 put_user(kp->index, &up->index) || put_v4l2_standard32()
311 put_user(kp->id, &up->id) || put_v4l2_standard32()
312 copy_to_user(up->name, kp->name, 24) || put_v4l2_standard32()
313 copy_to_user(&up->frameperiod, &kp->frameperiod, sizeof(kp->frameperiod)) || put_v4l2_standard32()
314 put_user(kp->framelines, &up->framelines) || put_v4l2_standard32()
315 copy_to_user(up->reserved, kp->reserved, 4 * sizeof(__u32))) put_v4l2_standard32()
355 static int get_v4l2_plane32(struct v4l2_plane __user *up, struct v4l2_plane32 __user *up32, get_v4l2_plane32() argument
361 if (copy_in_user(up, up32, 2 * sizeof(__u32)) || get_v4l2_plane32()
362 copy_in_user(&up->data_offset, &up32->data_offset, get_v4l2_plane32()
370 if (put_user((unsigned long)up_pln, &up->m.userptr)) get_v4l2_plane32()
373 if (copy_in_user(&up->m.fd, &up32->m.fd, sizeof(int))) get_v4l2_plane32()
376 if (copy_in_user(&up->m.mem_offset, &up32->m.mem_offset, get_v4l2_plane32()
384 static int put_v4l2_plane32(struct v4l2_plane __user *up, struct v4l2_plane32 __user *up32, put_v4l2_plane32() argument
387 if (copy_in_user(up32, up, 2 * sizeof(__u32)) || put_v4l2_plane32()
388 copy_in_user(&up32->data_offset, &up->data_offset, put_v4l2_plane32()
392 /* For MMAP, driver might've set up the offset, so copy it back. put_v4l2_plane32()
395 if (copy_in_user(&up32->m.mem_offset, &up->m.mem_offset, put_v4l2_plane32()
398 /* For DMABUF, driver might've set up the fd, so copy it back. */ put_v4l2_plane32()
400 if (copy_in_user(&up32->m.fd, &up->m.fd, put_v4l2_plane32()
407 static int get_v4l2_buffer32(struct v4l2_buffer *kp, struct v4l2_buffer32 __user *up) get_v4l2_buffer32() argument
415 if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_buffer32)) || get_v4l2_buffer32()
416 get_user(kp->index, &up->index) || get_v4l2_buffer32()
417 get_user(kp->type, &up->type) || get_v4l2_buffer32()
418 get_user(kp->flags, &up->flags) || get_v4l2_buffer32()
419 get_user(kp->memory, &up->memory) || get_v4l2_buffer32()
420 get_user(kp->length, &up->length)) get_v4l2_buffer32()
424 if (get_user(kp->bytesused, &up->bytesused) || get_v4l2_buffer32()
425 get_user(kp->field, &up->field) || get_v4l2_buffer32()
426 get_user(kp->timestamp.tv_sec, &up->timestamp.tv_sec) || get_v4l2_buffer32()
428 &up->timestamp.tv_usec)) get_v4l2_buffer32()
440 if (get_user(p, &up->m.planes)) get_v4l2_buffer32()
464 if (get_user(kp->m.offset, &up->m.offset)) get_v4l2_buffer32()
471 if (get_user(tmp, &up->m.userptr)) get_v4l2_buffer32()
478 if (get_user(kp->m.offset, &up->m.offset)) get_v4l2_buffer32()
482 if (get_user(kp->m.fd, &up->m.fd)) get_v4l2_buffer32()
491 static int put_v4l2_buffer32(struct v4l2_buffer *kp, struct v4l2_buffer32 __user *up) put_v4l2_buffer32() argument
499 if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_buffer32)) || put_v4l2_buffer32()
500 put_user(kp->index, &up->index) || put_v4l2_buffer32()
501 put_user(kp->type, &up->type) || put_v4l2_buffer32()
502 put_user(kp->flags, &up->flags) || put_v4l2_buffer32()
503 put_user(kp->memory, &up->memory)) put_v4l2_buffer32()
506 if (put_user(kp->bytesused, &up->bytesused) || put_v4l2_buffer32()
507 put_user(kp->field, &up->field) || put_v4l2_buffer32()
508 put_user(kp->timestamp.tv_sec, &up->timestamp.tv_sec) || put_v4l2_buffer32()
509 put_user(kp->timestamp.tv_usec, &up->timestamp.tv_usec) || put_v4l2_buffer32()
510 copy_to_user(&up->timecode, &kp->timecode, sizeof(struct v4l2_timecode)) || put_v4l2_buffer32()
511 put_user(kp->sequence, &up->sequence) || put_v4l2_buffer32()
512 put_user(kp->reserved2, &up->reserved2) || put_v4l2_buffer32()
513 put_user(kp->reserved, &up->reserved) || put_v4l2_buffer32()
514 put_user(kp->length, &up->length)) put_v4l2_buffer32()
523 if (get_user(p, &up->m.planes)) put_v4l2_buffer32()
537 if (put_user(kp->m.offset, &up->m.offset)) put_v4l2_buffer32()
541 if (put_user(kp->m.userptr, &up->m.userptr)) put_v4l2_buffer32()
545 if (put_user(kp->m.offset, &up->m.offset)) put_v4l2_buffer32()
549 if (put_user(kp->m.fd, &up->m.fd)) put_v4l2_buffer32()
574 static int get_v4l2_framebuffer32(struct v4l2_framebuffer *kp, struct v4l2_framebuffer32 __user *up) get_v4l2_framebuffer32() argument
578 if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_framebuffer32)) || get_v4l2_framebuffer32()
579 get_user(tmp, &up->base) || get_v4l2_framebuffer32()
580 get_user(kp->capability, &up->capability) || get_v4l2_framebuffer32()
581 get_user(kp->flags, &up->flags) || get_v4l2_framebuffer32()
582 copy_from_user(&kp->fmt, &up->fmt, sizeof(up->fmt))) get_v4l2_framebuffer32()
588 static int put_v4l2_framebuffer32(struct v4l2_framebuffer *kp, struct v4l2_framebuffer32 __user *up) put_v4l2_framebuffer32() argument
592 if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_framebuffer32)) || put_v4l2_framebuffer32()
593 put_user(tmp, &up->base) || put_v4l2_framebuffer32()
594 put_user(kp->capability, &up->capability) || put_v4l2_framebuffer32()
595 put_user(kp->flags, &up->flags) || put_v4l2_framebuffer32()
596 copy_to_user(&up->fmt, &kp->fmt, sizeof(up->fmt))) put_v4l2_framebuffer32()
614 static inline int get_v4l2_input32(struct v4l2_input *kp, struct v4l2_input32 __user *up) get_v4l2_input32() argument
616 if (copy_from_user(kp, up, sizeof(struct v4l2_input32))) get_v4l2_input32()
621 static inline int put_v4l2_input32(struct v4l2_input *kp, struct v4l2_input32 __user *up) put_v4l2_input32() argument
623 if (copy_to_user(up, kp, sizeof(struct v4l2_input32))) put_v4l2_input32()
664 static int get_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext_controls32 __user *up) get_v4l2_ext_controls32() argument
671 if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_ext_controls32)) || get_v4l2_ext_controls32()
672 get_user(kp->ctrl_class, &up->ctrl_class) || get_v4l2_ext_controls32()
673 get_user(kp->count, &up->count) || get_v4l2_ext_controls32()
674 get_user(kp->error_idx, &up->error_idx) || get_v4l2_ext_controls32()
675 copy_from_user(kp->reserved, up->reserved, get_v4l2_ext_controls32()
683 if (get_user(p, &up->controls)) get_v4l2_ext_controls32()
713 static int put_v4l2_ext_controls32(struct v4l2_ext_controls *kp, struct v4l2_ext_controls32 __user *up) put_v4l2_ext_controls32() argument
721 if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_ext_controls32)) || put_v4l2_ext_controls32()
722 put_user(kp->ctrl_class, &up->ctrl_class) || put_v4l2_ext_controls32()
723 put_user(kp->count, &up->count) || put_v4l2_ext_controls32()
724 put_user(kp->error_idx, &up->error_idx) || put_v4l2_ext_controls32()
725 copy_to_user(up->reserved, kp->reserved, sizeof(up->reserved))) put_v4l2_ext_controls32()
730 if (get_user(p, &up->controls)) put_v4l2_ext_controls32()
769 static int put_v4l2_event32(struct v4l2_event *kp, struct v4l2_event32 __user *up) put_v4l2_event32() argument
771 if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_event32)) || put_v4l2_event32()
772 put_user(kp->type, &up->type) || put_v4l2_event32()
773 copy_to_user(&up->u, &kp->u, sizeof(kp->u)) || put_v4l2_event32()
774 put_user(kp->pending, &up->pending) || put_v4l2_event32()
775 put_user(kp->sequence, &up->sequence) || put_v4l2_event32()
776 compat_put_timespec(&kp->timestamp, &up->timestamp) || put_v4l2_event32()
777 put_user(kp->id, &up->id) || put_v4l2_event32()
778 copy_to_user(up->reserved, kp->reserved, 8 * sizeof(__u32))) put_v4l2_event32()
791 static int get_v4l2_edid32(struct v4l2_edid *kp, struct v4l2_edid32 __user *up) get_v4l2_edid32() argument
795 if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_edid32)) || get_v4l2_edid32()
796 get_user(kp->pad, &up->pad) || get_v4l2_edid32()
797 get_user(kp->start_block, &up->start_block) || get_v4l2_edid32()
798 get_user(kp->blocks, &up->blocks) || get_v4l2_edid32()
799 get_user(tmp, &up->edid) || get_v4l2_edid32()
800 copy_from_user(kp->reserved, up->reserved, sizeof(kp->reserved))) get_v4l2_edid32()
806 static int put_v4l2_edid32(struct v4l2_edid *kp, struct v4l2_edid32 __user *up) put_v4l2_edid32() argument
810 if (!access_ok(VERIFY_WRITE, up, sizeof(struct v4l2_edid32)) || put_v4l2_edid32()
811 put_user(kp->pad, &up->pad) || put_v4l2_edid32()
812 put_user(kp->start_block, &up->start_block) || put_v4l2_edid32()
813 put_user(kp->blocks, &up->blocks) || put_v4l2_edid32()
814 put_user(tmp, &up->edid) || put_v4l2_edid32()
815 copy_to_user(up->reserved, kp->reserved, sizeof(up->reserved))) put_v4l2_edid32()
863 void __user *up = compat_ptr(arg); do_video_ioctl() local
902 err = get_user(karg.vi, (s32 __user *)up); do_video_ioctl()
913 err = get_v4l2_edid32(&karg.v2edid, up); do_video_ioctl()
920 err = get_v4l2_format32(&karg.v2f, up); do_video_ioctl()
925 err = get_v4l2_create32(&karg.v2crt, up); do_video_ioctl()
933 err = get_v4l2_buffer32(&karg.v2b, up); do_video_ioctl()
938 err = get_v4l2_framebuffer32(&karg.v2fb, up); do_video_ioctl()
947 err = get_v4l2_standard32(&karg.v2s, up); do_video_ioctl()
952 err = get_v4l2_input32(&karg.v2i, up); do_video_ioctl()
959 err = get_v4l2_ext_controls32(&karg.v2ecs, up); do_video_ioctl()
970 err = native_ioctl(file, cmd, (unsigned long)up); do_video_ioctl()
986 if (put_v4l2_ext_controls32(&karg.v2ecs, up)) do_video_ioctl()
998 err = put_user(((s32)karg.vi), (s32 __user *)up); do_video_ioctl()
1002 err = put_v4l2_framebuffer32(&karg.v2fb, up); do_video_ioctl()
1006 err = put_v4l2_event32(&karg.v2ev, up); do_video_ioctl()
1011 err = put_v4l2_edid32(&karg.v2edid, up); do_video_ioctl()
1017 err = put_v4l2_format32(&karg.v2f, up); do_video_ioctl()
1021 err = put_v4l2_create32(&karg.v2crt, up); do_video_ioctl()
1027 err = put_v4l2_buffer32(&karg.v2b, up); do_video_ioctl()
1031 err = put_v4l2_standard32(&karg.v2s, up); do_video_ioctl()
1035 err = put_v4l2_input32(&karg.v2i, up); do_video_ioctl()
99 get_v4l2_pix_format_mplane(struct v4l2_pix_format_mplane *kp, struct v4l2_pix_format_mplane __user *up) get_v4l2_pix_format_mplane() argument
114 put_v4l2_pix_format_mplane(struct v4l2_pix_format_mplane *kp, struct v4l2_pix_format_mplane __user *up) put_v4l2_pix_format_mplane() argument
|
| /linux-4.4.14/arch/m32r/include/uapi/asm/ |
| H A D | setup.h | 5 * This is set up by the setup-routine at boot-time
|
| /linux-4.4.14/arch/mips/pmcs-msp71xx/ |
| H A D | msp_serial.c | 95 struct uart_port up; msp_serial_setup() local
98 memset(&up, 0, sizeof(up)); msp_serial_setup()
107 up.mapbase = MSP_UART0_BASE; msp_serial_setup()
108 up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN); msp_serial_setup()
109 up.irq = MSP_INT_UART0; msp_serial_setup()
110 up.uartclk = uartclk; msp_serial_setup()
111 up.regshift = 2; msp_serial_setup()
112 up.iotype = UPIO_MEM; msp_serial_setup()
113 up.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST; msp_serial_setup()
114 up.type = PORT_16550A; msp_serial_setup()
115 up.line = 0; msp_serial_setup()
116 up.serial_out = msp_serial_out; msp_serial_setup()
117 up.serial_in = msp_serial_in; msp_serial_setup()
118 up.handle_irq = msp_serial_handle_irq; msp_serial_setup()
119 up.private_data = kzalloc(sizeof(struct msp_uart_data), GFP_KERNEL); msp_serial_setup()
120 if (!up.private_data) { msp_serial_setup()
124 if (early_serial_setup(&up)) { msp_serial_setup()
125 kfree(up.private_data); msp_serial_setup()
145 up.mapbase = MSP_UART1_BASE; msp_serial_setup()
146 up.membase = ioremap_nocache(up.mapbase, MSP_UART_REG_LEN); msp_serial_setup()
147 up.irq = MSP_INT_UART1; msp_serial_setup()
148 up.line = 1; msp_serial_setup()
149 up.private_data = (void*)UART1_STATUS_REG; msp_serial_setup()
150 if (early_serial_setup(&up)) { msp_serial_setup()
151 kfree(up.private_data); msp_serial_setup()
|
| H A D | msp_elb.c | 2 * Sets up the proper Chip Select configuration registers. It is assumed that
3 * PMON sets up the ADDR and MASK registers properly.
|
| /linux-4.4.14/include/net/ |
| H A D | udplite.h | 73 const struct udp_sock *up = udp_sk(skb->sk); udplite_csum_outgoing() local
74 int cscov = up->len; udplite_csum_outgoing()
77 if (up->pcflag & UDPLITE_SEND_CC) { udplite_csum_outgoing()
80 * The special case "up->pcslen == 0" signifies full coverage. udplite_csum_outgoing()
82 if (up->pcslen < up->len) { udplite_csum_outgoing()
83 if (0 < up->pcslen) udplite_csum_outgoing()
84 cscov = up->pcslen; udplite_csum_outgoing()
85 udp_hdr(skb)->len = htons(up->pcslen); udplite_csum_outgoing()
88 * NOTE: Causes for the error case `up->pcslen > up->len': udplite_csum_outgoing()
116 const struct udp_sock *up = udp_sk(skb->sk); udplite_csum() local
120 if ((up->pcflag & UDPLITE_SEND_CC) && up->pcslen < len) { udplite_csum()
121 if (0 < up->pcslen) udplite_csum()
122 len = up->pcslen; udplite_csum()
123 udp_hdr(skb)->len = htons(up->pcslen); udplite_csum()
|
| H A D | dn_dev.h | 36 * come up.
44 * installing an up() routine.
47 * device will come up. In the dn_dev structure, it is the actual
59 * up() - Called to initialize device, return value can veto use of
79 int (*up)(struct net_device *); member in struct:dn_dev_parms
97 unsigned long uptime; /* Time device went up in jiffies */
|
| /linux-4.4.14/drivers/tty/serial/cpm_uart/ |
| H A D | cpm_uart_cpm1.h | 24 static inline void cpm_set_smc_fcr(smc_uart_t __iomem * up) cpm_set_smc_fcr() argument
26 out_8(&up->smc_rfcr, SMC_EB); cpm_set_smc_fcr()
27 out_8(&up->smc_tfcr, SMC_EB); cpm_set_smc_fcr()
|
| H A D | cpm_uart_cpm2.h | 24 static inline void cpm_set_smc_fcr(smc_uart_t __iomem *up) cpm_set_smc_fcr() argument
26 out_8(&up->smc_rfcr, CPMFCR_GBL | CPMFCR_EB); cpm_set_smc_fcr()
27 out_8(&up->smc_tfcr, CPMFCR_GBL | CPMFCR_EB); cpm_set_smc_fcr()
|
| /linux-4.4.14/arch/powerpc/include/asm/ |
| H A D | grackle.h | 5 * Functions for setting up and using a MPC106 northbridge
|
| H A D | runlatch.h | 14 * in the idle loop and we don't want to mess up
|
| /linux-4.4.14/fs/ceph/ |
| H A D | strings.c | 14 /* up and out */ ceph_mds_state_name()
15 case CEPH_MDS_STATE_BOOT: return "up:boot"; ceph_mds_state_name()
16 case CEPH_MDS_STATE_STANDBY: return "up:standby"; ceph_mds_state_name()
17 case CEPH_MDS_STATE_STANDBY_REPLAY: return "up:standby-replay"; ceph_mds_state_name()
18 case CEPH_MDS_STATE_REPLAYONCE: return "up:oneshot-replay"; ceph_mds_state_name()
19 case CEPH_MDS_STATE_CREATING: return "up:creating"; ceph_mds_state_name()
20 case CEPH_MDS_STATE_STARTING: return "up:starting"; ceph_mds_state_name()
21 /* up and in */ ceph_mds_state_name()
22 case CEPH_MDS_STATE_REPLAY: return "up:replay"; ceph_mds_state_name()
23 case CEPH_MDS_STATE_RESOLVE: return "up:resolve"; ceph_mds_state_name()
24 case CEPH_MDS_STATE_RECONNECT: return "up:reconnect"; ceph_mds_state_name()
25 case CEPH_MDS_STATE_REJOIN: return "up:rejoin"; ceph_mds_state_name()
26 case CEPH_MDS_STATE_CLIENTREPLAY: return "up:clientreplay"; ceph_mds_state_name()
27 case CEPH_MDS_STATE_ACTIVE: return "up:active"; ceph_mds_state_name()
28 case CEPH_MDS_STATE_STOPPING: return "up:stopping"; ceph_mds_state_name()
|
| /linux-4.4.14/lib/mpi/ |
| H A D | mpih-mul.c | 34 #define MPN_MUL_N_RECURSE(prodp, up, vp, size, tspace) \
37 mul_n_basecase(prodp, up, vp, size); \
39 mul_n(prodp, up, vp, size, tspace); \
42 #define MPN_SQR_N_RECURSE(prodp, up, size, tspace) \
45 mpih_sqr_n_basecase(prodp, up, size); \
47 mpih_sqr_n(prodp, up, size, tspace); \
68 mul_n_basecase(mpi_ptr_t prodp, mpi_ptr_t up, mpi_ptr_t vp, mpi_size_t size) mul_n_basecase() argument
79 MPN_COPY(prodp, up, size); mul_n_basecase()
84 cy = mpihelp_mul_1(prodp, up, size, v_limb); mul_n_basecase()
96 cy = mpihelp_add_n(prodp, prodp, up, size); mul_n_basecase()
98 cy = mpihelp_addmul_1(prodp, up, size, v_limb); mul_n_basecase()
108 mul_n(mpi_ptr_t prodp, mpi_ptr_t up, mpi_ptr_t vp, mul_n() argument
125 MPN_MUL_N_RECURSE(prodp, up, vp, esize, tspace); mul_n()
126 cy_limb = mpihelp_addmul_1(prodp + esize, up, esize, vp[esize]); mul_n()
128 cy_limb = mpihelp_addmul_1(prodp + esize, vp, size, up[esize]); mul_n()
155 MPN_MUL_N_RECURSE(prodp + size, up + hsize, vp + hsize, hsize, mul_n()
161 if (mpihelp_cmp(up + hsize, up, hsize) >= 0) { mul_n()
162 mpihelp_sub_n(prodp, up + hsize, up, hsize); mul_n()
165 mpihelp_sub_n(prodp, up, up + hsize, hsize); mul_n()
203 MPN_MUL_N_RECURSE(tspace, up, vp, hsize, tspace + size); mul_n()
220 void mpih_sqr_n_basecase(mpi_ptr_t prodp, mpi_ptr_t up, mpi_size_t size) mpih_sqr_n_basecase() argument
228 v_limb = up[0]; mpih_sqr_n_basecase()
231 MPN_COPY(prodp, up, size); mpih_sqr_n_basecase()
236 cy_limb = mpihelp_mul_1(prodp, up, size, v_limb); mpih_sqr_n_basecase()
244 v_limb = up[i]; mpih_sqr_n_basecase()
248 cy_limb = mpihelp_add_n(prodp, prodp, up, size); mpih_sqr_n_basecase()
250 cy_limb = mpihelp_addmul_1(prodp, up, size, v_limb); mpih_sqr_n_basecase()
258 mpih_sqr_n(mpi_ptr_t prodp, mpi_ptr_t up, mpi_size_t size, mpi_ptr_t tspace) mpih_sqr_n() argument
274 MPN_SQR_N_RECURSE(prodp, up, esize, tspace); mpih_sqr_n()
275 cy_limb = mpihelp_addmul_1(prodp + esize, up, esize, up[esize]); mpih_sqr_n()
277 cy_limb = mpihelp_addmul_1(prodp + esize, up, size, up[esize]); mpih_sqr_n()
289 MPN_SQR_N_RECURSE(prodp + size, up + hsize, hsize, tspace); mpih_sqr_n()
294 if (mpihelp_cmp(up + hsize, up, hsize) >= 0) mpih_sqr_n()
295 mpihelp_sub_n(prodp, up + hsize, up, hsize); mpih_sqr_n()
297 mpihelp_sub_n(prodp, up, up + hsize, hsize); mpih_sqr_n()
317 MPN_SQR_N_RECURSE(tspace, up, hsize, tspace + size); mpih_sqr_n()
335 mpi_ptr_t up, mpi_size_t usize, mpihelp_mul_karatsuba_case()
350 MPN_MUL_N_RECURSE(prodp, up, vp, vsize, ctx->tspace); mpihelp_mul_karatsuba_case()
353 up += vsize; mpihelp_mul_karatsuba_case()
370 MPN_MUL_N_RECURSE(ctx->tp, up, vp, vsize, ctx->tspace); mpihelp_mul_karatsuba_case()
375 up += vsize; mpihelp_mul_karatsuba_case()
383 if (mpihelp_mul(ctx->tspace, vp, vsize, up, usize, &tmp) mpihelp_mul_karatsuba_case()
394 up, usize, mpihelp_mul_karatsuba_case()
440 mpihelp_mul(mpi_ptr_t prodp, mpi_ptr_t up, mpi_size_t usize, mpihelp_mul() argument
461 MPN_COPY(prodp, up, usize); mpihelp_mul()
466 cy = mpihelp_mul_1(prodp, up, usize, v_limb); mpihelp_mul()
478 cy = mpihelp_add_n(prodp, prodp, up, mpihelp_mul()
481 cy = mpihelp_addmul_1(prodp, up, usize, v_limb); mpihelp_mul()
492 if (mpihelp_mul_karatsuba_case(prodp, up, usize, vp, vsize, &ctx) < 0) mpihelp_mul()
334 mpihelp_mul_karatsuba_case(mpi_ptr_t prodp, mpi_ptr_t up, mpi_size_t usize, mpi_ptr_t vp, mpi_size_t vsize, struct karatsuba_ctx *ctx) mpihelp_mul_karatsuba_case() argument
|
| H A D | mpi-internal.h | 123 #define MPN_MUL_N_RECURSE(prodp, up, vp, size, tspace) \
126 mul_n_basecase(prodp, up, vp, size); \
128 mul_n(prodp, up, vp, size, tspace); \
205 int mpihelp_mul_n(mpi_ptr_t prodp, mpi_ptr_t up, mpi_ptr_t vp, mpi_size_t size);
206 int mpihelp_mul(mpi_ptr_t prodp, mpi_ptr_t up, mpi_size_t usize,
208 void mpih_sqr_n_basecase(mpi_ptr_t prodp, mpi_ptr_t up, mpi_size_t size);
209 void mpih_sqr_n(mpi_ptr_t prodp, mpi_ptr_t up, mpi_size_t size,
213 mpi_ptr_t up, mpi_size_t usize,
232 mpi_limb_t mpihelp_lshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize,
234 mpi_limb_t mpihelp_rshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize,
|
| H A D | generic_mpih-lshift.c | 41 mpihelp_lshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned int cnt) mpihelp_lshift() argument
52 low_limb = up[i]; mpihelp_lshift()
56 low_limb = up[i]; mpihelp_lshift()
|
| H A D | generic_mpih-rshift.c | 42 mpihelp_rshift(mpi_ptr_t wp, mpi_ptr_t up, mpi_size_t usize, unsigned cnt) mpihelp_rshift() argument
52 high_limb = up[0]; mpihelp_rshift()
56 high_limb = up[i]; mpihelp_rshift()
|
| /linux-4.4.14/arch/alpha/lib/ |
| H A D | strcpy.S | 18 mov $16, $0 # set up return value
19 mov $26, $23 # set up return address
|
| H A D | strcat.S | 17 mov $16, $0 # set up return value
|
| /linux-4.4.14/net/caif/ |
| H A D | cfsrvl.c | 33 if (layr->up == NULL || layr->up->ctrlcmd == NULL) cfservl_ctrlcmd()
39 layr->up->ctrlcmd(layr->up, ctrl, phyid); cfservl_ctrlcmd()
44 layr->up->ctrlcmd(layr->up, ctrl, phyid); cfservl_ctrlcmd()
50 layr->up->ctrlcmd(layr->up, cfservl_ctrlcmd()
58 layr->up->ctrlcmd(layr->up, cfservl_ctrlcmd()
66 layr->up->ctrlcmd(layr->up, cfservl_ctrlcmd()
73 layr->up->ctrlcmd(layr->up, cfservl_ctrlcmd()
80 layr->up->ctrlcmd(layr->up, cfservl_ctrlcmd()
84 layr->up->ctrlcmd(layr->up, ctrl, phyid); cfservl_ctrlcmd()
89 layr->up->ctrlcmd(layr->up, ctrl, phyid); cfservl_ctrlcmd()
|
| H A D | cfmuxl.c | 86 int cfmuxl_set_uplayer(struct cflayer *layr, struct cflayer *up, u8 linkid) cfmuxl_set_uplayer() argument
98 list_add_rcu(&up->node, &muxl->srvl_list); cfmuxl_set_uplayer()
125 struct cflayer *up; get_up() local
127 up = rcu_dereference(muxl->up_cache[idx]); get_up()
128 if (up == NULL || up->id != id) { get_up()
130 up = get_from_id(&muxl->srvl_list, id); get_up()
131 rcu_assign_pointer(muxl->up_cache[idx], up); get_up()
134 return up; get_up()
153 struct cflayer *up; cfmuxl_remove_uplayer() local
163 up = get_from_id(&muxl->srvl_list, id); cfmuxl_remove_uplayer()
164 if (up == NULL) cfmuxl_remove_uplayer()
168 list_del_rcu(&up->node); cfmuxl_remove_uplayer()
171 return up; cfmuxl_remove_uplayer()
179 struct cflayer *up; cfmuxl_receive() local
186 up = get_up(muxl, id); cfmuxl_receive()
188 if (up == NULL) { cfmuxl_receive()
190 " up == NULL", id, id); cfmuxl_receive()
202 cfsrvl_get(up); cfmuxl_receive()
205 ret = up->receive(up, pkt); cfmuxl_receive()
207 cfsrvl_put(up); cfmuxl_receive()
|
| H A D | cfutill.c | 45 caif_assert(layr->up != NULL); cfutill_receive()
46 caif_assert(layr->up->receive != NULL); cfutill_receive()
47 caif_assert(layr->up->ctrlcmd != NULL); cfutill_receive()
56 return layr->up->receive(layr->up, pkt); cfutill_receive()
98 * To optimize alignment, we add up the size of CAIF header before cfutill_transmit()
|
| H A D | cffrml.c | 64 void cffrml_set_uplayer(struct cflayer *this, struct cflayer *up) cffrml_set_uplayer() argument
66 this->up = up; cffrml_set_uplayer()
128 if (layr->up == NULL) { cffrml_receive()
129 pr_err("Layr up is missing!\n"); cffrml_receive()
134 return layr->up->receive(layr->up, pkt); cffrml_receive()
172 if (layr->up && layr->up->ctrlcmd) cffrml_ctrlcmd()
173 layr->up->ctrlcmd(layr->up, ctrl, layr->id); cffrml_ctrlcmd()
|
| H A D | cfdgml.c | 46 caif_assert(layr->up != NULL); cfdgml_receive()
62 ret = layr->up->receive(layr->up, pkt); cfdgml_receive()
108 /* To optimize alignment, we add up the size of CAIF header cfdgml_transmit()
|
| H A D | caif_usb.c | 46 return layr->up->receive(layr->up, pkt); cfusbl_receive()
81 if (layr->up && layr->up->ctrlcmd) cfusbl_ctrlcmd()
82 layr->up->ctrlcmd(layr->up, ctrl, layr->id); cfusbl_ctrlcmd()
|
| H A D | cfveil.c | 43 caif_assert(layr->up != NULL); cfvei_receive()
55 ret = layr->up->receive(layr->up, pkt); cfvei_receive()
|
| H A D | caif_dev.c | 157 caifd->layer.up-> caif_flow_cb()
158 ctrlcmd(caifd->layer.up, caif_flow_cb()
222 caifd->layer.up->ctrlcmd(caifd->layer.up, transmit()
251 if (!caifd || !caifd->layer.up || !caifd->layer.up->receive || receive()
262 err = caifd->layer.up->receive(caifd->layer.up, pkt); receive()
288 if (!caifd || !caifd->layer.up || !caifd->layer.up->ctrlcmd) { dev_flowctrl()
296 caifd->layer.up->ctrlcmd(caifd->layer.up, dev_flowctrl()
414 if (!caifd || !caifd->layer.up || !caifd->layer.up->ctrlcmd) { caif_device_notify()
423 caifd->layer.up->ctrlcmd(caifd->layer.up, caif_device_notify()
|
| H A D | cfdbgl.c | 35 return layr->up->receive(layr->up, pkt); cfdbgl_receive()
|
| H A D | cfrfml.c | 106 caif_assert(layr->up != NULL); cfrfml_receive()
167 err = rfml->serv.layer.up->receive(rfml->serv.layer.up, pkt); cfrfml_receive()
183 layr->up->ctrlcmd(layr->up, CAIF_CTRLCMD_REMOTE_SHUTDOWN_IND, cfrfml_receive()
204 * To optimize alignment, we add up the size of CAIF header before cfrfml_transmit_segment()
291 layr->up->ctrlcmd(layr->up, CAIF_CTRLCMD_REMOTE_SHUTDOWN_IND, cfrfml_transmit()
|
| H A D | cfvidl.c | 44 return layr->up->receive(layr->up, pkt); cfvidl_receive()
|
| /linux-4.4.14/kernel/ |
| H A D | user.c | 102 static void uid_hash_insert(struct user_struct *up, struct hlist_head *hashent) uid_hash_insert() argument
104 hlist_add_head(&up->uidhash_node, hashent); uid_hash_insert()
107 static void uid_hash_remove(struct user_struct *up) uid_hash_remove() argument
109 hlist_del_init(&up->uidhash_node); uid_hash_remove()
130 static void free_user(struct user_struct *up, unsigned long flags)
133 uid_hash_remove(up); variable
135 key_put(up->uid_keyring);
136 key_put(up->session_keyring);
137 kmem_cache_free(uid_cachep, up);
157 void free_uid(struct user_struct *up) free_uid() argument
161 if (!up) free_uid()
165 if (atomic_dec_and_lock(&up->__count, &uidhash_lock)) free_uid()
166 free_user(up, flags); free_uid()
174 struct user_struct *up, *new; alloc_uid() local
177 up = uid_hash_find(uid, hashent); alloc_uid()
180 if (!up) { alloc_uid()
193 up = uid_hash_find(uid, hashent); alloc_uid()
194 if (up) { alloc_uid()
200 up = new; alloc_uid()
205 return up; alloc_uid()
|
| /linux-4.4.14/drivers/base/power/ |
| H A D | wakeirq.c | 26 * @irq: Device wake-up capable interrupt
30 * dedicated wake-up interrupt as a wake IRQ.
62 * automatically configured for wake-up from suspend based
120 * handle_threaded_wake_irq - Handler for dedicated wake-up interrupts
121 * @irq: Device specific dedicated wake-up interrupt
124 * Some devices have a separate wake-up interrupt in addition to the
125 * device IO interrupt. The wake-up interrupt signals that a device
126 * should be woken up from it's idle state. This handler uses device
128 * up to the device to do whatever it needs to. Note that as the
129 * device may need to restore context and start up regulators, we
133 * We assume that the wake-up interrupt just needs to wake-up the
152 * dev_pm_set_dedicated_wake_irq - Request a dedicated wake-up interrupt
154 * @irq: Device wake-up interrupt
156 * Unless your hardware has separate wake-up interrupts in addition
159 * Sets up a threaded interrupt handler for a device that has
160 * a dedicated wake-up interrupt in addition to the device IO
186 * Consumer device may need to power up and restore state dev_pm_set_dedicated_wake_irq()
210 * dev_pm_enable_wake_irq - Enable device wake-up interrupt
214 * runtime_suspend() to enable the wake-up interrupt while
217 * Note that for runtime_suspend()) the wake-up interrupts
231 * dev_pm_disable_wake_irq - Disable device wake-up interrupt
235 * runtime_resume() to disable the wake-up interrupt while
248 * dev_pm_arm_wake_irq - Arm device wake-up
249 * @wirq: Device wake-up interrupt
251 * Sets up the wake-up event conditionally based on the
264 * dev_pm_disarm_wake_irq - Disarm device wake-up
265 * @wirq: Device wake-up interrupt
267 * Clears up the wake-up event conditionally based on the
|
| /linux-4.4.14/drivers/scsi/ |
| H A D | aha1740.h | 84 #define any2scsi(up, p) \
85 (up)[0] = (((unsigned long)(p)) >> 16) ; \
86 (up)[1] = (((unsigned long)(p)) >> 8); \
87 (up)[2] = ((unsigned long)(p));
89 #define scsi2int(up) ( (((long)*(up)) << 16) + (((long)(up)[1]) << 8) + ((long)(up)[2]) )
91 #define xany2scsi(up, p) \
92 (up)[0] = ((long)(p)) >> 24; \
93 (up)[1] = ((long)(p)) >> 16; \
94 (up)[2] = ((long)(p)) >> 8; \
95 (up)[3] = ((long)(p));
97 #define xscsi2int(up) ( (((long)(up)[0]) << 24) + (((long)(up)[1]) << 16) \
98 + (((long)(up)[2]) << 8) + ((long)(up)[3]) )
|
| H A D | aha1542.h | 72 #define scsi2int(up) ( (((long)*(up)) << 16) + (((long)(up)[1]) << 8) + ((long)(up)[2]) )
74 #define xscsi2int(up) ( (((long)(up)[0]) << 24) + (((long)(up)[1]) << 16) \
75 + (((long)(up)[2]) << 8) + ((long)(up)[3]) )
|
| /linux-4.4.14/scripts/ |
| H A D | bloat-o-meter | 33 grow, shrink, add, remove, up, down = 0, 0, 0, 0, 0, 0
49 up += new[name]
54 if d>0: grow, up = grow+1, up+d
61 print("add/remove: %s/%s grow/shrink: %s/%s up/down: %s/%s (%s)" % \
62 (add, remove, grow, shrink, up, -down, up-down))
|
| /linux-4.4.14/arch/x86/platform/ce4100/ |
| H A D | ce4100.c | 93 static void ce4100_serial_fixup(int port, struct uart_port *up, ce4100_serial_fixup() argument
102 if (up->iotype != UPIO_MEM32) { ce4100_serial_fixup()
103 up->uartclk = 14745600; ce4100_serial_fixup()
104 up->mapbase = 0xdffe0200; ce4100_serial_fixup()
106 up->mapbase & PAGE_MASK); ce4100_serial_fixup()
107 up->membase = ce4100_serial_fixup()
109 up->membase += up->mapbase & ~PAGE_MASK; ce4100_serial_fixup()
110 up->mapbase += port * 0x100; ce4100_serial_fixup()
111 up->membase += port * 0x100; ce4100_serial_fixup()
112 up->iotype = UPIO_MEM32; ce4100_serial_fixup()
113 up->regshift = 2; ce4100_serial_fixup()
114 up->irq = 4; ce4100_serial_fixup()
117 up->iobase = 0; ce4100_serial_fixup()
118 up->serial_in = ce4100_mem_serial_in; ce4100_serial_fixup()
119 up->serial_out = ce4100_mem_serial_out; ce4100_serial_fixup()
|
| /linux-4.4.14/include/linux/ |
| H A D | start_kernel.h | 8 up something else. */
|
| H A D | serial_8250.h | 127 static inline struct uart_8250_port *up_to_u8250p(struct uart_port *up) up_to_u8250p() argument
129 return container_of(up, struct uart_8250_port, port); up_to_u8250p()
150 unsigned char serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr);
151 void serial8250_tx_chars(struct uart_8250_port *up);
152 unsigned int serial8250_modem_status(struct uart_8250_port *up);
153 void serial8250_init_port(struct uart_8250_port *up);
154 void serial8250_set_defaults(struct uart_8250_port *up);
155 void serial8250_console_write(struct uart_8250_port *up, const char *s,
160 (int port, struct uart_port *up,
|
| H A D | circ_buf.h | 22 /* Return count up to the end of the buffer. Carefully avoid
30 /* Return space available up to the end of the buffer. */
|
| H A D | lis3lv02d.h | 14 * data available / wake up, open drain, polarity)
17 * @duration1: Wake up unit 1 duration parameter
18 * @duration2: Wake up unit 2 duration parameter
19 * @wakeup_flags: Wake up unit 1 flags
20 * @wakeup_thresh: Wake up unit 1 threshold value
21 * @wakeup_flags2: Wake up unit 2 flags
22 * @wakeup_thresh2: Wake up unit 2 threshold value
39 * only for the 8 bit device. The 8 bit device has two wake up / free fall
|
| H A D | gpio_mouse.h | 30 * @up: GPIO line for up value.
48 int up; member in struct:gpio_mouse_platform_data::__anon12324::__anon12325
|
| H A D | getcpu.h | 4 /* Cache for getcpu() to speed it up. Results might be a short time
|
| H A D | log2.h | 58 * round up to nearest power of two
161 * roundup_pow_of_two - round the given value up to nearest power of two
164 * round the given value up to the nearest power of two
193 * order_base_2 - calculate the (rounded up) base 2 order of the argument
|
| /linux-4.4.14/include/linux/soc/brcmstb/ |
| H A D | brcmstb.h | 6 * before SMP is brought up, called by machine entry point.
|
| /linux-4.4.14/tools/testing/selftests/firmware/ |
| H A D | Makefile | 10 # Nothing to clean up.
|
| /linux-4.4.14/tools/testing/selftests/sysctl/ |
| H A D | Makefile | 12 # Nothing to clean up.
|
| /linux-4.4.14/include/net/caif/ |
| H A D | cfmuxl.h | 15 int cfmuxl_set_uplayer(struct cflayer *layr, struct cflayer *up, u8 linkid);
17 int cfmuxl_set_dnlayer(struct cflayer *layr, struct cflayer *up, u8 phyid);
|
| H A D | cfsrvl.h | 51 if (layr == NULL || layr->up == NULL || s->hold == NULL) cfsrvl_get()
54 s->hold(layr->up); cfsrvl_get()
60 if (layr == NULL || layr->up == NULL || s->hold == NULL) cfsrvl_put()
63 s->put(layr->up); cfsrvl_put()
|
| H A D | cffrml.h | 15 void cffrml_set_uplayer(struct cflayer *this, struct cflayer *up);
|
| /linux-4.4.14/arch/metag/include/asm/ |
| H A D | delay.h | 19 /* 0x10c7 is 2**32 / 1000000 (rounded up) */
24 /* 0x5 is 2**32 / 1000000000 (rounded up) */
|
| H A D | da.h | 30 * This is used at start up to detect whether a DA is active.
|
| /linux-4.4.14/arch/h8300/lib/ |
| H A D | delay.c | 32 __const_udelay(usecs * 0x10C7UL); /* 2**32 / 1000000 (rounded up) */ __udelay()
38 __const_udelay(nsecs * 0x5UL); /* 2**32 / 1000000000 (rounded up) */ __ndelay()
|
| /linux-4.4.14/ipc/ |
| H A D | compat.c | 148 struct compat_ipc_perm __user *up) __get_compat_ipc_perm()
152 err = __get_user(p->uid, &up->uid); __get_compat_ipc_perm()
153 err |= __get_user(p->gid, &up->gid); __get_compat_ipc_perm()
154 err |= __get_user(p->mode, &up->mode); __get_compat_ipc_perm()
203 struct compat_semid_ds __user *up) get_compat_semid_ds()
205 if (!access_ok(VERIFY_READ, up, sizeof(*up))) get_compat_semid_ds()
207 return __get_compat_ipc_perm(&s->sem_perm, &up->sem_perm); get_compat_semid_ds()
225 struct compat_semid_ds __user *up) put_compat_semid_ds()
229 if (!access_ok(VERIFY_WRITE, up, sizeof(*up))) put_compat_semid_ds()
231 err = __put_compat_ipc_perm(&s->sem_perm, &up->sem_perm); put_compat_semid_ds()
232 err |= __put_user(s->sem_otime, &up->sem_otime); put_compat_semid_ds()
233 err |= __put_user(s->sem_ctime, &up->sem_ctime); put_compat_semid_ds()
234 err |= __put_user(s->sem_nsems, &up->sem_nsems); put_compat_semid_ds()
355 struct compat_msgbuf __user *up = compat_ptr(ptr); COMPAT_SYSCALL_DEFINE6() local
361 if (get_user(type, &up->mtype)) COMPAT_SYSCALL_DEFINE6()
364 return do_msgsnd(first, type, up->mtext, second, third); COMPAT_SYSCALL_DEFINE6()
421 struct compat_msgbuf __user *up = compat_ptr(msgp); COMPAT_SYSCALL_DEFINE4() local
424 if (get_user(mtype, &up->mtype)) COMPAT_SYSCALL_DEFINE4()
426 return do_msgsnd(msqid, mtype, up->mtext, (ssize_t)msgsz, msgflg); COMPAT_SYSCALL_DEFINE4()
449 struct compat_msqid_ds __user *up) get_compat_msqid()
453 if (!access_ok(VERIFY_READ, up, sizeof(*up))) get_compat_msqid()
455 err = __get_compat_ipc_perm(&m->msg_perm, &up->msg_perm); get_compat_msqid()
456 err |= __get_user(m->msg_qbytes, &up->msg_qbytes); get_compat_msqid()
480 struct compat_msqid_ds __user *up) put_compat_msqid_ds()
484 if (!access_ok(VERIFY_WRITE, up, sizeof(*up))) put_compat_msqid_ds()
486 err = __put_compat_ipc_perm(&m->msg_perm, &up->msg_perm); put_compat_msqid_ds()
487 err |= __put_user(m->msg_stime, &up->msg_stime); put_compat_msqid_ds()
488 err |= __put_user(m->msg_rtime, &up->msg_rtime); put_compat_msqid_ds()
489 err |= __put_user(m->msg_ctime, &up->msg_ctime); put_compat_msqid_ds()
490 err |= __put_user(m->msg_cbytes, &up->msg_cbytes); put_compat_msqid_ds()
491 err |= __put_user(m->msg_qnum, &up->msg_qnum); put_compat_msqid_ds()
492 err |= __put_user(m->msg_qbytes, &up->msg_qbytes); put_compat_msqid_ds()
493 err |= __put_user(m->msg_lspid, &up->msg_lspid); put_compat_msqid_ds()
494 err |= __put_user(m->msg_lrpid, &up->msg_lrpid); put_compat_msqid_ds()
573 struct compat_shmid_ds __user *up) get_compat_shmid_ds()
575 if (!access_ok(VERIFY_READ, up, sizeof(*up))) get_compat_shmid_ds()
577 return __get_compat_ipc_perm(&s->shm_perm, &up->shm_perm); get_compat_shmid_ds()
599 struct compat_shmid_ds __user *up) put_compat_shmid_ds()
603 if (!access_ok(VERIFY_WRITE, up, sizeof(*up))) put_compat_shmid_ds()
605 err = __put_compat_ipc_perm(&s->shm_perm, &up->shm_perm); put_compat_shmid_ds()
606 err |= __put_user(s->shm_atime, &up->shm_atime); put_compat_shmid_ds()
607 err |= __put_user(s->shm_dtime, &up->shm_dtime); put_compat_shmid_ds()
608 err |= __put_user(s->shm_ctime, &up->shm_ctime); put_compat_shmid_ds()
609 err |= __put_user(s->shm_segsz, &up->shm_segsz); put_compat_shmid_ds()
610 err |= __put_user(s->shm_nattch, &up->shm_nattch); put_compat_shmid_ds()
611 err |= __put_user(s->shm_cpid, &up->shm_cpid); put_compat_shmid_ds()
612 err |= __put_user(s->shm_lpid, &up->shm_lpid); put_compat_shmid_ds()
634 struct shminfo __user *up) put_compat_shminfo()
638 if (!access_ok(VERIFY_WRITE, up, sizeof(*up))) put_compat_shminfo()
642 err = __put_user(smi->shmmax, &up->shmmax); put_compat_shminfo()
643 err |= __put_user(smi->shmmin, &up->shmmin); put_compat_shminfo()
644 err |= __put_user(smi->shmmni, &up->shmmni); put_compat_shminfo()
645 err |= __put_user(smi->shmseg, &up->shmseg); put_compat_shminfo()
646 err |= __put_user(smi->shmall, &up->shmall); put_compat_shminfo()
147 __get_compat_ipc_perm(struct ipc64_perm *p, struct compat_ipc_perm __user *up) __get_compat_ipc_perm() argument
202 get_compat_semid_ds(struct semid64_ds *s, struct compat_semid_ds __user *up) get_compat_semid_ds() argument
224 put_compat_semid_ds(struct semid64_ds *s, struct compat_semid_ds __user *up) put_compat_semid_ds() argument
448 get_compat_msqid(struct msqid64_ds *m, struct compat_msqid_ds __user *up) get_compat_msqid() argument
479 put_compat_msqid_ds(struct msqid64_ds *m, struct compat_msqid_ds __user *up) put_compat_msqid_ds() argument
572 get_compat_shmid_ds(struct shmid64_ds *s, struct compat_shmid_ds __user *up) get_compat_shmid_ds() argument
598 put_compat_shmid_ds(struct shmid64_ds *s, struct compat_shmid_ds __user *up) put_compat_shmid_ds() argument
633 put_compat_shminfo(struct shminfo64 *smi, struct shminfo __user *up) put_compat_shminfo() argument
|
| /linux-4.4.14/arch/blackfin/mach-bf609/ |
| H A D | dpm.S | 37 /* DPM wake up interrupt won't wake up core on bf60x if its core IMASK
45 /* get wake up interrupt ID */
50 /* ACK wake up interrupt in SEC */
75 /* Change EVT 11 entry to dummy handler for wake up event */
102 /* Enable evt 11 in IMASK before idle, otherwise core doesn't wake up. */
114 /* Restore PLL after wake up from deep sleep */
|
| /linux-4.4.14/arch/arm/mach-pxa/include/mach/ |
| H A D | pxa2xx-regs.h | 26 #define PWER __REG(0x40F0000C) /* Power Manager Wake-up Enable Register */
41 #define PKWR __REG(0x40F00050) /* Power Manager KB Wake-up Enable Reg */
115 #define PWER_GPIO(Nb) (1 << Nb) /* GPIO [0..15] wake-up enable */
116 #define PWER_GPIO0 PWER_GPIO (0) /* GPIO [0] wake-up enable */
117 #define PWER_GPIO1 PWER_GPIO (1) /* GPIO [1] wake-up enable */
118 #define PWER_GPIO2 PWER_GPIO (2) /* GPIO [2] wake-up enable */
119 #define PWER_GPIO3 PWER_GPIO (3) /* GPIO [3] wake-up enable */
120 #define PWER_GPIO4 PWER_GPIO (4) /* GPIO [4] wake-up enable */
121 #define PWER_GPIO5 PWER_GPIO (5) /* GPIO [5] wake-up enable */
122 #define PWER_GPIO6 PWER_GPIO (6) /* GPIO [6] wake-up enable */
123 #define PWER_GPIO7 PWER_GPIO (7) /* GPIO [7] wake-up enable */
124 #define PWER_GPIO8 PWER_GPIO (8) /* GPIO [8] wake-up enable */
125 #define PWER_GPIO9 PWER_GPIO (9) /* GPIO [9] wake-up enable */
126 #define PWER_GPIO10 PWER_GPIO (10) /* GPIO [10] wake-up enable */
127 #define PWER_GPIO11 PWER_GPIO (11) /* GPIO [11] wake-up enable */
128 #define PWER_GPIO12 PWER_GPIO (12) /* GPIO [12] wake-up enable */
129 #define PWER_GPIO13 PWER_GPIO (13) /* GPIO [13] wake-up enable */
130 #define PWER_GPIO14 PWER_GPIO (14) /* GPIO [14] wake-up enable */
131 #define PWER_GPIO15 PWER_GPIO (15) /* GPIO [15] wake-up enable */
132 #define PWER_RTC 0x80000000 /* RTC alarm wake-up enable */
|
| /linux-4.4.14/include/asm-generic/ |
| H A D | delay.h | 18 /* 0x10c7 is 2**32 / 1000000 (rounded up) */
31 /* 0x5 is 2**32 / 1000000000 (rounded up) */
|
| H A D | clkdev.h | 11 * Helper for the clk API to assist looking up a struct clk.
|
| /linux-4.4.14/fs/hpfs/ |
| H A D | dnode.c | 221 if (le32_to_cpu(dd->up) != dno || dd->root_dnode) { fix_up_ptrs()
222 dd->up = cpu_to_le32(dno); fix_up_ptrs()
300 if (!(ad = hpfs_alloc_dnode(i->i_sb, le32_to_cpu(d->up), &adno, &qbh1))) { hpfs_add_to_dnode()
329 ad->up = d->up; hpfs_add_to_dnode()
330 dno = le32_to_cpu(ad->up); hpfs_add_to_dnode()
337 if (!(rd = hpfs_alloc_dnode(i->i_sb, le32_to_cpu(d->up), &rdno, &qbh2))) { hpfs_add_to_dnode()
348 rd->up = d->up; hpfs_add_to_dnode()
349 if (!(fnode = hpfs_map_fnode(i->i_sb, le32_to_cpu(d->up), &bh))) { hpfs_add_to_dnode()
362 d->up = ad->up = cpu_to_le32(rdno); hpfs_add_to_dnode()
447 if (le32_to_cpu(dnode->up) != chk_up) { move_to_top()
448 hpfs_error(i->i_sb, "move_to_top: up pointer from %08x should be %08x, is %08x", move_to_top()
449 dno, chk_up, le32_to_cpu(dnode->up)); move_to_top()
465 dnode_secno up = le32_to_cpu(dnode->up); move_to_top() local
471 if (up == to) return to; move_to_top()
472 if (!(dnode = hpfs_map_dnode(i->i_sb, up, &qbh))) return 0; move_to_top()
480 hpfs_error(i->i_sb, "move_to_top: dnode %08x doesn't point down to %08x", up, dno); move_to_top()
488 dno = up; move_to_top()
520 dnode_secno down, up, ndown; delete_empty_dnode() local
531 up = le32_to_cpu(dnode->up); delete_empty_dnode()
548 if (up != i->i_ino) { delete_empty_dnode()
551 dno, up, delete_empty_dnode()
556 d1->up = cpu_to_le32(up); delete_empty_dnode()
561 if ((fnode = hpfs_map_fnode(i->i_sb, up, &bh))) { delete_empty_dnode()
570 if (!(dnode = hpfs_map_dnode(i->i_sb, up, &qbh))) return; delete_empty_dnode()
575 hpfs_error(i->i_sb, "delete_empty_dnode: pointer to dnode %08x not found in dnode %08x", dno, up); delete_empty_dnode()
578 for_all_poss(i, hpfs_pos_subst, ((loff_t)dno << 4) | 1, ((loff_t)up << 4) | p); delete_empty_dnode()
590 d1->up = cpu_to_le32(up); delete_empty_dnode()
615 for_all_poss(i, hpfs_pos_subst, ((loff_t)up << 4) | p, 4); delete_empty_dnode()
616 for_all_poss(i, hpfs_pos_del, ((loff_t)up << 4) | p, 1); delete_empty_dnode()
618 d1->up = cpu_to_le32(ndown); delete_empty_dnode()
624 up, ndown, down, dno);*/ delete_empty_dnode()
625 dno = up; delete_empty_dnode()
635 hpfs_error(i->i_sb, "delete_empty_dnode: empty dnode %08x", up); delete_empty_dnode()
638 dno = up; delete_empty_dnode()
687 for_all_poss(i, hpfs_pos_subst, ((loff_t)up << 4) | (p - 1), 4); delete_empty_dnode()
688 for_all_poss(i, hpfs_pos_subst, ((loff_t)up << 4) | p, ((loff_t)up << 4) | (p - 1)); delete_empty_dnode()
690 d1->up = cpu_to_le32(ndown); delete_empty_dnode()
695 dno = up; delete_empty_dnode()
757 if (hpfs_sb(s)->sb_chk) if (odno && odno != -1 && le32_to_cpu(dnode->up) != odno) hpfs_count_dnodes()
758 hpfs_error(s, "hpfs_count_dnodes: bad up pointer; dnode %08x, down %08x points to %08x", odno, dno, le32_to_cpu(dnode->up)); hpfs_count_dnodes()
782 dno = le32_to_cpu(dnode->up); hpfs_count_dnodes()
820 dnode_secno up = 0; hpfs_de_as_down_as_possible() local
830 if (up && le32_to_cpu(((struct dnode *)qbh.data)->up) != up) hpfs_de_as_down_as_possible()
831 hpfs_error(s, "hpfs_de_as_down_as_possible: bad up pointer; dnode %08x, down %08x points to %08x", up, d, le32_to_cpu(((struct dnode *)qbh.data)->up)); hpfs_de_as_down_as_possible()
836 up = d; hpfs_de_as_down_as_possible()
877 /* Going up */ map_pos_dirent()
880 if (!(up_dnode = hpfs_map_dnode(inode->i_sb, le32_to_cpu(dnode->up), &qbh0))) map_pos_dirent()
888 "map_pos_dirent: pos crossed dnode boundary; dnode = %08x", le32_to_cpu(dnode->up)); map_pos_dirent()
890 *posp = ((loff_t) le32_to_cpu(dnode->up) << 4) + c; map_pos_dirent()
897 dno, le32_to_cpu(dnode->up)); map_pos_dirent()
1023 if (!(upf = hpfs_map_fnode(s, le32_to_cpu(f->up), &bh))) { map_fnode_dirent()
1029 hpfs_error(s, "fnode %08x has non-directory parent %08x", fno, le32_to_cpu(f->up)); map_fnode_dirent()
1080 dno = le32_to_cpu(d->up); map_fnode_dirent()
|
| H A D | anode.c | 65 anode_secno a, na = -1, ra, up = -1; hpfs_add_sector_to_btree() local
124 up = a != node ? le32_to_cpu(anode->up) : -1; hpfs_add_sector_to_btree()
131 anode->up = cpu_to_le32(node); hpfs_add_sector_to_btree()
164 while (up != (anode_secno)-1) { hpfs_add_sector_to_btree()
167 if (hpfs_stop_cycles(s, up, &c1, &c2, "hpfs_add_sector_to_btree #2")) return -1; hpfs_add_sector_to_btree()
168 if (up != node || !fnod) { hpfs_add_sector_to_btree()
169 if (!(anode = hpfs_map_anode(s, up, &bh))) return -1; hpfs_add_sector_to_btree()
172 if (!(fnode = hpfs_map_fnode(s, up, &bh))) return -1; hpfs_add_sector_to_btree()
186 anode->up = cpu_to_le32(up); hpfs_add_sector_to_btree()
187 if (up == node && fnod) hpfs_add_sector_to_btree()
196 up = up != node ? le32_to_cpu(anode->up) : -1; hpfs_add_sector_to_btree()
203 /*anode->up = cpu_to_le32(up != -1 ? up : ra);*/ hpfs_add_sector_to_btree()
213 anode->up = cpu_to_le32(na); hpfs_add_sector_to_btree()
220 anode->up = cpu_to_le32(node); hpfs_add_sector_to_btree()
239 ranode->up = cpu_to_le32(node); hpfs_add_sector_to_btree()
247 unode->up = cpu_to_le32(ra); hpfs_add_sector_to_btree()
306 ano = le32_to_cpu(anode->up); hpfs_remove_btree()
321 "(probably bad up pointer)", hpfs_remove_btree()
|
| /linux-4.4.14/arch/cris/include/arch-v10/arch/ |
| H A D | tlb.h | 4 /* The TLB can host up to 64 different mm contexts at the same time.
|
| /linux-4.4.14/include/sound/ |
| H A D | designware_i2s.h | 66 #define TWO_CHANNEL_SUPPORT 2 /* up to 2.0 */
67 #define FOUR_CHANNEL_SUPPORT 4 /* up to 3.1 */
68 #define SIX_CHANNEL_SUPPORT 6 /* up to 5.1 */
69 #define EIGHT_CHANNEL_SUPPORT 8 /* up to 7.1 */
|
| H A D | emux_legacy.h | 91 /* 1*/ EMUX_FX_ENV1_ATTACK, /* BYTE: up ATKHLD */
95 /* 5*/ EMUX_FX_ENV1_SUSTAIN, /* BYTE: up DCYSUS */
96 /* 6*/ EMUX_FX_ENV1_PITCH, /* BYTE: up PEFE */
101 /* 9*/ EMUX_FX_ENV2_ATTACK, /* BYTE: up ATKHLDV */
105 /*13*/ EMUX_FX_ENV2_SUSTAIN, /* BYTE: up DCYSUSV */
110 /*16*/ EMUX_FX_LFO1_VOLUME, /* BYTE: up TREMFRQ */
111 /*17*/ EMUX_FX_LFO1_PITCH, /* BYTE: up FMMOD */
117 /*21*/ EMUX_FX_LFO2_PITCH, /* BYTE: up FM2FRQ2 */
123 /*25*/ EMUX_FX_CUTOFF, /* BYTE: up IFATN */
124 /*26*/ EMUX_FX_FILTERQ, /* BYTE: up CCCA */
|
| /linux-4.4.14/include/linux/platform_data/ |
| H A D | pinctrl-single.h | 2 * irq: optional wake-up interrupt
|
| H A D | usb-s3c2410_udc.h | 22 S3C2410_UDC_P_ENABLE = 1, /* Pull-up enable */
23 S3C2410_UDC_P_DISABLE = 2, /* Pull-up disable */
|
| H A D | at24.h | 15 * struct at24_platform_data - data to set up at24 (generic eeprom) driver
23 * If you set up a custom eeprom type, please double-check the parameters.
39 * This function pointer and context can now be set up in at24_platform_data.
|
| H A D | mmc-pxamci.h | 20 int gpio_power; /* gpio powering up MMC bus */
|
| /linux-4.4.14/arch/powerpc/mm/ |
| H A D | vphn.h | 9 * 6 64-bit registers unpacked into up to 24 be32 associativity values. To
|
| H A D | highmem.c | 14 * up to 16 Terrabyte physical memory. With current x86 CPUs
15 * we now support up to 64 Gigabytes physical RAM.
|
| /linux-4.4.14/arch/m68k/include/asm/ |
| H A D | tlb.h | 14 * fills up.
|
| /linux-4.4.14/arch/metag/kernel/ |
| H A D | time.c | 23 /* Set up the timer clock sources */ time_init()
|
| H A D | clock.c | 48 * init_metag_core_clock() - Set up core clock from devicetree.
82 * init_metag_clocks() - Set up clocks from devicetree.
84 * Set up important clocks from device tree. In particular any needed for clock
95 * setup_meta_clocks() - Early set up of the Meta clock.
|
| /linux-4.4.14/arch/h8300/include/asm/ |
| H A D | string.h | 4 #ifdef __KERNEL__ /* only set these up for kernel code */
|
| /linux-4.4.14/arch/m32r/include/asm/ |
| H A D | tlb.h | 14 * fills up.
|
| /linux-4.4.14/arch/blackfin/include/asm/ |
| H A D | tlb.h | 16 * fills up.
|
| /linux-4.4.14/include/linux/i2c/ |
| H A D | mpr121_touchkey.h | 10 * @wakeup: configure the button as a wake-up source
|
| /linux-4.4.14/tools/testing/selftests/powerpc/vphn/ |
| H A D | vphn.h | 9 * 6 64-bit registers unpacked into up to 24 be32 associativity values. To
|
| /linux-4.4.14/drivers/staging/iio/frequency/ |
| H A D | ad9832.h | 108 * @freq0: power up freq0 tuning word in Hz
109 * @freq1: power up freq1 tuning word in Hz
110 * @phase0: power up phase0 value [0..4095] correlates with 0..2PI
111 * @phase1: power up phase1 value [0..4095] correlates with 0..2PI
112 * @phase2: power up phase2 value [0..4095] correlates with 0..2PI
113 * @phase3: power up phase3 value [0..4095] correlates with 0..2PI
|
| H A D | ad9834.h | 79 * @freq0: power up freq0 tuning word in Hz
80 * @freq1: power up freq1 tuning word in Hz
81 * @phase0: power up phase0 value [0..4095] correlates with 0..2PI
82 * @phase1: power up phase1 value [0..4095] correlates with 0..2PI
|
| /linux-4.4.14/fs/jfs/ |
| H A D | jfs_unicode.h | 146 wchar_t *up; UniStrupr() local
148 up = upin; UniStrupr()
149 while (*up) { /* For all characters */ UniStrupr()
150 *up = UniToupper(*up); UniStrupr()
151 up++; UniStrupr()
|
| /linux-4.4.14/drivers/iio/ |
| H A D | iio_core_trigger.h | 13 * iio_device_register_trigger_consumer() - set up an iio_dev to use triggers
27 * iio_device_register_trigger_consumer() - set up an iio_dev to use triggers
|
| H A D | industrialio-triggered-event.c | 24 * when setting up a triggered event. It will allocate the pollfunc_event and
67 MODULE_DESCRIPTION("IIO helper functions for setting up triggered events");
|
| /linux-4.4.14/arch/x86/um/ |
| H A D | delay.c | 52 __const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */ __udelay()
58 __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */ __ndelay()
|
| /linux-4.4.14/arch/metag/lib/ |
| H A D | delay.c | 48 __const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */ __udelay()
54 __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */ __ndelay()
|
| /linux-4.4.14/arch/openrisc/lib/ |
| H A D | delay.c | 52 __const_udelay(usecs * 0x10C7UL); /* 2**32 / 1000000 (rounded up) */ __udelay()
58 __const_udelay(nsecs * 0x5UL); /* 2**32 / 1000000000 (rounded up) */ __ndelay()
|
| /linux-4.4.14/arch/powerpc/boot/ |
| H A D | page.h | 24 /* align addr on a size boundary - adjust address up/down if needed */
28 /* align addr on a size boundary - adjust address up if needed */
|
| H A D | virtex405-head.S | 14 * - The 405 core does not invalidate the data cache on power-up
|
| /linux-4.4.14/arch/avr32/lib/ |
| H A D | delay.c | 51 __const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */ __udelay()
56 __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */ __ndelay()
|
| /linux-4.4.14/arch/avr32/mach-at32ap/include/mach/ |
| H A D | portmux.h | 14 * Set up pin multiplexing, called from board init only.
18 #define AT32_GPIOF_PULLUP 0x00000001 /* (not-OUT) Enable pull-up */
|
| /linux-4.4.14/arch/blackfin/kernel/cplb-nompu/ |
| H A D | cplbinit.c | 38 printk(KERN_INFO "NOMPU: setting up cplb tables\n"); generate_cplb_tables_cpu()
43 /* Set up the zero page. */ generate_cplb_tables_cpu()
150 /* Addressing hole up to the async bank. */ generate_cplb_tables_all()
156 /* Addressing hole up to BootROM. */ generate_cplb_tables_all()
163 /* Addressing hole up to L2 SRAM. */ generate_cplb_tables_all()
189 /* Addressing hole up to the async bank. */ generate_cplb_tables_all()
195 /* Addressing hole up to BootROM. */ generate_cplb_tables_all()
203 /* Addressing hole up to L2 SRAM. */ generate_cplb_tables_all()
|
| /linux-4.4.14/sound/firewire/digi00x/ |
| H A D | digi00x-midi.c | 44 int up) midi_phys_capture_trigger()
51 if (up) midi_phys_capture_trigger()
62 int up) midi_phys_playback_trigger()
69 if (up) midi_phys_playback_trigger()
113 int up) midi_ctl_capture_trigger()
120 if (up) midi_ctl_capture_trigger()
129 int up) midi_ctl_playback_trigger()
136 if (up) midi_ctl_playback_trigger()
43 midi_phys_capture_trigger(struct snd_rawmidi_substream *substream, int up) midi_phys_capture_trigger() argument
61 midi_phys_playback_trigger(struct snd_rawmidi_substream *substream, int up) midi_phys_playback_trigger() argument
112 midi_ctl_capture_trigger(struct snd_rawmidi_substream *substream, int up) midi_ctl_capture_trigger() argument
128 midi_ctl_playback_trigger(struct snd_rawmidi_substream *substream, int up) midi_ctl_playback_trigger() argument
|
| /linux-4.4.14/drivers/thunderbolt/ |
| H A D | tunnel_pci.h | 21 struct tb_pci_tunnel *tb_pci_alloc(struct tb *tb, struct tb_port *up,
|
| H A D | tunnel_pci.c | 58 struct tb_pci_tunnel *tb_pci_alloc(struct tb *tb, struct tb_port *up, tb_pci_alloc() argument
66 tunnel->up_port = up; tb_pci_alloc()
68 tunnel->path_to_up = tb_path_alloc(up->sw->tb, 2); tb_pci_alloc()
71 tunnel->path_to_down = tb_path_alloc(up->sw->tb, 2); tb_pci_alloc()
80 tunnel->path_to_up->hops[0].out_port = tb_upstream_port(up->sw)->remote; tb_pci_alloc()
83 tunnel->path_to_up->hops[1].in_port = tb_upstream_port(up->sw); tb_pci_alloc()
86 tunnel->path_to_up->hops[1].out_port = up; tb_pci_alloc()
89 tunnel->path_to_down->hops[0].in_port = up; tb_pci_alloc()
92 tunnel->path_to_down->hops[0].out_port = tb_upstream_port(up->sw); tb_pci_alloc()
96 tb_upstream_port(up->sw)->remote; tb_pci_alloc()
221 * TODO: enable reset by writing 0x04000000 to TB_CAP_PCIE + 1 on up tb_pci_deactivate()
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| H A D | i2c.h | 9 /* made up - mostly */
|
| /linux-4.4.14/arch/mips/include/asm/ |
| H A D | clkdev.h | 10 * Helper for the clk API to assist looking up a struct clk.
|
| H A D | tlb.h | 17 * .. because we flush the whole mm when it fills up.
|
| H A D | highmem.h | 12 * up to 16 Terabyte physical memory. With current x86 CPUs
13 * we now support up to 64 Gigabytes physical RAM.
|
| /linux-4.4.14/arch/sh/include/asm/ |
| H A D | setup.h | 7 * This is set up by the setup-routine at boot-time
|
| H A D | shmparam.h | 15 * SH-4 and SH-3 7705 have an aliasing dcache. Bump this up to a sensible value
|
| H A D | clkdev.h | 8 * Helper for the clk API to assist looking up a struct clk.
|
| /linux-4.4.14/arch/mips/bcm63xx/ |
| H A D | prom.c | 58 /* set up SMP */ prom_init()
79 * The bootloader has set up the CPU1 reset vector at prom_init()
82 * The bootloader has also set up CPU1 to respond to the wrong prom_init()
84 * Here we will start up CPU1 in the background and ask it to prom_init()
|
| /linux-4.4.14/arch/frv/include/asm/ |
| H A D | tlb.h | 20 * .. because we flush the whole mm when it fills up
|
| /linux-4.4.14/arch/ia64/lib/ |
| H A D | checksum.c | 21 /* add up 32-bit words for 33 bits */ from64to16()
23 /* add up 16-bit and 17-bit words for 17+c bits */ from64to16()
25 /* add up 16-bit and 2-bit for 16+c bit */ from64to16()
27 /* add up carry.. */ from64to16()
|
| H A D | csum_partial_copy.c | 22 /* add up 32-bit words for 33 bits */ from64to16()
24 /* add up 16-bit and 17-bit words for 17+c bits */ from64to16()
26 /* add up 16-bit and 2-bit for 16+c bit */ from64to16()
28 /* add up carry.. */ from64to16()
|
| /linux-4.4.14/arch/m68k/hp300/ |
| H A D | reboot.S | 7 * good stuff that head.S did when we started up. The caches and MMU must be
|
| /linux-4.4.14/arch/arm/include/asm/ |
| H A D | processor.h | 94 #define __ALT_SMP_ASM(smp, up) \
98 " " up "\n" \
101 #define __ALT_SMP_ASM(smp, up) up
|
| H A D | sparsemem.h | 15 * Eg, if you have 2 banks of up to 64MB at 0x80000000, 0x84000000,
|
| H A D | clkdev.h | 10 * Helper for the clk API to assist looking up a struct clk.
|
| /linux-4.4.14/sound/firewire/dice/ |
| H A D | dice-midi.c | 47 static void midi_capture_trigger(struct snd_rawmidi_substream *substrm, int up) midi_capture_trigger() argument
54 if (up) midi_capture_trigger()
64 static void midi_playback_trigger(struct snd_rawmidi_substream *substrm, int up) midi_playback_trigger() argument
71 if (up) midi_playback_trigger()
|
| /linux-4.4.14/sound/firewire/tascam/ |
| H A D | tascam-midi.c | 42 static void midi_capture_trigger(struct snd_rawmidi_substream *substrm, int up) midi_capture_trigger() argument
49 if (up) midi_capture_trigger()
57 static void midi_playback_trigger(struct snd_rawmidi_substream *substrm, int up) midi_playback_trigger() argument
64 if (up) midi_playback_trigger()
|
| /linux-4.4.14/include/linux/input/ |
| H A D | gp2ap002a00f.h | 12 * @hw_setup: Callback for setting up hardware such as gpios and vregs
|
| /linux-4.4.14/drivers/spi/ |
| H A D | spi-bcm53xx.h | 49 #define B53SPI_MSPI_TXRAM 0x240 /* 32 registers, up to 0x2b8 */
50 #define B53SPI_MSPI_RXRAM 0x2c0 /* 32 registers, up to 0x33c */
51 #define B53SPI_MSPI_CDRAM 0x340 /* 16 registers, up to 0x37c */
|
| /linux-4.4.14/arch/arm/plat-samsung/include/plat/ |
| H A D | gpio-cfg-helpers.h | 51 /* Pull-{up,down} resistor controls.
60 * s3c24xx_gpio_setpull_1up() - Pull configuration for choice of up or none.
66 * bit configuring the presence of a pull-up resistor.
84 * samsung_gpio_setpull_upown() - Pull configuration for choice of up,
95 * 01 = Pull-up resistor connected
102 * samsung_gpio_getpull_updown() - Get configuration for choice of up,
108 * This helper function reads the state of the pull-{up,down} resistor
115 * s3c24xx_gpio_getpull_1up() - Get configuration for choice of up or none
119 * This helper function reads the state of the pull-up resistor for the
145 * 00 = Pull-up resistor connected
147 * x1 = No pull up resistor
157 * This helper function reads the state of the pull-{up,down} resistor for the
|
| /linux-4.4.14/arch/arm/mach-imx/ |
| H A D | cpuidle-imx6sx.c | 95 * set ARM power up/down timing to the fastest, imx6sx_cpuidle_init()
97 * except for power up sw2iso which need to be imx6sx_cpuidle_init()
98 * larger than LDO ramp up time. imx6sx_cpuidle_init()
|
| /linux-4.4.14/drivers/usb/host/ |
| H A D | uhci-debug.c | 560 struct uhci_debug *up; uhci_debug_open() local
563 up = kmalloc(sizeof(*up), GFP_KERNEL); uhci_debug_open()
564 if (!up) uhci_debug_open()
567 up->data = kmalloc(MAX_OUTPUT, GFP_KERNEL); uhci_debug_open()
568 if (!up->data) { uhci_debug_open()
569 kfree(up); uhci_debug_open()
573 up->size = 0; uhci_debug_open()
576 up->size = uhci_sprint_schedule(uhci, up->data, uhci_debug_open()
580 file->private_data = up; uhci_debug_open()
587 struct uhci_debug *up; uhci_debug_lseek() local
590 up = file->private_data; uhci_debug_lseek()
604 if (new < 0 || new > up->size) uhci_debug_lseek()
613 struct uhci_debug *up = file->private_data; uhci_debug_read() local
614 return simple_read_from_buffer(buf, nbytes, ppos, up->data, up->size); uhci_debug_read()
619 struct uhci_debug *up = file->private_data; uhci_debug_release() local
621 kfree(up->data); uhci_debug_release()
622 kfree(up); uhci_debug_release()
|
| /linux-4.4.14/arch/arm/mach-u300/ |
| H A D | regulator.c | 55 * Hog the regulators needed to power up the board.
64 pr_info("U300: setting up board power\n"); __u300_init_boardpower()
90 * On U300 a special system controller register pulls up the DC __u300_init_boardpower()
91 * until the vana15 (LDO D) regulator comes up. At this point, all __u300_init_boardpower()
96 pr_info("U300: disable system controller pull-up\n"); __u300_init_boardpower()
|
| /linux-4.4.14/fs/nfsd/ |
| H A D | nfsfh.h | 89 u32 *up; mk_fsid() local
112 up = (u32*)uuid; mk_fsid()
114 fsidv[1] = up[0] ^ up[1] ^ up[2] ^ up[3]; mk_fsid()
119 up = (u32*)uuid; mk_fsid()
120 fsidv[0] = up[0] ^ up[2]; mk_fsid()
121 fsidv[1] = up[1] ^ up[3]; mk_fsid()
|
| /linux-4.4.14/fs/overlayfs/ |
| H A D | copy_up.c | 105 /* FIXME: copy up sparse files efficiently */ ovl_copy_up_data()
265 * Non-directores become opaque when copied up. ovl_copy_up_locked()
282 * Copy up a single dentry
285 * upper filesystem, never copied up). Directories which are on lower or
287 * userspace has to deal with it. This means, when copying up a
290 * Non-directory renames start with copy up of source if necessary. The
291 * actual rename will only proceed once the copy up was successful. Copy
292 * up uses upper parent i_mutex for exclusion. Since rename can change
293 * d_parent it is possible that the copy up will lock the old parent. At
294 * that point the file will have already been copied up anyway.
333 * CAP_SYS_ADMIN for copying up extended attributes ovl_copy_up_one()
355 /* Raced with another copy-up? Nothing to do, then... */ ovl_copy_up_one()
394 /* find the topmost dentry not yet copied up */ ovl_copy_up()
|
| /linux-4.4.14/drivers/power/reset/ |
| H A D | at91-poweroff.c | 25 #define AT91_SHDW_WKMODE0 GENMASK(2, 0) /* Wake-up 0 Mode Selection */
29 #define AT91_SHDW_RTTWKEN BIT(16) /* Real Time Timer Wake-up Enable */
30 #define AT91_SHDW_RTCWKEN BIT(17) /* Real Time Clock Wake-up Enable */
33 #define AT91_SHDW_WAKEUP0 BIT(0) /* Wake-up 0 Status */
34 #define AT91_SHDW_RTTWK BIT(16) /* Real-time Timer Wake-up */
35 #define AT91_SHDW_RTCWK BIT(17) /* Real-time Clock Wake-up [SAM9RL] */
|
| /linux-4.4.14/drivers/isdn/i4l/ |
| H A D | isdn_concap.c | 28 be set up.
29 - after the successful set up of the connection is signalled the
30 connection is considered to be reliably up.
|
| /linux-4.4.14/drivers/net/wireless/ath/wil6210/ |
| H A D | pm.c | 53 /* if netif up, hardware is alive, shut it down */ wil_suspend()
87 /* if netif up, bring hardware up wil_resume()
|
| /linux-4.4.14/drivers/gpu/drm/msm/edp/ |
| H A D | edp_phy.c | 76 void msm_edp_phy_lane_power_ctrl(struct edp_phy *phy, bool up, u32 max_lane) msm_edp_phy_lane_power_ctrl() argument
81 if (up) msm_edp_phy_lane_power_ctrl()
82 data = 0; /* power up */ msm_edp_phy_lane_power_ctrl()
|
| /linux-4.4.14/arch/blackfin/mach-common/ |
| H A D | clocks-init.c | 52 * in the middle of reprogramming things, and that'll screw us up. init_clocks()
71 * will screw up the bootrom as it relies on MDMA0/1 waking it init_clocks()
72 * up from IDLE instructions. See this report for more info: init_clocks()
|
| /linux-4.4.14/fs/cachefiles/ |
| H A D | proc.c | 52 * set up the iterator to start reading from the first line
74 * clean up after reading
128 * clean up the /proc/fs/cachefiles/ directory
|
| /linux-4.4.14/fs/cifs/ |
| H A D | cifs_unicode.h | 364 register __le16 *up; UniStrupr() local
366 up = upin; UniStrupr()
367 while (*up) { /* For all characters */ UniStrupr()
368 *up = cpu_to_le16(UniToupper(le16_to_cpu(*up))); UniStrupr()
369 up++; UniStrupr()
406 register wchar_t *up; UniStrlwr() local
408 up = upin; UniStrlwr()
409 while (*up) { /* For all characters */ UniStrlwr()
410 *up = UniTolower(*up); UniStrlwr()
411 up++; UniStrlwr()
|
| /linux-4.4.14/arch/sh/kernel/cpu/sh5/ |
| H A D | probe.c | 25 * Do peeks in real mode to avoid having to set up a mapping for cpu_probe()
28 * hard to set up correctly. cpu_probe()
57 * up later, especially if we add runtime CPU probing. cpu_probe()
|
| /linux-4.4.14/arch/m68k/mm/ |
| H A D | hwtest.c | 8 * that isn't present would cause a bus error. We set up a
19 * initialization process, when the VBR register isn't set up yet. On
22 * vector, and the CPU would do nothing at all. So we needed to set up
|
| /linux-4.4.14/arch/metag/include/asm/mach/ |
| H A D | arch.h | 31 * @init_irq: IRQ init callback for setting up IRQ controllers.
32 * @init_machine: Arch init callback for setting up devices.
37 * by the bootloader with the strings in @dt_compat, and sets up any aspects of
|
| /linux-4.4.14/arch/arm/mach-ep93xx/ |
| H A D | micro9.c | 29 * Micro9-High has up to 64MB of 32-bit flash on CS1
30 * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1
32 * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
|
| /linux-4.4.14/drivers/staging/vt6655/ |
| H A D | power.c | 34 * PSbIsNextTBTTWakeUp - Decide if we need to wake up at next Beacon
74 /* set period of power up before TBTT */ PSvEnablePowerSaving()
143 * Check if Next TBTT must wake up
167 /* Turn on wake up to listen next beacon */ PSbIsNextTBTTWakeUp()
|
| /linux-4.4.14/drivers/staging/vt6656/ |
| H A D | power.c | 31 * vnt_next_tbtt_wakeup - Decide if we need to wake up at next Beacon
59 /* set period of power up before TBTT */ vnt_enable_power_saving()
122 * Check if Next TBTT must wake up
136 /* Turn on wake up to listen next beacon */ vnt_next_tbtt_wakeup()
|
| /linux-4.4.14/drivers/net/fddi/skfp/ |
| H A D | Makefile | 18 # thus simplify fixes to it), please do not clean it up!
|
| /linux-4.4.14/drivers/oprofile/ |
| H A D | event_buffer.h | 27 /* wake up the process sleeping on the event file */
|
| /linux-4.4.14/arch/tile/kernel/ |
| H A D | smpboot.c | 35 /* The messaging code jumps to this pointer during boot-up */
65 * Pin this task to the boot CPU while we bring up the others, smp_prepare_cpus()
66 * just to make sure we don't uselessly migrate as they come up. smp_prepare_cpus()
83 /* Set up thread context for all new processors. */ smp_prepare_cpus()
116 /* Fire up the other tiles, if any */ smp_prepare_cpus()
162 /* Set up this thread as another owner of the init_mm */ start_secondary()
173 /* Indicate that we're ready to come up. */ start_secondary()
205 /* Set up tile-specific state for this cpu. */ online_secondary()
208 /* Set up tile-timer clock-event device on this cpu */ online_secondary()
|
| /linux-4.4.14/arch/x86/math-emu/ |
| H A D | reg_convert.c | 22 /* Set up the exponent as a 16 bit quantity. */ FPU_to_exp16()
|
| /linux-4.4.14/arch/x86/xen/ |
| H A D | xen-asm_32.S | 39 * But we can easily fake it up using iret. Assuming xen_sysexit is
60 * interrupt ends up setting one of the TIF_WORK_MASK pending work
62 * usermode. This means that a process can end up with pending work,
114 * afterwards. However, if that happens we don't end up
142 * Jump to hypervisor_callback after fixing up the stack.
188 * everything from the return addr up to the error code so it sits
227 lea ESP_OFFSET(%edi), %edi /* move dest up over saved regs */
229 /* set up the copy */
231 mov $PT_EIP / 4, %ecx /* saved regs up to orig_eax */
|
| /linux-4.4.14/arch/arm/boot/bootp/ |
| H A D | Makefile | 17 # Note that bootp.lds picks up kernel.o and initrd.o
|
| /linux-4.4.14/arch/blackfin/mach-bf561/ |
| H A D | hotplug.c | 22 * When CoreB wakes up, the code in _coreb_trampoline_start cannot platform_cpu_die()
|
| /linux-4.4.14/net/ceph/ |
| H A D | ceph_strings.c | 36 return "up"; ceph_osd_state_name()
|
| /linux-4.4.14/include/xen/interface/ |
| H A D | sched.h | 105 #define SHUTDOWN_poweroff 0 /* Domain exited normally. Clean up and kill. */
106 #define SHUTDOWN_reboot 1 /* Clean up, kill, and then restart. */
107 #define SHUTDOWN_suspend 2 /* Clean up, save suspend info, kill. */
114 * intact. This will allow the domain to start over and set up all Xen specific
|
| /linux-4.4.14/kernel/locking/ |
| H A D | semaphore.c | 17 * down_trylock() and up() can be called from interrupt context, so we
172 * up - release the semaphore
175 * Release the semaphore. Unlike mutexes, up() may be called from any
178 void up(struct semaphore *sem) up() function
189 EXPORT_SYMBOL(up); variable
196 bool up; member in struct:semaphore_waiter
212 waiter.up = false; __down_common()
223 if (waiter.up) __down_common()
261 waiter->up = true; __up()
|
| /linux-4.4.14/include/linux/spi/ |
| H A D | at73c213.h | 2 * Board-specific data used to set up AT73c213 audio DAC driver.
|
| H A D | mcp23s08.h | 10 /* For mcp23s08, up to 4 slaves (numbered 0..3) can share one SPI
12 * For mpc23s17, up to 8 slaves (numbered 0..7) can share one SPI
|
| /linux-4.4.14/include/uapi/asm-generic/ |
| H A D | ipcbuf.h | 10 * everyone just ended up making identical copies without specific
|
| /linux-4.4.14/arch/mips/include/asm/mach-generic/ |
| H A D | ioremap.h | 15 * Allow physical addresses to be fixed up to help peripherals located
|
| /linux-4.4.14/arch/m68k/kernel/ |
| H A D | vectors.c | 18 * Sets up all exception vectors
63 /* set up ISP entry points */ base_trap_init()
94 /* set up FPSP entry points */ trap_init()
117 /* set up IFPSP entry points */ trap_init()
|
| H A D | sun3-head.S | 37 /* Firstly, disable interrupts and set up function codes. */
47 /* map everything the bootloader left us into high memory, clean up the
|
| /linux-4.4.14/arch/m68k/math-emu/ |
| H A D | fp_trig.h | 29 they return a status code, which should end up in %d0, if all goes
|
| /linux-4.4.14/arch/mips/cavium-octeon/ |
| H A D | flash_setup.c | 36 up(&octeon_bootbus_sem); octeon_flash_map_read()
46 up(&octeon_bootbus_sem); octeon_flash_map_write()
54 up(&octeon_bootbus_sem); octeon_flash_map_copy_from()
62 up(&octeon_bootbus_sem); octeon_flash_map_copy_to()
|
| /linux-4.4.14/arch/mips/sni/ |
| H A D | reset.c | 26 /* XXX This ends up at the ARC firmware prompt ... */ sni_machine_restart()
|
| /linux-4.4.14/arch/blackfin/mach-bf533/ |
| H A D | ints-priority.c | 2 * Set up the interrupt priorities
|
| /linux-4.4.14/arch/arm/mach-orion5x/ |
| H A D | ts78xx-fpga.h | 6 * do *not* make up your own or 'borrow' any!
|
| /linux-4.4.14/arch/arm/mach-s3c24xx/ |
| H A D | otom.h | 13 * ok, we've used up to 0x01300000, now we need to find space for the
|
| /linux-4.4.14/arch/arm/boot/dts/ |
| H A D | mxs-pinfunc.h | 27 /* fsl,pull-up property */
|
| /linux-4.4.14/arch/arm/mach-iop32x/include/mach/ |
| H A D | iop32x.h | 27 * set up a 1:1 bus to physical ram relationship
|
| /linux-4.4.14/drivers/gpu/drm/amd/include/ |
| H A D | amd_shared.h | 89 /* sets up early driver state (pre sw_init), does not configure hw - Optional */
91 /* sets up late driver/hw state (post hw_init) - Optional */
93 /* sets up driver state, does not configure hw */
97 /* sets up the hw state */
|
| /linux-4.4.14/net/lapb/ |
| H A D | lapb_timer.c | 103 * Awaiting connection state, send SABM(E), up to N2 times. lapb_t1timer_expiry()
127 * Awaiting disconnection state, send DISC, up to N2 times. lapb_t1timer_expiry()
144 * Data transfer state, restransmit I frames, up to N2 times. lapb_t1timer_expiry()
162 * Frame reject state, restransmit FRMR frames, up to N2 times. lapb_t1timer_expiry()
|
| /linux-4.4.14/sound/firewire/bebob/ |
| H A D | bebob_midi.c | 67 static void midi_capture_trigger(struct snd_rawmidi_substream *substrm, int up) midi_capture_trigger() argument
74 if (up) midi_capture_trigger()
84 static void midi_playback_trigger(struct snd_rawmidi_substream *substrm, int up) midi_playback_trigger() argument
91 if (up) midi_playback_trigger()
|
| /linux-4.4.14/sound/firewire/fireworks/ |
| H A D | fireworks_midi.c | 68 static void midi_capture_trigger(struct snd_rawmidi_substream *substrm, int up) midi_capture_trigger() argument
75 if (up) midi_capture_trigger()
85 static void midi_playback_trigger(struct snd_rawmidi_substream *substrm, int up) midi_playback_trigger() argument
92 if (up) midi_playback_trigger()
|
| /linux-4.4.14/sound/firewire/oxfw/ |
| H A D | oxfw-midi.c | 85 static void midi_capture_trigger(struct snd_rawmidi_substream *substrm, int up) midi_capture_trigger() argument
92 if (up) midi_capture_trigger()
102 static void midi_playback_trigger(struct snd_rawmidi_substream *substrm, int up) midi_playback_trigger() argument
109 if (up) midi_playback_trigger()
|
| /linux-4.4.14/sound/usb/caiaq/ |
| H A D | midi.c | 39 static void snd_usb_caiaq_midi_input_trigger(struct snd_rawmidi_substream *substream, int up) snd_usb_caiaq_midi_input_trigger() argument
46 cdev->midi_receive_substream = up ? substream : NULL; snd_usb_caiaq_midi_input_trigger()
91 static void snd_usb_caiaq_midi_output_trigger(struct snd_rawmidi_substream *substream, int up) snd_usb_caiaq_midi_output_trigger() argument
95 if (up) { snd_usb_caiaq_midi_output_trigger()
|
| /linux-4.4.14/drivers/staging/rtl8192u/ |
| H A D | r8192U_wx.c | 78 up(&priv->wx_sem); r8192_wx_set_rate()
95 up(&priv->wx_sem); r8192_wx_set_rts()
120 up(&priv->wx_sem); r8192_wx_set_power()
144 up(&priv->wx_sem); r8192_wx_force_reset()
161 up(&priv->wx_sem); r8192_wx_set_rawtx()
185 up(&priv->wx_sem); r8192_wx_set_crcmon()
202 up(&priv->wx_sem); r8192_wx_set_mode()
335 if (!priv->up) r8192_wx_set_scan()
357 up(&priv->wx_sem); r8192_wx_set_scan()
369 if (!priv->up) r8192_wx_get_scan()
376 up(&priv->wx_sem); r8192_wx_get_scan()
392 up(&priv->wx_sem); r8192_wx_set_essid()
411 up(&priv->wx_sem); r8192_wx_get_essid()
427 up(&priv->wx_sem); r8192_wx_set_freq()
488 up(&priv->wx_sem); r8192_wx_set_wap()
530 if (!priv->up) r8192_wx_set_enc()
538 up(&priv->wx_sem); r8192_wx_set_enc()
670 up(&priv->wx_sem); r8192_wx_set_retry()
732 up(&priv->wx_sem); r8192_wx_set_sens()
810 up(&priv->wx_sem); r8192_wx_set_enc_ext()
823 up(&priv->wx_sem); r8192_wx_set_auth()
838 up(&priv->wx_sem); r8192_wx_set_mlme()
851 up(&priv->wx_sem); r8192_wx_set_gen_ie()
|
| /linux-4.4.14/drivers/staging/rtl8192e/rtl8192e/ |
| H A D | rtl_wx.c | 72 up(&priv->wx_sem); _rtl92e_wx_set_rate()
91 up(&priv->wx_sem); _rtl92e_wx_set_rts()
121 up(&priv->wx_sem); _rtl92e_wx_set_power()
149 up(&priv->wx_sem); _rtl92e_wx_set_rawtx()
166 up(&priv->wx_sem); _rtl92e_wx_force_reset()
196 up(&priv->wx_sem); _rtl92e_wx_adapter_power_status()
216 up(&priv->wx_sem); _rtl92e_wx_set_lps_awake_interval()
232 up(&priv->wx_sem); _rtl92e_wx_set_force_lps()
278 up(&priv->wx_sem); _rtl92e_wx_set_mode()
286 up(&priv->rtllib->ips_sem); _rtl92e_wx_set_mode()
292 up(&priv->wx_sem); _rtl92e_wx_set_mode()
413 if (!priv->up) _rtl92e_wx_set_scan()
439 up(&priv->wx_sem); _rtl92e_wx_set_scan()
447 up(&priv->rtllib->ips_sem); _rtl92e_wx_set_scan()
474 up(&priv->wx_sem); _rtl92e_wx_set_scan()
487 if (!priv->up) _rtl92e_wx_get_scan()
498 up(&priv->wx_sem); _rtl92e_wx_get_scan()
519 up(&priv->wx_sem); _rtl92e_wx_set_essid()
535 up(&priv->wx_sem); _rtl92e_wx_get_essid()
553 up(&priv->wx_sem); _rtl92e_wx_set_nick()
568 up(&priv->wx_sem); _rtl92e_wx_get_nick()
586 up(&priv->wx_sem); _rtl92e_wx_set_freq()
651 up(&priv->wx_sem); _rtl92e_wx_set_wap()
697 if (!priv->up) _rtl92e_wx_set_enc()
703 up(&priv->rtllib->ips_sem); _rtl92e_wx_set_enc()
708 up(&priv->wx_sem); _rtl92e_wx_set_enc()
825 up(&priv->wx_sem); _rtl92e_wx_set_retry()
889 up(&priv->wx_sem); _rtl92e_wx_set_sens()
910 up(&priv->rtllib->ips_sem); _rtl92e_wx_set_encode_ext()
972 up(&priv->wx_sem); _rtl92e_wx_set_encode_ext()
990 up(&priv->wx_sem); _rtl92e_wx_set_auth()
1008 up(&priv->wx_sem); _rtl92e_wx_set_mlme()
1025 up(&priv->wx_sem); _rtl92e_wx_set_gen_ie()
1107 up(&priv->wx_sem); _rtl92e_wx_get_promisc_mode()
|
| /linux-4.4.14/drivers/input/serio/ |
| H A D | hp_sdc_mlc.c | 70 up(&mlc->isem); hp_sdc_mlc_isr()
135 up(&mlc->isem); hp_sdc_mlc_isr()
171 up(&mlc->isem); hp_sdc_mlc_in()
176 up(&mlc->isem); hp_sdc_mlc_in()
188 /* Try to down the semaphores -- they should be up. */ hp_sdc_mlc_cts()
192 up(&mlc->isem); hp_sdc_mlc_cts()
193 up(&mlc->osem); hp_sdc_mlc_cts()
221 up(&mlc->csem); hp_sdc_mlc_cts()
231 /* Try to down the semaphore -- it should be up. */ hp_sdc_mlc_out()
239 up(&mlc->osem); hp_sdc_mlc_out()
244 up(&mlc->csem); hp_sdc_mlc_out()
|
| /linux-4.4.14/drivers/tty/vt/ |
| H A D | vt_ioctl.c | 342 void __user *up = (void __user *)arg; vt_ioctl() local
445 if (copy_from_user(&kbrep, up, sizeof(struct kbd_repeat))) { vt_ioctl()
452 if (copy_to_user(up, &kbrep, sizeof(struct kbd_repeat))) vt_ioctl()
540 ret = vt_do_kbkeycode_ioctl(cmd, up, perm); vt_ioctl()
545 ret = vt_do_kdsk_ioctl(cmd, up, perm, console); vt_ioctl()
550 ret = vt_do_kdgkb_ioctl(cmd, up, perm); vt_ioctl()
559 ret = vt_do_diacrit(cmd, up, perm); vt_ioctl()
600 if (copy_from_user(&tmp, up, sizeof(struct vt_mode))) { vt_ioctl()
629 rc = copy_to_user(up, &tmp, sizeof(struct vt_mode)); vt_ioctl()
642 struct vt_stat __user *vtstat = up; vt_ioctl()
822 struct vt_sizes __user *vtsizes = up; vt_ioctl()
849 struct vt_consize __user *vtconsize = up; vt_ioctl()
869 /* Parameters don't add up */ vt_ioctl()
914 op.data = up; vt_ioctl()
925 op.data = up; vt_ioctl()
934 ret = con_set_cmap(up); vt_ioctl()
938 ret = con_get_cmap(up); vt_ioctl()
943 ret = do_fontx_ioctl(cmd, up, perm, &op); vt_ioctl()
972 if (copy_from_user(&op, up, sizeof(op))) { vt_ioctl()
981 if (copy_to_user(up, &op, sizeof(op))) vt_ioctl()
990 ret = con_set_trans_old(up); vt_ioctl()
994 ret = con_get_trans_old(up); vt_ioctl()
1001 ret = con_set_trans_new(up); vt_ioctl()
1005 ret = con_get_trans_new(up); vt_ioctl()
1012 ret = copy_from_user(&ui, up, sizeof(struct unimapinit)); vt_ioctl()
1022 ret = do_unimap_ioctl(cmd, up, perm, vc); vt_ioctl()
1202 void __user *up = (void __user *)arg; vt_compat_ioctl() local
1227 ret = compat_fontx_ioctl(cmd, up, perm, &op); vt_compat_ioctl()
1231 ret = compat_kdfontop_ioctl(up, perm, &op, vc); vt_compat_ioctl()
1236 ret = compat_unimap_ioctl(cmd, up, perm, vc); vt_compat_ioctl()
1305 * received acqsig, is waking up on another processor. This complete_change_console()
1322 * clean up (similar to logic employed in change_console()) complete_change_console()
1437 /* Graphics mode - up to X */ vt_move_to_console()
|
| /linux-4.4.14/drivers/media/usb/uvc/ |
| H A D | uvc_v4l2.c | 1255 const struct uvc_xu_control_mapping32 __user *up) uvc_v4l2_get_xu_mapping()
1261 if (!access_ok(VERIFY_READ, up, sizeof(*up)) || uvc_v4l2_get_xu_mapping()
1262 __copy_from_user(kp, up, offsetof(typeof(*up), menu_info)) || uvc_v4l2_get_xu_mapping()
1263 __get_user(kp->menu_count, &up->menu_count)) uvc_v4l2_get_xu_mapping()
1273 if (__get_user(p, &up->menu_info)) uvc_v4l2_get_xu_mapping()
1291 struct uvc_xu_control_mapping32 __user *up) uvc_v4l2_put_xu_mapping()
1297 if (!access_ok(VERIFY_WRITE, up, sizeof(*up)) || uvc_v4l2_put_xu_mapping()
1298 __copy_to_user(up, kp, offsetof(typeof(*up), menu_info)) || uvc_v4l2_put_xu_mapping()
1299 __put_user(kp->menu_count, &up->menu_count)) uvc_v4l2_put_xu_mapping()
1302 if (__clear_user(up->reserved, sizeof(up->reserved))) uvc_v4l2_put_xu_mapping()
1308 if (get_user(p, &up->menu_info)) uvc_v4l2_put_xu_mapping()
1327 const struct uvc_xu_control_query32 __user *up) uvc_v4l2_get_xu_query()
1333 if (!access_ok(VERIFY_READ, up, sizeof(*up)) || uvc_v4l2_get_xu_query()
1334 __copy_from_user(kp, up, offsetof(typeof(*up), data))) uvc_v4l2_get_xu_query()
1342 if (__get_user(p, &up->data)) uvc_v4l2_get_xu_query()
1360 struct uvc_xu_control_query32 __user *up) uvc_v4l2_put_xu_query()
1366 if (!access_ok(VERIFY_WRITE, up, sizeof(*up)) || uvc_v4l2_put_xu_query()
1367 __copy_to_user(up, kp, offsetof(typeof(*up), data))) uvc_v4l2_put_xu_query()
1373 if (get_user(p, &up->data)) uvc_v4l2_put_xu_query()
1395 void __user *up = compat_ptr(arg); uvc_v4l2_compat_ioctl32() local
1402 ret = uvc_v4l2_get_xu_mapping(&karg.xmap, up); uvc_v4l2_compat_ioctl32()
1407 ret = uvc_v4l2_get_xu_query(&karg.xqry, up); uvc_v4l2_compat_ioctl32()
1424 ret = uvc_v4l2_put_xu_mapping(&karg.xmap, up); uvc_v4l2_compat_ioctl32()
1428 ret = uvc_v4l2_put_xu_query(&karg.xqry, up); uvc_v4l2_compat_ioctl32()
1254 uvc_v4l2_get_xu_mapping(struct uvc_xu_control_mapping *kp, const struct uvc_xu_control_mapping32 __user *up) uvc_v4l2_get_xu_mapping() argument
1290 uvc_v4l2_put_xu_mapping(const struct uvc_xu_control_mapping *kp, struct uvc_xu_control_mapping32 __user *up) uvc_v4l2_put_xu_mapping() argument
1326 uvc_v4l2_get_xu_query(struct uvc_xu_control_query *kp, const struct uvc_xu_control_query32 __user *up) uvc_v4l2_get_xu_query() argument
1359 uvc_v4l2_put_xu_query(const struct uvc_xu_control_query *kp, struct uvc_xu_control_query32 __user *up) uvc_v4l2_put_xu_query() argument
|
| /linux-4.4.14/drivers/staging/rtl8712/ |
| H A D | rtl871x_pwrctrl.c | 92 * This will be called when CPWM interrupt is up.
94 * using to update cpwn of drv; and drv will make a decision to up or
110 up(&(pcmdpriv->cmd_queue_sema)); r8712_cpwm_int_hdl()
113 up(&pwrpriv->lock); r8712_cpwm_int_hdl()
147 up(&pwrpriv->lock); SetPSModeWorkItemCallback()
162 up(&pwrpriv->lock); rpwm_workitem_callback()
216 up(&pwrctrl->lock); r8712_register_cmd_alive()
242 up(&pwrctrl->lock); r8712_unregister_cmd_alive()
|
| /linux-4.4.14/drivers/mmc/host/ |
| H A D | sdhci-cns3xxx.c | 42 * On CNS3xxx divider grows linearly up to 4, and then sdhci_cns3xxx_set_clock()
43 * exponentially up to 256. sdhci_cns3xxx_set_clock()
|
| /linux-4.4.14/drivers/hid/ |
| H A D | hid-ortek.c | 31 hid_info(hdev, "Fixing up logical minimum in report descriptor (Ortek)\n"); ortek_report_fixup()
34 hid_info(hdev, "Fixing up logical minimum in report descriptor (Skycable)\n"); ortek_report_fixup()
|
| /linux-4.4.14/drivers/media/rc/keymaps/ |
| H A D | rc-apac-viewcomp.c | 37 { 0x1f, KEY_VOLUMEDOWN }, /* vol up */
39 { 0x1e, KEY_CHANNELDOWN }, /* chn up */
|
| H A D | rc-norwood.c | 44 { 0x30, KEY_VOLUMEUP }, /* Volume up */
46 { 0x60, KEY_CHANNELUP }, /* Channel up */
|
| H A D | rc-pixelview.c | 47 { 0x17, KEY_CHANNELDOWN }, /* chn up */
49 { 0x14, KEY_VOLUMEDOWN }, /* vol up */
|
| H A D | rc-powercolor-real-angel.c | 40 { 0x20, KEY_CHANNELUP }, /* channel up */
42 { 0x10, KEY_VOLUMEUP }, /* volume up */
|
| /linux-4.4.14/arch/sparc/lib/ |
| H A D | user_fixup.c | 1 /* user_fixup.c: Fix up user copy faults.
18 * of the cases, just fix things up simply here.
|
| /linux-4.4.14/arch/sh/mm/ |
| H A D | numa.c | 23 * in node 0, and other memory blocks in to node 1 and up, ordered by
70 /* It's up */ setup_bootmem_node()
|
| /linux-4.4.14/arch/sparc/include/asm/ |
| H A D | highmem.h | 12 * up to 16 Terrabyte physical memory. With current x86 CPUs
13 * we now support up to 64 Gigabytes physical RAM.
|
| /linux-4.4.14/arch/microblaze/mm/ |
| H A D | highmem.c | 14 * up to 16 Terrabyte physical memory. With current x86 CPUs
15 * we now support up to 64 Gigabytes physical RAM.
|
| H A D | mmu_context.c | 55 * This isn't an LRU system, it just frees up each context in
63 /* free up context `next_mmu_context' */ steal_context()
|
| /linux-4.4.14/arch/mn10300/unit-asb2303/ |
| H A D | unit-init.c | 24 * initialise some of the unit hardware before gdbstub is set up
28 /* set up the external interrupts */ unit_init()
|
| /linux-4.4.14/arch/nios2/lib/ |
| H A D | delay.c | 44 __const_udelay(usecs * 0x10C7UL); /* 2**32 / 1000000 (rounded up) */ __udelay()
50 __const_udelay(nsecs * 0x5UL); /* 2**32 / 1000000000 (rounded up) */ __ndelay()
|
| /linux-4.4.14/arch/ia64/sn/kernel/ |
| H A D | bte_error.c | 65 * attempting to clean up the error. Resetting the BTE while shub1_bte_error_handler()
71 * We also want to make sure that the local NI port is up. shub1_bte_error_handler()
73 * goes through the LLP handshake, but then comes back up. shub1_bte_error_handler()
78 * There are errors which still need to be cleaned up by shub1_bte_error_handler()
82 BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda, shub1_bte_error_handler()
99 BTE_PRINTK(("eh:%p:%d Valid %d, Giving up\n", shub1_bte_error_handler()
107 BTE_PRINTK(("eh:%p:%d Cleaning up\n", err_nodepda, smp_processor_id())); shub1_bte_error_handler()
158 BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda, shub2_bte_error_handler()
|
| /linux-4.4.14/arch/m32r/lib/ |
| H A D | delay.c | 118 __const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */ __udelay()
123 __const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */ __ndelay()
|