Searched refs:reloc (Results 1 - 92 of 92) sorted by relevance

/linux-4.4.14/arch/xtensa/include/asm/
H A Dflat.h6 #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
H A Dinitialize_mmu.h71 # error "MMU v3 requires reloc vectors"
/linux-4.4.14/arch/c6x/include/asm/
H A Dflat.h6 #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
/linux-4.4.14/arch/m32r/include/asm/
H A Dflat.h18 #define flat_reloc_valid(reloc, size) \
19 (((reloc) - textlen_for_m32r_lo16_data) <= (size))
37 #define FLAT_M32R_32 0x00 /* 32bits reloc */
38 #define FLAT_M32R_24 0x01 /* unsigned 24bits reloc */
39 #define FLAT_M32R_16 0x02 /* 16bits reloc */
40 #define FLAT_M32R_LO16 0x03 /* signed low 16bits reloc (low()) */
41 #define FLAT_M32R_LO16_DATA 0x04 /* signed low 16bits reloc (low())
49 #define FLAT_M32R_HI16_ULO 0x10 /* reloc for SETH Rn,#high(imm16) */
56 #define FLAT_M32R_HI16_SLO 0x20 /* reloc for SETH Rn,#shigh(imm16) */
64 unsigned int reloc = flat_m32r_get_reloc_type (relval); m32r_flat_get_addr_from_rp() local
66 if (reloc & 0xf0) { m32r_flat_get_addr_from_rp()
68 switch (reloc & 0xf0) m32r_flat_get_addr_from_rp()
74 *rp = (M32R_SETH_OPCODE | ((reloc & 0x0f)<<24)); m32r_flat_get_addr_from_rp()
81 switch (reloc) m32r_flat_get_addr_from_rp()
107 unsigned int reloc = flat_m32r_get_reloc_type (relval); m32r_flat_put_addr_at_rp() local
108 if (reloc & 0xf0) { m32r_flat_put_addr_at_rp()
109 unsigned long Rn = reloc & 0x0f; /* get a number of register */ m32r_flat_put_addr_at_rp()
111 reloc &= 0xf0; m32r_flat_put_addr_at_rp()
112 switch (reloc) m32r_flat_put_addr_at_rp()
125 switch (reloc) { m32r_flat_put_addr_at_rp()
/linux-4.4.14/arch/m68k/include/asm/
H A Dflat.h10 #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
/linux-4.4.14/arch/arm/include/asm/
H A Dflat.h10 #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
/linux-4.4.14/arch/h8300/include/asm/
H A Dflat.h10 #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dr200.c149 struct radeon_bo_list *reloc; r200_packet0_check() local
166 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r200_packet0_check()
181 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r200_packet0_check()
183 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r200_packet0_check()
188 track->zb.robj = reloc->robj; r200_packet0_check()
191 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r200_packet0_check()
194 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r200_packet0_check()
196 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r200_packet0_check()
201 track->cb[0].robj = reloc->robj; r200_packet0_check()
204 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r200_packet0_check()
213 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r200_packet0_check()
215 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r200_packet0_check()
221 if (reloc->tiling_flags & RADEON_TILING_MACRO) r200_packet0_check()
223 if (reloc->tiling_flags & RADEON_TILING_MICRO) r200_packet0_check()
228 ib[idx] = tmp + ((u32)reloc->gpu_offset); r200_packet0_check()
230 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r200_packet0_check()
231 track->textures[i].robj = reloc->robj; r200_packet0_check()
266 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r200_packet0_check()
268 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r200_packet0_check()
274 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r200_packet0_check()
275 track->textures[i].cube_info[face - 1].robj = reloc->robj; r200_packet0_check()
284 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r200_packet0_check()
286 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r200_packet0_check()
293 if (reloc->tiling_flags & RADEON_TILING_MACRO) r200_packet0_check()
295 if (reloc->tiling_flags & RADEON_TILING_MICRO) r200_packet0_check()
361 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r200_packet0_check()
363 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r200_packet0_check()
368 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r200_packet0_check()
H A Dr600_cs.c812 * RELOC (P3) - crtc_id in reloc.
912 DRM_ERROR("unknown crtc reloc\n"); r600_cs_common_vline_parse()
928 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r600_packet0_check()
972 struct radeon_bo_list *reloc; r600_cs_check_reg() local
1017 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r600_cs_check_reg()
1023 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1035 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1044 if (reloc->tiling_flags & RADEON_TILING_MACRO) { r600_cs_check_reg()
1077 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1085 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1086 track->vgt_strmout_bo[tmp] = reloc->robj; r600_cs_check_reg()
1087 track->vgt_strmout_bo_mc[tmp] = reloc->gpu_offset; r600_cs_check_reg()
1100 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1102 dev_warn(p->dev, "missing reloc for CP_COHER_BASE " r600_cs_check_reg()
1106 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1136 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1143 if (reloc->tiling_flags & RADEON_TILING_MACRO) { r600_cs_check_reg()
1146 } else if (reloc->tiling_flags & RADEON_TILING_MICRO) { r600_cs_check_reg()
1208 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1213 track->cb_color_frag_bo[tmp] = reloc->robj; r600_cs_check_reg()
1215 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1239 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1244 track->cb_color_tile_bo[tmp] = reloc->robj; r600_cs_check_reg()
1246 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1274 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1282 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1284 track->cb_color_bo[tmp] = reloc->robj; r600_cs_check_reg()
1285 track->cb_color_bo_mc[tmp] = reloc->gpu_offset; r600_cs_check_reg()
1289 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1296 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1297 track->db_bo = reloc->robj; r600_cs_check_reg()
1298 track->db_bo_mc = reloc->gpu_offset; r600_cs_check_reg()
1302 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1309 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1310 track->htile_bo = reloc->robj; r600_cs_check_reg()
1372 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1378 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1381 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_cs_check_reg()
1387 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_cs_check_reg()
1629 struct radeon_bo_list *reloc; r600_packet3_check() local
1667 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1673 offset = reloc->gpu_offset + r600_packet3_check()
1708 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1714 offset = reloc->gpu_offset + r600_packet3_check()
1760 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1766 offset = reloc->gpu_offset + r600_packet3_check()
1797 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1806 offset = reloc->gpu_offset + tmp; r600_packet3_check()
1808 if ((tmp + size) > radeon_bo_size(reloc->robj)) { r600_packet3_check()
1810 tmp + size, radeon_bo_size(reloc->robj)); r600_packet3_check()
1827 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1836 offset = reloc->gpu_offset + tmp; r600_packet3_check()
1838 if ((tmp + size) > radeon_bo_size(reloc->robj)) { r600_packet3_check()
1840 tmp + size, radeon_bo_size(reloc->robj)); r600_packet3_check()
1857 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1862 ib[idx+2] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_packet3_check()
1873 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1878 offset = reloc->gpu_offset + r600_packet3_check()
1894 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1900 offset = reloc->gpu_offset + r600_packet3_check()
1960 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1965 base_offset = (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_packet3_check()
1967 if (reloc->tiling_flags & RADEON_TILING_MACRO) r600_packet3_check()
1969 else if (reloc->tiling_flags & RADEON_TILING_MICRO) r600_packet3_check()
1972 texture = reloc->robj; r600_packet3_check()
1974 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
1979 mip_offset = (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_packet3_check()
1980 mipmap = reloc->robj; r600_packet3_check()
1985 reloc->tiling_flags); r600_packet3_check()
1995 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
2002 if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) { r600_packet3_check()
2005 size + offset, radeon_bo_size(reloc->robj)); r600_packet3_check()
2006 ib[idx+1+(i*7)+1] = radeon_bo_size(reloc->robj) - offset; r600_packet3_check()
2009 offset64 = reloc->gpu_offset + offset; r600_packet3_check()
2096 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
2098 DRM_ERROR("bad STRMOUT_BASE_UPDATE reloc\n"); r600_packet3_check()
2102 if (reloc->robj != track->vgt_strmout_bo[idx_value]) { r600_packet3_check()
2114 if ((offset + 4) > radeon_bo_size(reloc->robj)) { r600_packet3_check()
2116 offset + 4, radeon_bo_size(reloc->robj)); r600_packet3_check()
2119 ib[idx+1] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); r600_packet3_check()
2140 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
2142 DRM_ERROR("bad STRMOUT_BUFFER_UPDATE (missing dst reloc)\n"); r600_packet3_check()
2147 if ((offset + 4) > radeon_bo_size(reloc->robj)) { r600_packet3_check()
2149 offset + 4, radeon_bo_size(reloc->robj)); r600_packet3_check()
2152 offset += reloc->gpu_offset; r600_packet3_check()
2159 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
2161 DRM_ERROR("bad STRMOUT_BUFFER_UPDATE (missing src reloc)\n"); r600_packet3_check()
2166 if ((offset + 4) > radeon_bo_size(reloc->robj)) { r600_packet3_check()
2168 offset + 4, radeon_bo_size(reloc->robj)); r600_packet3_check()
2171 offset += reloc->gpu_offset; r600_packet3_check()
2184 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
2186 DRM_ERROR("bad MEM_WRITE (missing reloc)\n"); r600_packet3_check()
2195 if ((offset + 8) > radeon_bo_size(reloc->robj)) { r600_packet3_check()
2197 offset + 8, radeon_bo_size(reloc->robj)); r600_packet3_check()
2200 offset += reloc->gpu_offset; r600_packet3_check()
2213 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
2215 DRM_ERROR("bad COPY_DW (missing src reloc)\n"); r600_packet3_check()
2220 if ((offset + 4) > radeon_bo_size(reloc->robj)) { r600_packet3_check()
2222 offset + 4, radeon_bo_size(reloc->robj)); r600_packet3_check()
2225 offset += reloc->gpu_offset; r600_packet3_check()
2237 r = radeon_cs_packet_next_reloc(p, &reloc, r600_nomm); r600_packet3_check()
2239 DRM_ERROR("bad COPY_DW (missing dst reloc)\n"); r600_packet3_check()
2244 if ((offset + 4) > radeon_bo_size(reloc->robj)) { r600_packet3_check()
2246 offset + 4, radeon_bo_size(reloc->robj)); r600_packet3_check()
2249 offset += reloc->gpu_offset; r600_packet3_check()
2430 * r600_dma_cs_next_reloc() - parse next reloc
2432 * @cs_reloc: reloc informations
2434 * Return the next reloc, do bo validation and compute
2469 * the GPU addresses based on the reloc information and
H A Devergreen_cs.c1057 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", evergreen_packet0_check()
1097 struct radeon_bo_list *reloc; evergreen_cs_handle_reg() local
1143 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1149 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1172 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1180 ib[idx] |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); evergreen_cs_handle_reg()
1181 track->db_z_info |= Z_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); evergreen_cs_handle_reg()
1182 if (reloc->tiling_flags & RADEON_TILING_MACRO) { evergreen_cs_handle_reg()
1185 evergreen_tiling_fields(reloc->tiling_flags, evergreen_cs_handle_reg()
1214 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1221 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1222 track->db_z_read_bo = reloc->robj; evergreen_cs_handle_reg()
1226 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1233 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1234 track->db_z_write_bo = reloc->robj; evergreen_cs_handle_reg()
1238 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1245 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1246 track->db_s_read_bo = reloc->robj; evergreen_cs_handle_reg()
1250 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1257 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1258 track->db_s_write_bo = reloc->robj; evergreen_cs_handle_reg()
1273 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1281 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1282 track->vgt_strmout_bo[tmp] = reloc->robj; evergreen_cs_handle_reg()
1295 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1297 dev_warn(p->dev, "missing reloc for CP_COHER_BASE " evergreen_cs_handle_reg()
1301 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1359 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1365 ib[idx] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); evergreen_cs_handle_reg()
1366 track->cb_color_info[tmp] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); evergreen_cs_handle_reg()
1377 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1383 ib[idx] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); evergreen_cs_handle_reg()
1384 track->cb_color_info[tmp] |= CB_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); evergreen_cs_handle_reg()
1438 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1445 if (reloc->tiling_flags & RADEON_TILING_MACRO) { evergreen_cs_handle_reg()
1448 evergreen_tiling_fields(reloc->tiling_flags, evergreen_cs_handle_reg()
1466 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1473 if (reloc->tiling_flags & RADEON_TILING_MACRO) { evergreen_cs_handle_reg()
1476 evergreen_tiling_fields(reloc->tiling_flags, evergreen_cs_handle_reg()
1499 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1504 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1505 track->cb_color_fmask_bo[tmp] = reloc->robj; evergreen_cs_handle_reg()
1516 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1521 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1522 track->cb_color_cmask_bo[tmp] = reloc->robj; evergreen_cs_handle_reg()
1554 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1562 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1563 track->cb_color_bo[tmp] = reloc->robj; evergreen_cs_handle_reg()
1570 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1578 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1579 track->cb_color_bo[tmp] = reloc->robj; evergreen_cs_handle_reg()
1583 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1590 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1591 track->htile_bo = reloc->robj; evergreen_cs_handle_reg()
1701 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1707 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1715 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1721 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1729 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_cs_handle_reg()
1735 ib[idx] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_cs_handle_reg()
1774 struct radeon_bo_list *reloc; evergreen_packet3_check() local
1812 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
1818 offset = reloc->gpu_offset + evergreen_packet3_check()
1858 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
1864 offset = reloc->gpu_offset + evergreen_packet3_check()
1893 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
1899 offset = reloc->gpu_offset + evergreen_packet3_check()
1921 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
1927 offset = reloc->gpu_offset + evergreen_packet3_check()
2016 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2022 track->indirect_draw_buffer_size = radeon_bo_size(reloc->robj); evergreen_packet3_check()
2024 ib[idx+1] = reloc->gpu_offset; evergreen_packet3_check()
2025 ib[idx+2] = upper_32_bits(reloc->gpu_offset) & 0xff; evergreen_packet3_check()
2073 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2078 ib[idx+0] = idx_value + (u32)(reloc->gpu_offset & 0xffffffff); evergreen_packet3_check()
2094 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2100 offset = reloc->gpu_offset + evergreen_packet3_check()
2148 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2157 offset = reloc->gpu_offset + tmp; evergreen_packet3_check()
2159 if ((tmp + size) > radeon_bo_size(reloc->robj)) { evergreen_packet3_check()
2161 tmp + size, radeon_bo_size(reloc->robj)); evergreen_packet3_check()
2186 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2195 offset = reloc->gpu_offset + tmp; evergreen_packet3_check()
2197 if ((tmp + size) > radeon_bo_size(reloc->robj)) { evergreen_packet3_check()
2199 tmp + size, radeon_bo_size(reloc->robj)); evergreen_packet3_check()
2220 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2225 ib[idx+2] += (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_packet3_check()
2236 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2241 offset = reloc->gpu_offset + evergreen_packet3_check()
2257 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2263 offset = reloc->gpu_offset + evergreen_packet3_check()
2279 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2285 offset = reloc->gpu_offset + evergreen_packet3_check()
2348 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2355 TEX_ARRAY_MODE(evergreen_cs_get_aray_mode(reloc->tiling_flags)); evergreen_packet3_check()
2356 if (reloc->tiling_flags & RADEON_TILING_MACRO) { evergreen_packet3_check()
2359 evergreen_tiling_fields(reloc->tiling_flags, evergreen_packet3_check()
2370 texture = reloc->robj; evergreen_packet3_check()
2371 toffset = (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_packet3_check()
2385 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2390 moffset = (u32)((reloc->gpu_offset >> 8) & 0xffffffff); evergreen_packet3_check()
2391 mipmap = reloc->robj; evergreen_packet3_check()
2404 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2411 if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) { evergreen_packet3_check()
2414 ib[idx+1+(i*8)+1] = radeon_bo_size(reloc->robj) - offset; evergreen_packet3_check()
2417 offset64 = reloc->gpu_offset + offset; evergreen_packet3_check()
2486 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2488 DRM_ERROR("bad STRMOUT_BUFFER_UPDATE (missing dst reloc)\n"); evergreen_packet3_check()
2493 if ((offset + 4) > radeon_bo_size(reloc->robj)) { evergreen_packet3_check()
2495 offset + 4, radeon_bo_size(reloc->robj)); evergreen_packet3_check()
2498 offset += reloc->gpu_offset; evergreen_packet3_check()
2505 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2507 DRM_ERROR("bad STRMOUT_BUFFER_UPDATE (missing src reloc)\n"); evergreen_packet3_check()
2512 if ((offset + 4) > radeon_bo_size(reloc->robj)) { evergreen_packet3_check()
2514 offset + 4, radeon_bo_size(reloc->robj)); evergreen_packet3_check()
2517 offset += reloc->gpu_offset; evergreen_packet3_check()
2530 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2532 DRM_ERROR("bad MEM_WRITE (missing reloc)\n"); evergreen_packet3_check()
2541 if ((offset + 8) > radeon_bo_size(reloc->robj)) { evergreen_packet3_check()
2543 offset + 8, radeon_bo_size(reloc->robj)); evergreen_packet3_check()
2546 offset += reloc->gpu_offset; evergreen_packet3_check()
2559 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2561 DRM_ERROR("bad COPY_DW (missing src reloc)\n"); evergreen_packet3_check()
2566 if ((offset + 4) > radeon_bo_size(reloc->robj)) { evergreen_packet3_check()
2568 offset + 4, radeon_bo_size(reloc->robj)); evergreen_packet3_check()
2571 offset += reloc->gpu_offset; evergreen_packet3_check()
2586 r = radeon_cs_packet_next_reloc(p, &reloc, 0); evergreen_packet3_check()
2588 DRM_ERROR("bad COPY_DW (missing dst reloc)\n"); evergreen_packet3_check()
2593 if ((offset + 4) > radeon_bo_size(reloc->robj)) { evergreen_packet3_check()
2595 offset + 4, radeon_bo_size(reloc->robj)); evergreen_packet3_check()
2598 offset += reloc->gpu_offset; evergreen_packet3_check()
2741 * the GPU addresses based on the reloc information and
H A Dr300.c632 struct radeon_bo_list *reloc; r300_packet0_check() local
649 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r300_packet0_check()
666 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r300_packet0_check()
668 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r300_packet0_check()
673 track->cb[i].robj = reloc->robj; r300_packet0_check()
676 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r300_packet0_check()
679 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r300_packet0_check()
681 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r300_packet0_check()
686 track->zb.robj = reloc->robj; r300_packet0_check()
689 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r300_packet0_check()
708 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r300_packet0_check()
710 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r300_packet0_check()
718 ((idx_value & ~31) + (u32)reloc->gpu_offset); r300_packet0_check()
720 if (reloc->tiling_flags & RADEON_TILING_MACRO) r300_packet0_check()
722 if (reloc->tiling_flags & RADEON_TILING_MICRO) r300_packet0_check()
724 else if (reloc->tiling_flags & RADEON_TILING_MICRO_SQUARE) r300_packet0_check()
727 tmp = idx_value + ((u32)reloc->gpu_offset); r300_packet0_check()
731 track->textures[i].robj = reloc->robj; r300_packet0_check()
781 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r300_packet0_check()
783 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r300_packet0_check()
789 if (reloc->tiling_flags & RADEON_TILING_MACRO) r300_packet0_check()
791 if (reloc->tiling_flags & RADEON_TILING_MICRO) r300_packet0_check()
793 else if (reloc->tiling_flags & RADEON_TILING_MICRO_SQUARE) r300_packet0_check()
866 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r300_packet0_check()
868 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r300_packet0_check()
874 if (reloc->tiling_flags & RADEON_TILING_MACRO) r300_packet0_check()
876 if (reloc->tiling_flags & RADEON_TILING_MICRO) r300_packet0_check()
878 else if (reloc->tiling_flags & RADEON_TILING_MICRO_SQUARE) r300_packet0_check()
1081 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r300_packet0_check()
1083 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r300_packet0_check()
1088 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r300_packet0_check()
1123 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r300_packet0_check()
1125 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r300_packet0_check()
1130 track->aa.robj = reloc->robj; r300_packet0_check()
1133 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r300_packet0_check()
1176 struct radeon_bo_list *reloc; r300_packet3_check() local
1192 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r300_packet3_check()
1194 DRM_ERROR("No reloc for packet3 %d\n", pkt->opcode); r300_packet3_check()
1198 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->gpu_offset); r300_packet3_check()
1199 r = r100_cs_track_check_pkt3_indx_buffer(p, pkt, reloc->robj); r300_packet3_check()
H A Dr100.c1267 struct radeon_bo_list *reloc; r100_reloc_pitch_offset() local
1270 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_reloc_pitch_offset()
1272 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_reloc_pitch_offset()
1280 tmp += (((u32)reloc->gpu_offset) >> 10); r100_reloc_pitch_offset()
1283 if (reloc->tiling_flags & RADEON_TILING_MACRO) r100_reloc_pitch_offset()
1285 if (reloc->tiling_flags & RADEON_TILING_MICRO) { r100_reloc_pitch_offset()
1306 struct radeon_bo_list *reloc; r100_packet3_load_vbpntr() local
1323 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet3_load_vbpntr()
1325 DRM_ERROR("No reloc for packet3 %d\n", r100_packet3_load_vbpntr()
1331 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->gpu_offset); r100_packet3_load_vbpntr()
1334 track->arrays[i + 0].robj = reloc->robj; r100_packet3_load_vbpntr()
1336 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet3_load_vbpntr()
1338 DRM_ERROR("No reloc for packet3 %d\n", r100_packet3_load_vbpntr()
1343 ib[idx+2] = radeon_get_ib_value(p, idx + 2) + ((u32)reloc->gpu_offset); r100_packet3_load_vbpntr()
1344 track->arrays[i + 1].robj = reloc->robj; r100_packet3_load_vbpntr()
1349 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet3_load_vbpntr()
1351 DRM_ERROR("No reloc for packet3 %d\n", r100_packet3_load_vbpntr()
1357 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->gpu_offset); r100_packet3_load_vbpntr()
1358 track->arrays[i + 0].robj = reloc->robj; r100_packet3_load_vbpntr()
1417 * RELOC (P3) - crtc_id in reloc.
1488 DRM_ERROR("unknown crtc reloc\n"); r100_cs_packet_parse_vline()
1555 struct radeon_bo_list *reloc; r100_packet0_check() local
1573 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_packet0_check()
1588 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet0_check()
1590 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_packet0_check()
1595 track->zb.robj = reloc->robj; r100_packet0_check()
1598 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r100_packet0_check()
1601 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet0_check()
1603 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_packet0_check()
1608 track->cb[0].robj = reloc->robj; r100_packet0_check()
1611 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r100_packet0_check()
1617 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet0_check()
1619 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_packet0_check()
1625 if (reloc->tiling_flags & RADEON_TILING_MACRO) r100_packet0_check()
1627 if (reloc->tiling_flags & RADEON_TILING_MICRO) r100_packet0_check()
1632 ib[idx] = tmp + ((u32)reloc->gpu_offset); r100_packet0_check()
1634 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r100_packet0_check()
1635 track->textures[i].robj = reloc->robj; r100_packet0_check()
1644 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet0_check()
1646 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_packet0_check()
1652 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r100_packet0_check()
1653 track->textures[0].cube_info[i].robj = reloc->robj; r100_packet0_check()
1662 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet0_check()
1664 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_packet0_check()
1670 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r100_packet0_check()
1671 track->textures[1].cube_info[i].robj = reloc->robj; r100_packet0_check()
1680 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet0_check()
1682 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_packet0_check()
1688 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r100_packet0_check()
1689 track->textures[2].cube_info[i].robj = reloc->robj; r100_packet0_check()
1698 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet0_check()
1700 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_packet0_check()
1706 if (reloc->tiling_flags & RADEON_TILING_MACRO) r100_packet0_check()
1708 if (reloc->tiling_flags & RADEON_TILING_MICRO) r100_packet0_check()
1769 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet0_check()
1771 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", r100_packet0_check()
1776 ib[idx] = idx_value + ((u32)reloc->gpu_offset); r100_packet0_check()
1914 struct radeon_bo_list *reloc; r100_packet3_check() local
1930 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet3_check()
1932 DRM_ERROR("No reloc for packet3 %d\n", pkt->opcode); r100_packet3_check()
1936 ib[idx+1] = radeon_get_ib_value(p, idx+1) + ((u32)reloc->gpu_offset); r100_packet3_check()
1937 r = r100_cs_track_check_pkt3_indx_buffer(p, pkt, reloc->robj); r100_packet3_check()
1944 r = radeon_cs_packet_next_reloc(p, &reloc, 0); r100_packet3_check()
1946 DRM_ERROR("No reloc for packet3 %d\n", pkt->opcode); r100_packet3_check()
1950 ib[idx] = radeon_get_ib_value(p, idx) + ((u32)reloc->gpu_offset); r100_packet3_check()
1954 track->arrays[0].robj = reloc->robj; r100_packet3_check()
H A Dradeon_cs.c121 /* the first reloc of an UVD job is the msg and that must be in radeon_cs_parser_relocs()
235 struct radeon_bo_list *reloc; radeon_cs_sync_rings() local
238 list_for_each_entry(reloc, &p->validated, tv.head) { radeon_cs_sync_rings()
241 resv = reloc->robj->tbo.resv; radeon_cs_sync_rings()
243 reloc->tv.shared); radeon_cs_sync_rings()
812 * radeon_cs_packet_next_reloc() - parse next (should be reloc) packet
817 * @reloc: reloc informations
855 /* FIXME: we assume reloc size is 4 dwords */ radeon_cs_packet_next_reloc()
H A Dradeon_uvd.c533 struct radeon_bo_list *reloc; radeon_uvd_cs_reloc() local
547 reloc = &p->relocs[(idx / 4)]; radeon_uvd_cs_reloc()
548 start = reloc->gpu_offset; radeon_uvd_cs_reloc()
549 end = start + radeon_bo_size(reloc->robj); radeon_uvd_cs_reloc()
559 DRM_ERROR("invalid reloc offset %X!\n", offset); radeon_uvd_cs_reloc()
574 DRM_ERROR("reloc %LX-%LX crossing 256MB boundary!\n", radeon_uvd_cs_reloc()
593 r = radeon_uvd_cs_msg(p, reloc->robj, offset, buf_sizes); radeon_uvd_cs_reloc()
H A Dradeon_vce.c474 struct radeon_bo_list *reloc; radeon_vce_cs_reloc() local
488 reloc = &p->relocs[(idx / 4)]; radeon_vce_cs_reloc()
489 start = reloc->gpu_offset; radeon_vce_cs_reloc()
490 end = start + radeon_bo_size(reloc->robj); radeon_vce_cs_reloc()
497 DRM_ERROR("invalid reloc offset %llX!\n", offset); radeon_vce_cs_reloc()
/linux-4.4.14/drivers/gpu/drm/qxl/
H A Dqxl_ioctl.c201 /* fill out reloc info structs */ qxl_process_single_command()
204 struct drm_qxl_reloc reloc; qxl_process_single_command() local
206 if (copy_from_user(&reloc, qxl_process_single_command()
208 sizeof(reloc))) { qxl_process_single_command()
215 if (reloc.reloc_type != QXL_RELOC_TYPE_BO && reloc.reloc_type != QXL_RELOC_TYPE_SURF) { qxl_process_single_command()
216 DRM_DEBUG("unknown reloc type %d\n", reloc.reloc_type); qxl_process_single_command()
221 reloc_info[i].type = reloc.reloc_type; qxl_process_single_command()
223 if (reloc.dst_handle) { qxl_process_single_command()
224 ret = qxlhw_handle_to_bo(qdev, file_priv, reloc.dst_handle, release, qxl_process_single_command()
228 reloc_info[i].dst_offset = reloc.dst_offset; qxl_process_single_command()
231 reloc_info[i].dst_offset = reloc.dst_offset + release->release_offset; qxl_process_single_command()
235 /* reserve and validate the reloc dst bo */ qxl_process_single_command()
236 if (reloc.reloc_type == QXL_RELOC_TYPE_BO || reloc.src_handle) { qxl_process_single_command()
237 ret = qxlhw_handle_to_bo(qdev, file_priv, reloc.src_handle, release, qxl_process_single_command()
241 reloc_info[i].src_offset = reloc.src_offset; qxl_process_single_command()
/linux-4.4.14/arch/x86/tools/
H A Drelocs_common.c14 die("relocs [--abs-syms|--abs-relocs|--reloc-info|--text|--realmode]" \ usage()
44 if (strcmp(arg, "--reloc-info") == 0) { main()
H A Drelocs.c761 * Adjust the offset if this reloc applies to the percpu section. do_reloc64()
1007 printf(".section \".data.reloc\",\"a\"\n"); emit_relocs()
1065 printf("reloc section\treloc type\tsymbol\tsymbol section\n"); print_reloc_info()
/linux-4.4.14/arch/sh/include/asm/
H A Dflat.h17 #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
/linux-4.4.14/arch/blackfin/include/asm/
H A Dflat.h28 #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
/linux-4.4.14/arch/microblaze/include/asm/
H A Dflat.h18 #define flat_reloc_valid(reloc, size) ((reloc) <= (size))
23 * of the MICROBLAZE_64 reloc type. Here, a 32 bit address is split
68 /* Is this a split 64/32 reloc? */ flat_put_addr_at_rp()
/linux-4.4.14/drivers/gpu/host1x/
H A Djob.c184 struct host1x_reloc *reloc = &job->relocarray[i]; pin_job() local
188 reloc->target.bo = host1x_bo_get(reloc->target.bo); pin_job()
189 if (!reloc->target.bo) pin_job()
192 phys_addr = host1x_bo_pin(reloc->target.bo, &sgt); pin_job()
197 job->unpins[job->num_unpins].bo = reloc->target.bo; pin_job()
236 struct host1x_reloc *reloc = &job->relocarray[i]; do_relocs() local
238 reloc->target.offset) >> reloc->shift; do_relocs()
242 if (cmdbuf != reloc->cmdbuf.bo) do_relocs()
245 if (last_page != reloc->cmdbuf.offset >> PAGE_SHIFT) { do_relocs()
251 reloc->cmdbuf.offset >> PAGE_SHIFT); do_relocs()
252 last_page = reloc->cmdbuf.offset >> PAGE_SHIFT; do_relocs()
260 target = cmdbuf_page_addr + (reloc->cmdbuf.offset & ~PAGE_MASK); do_relocs()
270 static bool check_reloc(struct host1x_reloc *reloc, struct host1x_bo *cmdbuf, check_reloc() argument
275 if (reloc->cmdbuf.bo != cmdbuf || reloc->cmdbuf.offset != offset) check_reloc()
286 struct host1x_reloc *reloc; member in struct:host1x_firewall
304 if (!check_reloc(fw->reloc, fw->cmdbuf, fw->offset)) check_register()
308 fw->reloc++; check_register()
461 fw.reloc = job->relocarray; copy_gathers()
/linux-4.4.14/drivers/gpu/drm/i915/
H A Di915_gem_execbuffer.c254 struct drm_i915_gem_relocation_entry *reloc, relocate_entry_cpu()
258 uint32_t page_offset = offset_in_page(reloc->offset); relocate_entry_cpu()
259 uint64_t delta = reloc->delta + target_offset; relocate_entry_cpu()
268 reloc->offset >> PAGE_SHIFT)); relocate_entry_cpu()
277 (reloc->offset + sizeof(uint32_t)) >> PAGE_SHIFT)); relocate_entry_cpu()
290 struct drm_i915_gem_relocation_entry *reloc, relocate_entry_gtt()
295 uint64_t delta = reloc->delta + target_offset; relocate_entry_gtt()
310 offset += reloc->offset; relocate_entry_gtt()
345 struct drm_i915_gem_relocation_entry *reloc, relocate_entry_clflush()
349 uint32_t page_offset = offset_in_page(reloc->offset); relocate_entry_clflush()
350 uint64_t delta = (int)reloc->delta + target_offset; relocate_entry_clflush()
359 reloc->offset >> PAGE_SHIFT)); relocate_entry_clflush()
368 (reloc->offset + sizeof(uint32_t)) >> PAGE_SHIFT)); relocate_entry_clflush()
382 struct drm_i915_gem_relocation_entry *reloc) i915_gem_execbuffer_relocate_entry()
392 target_vma = eb_get_vma(eb, reloc->target_handle); i915_gem_execbuffer_relocate_entry()
404 reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION)) { i915_gem_execbuffer_relocate_entry()
412 if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { i915_gem_execbuffer_relocate_entry()
413 DRM_DEBUG("reloc with multiple write domains: " i915_gem_execbuffer_relocate_entry()
416 obj, reloc->target_handle, i915_gem_execbuffer_relocate_entry()
417 (int) reloc->offset, i915_gem_execbuffer_relocate_entry()
418 reloc->read_domains, i915_gem_execbuffer_relocate_entry()
419 reloc->write_domain); i915_gem_execbuffer_relocate_entry()
422 if (unlikely((reloc->write_domain | reloc->read_domains) i915_gem_execbuffer_relocate_entry()
424 DRM_DEBUG("reloc with read/write non-GPU domains: " i915_gem_execbuffer_relocate_entry()
427 obj, reloc->target_handle, i915_gem_execbuffer_relocate_entry()
428 (int) reloc->offset, i915_gem_execbuffer_relocate_entry()
429 reloc->read_domains, i915_gem_execbuffer_relocate_entry()
430 reloc->write_domain); i915_gem_execbuffer_relocate_entry()
434 target_obj->pending_read_domains |= reloc->read_domains; i915_gem_execbuffer_relocate_entry()
435 target_obj->pending_write_domain |= reloc->write_domain; i915_gem_execbuffer_relocate_entry()
440 if (target_offset == reloc->presumed_offset) i915_gem_execbuffer_relocate_entry()
444 if (unlikely(reloc->offset > i915_gem_execbuffer_relocate_entry()
448 obj, reloc->target_handle, i915_gem_execbuffer_relocate_entry()
449 (int) reloc->offset, i915_gem_execbuffer_relocate_entry()
453 if (unlikely(reloc->offset & 3)) { i915_gem_execbuffer_relocate_entry()
456 obj, reloc->target_handle, i915_gem_execbuffer_relocate_entry()
457 (int) reloc->offset); i915_gem_execbuffer_relocate_entry()
466 ret = relocate_entry_cpu(obj, reloc, target_offset); i915_gem_execbuffer_relocate_entry()
468 ret = relocate_entry_gtt(obj, reloc, target_offset); i915_gem_execbuffer_relocate_entry()
470 ret = relocate_entry_clflush(obj, reloc, target_offset); i915_gem_execbuffer_relocate_entry()
480 reloc->presumed_offset = target_offset; i915_gem_execbuffer_relocate_entry()
797 struct drm_i915_gem_relocation_entry *reloc; i915_gem_execbuffer_relocate_slow() local
822 reloc = drm_malloc_ab(total, sizeof(*reloc)); i915_gem_execbuffer_relocate_slow()
823 if (reloc == NULL || reloc_offset == NULL) { i915_gem_execbuffer_relocate_slow()
824 drm_free_large(reloc); i915_gem_execbuffer_relocate_slow()
838 if (copy_from_user(reloc+total, user_relocs, i915_gem_execbuffer_relocate_slow()
839 exec[i].relocation_count * sizeof(*reloc))) { i915_gem_execbuffer_relocate_slow()
888 reloc + reloc_offset[offset]); i915_gem_execbuffer_relocate_slow()
900 drm_free_large(reloc); i915_gem_execbuffer_relocate_slow()
253 relocate_entry_cpu(struct drm_i915_gem_object *obj, struct drm_i915_gem_relocation_entry *reloc, uint64_t target_offset) relocate_entry_cpu() argument
289 relocate_entry_gtt(struct drm_i915_gem_object *obj, struct drm_i915_gem_relocation_entry *reloc, uint64_t target_offset) relocate_entry_gtt() argument
344 relocate_entry_clflush(struct drm_i915_gem_object *obj, struct drm_i915_gem_relocation_entry *reloc, uint64_t target_offset) relocate_entry_clflush() argument
380 i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj, struct eb_vmas *eb, struct drm_i915_gem_relocation_entry *reloc) i915_gem_execbuffer_relocate_entry() argument
H A Dintel_renderstate_gen7.c40 0x00000001, /* reloc */
41 0x00000001, /* reloc */
43 0x00000001, /* reloc */
160 0x00000340, /* reloc */
H A Dintel_renderstate_gen6.c46 0x00000001, /* reloc */
47 0x00000001, /* reloc */
49 0x00000001, /* reloc */
158 0x00000448, /* reloc */
159 0x00000448, /* reloc */
H A Di915_gem_render_state.h30 const u32 *reloc; member in struct:intel_renderstate_rodata
H A Dintel_renderstate.h36 .reloc = gen ## _g ## _null_state_relocs, \
H A Di915_gem_render_state.c112 if (i * 4 == rodata->reloc[reloc_index]) { render_state_setup()
152 if (rodata->reloc[reloc_index] != -1) { render_state_setup()
H A Dintel_renderstate_gen8.c523 0x00000001, /* reloc */
526 0x00000001, /* reloc */
528 0x00000001, /* reloc */
532 0x00000001, /* reloc */
H A Dintel_renderstate_gen9.c527 0x00000001, /* reloc */
530 0x00000001, /* reloc */
532 0x00000001, /* reloc */
536 0x00000001, /* reloc */
H A Di915_params.c143 "Disable page prefaulting for pread/pwrite/reloc (default:false). "
/linux-4.4.14/arch/unicore32/kernel/
H A Dmodule.c51 "section %d reloc %d\n", apply_relocate()
61 "section %d reloc %d offset %d size %d\n", apply_relocate()
91 "%d reloc %d sym '%s'\n", module->name, apply_relocate()
/linux-4.4.14/arch/powerpc/kernel/
H A Dreloc_64.S72 5: ld r0,8(9) /* ELF64_R_TYPE(reloc->r_info) */
75 ld r6,0(r9) /* reloc->r_offset */
76 ld r0,16(r9) /* reloc->r_addend */
H A Dreloc_32.S20 DT_RELAENT = 9 /* Size of one Rela reloc entry */
71 lwz r6, 4(r11) /* r6 = Size of one Rela reloc */
H A Didle_6xx.S30 * containing CPU number and r3 reloc offset
H A Dmodule_64.c273 /* One extra reloc so it's always 0-funcaddr terminated */ get_stubs_size()
632 * Marker reloc indicates we don't have to save r2. apply_relocate_add()
H A Dexceptions-64s.S31 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
/linux-4.4.14/kernel/livepatch/
H A Dcore.c287 struct klp_reloc *reloc; klp_write_object_relocations() local
295 for (reloc = obj->relocs; reloc->name; reloc++) { klp_write_object_relocations()
301 reloc->val += kaslr_offset(); klp_write_object_relocations()
303 ret = klp_verify_vmlinux_symbol(reloc->name, klp_write_object_relocations()
304 reloc->val); klp_write_object_relocations()
308 /* module, reloc->val needs to be discovered */ klp_write_object_relocations()
309 if (reloc->external) klp_write_object_relocations()
311 reloc->name, klp_write_object_relocations()
312 &reloc->val); klp_write_object_relocations()
315 reloc->name, klp_write_object_relocations()
316 &reloc->val); klp_write_object_relocations()
320 ret = klp_write_module_reloc(pmod, reloc->type, reloc->loc, klp_write_object_relocations()
321 reloc->val + reloc->addend); klp_write_object_relocations()
324 reloc->name, reloc->val, ret); klp_write_object_relocations()
/linux-4.4.14/arch/x86/boot/compressed/
H A Dmisc.c253 int *reloc; handle_relocations() local
297 for (reloc = output + output_len - sizeof(*reloc); *reloc; reloc--) { handle_relocations()
298 int extended = *reloc; handle_relocations()
308 while (*--reloc) { handle_relocations()
309 long extended = *reloc; handle_relocations()
318 for (reloc--; *reloc; reloc--) { handle_relocations()
319 long extended = *reloc; handle_relocations()
/linux-4.4.14/scripts/
H A Dcheck_extable.sh41 eval $(echo $reloc | sed 's/\([^+]\+\)+\?\(0x[0-9a-f]\+\)\?/symbol="\1"; symbol_offset="\2"/')
108 for reloc in ${suspicious_relocs}; do
111 find_symbol_and_offset_from_reloc ${reloc}
119 # In this case objdump was presenting us with a reloc to a symbol
/linux-4.4.14/arch/powerpc/boot/
H A Dcrt0.S102 2: lbz r0,4+3(r9) /* ELF32_R_INFO(reloc->r_info) */
105 lwz r12,0(r9) /* reloc->r_offset */
106 lwz r0,8(r9) /* reloc->r_addend */
185 13: ld r0,8(r9) /* ELF64_R_TYPE(reloc->r_info) */
188 ld r12,0(r9) /* reloc->r_offset */
189 ld r0,16(r9) /* reloc->r_addend */
/linux-4.4.14/fs/isofs/
H A Drock.c314 struct inode *reloc; parse_rock_ridge_inode_internal() local
523 reloc = isofs_iget_reloc(inode->i_sb, reloc_block, 0); parse_rock_ridge_inode_internal()
524 if (IS_ERR(reloc)) { parse_rock_ridge_inode_internal()
525 ret = PTR_ERR(reloc); parse_rock_ridge_inode_internal()
528 inode->i_mode = reloc->i_mode; parse_rock_ridge_inode_internal()
529 set_nlink(inode, reloc->i_nlink); parse_rock_ridge_inode_internal()
530 inode->i_uid = reloc->i_uid; parse_rock_ridge_inode_internal()
531 inode->i_gid = reloc->i_gid; parse_rock_ridge_inode_internal()
532 inode->i_rdev = reloc->i_rdev; parse_rock_ridge_inode_internal()
533 inode->i_size = reloc->i_size; parse_rock_ridge_inode_internal()
534 inode->i_blocks = reloc->i_blocks; parse_rock_ridge_inode_internal()
535 inode->i_atime = reloc->i_atime; parse_rock_ridge_inode_internal()
536 inode->i_ctime = reloc->i_ctime; parse_rock_ridge_inode_internal()
537 inode->i_mtime = reloc->i_mtime; parse_rock_ridge_inode_internal()
538 iput(reloc); parse_rock_ridge_inode_internal()
/linux-4.4.14/tools/lib/bpf/
H A Dlibbpf.c194 } *reloc; member in struct:bpf_object::__anon15649
348 zfree(&obj->efile.reloc); bpf_object__elf_finish()
568 void *reloc = obj->efile.reloc; bpf_object__elf_collect() local
571 reloc = realloc(reloc, bpf_object__elf_collect()
572 sizeof(*obj->efile.reloc) * nr_reloc); bpf_object__elf_collect()
573 if (!reloc) { bpf_object__elf_collect()
579 obj->efile.reloc = reloc; bpf_object__elf_collect()
582 obj->efile.reloc[n].shdr = sh; bpf_object__elf_collect()
583 obj->efile.reloc[n].data = data; bpf_object__elf_collect()
633 pr_warning("relocation: failed to get %d reloc\n", i); bpf_program__collect_reloc()
783 GElf_Shdr *shdr = &obj->efile.reloc[i].shdr; bpf_object__collect_reloc()
784 Elf_Data *data = obj->efile.reloc[i].data; bpf_object__collect_reloc()
/linux-4.4.14/drivers/gpu/drm/nouveau/
H A Dnouveau_gem.c591 struct drm_nouveau_gem_pushbuf_reloc *reloc = NULL; nouveau_gem_pushbuf_reloc_apply() local
595 reloc = u_memcpya(req->relocs, req->nr_relocs, sizeof(*reloc)); nouveau_gem_pushbuf_reloc_apply()
596 if (IS_ERR(reloc)) nouveau_gem_pushbuf_reloc_apply()
597 return PTR_ERR(reloc); nouveau_gem_pushbuf_reloc_apply()
600 struct drm_nouveau_gem_pushbuf_reloc *r = &reloc[i]; nouveau_gem_pushbuf_reloc_apply()
606 NV_PRINTK(err, cli, "reloc bo index invalid\n"); nouveau_gem_pushbuf_reloc_apply()
616 NV_PRINTK(err, cli, "reloc container bo index invalid\n"); nouveau_gem_pushbuf_reloc_apply()
624 NV_PRINTK(err, cli, "reloc outside of bo\n"); nouveau_gem_pushbuf_reloc_apply()
633 NV_PRINTK(err, cli, "failed kmap for reloc\n"); nouveau_gem_pushbuf_reloc_apply()
656 NV_PRINTK(err, cli, "reloc wait_idle failed: %d\n", ret); nouveau_gem_pushbuf_reloc_apply()
663 u_free(reloc); nouveau_gem_pushbuf_reloc_apply()
714 NV_PRINTK(err, cli, "pushbuf reloc count exceeds limit: %d max %d\n", nouveau_gem_ioctl_pushbuf()
751 NV_PRINTK(err, cli, "reloc apply: %d\n", ret); nouveau_gem_ioctl_pushbuf()
/linux-4.4.14/arch/hexagon/kernel/
H A Dmodule.c108 DEBUGP("%d: value=%08x loc=%p reloc=%d symbol=%s\n", apply_relocate_add()
121 "R_HEXAGON_B22_PCREL reloc out of range", apply_relocate_add()
131 DEBUGP("Contents after reloc: %08x\n", *location); apply_relocate_add()
/linux-4.4.14/arch/arm/kernel/
H A Dmodule.c76 pr_err("%s: section %u reloc %u: bad relocation sym offset\n", apply_relocate()
85 pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n", apply_relocate()
107 pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (ARM -> Thumb)\n", apply_relocate()
134 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", apply_relocate()
193 pr_err("%s: section %u reloc %u sym '%s': unsupported interworking call (Thumb -> ARM)\n", apply_relocate()
238 pr_err("%s: section %u reloc %u sym '%s': relocation %u out of range (%#lx -> %#x)\n", apply_relocate()
/linux-4.4.14/arch/score/kernel/
H A Dmodule.c48 printk(KERN_ERR "%s: bad relocation, section %d reloc %d\n", apply_relocate()
58 "section %d reloc %d offset %d size %d\n", apply_relocate()
/linux-4.4.14/include/linux/
H A Dflat.h49 } reloc; member in union:__anon12288
H A Dpe.h220 struct data_dirent base_relocations; /* .reloc */
/linux-4.4.14/include/uapi/drm/
H A Dmsm_drm.h116 * with this by emit'ing two reloc entries with appropriate shift
119 * NOTE that reloc's must be sorted by order of increasing submit_offset,
152 * cmdstream buffer(s) themselves or reloc entries) has one (and only
156 * passed back through the 'presumed' field. If on a subsequent reloc,
H A Di915_drm.h763 /** Use the reloc.handle as an index into the exec object array rather
/linux-4.4.14/fs/
H A Dbinfmt_flat.c326 id = (r >> 24) & 0xff; /* Find ID for this reloc */ calc_reloc()
336 printk("BINFMT_FLAT: reloc address 0x%x not in same module " calc_reloc()
361 printk("BINFMT_FLAT: reloc outside program 0x%x (0 - 0x%x/0x%x)", calc_reloc()
393 ptr = (unsigned long *) (current->mm->start_code + r.reloc.offset); old_reloc()
395 ptr = (unsigned long *) (current->mm->start_data + r.reloc.offset); old_reloc()
401 r.reloc.offset, ptr, (int)*ptr, segment[r.reloc.type]); old_reloc()
404 switch (r.reloc.type) { old_reloc()
415 printk("BINFMT_FLAT: Unknown relocation type=%x\n", r.reloc.type); old_reloc()
436 unsigned long *reloc = 0, *rp; load_flat_file() local
599 reloc = (unsigned long *) (datapos+(ntohl(hdr->reloc_start)-text_len)); load_flat_file()
623 reloc = (unsigned long *) load_flat_file()
752 relval = ntohl(reloc[i]); load_flat_file()
784 old_reloc(ntohl(reloc[i])); load_flat_file()
/linux-4.4.14/arch/xtensa/kernel/
H A Dmodule.c91 "section %d reloc %d " apply_relocate_add()
115 "section %d reloc %d " apply_relocate_add()
/linux-4.4.14/arch/c6x/kernel/
H A Dmodule.c36 pr_err("PCR_S%d reloc %p -> %p out of range!\n", fixup_pcr()
/linux-4.4.14/arch/microblaze/kernel/
H A Dmodule.c49 * text and the reloc table. In general this means we must apply_relocate_add()
/linux-4.4.14/arch/mips/vdso/
H A Dvdso.h42 * support for the addiupc reloc get_vdso_base()
/linux-4.4.14/drivers/gpu/drm/msm/
H A Dmsm_gem_submit.c233 /* process the reloc's and patch up the cmdstream as needed: */ submit_reloc()
269 DRM_ERROR("non-aligned reloc offset: %u\n", submit_reloc()
279 DRM_ERROR("invalid offset %u at reloc %u\n", off, i); submit_reloc()
/linux-4.4.14/arch/x86/boot/tools/
H A Dbuild.c194 update_pecoff_section_header(".reloc", reloc_offset, PECOFF_RELOC_RESERVE); update_pecoff_setup_and_reloc()
197 * Modify .reloc section contents with a single entry. The update_pecoff_setup_and_reloc()
243 /* Reserve 0x20 bytes for .reloc section */ reserve_pecoff_reloc_section()
/linux-4.4.14/arch/ia64/include/asm/
H A Delf.h106 #define R_IA64_IPLTMSB 0x80 /* dynamic reloc, imported PLT, MSB */
107 #define R_IA64_IPLTLSB 0x81 /* dynamic reloc, imported PLT, LSB */
108 #define R_IA64_COPY 0x84 /* dynamic reloc, data copy */
/linux-4.4.14/arch/nios2/kernel/
H A Dmodule.c124 pr_err("module %s: Unknown reloc: %u\n", apply_relocate_add()
/linux-4.4.14/arch/ia64/kernel/
H A Dmodule.c111 #define N(reloc) [R_IA64_##reloc] = #reloc
689 printk(KERN_ERR "%s: %s reloc against " do_reloc()
732 printk(KERN_ERR "%s: special reloc %s not supported", do_reloc()
735 printk(KERN_ERR "%s: unknown special reloc %x\n", do_reloc()
747 printk(KERN_ERR "%s: %s reloc not supported\n", do_reloc()
752 printk(KERN_ERR "%s: unknown reloc %x\n", mod->name, r_type); do_reloc()
774 printk(KERN_ERR "%s: format %u needed by %s reloc is not supported\n", do_reloc()
/linux-4.4.14/fs/btrfs/
H A Drelocation.c172 /* map start of tree root to corresponding reloc tree */
174 /* list of reloc trees */
176 /* size of metadata reservation for merging reloc trees */
542 * if there is reloc tree and it was created in previous should_ignore_root()
543 * transaction backref lookup can find the reloc tree, should_ignore_root()
550 * find reloc tree by address of tree root
840 * only root blocks of reloc trees use
1273 * helper to add 'address of tree root -> reloc tree' mapping
1305 * helper to delete the 'address of tree root -> reloc tree'
1334 * helper to update the 'address of tree root -> reloc tree'
1395 * the source tree is a reloc tree, all tree blocks create_reloc_root()
1438 * create reloc tree for a given fs tree. reloc tree is just a
1476 * update root item of reloc tree
1648 /* reloc trees always use full backref */ replace_file_extents()
1753 * in reloc tree. tree blocks haven't been modified since the
1754 * reloc tree was create can be replaced.
1889 * swap blocks in fs tree and reloc tree. replace_path()
1931 * helper to find next relocated block in reloc tree
1968 * walk down reloc tree to find relocated block of lowest level
2109 * merge the relocated tree blocks in reloc tree with corresponding
2423 /* new reloc root may be added */ merge_reloc_roots()
2521 * counted. return -ENOENT if the block is root of reloc tree.
4327 * this function resumes merging reloc trees with corresponding fs trees.
4518 * We can do this because the data reloc inode refers strictly btrfs_reloc_clone_csums()
4613 * used by merging a reloc tree is twice the size of btrfs_reloc_pre_snapshot()
4615 * the reloc tree, half for cowing the fs tree. the space btrfs_reloc_pre_snapshot()
4616 * used by cowing the reloc tree will be freed after the btrfs_reloc_pre_snapshot()
4626 * and create reloc root for the newly created snapshot
H A Dtransaction.c306 * we have the reloc mutex held now, so there record_root_in_trans()
339 * fixing up the reloc trees and everyone must wait. record_root_in_trans()
1963 * the reloc mutex makes sure that we stop btrfs_commit_transaction()
H A Dctree.h1564 * the reloc mutex goes with the trans lock, it is taken
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_cs.c978 struct amdgpu_bo_list_entry *reloc; amdgpu_cs_find_mapping() local
983 list_for_each_entry(reloc, &parser->validated, tv.head) { amdgpu_cs_find_mapping()
984 if (!reloc->bo_va) amdgpu_cs_find_mapping()
987 list_for_each_entry(mapping, &reloc->bo_va->valids, list) { amdgpu_cs_find_mapping()
992 *bo = reloc->bo_va->bo; amdgpu_cs_find_mapping()
996 list_for_each_entry(mapping, &reloc->bo_va->invalids, list) { amdgpu_cs_find_mapping()
1001 *bo = reloc->bo_va->bo; amdgpu_cs_find_mapping()
H A Damdgpu_uvd.c673 DRM_ERROR("reloc %LX-%LX crossing 256MB boundary!\n", amdgpu_uvd_cs_pass2()
/linux-4.4.14/arch/parisc/include/asm/
H A Delf.h58 #define R_PARISC_NONE 0 /* No reloc. */
125 #define R_PARISC_IPLT 129 /* Dynamic reloc, imported PLT */
126 #define R_PARISC_EPLT 130 /* Dynamic reloc, exported PLT */
/linux-4.4.14/arch/x86/realmode/rm/
H A Dtrampoline_64.S23 * --full-contents --reloc to make sure there are no relocation
/linux-4.4.14/arch/x86/um/asm/
H A Delf.h102 #define R_X86_64_NONE 0 /* No reloc */
/linux-4.4.14/arch/alpha/include/asm/
H A Delf.h15 #define R_ALPHA_NONE 0 /* No reloc */
/linux-4.4.14/arch/arc/kernel/
H A Dmodule.c79 pr_debug("\n========== Module Sym reloc ===========================\n"); apply_relocate_add()
/linux-4.4.14/scripts/mod/
H A Dmodpost.h52 /* The 64-bit MIPS ELF ABI uses an unusual reloc format. */
H A Dmodpost.c1578 * handling the first reloc and extable_entry_size is zero. is_extable_fault_address()
/linux-4.4.14/arch/mn10300/include/asm/
H A Delf.h22 #define R_MN10300_NONE 0 /* No reloc. */
/linux-4.4.14/arch/mn10300/kernel/
H A Dmodule.c133 /* This is used to adjust the next reloc as required apply_relocate_add()
/linux-4.4.14/arch/x86/xen/
H A Denlighten.c1138 char *start, *end, *reloc; xen_patch() local
1141 start = end = reloc = NULL; xen_patch()
1148 reloc = xen_##x##_direct_reloc; \ xen_patch()
1165 /* Note: because reloc is assigned from something that xen_patch()
1169 if (reloc > start && reloc < end) { xen_patch()
1170 int reloc_off = reloc - start; xen_patch()
/linux-4.4.14/tools/perf/util/
H A Dmap.c134 map->reloc = 0; map__init()
434 return map->unmap_ip(map, rip) - map->reloc; map__rip_2objdump()
457 return ip + map->reloc; map__objdump_2mem()
H A Dmap.h42 u64 reloc; member in struct:map
H A Dprobe-finder.c1463 bool reloc = false; debuginfo__find_probe_point() local
1468 if (!reloc && debuginfo__get_text_offset(dbg, &baseaddr) == 0) { debuginfo__find_probe_point()
1470 reloc = true; debuginfo__find_probe_point()
H A Dprobe-event.c141 bool reloc, bool reladdr) kernel_get_symbol_address_by_name()
150 *addr = (reloc) ? reloc_sym->addr : reloc_sym->unrelocated_addr; kernel_get_symbol_address_by_name()
156 ((reloc) ? 0 : map->reloc) - kernel_get_symbol_address_by_name()
140 kernel_get_symbol_address_by_name(const char *name, u64 *addr, bool reloc, bool reladdr) kernel_get_symbol_address_by_name() argument
H A Dsymbol-elf.c872 map->reloc = kmap->ref_reloc_sym->addr - elf_symtab__for_each_symbol()
886 map->reloc = map->start - tshdr.sh_addr + tshdr.sh_offset;
H A Dmachine.c1235 * Avoid using a zero address (kptr_restrict) for the ref reloc machine__process_kernel_mmap_event()
/linux-4.4.14/arch/x86/boot/
H A Dheader.S218 # because EFI applications must be relocatable. The .reloc
221 .ascii ".reloc"
/linux-4.4.14/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_execbuf.c1236 struct vmw_relocation *reloc; vmw_translate_mob_ptr() local
1254 reloc = &sw_context->relocs[sw_context->cur_reloc++]; vmw_translate_mob_ptr()
1255 reloc->mob_loc = id; vmw_translate_mob_ptr()
1256 reloc->location = NULL; vmw_translate_mob_ptr()
1258 ret = vmw_bo_to_validate_list(sw_context, vmw_bo, true, &reloc->index); vmw_translate_mob_ptr()
1297 struct vmw_relocation *reloc; vmw_translate_guest_ptr() local
1315 reloc = &sw_context->relocs[sw_context->cur_reloc++]; vmw_translate_guest_ptr()
1316 reloc->location = ptr; vmw_translate_guest_ptr()
1318 ret = vmw_bo_to_validate_list(sw_context, vmw_bo, false, &reloc->index); vmw_translate_guest_ptr()
3462 struct vmw_relocation *reloc; vmw_apply_relocations() local
3467 reloc = &sw_context->relocs[i]; vmw_apply_relocations()
3468 validate = &sw_context->val_bufs[reloc->index].base; vmw_apply_relocations()
3472 reloc->location->offset += bo->offset; vmw_apply_relocations()
3473 reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER; vmw_apply_relocations()
3476 reloc->location->gmrId = bo->mem.start; vmw_apply_relocations()
3479 *reloc->mob_loc = bo->mem.start; vmw_apply_relocations()
/linux-4.4.14/arch/alpha/kernel/
H A Dmodule.c71 bits above 256 to store the got offset for this reloc. */ process_reloc_for_got()
/linux-4.4.14/arch/s390/include/asm/
H A Delf.h11 #define R_390_NONE 0 /* No reloc. */
/linux-4.4.14/arch/metag/kernel/
H A Dmodule.c270 pr_err("overflow of relbranch reloc\n"); apply_relocate_add()
/linux-4.4.14/arch/avr32/kernel/
H A Dmodule.c275 pr_debug("GOT reloc @ 0x%x -> %u\n", apply_relocate_add()
/linux-4.4.14/tools/perf/tests/
H A Dvmlinux-kallsyms.c91 * While doing that look if we find the ref reloc symbol, if we find it test__vmlinux_matches_kallsyms()
/linux-4.4.14/arch/x86/include/asm/
H A Delf.h47 #define R_X86_64_NONE 0 /* No reloc */
/linux-4.4.14/sound/pci/hda/
H A Dpatch_ca0132.c2245 * @reloc: Relocation address for loading single-segment overlays, or 0 for
2256 unsigned int reloc, dspxfr_one_seg()
2305 if (reloc) dspxfr_one_seg()
2306 chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); dspxfr_one_seg()
2442 * @reloc: Relocation address for loading single-segment overlays, or 0 for
2452 unsigned int reloc, dspxfr_image()
2534 status = dspxfr_one_seg(codec, fls_data, reloc, dspxfr_image()
2589 * @reloc: Relocation address for loading single-segment overlays, or 0 for
2604 unsigned int reloc, dspload_image()
2637 status = dspxfr_image(codec, fls, reloc, sample_rate, channels, dspload_image()
2254 dspxfr_one_seg(struct hda_codec *codec, const struct dsp_image_seg *fls, unsigned int reloc, struct dma_engine *dma_engine, unsigned int dma_chan, unsigned int port_map_mask, bool ovly) dspxfr_one_seg() argument
2450 dspxfr_image(struct hda_codec *codec, const struct dsp_image_seg *fls_data, unsigned int reloc, unsigned int sample_rate, unsigned short channels, bool ovly) dspxfr_image() argument
2601 dspload_image(struct hda_codec *codec, const struct dsp_image_seg *fls, bool ovly, unsigned int reloc, bool autostart, int router_chans) dspload_image() argument
/linux-4.4.14/arch/arm64/kernel/
H A Dhead.S171 .ascii ".reloc"

Completed in 4761 milliseconds