/linux-4.4.14/arch/x86/oprofile/ |
D | op_model_amd.c | 143 rdmsrl(MSR_AMD64_IBSFETCHCTL, ctl); in op_amd_handle_ibs() 145 rdmsrl(MSR_AMD64_IBSFETCHLINAD, val); in op_amd_handle_ibs() 150 rdmsrl(MSR_AMD64_IBSFETCHPHYSAD, val); in op_amd_handle_ibs() 162 rdmsrl(MSR_AMD64_IBSOPCTL, ctl); in op_amd_handle_ibs() 164 rdmsrl(MSR_AMD64_IBSOPRIP, val); in op_amd_handle_ibs() 168 rdmsrl(MSR_AMD64_IBSOPDATA, val); in op_amd_handle_ibs() 170 rdmsrl(MSR_AMD64_IBSOPDATA2, val); in op_amd_handle_ibs() 172 rdmsrl(MSR_AMD64_IBSOPDATA3, val); in op_amd_handle_ibs() 174 rdmsrl(MSR_AMD64_IBSDCLINAD, val); in op_amd_handle_ibs() 176 rdmsrl(MSR_AMD64_IBSDCPHYSAD, val); in op_amd_handle_ibs() [all …]
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D | op_model_ppro.c | 99 rdmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs() 116 rdmsrl(msrs->controls[i].addr, val); in ppro_setup_ctrs() 136 rdmsrl(msrs->counters[i].addr, val); in ppro_check_ctrs() 165 rdmsrl(msrs->controls[i].addr, val); in ppro_start() 181 rdmsrl(msrs->controls[i].addr, val); in ppro_stop()
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D | nmi_int.c | 83 rdmsrl(counters[i].addr, counters[i].saved); in nmi_cpu_save_registers() 88 rdmsrl(controls[i].addr, controls[i].saved); in nmi_cpu_save_registers() 209 rdmsrl(counters[i].addr, multiplex[virt].saved); in nmi_cpu_save_mpx_registers()
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/linux-4.4.14/drivers/hv/ |
D | hv.c | 172 rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick); in read_hv_clock_tsc() 220 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); in hv_init() 234 rdmsrl(HV_X64_MSR_HYPERCALL, hypercall_msr.as_uint64); in hv_init() 248 rdmsrl(HV_X64_MSR_REFERENCE_TSC, tsc_msr.as_uint64); in hv_init() 362 rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick); in hv_ce_set_next_event() 508 rdmsrl(HV_X64_MSR_SVERSION, version); in hv_synic_init() 511 rdmsrl(HV_X64_MSR_SIMP, simp.as_uint64); in hv_synic_init() 519 rdmsrl(HV_X64_MSR_SIEFP, siefp.as_uint64); in hv_synic_init() 527 rdmsrl(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, shared_sint.as_uint64); in hv_synic_init() 537 rdmsrl(HV_X64_MSR_SCONTROL, sctrl.as_uint64); in hv_synic_init() [all …]
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/linux-4.4.14/arch/x86/kernel/cpu/mcheck/ |
D | mce_intel.c | 89 rdmsrl(MSR_IA32_MCG_CAP, cap); in cmci_supported() 101 rdmsrl(MSR_IA32_MCG_CAP, tmp); in lmce_supported() 116 rdmsrl(MSR_IA32_FEATURE_CONTROL, tmp); in lmce_supported() 158 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); in cmci_toggle_interrupt_mode() 280 rdmsrl(MSR_IA32_MCx_CTL2(i), val); in cmci_discover() 304 rdmsrl(MSR_IA32_MCx_CTL2(i), val); in cmci_discover() 356 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); in __cmci_disable_bank() 449 rdmsrl(MSR_IA32_MCG_EXT_CTL, val); in intel_init_lmce() 462 rdmsrl(MSR_IA32_MCG_EXT_CTL, val); in intel_clear_lmce()
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D | therm_throt.c | 391 rdmsrl(MSR_IA32_THERM_STATUS, msr_val); in intel_thermal_interrupt() 407 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); in intel_thermal_interrupt()
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D | mce_amd.c | 317 rdmsrl(MSR_IA32_MCx_STATUS(bank), status); in __log_error() 330 rdmsrl(MSR_IA32_MCx_ADDR(bank), m.addr); in __log_error() 365 rdmsrl(MSR_IA32_MCx_STATUS(bank), status); in amd_deferred_error_interrupt()
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D | mce.c | 137 rdmsrl(MSR_IA32_MCG_CAP, m->mcgcap); in mce_setup() 1381 rdmsrl(MSR_IA32_MCG_CAP, cap); in __mcheck_cpu_cap_init() 1432 rdmsrl(MSR_IA32_MCG_CAP, cap); in __mcheck_cpu_init_generic() 1529 rdmsrl(MSR_K7_HWCR, hwcr); in __mcheck_cpu_apply_quirks()
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/linux-4.4.14/arch/x86/platform/olpc/ |
D | olpc-xo1-rtc.c | 70 rdmsrl(MSR_RTC_DOMA_OFFSET, rtc_info.rtc_day_alarm); in xo1_rtc_init() 71 rdmsrl(MSR_RTC_MONA_OFFSET, rtc_info.rtc_mon_alarm); in xo1_rtc_init() 72 rdmsrl(MSR_RTC_CEN_OFFSET, rtc_info.rtc_century); in xo1_rtc_init()
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/linux-4.4.14/arch/x86/power/ |
D | cpu.c | 94 rdmsrl(MSR_FS_BASE, ctxt->fs_base); in __save_processor_state() 95 rdmsrl(MSR_GS_BASE, ctxt->gs_base); in __save_processor_state() 96 rdmsrl(MSR_KERNEL_GS_BASE, ctxt->gs_kernel_base); in __save_processor_state() 99 rdmsrl(MSR_EFER, ctxt->efer); in __save_processor_state()
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/linux-4.4.14/drivers/cpufreq/ |
D | intel_pstate.c | 277 rdmsrl(MSR_IA32_MISC_ENABLE, misc_en); in update_turbo_state() 288 rdmsrl(MSR_HWP_CAPABILITIES, cap); in intel_pstate_hwp_set() 535 rdmsrl(ATOM_RATIOS, value); in atom_get_min_pstate() 543 rdmsrl(ATOM_RATIOS, value); in atom_get_max_pstate() 551 rdmsrl(ATOM_TURBO_RATIOS, value); in atom_get_turbo_pstate() 588 rdmsrl(MSR_FSB_FREQ, value); in silvermont_get_scaling() 604 rdmsrl(MSR_FSB_FREQ, value); in airmont_get_scaling() 615 rdmsrl(ATOM_VIDS, value); in atom_get_vid() 623 rdmsrl(ATOM_TURBO_VIDS, value); in atom_get_vid() 631 rdmsrl(MSR_PLATFORM_INFO, value); in core_get_min_pstate() [all …]
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D | powernow-k7.c | 224 rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val); in change_FID() 239 rdmsrl(MSR_K7_FID_VID_CTL, fidvidctl.val); in change_VID() 265 rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val); in powernow_target() 568 rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val); in powernow_get() 613 rdmsrl(MSR_K7_FID_VID_STATUS, fidvidstatus.val); in powernow_cpu_init()
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D | longhaul.c | 139 rdmsrl(MSR_VIA_BCR2, bcr2.val); in do_longhaul1() 154 rdmsrl(MSR_VIA_BCR2, bcr2.val); in do_longhaul1() 167 rdmsrl(MSR_VIA_LONGHAUL, longhaul.val); in do_powersaver() 539 rdmsrl(MSR_VIA_LONGHAUL, longhaul.val); in longhaul_setup_voltagescaling()
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D | e_powersaver.c | 231 rdmsrl(MSR_IA32_MISC_ENABLE, val); in eps_cpu_init() 236 rdmsrl(MSR_IA32_MISC_ENABLE, val); in eps_cpu_init()
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/linux-4.4.14/arch/x86/kernel/cpu/ |
D | perf_event_intel_lbr.c | 159 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); in __intel_pmu_lbr_enable() 177 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); in __intel_pmu_lbr_disable() 220 rdmsrl(x86_pmu.lbr_tos, tos); in intel_pmu_lbr_tos() 269 rdmsrl(x86_pmu.lbr_from + lbr_idx, task_ctx->lbr_from[i]); in __intel_pmu_lbr_save() 270 rdmsrl(x86_pmu.lbr_to + lbr_idx, task_ctx->lbr_to[i]); in __intel_pmu_lbr_save() 272 rdmsrl(MSR_LBR_INFO_0 + lbr_idx, task_ctx->lbr_info[i]); in __intel_pmu_lbr_save() 407 rdmsrl(x86_pmu.lbr_from + lbr_idx, msr_lastbranch.lbr); in intel_pmu_lbr_read_32() 442 rdmsrl(x86_pmu.lbr_from + lbr_idx, from); in intel_pmu_lbr_read_64() 443 rdmsrl(x86_pmu.lbr_to + lbr_idx, to); in intel_pmu_lbr_read_64() 448 rdmsrl(MSR_LBR_INFO_0 + lbr_idx, info); in intel_pmu_lbr_read_64()
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D | perf_event_amd_ibs.c | 332 rdmsrl(event->hw.config_base, *config); in perf_ibs_event_update() 398 rdmsrl(hwc->config_base, config); in perf_ibs_stop() 541 rdmsrl(msr, *buf); in perf_ibs_handle_irq() 562 rdmsrl(msr + offset, *buf++); in perf_ibs_handle_irq() 575 rdmsrl(MSR_AMD64_IBSBRTARGET, *buf++); in perf_ibs_handle_irq() 579 rdmsrl(MSR_AMD64_IBSOPDATA4, *buf++); in perf_ibs_handle_irq() 735 rdmsrl(MSR_AMD64_IBSCTL, val); in ibs_eilvt_valid() 850 rdmsrl(MSR_AMD64_IBSCTL, val); in get_ibs_lvt_offset()
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D | mshyperv.c | 143 rdmsrl(HV_X64_MSR_TIME_REF_COUNT, current_tick); in read_hv_clock() 174 rdmsrl(HV_X64_MSR_APIC_FREQUENCY, hv_lapic_frequency); in ms_hyperv_init_platform()
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D | perf_event_knc.c | 161 rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val); in knc_pmu_disable_all() 170 rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_CTRL, val); in knc_pmu_enable_all() 202 rdmsrl(MSR_KNC_IA32_PERF_GLOBAL_STATUS, status); in knc_pmu_get_status()
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D | amd.c | 321 rdmsrl(MSR_FAM10H_NODE_ID, value); in amd_get_topology() 502 rdmsrl(MSR_K7_HWCR, val); in bsp_init_amd() 668 rdmsrl(0xc0011005, value); in init_amd_bd() 902 rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, osvw_len); in cpu_has_amd_erratum() 906 rdmsrl(MSR_AMD64_OSVW_STATUS + (osvw_id >> 6), in cpu_has_amd_erratum()
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D | perf_event_p6.c | 142 rdmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_disable_all() 152 rdmsrl(MSR_P6_EVNTSEL0, val); in p6_pmu_enable_all()
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D | perf_event.c | 588 rdmsrl(x86_pmu_config_addr(idx), val); in x86_pmu_disable_all() 1259 rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl); in perf_event_print_debug() 1260 rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status); in perf_event_print_debug() 1261 rdmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, overflow); in perf_event_print_debug() 1262 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR_CTRL, fixed); in perf_event_print_debug() 1270 rdmsrl(MSR_IA32_PEBS_ENABLE, pebs); in perf_event_print_debug() 1274 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); in perf_event_print_debug() 1281 rdmsrl(x86_pmu_config_addr(idx), pmc_ctrl); in perf_event_print_debug() 1282 rdmsrl(x86_pmu_event_addr(idx), pmc_count); in perf_event_print_debug() 1294 rdmsrl(MSR_ARCH_PERFMON_FIXED_CTR0 + idx, pmc_count); in perf_event_print_debug()
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D | perf_event_intel_pt.c | 278 rdmsrl(MSR_IA32_RTIT_CTL, ctl); in pt_config_start() 576 rdmsrl(MSR_IA32_RTIT_STATUS, status); in pt_handle_status() 630 rdmsrl(MSR_IA32_RTIT_OUTPUT_BASE, base_topa); in pt_read_offset() 633 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, offset); in pt_read_offset()
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D | perf_event_msr.c | 146 rdmsrl(event->hw.event_base, now); in msr_read_counter()
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D | intel.c | 141 rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); in early_init_intel() 386 rdmsrl(MSR_IA32_ENERGY_PERF_BIAS, epb); in init_intel_energy_perf()
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D | perf_event_intel_rapl.c | 140 rdmsrl(event->hw.event_base, raw); in rapl_read_counter() 177 rdmsrl(event->hw.event_base, new_raw_count); in rapl_event_update()
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D | perf_event_intel_cstate.c | 429 rdmsrl(event->hw.event_base, val); in cstate_pmu_read_counter()
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D | perf_event_intel_uncore_nhmex.c | 210 rdmsrl(msr, config); in nhmex_uncore_msr_disable_box() 225 rdmsrl(msr, config); in nhmex_uncore_msr_enable_box()
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D | perf_event_p4.c | 860 rdmsrl(hwc->config_base, v); in p4_pmu_clear_cccr_ovf() 873 rdmsrl(hwc->event_base, v); in p4_pmu_clear_cccr_ovf()
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D | perf_event_intel.c | 1602 rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status); in intel_pmu_get_status() 1619 rdmsrl(hwc->config_base, ctrl_val); in intel_pmu_disable_fixed() 1687 rdmsrl(hwc->config_base, ctrl_val); in intel_pmu_enable_fixed() 3284 rdmsrl(MSR_IA32_PERF_CAPABILITIES, capabilities); in intel_pmu_init()
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D | perf_event_intel_cqm.c | 108 rdmsrl(MSR_IA32_QM_CTR, val); in __rmid_read()
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D | perf_event_intel_uncore_snbep.c | 329 rdmsrl(msr, config); in snbep_uncore_msr_disable_box() 342 rdmsrl(msr, config); in snbep_uncore_msr_enable_box()
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D | perf_event_intel_uncore.c | 128 rdmsrl(event->hw.event_base, count); in uncore_msr_read_counter()
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/linux-4.4.14/drivers/video/fbdev/geode/ |
D | video_gx.c | 149 rdmsrl(MSR_GLCP_SYS_RSTPLL, sys_rstpll); in gx_set_dclk_frequency() 150 rdmsrl(MSR_GLCP_DOTPLL, dotpll); in gx_set_dclk_frequency() 174 rdmsrl(MSR_GLCP_DOTPLL, dotpll); in gx_set_dclk_frequency() 187 rdmsrl(MSR_GX_MSR_PADSEL, val); in gx_configure_tft()
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D | suspend_gx.c | 30 rdmsrl(MSR_GX_MSR_PADSEL, par->msr.padsel); in gx_save_regs() 31 rdmsrl(MSR_GLCP_DOTPLL, par->msr.dotpll); in gx_save_regs() 52 rdmsrl(MSR_GLCP_DOTPLL, dotpll_lo); in gx_set_dotpll() 59 rdmsrl(MSR_GLCP_DOTPLL, dotpll_lo); in gx_set_dotpll()
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D | lxfb_ops.c | 365 rdmsrl(MSR_LX_GLD_MSR_CONFIG, msrval); in lx_set_mode() 426 rdmsrl(MSR_LX_SPARE_MSR, msrval); in lx_set_mode() 600 rdmsrl(MSR_LX_MSR_PADSEL, par->msr.padsel); in lx_save_regs() 601 rdmsrl(MSR_GLCP_DOTPLL, par->msr.dotpll); in lx_save_regs() 602 rdmsrl(MSR_LX_GLD_MSR_CONFIG, par->msr.dfglcfg); in lx_save_regs() 603 rdmsrl(MSR_LX_SPARE_MSR, par->msr.dcspare); in lx_save_regs()
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D | gxfb_core.c | 397 rdmsrl(MSR_GX_GLD_MSR_CONFIG, val); in gxfb_probe()
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/linux-4.4.14/arch/x86/kernel/ |
D | mmconf-fam10h_64.c | 98 rdmsrl(address, val); in get_fam10h_pci_mmconf_base() 106 rdmsrl(address, val); in get_fam10h_pci_mmconf_base() 178 rdmsrl(address, val); in fam10h_check_enable_mmcfg()
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D | process_64.c | 86 rdmsrl(MSR_FS_BASE, fs); in __show_regs() 87 rdmsrl(MSR_GS_BASE, gs); in __show_regs() 88 rdmsrl(MSR_KERNEL_GS_BASE, shadowgs); in __show_regs() 570 rdmsrl(MSR_FS_BASE, base); in do_arch_prctl() 584 rdmsrl(MSR_KERNEL_GS_BASE, base); in do_arch_prctl()
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D | amd_nb.c | 152 rdmsrl(address, msr); in amd_get_mmconfig_range()
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/linux-4.4.14/arch/x86/pci/ |
D | amd_bus.c | 195 rdmsrl(address, val); in early_root_info_init() 286 rdmsrl(address, val); in early_root_info_init() 291 rdmsrl(address, val); in early_root_info_init() 333 rdmsrl(MSR_AMD64_NB_CFG, reg); in enable_pci_io_ecs()
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/linux-4.4.14/arch/x86/kernel/apic/ |
D | apic_numachip.c | 34 rdmsrl(MSR_FAM10H_NODE_ID, value); in numachip1_get_apic_id() 53 rdmsrl(MSR_FAM10H_MMIO_CONF_BASE, mcfg); in numachip2_get_apic_id() 182 rdmsrl(MSR_FAM10H_NODE_ID, val); in fixup_cpu_id()
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D | apic.c | 1441 rdmsrl(MSR_IA32_APICBASE, msr); in __x2apic_disable() 1454 rdmsrl(MSR_IA32_APICBASE, msr); in __x2apic_enable()
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/linux-4.4.14/drivers/mtd/nand/ |
D | cs553x_nand.c | 293 rdmsrl(MSR_DIVIL_GLD_CAP, val); in cs553x_init() 299 rdmsrl(MSR_DIVIL_BALL_OPTS, val); in cs553x_init() 306 rdmsrl(MSR_DIVIL_LBAR_FLSH0 + i, val); in cs553x_init()
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/linux-4.4.14/drivers/platform/x86/ |
D | intel_ips.c | 385 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_override); in ips_cpu_raise() 420 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_override); in ips_cpu_lower() 452 rdmsrl(IA32_PERF_CTL, perf_ctl); in do_enable_cpu_turbo() 490 rdmsrl(IA32_PERF_CTL, perf_ctl); in do_disable_cpu_turbo() 1261 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_override); in show_cpu_clamp() 1379 rdmsrl(IA32_MISC_ENABLE, misc_en); in ips_detect_cpu() 1401 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_power); in ips_detect_cpu() 1601 rdmsrl(PLATFORM_INFO, platform_info); in ips_probe() 1631 rdmsrl(TURBO_POWER_CURRENT_LIMIT, ips->orig_turbo_limit); in ips_probe() 1706 rdmsrl(TURBO_POWER_CURRENT_LIMIT, turbo_override); in ips_remove()
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/linux-4.4.14/arch/x86/include/asm/ |
D | virtext.h | 120 rdmsrl(MSR_EFER, efer); in cpu_svm_disable()
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D | msr.h | 188 #define rdmsrl(msr, val) \ macro 274 rdmsrl(msr_no, *q); in rdmsrl_on_cpu()
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D | apic.h | 203 rdmsrl(APIC_BASE_MSR + (reg >> 4), msr); in native_apic_msr_read() 228 rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); in native_x2apic_icr_read()
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D | processor.h | 633 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctlmsr); in get_debugctlmsr()
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D | paravirt.h | 156 #define rdmsrl(msr, val) \ macro
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D | kvm_host.h | 1129 rdmsrl(msr, value); in read_msr()
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/linux-4.4.14/arch/x86/realmode/ |
D | init.c | 79 rdmsrl(MSR_EFER, efer); in setup_real_mode()
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/linux-4.4.14/drivers/idle/ |
D | intel_idle.c | 817 rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr_bits); in auto_demotion_disable() 825 rdmsrl(MSR_IA32_POWER_CTL, msr_bits); in c1e_promotion_disable() 1044 rdmsrl(MSR_NHM_SNB_PKG_CST_CFG_CTL, msr); in sklh_idle_state_table_update() 1056 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr); in sklh_idle_state_table_update()
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/linux-4.4.14/drivers/acpi/ |
D | acpi_extlog.c | 226 rdmsrl(MSR_IA32_MCG_CAP, cap); in extlog_init()
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/linux-4.4.14/arch/x86/ras/ |
D | mce_amd_inj.c | 416 rdmsrl(MSR_IA32_MCG_CAP, cap); in init_mce_inject()
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/linux-4.4.14/drivers/thermal/ |
D | x86_pkg_temp_thermal.c | 338 rdmsrl(MSR_IA32_PACKAGE_THERM_STATUS, msr_val); in pkg_temp_thermal_threshold_work_fn()
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/linux-4.4.14/drivers/edac/ |
D | amd64_edac.c | 2283 rdmsrl(MSR_K8_TOP_MEM1, pvt->top_mem); in read_mc_regs() 2287 rdmsrl(MSR_K8_SYSCFG, msr_val); in read_mc_regs() 2289 rdmsrl(MSR_K8_TOP_MEM2, pvt->top_mem2); in read_mc_regs()
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/linux-4.4.14/arch/x86/mm/ |
D | pat.c | 212 rdmsrl(MSR_IA32_CR_PAT, tmp_pat); in pat_bsp_init()
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/linux-4.4.14/arch/x86/kvm/ |
D | vmx.c | 1165 rdmsrl(MSR_IA32_VMX_MISC, vmx_msr); in cpu_has_vmx_shadow_vmcs() 1928 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_host_kernel_gs_base); in vmx_save_host_state() 1933 rdmsrl(MSR_IA32_BNDCFGS, vmx->host_state.msr_host_bndcfgs); in vmx_save_host_state() 1949 rdmsrl(MSR_KERNEL_GS_BASE, vmx->msr_guest_kernel_gs_base); in __vmx_load_host_state() 2081 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp); in vmx_vcpu_load() 2995 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr); in vmx_disabled_by_bios() 3049 rdmsrl(MSR_IA32_FEATURE_CONTROL, old); in hardware_enable() 3304 rdmsrl(MSR_IA32_XSS, host_xss); in setup_vmcs_config() 4667 rdmsrl(MSR_IA32_SYSENTER_EIP, tmpl); in vmx_set_constant_host_state() 4824 rdmsrl(MSR_FS_BASE, a); in vmx_vcpu_setup() [all …]
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D | svm.c | 649 rdmsrl(MSR_EFER, efer); in svm_hardware_enable() 1225 rdmsrl(MSR_GS_BASE, to_svm(vcpu)->host.gs_base); in svm_vcpu_load() 1232 rdmsrl(host_save_user_msrs[i], svm->host_user_msrs[i]); in svm_vcpu_load() 3960 rdmsrl(MSR_VM_CR, vm_cr); in is_disabled()
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/linux-4.4.14/arch/x86/xen/ |
D | enlighten.c | 1634 rdmsrl(MSR_IA32_CR_PAT, pat); in xen_start_kernel()
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/linux-4.4.14/drivers/gpu/drm/i915/ |
D | i915_debugfs.c | 2639 rdmsrl(MSR_RAPL_POWER_UNIT, power); in i915_energy_uJ()
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