1#include <linux/io.h>
2#include <linux/memblock.h>
3
4#include <asm/cacheflush.h>
5#include <asm/pgtable.h>
6#include <asm/realmode.h>
7
8struct real_mode_header *real_mode_header;
9u32 *trampoline_cr4_features;
10
11void __init reserve_real_mode(void)
12{
13	phys_addr_t mem;
14	unsigned char *base;
15	size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
16
17	/* Has to be under 1M so we can execute real-mode AP code. */
18	mem = memblock_find_in_range(0, 1<<20, size, PAGE_SIZE);
19	if (!mem)
20		panic("Cannot allocate trampoline\n");
21
22	base = __va(mem);
23	memblock_reserve(mem, size);
24	real_mode_header = (struct real_mode_header *) base;
25	printk(KERN_DEBUG "Base memory trampoline at [%p] %llx size %zu\n",
26	       base, (unsigned long long)mem, size);
27}
28
29void __init setup_real_mode(void)
30{
31	u16 real_mode_seg;
32	const u32 *rel;
33	u32 count;
34	unsigned char *base;
35	unsigned long phys_base;
36	struct trampoline_header *trampoline_header;
37	size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
38#ifdef CONFIG_X86_64
39	u64 *trampoline_pgd;
40	u64 efer;
41#endif
42
43	base = (unsigned char *)real_mode_header;
44
45	memcpy(base, real_mode_blob, size);
46
47	phys_base = __pa(base);
48	real_mode_seg = phys_base >> 4;
49
50	rel = (u32 *) real_mode_relocs;
51
52	/* 16-bit segment relocations. */
53	count = *rel++;
54	while (count--) {
55		u16 *seg = (u16 *) (base + *rel++);
56		*seg = real_mode_seg;
57	}
58
59	/* 32-bit linear relocations. */
60	count = *rel++;
61	while (count--) {
62		u32 *ptr = (u32 *) (base + *rel++);
63		*ptr += phys_base;
64	}
65
66	/* Must be perfomed *after* relocation. */
67	trampoline_header = (struct trampoline_header *)
68		__va(real_mode_header->trampoline_header);
69
70#ifdef CONFIG_X86_32
71	trampoline_header->start = __pa_symbol(startup_32_smp);
72	trampoline_header->gdt_limit = __BOOT_DS + 7;
73	trampoline_header->gdt_base = __pa_symbol(boot_gdt);
74#else
75	/*
76	 * Some AMD processors will #GP(0) if EFER.LMA is set in WRMSR
77	 * so we need to mask it out.
78	 */
79	rdmsrl(MSR_EFER, efer);
80	trampoline_header->efer = efer & ~EFER_LMA;
81
82	trampoline_header->start = (u64) secondary_startup_64;
83	trampoline_cr4_features = &trampoline_header->cr4;
84	*trampoline_cr4_features = __read_cr4();
85
86	trampoline_pgd = (u64 *) __va(real_mode_header->trampoline_pgd);
87	trampoline_pgd[0] = init_level4_pgt[pgd_index(__PAGE_OFFSET)].pgd;
88	trampoline_pgd[511] = init_level4_pgt[511].pgd;
89#endif
90}
91
92/*
93 * reserve_real_mode() gets called very early, to guarantee the
94 * availability of low memory. This is before the proper kernel page
95 * tables are set up, so we cannot set page permissions in that
96 * function. Also trampoline code will be executed by APs so we
97 * need to mark it executable at do_pre_smp_initcalls() at least,
98 * thus run it as a early_initcall().
99 */
100static int __init set_real_mode_permissions(void)
101{
102	unsigned char *base = (unsigned char *) real_mode_header;
103	size_t size = PAGE_ALIGN(real_mode_blob_end - real_mode_blob);
104
105	size_t ro_size =
106		PAGE_ALIGN(real_mode_header->ro_end) -
107		__pa(base);
108
109	size_t text_size =
110		PAGE_ALIGN(real_mode_header->ro_end) -
111		real_mode_header->text_start;
112
113	unsigned long text_start =
114		(unsigned long) __va(real_mode_header->text_start);
115
116	set_memory_nx((unsigned long) base, size >> PAGE_SHIFT);
117	set_memory_ro((unsigned long) base, ro_size >> PAGE_SHIFT);
118	set_memory_x((unsigned long) text_start, text_size >> PAGE_SHIFT);
119
120	return 0;
121}
122early_initcall(set_real_mode_permissions);
123