Searched refs:pstate (Results 1 - 113 of 113) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dbase.c41 u8 pstate, u8 domain, u32 input) nvkm_clk_adjust()
48 data = nvbios_boostEm(bios, pstate, &ver, &hdr, &cnt, &len, &boostE); nvkm_clk_adjust()
78 nvkm_cstate_prog(struct nvkm_clk *clk, struct nvkm_pstate *pstate, int cstatei) nvkm_cstate_prog() argument
87 if (!list_empty(&pstate->list)) { nvkm_cstate_prog()
88 cstate = list_entry(pstate->list.prev, typeof(*cstate), head); nvkm_cstate_prog()
90 cstate = &pstate->base; nvkm_cstate_prog()
94 ret = nvkm_therm_cstate(therm, pstate->fanspeed, +1); nvkm_cstate_prog()
122 ret = nvkm_therm_cstate(therm, pstate->fanspeed, -1); nvkm_cstate_prog()
138 nvkm_cstate_new(struct nvkm_clk *clk, int idx, struct nvkm_pstate *pstate) nvkm_cstate_new() argument
155 *cstate = pstate->base; nvkm_cstate_new()
160 u32 freq = nvkm_clk_adjust(clk, true, pstate->pstate, nvkm_cstate_new()
167 list_add(&cstate->head, &pstate->list); nvkm_cstate_new()
179 struct nvkm_pstate *pstate; nvkm_pstate_prog() local
182 list_for_each_entry(pstate, &clk->states, head) { nvkm_pstate_prog()
188 clk->pstate = pstatei; nvkm_pstate_prog()
191 int khz = pstate->base.domain[nv_clk_src_mem]; nvkm_pstate_prog()
200 return nvkm_cstate_prog(clk, pstate, 0); nvkm_pstate_prog()
208 int pstate; nvkm_pstate_work() local
215 clk->pstate, clk->pwrsrc, clk->ustate_ac, clk->ustate_dc, nvkm_pstate_work()
218 pstate = clk->pwrsrc ? clk->ustate_ac : clk->ustate_dc; nvkm_pstate_work()
219 if (clk->state_nr && pstate != -1) { nvkm_pstate_work()
220 pstate = (pstate < 0) ? clk->astate : pstate; nvkm_pstate_work()
221 pstate = min(pstate, clk->state_nr - 1 + clk->tstate); nvkm_pstate_work()
222 pstate = max(pstate, clk->dstate); nvkm_pstate_work()
224 pstate = clk->pstate = -1; nvkm_pstate_work()
227 nvkm_trace(subdev, "-> %d\n", pstate); nvkm_pstate_work()
228 if (pstate != clk->pstate) { nvkm_pstate_work()
229 int ret = nvkm_pstate_prog(clk, pstate); nvkm_pstate_work()
231 nvkm_error(subdev, "error setting pstate %d: %d\n", nvkm_pstate_work()
232 pstate, ret); nvkm_pstate_work()
251 nvkm_pstate_info(struct nvkm_clk *clk, struct nvkm_pstate *pstate) nvkm_pstate_info() argument
260 if (pstate->pstate != 0xff) nvkm_pstate_info()
261 snprintf(name, sizeof(name), "%02x", pstate->pstate); nvkm_pstate_info()
264 u32 lo = pstate->base.domain[clock->name]; nvkm_pstate_info()
270 list_for_each_entry(cstate, &pstate->list, head) { nvkm_pstate_info()
294 nvkm_pstate_del(struct nvkm_pstate *pstate) nvkm_pstate_del() argument
298 list_for_each_entry_safe(cstate, temp, &pstate->list, head) { nvkm_pstate_del()
302 list_del(&pstate->head); nvkm_pstate_del()
303 kfree(pstate); nvkm_pstate_del()
311 struct nvkm_pstate *pstate; nvkm_pstate_new() local
321 if (perfE.pstate == 0xff) nvkm_pstate_new()
324 pstate = kzalloc(sizeof(*pstate), GFP_KERNEL); nvkm_pstate_new()
325 cstate = &pstate->base; nvkm_pstate_new()
326 if (!pstate) nvkm_pstate_new()
329 INIT_LIST_HEAD(&pstate->list); nvkm_pstate_new()
331 pstate->pstate = perfE.pstate; nvkm_pstate_new()
332 pstate->fanspeed = perfE.fanspeed; nvkm_pstate_new()
350 pstate->pstate, nvkm_pstate_new()
358 data = nvbios_cstepEm(bios, pstate->pstate, &ver, &hdr, &cstepE); nvkm_pstate_new()
362 nvkm_cstate_new(clk, idx, pstate); nvkm_pstate_new()
366 nvkm_pstate_info(clk, pstate); nvkm_pstate_new()
367 list_add_tail(&pstate->head, &clk->states); nvkm_pstate_new()
378 struct nvkm_pstate *pstate; nvkm_clk_ustate_update() local
385 list_for_each_entry(pstate, &clk->states, head) { nvkm_clk_ustate_update()
386 if (pstate->pstate == req) nvkm_clk_ustate_update()
391 if (pstate->pstate != req) nvkm_clk_ustate_update()
504 clk->bstate.pstate = 0xff; nvkm_clk_init()
524 clk->pstate = -1; nvkm_clk_init()
533 struct nvkm_pstate *pstate, *temp; nvkm_clk_dtor() local
541 list_for_each_entry_safe(pstate, temp, &clk->states, head) { nvkm_clk_dtor()
542 nvkm_pstate_del(pstate); nvkm_clk_dtor()
40 nvkm_clk_adjust(struct nvkm_clk *clk, bool adjust, u8 pstate, u8 domain, u32 input) nvkm_clk_adjust() argument
H A Dgk20a.c660 gk20a_pstates[i].pstate = i + 1; gk20a_clk_new()
/linux-4.4.14/tools/power/cpupower/utils/helpers/
H A Damd.c32 static int get_did(int family, union msr_pstate pstate) get_did() argument
37 t = pstate.val & 0xf; get_did()
39 t = pstate.bits.did; get_did()
44 static int get_cof(int family, union msr_pstate pstate) get_cof() argument
49 did = get_did(family, pstate); get_cof()
52 fid = pstate.bits.fid; get_cof()
76 union msr_pstate pstate; decode_pstates() local
104 if (read_msr(cpu, MSR_AMD_PSTATE + i, &pstate.val)) decode_pstates()
106 pstates[i] = get_cof(cpu_family, pstate); decode_pstates()
H A Dhelpers.h145 /* AMD HW pstate decoding **************************/
150 /* AMD HW pstate decoding **************************/
/linux-4.4.14/arch/arm64/include/asm/
H A Dptrace.h114 u64 pstate; member in struct:pt_regs::__anon304::__anon305
125 (((regs)->pstate & COMPAT_PSR_T_BIT))
131 (((regs)->pstate & PSR_MODE_MASK) == PSR_MODE_EL0t)
134 (((regs)->pstate & (PSR_MODE32_BIT | PSR_MODE_MASK)) == \
138 ((regs)->pstate & PSR_MODE_MASK)
141 (!((regs)->pstate & PSR_I_BIT))
144 (!((regs)->pstate & PSR_F_BIT))
160 if (user_mode(regs) && (regs->pstate & PSR_I_BIT) == 0) { valid_user_regs()
161 regs->pstate &= ~(PSR_F_BIT | PSR_A_BIT); valid_user_regs()
164 if (!(regs->pstate & PSR_MODE32_BIT)) valid_user_regs()
165 regs->pstate &= ~COMPAT_PSR_T_BIT; valid_user_regs()
173 regs->pstate &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | \ valid_user_regs()
176 if (!(regs->pstate & PSR_MODE32_BIT)) { valid_user_regs()
177 regs->pstate &= ~COMPAT_PSR_T_BIT; valid_user_regs()
178 regs->pstate |= PSR_MODE_EL0t; valid_user_regs()
H A Dkgdb.h46 * pstate : 64 bit
62 * pstate is only 4 bytes. subtract 4 bytes
H A Dperf_event.h31 (regs)->pstate = PSR_MODE_EL1h; \
H A Dprocessor.h118 regs->pstate = PSR_MODE_EL0t; start_thread()
127 regs->pstate = COMPAT_PSR_MODE_USR; compat_start_thread()
129 regs->pstate |= COMPAT_PSR_T_BIT; compat_start_thread()
132 regs->pstate |= COMPAT_PSR_E_BIT; compat_start_thread()
H A Dkvm_emulate.h73 return (unsigned long *)&vcpu_gp_regs(vcpu)->regs.pstate; vcpu_cpsr()
/linux-4.4.14/arch/sparc/kernel/
H A Dhelpers.S27 rdpr %pstate, %o0
28 wrpr %o0, PSTATE_IE, %pstate
43 wrpr %o0, %pstate
H A Dhvtramp.S12 #include <asm/pstate.h>
81 wrpr %g0, (PSTATE_PRIV | PSTATE_PEF), %pstate
124 wrpr %g0, (PSTATE_PRIV | PSTATE_PEF | PSTATE_IE), %pstate
H A Drtrap_64.S10 #include <asm/pstate.h>
27 wrpr %g0, RTRAP_PSTATE, %pstate
29 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
33 wrpr %g0, RTRAP_PSTATE, %pstate
35 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
50 wrpr %g0, RTRAP_PSTATE, %pstate
51 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
74 * below after we clear PSTATE_IE in the %pstate register.
97 * below after we clear PSTATE_IE in the %pstate register.
129 to_user: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
171 661: wrpr %g0, RTRAP_PSTATE_AG_IRQOFF, %pstate
175 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
H A Dspiterrs.S157 rdpr %pstate, %g4
158 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
185 rdpr %pstate, %g4
186 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
205 rdpr %pstate, %g4
206 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
224 rdpr %pstate, %g4
225 wrpr %g4, PSTATE_MG|PSTATE_AG, %pstate
H A Dkgdb_64.c120 __asm__ __volatile__("rdpr %%pstate, %0\n\t" smp_kgdb_capture_client()
121 "wrpr %0, %1, %%pstate" smp_kgdb_capture_client()
130 __asm__ __volatile__("wrpr %0, 0, %%pstate" smp_kgdb_capture_client()
H A Dasm-offsets.c36 OFFSET(SC_REG_PSTATE, saved_context, pstate); sparc64_foo()
H A Dsmp_64.c390 static void spitfire_xcall_helper(u64 data0, u64 data1, u64 data2, u64 pstate, unsigned long cpu) spitfire_xcall_helper() argument
413 "wrpr %1, %2, %%pstate\n\t" spitfire_xcall_helper()
425 : "r" (pstate), "i" (PSTATE_IE), "i" (ASI_INTR_W), spitfire_xcall_helper()
437 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" spitfire_xcall_helper()
438 : : "r" (pstate)); spitfire_xcall_helper()
445 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" spitfire_xcall_helper()
446 : : "r" (pstate)); spitfire_xcall_helper()
460 u64 pstate; spitfire_xcall_deliver() local
463 __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); spitfire_xcall_deliver()
470 spitfire_xcall_helper(data0, data1, data2, pstate, cpu_list[i]); spitfire_xcall_deliver()
480 u64 *mondo, pstate, ver, busy_mask; cheetah_xcall_deliver() local
494 __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); cheetah_xcall_deliver()
498 __asm__ __volatile__("wrpr %0, %1, %%pstate\n\t" cheetah_xcall_deliver()
499 : : "r" (pstate), "i" (PSTATE_IE)); cheetah_xcall_deliver()
556 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" cheetah_xcall_deliver()
557 : : "r" (pstate)); cheetah_xcall_deliver()
576 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" cheetah_xcall_deliver()
577 : : "r" (pstate)); cheetah_xcall_deliver()
1301 unsigned long pstate; cpu_play_dead() local
1324 "rdpr %%pstate, %0\n\t" cpu_play_dead()
1325 "wrpr %0, %1, %%pstate" cpu_play_dead()
1326 : "=r" (pstate) cpu_play_dead()
H A Dtsb.S157 661: rdpr %pstate, %g5
158 wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
264 661: rdpr %pstate, %g5
265 wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
326 rdpr %pstate, %o5
327 wrpr %o5, PSTATE_IE, %pstate
330 wrpr %o5, %pstate
379 rdpr %pstate, %g1
380 wrpr %g1, PSTATE_IE, %pstate
451 wrpr %g1, %pstate
H A Durtt_fill.S52 wrpr %g0, RTRAP_PSTATE, %pstate
H A Dktlb.S81 661: rdpr %pstate, %g5
82 wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
235 661: rdpr %pstate, %g5
236 wrpr %g5, PSTATE_AG | PSTATE_MG, %pstate
H A Dtime_64.c721 unsigned long pstate; setup_sparc64_timer() local
726 __asm__ __volatile__("rdpr %%pstate, %0\n\t" setup_sparc64_timer()
727 "wrpr %0, %1, %%pstate" setup_sparc64_timer()
728 : "=r" (pstate) setup_sparc64_timer()
734 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" setup_sparc64_timer()
736 : "r" (pstate)); setup_sparc64_timer()
H A Dprocess_64.c41 #include <asm/pstate.h>
63 unsigned long pstate; arch_cpu_idle() local
71 "rdpr %%pstate, %0\n\t" arch_cpu_idle()
73 "wrpr %0, %%g0, %%pstate" arch_cpu_idle()
74 : "=&r" (pstate) arch_cpu_idle()
82 "rdpr %%pstate, %0\n\t" arch_cpu_idle()
84 "wrpr %0, %%g0, %%pstate" arch_cpu_idle()
85 : "=&r" (pstate) arch_cpu_idle()
H A Dtrampoline_64.S13 #include <asm/pstate.h>
250 wrpr %g0, (PSTATE_PRIV | PSTATE_PEF), %pstate
401 rdpr %pstate, %o1
403 wrpr %o1, 0, %pstate
H A Dsignal32.c369 unsigned long pstate, paddr; flush_signal_insns() local
384 __asm__ __volatile__("rdpr %%pstate, %0" : "=r" (pstate)); flush_signal_insns()
385 __asm__ __volatile__("wrpr %0, %1, %%pstate" flush_signal_insns()
386 : : "r" (pstate), "i" (PSTATE_IE)); flush_signal_insns()
414 __asm__ __volatile__("wrpr %0, 0x0, %%pstate" : : "r" (pstate)); flush_signal_insns()
H A Dsyscalls.S139 1: rdpr %pstate, %g2
140 wrpr %g2, PSTATE_IE, %pstate
146 wrpr %g2, 0x0, %pstate
H A Detrap_64.S10 #include <asm/pstate.h>
119 661: wrpr %g0, ETRAP_PSTATE1, %pstate
H A Dhead_64.S16 #include <asm/pstate.h>
94 rdpr %pstate, %g1
96 wrpr %g1, 0x0, %pstate
528 * (PSTATE_PRIV | PSTATE_PEF | PSTATE_IE) in %pstate.
530 wrpr %g0, (PSTATE_PRIV|PSTATE_PEF|PSTATE_IE), %pstate
738 rdpr %pstate, %l0
740 wrpr %o1, 0x0, %pstate
833 wrpr %l0, 0, %pstate
H A Dirq_64.c816 unsigned long pstate, bucket_pa; handler_irq() local
826 __asm__ __volatile__("rdpr %%pstate, %0\n\t" handler_irq()
827 "wrpr %0, %3, %%pstate\n\t" handler_irq()
830 "wrpr %0, 0x0, %%pstate\n\t" handler_irq()
831 : "=&r" (pstate), "=&r" (bucket_pa) handler_irq()
1139 __asm__ __volatile__("rdpr %%pstate, %%g1\n\t" init_IRQ()
1141 "wrpr %%g1, 0x0, %%pstate" init_IRQ()
H A Dcherrs.S122 wrpr PSTATE_IG | PSTATE_PEF | PSTATE_PRIV, %pstate
164 wrpr PSTATE_IG | PSTATE_PEF | PSTATE_PRIV, %pstate
H A Dunaligned_64.c17 #include <asm/pstate.h>
H A Dvisemul.c11 #include <asm/pstate.h>
H A Dtraps_64.c2001 /* We run with %pil set to PIL_NORMAL_MAX and PSTATE_IE enabled in %pstate.
2054 /* We run with %pil set to PIL_NORMAL_MAX and PSTATE_IE enabled in %pstate.
H A Dpci_schizo.c17 #include <asm/pstate.h>
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dcstep.h7 u8 pstate; member in struct:nvbios_cstepE
14 u16 nvbios_cstepEm(struct nvkm_bios *, u8 pstate, u8 *ver, u8 *hdr,
H A Dboost.h6 u8 pstate; member in struct:nvbios_boostE
H A Dperf.h7 u8 pstate; member in struct:nvbios_perfE
/linux-4.4.14/arch/sparc/include/asm/
H A Dhibernate.h16 unsigned long pstate; member in struct:saved_context
H A Dperf_event.h10 __asm__ __volatile__("rdpr %%pstate, %0\n\t" \
H A Dhead_64.h4 #include <asm/pstate.h>
H A Dvisasm.h9 #include <asm/pstate.h>
H A Dprocessor_64.h17 #include <asm/pstate.h>
/linux-4.4.14/arch/arm64/include/asm/xen/
H A Devents.h16 return raw_irqs_disabled_flags((unsigned long) regs->pstate); xen_irqs_disabled()
/linux-4.4.14/drivers/cpufreq/
H A Dintel_pstate.c107 struct pstate_data pstate; member in struct:cpudata
134 void (*set)(struct cpudata*, int pstate);
280 cpu->pstate.max_pstate == cpu->pstate.turbo_pstate); update_turbo_state()
385 total = cpu->pstate.turbo_pstate - cpu->pstate.min_pstate + 1; show_turbo_pct()
386 no_turbo = cpu->pstate.max_pstate - cpu->pstate.min_pstate + 1; show_turbo_pct()
399 total = cpu->pstate.turbo_pstate - cpu->pstate.min_pstate + 1; show_num_pstates()
555 static void atom_set_pstate(struct cpudata *cpudata, int pstate) atom_set_pstate() argument
561 val = (u64)pstate << 8; atom_set_pstate()
566 int_tofp(pstate - cpudata->pstate.min_pstate), atom_set_pstate()
572 if (pstate > cpudata->pstate.max_pstate) atom_set_pstate()
620 int_tofp(cpudata->pstate.max_pstate - atom_get_vid()
621 cpudata->pstate.min_pstate)); atom_get_vid()
706 static void core_set_pstate(struct cpudata *cpudata, int pstate) core_set_pstate() argument
710 val = (u64)pstate << 8; core_set_pstate()
810 int max_perf = cpu->pstate.turbo_pstate; intel_pstate_get_min_max()
815 max_perf = cpu->pstate.max_pstate; intel_pstate_get_min_max()
824 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate); intel_pstate_get_min_max()
827 *min = clamp_t(int, min_perf, cpu->pstate.min_pstate, max_perf); intel_pstate_get_min_max()
830 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate, bool force) intel_pstate_set_pstate() argument
839 pstate = clamp_t(int, pstate, min_perf, max_perf); intel_pstate_set_pstate()
841 if (pstate == cpu->pstate.current_pstate) intel_pstate_set_pstate()
844 trace_cpu_frequency(pstate * cpu->pstate.scaling, cpu->cpu); intel_pstate_set_pstate()
846 cpu->pstate.current_pstate = pstate; intel_pstate_set_pstate()
848 pstate_funcs.set(cpu, pstate); intel_pstate_set_pstate()
853 cpu->pstate.min_pstate = pstate_funcs.get_min(); intel_pstate_get_cpu_pstates()
854 cpu->pstate.max_pstate = pstate_funcs.get_max(); intel_pstate_get_cpu_pstates()
855 cpu->pstate.max_pstate_physical = pstate_funcs.get_max_physical(); intel_pstate_get_cpu_pstates()
856 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo(); intel_pstate_get_cpu_pstates()
857 cpu->pstate.scaling = pstate_funcs.get_scaling(); intel_pstate_get_cpu_pstates()
861 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate, false); intel_pstate_get_cpu_pstates()
874 cpu->pstate.max_pstate_physical * intel_pstate_calc_busy()
875 cpu->pstate.scaling / 100), intel_pstate_calc_busy()
938 * max_pstate is the max non turbo pstate available intel_pstate_get_scaled_busy()
939 * current_pstate was the pstate that was requested during intel_pstate_get_scaled_busy()
945 * specified pstate. intel_pstate_get_scaled_busy()
948 max_pstate = int_tofp(cpu->pstate.max_pstate_physical); intel_pstate_get_scaled_busy()
949 current_pstate = int_tofp(cpu->pstate.current_pstate); intel_pstate_get_scaled_busy()
979 from = cpu->pstate.current_pstate; intel_pstate_adjust_busy_pstate()
986 /* Negative values of ctl increase the pstate and vice versa */ intel_pstate_adjust_busy_pstate()
987 intel_pstate_set_pstate(cpu, cpu->pstate.current_pstate - ctl, true); intel_pstate_adjust_busy_pstate()
993 cpu->pstate.current_pstate, intel_pstate_adjust_busy_pstate()
1169 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate, false); intel_pstate_stop_cpu()
1188 policy->min = cpu->pstate.min_pstate * cpu->pstate.scaling; intel_pstate_cpu_init()
1189 policy->max = cpu->pstate.turbo_pstate * cpu->pstate.scaling; intel_pstate_cpu_init()
1192 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * cpu->pstate.scaling; intel_pstate_cpu_init()
1194 cpu->pstate.turbo_pstate * cpu->pstate.scaling; intel_pstate_cpu_init()
1378 * The Intel pstate driver will be ignored if the platform intel_pstate_init()
H A Dpowernv-cpufreq.c61 * The nominal pstate is the highest non-turbo pstate in this
88 if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) { init_powernv_pstates()
89 pr_warn("ibm,pstate-min node not found\n"); init_powernv_pstates()
93 if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) { init_powernv_pstates()
94 pr_warn("ibm,pstate-max node not found\n"); init_powernv_pstates()
98 if (of_property_read_u32(power_mgt, "ibm,pstate-nominal", init_powernv_pstates()
100 pr_warn("ibm,pstate-nominal not found\n"); init_powernv_pstates()
103 pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min, init_powernv_pstates()
106 pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids); init_powernv_pstates()
108 pr_warn("ibm,pstate-ids not found\n"); init_powernv_pstates()
112 pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz", init_powernv_pstates()
115 pr_warn("ibm,pstate-frequencies-mhz not found\n"); init_powernv_pstates()
120 pr_warn("Entries in ibm,pstate-ids and " init_powernv_pstates()
121 "ibm,pstate-frequencies-mhz does not match\n"); init_powernv_pstates()
248 * The local pstate id corresponds bits 48..55 in the PMSR. powernv_read_cpu_freq()
276 * set_pstate: Sets the pstate on this CPU.
305 * pstate in the cpufreq table
H A Dpowernow-k8.c172 pr_err("Hardware error - pending bit very stuck - no further pstate changes possible\n"); write_new_fid()
216 pr_err("internal error - pending bit very stuck - no further pstate changes possible\n"); write_new_vid()
511 pr_err(FW_BUG "0 vid exceeded with pstate %d\n", j); check_pst_table()
516 pr_err(FW_BUG "maxvid exceeded with pstate %d\n", j); check_pst_table()
520 pr_err(FW_BUG "maxfid exceeded with pstate %d\n", j); check_pst_table()
H A Dpowernow-k8.h24 /* keep track of the current fid / vid or pstate */
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dctrl.c42 nvif_ioctl(&ctrl->object, "control pstate info size %d\n", size); nvkm_control_mthd_pstate_info()
44 nvif_ioctl(&ctrl->object, "control pstate info vers %d\n", nvkm_control_mthd_pstate_info()
54 args->v0.pstate = clk->pstate; nvkm_control_mthd_pstate_info()
60 args->v0.pstate = NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN; nvkm_control_mthd_pstate_info()
74 struct nvkm_pstate *pstate; nvkm_control_mthd_pstate_attr() local
80 nvif_ioctl(&ctrl->object, "control pstate attr size %d\n", size); nvkm_control_mthd_pstate_attr()
83 "control pstate attr vers %d state %d index %d\n", nvkm_control_mthd_pstate_attr()
105 list_for_each_entry(pstate, &clk->states, head) { nvkm_control_mthd_pstate_attr()
110 lo = pstate->base.domain[domain->name]; nvkm_control_mthd_pstate_attr()
112 list_for_each_entry(cstate, &pstate->list, head) { nvkm_control_mthd_pstate_attr()
117 args->v0.state = pstate->pstate; nvkm_control_mthd_pstate_attr()
148 nvif_ioctl(&ctrl->object, "control pstate user size %d\n", size); nvkm_control_mthd_pstate_user()
151 "control pstate user vers %d ustate %d pwrsrc %d\n", nvkm_control_mthd_pstate_user()
/linux-4.4.14/arch/sparc/lib/
H A Dclear_page.S62 rdpr %pstate, %o4
63 wrpr %o4, PSTATE_IE, %pstate
68 wrpr %o4, 0x0, %pstate
H A Dcopy_page.S77 rdpr %pstate, %o2
78 wrpr %o2, PSTATE_IE, %pstate
85 wrpr %o2, 0x0, %pstate
/linux-4.4.14/drivers/gpu/drm/nouveau/
H A Dnouveau_sysfs.c31 MODULE_PARM_DESC(pstate, "enable sysfs pstate file, which will be moved in the future");
33 module_param_named(pstate, nouveau_pstate, int, 0400);
101 if (info.pstate == state) nouveau_sysfs_pstate_get()
157 static DEVICE_ATTR(pstate, S_IRUGO | S_IWUSR,
H A Dnouveau_drm.c1006 DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate); nouveau_display_options()
/linux-4.4.14/arch/sparc/mm/
H A Dultra.S59 rdpr %pstate, %g7
61 wrpr %g2, %pstate
76 wrpr %g7, 0x0, %pstate
86 rdpr %pstate, %g7
89 wrpr %g2, %pstate
108 wrpr %g7, 0x0, %pstate
136 rdpr %pstate, %g1
137 wrpr %g1, PSTATE_IE, %pstate
146 wrpr %g1, 0, %pstate
213 rdpr %pstate, %g7
215 wrpr %g2, 0x0, %pstate
231 wrpr %g7, 0x0, %pstate
235 rdpr %pstate, %g7
237 wrpr %g2, 0x0, %pstate
256 wrpr %g7, 0x0, %pstate
260 rdpr %pstate, %g7
263 wrpr %g2, 0x0, %pstate
286 wrpr %g7, 0x0, %pstate
528 661: rdpr %pstate, %g2
529 wrpr %g2, PSTATE_IG | PSTATE_AG, %pstate
H A Dinit_64.c2645 unsigned long pstate; __flush_tlb_all() local
2649 "rdpr %%pstate, %0\n\t" __flush_tlb_all()
2650 "wrpr %0, %1, %%pstate" __flush_tlb_all()
2651 : "=r" (pstate) __flush_tlb_all()
2697 __asm__ __volatile__("wrpr %0, 0, %%pstate" __flush_tlb_all()
2698 : : "r" (pstate)); __flush_tlb_all()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dboost.c81 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5; nvbios_boostEp()
89 nvbios_boostEm(struct nvkm_bios *bios, u8 pstate, nvbios_boostEm() argument
94 if (info->pstate == pstate) nvbios_boostEm()
H A Dcstep.c78 info->pstate = (nvbios_rd16(bios, data + 0x00) & 0x01e0) >> 5; nvbios_cstepEp()
85 nvbios_cstepEm(struct nvkm_bios *bios, u8 pstate, u8 *ver, u8 *hdr, nvbios_cstepEm() argument
90 if (info->pstate == pstate) nvbios_cstepEm()
H A Dperf.c99 info->pstate = nvbios_rd08(bios, perf + 0x00); nvbios_perfEp()
/linux-4.4.14/arch/sparc/prom/
H A Dcif.S7 #include <asm/pstate.h>
H A Dp1275.c17 #include <asm/pstate.h>
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Dclk.h60 u8 pstate; member in struct:nvkm_pstate
89 int pstate; /* current */ member in struct:nvkm_clk
/linux-4.4.14/arch/sparc/power/
H A Dhibernate_asm.S30 rdpr %pstate, %g2
110 wrpr %g2, %pstate
/linux-4.4.14/arch/arm64/kvm/
H A Dreset.c38 .regs.pstate = (PSR_MODE_EL1h | PSR_A_BIT | PSR_I_BIT |
43 .regs.pstate = (COMPAT_PSR_MODE_SVC | COMPAT_PSR_A_BIT |
H A Dguest.c100 if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) { set_core_reg()
H A Dhyp.S56 mrs x21, spsr_el2 // pstate before entering el2
88 msr spsr_el2, x21 // pstate on return from el2
/linux-4.4.14/arch/x86/kernel/cpu/mcheck/
H A Dtherm_throt.c157 struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu); therm_throt_process() local
162 state = &pstate->core_throttle; therm_throt_process()
164 state = &pstate->core_power_limit; therm_throt_process()
169 state = &pstate->package_throttle; therm_throt_process()
171 state = &pstate->package_power_limit; therm_throt_process()
214 struct thermal_state *pstate = &per_cpu(thermal_state, this_cpu); thresh_event_valid() local
218 state = (event == 0) ? &pstate->pkg_thresh0 : thresh_event_valid()
219 &pstate->pkg_thresh1; thresh_event_valid()
221 state = (event == 0) ? &pstate->core_thresh0 : thresh_event_valid()
222 &pstate->core_thresh1; thresh_event_valid()
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvif/
H A Dclass.h354 __s8 ustate_ac; /* out: target pstate index */
355 __s8 ustate_dc; /* out: target pstate index */
359 __s8 pstate; /* out: current pstate index */ member in struct:nvif_control_pstate_info_v0
366 __s8 state; /* in: index of pstate to query
367 * out: pstate identifier
383 __s8 ustate; /* in: pstate identifier */
/linux-4.4.14/arch/s390/include/asm/
H A Druntime_instr.h13 __u32 pstate : 1; member in struct:runtime_instr_cb
/linux-4.4.14/arch/s390/kernel/
H A Druntime_instr.c38 cb->pstate = 1; init_runtime_instr_cb()
/linux-4.4.14/arch/sparc/include/uapi/asm/
H A Dpsrcompat.h4 #include <asm/pstate.h>
H A Dptrace.h6 #include <asm/pstate.h>
/linux-4.4.14/arch/arm64/include/uapi/asm/
H A Dptrace.h72 __u64 pstate; member in struct:user_pt_regs
H A Dsigcontext.h31 __u64 pstate; member in struct:sigcontext
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/
H A Dmdp5_crtc.c208 struct mdp5_plane_state *pstate, *pstates[STAGE_MAX + 1] = {NULL}; blend_setup() local
227 pstate = to_mdp5_plane_state(plane->state); drm_atomic_crtc_for_each_plane()
228 pstates[pstate->stage] = pstate; drm_atomic_crtc_for_each_plane()
229 stage[pstate->stage] = mdp5_plane_pipe(plane); drm_atomic_crtc_for_each_plane()
393 struct drm_plane_state *pstate; drm_atomic_crtc_state_for_each_plane() local
399 pstate = state->state->plane_states[drm_plane_index(plane)]; drm_atomic_crtc_state_for_each_plane()
404 if (!pstate) drm_atomic_crtc_state_for_each_plane()
405 pstate = plane->state; drm_atomic_crtc_state_for_each_plane()
407 pstates[cnt].state = to_mdp5_plane_state(pstate); drm_atomic_crtc_state_for_each_plane()
H A Dmdp5_plane.c136 struct mdp5_plane_state *pstate; mdp5_plane_atomic_set_property() local
140 pstate = to_mdp5_plane_state(state); mdp5_plane_atomic_set_property()
144 pstate->name = (type)val; \ mdp5_plane_atomic_set_property()
164 struct mdp5_plane_state *pstate; mdp5_plane_atomic_get_property() local
168 pstate = to_mdp5_plane_state(state); mdp5_plane_atomic_get_property()
172 *val = pstate->name; \ mdp5_plane_atomic_get_property()
673 struct drm_plane_state *pstate = plane->state; mdp5_plane_mode_set() local
746 hflip = !!(pstate->rotation & BIT(DRM_REFLECT_X)); mdp5_plane_mode_set()
747 vflip = !!(pstate->rotation & BIT(DRM_REFLECT_Y)); mdp5_plane_mode_set()
/linux-4.4.14/arch/arm64/kernel/
H A Ddebug-monitors.c172 spsr = regs->pstate; set_regs_spsr_ss()
175 regs->pstate = spsr; set_regs_spsr_ss()
182 spsr = regs->pstate; clear_regs_spsr_ss()
184 regs->pstate = spsr; clear_regs_spsr_ss()
H A Dsignal.c111 __get_user_error(regs->pstate, &sf->uc.uc_mcontext.pstate, err); restore_sigframe()
181 __put_user_error(regs->pstate, &sf->uc.uc_mcontext.pstate, err); setup_sigframe()
H A Dprocess.c185 printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n", __show_regs()
186 regs->pc, lr, regs->pstate); __show_regs()
282 childregs->pstate = PSR_MODE_EL1h; copy_thread()
H A Darmv8_deprecated.c386 switch (arm_check_condition(instr, regs->pstate)) { swp_handler()
467 switch (arm_check_condition(instr, regs->pstate)) { cp15barrier_handler()
570 regs->pstate |= COMPAT_PSR_E_BIT; compat_setend_handler()
573 regs->pstate &= ~COMPAT_PSR_E_BIT; compat_setend_handler()
H A Dkgdb.c61 { "pstate", 8, offsetof(struct pt_regs, pstate)},
H A Dsignal32.c352 __get_user_error(regs->pstate, &sf->uc.uc_mcontext.arm_cpsr, err); compat_restore_sigframe()
466 compat_ulong_t spsr = regs->pstate & ~(PSR_f | COMPAT_PSR_E_BIT); compat_setup_return()
501 regs->pstate = spsr; compat_setup_return()
526 __put_user_error(regs->pstate, &sf->uc.uc_mcontext.arm_cpsr, err); compat_setup_sigframe()
H A Dsuspend.c125 * Restore pstate flags. OS lock and mdscr have been already cpu_suspend()
H A Dasm-offsets.c57 DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate)); main()
H A Dtraps.c333 (regs->pstate & hook->pstate_mask) == hook->pstate_val) call_undef_hook()
H A Dptrace.c694 reg = task_pt_regs(target)->pstate; compat_gpr_get()
762 newregs.pstate = reg; compat_gpr_set()
H A Dhead.S288 * Corrupts: phys, start, end, pstate
/linux-4.4.14/drivers/media/platform/blackfin/
H A Dppi.c212 struct pinctrl_state *pstate; ppi_set_params() local
217 pstate = pinctrl_lookup_state(pctrl, ppi_set_params()
219 if (pinctrl_select_state(pctrl, pstate)) ppi_set_params()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dgk20a.c64 *state = clk->pstate; gk20a_pmu_dvfs_get_cur_state()
76 /* For GK20A, the performance level is directly mapped to pstate */ gk20a_pmu_dvfs_get_target_state()
77 level = cur_level = clk->pstate; gk20a_pmu_dvfs_get_target_state()
/linux-4.4.14/arch/sparc/crypto/
H A Dcrc32c_glue.c20 #include <asm/pstate.h>
H A Dmd5_glue.c24 #include <asm/pstate.h>
H A Dsha1_glue.c21 #include <asm/pstate.h>
H A Dsha256_glue.c21 #include <asm/pstate.h>
H A Dsha512_glue.c20 #include <asm/pstate.h>
H A Dcamellia_glue.c16 #include <asm/pstate.h>
H A Daes_glue.c28 #include <asm/pstate.h>
H A Ddes_glue.c17 #include <asm/pstate.h>
/linux-4.4.14/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_sp.h89 unsigned long *pstate; /* pointer to state buffer */ member in struct:bnx2x_raw_obj
475 unsigned long *pstate; member in struct:bnx2x_rx_mode_ramrod_params
566 /* A state that is set in raw.pstate, when there are pending commands */
1406 unsigned long *pstate, bnx2x_obj_type type,
1413 unsigned long *pstate, bnx2x_obj_type type,
1420 unsigned long *pstate, bnx2x_obj_type type,
1460 int state, unsigned long *pstate,
1502 int state, unsigned long *pstate,
H A Dbnx2x_sp.c258 return !!test_bit(o->state, o->pstate); bnx2x_raw_check_pending()
264 clear_bit(o->state, o->pstate); bnx2x_raw_clear_pending()
271 set_bit(o->state, o->pstate); bnx2x_raw_set_pending()
284 unsigned long *pstate) bnx2x_state_wait()
296 if (!test_bit(state, pstate)) { bnx2x_state_wait()
320 return bnx2x_state_wait(bp, raw->state, raw->pstate); bnx2x_raw_wait()
2096 unsigned long *pstate, bnx2x_obj_type type) bnx2x_init_raw_obj()
2104 raw->pstate = pstate; bnx2x_init_raw_obj()
2114 int state, unsigned long *pstate, bnx2x_obj_type type, bnx2x_init_vlan_mac_common()
2132 state, pstate, type); bnx2x_init_vlan_mac_common()
2139 unsigned long *pstate, bnx2x_obj_type type, bnx2x_init_mac_obj()
2145 rdata_mapping, state, pstate, type, bnx2x_init_mac_obj()
2193 unsigned long *pstate, bnx2x_obj_type type, bnx2x_init_vlan_obj()
2199 rdata_mapping, state, pstate, type, NULL, bnx2x_init_vlan_obj()
2234 unsigned long *pstate, bnx2x_obj_type type, bnx2x_init_vlan_mac_obj()
2242 rdata_mapping, state, pstate, type, bnx2x_init_vlan_mac_obj()
2380 clear_bit(p->state, p->pstate); bnx2x_set_rx_mode_e1x()
2549 return bnx2x_state_wait(bp, p->state, p->pstate); bnx2x_wait_rx_mode_comp_e2()
2623 if (bnx2x_state_wait(bp, o->sched_state, o->raw.pstate) || bnx2x_mcast_wait()
3827 clear_bit(o->sched_state, o->raw.pstate); bnx2x_mcast_clear_sched()
3834 set_bit(o->sched_state, o->raw.pstate); bnx2x_mcast_set_sched()
3840 return !!test_bit(o->sched_state, o->raw.pstate); bnx2x_mcast_check_sched()
3852 int state, unsigned long *pstate, bnx2x_obj_type type) bnx2x_init_mcast_obj()
3857 rdata, rdata_mapping, state, pstate, type); bnx2x_init_mcast_obj()
4413 int state, unsigned long *pstate, bnx2x_init_rss_config_obj()
4417 rdata_mapping, state, pstate, type); bnx2x_init_rss_config_obj()
283 bnx2x_state_wait(struct bnx2x *bp, int state, unsigned long *pstate) bnx2x_state_wait() argument
2094 bnx2x_init_raw_obj(struct bnx2x_raw_obj *raw, u8 cl_id, u32 cid, u8 func_id, void *rdata, dma_addr_t rdata_mapping, int state, unsigned long *pstate, bnx2x_obj_type type) bnx2x_init_raw_obj() argument
2112 bnx2x_init_vlan_mac_common(struct bnx2x_vlan_mac_obj *o, u8 cl_id, u32 cid, u8 func_id, void *rdata, dma_addr_t rdata_mapping, int state, unsigned long *pstate, bnx2x_obj_type type, struct bnx2x_credit_pool_obj *macs_pool, struct bnx2x_credit_pool_obj *vlans_pool) bnx2x_init_vlan_mac_common() argument
2135 bnx2x_init_mac_obj(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *mac_obj, u8 cl_id, u32 cid, u8 func_id, void *rdata, dma_addr_t rdata_mapping, int state, unsigned long *pstate, bnx2x_obj_type type, struct bnx2x_credit_pool_obj *macs_pool) bnx2x_init_mac_obj() argument
2189 bnx2x_init_vlan_obj(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *vlan_obj, u8 cl_id, u32 cid, u8 func_id, void *rdata, dma_addr_t rdata_mapping, int state, unsigned long *pstate, bnx2x_obj_type type, struct bnx2x_credit_pool_obj *vlans_pool) bnx2x_init_vlan_obj() argument
2230 bnx2x_init_vlan_mac_obj(struct bnx2x *bp, struct bnx2x_vlan_mac_obj *vlan_mac_obj, u8 cl_id, u32 cid, u8 func_id, void *rdata, dma_addr_t rdata_mapping, int state, unsigned long *pstate, bnx2x_obj_type type, struct bnx2x_credit_pool_obj *macs_pool, struct bnx2x_credit_pool_obj *vlans_pool) bnx2x_init_vlan_mac_obj() argument
3848 bnx2x_init_mcast_obj(struct bnx2x *bp, struct bnx2x_mcast_obj *mcast_obj, u8 mcast_cl_id, u32 mcast_cid, u8 func_id, u8 engine_id, void *rdata, dma_addr_t rdata_mapping, int state, unsigned long *pstate, bnx2x_obj_type type) bnx2x_init_mcast_obj() argument
4409 bnx2x_init_rss_config_obj(struct bnx2x *bp, struct bnx2x_rss_config_obj *rss_obj, u8 cl_id, u32 cid, u8 func_id, u8 engine_id, void *rdata, dma_addr_t rdata_mapping, int state, unsigned long *pstate, bnx2x_obj_type type) bnx2x_init_rss_config_obj() argument
H A Dbnx2x_sriov.c620 ramrod->pstate = &vf->filter_state; bnx2x_vf_prep_rx_mode()
H A Dbnx2x_main.c6156 ramrod_param.pstate = &bp->sp_state; bnx2x_set_q_rx_mode()
/linux-4.4.14/drivers/gpu/drm/i915/
H A Dintel_pm.c1737 const struct intel_plane_state *pstate, ilk_compute_pri_wm()
1741 int bpp = pstate->base.fb ? pstate->base.fb->bits_per_pixel / 8 : 0; ilk_compute_pri_wm()
1744 if (!cstate->base.active || !pstate->visible) ilk_compute_pri_wm()
1754 drm_rect_width(&pstate->dst), ilk_compute_pri_wm()
1766 const struct intel_plane_state *pstate, ilk_compute_spr_wm()
1769 int bpp = pstate->base.fb ? pstate->base.fb->bits_per_pixel / 8 : 0; ilk_compute_spr_wm()
1772 if (!cstate->base.active || !pstate->visible) ilk_compute_spr_wm()
1778 drm_rect_width(&pstate->dst), ilk_compute_spr_wm()
1789 const struct intel_plane_state *pstate, ilk_compute_cur_wm()
1792 int bpp = pstate->base.fb ? pstate->base.fb->bits_per_pixel / 8 : 0; ilk_compute_cur_wm()
1794 if (!cstate->base.active || !pstate->visible) ilk_compute_cur_wm()
1799 drm_rect_width(&pstate->dst), ilk_compute_cur_wm()
1806 const struct intel_plane_state *pstate, ilk_compute_fbc_wm()
1809 int bpp = pstate->base.fb ? pstate->base.fb->bits_per_pixel / 8 : 0; ilk_compute_fbc_wm()
1811 if (!cstate->base.active || !pstate->visible) ilk_compute_fbc_wm()
1814 return ilk_wm_fbc(pri_val, drm_rect_width(&pstate->dst), bpp); ilk_compute_fbc_wm()
1997 struct intel_plane_state *pstate = ilk_compute_wm_level() local
2002 result->pri_val = ilk_compute_pri_wm(cstate, pstate, ilk_compute_wm_level()
2005 result->fbc_val = ilk_compute_fbc_wm(cstate, pstate, ilk_compute_wm_level()
2009 result->spr_val = ilk_compute_spr_wm(cstate, pstate, ilk_compute_wm_level()
2013 result->cur_val = ilk_compute_cur_wm(cstate, pstate, ilk_compute_wm_level()
1736 ilk_compute_pri_wm(const struct intel_crtc_state *cstate, const struct intel_plane_state *pstate, uint32_t mem_value, bool is_lp) ilk_compute_pri_wm() argument
1765 ilk_compute_spr_wm(const struct intel_crtc_state *cstate, const struct intel_plane_state *pstate, uint32_t mem_value) ilk_compute_spr_wm() argument
1788 ilk_compute_cur_wm(const struct intel_crtc_state *cstate, const struct intel_plane_state *pstate, uint32_t mem_value) ilk_compute_cur_wm() argument
1805 ilk_compute_fbc_wm(const struct intel_crtc_state *cstate, const struct intel_plane_state *pstate, uint32_t pri_val) ilk_compute_fbc_wm() argument
/linux-4.4.14/tools/perf/util/
H A Dsvghelper.c130 fprintf(svgfile, " rect.pstate { fill:rgb(128,128,128); fill-opacity:0.8; stroke-width:0; } \n"); open_svg()
137 fprintf(svgfile, " line.pstate { stroke:rgb(255,255, 0); stroke-opacity:0.8; stroke-width:2; } \n"); open_svg()
486 fprintf(svgfile, "<line x1=\"%.8f\" x2=\"%.8f\" y1=\"%.1f\" y2=\"%.1f\" class=\"pstate\"/>\n", svg_pstate()
/linux-4.4.14/drivers/media/platform/sti/c8sectpfe/
H A Dc8sectpfe-core.c533 tsin->pstate = pinctrl_lookup_state(fei->pinctrl, tsin_pin_name); configure_memdma_and_inputblock()
534 if (IS_ERR(tsin->pstate)) { configure_memdma_and_inputblock()
537 ret = PTR_ERR(tsin->pstate); configure_memdma_and_inputblock()
541 ret = pinctrl_select_state(fei->pinctrl, tsin->pstate); configure_memdma_and_inputblock()
H A Dc8sectpfe-core.h39 struct pinctrl_state *pstate; member in struct:channel_info
/linux-4.4.14/drivers/net/ethernet/dec/tulip/
H A Dtulip_core.c1837 pci_power_t pstate; tulip_suspend() local
1856 pstate = pci_choose_state(pdev, state); tulip_suspend()
1857 if (state.event == PM_EVENT_SUSPEND && pstate != PCI_D0) { tulip_suspend()
1861 rc = pci_enable_wake(pdev, pstate, tp->wolinfo.wolopts); tulip_suspend()
1865 pci_set_power_state(pdev, pstate); tulip_suspend()
/linux-4.4.14/drivers/staging/lustre/lustre/obdclass/
H A Dcl_object.c432 static const char *pstate[] = { cl_site_stats_print() local
458 seq_printf(m, "%s: %u ", pstate[i], cl_site_stats_print()
/linux-4.4.14/drivers/scsi/qla2xxx/
H A Dqla_attr.c1445 uint32_t pstate; qla2x00_fw_state_show() local
1448 pstate = qlafx00_fw_state_show(dev, attr, buf); qla2x00_fw_state_show()
1449 return scnprintf(buf, PAGE_SIZE, "0x%x\n", pstate); qla2x00_fw_state_show()
/linux-4.4.14/arch/arm64/mm/
H A Dfault.c282 if (IS_ENABLED(CONFIG_ARM64_PAN) && (regs->pstate & PSR_PAN_BIT)) do_page_fault()
/linux-4.4.14/drivers/staging/rdma/hfi1/
H A Dchip.c6262 u32 pstate, previous_state; goto_offline() local
6271 pstate = read_physical_state(dd); goto_offline()
6272 if (pstate == PLS_OFFLINE) { goto_offline()
6275 } else if ((pstate & 0xff) == PLS_OFFLINE) { goto_offline()
8494 const char *opa_pstate_name(u32 pstate) opa_pstate_name() argument
8510 if (pstate < ARRAY_SIZE(port_physical_names)) opa_pstate_name()
8511 return port_physical_names[pstate]; opa_pstate_name()
8586 u32 pstate; hfi1_ibphys_portstate() local
8589 pstate = read_physical_state(ppd->dd); hfi1_ibphys_portstate()
8590 ib_pstate = chip_to_opa_pstate(ppd->dd, pstate); hfi1_ibphys_portstate()
8595 pstate); hfi1_ibphys_portstate()
H A Dchip.h673 const char *opa_pstate_name(u32 pstate);
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dr600_dpm.c1125 rdev->pm.dpm.vce_states[i].pstate = r600_parse_extended_power_table()
H A Dradeon.h1545 u8 pstate; member in struct:radeon_vce_state
H A Datombios.h5209 ulNbpStateMemclkFreq[4]: system memory clock frequncey in unit of 10Khz in different NB pstate.
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_dpm.c566 adev->pm.dpm.vce_states[i].pstate = amdgpu_parse_extended_power_table()
H A Damdgpu.h1569 u8 pstate; member in struct:amdgpu_vce_state
/linux-4.4.14/drivers/gpu/drm/amd/include/
H A Datombios.h5473 ulNbpStateMemclkFreq[4]: system memory clock frequncey in unit of 10Khz in different NB pstate.

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