Searched refs:hsync_end (Results 1 - 80 of 80) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/panel/
H A Dpanel-simple.c376 .hsync_end = 800 + 0 + 255,
401 .hsync_end = 1024 + 156 + 8,
424 .hsync_end = 1280 + 119 + 32,
447 .hsync_end = 1366 + 20 + 70,
471 .hsync_end = 1366 + 40 + 40,
494 .hsync_end = 1366 + 48 + 32,
517 .hsync_end = 1920 + 172 + 80,
545 .hsync_end = 1024 + 160 + 4,
573 .hsync_end = 1366 + 58 + 58,
596 .hsync_end = 1366 + 48 + 32,
619 .hsync_end = 640 + 16 + 30,
643 .hsync_end = 800 + 40 + 128,
667 .hsync_end = 800 + 168 + 64,
691 .hsync_end = 480 + 5 + 1,
768 .hsync_end = 800 + 85 + 86,
791 .hsync_end = 480 + 2 + 41,
816 .hsync_end = 1280 + 64 + 32,
839 .hsync_end = 1366 + 136 + 30,
863 .hsync_end = 1366 + 16 + 34,
886 .hsync_end = 1024 + 128 + 64,
909 .hsync_end = 800 + 88 + 80,
933 .hsync_end = 2560 + 48 + 32,
956 .hsync_end = 480 + 2 + 41,
1010 .hsync_end = 480 + 10 + 10,
1034 .hsync_end = 1024 + 24 + 136,
1057 .hsync_end = 1366 + 64 + 48,
1080 .hsync_end = 800 + 1 + 64,
1242 .hsync_end = 1200 + 62 + 4,
1270 .hsync_end = 800 + 32 + 1,
1298 .hsync_end = 720 + 12 + 4,
1326 .hsync_end = 1920 + 154 + 16,
H A Dpanel-lg-lg4573.c203 .hsync_end = 480 + 10 + 59,
H A Dpanel-sharp-lq101r1sx01.c280 .hsync_end = 2560 + 128 + 64,
/linux-4.4.14/drivers/gpu/drm/gma500/
H A Dmdfld_tpo_vid.c47 mode->hsync_end = mode->hsync_start + tpo_vid_get_config_mode()
65 dev_dbg(dev->dev, "HSE is %d\n", mode->hsync_end); tpo_vid_get_config_mode()
75 mode->hsync_end = 876; tpo_vid_get_config_mode()
H A Dmdfld_tmd_vid.c50 mode->hsync_end = mode->hsync_start + \ tmd_vid_get_config_mode()
68 dev_dbg(dev->dev, "HSE is %d\n", mode->hsync_end); tmd_vid_get_config_mode()
78 mode->hsync_end = 490; tmd_vid_get_config_mode()
H A Dintel_bios.c166 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + fill_detail_timing_data()
193 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) fill_detail_timing_data()
194 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; fill_detail_timing_data()
H A Doaktrail_lvds.c243 mode->hsync_end = mode->hsync_start + \ oaktrail_lvds_get_configuration_mode()
261 printk(KERN_INFO "HSE is %d\n", mode->hsync_end); oaktrail_lvds_get_configuration_mode()
H A Dmdfld_dsi_dpi.c437 pclk_hsync = mode->hsync_end - mode->hsync_start; mdfld_dsi_dpi_timing_calculation()
438 pclk_hbp = mode->htotal - mode->hsync_end; mdfld_dsi_dpi_timing_calculation()
698 adjusted_mode->hsync_end = fixed_mode->hsync_end; mdfld_dsi_dpi_mode_fixup()
800 ((mode->hsync_end - 1) << 16) | (mode->hsync_start - 1)); mdfld_set_pipe_timing()
H A Dcdv_intel_lvds.c302 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end; cdv_intel_lvds_mode_fixup()
H A Dpsb_intel_lvds.c418 adjusted_mode->hsync_end = panel_fixed_mode->hsync_end; psb_intel_lvds_mode_fixup()
H A Dtc35876x-dsi-lvds.c591 mode->hsync_end = 1400; tc35876x_get_config_mode()
601 dev_info(&dev->pdev->dev, "HSE = %d\n", mode->hsync_end); tc35876x_get_config_mode()
H A Dpsb_intel_display.c419 mode->hsync_end = ((hsync & 0xffff0000) >> 16) + 1; psb_intel_crtc_mode_get()
H A Dcdv_intel_dp.c880 adjusted_mode->hsync_end = fixed_mode->hsync_end; cdv_intel_fixed_panel_mode()
H A Dpsb_intel_sdvo.c777 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width; psb_intel_sdvo_get_mode_from_dtd()
778 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; psb_intel_sdvo_get_mode_from_dtd()
H A Dcdv_intel_display.c963 mode->hsync_end = ((hsync & 0xffff0000) >> 16) + 1; cdv_intel_crtc_mode_get()
H A Dmdfld_intel_display.c714 adjusted_mode->hsync_end); mdfld_crtc_mode_set()
/linux-4.4.14/drivers/media/platform/xilinx/
H A Dxilinx-vtc.h27 unsigned int hsync_end; member in struct:xvtc_config
H A Dxilinx-vtc.c212 (config->hsync_end << XVTC_HSYNC_END_SHIFT) | xvtc_generator_start()
H A Dxilinx-tpg.c205 config.hsync_end = htotal - 1; xtpg_s_stream()
/linux-4.4.14/drivers/gpu/drm/omapdrm/
H A Domap_connector.c53 mode->hsync_end = mode->hsync_start + timings->hsw; copy_timings_omap_to_drm()
54 mode->htotal = mode->hsync_end + timings->hbp; copy_timings_omap_to_drm()
84 timings->hsw = mode->hsync_end - mode->hsync_start; copy_timings_drm_to_omap()
85 timings->hbp = mode->htotal - mode->hsync_end; copy_timings_drm_to_omap()
248 mode->hsync_end, mode->htotal, omap_connector_mode_valid()
H A Domap_crtc.c384 mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, omap_crtc_mode_set_nofb()
/linux-4.4.14/drivers/gpu/drm/
H A Ddrm_modes.c56 mode->hsync_end, mode->htotal, drm_mode_debug_printmodeline()
283 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; drm_cvt_mode()
284 drm_mode->hsync_start = drm_mode->hsync_end - drm_cvt_mode()
318 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; drm_cvt_mode()
319 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; drm_cvt_mode()
510 drm_mode->hsync_end = drm_mode->hsync_start + hsync; drm_gtf_mode_complex()
589 dmode->hsync_end = dmode->hsync_start + vm->hsync_len; drm_display_mode_from_videomode()
590 dmode->htotal = dmode->hsync_end + vm->hback_porch; drm_display_mode_from_videomode()
630 vm->hsync_len = dmode->hsync_end - dmode->hsync_start; drm_display_mode_to_videomode()
631 vm->hback_porch = dmode->htotal - dmode->hsync_end; drm_display_mode_to_videomode()
793 p->crtc_hsync_end = p->hsync_end; drm_mode_set_crtcinfo()
944 mode1->hsync_end == mode2->hsync_end && drm_mode_equal_no_clocks_no_stereo()
978 mode->hsync_end < mode->hsync_start || drm_mode_validate_basic()
979 mode->htotal < mode->hsync_end) drm_mode_validate_basic()
1421 in->hsync_end > USHRT_MAX || in->htotal > USHRT_MAX || drm_mode_convert_to_umode()
1430 out->hsync_end = in->hsync_end; drm_mode_convert_to_umode()
1472 out->hsync_end = in->hsync_end; drm_mode_convert_umode()
H A Ddrm_edid.c1504 (mode->hsync_end - mode->hdisplay == 80) && mode_is_rb()
1505 (mode->hsync_end - mode->hsync_start == 32) && mode_is_rb()
1766 mode->hsync_end = mode->hsync_end - 1; drm_mode_std()
1921 mode->hsync_end = mode->hsync_start + hsync_pulse_width; drm_mode_detailed()
1930 if (mode->hsync_end > mode->htotal) drm_mode_detailed()
1931 mode->htotal = mode->hsync_end + 1; drm_mode_detailed()
2092 mode->hsync_end--; fixup_mode_1366x768()
/linux-4.4.14/drivers/gpu/drm/i915/
H A Dintel_tv.c357 int hsync_end, hblank_start, hblank_end, htotal; member in struct:tv_mode
425 .hsync_end = 64, .hblank_end = 124,
467 .hsync_end = 64, .hblank_end = 124,
510 .hsync_end = 64, .hblank_end = 124,
553 .hsync_end = 64, .hblank_end = 124,
596 .hsync_end = 64, .hblank_end = 128,
641 .hsync_end = 64, .hblank_end = 142,
683 .hsync_end = 64, .hblank_end = 122,
707 .hsync_end = 64, .hblank_end = 139,
731 .hsync_end = 80, .hblank_end = 300,
755 .hsync_end = 80, .hblank_end = 300,
780 .hsync_end = 88, .hblank_end = 235,
806 .hsync_end = 88, .hblank_end = 235,
950 hctl1 = (tv_mode->hsync_end << TV_HSYNC_END_SHIFT) | set_tv_mode_timings()
1158 .hsync_end = 1496,
1426 mode_ptr->hsync_end = hactive_s + 64; intel_tv_get_modes()
1427 if (mode_ptr->hsync_end <= mode_ptr->hsync_start) intel_tv_get_modes()
1428 mode_ptr->hsync_end = mode_ptr->hsync_start + 1; intel_tv_get_modes()
H A Dintel_dsi_pll.c94 hsync = mode->hsync_end - mode->hsync_start; dsi_rr_formula()
95 hbp = mode->htotal - mode->hsync_end; dsi_rr_formula()
H A Dintel_bios.c94 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start + fill_detail_timing_data()
121 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal) fill_detail_timing_data()
122 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1; fill_detail_timing_data()
H A Dintel_panel.c79 scan->hsync_end == fixed_mode->hsync_end && intel_find_panel_downclock()
H A Dintel_sdvo.c831 h_sync_len = mode->hsync_end - mode->hsync_start; intel_sdvo_get_dtd_from_mode()
880 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width; intel_sdvo_get_mode_from_dtd()
881 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4; intel_sdvo_get_mode_from_dtd()
H A Di915_debugfs.c2794 mode->hsync_end, mode->htotal, intel_seq_print_mode()
H A Dintel_display.c7812 mode->hsync_end = pipe_config->base.adjusted_mode.crtc_hsync_end; intel_mode_from_pipe_config()
10707 mode->hsync_end = ((hsync & 0xffff0000) >> 16) + 1; intel_crtc_mode_get()
/linux-4.4.14/drivers/gpu/drm/fsl-dcu/
H A Dfsl_dcu_drm_crtc.c96 hbp = mode->htotal - mode->hsync_end; fsl_dcu_drm_crtc_mode_set_nofb()
98 hsw = mode->hsync_end - mode->hsync_start; fsl_dcu_drm_crtc_mode_set_nofb()
/linux-4.4.14/drivers/gpu/drm/sti/
H A Dsti_vtg.c167 tmp = (mode->hsync_end - mode->hsync_start + HDMI_DELAY) << 16; vtg_set_mode()
182 tmp = (mode->hsync_end - mode->hsync_start) << 16; vtg_set_mode()
193 tmp = (mode->hsync_end - mode->hsync_start + AWG_DELAY_HD) << 16; vtg_set_mode()
208 tmp = (mode->hsync_end - mode->hsync_start) << 16; vtg_set_mode()
H A Dsti_crtc.c79 mode->hsync_start, mode->hsync_end, sti_crtc_mode_set()
/linux-4.4.14/drivers/gpu/drm/msm/edp/
H A Dedp_bridge.c67 mode->hsync_end, mode->htotal, edp_bridge_mode_set()
H A Dedp_ctrl.c1310 mode->hsync_end - mode->hsync_start); msm_edp_ctrl_timing_cfg()
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp4/
H A Dmdp4_dtv_encoder.c120 mode->hsync_end, mode->htotal, mdp4_dtv_encoder_mode_set()
147 MDP4_DTV_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) | mdp4_dtv_encoder_mode_set()
H A Dmdp4_lcdc_encoder.c286 mode->hsync_end, mode->htotal, mdp4_lcdc_encoder_mode_set()
313 MDP4_LCDC_HSYNC_CTRL_PULSEW(mode->hsync_end - mode->hsync_start) | mdp4_lcdc_encoder_mode_set()
H A Dmdp4_crtc.c263 mode->hsync_end, mode->htotal, mdp4_crtc_mode_set_nofb()
/linux-4.4.14/include/drm/
H A Ddrm_modes.h85 .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \
113 int hsync_end; member in struct:drm_display_mode
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_encoders.c156 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; amdgpu_panel_mode_fixup()
167 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; amdgpu_panel_mode_fixup()
H A Datombios_encoders.c1942 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + amdgpu_atombios_encoder_get_lcd_info()
/linux-4.4.14/drivers/gpu/drm/tilcdc/
H A Dtilcdc_crtc.c231 adjusted_mode->hskew = mode->hsync_end - mode->hsync_start; tilcdc_crtc_mode_fixup()
302 hbp = mode->htotal - mode->hsync_end; tilcdc_crtc_mode_set()
304 hsw = mode->hsync_end - mode->hsync_start; tilcdc_crtc_mode_set()
491 hbp = mode->htotal - mode->hsync_end; tilcdc_crtc_mode_valid()
493 hsw = mode->hsync_end - mode->hsync_start; tilcdc_crtc_mode_valid()
/linux-4.4.14/drivers/gpu/drm/shmobile/
H A Dshmob_drm_crtc.c112 value = (((mode->hsync_end - mode->hsync_start) / 8) << 16) /* HSYNW */ shmob_drm_crtc_setup_geometry()
117 | (((mode->hsync_end - mode->hsync_start) & 7) << 8) shmob_drm_crtc_setup_geometry()
661 mode->hsync_end = sdev->pdata->panel.mode.hsync_end; shmob_drm_connector_get_modes()
/linux-4.4.14/drivers/video/fbdev/intelfb/
H A Dintelfbhw.c1050 u32 hsync_start, hsync_end, hblank_start, hblank_end, htotal, hactive; intelfbhw_mode_to_hw() local
1178 hsync_end = hsync_start + var->hsync_len; intelfbhw_mode_to_hw()
1179 htotal = hsync_end + var->left_margin; intelfbhw_mode_to_hw()
1184 hactive, hsync_start, hsync_end, htotal, hblank_start, intelfbhw_mode_to_hw()
1207 hsync_end--; intelfbhw_mode_to_hw()
1208 if (check_overflow(hsync_end, HSYNCEND_MASK, "CRTC hsync_end")) intelfbhw_mode_to_hw()
1242 *hs = (hsync_start << HSYNCSTART_SHIFT) | (hsync_end << HSYNCEND_SHIFT); intelfbhw_mode_to_hw()
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dradeon_encoders.c330 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start; radeon_panel_mode_fixup()
343 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width; radeon_panel_mode_fixup()
H A Dradeon_combios.c1267 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + radeon_combios_get_lvds_info()
H A Dradeon_atombios.c1659 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + radeon_atombios_get_lvds_info()
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/
H A Dmdp5_encoder.c143 mode->hsync_end, mode->htotal, mdp5_encoder_mode_set()
204 MDP5_INTF_HSYNC_CTL_PULSEW(mode->hsync_end - mode->hsync_start) | mdp5_encoder_mode_set()
H A Dmdp5_cmd_encoder.c210 mode->hsync_end, mode->htotal, mdp5_cmd_encoder_mode_set()
H A Dmdp5_crtc.c313 mode->hsync_end, mode->htotal, mdp5_crtc_mode_set_nofb()
/linux-4.4.14/drivers/gpu/drm/vc4/
H A Dvc4_hdmi.c318 VC4_SET_FIELD(mode->htotal - mode->hsync_end, vc4_hdmi_encoder_mode_set()
320 VC4_SET_FIELD(mode->hsync_end - mode->hsync_start, vc4_hdmi_encoder_mode_set()
H A Dvc4_regs.h405 /* Horizontal pack porch (htotal - hsync_end). */
408 /* Horizontal sync pulse (hsync_end - hsync_start). */
H A Dvc4_crtc.c205 VC4_SET_FIELD(mode->htotal - mode->hsync_end, vc4_crtc_mode_set_nofb()
207 VC4_SET_FIELD(mode->hsync_end - mode->hsync_start, vc4_crtc_mode_set_nofb()
/linux-4.4.14/drivers/gpu/drm/atmel-hlcdc/
H A Datmel_hlcdc_dc.c353 int hback_porch = mode->htotal - mode->hsync_end; atmel_hlcdc_dc_mode_valid()
354 int hsync_len = mode->hsync_end - mode->hsync_start; atmel_hlcdc_dc_mode_valid()
/linux-4.4.14/drivers/video/fbdev/
H A Dgbefb.c529 timing->hsync_end = timing->hsync_start + var->hsync_len; compute_gbe_timing()
565 SET_GBE_FIELD(VT_HSYNC, HSYNC_OFF, val, timing->hsync_end); gbe_set_timing_info()
992 var->left_margin = timing.htotal - timing.hsync_end; gbefb_check_var()
996 var->hsync_len = timing.hsync_end - timing.hsync_start; gbefb_check_var()
H A Dneofb.c258 int hsync_end = var->xres + var->right_margin + var->hsync_len; vgaHWInit() local
259 int htotal = (hsync_end + var->left_margin) >> 3; vgaHWInit()
290 | (((hsync_end >> 3)) & 0x1F); vgaHWInit()
/linux-4.4.14/include/video/
H A Dgbe.h297 short hsync_end; /* Horizontal sync end */ member in struct:gbe_timing_info
/linux-4.4.14/drivers/gpu/drm/tegra/
H A Dsor.c1155 hsw = mode->hsync_end - mode->hsync_start;
1156 hbp = mode->htotal - mode->hsync_end;
1541 hse = mode->hsync_end - mode->hsync_start - 1; tegra_sor_edp_enable()
1929 pulse_start = h_ref_to_sync + (mode->hsync_end - mode->hsync_start) + tegra_sor_hdmi_enable()
1930 (mode->htotal - mode->hsync_end) - 10; tegra_sor_hdmi_enable()
2097 hse = mode->hsync_end - mode->hsync_start - 1; tegra_sor_hdmi_enable()
2104 hbe = hse + (mode->htotal - mode->hsync_end); tegra_sor_hdmi_enable()
H A Ddsi.c562 hsw = (mode->hsync_end - mode->hsync_start) * mul / div; tegra_dsi_configure()
565 hbp = (mode->htotal - mode->hsync_end) * mul / div; tegra_dsi_configure()
H A Dhdmi.c850 h_sync_width = mode->hsync_end - mode->hsync_start; tegra_hdmi_encoder_enable()
851 h_back_porch = mode->htotal - mode->hsync_end; tegra_hdmi_encoder_enable()
H A Ddc.c1077 ((mode->hsync_end - mode->hsync_start) << 0); tegra_dc_set_timings()
1081 ((mode->htotal - mode->hsync_end) << 0); tegra_dc_set_timings()
/linux-4.4.14/drivers/gpu/drm/msm/dsi/
H A Ddsi_manager.c215 mode->hsync_end >>= 1; dsi_dual_connector_fix_modes()
496 mode->hsync_end, mode->htotal, dsi_mgr_bridge_mode_set()
H A Ddsi_host.c716 u32 hs_end = mode->hsync_end - mode->hsync_start; dsi_timing_setup()
/linux-4.4.14/drivers/gpu/drm/nouveau/dispnv04/
H A Dtvnv17.c275 mode->hsync_end = mode->hsync_start + 8; nv17_tv_get_hd_modes()
537 regs->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1; nv17_tv_mode_set()
H A Ddfp.c308 regp->fp_horiz_regs[FP_SYNC_END] = output_mode->hsync_end - 1; nv04_dfp_mode_set()
/linux-4.4.14/drivers/video/fbdev/vermilion/
H A Dvermilion.c781 u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end; vmlfb_set_par_locked() local
799 hsync_end = hsync_start + var->hsync_len; vmlfb_set_par_locked()
847 ((hsync_end - 1) << 16) | (hsync_start - 1)); vmlfb_set_par_locked()
/linux-4.4.14/drivers/gpu/drm/rcar-du/
H A Drcar_du_crtc.c160 rcar_du_crtc_write(rcrtc, HSWR, mode->hsync_end - rcar_du_crtc_set_display_timing()
/linux-4.4.14/drivers/gpu/drm/cirrus/
H A Dcirrus_mode.c206 hsyncend = mode->hsync_end / 8; cirrus_crtc_mode_set()
/linux-4.4.14/drivers/gpu/drm/i2c/
H A Dch7006_mode.c114 .hsync_end = e_hd + 80, \
H A Dtda998x_drv.c925 hs_pix_e = mode->hsync_end - mode->hdisplay; tda998x_encoder_mode_set()
/linux-4.4.14/include/uapi/drm/
H A Ddrm_mode.h110 __u16 hsync_end; member in struct:drm_mode_modeinfo
/linux-4.4.14/drivers/gpu/drm/mgag200/
H A Dmgag200_mode.c1012 hsyncend = mode->hsync_end / 8 - 1; mga_crtc_mode_set()
1637 (mode->hsync_end % 8) != 0 || (mode->htotal % 8) != 0) { mga_vga_mode_valid()
/linux-4.4.14/drivers/gpu/drm/exynos/
H A Dexynos_drm_dsi.c1683 vm->hback_porch = m->htotal - m->hsync_end; exynos_dsi_mode_set()
1684 vm->hsync_len = m->hsync_end - m->hsync_start; exynos_dsi_mode_set()
H A Dexynos_hdmi.c1312 val |= ((m->hsync_end - m->hdisplay - 2) << 10); hdmi_v13_mode_apply()
1471 m->hsync_end - m->hdisplay - 2); hdmi_v14_mode_apply()
/linux-4.4.14/drivers/video/fbdev/omap2/dss/
H A Ddsi.c3718 bool hsync_end; dsi_proto_timings() local
3723 hsync_end = dsi->vm_timings.trans_mode == OMAP_DSS_DSI_PULSE_MODE; dsi_proto_timings()
3724 t_he = hsync_end ? dsi_proto_timings()
3730 tl = DIV_ROUND_UP(4, ndl) + (hsync_end ? hsa : 0) + t_he + hfp + dsi_proto_timings()
3734 hfp, hsync_end ? hsa : 0, tl); dsi_proto_timings()
3741 r = FLD_MOD(r, hsync_end ? hsa : 0, 31, 24); /* HSA */ dsi_proto_timings()
/linux-4.4.14/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_kms.c1515 mode->hsync_end = mode->hsync_start + 50; vmw_guess_mode_timing()
1516 mode->htotal = mode->hsync_end + 50; vmw_guess_mode_timing()
/linux-4.4.14/drivers/gpu/drm/nouveau/
H A Dnv50_display.c1147 hsynce = mode->hsync_end - mode->hsync_start - 1; nv50_crtc_mode_set()
1148 hbackp = mode->htotal - mode->hsync_end; nv50_crtc_mode_set()
H A Dnouveau_bios.c473 mode->hsync_end = ROM16(mode_entry[19]) + 1; nouveau_bios_fp_mode()
/linux-4.4.14/drivers/gpu/drm/rockchip/
H A Drockchip_drm_vop.c1169 u16 hsync_len = adjusted_mode->hsync_end - adjusted_mode->hsync_start; vop_crtc_mode_set()
/linux-4.4.14/drivers/gpu/drm/bridge/
H A Ddw_hdmi.c1087 hsync_len = mode->hsync_end - mode->hsync_start; hdmi_av_composer()

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