| /linux-4.4.14/arch/mips/rb532/ |
| H A D | prom.c | 37 #include <asm/mach-rc32434/ddr.h>
45 .name = "ddr-reg",
124 struct ddr_ram __iomem *ddr; prom_init() local
128 ddr = ioremap_nocache(ddr_reg[0].start, prom_init()
131 if (!ddr) { prom_init()
136 ddrbase = (phys_addr_t)&ddr->ddrbase; prom_init()
137 memsize = (phys_addr_t)&ddr->ddrmask; prom_init()
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| /linux-4.4.14/drivers/memory/ |
| H A D | of_memory.c | 21 * of_get_min_tck() - extract min timing values for ddr
22 * @np: pointer to ddr device tree node
94 * of_get_ddr_timings() - extracts the ddr timings and updates no of
96 * @np_ddr: Pointer to ddr device tree node
97 * @dev: Device requesting for ddr timings
98 * @device_type: Type of ddr(LPDDR2 S2/S4)
99 * @nr_frequencies: No of frequencies available for ddr
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| H A D | emif.c | 56 * @np_ddr: Pointer to ddr device tree node
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| /linux-4.4.14/arch/blackfin/mach-bf609/ |
| H A D | dpm.S | 11 /* switch stack to L1 scratch, prepare for ddr srfr */
91 /* should put ddr to self refresh mode before sleep */
117 /* turn ddr out of self refresh mode */
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| /linux-4.4.14/sound/soc/intel/atom/sst/ |
| H A D | sst_pci.c | 61 ctx->ddr = pcim_iomap(pci, 0, sst_platform_get_resources()
63 if (!ctx->ddr) { sst_platform_get_resources()
67 dev_dbg(ctx->dev, "sst: DDR Ptr %p\n", ctx->ddr); sst_platform_get_resources()
69 ctx->ddr = NULL; sst_platform_get_resources()
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| H A D | sst.c | 478 fw_save->ddr = kzalloc(ctx->ddr_end - ctx->ddr_base, GFP_KERNEL); intel_sst_suspend()
479 if (!fw_save->ddr) { intel_sst_suspend()
481 goto ddr; intel_sst_suspend()
487 memcpy32_fromio(fw_save->ddr, ctx->ddr, ctx->ddr_end - ctx->ddr_base); intel_sst_suspend()
492 ddr: intel_sst_suspend()
523 memcpy32_toio(ctx->ddr, fw_save->ddr, ctx->ddr_end - ctx->ddr_base); intel_sst_resume()
528 kfree(fw_save->ddr); intel_sst_resume()
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| H A D | sst_acpi.c | 213 ctx->ddr = devm_ioremap_nocache(ctx->dev, ctx->ddr_base, sst_platform_get_resources()
215 if (!ctx->ddr) { sst_platform_get_resources()
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| H A D | sst.h | 344 void *ddr; member in struct:sst_fw_save
387 void __iomem *ddr; member in struct:intel_sst_drv
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| H A D | sst_loader.c | 208 ram_iomem = sst_drv_ctx->ddr; sst_parse_module_memcpy()
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| /linux-4.4.14/drivers/media/pci/cx18/ |
| H A D | cx18-cards.c | 88 .ddr = {
135 .ddr = {
182 .ddr = {
235 .ddr = {
288 .ddr = {
348 .ddr = {
404 .ddr = {
453 .ddr = {
501 .ddr = {
554 .ddr = {
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| H A D | cx18-firmware.c | 338 cx18_write_reg(cx, cx->card->ddr.chip_config, CX18_DDR_CHIP_CONFIG); cx18_init_memory()
342 cx18_write_reg(cx, cx->card->ddr.refresh, CX18_DDR_REFRESH); cx18_init_memory()
343 cx18_write_reg(cx, cx->card->ddr.timing1, CX18_DDR_TIMING1); cx18_init_memory()
344 cx18_write_reg(cx, cx->card->ddr.timing2, CX18_DDR_TIMING2); cx18_init_memory()
349 cx18_write_reg(cx, cx->card->ddr.tune_lane, CX18_DDR_TUNE_LANE); cx18_init_memory()
350 cx18_write_reg(cx, cx->card->ddr.initial_emrs, CX18_DDR_INITIAL_EMRS); cx18_init_memory()
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| H A D | cx18-cards.h | 149 struct cx18_ddr ddr; member in struct:cx18_card
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| /linux-4.4.14/arch/mips/ath79/ |
| H A D | irq.c | 324 node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells"); ar79_cpu_intc_of_init()
331 node, "qca,ddr-wb-channel-interrupts", i, &irq); ar79_cpu_intc_of_init()
336 node, "qca,ddr-wb-channels", ar79_cpu_intc_of_init()
337 "#qca,ddr-wb-channel-cells", ar79_cpu_intc_of_init()
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| H A D | clock.c | 83 clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate); ar71xx_clocks_init()
119 clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate); ar724x_clocks_init()
152 clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate); ar913x_clocks_init()
214 clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate); ar933x_clocks_init()
348 clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate); ar934x_clocks_init()
435 clks[1] = ath79_add_sys_clkdev("ddr", ddr_rate); qca955x_clocks_init()
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| H A D | setup.c | 241 ddr_clk_rate = ath79_get_sys_clk_rate("ddr"); plat_time_init()
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| /linux-4.4.14/arch/mips/include/asm/mach-loongson64/ |
| H A D | pci.h | 26 * window0: cpu [0, 256M] -> ddr [0, 256M]
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| /linux-4.4.14/arch/arm/mach-rockchip/ |
| H A D | sleep.S | 23 * ddr to sram for system resumeing.
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| /linux-4.4.14/arch/arm/mach-imx/ |
| H A D | mmdc.c | 43 /* Get ddr type */ imx_mmdc_probe()
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| /linux-4.4.14/arch/mips/bcm47xx/ |
| H A D | prom.c | 93 /* Ignoring the last page when ddr size is 128M. Cached prom_init_mem()
95 * using address above 128M stepping out of the ddr address prom_init_mem()
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| /linux-4.4.14/drivers/clk/mvebu/ |
| H A D | armada-370.c | 168 { "ddr", NULL, 28, CLK_IGNORE_UNUSED },
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| H A D | kirkwood.c | 55 * SAR0[4:2] : Kirkwood 6180 cpu/l2/ddr clock configuration (6180 only)
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| /linux-4.4.14/drivers/edac/ |
| H A D | highbank_mc_edac.c | 150 { .compatible = "calxeda,hb-ddr-ctrl", .data = &hb_settings },
151 { .compatible = "calxeda,ecx-2000-ddr-ctrl", .data = &mw_settings },
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| H A D | synopsys_edac.c | 146 * @base: Pointer to the base address of the ddr memory controller
259 * @base: Pointer to the ddr memory controller base address
290 * @base: Pointer to the ddr memory controller base address
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| H A D | ppc4xx_edac.c | 89 * - IBM DDR1 (440GP, 440GX, 440EP and 440GR) "ibm,sdram-4xx-ddr"
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| H A D | amd64_edac.c | 1156 * ddr[23]_cs_size have a similar purpose. k8_dbam_to_chip_select()
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| /linux-4.4.14/arch/arm/mach-at91/ |
| H A D | pm_suspend.S | 250 /* If using the 2nd ddr controller */
282 /* If using the 2nd ddr controller */
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| /linux-4.4.14/drivers/gpio/ |
| H A D | gpio-adnp.c | 195 u8 ddr, plr, ier, isr; adnp_gpio_dbg_show() local
199 err = adnp_read(adnp, GPIO_DDR(adnp) + i, &ddr); adnp_gpio_dbg_show()
232 if (ddr & BIT(j)) adnp_gpio_dbg_show()
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| /linux-4.4.14/drivers/iio/adc/ |
| H A D | xilinx-xadc-events.c | 149 cfg &= ~((xadc->alarm_mask & 0xf0) << 4); /* bram, pint, paux, ddr */ xadc_write_event_config()
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| /linux-4.4.14/drivers/power/reset/ |
| H A D | at91-reset.c | 196 /* we need to shutdown the ddr controller, so get ramc base */ for_each_matching_node()
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| /linux-4.4.14/drivers/cpufreq/ |
| H A D | kirkwood-cpufreq.c | 39 * - ddr clk
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| /linux-4.4.14/include/media/ |
| H A D | adv7842.h | 192 unsigned sd_ram_ddr:1; /* ddr or sdr sdram */
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| /linux-4.4.14/drivers/mmc/core/ |
| H A D | host.c | 280 if (of_property_read_bool(np, "mmc-ddr-1_8v")) mmc_of_parse()
282 if (of_property_read_bool(np, "mmc-ddr-1_2v")) mmc_of_parse()
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| H A D | mmc.c | 846 int err, ddr; mmc_select_powerclass() local
857 ddr = card->mmc_avail_type & EXT_CSD_CARD_TYPE_DDR_52; mmc_select_powerclass()
858 if (ddr) mmc_select_powerclass()
867 pr_warn("%s: power class selection to bus width %d ddr %d failed\n", mmc_select_powerclass()
868 mmc_hostname(host), 1 << bus_width, ddr); mmc_select_powerclass()
1003 pr_err("%s: switch to bus width %d ddr failed\n", mmc_select_hs_ddr()
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| /linux-4.4.14/drivers/mfd/ |
| H A D | sm501.c | 956 unsigned long ddr; sm501_gpio_input() local
963 ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW); sm501_gpio_input()
964 smc501_writel(ddr & ~bit, regs + SM501_GPIO_DDR_LOW); sm501_gpio_input()
983 unsigned long ddr; sm501_gpio_output() local
997 ddr = smc501_readl(regs + SM501_GPIO_DDR_LOW); sm501_gpio_output()
998 smc501_writel(ddr | bit, regs + SM501_GPIO_DDR_LOW); sm501_gpio_output()
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| /linux-4.4.14/arch/unicore32/kernel/ |
| H A D | process.c | 101 writel(0x00100800, PM_PLLDDRCFG); /* ddr clk = 44M */ machine_restart()
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| /linux-4.4.14/drivers/clk/bcm/ |
| H A D | clk-ns2.c | 225 CLK_OF_DECLARE(ns2_lcpll_ddr_clk, "brcm,ns2-lcpll-ddr",
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| /linux-4.4.14/arch/arm/mach-omap2/ |
| H A D | sdrc.h | 93 u32 m_type; /* ddr = 1, sdr = 0 */
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| /linux-4.4.14/drivers/video/fbdev/matrox/ |
| H A D | matroxfb_misc.c | 668 minfo->values.memory.ddr = (bd->pins[114] & 0x60) == 0x20; parse_pins5()
702 minfo->values.memory.ddr = 1; default_pins5()
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| H A D | matroxfb_base.h | 489 unsigned int ddr:1, member in struct:matrox_fb_info::__anon11163::__anon11166
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| H A D | matroxfb_DAC1064.c | 768 if (minfo->values.memory.ddr && (!minfo->values.memory.emrswen || !minfo->values.memory.dll)) { g450_memory_init()
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| /linux-4.4.14/drivers/gpu/drm/i915/ |
| H A D | intel_dsi_panel_vbt.c | 451 * Target ddr frequency from VBT / non burst ddr freq vbt_panel_init()
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| H A D | intel_dsi_pll.c | 133 /* the dsi clock is divided by 2 in the hardware to get dsi ddr clock */ dsi_rr_formula()
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| H A D | intel_pm.c | 7111 "(found ddr%s fsb freq %d, mem freq %d), " intel_init_pm()
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| /linux-4.4.14/drivers/clk/ingenic/ |
| H A D | jz4780-cgu.c | 336 "ddr", CGU_CLK_MUX | CGU_CLK_DIV,
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| /linux-4.4.14/drivers/clk/pistachio/ |
| H A D | clk-pistachio.c | 210 GATE(PERIPH_CLK_DDR, "ddr", "periph_sys", 0x100, 2),
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| /linux-4.4.14/arch/powerpc/platforms/512x/ |
| H A D | clock-commonclk.c | 744 clks[MPC512x_CLK_DDR_UG] = mpc512x_clk_factor("ddr-ug", "sys", 1, 2); mpc512x_clk_setup_clock_tree()
841 clks[MPC512x_CLK_DDR] = mpc512x_clk_gated("ddr", "ddr-ug", mpc512x_clk_setup_clock_tree()
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| /linux-4.4.14/drivers/mmc/host/ |
| H A D | dw_mmc-exynos.c | 351 "samsung,dw-mshc-ddr-timing", timing, 2); dw_mci_exynos_parse_dt()
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| H A D | sdhci-esdhc-imx.c | 867 /* disable ddr mode and disable HS400 mode */ esdhc_set_uhs_signaling()
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| H A D | sunxi-mmc.c | 731 /* set ddr mode */ sunxi_mmc_set_ios()
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| H A D | mmci.c | 66 * @datactrl_mask_ddrmode: ddr mode mask in datactrl register.
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| H A D | mtk-sd.c | 540 mode = 0x2; /* ddr mode and use divisor */ msdc_set_mclk()
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| /linux-4.4.14/drivers/clk/st/ |
| H A D | clkgen-pll.c | 1059 .compatible = "st,stih415-plls-c32-ddr",
1067 .compatible = "st,stih416-plls-c32-ddr",
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| H A D | ramgf100.c | 531 /* prepare for ddr link training, and load training patterns */ gf100_ram_init()
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| /linux-4.4.14/drivers/gpu/drm/i2c/ |
| H A D | adv7511.c | 801 else if (!strcmp(str, "ddr")) adv7511_parse_dt()
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| /linux-4.4.14/drivers/video/fbdev/ |
| H A D | ps3fb.c | 1034 dev_dbg(&dev->core, "ddr:lpar:0x%llx\n", ddr_lpar); ps3fb_probe()
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| /linux-4.4.14/arch/powerpc/platforms/pseries/ |
| H A D | iommu.c | 421 #define DIRECT64_PROPNAME "linux,direct64-ddr-window-info"
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| /linux-4.4.14/drivers/video/fbdev/omap2/dss/ |
| H A D | dsi.c | 1871 /* convert time in ns to ddr ticks, rounding up */ ns2ddr()
1876 static inline unsigned ddr2ns(struct platform_device *dsidev, unsigned ddr) ddr2ns() argument
1881 return ddr * 1000 * 1000 / (ddr_clk / 1000); ddr2ns()
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| /linux-4.4.14/drivers/infiniband/hw/qib/ |
| H A D | qib_iba7220.c | 2704 u64 val, ddr; qib_7220_set_loopback() local
2722 ddr = ppd->cpspec->ibcddrctrl & ~(IBA7220_IBC_HRTBT_MASK qib_7220_set_loopback()
2724 ppd->cpspec->ibcddrctrl = ddr | val; qib_7220_set_loopback()
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| H A D | qib_iba7322.c | 588 struct txdds_ent ddr; member in struct:vendor_txdds_ent
7699 *ddr_dds = &v->ddr; find_best_ent()
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| /linux-4.4.14/drivers/pinctrl/ |
| H A D | pinctrl-tegra30.c | 2033 FUNCTION(ddr),
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| /linux-4.4.14/arch/s390/kernel/ |
| H A D | dis.c | 576 { "ddr", 0x2d, INSTR_RR_FF },
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| /linux-4.4.14/drivers/staging/rts5208/ |
| H A D | sd.c | 1625 dev_dbg(rtsx_dev(chip), "sd ddr tuning rx\n"); sd_ddr_tuning_rx_cmd()
1672 dev_dbg(rtsx_dev(chip), "mmc ddr tuning rx\n"); mmc_ddr_tunning_rx_cmd()
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| /linux-4.4.14/arch/mips/include/asm/octeon/ |
| H A D | cvmx-mio-defs.h | 437 uint64_t ddr:1; member in struct:cvmx_mio_boot_dma_timx::cvmx_mio_boot_dma_timx_s
459 uint64_t ddr:1;
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| /linux-4.4.14/drivers/scsi/qla4xxx/ |
| H A D | ql4_nx.c | 588 * used by test agent. support ddr access only for now
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| /linux-4.4.14/drivers/media/i2c/ |
| H A D | adv7842.c | 2961 v4l2_info(sd, "no sdram or no ddr sdram\n"); adv7842_command_ram_test()
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| /linux-4.4.14/drivers/scsi/qla2xxx/ |
| H A D | qla_nx.c | 563 * used by test agent. support ddr access only for now
|