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Searched refs:ctrl_base (Results 1 – 27 of 27) sorted by relevance

/linux-4.4.14/arch/arm/mach-hisi/
Dhotplug.c76 static void __iomem *ctrl_base; variable
87 ctrl_base + SCPERPWREN); in set_cpu_hi3620()
91 writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREEN); in set_cpu_hi3620()
96 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
99 writel_relaxed(val << cpu, ctrl_base + SCCPURSTEN); in set_cpu_hi3620()
104 ctrl_base + SCISODIS); in set_cpu_hi3620()
108 val = readl_relaxed(ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
110 writel_relaxed(val, ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
115 writel_relaxed(val << cpu, ctrl_base + SCCPURSTDIS); in set_cpu_hi3620()
118 val = readl_relaxed(ctrl_base + SCPERCTRL0); in set_cpu_hi3620()
[all …]
Dplatsmp.c24 static void __iomem *ctrl_base; variable
29 if (!cpu || !ctrl_base) in hi3xxx_set_cpu_jump()
31 writel_relaxed(virt_to_phys(jump_addr), ctrl_base + ((cpu - 1) << 2)); in hi3xxx_set_cpu_jump()
37 if (!cpu || !ctrl_base) in hi3xxx_get_cpu_jump()
39 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump()
65 if (!ctrl_base) { in hi3xxx_smp_prepare_cpus()
71 ctrl_base = of_iomap(np, 0); in hi3xxx_smp_prepare_cpus()
72 if (!ctrl_base) { in hi3xxx_smp_prepare_cpus()
80 ctrl_base += offset; in hi3xxx_smp_prepare_cpus()
165 ctrl_base = of_iomap(node, 0); in hip01_boot_secondary()
[all …]
/linux-4.4.14/drivers/video/fbdev/riva/
Dnv_driver.c318 (volatile U032 __iomem *)(par->ctrl_base + 0x00680000); in riva_common_setup()
320 (volatile U032 __iomem *)(par->ctrl_base + 0x00100000); in riva_common_setup()
322 (volatile U032 __iomem *)(par->ctrl_base + 0x00002000); in riva_common_setup()
324 (volatile U032 __iomem *)(par->ctrl_base + 0x00400000); in riva_common_setup()
326 (volatile U032 __iomem *)(par->ctrl_base + 0x00101000); in riva_common_setup()
328 (volatile U032 __iomem *)(par->ctrl_base + 0x00009000); in riva_common_setup()
330 (volatile U032 __iomem *)(par->ctrl_base + 0x00000000); in riva_common_setup()
332 (volatile U032 __iomem *)(par->ctrl_base + 0x00800000); in riva_common_setup()
333 par->riva.PCIO0 = par->ctrl_base + 0x00601000; in riva_common_setup()
334 par->riva.PDIO0 = par->ctrl_base + 0x00681000; in riva_common_setup()
[all …]
Drivafb.h47 u8 __iomem *ctrl_base; /* virtual control register base addr */ member
Dfbdev.c1968 default_par->ctrl_base = ioremap(rivafb_fix.mmio_start, in rivafb_probe()
1970 if (!default_par->ctrl_base) { in rivafb_probe()
1994 (u32 __iomem *)(default_par->ctrl_base + 0x00600000); in rivafb_probe()
1996 (u32 __iomem *)(default_par->ctrl_base + 0x00710000); in rivafb_probe()
2066 iounmap(default_par->ctrl_base); in rivafb_probe()
2094 iounmap(par->ctrl_base); in rivafb_remove()
/linux-4.4.14/arch/arm/mach-omap2/
Domap_phy_internal.c50 void __iomem *ctrl_base; in omap4430_phy_power_down() local
55 ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K); in omap4430_phy_power_down()
56 if (!ctrl_base) { in omap4430_phy_power_down()
62 writel_relaxed(PHY_PD, ctrl_base + CONTROL_DEV_CONF); in omap4430_phy_power_down()
64 iounmap(ctrl_base); in omap4430_phy_power_down()
/linux-4.4.14/arch/mips/pci/
Dpci-ar724x.c40 void __iomem *ctrl_base; member
59 reset = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_RESET); in ar724x_pci_check_link()
235 base = apc->ctrl_base; in ar724x_pci_irq_handler()
255 base = apc->ctrl_base; in ar724x_pci_irq_unmask()
276 base = apc->ctrl_base; in ar724x_pci_irq_mask()
310 base = apc->ctrl_base; in ar724x_pci_irq_init()
344 apc->ctrl_base = devm_ioremap_resource(&pdev->dev, res); in ar724x_pci_probe()
345 if (IS_ERR(apc->ctrl_base)) in ar724x_pci_probe()
346 return PTR_ERR(apc->ctrl_base); in ar724x_pci_probe()
/linux-4.4.14/drivers/usb/musb/
Dmusb_dsps.c218 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_enable()
245 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_disable()
295 dsps_writel(musb->ctrl_base, wrp->coreintr_set, in otg_timer()
307 void __iomem *reg_base = musb->ctrl_base; in dsps_interrupt()
410 glue->regset.base = musb->ctrl_base; in dsps_musb_dbg_init()
435 musb->ctrl_base = reg_base; in dsps_musb_init()
473 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); in dsps_musb_init()
510 void __iomem *ctrl_base = musb->ctrl_base; in dsps_musb_set_mode() local
513 reg = dsps_readl(ctrl_base, wrp->mode); in dsps_musb_set_mode()
526 dsps_writel(ctrl_base, wrp->mode, reg); in dsps_musb_set_mode()
[all …]
Ddavinci.c100 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); in davinci_musb_enable()
104 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); in davinci_musb_enable()
109 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); in davinci_musb_enable()
118 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, in davinci_musb_enable()
132 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_CLR_REG, in davinci_musb_disable()
137 musb_writel(musb->ctrl_base, DAVINCI_USB_EOI_REG, 0); in davinci_musb_disable()
232 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_SET_REG, in otg_timer()
268 void __iomem *tibase = musb->ctrl_base; in davinci_musb_interrupt()
380 void __iomem *tibase = musb->ctrl_base; in davinci_musb_init()
Dtusb6010.c49 void __iomem *tbase = musb->ctrl_base; in tusb_get_revision()
66 void __iomem *tbase = musb->ctrl_base; in tusb_print_revision()
99 void __iomem *tbase = musb->ctrl_base; in tusb_wbus_quirk()
330 void __iomem *tbase = musb->ctrl_base; in tusb_draw_power()
366 void __iomem *tbase = musb->ctrl_base; in tusb_set_clock_source()
393 void __iomem *tbase = musb->ctrl_base; in tusb_allow_idle()
430 void __iomem *tbase = musb->ctrl_base; in tusb_musb_vbus_status()
556 void __iomem *tbase = musb->ctrl_base; in tusb_musb_set_vbus()
633 void __iomem *tbase = musb->ctrl_base; in tusb_musb_set_mode()
825 void __iomem *tbase = musb->ctrl_base; in tusb_musb_interrupt()
[all …]
Dmusb_cppi41.c339 musb_writel(controller->musb->ctrl_base, USB_CTRL_TX_MODE, in cppi41_set_dma_mode()
343 musb_writel(controller->musb->ctrl_base, USB_CTRL_RX_MODE, in cppi41_set_dma_mode()
363 musb_writel(controller->musb->ctrl_base, USB_CTRL_AUTOREQ, new_mode); in cppi41_set_autoreq_mode()
399 musb_writel(musb->ctrl_base, in cppi41_configure_channel()
409 musb_writel(musb->ctrl_base, in cppi41_configure_channel()
578 musb_writel(musb->ctrl_base, USB_TDOWN, tdbit); in cppi41_dma_channel_abort()
583 musb_writel(musb->ctrl_base, USB_TDOWN, tdbit); in cppi41_dma_channel_abort()
Dda8xx.c149 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_enable()
168 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_disable()
230 musb_writel(musb->ctrl_base, DA8XX_USB_INTR_SRC_SET_REG, in otg_timer()
291 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_interrupt()
411 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_init()
Dam35x.c99 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_enable()
119 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_disable()
171 musb_writel(musb->ctrl_base, CORE_INTR_SRC_SET_REG, in otg_timer()
219 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_interrupt()
355 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_init()
Dtusb6010_omap.c501 tbase = musb->ctrl_base; in tusb_omap_dma_allocate()
595 void __iomem *tbase = musb->ctrl_base; in tusb_omap_dma_release()
652 void __iomem *tbase = musb->ctrl_base; in tusb_dma_controller_create()
658 musb_writel(musb->ctrl_base, TUSB_DMA_INT_MASK, 0x7fffffff); in tusb_dma_controller_create()
659 musb_writel(musb->ctrl_base, TUSB_DMA_EP_MAP, 0); in tusb_dma_controller_create()
671 tusb_dma->tbase = musb->ctrl_base; in tusb_dma_controller_create()
Dcppi_dma.c600 cppi_rndis_update(tx, 0, musb->ctrl_base, rndis); in cppi_next_tx_segment()
769 void __iomem *tibase = musb->ctrl_base; in cppi_next_rx_segment()
812 cppi_rndis_update(rx, 1, musb->ctrl_base, is_rndis); in cppi_next_rx_segment()
1156 tibase = musb->ctrl_base; in cppi_interrupt()
Dmusb_core.h344 void __iomem *ctrl_base; member
Dmusb_core.c1908 musb->ctrl_base = mbase; in allocate_instance()
/linux-4.4.14/arch/arm/mm/
Dcache-uniphier.c96 void __iomem *ctrl_base; member
252 writel_relaxed(val, data->ctrl_base + UNIPHIER_SSCC); in __uniphier_cache_enable()
262 data->ctrl_base + UNIPHIER_SSCLPDAWCR); in __uniphier_cache_set_locked_ways()
346 return !!(readl_relaxed(data->ctrl_base + UNIPHIER_SSCC) & in uniphier_cache_l2_is_enabled()
452 data->ctrl_base = of_iomap(np, 0); in __uniphier_cache_init()
453 if (!data->ctrl_base) { in __uniphier_cache_init()
505 iounmap(data->ctrl_base); in __uniphier_cache_init()
/linux-4.4.14/sound/pci/
Dsis7019.c96 void __iomem *ctrl_base; member
206 void __iomem *base = voice->ctrl_base; in sis_update_sso()
530 void __iomem *ctrl_base = voice->ctrl_base; in sis_pcm_playback_prepare() local
571 writel(format, ctrl_base + SIS_PLAY_DMA_FORMAT_CSO); in sis_pcm_playback_prepare()
572 writel(dma_addr, ctrl_base + SIS_PLAY_DMA_BASE); in sis_pcm_playback_prepare()
573 writel(control, ctrl_base + SIS_PLAY_DMA_CONTROL); in sis_pcm_playback_prepare()
574 writel(sso_eso, ctrl_base + SIS_PLAY_DMA_SSO_ESO); in sis_pcm_playback_prepare()
587 readl(ctrl_base); in sis_pcm_playback_prepare()
667 cso = readl(voice->ctrl_base + SIS_PLAY_DMA_FORMAT_CSO); in sis_pcm_pointer()
733 void __iomem *play_base = timing->ctrl_base; in sis_prepare_timing_voice()
[all …]
/linux-4.4.14/arch/mips/ath79/
Dpci.c169 unsigned long ctrl_base, in ath79_register_pci_ar724x() argument
188 res[1].start = ctrl_base; in ath79_register_pci_ar724x()
189 res[1].end = ctrl_base + AR724X_PCI_CTRL_SIZE - 1; in ath79_register_pci_ar724x()
/linux-4.4.14/drivers/clk/samsung/
Dclk-cpu.h53 void __iomem *ctrl_base; member
Dclk-cpu.c268 base = cpuclk->ctrl_base; in exynos_cpuclk_notifier_cb()
301 cpuclk->ctrl_base = ctx->reg_base + offset; in exynos_register_cpu_clock()
/linux-4.4.14/drivers/spi/
Dspi-ti-qspi.c47 void __iomem *ctrl_base; member
527 qspi->ctrl_base = devm_ioremap_resource(&pdev->dev, res_ctrl); in ti_qspi_probe()
528 if (IS_ERR(qspi->ctrl_base)) { in ti_qspi_probe()
529 ret = PTR_ERR(qspi->ctrl_base); in ti_qspi_probe()
/linux-4.4.14/arch/arm/kernel/
Dhw_breakpoint.c337 int i, max_slots, ctrl_base, val_base; in arch_install_hw_breakpoint() local
345 ctrl_base = ARM_BASE_BCR; in arch_install_hw_breakpoint()
351 ctrl_base = ARM_BASE_WCR; in arch_install_hw_breakpoint()
377 ctrl_base = ARM_BASE_BCR + core_num_brps; in arch_install_hw_breakpoint()
386 write_wb_reg(ctrl_base + i, ctrl); in arch_install_hw_breakpoint()
/linux-4.4.14/drivers/gpu/drm/msm/dsi/
Ddsi_host.c92 void __iomem *ctrl_base; member
154 return msm_readl(msm_host->ctrl_base + reg); in dsi_read()
158 msm_writel(data, msm_host->ctrl_base + reg); in dsi_write()
188 ret = dsi_get_version(msm_host->ctrl_base, &major, &minor); in dsi_get_config()
1242 if (!msm_host->ctrl_base) in dsi_host_irq()
1417 msm_host->ctrl_base = msm_ioremap(pdev, "dsi_ctrl", "DSI CTRL"); in msm_dsi_host_init()
1418 if (IS_ERR(msm_host->ctrl_base)) { in msm_dsi_host_init()
1420 ret = PTR_ERR(msm_host->ctrl_base); in msm_dsi_host_init()
1432 msm_host->ctrl_base += msm_host->cfg_hnd->cfg->io_offset; in msm_dsi_host_init()
/linux-4.4.14/drivers/net/ethernet/hisilicon/
Dhix5hd2_gmac.c213 void __iomem *ctrl_base; member
265 writel_relaxed(val, priv->ctrl_base); in hix5hd2_config_port()
916 priv->ctrl_base = devm_ioremap_resource(dev, res); in hix5hd2_dev_probe()
917 if (IS_ERR(priv->ctrl_base)) { in hix5hd2_dev_probe()
918 ret = PTR_ERR(priv->ctrl_base); in hix5hd2_dev_probe()
/linux-4.4.14/drivers/net/ethernet/ti/
Ddavinci_emac.c332 void __iomem *ctrl_base; member
379 #define emac_ctrl_read(reg) ioread32((priv->ctrl_base + (reg)))
380 #define emac_ctrl_write(reg, val) iowrite32(val, (priv->ctrl_base + (reg)))
1971 priv->ctrl_base = in davinci_emac_probe()
1973 if (IS_ERR(priv->ctrl_base)) { in davinci_emac_probe()
1974 rc = PTR_ERR(priv->ctrl_base); in davinci_emac_probe()
1978 priv->ctrl_base = priv->remap_addr + pdata->ctrl_mod_reg_offset; in davinci_emac_probe()