Searched refs:crystal (Results 1 - 154 of 154) sorted by relevance

/linux-4.4.14/arch/powerpc/boot/
H A Dmpc8xx.h8 u32 mpc885_get_clock(u32 crystal);
9 int mpc885_fixup_clocks(u32 crystal);
H A Dpq2.h6 int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq,
9 int pq2_fixup_clocks(u32 crystal);
H A Dmpc8xx.c22 /* Return system clock from crystal frequency */ mpc885_get_clock()
23 u32 mpc885_get_clock(u32 crystal) mpc885_get_clock() argument
50 ret = crystal * mfi; mpc885_get_clock()
53 ret += crystal * mfn / (mfd + 1); mpc885_get_clock()
74 int mpc885_fixup_clocks(u32 crystal) mpc885_fixup_clocks() argument
76 u32 sysclk = mpc885_get_clock(crystal); mpc885_fixup_clocks()
H A Dpq2.c28 /* Get various clocks from crystal frequency.
31 int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq, pq2_get_clocks() argument
53 mainclk = crystal * (pllmf + 1) / (plldf + 1); pq2_get_clocks()
93 int pq2_fixup_clocks(u32 crystal) pq2_fixup_clocks() argument
97 if (!pq2_get_clocks(crystal, &sysfreq, &corefreq, &timebase, &brgfreq)) pq2_fixup_clocks()
H A Dep8248e.c31 printf("No PlanetCore crystal frequency key.\r\n"); platform_fixups()
H A Dep88xc.c29 printf("No PlanetCore crystal frequency key.\r\n"); platform_fixups()
H A Dep405.c36 printf("No PlanetCore crystal frequency key.\r\n"); platform_fixups()
/linux-4.4.14/include/linux/
H A Dserial_max3100.h19 * @crystal: 1 for 3.6864 Mhz, 0 for 1.8432
30 * .crystal = 0,
47 int crystal; member in struct:plat_max3100
H A Dds17287rtc.h56 #define DS_XCTRL4B_CS 0x20 /* crystal select */
/linux-4.4.14/arch/xtensa/platforms/xt2000/include/platform/
H A Dserial.h25 #define DUART16552_XTAL_FREQ 18432000 /* crystal frequency in Hz */
/linux-4.4.14/arch/arm/mach-ep93xx/include/mach/
H A Dhardware.h11 * The EP93xx has two external crystal oscillators. To generate the
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dpllnv04.c48 int crystal = info->refclk; getMNP_single() local
55 /* possibly correlated with introduction of 27MHz crystal */ getMNP_single()
93 if (crystal/M < minU) getMNP_single()
95 if (crystal/M > maxU) getMNP_single()
98 /* add crystal/2 to round better */ getMNP_single()
99 N = (clkP * M + crystal/2) / crystal; getMNP_single()
107 calcclk = ((N * crystal + P/2) / P + M/2) / M; getMNP_single()
149 int crystal = info->refclk; getMNP_double() local
165 if (crystal/M1 < minU1) getMNP_double()
167 if (crystal/M1 > maxU1) getMNP_double()
171 calcclk1 = crystal * N1 / M1; getMNP_double()
H A Dgt215.c50 return device->crystal; read_vco()
73 return device->crystal; read_clk()
88 return device->crystal; read_clk()
149 return device->crystal; gt215_clk_read()
H A Dgf100.c75 sclk = device->crystal; read_pll()
107 return device->crystal; read_div()
158 return device->crystal; gf100_clk_read()
H A Dgk104.c77 sclk = device->crystal; read_pll()
115 return device->crystal; read_div()
197 return device->crystal; gk104_clk_read()
H A Dnv40.c106 return device->crystal; nv40_clk_read()
H A Dmcp77.c91 return device->crystal; mcp77_clk_read()
H A Dgk20a.c571 return device->crystal; gk20a_clk_read()
H A Dnv50.c202 return device->crystal; nv50_clk_read()
/linux-4.4.14/drivers/tty/serial/
H A Dmax3100.c20 .crystal = 0,
121 int crystal; /* 1 if 3.6864Mhz crystal 0 for 1.8432 */ member in struct:max3100_port
446 if (s->crystal) max3100_set_termios()
452 param_new = 14 + s->crystal; max3100_set_termios()
455 param_new = 13 + s->crystal; max3100_set_termios()
458 param_new = 12 + s->crystal; max3100_set_termios()
461 param_new = 11 + s->crystal; max3100_set_termios()
464 param_new = 10 + s->crystal; max3100_set_termios()
467 param_new = 9 + s->crystal; max3100_set_termios()
470 param_new = 8 + s->crystal; max3100_set_termios()
473 param_new = 1 + s->crystal; max3100_set_termios()
476 param_new = 0 + s->crystal; max3100_set_termios()
479 if (s->crystal) max3100_set_termios()
595 s->baud = s->crystal ? 230400 : 115200; max3100_startup()
783 max3100s[i]->crystal = pdata->crystal; max3100_probe()
796 max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200; max3100_probe()
H A Dmax310x.c585 /* Wait for crystal */ max310x_set_ref_clk()
/linux-4.4.14/include/linux/platform_data/
H A Ds3c-hsotg.h29 * @is_osc: The clock source is an oscillator, not a crystal
/linux-4.4.14/drivers/watchdog/
H A Dnuc900_wdt.c39 * 0x00 ((2^ 14 ) * ((external crystal freq) / 256))seconds
40 * 0x01 ((2^ 16 ) * ((external crystal freq) / 256))seconds
41 * 0x02 ((2^ 18 ) * ((external crystal freq) / 256))seconds
42 * 0x03 ((2^ 20 ) * ((external crystal freq) / 256))seconds
44 * The external crystal freq is 15Mhz in the nuc900 evaluation board.
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
H A Dgf119.c113 return (device->crystal * 1000) / 20; gf119_fan_pwm_clock()
115 return device->crystal * 1000 / 10; gf119_fan_pwm_clock()
129 nvkm_wr32(device, 0x00e724, device->crystal * 1000); gf119_therm_init()
H A Dnv50.c110 pwm_clock = (device->crystal * 1000) >> pwm_div; nv50_fan_pwm_clock()
114 pwm_clock = (device->crystal * 1000) / 20; nv50_fan_pwm_clock()
H A Dgm107.c54 return therm->subdev.device->crystal * 1000; gm107_fan_pwm_clock()
H A Dgt215.c50 nvkm_wr32(device, 0x00e724, device->crystal * 1000); gt215_therm_init()
/linux-4.4.14/arch/arm/plat-samsung/
H A Dinit.c72 * given master crystal value.
74 * xtal = 0 -> use default PLL crystal value (normally 12MHz)
75 * != 0 -> PLL crystal value in Hz
/linux-4.4.14/drivers/rtc/
H A Drtc-stmp3xxx.c294 * This clock can be provided by an external 32k crystal. If that one is stmp3xxx_rtc_probe()
306 of_property_read_u32(pdev->dev.of_node, "stmp,crystal-freq", stmp3xxx_rtc_probe()
311 /* keep 32kHz crystal running in low-power mode */ stmp3xxx_rtc_probe()
318 /* keep 32.768kHz crystal running in low-power mode */ stmp3xxx_rtc_probe()
326 "invalid crystal-freq specified in device-tree. Assuming no crystal\n"); stmp3xxx_rtc_probe()
H A Drtc-au1xxx.c12 * crystal. Counter 0, which keeps counting during sleep/powerdown, is
H A Drtc-dm355evm.c21 * The MSP430 firmware on the DM355 EVM uses a watch crystal to feed
H A Drtc-sirfsoc.c344 * We are using 32K RTC crystal (32768 / RTC_HZ / 2) -1 sirfsoc_rtc_probe()
425 * We are using 32K RTC crystal (32768 / RTC_HZ / 2) -1 sirfsoc_rtc_resume()
H A Drtc-xgene.c185 /* Turn on the clock and the crystal */ xgene_rtc_probe()
H A Drtc-zynqmp.c126 * Based on crystal freq of 33.330 KHz xlnx_init_rtc()
H A Drtc-ds1511.c459 * turn on the clock and the crystal, etc. ds1511_rtc_probe()
H A Drtc-isl1208.c36 #define ISL1208_REG_SR_XTOSCB (1<<6) /* crystal oscillator */
H A Drtc-rx8025.c125 dev_warn(dev, "crystal stopped, date is invalid\n"); rx8025_check_validity()
H A Drtc-rs5c372.c423 seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", rs5c372_rtc_proc()
/linux-4.4.14/sound/soc/blackfin/
H A Dbf5xx-ssm2602.c49 * If you are using a crystal source which frequency is not 12MHz bf5xx_ssm2602_dai_init()
50 * then modify the below case statement with frequency of the crystal. bf5xx_ssm2602_dai_init()
/linux-4.4.14/drivers/media/radio/
H A Dtea575x.c169 /* crystal fixup */ snd_tea575x_val_to_freq()
176 /* crystal fixup */ snd_tea575x_val_to_freq()
180 /* crystal fixup */ snd_tea575x_val_to_freq()
202 /* crystal fixup */ snd_tea575x_set_freq()
210 /* crystal fixup */ snd_tea575x_set_freq()
218 /* crystal fixup */ snd_tea575x_set_freq()
/linux-4.4.14/include/media/
H A Dsaa7115.h60 #define SAA7115_FREQ_32_11_MHZ 32110000 /* 32.11 MHz crystal, SAA7114/5 only */
61 #define SAA7115_FREQ_24_576_MHZ 24576000 /* 24.576 MHz crystal */
H A Dv4l2-subdev.h330 * @s_crystal_freq: sets the frequency of the crystal used to generate the
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/timer/
H A Dnv41.c32 u32 f = device->crystal; nv41_timer_init()
/linux-4.4.14/drivers/ata/
H A Dahci_da850.c34 * NOTE: This is currently hardcoded to be suitable for 100MHz crystal
/linux-4.4.14/arch/arm/mach-s3c24xx/
H A Dpll-s3c2440-12000000.c66 printk(KERN_INFO "Using PLL table for 12MHz crystal\n"); s3c2440_plls12_add()
H A Dpll-s3c2440-16934400.c95 printk(KERN_INFO "Using PLL table for 16.9344MHz crystal\n"); s3c2440_plls169344_add()
/linux-4.4.14/include/sound/
H A Dcs4231-regs.h73 #define AD1845_CLOCK 0x1d /* crystal clock select and total power down */
118 #define CS4231_XTAL1 0x00 /* 24.576 crystal */
119 #define CS4231_XTAL2 0x01 /* 16.9344 crystal */
/linux-4.4.14/drivers/media/pci/cx18/
H A Dcx18-av-audio.c35 * The PLL parameters are based on the external crystal frequency that set_audclk_freq()
50 * As Mike Bradley has rightly pointed out, it's not the exact crystal set_audclk_freq()
55 * crystal value at all, it will assume 28.636360 MHz, the crystal set_audclk_freq()
61 * the shelf crystal will have for accuracy anyway. set_audclk_freq()
H A Dcx18-firmware.c233 * The PLL parameters are based on the external crystal frequency that cx18_init_power()
248 * As Mike Bradley has rightly pointed out, it's not the exact crystal cx18_init_power()
253 * crystal value at all, it will assume 28.636360 MHz, the crystal cx18_init_power()
259 * the shelf crystal will have for accuracy anyway. cx18_init_power()
H A Dcx18-av-core.c104 * The crystal freq used in calculations in this driver will be cx18_av_init()
294 * Video ADC crystal clock to pixel clock SRC decimation ratio cx18_av_std_setup()
/linux-4.4.14/drivers/media/common/siano/
H A Dsms-cards.h96 unsigned int crystal; member in struct:sms_board
H A Dsms-cards.c149 .crystal = 2400,
H A Dsmscoreapi.c854 if (board->crystal) { smscore_configure_board()
856 pr_debug("set crystal value %d\n", board->crystal); smscore_configure_board()
861 crys_msg.msg_data[0] = board->crystal; smscore_configure_board()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/volt/
H A Dgk104.c57 /* the blob uses this crystal frequency, let's use it too. */ gk104_volt_set()
/linux-4.4.14/drivers/nfc/s3fwrn5/
H A Dnci.c110 /* Set default clock configuration for external crystal */ s3fwrn5_nci_rf_configure()
/linux-4.4.14/arch/mips/jazz/
H A Dsetup.c92 /* Some Jazz machines seem to have an 8MHz crystal clock but I don't know
/linux-4.4.14/arch/mn10300/kernel/
H A Dtime.c103 * - IOCLK runs at Fosc rate (crystal speed) time_init()
/linux-4.4.14/arch/arm/mach-iop32x/
H A Dglantank.c44 /* 33.333 MHz crystal. */ glantank_timer_init()
H A Diq80321.c43 /* 33.333 MHz crystal. */ iq80321_timer_init()
H A Diq31244.c71 /* 33.333 MHz crystal. */ iq31244_timer_init()
74 /* 33.000 MHz crystal. */ iq31244_timer_init()
H A Dem7210.c41 /* 33.333 MHz crystal. */ em7210_timer_init()
H A Dn2100.c51 /* 33.000 MHz crystal. */ n2100_timer_init()
/linux-4.4.14/sound/soc/samsung/
H A Dsmdk_wm8994pcm.c47 /* SMDK has a 16.9344MHZ crystal attached to WM8994 */
H A Dsmdk_wm8580.c28 /* SMDK has a 12MHZ crystal attached to WM8580 */
H A Dsmdk_wm8994.c39 /* SMDK has a 16.934MHZ crystal attached to WM8994 */
H A Dbells.c25 * Expect a 24.576MHz crystal if one is fitted (the driver will function
/linux-4.4.14/sound/soc/au1x/
H A Ddb1200.c95 /* WM8731 has its own 12MHz crystal */ db1200_i2s_startup()
/linux-4.4.14/include/linux/mfd/
H A Dasic3.h208 #define CLOCK_CDEX_EX0 (1 << 13) /* R/W: 32.768 kHz crystal */
209 #define CLOCK_CDEX_EX1 (1 << 14) /* R/W: 24.576 MHz crystal */
H A Dsi476x-platform.h210 * @freq: oscillator's crystal frequency:
/linux-4.4.14/drivers/net/wireless/brcm80211/brcmsmac/
H A Daiutils.c38 /* source of slow clock is crystal */
53 * power logic does/doesn't disable crystal when appropriate
56 /* XtalPU (RO), 1/0: crystal running/disabled */
140 /* crystal frequency 20/40Mhz */
282 #define XTAL_ON_DELAY 1000 /* us crystal power-on delay */
H A Dpmu.c29 * external LPO crystal frequency
H A Daiutils.h103 #define XTAL 0x1 /* primary crystal oscillator (2050) */
H A Dmain.c4870 * One exception is sb register access, which is possible if crystal is turned
/linux-4.4.14/include/linux/ssb/
H A Dssb_driver_chipcommon.h159 #define SSB_CHIPCO_SLOWCLKCTL_SRC_XTAL 0x00000001 /* source of slow clock is crystal */
165 #define SSB_CHIPCO_SLOWCLKCTL_ENXTAL 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't disable crystal when appropriate */
166 #define SSB_CHIPCO_SLOWCLKCTL_XTALPU 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */
475 #define SSB_CHIPCO_CLK_BASE2 12500000 /* Alternate crystal on some PLL's */
585 u32 crystalfreq; /* The active crystal frequency (in kHz) */
/linux-4.4.14/drivers/scsi/
H A Dqlogicfas408.h26 /* crystal frequency in megahertz (for offset 5 and 9)
H A Desp_scsi.c2329 * This is a representation of the input crystal clock frequency esp_set_clock_params()
/linux-4.4.14/drivers/net/can/sja1000/
H A Dtscan1.c70 /* SJA1000 crystal frequency (16MHz) */
/linux-4.4.14/drivers/media/dvb-frontends/drx39xyj/
H A Ddrxj.h264 * /enum enum drxj_xtal_freq * Supported external crystal reference frequency.
273 * /enum enum drxj_xtal_freq * Supported external crystal reference frequency.
280 * /struct struct drxj_cfg_hw_cfg * Get hw configuration, such as crystal reference frequency, I2C speed, etc...
284 /**< crystal reference frequency */
/linux-4.4.14/drivers/phy/
H A Dphy-pistachio-usb.c75 dev_err(p_phy->dev, "Unsupported rate for XO crystal: %ld\n", pistachio_usb_phy_power_on()
H A Dphy-miphy28lp.c174 * 0: 30MHz crystal clk - 1: 100MHz ext clk routed through MiPHY1
176 * 1: 30MHz crystal clk - 0: 100MHz ext clk routed through MiPHY1
/linux-4.4.14/include/linux/bcma/
H A Dbcma_driver_chipcommon.h225 #define BCMA_CC_SLOWCLKCTL_SRC_XTAL 0x00000001 /* source of slow clock is crystal */
231 #define BCMA_CC_SLOWCLKCTL_ENXTAL 0x00002000 /* XtalControlEn, 1/0: power logic does/doesn't disable crystal when appropriate */
232 #define BCMA_CC_SLOWCLKCTL_XTALPU 0x00004000 /* XtalPU (RO), 1/0: crystal running/disabled */
570 u32 crystalfreq; /* The active crystal frequency (in kHz) */
/linux-4.4.14/arch/sh/boards/
H A Dboard-urquell.c187 * Only handle the EXTAL case, anyone interfacing a crystal urquell_clk_init()
/linux-4.4.14/arch/sh/boards/mach-sdk7786/
H A Dsetup.c198 * Only handle the EXTAL case, anyone interfacing a crystal sdk7786_clk_init()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dpll.c366 info->refclk = device->crystal; nvbios_pll_parse()
398 if (device->crystal == 13500) { nvbios_pll_parse()
/linux-4.4.14/drivers/clk/pxa/
H A Dclk-pxa3xx.c40 /* crystal frequency to HSIO bus frequency multiplier (HSS) */
43 /* crystal frequency to static memory controller multiplier (SMCFS) */
/linux-4.4.14/drivers/ssb/
H A Ddriver_chipcommon_pmu.c89 /* Tune the PLL to the crystal speed. crystalfreq is in kHz. */ ssb_pmu0_pllinit_r0()
220 /* Tune the PLL to the crystal speed. crystalfreq is in kHz. */ ssb_pmu1_pllinit_r0()
232 * the default crystal settings work out-of-the-box. */ ssb_pmu1_pllinit_r0()
H A Dpci.c84 /* Enable/disable the on board crystal oscillator and/or PLL. */ ssb_pci_xtal()
113 /* Turn the crystal on */ ssb_pci_xtal()
145 /* Turn the crystal off */ ssb_pci_xtal()
H A Ddriver_chipcommon.c80 ssb_pci_xtal(bus, SSB_GPIO_XTAL, 1); /* Force crystal on */ ssb_chipco_set_clockmode()
/linux-4.4.14/drivers/media/dvb-frontends/
H A Dzl10039.c203 /* Assumed 10.111 MHz crystal oscillator */ zl10039_set_params()
H A Dl64781.c129 /* The Grundig 29504-401.04 Tuner comes with 18.432MHz crystal. */ apply_frontend_param()
H A Dtda1004x.c658 tda1004x_write_byteI(state, TDA1004X_AUTO, 0x87); // 100 ppm crystal, select HP stream tda10046_init()
H A Ddib0090.c1581 /* Congigure in function of the crystal */ dib0090_reset()
/linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Ddevice.h96 u32 crystal; member in struct:nvkm_device
/linux-4.4.14/drivers/clk/
H A Dclk-wm831x.c191 /* AUTO mode is always clocked from the crystal */ wm831x_fll_get_parent()
/linux-4.4.14/arch/mips/pnx833x/common/
H A Dinterrupts.c301 /* Functional clock is disabled so use crystal frequency */ plat_time_init()
/linux-4.4.14/arch/arm/mach-imx/
H A Dmach-mx27ads.c65 /* to determine the correct external crystal reference */
/linux-4.4.14/arch/mips/alchemy/common/
H A Dclock.c7 * - Root source, usually 12MHz supplied by an external crystal
1044 /* Root of the Alchemy clock tree: external 12MHz crystal osc */ alchemy_clk_init()
/linux-4.4.14/arch/mips/cavium-octeon/
H A Docteon-platform.c119 if (!i && strcmp("crystal", clock_type) == 0) octeon2_usb_clocks_start()
937 /* Missing "refclk-type" defaults to crystal. */ octeon_prune_device_tree()
/linux-4.4.14/arch/arm/mach-omap2/
H A Dtimer.c570 * Errata i856 says the 32.768KHz crystal does not start at realtime_counter_init()
578 * crystal would also need this fix even if the CPU is fixed realtime_counter_init()
H A Dopp2xxx.h43 unsigned long xtal_speed; /* crystal rate */
/linux-4.4.14/sound/pci/ice1712/
H A Dprodigy192.c9 * * 49.5MHz crystal
772 [ICE_EEP2_SYSCONF] = 0x6a, /* 49MHz crystal, mpu401,
H A Dice1724.c2211 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC,
/linux-4.4.14/arch/alpha/kernel/
H A Dtime.c314 /* Allow for some drift in the crystal. 10MHz is more than enough. */ validate_cc_value()
H A Dcore_cia.c791 or 16.667M crystal oscillator. PYXIS_RT_COUNT clock is pyxis_init_arch()
/linux-4.4.14/arch/m68k/include/asm/
H A Dm525xsim.h262 * is fitted with 11.2896MHz crystal. It will program the
/linux-4.4.14/drivers/net/wireless/ath/ath5k/
H A Dreset.c272 * If there is an external 32KHz crystal available, use it
287 * 32KHz crystal present */ ath5k_hw_set_sleep_clock()
1364 * external 32KHz crystal when sleeping if one ath5k_hw_reset()
H A Deeprom.h101 #define AR5K_EEPROM_HAS32KHZCRYSTAL(_v) (((_v) >> 14) & 0x1) /* has 32KHz crystal for sleep mode */
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dbase.c2473 /* determine frequency of timing crystal */
2481 case 0x00000000: device->crystal = 13500; break;
2482 case 0x00000040: device->crystal = 14318; break;
2483 case 0x00400000: device->crystal = 27000; break;
2484 case 0x00400040: device->crystal = 25000; break;
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramgk104.c980 gk104_pll_calc_hiclk(int target_khz, int crystal, gk104_pll_calc_hiclk() argument
997 cur_clk = gk104_calc_pll_output(0, 1, n_ref, p_ref, crystal); gk104_pll_calc_hiclk()
1027 *fN1 = (u16)((((best_err / *N2 * *P2) * (*P1 * *M1)) << 13) / crystal); gk104_pll_calc_hiclk()
1031 return gk104_calc_pll_output(*fN1, 1, *N1, *P1, crystal); gk104_pll_calc_hiclk()
1059 ret = gk104_pll_calc_hiclk(next->freq, subdev->device->crystal, gk104_ram_calc_xits()
/linux-4.4.14/drivers/staging/octeon-usb/
H A Docteon-hcd.h1599 * '0' The USB-PHY uses a 12MHz crystal as a clock source
1613 * '3' The XO block uses the clock from a crystal.
1621 * Selects the reference clock / crystal frequency.
1623 * '10': 48 MHz (reserved when a crystal is used)
1624 * '01': 24 MHz (reserved when a crystal is used)
1628 * NOTE: if a crystal is used as a reference clock,
H A Docteon-hcd.c189 * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI: The USB port uses a 12MHz crystal
197 * crystal
741 * 2b. Select the USB reference clock/crystal parameters by writing cvmx_usb_initialize()
773 * The USB port uses a 12MHz crystal as clock source cvmx_usb_initialize()
3621 if (!i && strcmp("crystal", clock_type) == 0) octeon_usb_probe()
/linux-4.4.14/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h261 * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz
423 * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz
747 * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz
878 * fxtl, Txtl Frequency, period of the system crystal (3.6864 MHz
977 /* 3.6864 MHz crystal (fxtl): */
994 /* 3.5795 MHz crystal (fxtl): */
/linux-4.4.14/drivers/net/irda/
H A Dtoim3232-sir.c112 * - 3.6864MHz crystal to drive TOIM3232 clock oscillator
/linux-4.4.14/drivers/clk/at91/
H A Dclk-main.c393 pr_warn("Main crystal frequency not set, using approximate value\n"); clk_main_recalc_rate()
/linux-4.4.14/drivers/clk/nxp/
H A Dclk-lpc18xx-cgu.c612 /* Register crystal oscillator controlller */ lpc18xx_cgu_register_source_clks()
/linux-4.4.14/arch/arm/mach-lpc32xx/include/mach/
H A Dplatform.h122 * Clock and crystal information
/linux-4.4.14/sound/pci/
H A Dazt3328.h68 * All we know is that the crystal used on the board has 24.576MHz,
H A Dazt3328.c2177 *** (probably derived from main crystal via a divider of 24),
/linux-4.4.14/drivers/usb/musb/
H A Ddavinci.c402 * is clocked from the main 24 MHz crystal. davinci_musb_init()
/linux-4.4.14/drivers/usb/serial/
H A Dark3116.c735 * The baudrate seems to be generated from the 12MHz crystal, using
H A Dmos7720.c1412 * These assume a 3.6864MHz crystal, the standard /16, and *
H A Dio_edgeport.c158 * These assume a 3.6864MHz crystal, the standard /16, and
/linux-4.4.14/drivers/media/i2c/soc_camera/
H A Dtw9910.c133 #define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */
/linux-4.4.14/drivers/media/pci/saa7134/
H A Dsaa7134-tvaudio.c50 MODULE_PARM_DESC(audio_clock_tweak, "Audio clock tick fine tuning for cards with audio crystal that's slightly off (range [-1024 .. 1024])");
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dradeon_drv.c56 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
H A Datombios.h2404 UCHAR ucTV_OutInfo; // Type of TV out supported (3:0) and video out crystal frequency (6:4) and TV data port (7)
/linux-4.4.14/drivers/mfd/
H A Drtsx_usb.c567 /* config non-crystal mode */ rtsx_usb_reset_chip()
H A Dwm831x-core.c1834 /* The RTC can only be used if the 32.768kHz crystal is wm831x_device_init()
/linux-4.4.14/drivers/net/wireless/iwlwifi/dvm/
H A Ddev.h600 * @no_xtal_calib: some devices do not need crystal calibration data,
/linux-4.4.14/drivers/gpu/drm/gma500/
H A Dpsb_drv.h239 /* Medfield crystal settings */
/linux-4.4.14/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper-board.c775 /* Most boards except NIC10e use a 12MHz crystal */ __cvmx_helper_board_usb_get_clock_type()
/linux-4.4.14/arch/arm/mach-davinci/
H A Ddm355.c59 /* FIXME -- crystal rate is board-specific */
/linux-4.4.14/drivers/video/fbdev/
H A Dgbefb.c475 * GBE crystal runs at 20Mhz or 27Mhz compute_gbe_timing()
/linux-4.4.14/drivers/media/usb/go7007/
H A Dgo7007-v4l2.c1156 /* Setup correct crystal frequency on this board */ go7007_v4l2_init()
/linux-4.4.14/include/uapi/drm/
H A Dradeon_drm.h998 #define RADEON_INFO_CLOCK_CRYSTAL_FREQ 0x09 /* clock crystal frequency */
/linux-4.4.14/arch/arm/mach-lpc32xx/
H A Dclock.c63 * oscillator/crystal rate on the mosc_in pin of the LPC32xx. This rate
/linux-4.4.14/sound/ppc/
H A Dawacs.c104 /* delay for broken crystal part */ screamer_recalibrate()
/linux-4.4.14/drivers/net/wireless/rt2x00/
H A Drt2800.h2524 * CRYSTAL: 00: Reserved, 01: One crystal, 10: Two crystal, 11: Reserved
/linux-4.4.14/drivers/net/wireless/b43/
H A Dphy_lp.c555 /* Get the crystal freq, in Hz. */ lpphy_2062_init()
591 b43dbg(dev->wl, "b2062: Using crystal tab entry %u kHz.\n", lpphy_2062_init()
/linux-4.4.14/sound/oss/
H A Dswarm_cs4297a.c9 * -- tom woller (twoller@crystal.cirrus.com) or
10 * (audio@crystal.cirrus.com).
H A Dad1848.c2709 * selected crystal oscillator. Check this from bit 0x01 of I8. ad1848_tmr_start()
/linux-4.4.14/drivers/media/pci/ivtv/
H A Divtv-driver.c955 /* The crystal frequency of GVMVPRX is 24.576MHz */ ivtv_load_and_init_modules()
/linux-4.4.14/drivers/net/ieee802154/
H A Dat86rf230.c1429 * CL = capacitor of used crystal at86rf230_hw_init()
/linux-4.4.14/arch/avr32/mach-at32ap/
H A Dat32ap700x.c292 * oscillator, two crystal oscillators and two PLLs.
/linux-4.4.14/drivers/media/i2c/
H A Dsaa7115.c620 R_F2_NOMINAL_PLL2_DTO, 0x50, /* crystal clock = 24.576 MHz, target = 27MHz */
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
H A Dhw.c770 /* 1. 40Mhz crystal source*/ _rtl92ee_init_mac()
/linux-4.4.14/drivers/net/ethernet/cirrus/
H A Dcs89x0.c15 * Melody Lee : ethernet@crystal.cirrus.com
/linux-4.4.14/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Ddm.c2929 "New crystal cap = 0x%x\n", rtl8821ae_dm_dynamic_atc_switch()
/linux-4.4.14/drivers/crypto/
H A Dhifn_795x.c969 * has an external crystal populated at 66MHz.
/linux-4.4.14/drivers/atm/
H A Dhorizon.c231 (determined by the clock crystal, a fixed (?) per-device divider, a
/linux-4.4.14/drivers/isdn/hardware/mISDN/
H A Dhfcmulti.c999 /* Use the crystal clock for the PCM hfcmulti_resync()
/linux-4.4.14/drivers/media/pci/bt8xx/
H A Dbttv-cards.c134 MODULE_PARM_DESC(pll, "specify installed crystal (0=none, 28=28 MHz, 35=35 MHz, 14=14 MHz)");
H A Dbttv-driver.c792 /* If Bt848a or Bt849, use PLL for PAL/SECAM and crystal for NTSC */
/linux-4.4.14/drivers/gpu/drm/amd/include/
H A Datombios.h2474 UCHAR ucTV_OutInfo; // Type of TV out supported (3:0) and video out crystal frequency (6:4) and TV data port (7)

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