Searched refs:clk_regmap (Results 1 - 23 of 23) sorted by relevance

/linux-4.4.14/drivers/clk/qcom/
H A Dclk-regmap.c27 * enable_reg and enable_mask fields in their struct clk_regmap and then use
32 struct clk_regmap *rclk = to_clk_regmap(hw); clk_is_enabled_regmap()
53 * enable_reg and enable_mask fields in their struct clk_regmap and then use
58 struct clk_regmap *rclk = to_clk_regmap(hw); clk_enable_regmap()
77 * enable_reg and enable_mask fields in their struct clk_regmap and then use
82 struct clk_regmap *rclk = to_clk_regmap(hw); clk_disable_regmap()
96 * devm_clk_register_regmap - register a clk_regmap clock
101 * clk_regmap struct via this function so that the regmap is initialized
105 struct clk_regmap *rclk) devm_clk_register_regmap()
H A Dclk-regmap.h22 * struct clk_regmap - regmap supporting clock
30 struct clk_regmap { struct
37 #define to_clk_regmap(_hw) container_of(_hw, struct clk_regmap, hw)
43 devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk);
H A Dclk-regmap-divider.h24 struct clk_regmap clkr;
H A Dclk-regmap-mux.h24 struct clk_regmap clkr;
H A Dclk-regmap-divider.c39 struct clk_regmap *clkr = &divider->clkr; div_set_rate()
54 struct clk_regmap *clkr = &divider->clkr; div_recalc_rate()
H A Dclk-regmap-mux.c29 struct clk_regmap *clkr = to_clk_regmap(hw); mux_get_parent()
44 struct clk_regmap *clkr = to_clk_regmap(hw); mux_set_parent()
H A Dcommon.h18 struct clk_regmap;
27 struct clk_regmap **clks;
H A Dclk-rcg.h104 struct clk_regmap clkr;
143 struct clk_regmap clkr;
170 struct clk_regmap clkr;
H A Dclk-branch.h46 struct clk_regmap clkr;
H A Dclk-pll.h60 struct clk_regmap clkr;
H A Dcommon.c102 struct clk_regmap **rclks = desc->clks; qcom_cc_really_probe()
H A Dlcc-ipq806x.c401 static struct clk_regmap *lcc_ipq806x_clks[] = {
H A Dgcc-ipq806x.c51 static struct clk_regmap pll0_vote = {
78 static struct clk_regmap pll4_vote = {
105 static struct clk_regmap pll8_vote = {
132 static struct clk_regmap pll14_vote = {
2722 static struct clk_regmap *gcc_ipq806x_clks[] = {
H A Dgcc-msm8974.c83 static struct clk_regmap gpll0_vote = {
146 static struct clk_regmap gpll1_vote = {
173 static struct clk_regmap gpll4_vote = {
1048 static struct clk_regmap gcc_mmss_gpll0_clk_src = {
2444 static struct clk_regmap *gcc_msm8974_clocks[] = {
H A Dlcc-msm8960.c486 static struct clk_regmap *lcc_msm8960_clks[] = {
H A Dgcc-msm8916.c285 static struct clk_regmap gpll0_vote = {
312 static struct clk_regmap gpll1_vote = {
339 static struct clk_regmap gpll2_vote = {
366 static struct clk_regmap bimc_pll_vote = {
3071 static struct clk_regmap *gcc_msm8916_clocks[] = {
H A Dgcc-msm8960.c51 static struct clk_regmap pll4_vote = {
78 static struct clk_regmap pll8_vote = {
105 static struct clk_regmap pll14_vote = {
3037 static struct clk_regmap *gcc_msm8960_clks[] = {
3262 static struct clk_regmap *gcc_apq8064_clks[] = {
H A Dmmcc-msm8960.c528 struct clk_regmap clkr;
2657 static struct clk_regmap *mmcc_msm8960_clks[] = {
2841 static struct clk_regmap *mmcc_apq8064_clks[] = {
H A Dmmcc-msm8974.c205 static struct clk_regmap mmpll0_vote = {
232 static struct clk_regmap mmpll1_vote = {
2406 static struct clk_regmap *mmcc_msm8974_clocks[] = {
H A Dgcc-apq8084.c127 static struct clk_regmap gpll0_vote = {
190 static struct clk_regmap gpll1_vote = {
217 static struct clk_regmap gpll4_vote = {
3290 static struct clk_regmap *gcc_apq8084_clocks[] = {
H A Dmmcc-apq8084.c240 static struct clk_regmap mmpll0_vote = {
267 static struct clk_regmap mmpll1_vote = {
3137 static struct clk_regmap *mmcc_apq8084_clocks[] = {
H A Dgcc-msm8660.c51 static struct clk_regmap pll8_vote = {
2467 static struct clk_regmap *gcc_msm8660_clks[] = {
/linux-4.4.14/sound/soc/bcm/
H A Dbcm2835-i2s.c173 struct regmap *clk_regmap; member in struct:bcm2835_i2s_dev
184 regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, bcm2835_i2s_start_clock()
199 regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, bcm2835_i2s_stop_clock()
205 regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); bcm2835_i2s_stop_clock()
213 regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, bcm2835_i2s_stop_clock()
241 regmap_read(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, &clkreg); bcm2835_i2s_clear_fifos()
246 regmap_update_bits(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, bcm2835_i2s_clear_fifos()
414 regmap_write(dev->clk_regmap, BCM2835_CLK_PCMDIV_REG, BCM2835_CLK_PASSWD bcm2835_i2s_hw_params()
419 regmap_write(dev->clk_regmap, BCM2835_CLK_PCMCTL_REG, BCM2835_CLK_PASSWD bcm2835_i2s_hw_params()
816 dev->clk_regmap = regmap[1]; bcm2835_i2s_probe()

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