Searched refs:__raw_readw (Results 1 - 169 of 169) sorted by relevance

/linux-4.4.14/arch/sh/kernel/cpu/sh3/
H A Dserial-sh7710.c12 __raw_writew(__raw_readw(PACR) & 0xffc0, PACR); sh7710_sci_init_pins()
13 __raw_writew(__raw_readw(PBCR) & 0x0fff, PBCR); sh7710_sci_init_pins()
15 __raw_writew(__raw_readw(PBCR) & 0xf003, PBCR); sh7710_sci_init_pins()
H A Dserial-sh7720.c15 data = __raw_readw(PORT_PTCR); sh7720_sci_init_pins()
19 data = __raw_readw(PORT_PVCR); sh7720_sci_init_pins()
25 data = __raw_readw(PORT_PTCR); sh7720_sci_init_pins()
29 data = __raw_readw(PORT_PVCR); sh7720_sci_init_pins()
H A Dserial-sh770x.c14 data = __raw_readw(SCPCR); sh770x_sci_init_pins()
20 data = __raw_readw(SCPCR); sh770x_sci_init_pins()
H A Dclock-sh3.c31 int frqcr = __raw_readw(FRQCR); master_clk_init()
43 int frqcr = __raw_readw(FRQCR); module_clk_recalc()
55 int frqcr = __raw_readw(FRQCR); bus_clk_recalc()
67 int frqcr = __raw_readw(FRQCR); cpu_clk_recalc()
H A Dclock-sh7705.c35 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0003]; master_clk_init()
44 int idx = __raw_readw(FRQCR) & 0x0003; module_clk_recalc()
54 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8; bus_clk_recalc()
64 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4; cpu_clk_recalc()
H A Dclock-sh7706.c27 int frqcr = __raw_readw(FRQCR); master_clk_init()
39 int frqcr = __raw_readw(FRQCR); module_clk_recalc()
51 int frqcr = __raw_readw(FRQCR); bus_clk_recalc()
63 int frqcr = __raw_readw(FRQCR); cpu_clk_recalc()
H A Dclock-sh7709.c27 int frqcr = __raw_readw(FRQCR); master_clk_init()
39 int frqcr = __raw_readw(FRQCR); module_clk_recalc()
51 int frqcr = __raw_readw(FRQCR); bus_clk_recalc()
64 int frqcr = __raw_readw(FRQCR); cpu_clk_recalc()
H A Dclock-sh7710.c29 clk->rate *= md_table[__raw_readw(FRQCR) & 0x0007]; master_clk_init()
38 int idx = (__raw_readw(FRQCR) & 0x0007); module_clk_recalc()
48 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8; bus_clk_recalc()
58 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4; cpu_clk_recalc()
H A Dclock-sh7712.c26 int frqcr = __raw_readw(FRQCR); master_clk_init()
38 int frqcr = __raw_readw(FRQCR); module_clk_recalc()
50 int frqcr = __raw_readw(FRQCR); cpu_clk_recalc()
H A Dsetup-sh3.c61 __raw_writew(__raw_readw(INTC_ICR1) & ~INTC_ICR1_IRQLVL, INTC_ICR1); plat_irq_setup_pins()
/linux-4.4.14/arch/sh/include/mach-se/mach/
H A Dmrshpc.h8 if ((__raw_readw(MRSHPC_CSR) & 0x000c) != 0) mrshpc_setup_windows()
11 if ((__raw_readw(MRSHPC_CSR) & 0x0080) == 0) { mrshpc_setup_windows()
23 if((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) mrshpc_setup_windows()
32 if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) mrshpc_setup_windows()
42 if ((__raw_readw(MRSHPC_CSR) & 0x4000) != 0) mrshpc_setup_windows()
/linux-4.4.14/arch/sh/boards/mach-se/7206/
H A Dirq.c36 val = __raw_readw(INTC_IPR01); disable_se7206_irq()
40 msk0 = __raw_readw(INTMSK0); disable_se7206_irq()
41 msk1 = __raw_readw(INTMSK1); disable_se7206_irq()
67 val = __raw_readw(INTC_IPR01); enable_se7206_irq()
72 msk0 = __raw_readw(INTMSK0); enable_se7206_irq()
73 msk1 = __raw_readw(INTMSK1); enable_se7206_irq()
99 sts0 = __raw_readw(INTSTS0); eoi_se7206_irq()
100 sts1 = __raw_readw(INTSTS1); eoi_se7206_irq()
142 __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR1); /* ICR1 */ init_se7206_IRQ()
/linux-4.4.14/arch/sh/boot/romimage/
H A Dmmcif-sh7724.c42 __raw_writew(__raw_readw(PTXCR) & ~0x000f, PTXCR); mmcif_loader()
45 __raw_writew(__raw_readw(PSELA) & ~0x2000, PSELA); mmcif_loader()
48 __raw_writew(__raw_readw(PSELE) & ~0x3000, PSELE); mmcif_loader()
51 __raw_writew(__raw_readw(HIZCRC) & ~0x0620, HIZCRC); mmcif_loader()
54 __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA); mmcif_loader()
/linux-4.4.14/arch/sh/boards/mach-sh7763rdp/
H A Dsetup.c167 if (__raw_readw(CPLD_BOARD_ID_ERV_REG) == 0xECB1) sh7763rdp_setup()
173 __raw_writew((__raw_readw(PORT_PSEL2) & 0xFFC3), PORT_PSEL2); sh7763rdp_setup()
175 __raw_writew(__raw_readw(PORT_PICR) & 0xFC0F, PORT_PICR); sh7763rdp_setup()
182 __raw_writew(__raw_readw(PORT_PJCR) & 0x0003, PORT_PJCR); sh7763rdp_setup()
184 __raw_writew(__raw_readw(PORT_PICR) & 0xF3FF, PORT_PICR); sh7763rdp_setup()
188 __raw_writew((__raw_readw(PORT_PSEL2) & 0x00C0), PORT_PSEL2); sh7763rdp_setup()
190 __raw_writew((__raw_readw(PORT_PSEL3) & 0x0700), PORT_PSEL3); sh7763rdp_setup()
194 __raw_writew((__raw_readw(PORT_PSEL1) & 0xFFF0) | 0x0004, PORT_PSEL1); sh7763rdp_setup()
196 __raw_writew(__raw_readw(PORT_PSEL4) | 0x4000, PORT_PSEL4); sh7763rdp_setup()
199 __raw_writew((__raw_readw(PORT_PSEL1) & ~0xff00) | 0x2400, PORT_PSEL1); sh7763rdp_setup()
209 __raw_writew(__raw_readw(PORT_PACR) & ~0x3000, PORT_PACR); sh7763rdp_setup()
210 __raw_writew(__raw_readw(PORT_PCCR) & ~0xCFC3, PORT_PCCR); sh7763rdp_setup()
/linux-4.4.14/arch/sh/kernel/cpu/sh2a/
H A Dclock-sh7201.c30 pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; master_clk_init()
39 int idx = (__raw_readw(FREQCR) & 0x0007); module_clk_recalc()
49 int idx = (__raw_readw(FREQCR) & 0x0007); bus_clk_recalc()
59 int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007); cpu_clk_recalc()
H A Dclock-sh7206.c29 clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; master_clk_init()
38 int idx = (__raw_readw(FREQCR) & 0x0007); module_clk_recalc()
48 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0007]; bus_clk_recalc()
57 int idx = (__raw_readw(FREQCR) & 0x0007); cpu_clk_recalc()
H A Dclock-sh7203.c32 clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult; master_clk_init()
41 int idx = (__raw_readw(FREQCR) & 0x0007); module_clk_recalc()
51 int idx = (__raw_readw(FREQCR) & 0x0007); bus_clk_recalc()
H A Dclock-sh7264.c47 return rate * pll1rate[(__raw_readw(FRQCR) >> 8) & 1]; pll_recalc()
/linux-4.4.14/arch/sh/kernel/cpu/sh4/
H A Dclock-sh4.c31 clk->rate *= pfc_divisors[__raw_readw(FRQCR) & 0x0007]; master_clk_init()
40 int idx = (__raw_readw(FRQCR) & 0x0007); module_clk_recalc()
50 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007; bus_clk_recalc()
60 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007; cpu_clk_recalc()
H A Dperf_event.c215 tmp = __raw_readw(PMCR(idx)); sh7750_pmu_disable()
222 __raw_writew(__raw_readw(PMCR(idx)) | PMCR_PMCLR, PMCR(idx)); sh7750_pmu_enable()
231 __raw_writew(__raw_readw(PMCR(i)) & ~PMCR_PMEN, PMCR(i)); sh7750_pmu_disable_all()
239 __raw_writew(__raw_readw(PMCR(i)) | PMCR_PMEN, PMCR(i)); sh7750_pmu_enable_all()
H A Dsetup-sh4-202.c136 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); plat_irq_setup_pins()
H A Dsetup-sh7750.c360 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); plat_irq_setup_pins()
H A Dsetup-sh7760.c287 __raw_writew(__raw_readw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); plat_irq_setup_pins()
/linux-4.4.14/arch/sh/kernel/cpu/sh4a/
H A Dserial-sh7722.c12 data = __raw_readw(PSCR); sh7722_sci_init_pins()
H A Dsetup-sh7724.c1187 sh7724_rstandby_state.ipra = __raw_readw(0xa4080000); /* IPRA */ sh7724_pre_sleep_notifier_call()
1188 sh7724_rstandby_state.iprb = __raw_readw(0xa4080004); /* IPRB */ sh7724_pre_sleep_notifier_call()
1189 sh7724_rstandby_state.iprc = __raw_readw(0xa4080008); /* IPRC */ sh7724_pre_sleep_notifier_call()
1190 sh7724_rstandby_state.iprd = __raw_readw(0xa408000c); /* IPRD */ sh7724_pre_sleep_notifier_call()
1191 sh7724_rstandby_state.ipre = __raw_readw(0xa4080010); /* IPRE */ sh7724_pre_sleep_notifier_call()
1192 sh7724_rstandby_state.iprf = __raw_readw(0xa4080014); /* IPRF */ sh7724_pre_sleep_notifier_call()
1193 sh7724_rstandby_state.iprg = __raw_readw(0xa4080018); /* IPRG */ sh7724_pre_sleep_notifier_call()
1194 sh7724_rstandby_state.iprh = __raw_readw(0xa408001c); /* IPRH */ sh7724_pre_sleep_notifier_call()
1195 sh7724_rstandby_state.ipri = __raw_readw(0xa4080020); /* IPRI */ sh7724_pre_sleep_notifier_call()
1196 sh7724_rstandby_state.iprj = __raw_readw(0xa4080024); /* IPRJ */ sh7724_pre_sleep_notifier_call()
1197 sh7724_rstandby_state.iprk = __raw_readw(0xa4080028); /* IPRK */ sh7724_pre_sleep_notifier_call()
1198 sh7724_rstandby_state.iprl = __raw_readw(0xa408002c); /* IPRL */ sh7724_pre_sleep_notifier_call()
/linux-4.4.14/arch/sparc/include/asm/
H A Dide.h44 *ps++ = __raw_readw(port); __ide_insw()
51 w = __raw_readw(port) << 16; __ide_insw()
52 w |= __raw_readw(port); __ide_insw()
58 *ps++ = __raw_readw(port); __ide_insw()
H A Dio.h15 #define readw_be(__addr) __raw_readw(__addr)
H A Dio_64.h31 #define __raw_readw __raw_readw __raw_readw() macro
32 static inline u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
289 return __raw_readw(addr); sbus_readw()
413 #define ioread16be __raw_readw
/linux-4.4.14/arch/sh/cchips/hd6446x/
H A Dhd64461.c26 nimr = __raw_readw(HD64461_NIMR); hd64461_mask_irq()
37 nimr = __raw_readw(HD64461_NIMR); hd64461_unmask_irq()
61 unsigned short intv = __raw_readw(HD64461_NIRR); hd64461_irq_demux()
/linux-4.4.14/arch/sh/kernel/cpu/sh2/
H A Dclock-sh7619.c28 clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; master_clk_init()
37 int idx = (__raw_readw(FREQCR) & 0x0007); module_clk_recalc()
47 return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7]; bus_clk_recalc()
/linux-4.4.14/arch/sh/kernel/cpu/sh5/
H A Dclock-sh5.c37 int idx = (__raw_readw(cprc_base) >> 12) & 0x0007; module_clk_recalc()
47 int idx = (__raw_readw(cprc_base) >> 3) & 0x0007; bus_clk_recalc()
57 int idx = (__raw_readw(cprc_base) & 0x0007); cpu_clk_recalc()
/linux-4.4.14/arch/arm/mach-imx/
H A D3ds_debugboard.c97 imr_val = __raw_readw(brd_io + INTR_MASK_REG); mxc_expio_irq_handler()
98 int_valid = __raw_readw(brd_io + INTR_STATUS_REG) & ~imr_val; mxc_expio_irq_handler()
120 reg = __raw_readw(brd_io + INTR_MASK_REG); expio_mask_irq()
139 reg = __raw_readw(brd_io + INTR_MASK_REG); expio_unmask_irq()
165 if ((__raw_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) || mxc_expio_init()
166 (__raw_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) || mxc_expio_init()
167 (__raw_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) { mxc_expio_init()
H A Dmach-mx31ads.c163 imr_val = __raw_readw(PBC_INTMASK_SET_REG); mx31ads_expio_irq_handler()
164 int_valid = __raw_readw(PBC_INTSTATUS_REG) & imr_val; mx31ads_expio_irq_handler()
184 __raw_readw(PBC_INTMASK_CLEAR_REG); expio_mask_irq()
H A Dmach-mx27ads.c367 if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0) mx27ads_timer_init()
/linux-4.4.14/arch/sh/boards/mach-hp6xx/
H A Dpm.c57 frqcr = __raw_readw(FRQCR); pm_enter()
66 mcr = __raw_readw(MCR); pm_enter()
87 frqcr = __raw_readw(FRQCR); pm_enter()
H A Dsetup.c162 v = __raw_readw(SCPCR); hp6xx_setup()
/linux-4.4.14/arch/sh/boards/mach-x3proto/
H A Dgpio.c38 data = __raw_readw(KEYCTLR); x3proto_gpio_direction_input()
48 return !!(__raw_readw(KEYDETR) & (1 << gpio)); x3proto_gpio_get()
72 mask = __raw_readw(KEYDETR); x3proto_gpio_irq_handler()
H A Dilsel.c77 tmp = __raw_readw(addr); __ilsel_enable()
153 tmp = __raw_readw(addr); ilsel_disable()
/linux-4.4.14/arch/sh/kernel/cpu/irq/
H A Dipr.c38 __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr); disable_ipr_irq()
39 (void)__raw_readw(addr); /* Read back to flush write posting */ disable_ipr_irq()
47 __raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr); enable_ipr_irq()
/linux-4.4.14/arch/sparc/lib/
H A DPeeCeeI.c124 *ps++ = __raw_readw(addr); insw()
131 w = __raw_readw(addr) << 16; insw()
132 w |= __raw_readw(addr) << 0; insw()
138 *ps = __raw_readw(addr); insw()
/linux-4.4.14/arch/sh/boards/mach-se/7721/
H A Dirq.c41 __raw_writew(__raw_readw(0xa4050118) & ~0x00ff, 0xa4050118); init_se7721_IRQ()
/linux-4.4.14/arch/sh/boards/mach-sdk7780/
H A Dsetup.c77 u16 ver = __raw_readw(FPGA_FPVERR); sdk7780_setup()
78 u16 dateStamp = __raw_readw(FPGA_FPDATER); sdk7780_setup()
/linux-4.4.14/arch/sh/include/mach-common/mach/
H A Dmagicpanelr2.h23 #define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg)
26 #define CLRBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) & ~mask, reg)
/linux-4.4.14/arch/microblaze/include/asm/
H A Dio.h54 #define in_be16(a) __raw_readw(a)
64 #define in_le16(a) __le16_to_cpu(__raw_readw(a))
/linux-4.4.14/arch/arc/include/asm/
H A Dio.h37 #define ioread16be(p) ({ u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
60 #define __raw_readw __raw_readw __raw_readw() macro
61 static inline u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
151 __raw_readw(c)); __r; })
/linux-4.4.14/arch/sh/boards/mach-se/7724/
H A Dirq.c78 __raw_writew(__raw_readw(set.mraddr) | 0x0001 << bit, set.mraddr); disable_se7724_irq()
86 __raw_writew(__raw_readw(set.mraddr) & ~(0x0001 << bit), set.mraddr); enable_se7724_irq()
99 unsigned short intv = __raw_readw(set.sraddr); se7724_irq_demux()
H A Dsetup.c616 if (!__raw_readw(EEPROM_STAT)) sh_eth_is_eeprom_ready()
642 mac = __raw_readw(EEPROM_DATA); sh_eth_init()
678 u16 sw = __raw_readw(SW4140); /* select camera, monitor */ devices_setup()
694 fpga_out = __raw_readw(FPGA_OUT); devices_setup()
716 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); devices_setup()
779 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); devices_setup()
/linux-4.4.14/arch/mips/alchemy/devboards/
H A Dbcsr.c54 r = __raw_readw(bcsr_regs[reg].raddr); bcsr_read()
77 r = __raw_readw(bcsr_regs[reg].raddr); bcsr_mod()
91 unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT); bcsr_csc_handler()
/linux-4.4.14/arch/m68k/coldfire/
H A Dintc.c48 imr = __raw_readw(MCFSIM_IMR); mcf_setimr()
55 imr = __raw_readw(MCFSIM_IMR); mcf_clrimr()
62 imr = __raw_readw(MCFSIM_IMR); mcf_maskimr()
H A Dpit.c103 pcsr = __raw_readw(TA(MCFPIT_PCSR)); pit_tick()
128 pcntr = __raw_readw(TA(MCFPIT_PCNTR)); pit_read_clk()
H A Dtimers.c43 #define __raw_readtrr __raw_readw
99 tcn = __raw_readw(TA(MCFTIMER_TCN)); mcftmr_read_clk()
H A Dpci.c97 *value = le16_to_cpu(__raw_readw(addr)); mcf_pci_readconfig()
159 return le16_to_cpu(__raw_readw(iospace + (addr & PCI_IO_MASK))); mcf_pci_inw()
H A Dintc-2.c170 pa = __raw_readw(MCFEPORT_EPPAR); intc_irq_set_type()
H A Dintc-simr.c154 pa = __raw_readw(MCFEPORT_EPPAR); intc_irq_set_type()
/linux-4.4.14/arch/tile/include/asm/
H A Dvga.h31 return __raw_readw((volatile const u16 __iomem *) addr); scr_readw()
H A Dio.h84 static inline u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
165 #define __raw_readw(addr) _tile_readw((unsigned long)addr) macro
233 #define readw __raw_readw
/linux-4.4.14/arch/sh/boards/mach-highlander/
H A Dirq-r7780rp.c60 if (__raw_readw(0xa5000600)) { highlander_plat_irq_setup()
H A Dirq-r7780mp.c67 if ((__raw_readw(0xa4000700) & 0xf000) == 0x2000) { highlander_plat_irq_setup()
H A Dirq-r7785rp.c69 if ((__raw_readw(0xa4000158) & 0xf000) != 0x1000) highlander_plat_irq_setup()
H A Dsetup.c316 __raw_writew(__raw_readw(PA_IVDRCTL) | (1 << IVDR_CK_ON), PA_IVDRCTL); ivdr_clk_enable()
322 __raw_writew(__raw_readw(PA_IVDRCTL) & ~(1 << IVDR_CK_ON), PA_IVDRCTL); ivdr_clk_disable()
354 u16 ver = __raw_readw(PA_VERREG); highlander_setup()
386 __raw_writew(__raw_readw(PA_IVDRCTL) | 0x01, PA_IVDRCTL); /* Si13112 */ highlander_setup()
H A Dpsw.c27 l = __raw_readw(PA_DBSW); psw_irq_handler()
/linux-4.4.14/arch/sh/include/mach-ecovec24/mach/
H A Dromimage.h41 __raw_writew(__raw_readw(HIZCRA) & ~(1 << 1), HIZCRA);
/linux-4.4.14/arch/metag/include/asm/
H A Dio.h27 #define __raw_readw __raw_readw __raw_readw() macro
28 static inline u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
123 #define metag_in16(addr) __raw_readw((volatile void __iomem *)(addr))
/linux-4.4.14/arch/parisc/include/asm/
H A Dide.h26 *(u16 *)addr = __raw_readw(port); __ide_mm_insw()
H A Dio.h149 static inline unsigned short __raw_readw(const volatile void __iomem *addr) __raw_readw() function
185 return le16_to_cpu(__raw_readw(addr)); readw()
/linux-4.4.14/arch/arm/mach-omap1/
H A Dreset.c51 rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST)); omap1_get_reset_sources()
H A Dclock.c184 * we must use __raw_readw() instead of omap_readw(). omap1_ckctl_recalc_dsp_domain()
187 dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); omap1_ckctl_recalc_dsp_domain()
240 regval = __raw_readw(DSP_CKCTL); omap1_clk_set_rate_dsp_domain()
360 ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd; omap1_set_ext_clk_rate()
400 ratio_bits = __raw_readw(clk->enable_reg) & ~1; omap1_init_ext_clk()
468 regval16 = __raw_readw(clk->enable_reg); omap1_clk_enable_generic()
489 regval16 = __raw_readw(clk->enable_reg); omap1_clk_disable_generic()
600 regval32 = __raw_readw(clk->enable_reg); omap1_clk_disable_unused()
H A Dio.c156 return __raw_readw(OMAP1_IO_ADDRESS(pa)); omap_readw()
H A Ddma.c198 val = __raw_readw(addr); dma_read()
200 val |= __raw_readw(addr + 2) << 16; dma_read()
H A Dmcbsp.c57 __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN | omap1_mcbsp_request()
H A Dpm.h151 #define DSP_SAVE(x) dsp_sleep_save[DSP_SLEEP_SAVE_##x] = __raw_readw(x)
/linux-4.4.14/sound/soc/sh/
H A Dsh7760-ac97.c44 ipsel = __raw_readw(IPSEL); sh7760_ac97_init()
/linux-4.4.14/arch/sh/boards/
H A Dboard-polaris.c102 wcr = __raw_readw(WCR2); polaris_initialise()
108 bcr_mask = __raw_readw(BCR2); polaris_initialise()
H A Dboard-urquell.c158 __raw_writew(__raw_readw(UBOARDREG(IRL2MSKR)) & ~0x00000001, urquell_devices_setup()
178 return __raw_readw(UBOARDREG(MDSWMR)); urquell_mode_pins()
/linux-4.4.14/arch/arm64/include/asm/
H A Dio.h75 #define __raw_readw __raw_readw __raw_readw() macro
76 static inline u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
121 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16)__raw_readw(c)); __r; })
179 #define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
/linux-4.4.14/arch/arm/mach-ebsa110/
H A Dio.c85 return __raw_readw(a); __readw()
96 ret = __raw_readw(a); __readl()
97 ret |= __raw_readw(a + 4) << 16; __readl()
264 return __raw_readw((void __iomem *)ISAIO_BASE + offset); __inw()
279 return __raw_readw(a) | __raw_readw(a + 4) << 16; __inl()
/linux-4.4.14/drivers/pcmcia/
H A Dpxa2xx_balloon3.c36 ver = __raw_readw(BALLOON3_FPGA_VER); balloon3_pcmcia_hw_init()
63 status = __raw_readw(BALLOON3_CF_STATUS_REG); balloon3_pcmcia_socket_state()
/linux-4.4.14/arch/sh/boards/mach-r2d/
H A Dirq.c132 switch (__raw_readw(PA_VERREG) & 0xf0) { init_rts7751r2d_IRQ()
150 __raw_readw(PA_VERREG)); init_rts7751r2d_IRQ()
H A Dsetup.c274 u16 ver = __raw_readw(PA_VERREG); rts7751r2d_setup()
/linux-4.4.14/arch/sh/boards/mach-se/7722/
H A Dsetup.c183 __raw_writew(__raw_readw(PORT_HIZCRA) & ~0x4000, PORT_HIZCRA); se7722_setup()
184 __raw_writew(__raw_readw(PORT_HIZCRC) & ~0xc000, PORT_HIZCRC); se7722_setup()
/linux-4.4.14/arch/sh/kernel/
H A Diomap.c28 return be16_to_cpu(__raw_readw(addr)); ioread16be()
92 u16 data = __raw_readw(addr); mmio_insw()
H A Dtraps.c132 regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); BUILD_TRAP_HANDLER()
149 regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); BUILD_TRAP_HANDLER()
H A Dkgdb.c50 insn_size_t op = __raw_readw(linux_regs->pc); get_step_address()
147 stepped_opcode = __raw_readw((long)addr); do_single_step()
310 regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); BUILD_TRAP_HANDLER()
H A Dsignal_32.c423 regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); handle_syscall_restart()
483 regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); do_signal()
485 regs->pc -= instruction_size(__raw_readw(regs->pc - 4)); do_signal()
H A Dio_trapped.c193 tmp = __raw_readw(src_addr); copy_word()
/linux-4.4.14/drivers/sh/intc/
H A Daccess.c86 return intc_get_field_from_handle(__raw_readw(ptr), h); test_16()
110 (void)__raw_readw(ptr); /* Defeat write posting */ write_16()
144 value = intc_set_field_from_handle(__raw_readw(ptr), data, h); modify_16()
146 (void)__raw_readw(ptr); /* Defeat write posting */ modify_16()
H A Dchip.c103 __raw_readw(addr); intc_mask_ack()
/linux-4.4.14/arch/alpha/include/asm/
H A Dvga.h27 return __raw_readw((volatile const u16 __iomem *) addr); scr_readw()
H A Dio.h261 extern u16 __raw_readw(const volatile void __iomem *addr);
404 extern inline u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
428 u16 ret = __raw_readw(addr); readw()
506 #define readw_relaxed(addr) __raw_readw(addr)
/linux-4.4.14/arch/s390/include/asm/
H A Dio.h68 #define __raw_readw zpci_read_u16 macro
/linux-4.4.14/arch/sh/boards/mach-se/7780/
H A Dirq.c29 __raw_writew((__raw_readw(FPGA_INTMSK1) | 0x0002), FPGA_INTMSK1); init_se7780_IRQ()
H A Dsetup.c100 __raw_writew(__raw_readw(GPIO_PHCR)&0xfff3, GPIO_PHCR); se7780_setup()
/linux-4.4.14/arch/blackfin/include/asm/
H A Dio.h16 #define __raw_readw bfin_read16 macro
/linux-4.4.14/arch/sh/drivers/pci/
H A Dpci-sh7780.c108 status = __raw_readw(hose->reg_base + PCI_STATUS); sh7780_pci_err_irq()
237 tmp = __raw_readw(hose->reg_base + PCI_STATUS); sh7780_pci66_init()
274 id = __raw_readw(chan->reg_base + PCI_VENDOR_ID); sh7780_pci_init()
280 id = __raw_readw(chan->reg_base + PCI_DEVICE_ID); sh7780_pci_init()
402 (__raw_readw(chan->reg_base + PCI_STATUS) & PCI_STATUS_66MHZ) ? sh7780_pci_init()
H A Dpci-sh5.h95 #define SH5PCI_READ_SHORT(reg) __raw_readw(PCISH5_ICR_REG(reg))
H A Dpci-sh7751.c36 word = __raw_readw(SH7751_BCR2); __area_sdram_check()
/linux-4.4.14/arch/arm/mach-iop13xx/
H A Dtpmi.c207 device_id = __raw_readw(IOP13XX_ATUE_DID); iop13xx_add_tpmi_devices()
210 device_id = __raw_readw(IOP13XX_ATUX_DID); iop13xx_add_tpmi_devices()
H A Dpci.c236 status = __raw_readw(IOP13XX_ATUX_ATUSR); iop13xx_atux_pci_status()
345 status = __raw_readw(IOP13XX_ATUE_ATUSR); iop13xx_atue_pci_status()
638 reg_val = __raw_readw(IOP13XX_ATUE_ATUCMD); iop13xx_atue_setup()
807 reg_val = __raw_readw(IOP13XX_ATUX_ATUCMD); iop13xx_atux_setup()
926 switch (__raw_readw(IOP13XX_ATUE_DID) & 0xf0) { iop13xx_atu_select()
938 switch (__raw_readw(IOP13XX_ATUX_DID) & 0xf0) { iop13xx_atu_select()
1083 return __raw_readw(IOP13XX_ATUE_DID); iop13xx_dev_id()
1085 return __raw_readw(IOP13XX_ATUX_DID); iop13xx_dev_id()
/linux-4.4.14/arch/avr32/include/asm/
H A Dio.h59 static inline u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
165 #define readw_be __raw_readw
230 #define ioread16be(p) ((unsigned int)__raw_readw(p))
/linux-4.4.14/arch/alpha/kernel/
H A Dio.c104 u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
140 EXPORT_SYMBOL(__raw_readw); variable
157 u16 ret = __raw_readw(addr); readw()
450 *(u16 *)to = __raw_readw(from); memcpy_fromio()
604 u16 tmp = __raw_readw(ios++); scr_memcpyw()
/linux-4.4.14/include/asm-generic/
H A Dio.h44 #ifndef __raw_readw
45 #define __raw_readw __raw_readw __raw_readw() macro
46 static inline u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
121 return __le16_to_cpu(__raw_readw(addr)); readw()
243 u16 x = __raw_readw(addr); readsw()
616 return __be16_to_cpu(__raw_readw(addr)); ioread16be()
/linux-4.4.14/arch/arm/include/asm/
H A Dio.h65 #define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a)) macro
80 #define __raw_readw __raw_readw __raw_readw() macro
81 static inline u16 __raw_readw(const volatile void __iomem *addr) __raw_readw() function
256 __raw_readw(__io(p))); __iormb(); __v; })
291 __raw_readw(c)); __r; })
408 #define ioread16be(p) ({ __u16 __v = be16_to_cpu((__force __be16)__raw_readw(p)); __iormb(); __v; })
/linux-4.4.14/arch/sh/include/asm/
H A Dio.h34 #define __raw_readw(a) (__chk_io_ptr(a), *(volatile u16 __force *)(a)) macro
39 #define readw_relaxed(c) ({ u16 __v = ioswabw(__raw_readw(c)); __v; })
152 #define SLOW_DOWN_IO __raw_readw(sh_io_port_base)
/linux-4.4.14/drivers/ssb/
H A Dhost_soc.c65 *buf = (__force __le16)__raw_readw(addr); sizeof()
H A Dpcmcia.c305 *buf = (__force __le16)__raw_readw(addr); sizeof()
316 *buf = (__force __le16)__raw_readw(addr); sizeof()
318 *buf = (__force __le16)__raw_readw(addr + 2); sizeof()
/linux-4.4.14/arch/sh/boards/mach-landisk/
H A Dgio.c104 data = __raw_readw(addr); gio_ioctl()
/linux-4.4.14/arch/arm/mach-ep93xx/
H A Dsnappercl15.c81 return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY); snappercl15_nand_dev_ready()
/linux-4.4.14/drivers/mtd/maps/
H A Dixp4xx.c61 return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2))); flash_read16()
76 return __raw_readw(addr); flash_read16()
/linux-4.4.14/drivers/input/keyboard/
H A Djornada680_kbd.c142 dc_static = (__raw_readw(PDCR) & (~0xcc0c)); jornada_scan_keyb()
143 ec_static = (__raw_readw(PECR) & (~0xf0cf)); jornada_scan_keyb()
/linux-4.4.14/drivers/ata/
H A Dpata_octeon_cf.c397 blob = __raw_readw(base + 0xc); octeon_cf_tf_read16()
400 blob = __raw_readw(base + 2); octeon_cf_tf_read16()
404 blob = __raw_readw(base + 4); octeon_cf_tf_read16()
408 blob = __raw_readw(base + 6); octeon_cf_tf_read16()
416 blob = __raw_readw(base + 0xc); octeon_cf_tf_read16()
419 blob = __raw_readw(base + 2); octeon_cf_tf_read16()
423 blob = __raw_readw(base + 4); octeon_cf_tf_read16()
440 blob = __raw_readw(base + 6); octeon_cf_check_status16()
/linux-4.4.14/lib/
H A Diomap.c67 #define mmio_read16be(addr) be16_to_cpu(__raw_readw(addr))
156 u16 data = __raw_readw(addr); mmio_insw()
/linux-4.4.14/arch/hexagon/include/asm/
H A Dio.h172 #define __raw_readw readw macro
180 #define readw_relaxed __raw_readw
/linux-4.4.14/arch/arm/mach-pxa/
H A Dlpd270.c129 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_enabled; lpd270_irq_handler()
137 pending = __raw_readw(LPD270_INT_STATUS) & lpd270_irq_handler()
H A Dzeus.c105 return __raw_readw(ZEUS_CPLD_ISA_IRQ) & zeus_irq_enabled_mask; zeus_irq_pending()
476 u16 cpld_state = __raw_readw(ZEUS_CPLD_CONTROL); zeus_cf_reset()
842 system_rev = __raw_readw(ZEUS_CPLD_VERSION); zeus_init()
H A Dballoon3.c631 ver = __raw_readw(BALLOON3_FPGA_VER); balloon3_nand_probe()
/linux-4.4.14/drivers/video/fbdev/nvidia/
H A Dnv_local.h65 #define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i)))
/linux-4.4.14/drivers/ide/
H A Dtx4938ide.c82 *ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port)); tx4938ide_input_data_swap()
H A Dtx4939ide.c86 return __raw_readw(base + tx4939ide_swizzlew(reg)); tx4939ide_readw()
457 *ptr++ = cpu_to_le16(__raw_readw((void __iomem *)port)); tx4939ide_input_data_swap()
/linux-4.4.14/drivers/bcma/
H A Dhost_soc.c71 *buf = (__force __le16)__raw_readw(addr); sizeof()
/linux-4.4.14/arch/m68k/include/asm/
H A Dio_no.h50 #define __raw_readw readw macro
H A Dmcfgpio.h123 #define mcfgpio_read(port) __raw_readw(port)
H A Draw_io.h53 #define __raw_readw in_be16 macro
/linux-4.4.14/arch/mips/lib/
H A Diomap.c44 return be16_to_cpu(__raw_readw(addr)); ioread16be()
/linux-4.4.14/arch/parisc/lib/
H A Dio.c72 *(u16 *)dst = __raw_readw(src); memcpy_fromio()
87 *(u16 *)dst = __raw_readw(src); memcpy_fromio()
H A Diomap.c160 return __raw_readw(addr); iomem_read16be()
209 *(u16 *)dst = __raw_readw(addr); iomem_read16r()
/linux-4.4.14/arch/arm/mach-ixp4xx/
H A Dgoramo_mlr.c350 return __raw_readw(flash + addr); flash_readw()
352 return __raw_readw(flash + (addr ^ 2)); flash_readw()
/linux-4.4.14/arch/sh/boards/mach-kfr2r09/
H A Dsetup.c296 __raw_writew((__raw_readw(DRVCRB) & ~0x0003) | 0x0001, DRVCRB); camera_power()
519 __raw_writew((__raw_readw(PORT_MSELCRB) & ~0xc000) | 0x8000, PORT_MSELCRB); kfr2r09_usb0_gadget_setup()
/linux-4.4.14/arch/sh/boards/mach-migor/
H A Dsetup.c634 __raw_writew(__raw_readw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */ migor_devices_setup()
649 __raw_writew(__raw_readw(PORT_MSELCRA) | 1, PORT_MSELCRA); migor_devices_setup()
/linux-4.4.14/arch/arm/mach-ixp4xx/include/mach/
H A Dio.h175 return __raw_readw(p); __indirect_readw()
388 return le16_to_cpu((__force __le16)__raw_readw(addr)); ioread16()
/linux-4.4.14/drivers/spi/
H A Dspi-dw.h151 return __raw_readw(dws->regs + offset); dw_readw()
H A Dspi-omap-uwire.c115 return __raw_readw(uwire_base + (idx << uwire_idx_shift)); uwire_read_reg()
H A Dspi-atmel.c234 __raw_readw((port)->regs + SPI_##reg)
/linux-4.4.14/drivers/net/ethernet/freescale/fs_enet/
H A Dfs_enet.h217 #define __cbd_in16(addr) __raw_readw(addr)
H A Dmac-fec.c57 #define __fs_in16(addr) __raw_readw(addr)
H A Dmac-scc.c55 #define __fs_in16(addr) __raw_readw(addr)
/linux-4.4.14/include/linux/mtd/
H A Ddoc2000.h108 return __raw_readw(addr + reg); ReadDOC_()
H A Dmap.h418 r.x[0] = __raw_readw(map->virt + ofs); inline_map_read()
/linux-4.4.14/arch/sh/boards/mach-ecovec24/
H A Dsetup.c1109 __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); arch_setup()
1179 __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); arch_setup()
1189 __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); arch_setup()
1334 __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000, arch_setup()
/linux-4.4.14/arch/sh/drivers/dma/
H A Ddma-sh.c260 #define dmaor_read_reg(n) __raw_readw(dma_find_base((n)*6))
/linux-4.4.14/arch/mn10300/include/asm/
H A Dio.h44 #define __raw_readw readw macro
/linux-4.4.14/arch/cris/include/asm/
H A Dio.h93 #define __raw_readw readw macro
/linux-4.4.14/arch/m32r/include/asm/
H A Dio.h155 #define __raw_readw readw macro
/linux-4.4.14/arch/arm/mach-omap1/include/mach/
H A Dhardware.h125 /* DSP clock control. Must use __raw_readw() and __raw_writew() with these */
/linux-4.4.14/drivers/dma/sh/
H A Dshdmac.c99 return __raw_readw(addr); dmaor_read()
280 __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift), dmae_set_dmars()
/linux-4.4.14/drivers/usb/c67x00/
H A Dc67x00-ll-hpi.c87 return __raw_readw(dev->hpi.base + reg * dev->hpi.regstep); hpi_read_reg()
/linux-4.4.14/drivers/mmc/host/
H A Ddw_mmc.h183 #define mci_fifo_readw(__reg) __raw_readw(__reg)
H A Domap.c84 #define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg))
/linux-4.4.14/arch/x86/include/asm/
H A Dio.h76 #define __raw_readw __readw macro
/linux-4.4.14/arch/mips/txx9/rbtx4939/
H A Dsetup.c314 r.x[0] = __raw_readw(map->virt + ofs); rbtx4939_flash_read16()
/linux-4.4.14/arch/frv/include/asm/
H A Dio.h47 #define __raw_readw __builtin_read16 macro
/linux-4.4.14/drivers/usb/host/
H A Disp116x.h388 val = __raw_readw(isp116x->data_reg); isp116x_raw_read_data16()
/linux-4.4.14/drivers/video/fbdev/riva/
H A Driva_hw.h81 #define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i)))
/linux-4.4.14/arch/sh/boards/mach-ap325rxa/
H A Dsetup.c631 __raw_writew(__raw_readw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB); ap325rxa_devices_setup()
/linux-4.4.14/arch/mips/pci/
H A Dops-tx4927.c110 return __raw_readw((void __iomem *)&pcicptr->g2pcfgdata + offset); icd_readw()
/linux-4.4.14/arch/ia64/include/asm/
H A Dio.h385 #define __raw_readw readw macro
/linux-4.4.14/drivers/usb/musb/
H A Dtusb6010.c153 tmp = __raw_readw(addr + (offset & ~1)); tusb_readb()
166 tmp = __raw_readw(addr + (offset & ~1)); tusb_writeb()
H A Dmusb_core.c271 return __raw_readw(addr + offset); musb_default_readw()
359 *(u16 *)&dst[index] = __raw_readw(fifo); musb_default_read_fifo()
/linux-4.4.14/drivers/scsi/
H A Dncr53c8xx.h285 #define readw_l2b __raw_readw
289 #define readw_raw __raw_readw
/linux-4.4.14/drivers/video/fbdev/omap2/dss/
H A Drfbi.c295 rfbi_write_reg(RFBI_PARAM, __raw_readw(pd)); rfbi_write_pixels()
/linux-4.4.14/drivers/net/ethernet/cirrus/
H A Dep93xx_eth.c183 #define rdw(ep, off) __raw_readw((ep)->base_addr + (off))
/linux-4.4.14/drivers/net/ethernet/amd/
H A Dam79c961a.c91 #define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1))
/linux-4.4.14/drivers/cdrom/
H A Dgdrom.c191 data[c] = __raw_readw(GDROM_DATA_REG); gdrom_identifydevice()
/linux-4.4.14/arch/mips/include/asm/
H A Dio.h466 be16_to_cpu(__raw_readw((__force unsigned *)(addr)))
/linux-4.4.14/arch/arm/mach-integrator/
H A Dpci_v3.c302 #define v3_readw(o) (__raw_readw(pci_v3_base + (unsigned int)(o)))
/linux-4.4.14/drivers/net/ethernet/8390/
H A Dpcnet_cs.c1326 do { *d++ = __raw_readw(s++); } while (--c); copyin()
1434 if (__raw_readw(info->base+offset+i) != (i>>1)) break; setup_shmem_window()
/linux-4.4.14/include/linux/
H A Dfb.h562 #define fb_readw __raw_readw
/linux-4.4.14/arch/powerpc/include/asm/
H A Dio.h358 static inline unsigned short __raw_readw(const volatile void __iomem *addr) __raw_readw() function
/linux-4.4.14/drivers/mtd/nand/
H A Dmxc_nand.c297 *t++ = __raw_readw(s++); memcpy16_fromio()
/linux-4.4.14/drivers/parisc/
H A Dlba_pci.c130 #define READ_U16(addr) __raw_readw(addr)

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