1/*
2 * arch/sh/kernel/cpu/sh2/clock-sh7619.c
3 *
4 * SH7619 support for the clock framework
5 *
6 *  Copyright (C) 2006  Yoshinori Sato
7 *
8 * Based on clock-sh4.c
9 *  Copyright (C) 2005  Paul Mundt
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License.  See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <linux/io.h>
18#include <asm/clock.h>
19#include <asm/freq.h>
20#include <asm/processor.h>
21
22static const int pll1rate[] = {1,2};
23static const int pfc_divisors[] = {1,2,0,4};
24static unsigned int pll2_mult;
25
26static void master_clk_init(struct clk *clk)
27{
28	clk->rate *= pll2_mult * pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
29}
30
31static struct sh_clk_ops sh7619_master_clk_ops = {
32	.init		= master_clk_init,
33};
34
35static unsigned long module_clk_recalc(struct clk *clk)
36{
37	int idx = (__raw_readw(FREQCR) & 0x0007);
38	return clk->parent->rate / pfc_divisors[idx];
39}
40
41static struct sh_clk_ops sh7619_module_clk_ops = {
42	.recalc		= module_clk_recalc,
43};
44
45static unsigned long bus_clk_recalc(struct clk *clk)
46{
47	return clk->parent->rate / pll1rate[(__raw_readw(FREQCR) >> 8) & 7];
48}
49
50static struct sh_clk_ops sh7619_bus_clk_ops = {
51	.recalc		= bus_clk_recalc,
52};
53
54static struct sh_clk_ops sh7619_cpu_clk_ops = {
55	.recalc		= followparent_recalc,
56};
57
58static struct sh_clk_ops *sh7619_clk_ops[] = {
59	&sh7619_master_clk_ops,
60	&sh7619_module_clk_ops,
61	&sh7619_bus_clk_ops,
62	&sh7619_cpu_clk_ops,
63};
64
65void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
66{
67	if (test_mode_pin(MODE_PIN2 | MODE_PIN0) ||
68	    test_mode_pin(MODE_PIN2 | MODE_PIN1))
69		pll2_mult = 2;
70	else if (test_mode_pin(MODE_PIN0) || test_mode_pin(MODE_PIN1))
71		pll2_mult = 4;
72
73	BUG_ON(!pll2_mult);
74
75	if (idx < ARRAY_SIZE(sh7619_clk_ops))
76		*ops = sh7619_clk_ops[idx];
77}
78