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Searched refs:IS_VALLEYVIEW (Results 1 – 27 of 27) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/i915/
Di915_sysfs.c51 if (IS_VALLEYVIEW(dev)) { in calc_residency()
286 if (IS_VALLEYVIEW(dev_priv->dev)) { in gt_act_freq_mhz_show()
600 if (IS_VALLEYVIEW(dev)) { in i915_setup_sysfs()
621 if (IS_VALLEYVIEW(dev)) in i915_setup_sysfs()
637 if (IS_VALLEYVIEW(dev)) in i915_teardown_sysfs()
Di915_suspend.c52 } else if (!IS_VALLEYVIEW(dev)) { in i915_save_display()
87 } else if (!IS_VALLEYVIEW(dev)) { in i915_restore_display()
Dintel_dsi.c367 if (IS_VALLEYVIEW(dev)) in intel_dsi_device_ready()
479 if (IS_VALLEYVIEW(dev)) { in intel_dsi_pre_enable()
603 else if (IS_VALLEYVIEW(dev)) in intel_dsi_clear_device_ready()
679 if (IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && in intel_dsi_get_hw_state()
709 else if (IS_VALLEYVIEW(encoder->base.dev)) in intel_dsi_get_config()
862 if (IS_VALLEYVIEW(dev)) { in intel_dsi_prepare()
1131 if (IS_VALLEYVIEW(dev)) { in intel_dsi_init()
Dintel_dsi_pll.c564 if (IS_VALLEYVIEW(dev)) in intel_enable_dsi_pll()
574 if (IS_VALLEYVIEW(dev)) in intel_disable_dsi_pll()
602 else if (IS_VALLEYVIEW(dev)) in intel_dsi_reset_clocks()
Dintel_dp.c520 if (WARN_ON(!IS_VALLEYVIEW(dev))) in vlv_power_sequencer_reset()
583 if (IS_VALLEYVIEW(dev)) { in edp_notify_handler()
611 if (IS_VALLEYVIEW(dev) && in edp_have_panel_power()
625 if (IS_VALLEYVIEW(dev) && in edp_have_panel_vdd()
1242 } else if (IS_VALLEYVIEW(dev)) { in intel_dp_set_clock()
1645 if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev) && in intel_dp_prepare()
2312 if (!HAS_PCH_SPLIT(dev) && !IS_VALLEYVIEW(dev) && in intel_dp_get_config()
2581 if (IS_VALLEYVIEW(dev)) in intel_enable_dp()
2592 if (IS_VALLEYVIEW(dev)) { in intel_enable_dp()
3069 } else if (IS_VALLEYVIEW(dev)) in intel_dp_voltage_max()
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Dintel_audio.c379 } else if (IS_VALLEYVIEW(dev_priv)) { in ilk_audio_codec_disable()
442 } else if (IS_VALLEYVIEW(connector->dev)) { in ilk_audio_codec_enable()
566 } else if (IS_VALLEYVIEW(dev)) { in intel_init_audio()
Di915_dma.c260 if (IS_VALLEYVIEW(dev)) in intel_setup_mchbar()
783 } else if (IS_VALLEYVIEW(dev)) in intel_device_info_runtime_init()
795 !IS_VALLEYVIEW(dev)) { in intel_device_info_runtime_init()
840 if (!IS_VALLEYVIEW(dev_priv)) in intel_init_dpio()
Di915_drv.c834 if (IS_VALLEYVIEW(dev_priv)) in i915_drm_resume_early()
1582 else if (IS_VALLEYVIEW(dev_priv)) in intel_runtime_resume()
1599 if (!IS_VALLEYVIEW(dev_priv)) in intel_runtime_resume()
1626 else if (IS_VALLEYVIEW(dev_priv)) in intel_suspend_complete()
Dintel_psr.c327 if (!IS_VALLEYVIEW(dev) && ((dev_priv->vbt.psr.full_link) || in intel_psr_match_conditions()
623 if (!IS_VALLEYVIEW(dev)) in intel_psr_single_frame_update()
Dintel_uncore.c226 if (IS_VALLEYVIEW(dev_priv->dev)) in __gen6_gt_wait_for_fifo()
1086 if (IS_VALLEYVIEW(dev_priv)) in fw_domain_init()
1121 } else if (IS_VALLEYVIEW(dev)) { in intel_uncore_fw_domains_init()
1231 if (IS_VALLEYVIEW(dev)) { in intel_uncore_init()
Dintel_crt.c371 if (IS_VALLEYVIEW(dev)) in intel_crt_detect_hotplug()
830 else if (IS_VALLEYVIEW(dev)) in intel_crt_init()
Dintel_display.c189 if (IS_VALLEYVIEW(dev)) in intel_hrawclk()
217 if (!IS_VALLEYVIEW(dev_priv)) in intel_update_czclk()
618 } else if (IS_VALLEYVIEW(dev)) { in intel_limit()
718 if (!IS_PINEVIEW(dev) && !IS_VALLEYVIEW(dev) && !IS_BROXTON(dev)) in intel_PLL_is_valid()
722 if (!IS_VALLEYVIEW(dev) && !IS_BROXTON(dev)) { in intel_PLL_is_valid()
1307 } else if (IS_VALLEYVIEW(dev)) { in assert_panel_unlocked()
1425 } else if (IS_VALLEYVIEW(dev)) { in assert_sprites_disabled()
1609 BUG_ON(!IS_VALLEYVIEW(dev_priv->dev)); in vlv_enable_pll()
2322 IS_VALLEYVIEW(dev_priv)) in intel_linear_alignment()
5426 } else if (IS_VALLEYVIEW(dev)) { in intel_update_max_cdclk()
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Di915_drv.h2469 #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview) macro
2589 IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev) || \
2592 IS_BROADWELL(dev) || IS_VALLEYVIEW(dev) || \
2606 !IS_VALLEYVIEW(dev) && !IS_BROXTON(dev))
2628 #define HAS_GMCH_DISPLAY(dev) (INTEL_INFO(dev)->gen < 5 || IS_VALLEYVIEW(dev))
3469 if (IS_VALLEYVIEW(dev)) in i915_vgacntrl_reg()
Dintel_hotplug.c410 WARN_ONCE(INTEL_INFO(dev)->gen >= 5 && !IS_VALLEYVIEW(dev), in intel_hpd_irq_handler()
Di915_gpu_error.c375 } else if (HAS_PCH_SPLIT(dev) || IS_VALLEYVIEW(dev)) in i915_error_state_to_str()
1181 if (IS_VALLEYVIEW(dev)) { in i915_capture_reg_state()
1230 } else if (!IS_VALLEYVIEW(dev)) { in i915_capture_reg_state()
Di915_debugfs.c865 } else if (IS_VALLEYVIEW(dev)) { in i915_interrupt_info()
1145 } else if (IS_GEN6(dev) || (IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) || in i915_frequency_info()
1284 } else if (IS_VALLEYVIEW(dev)) { in i915_frequency_info()
1602 if (IS_VALLEYVIEW(dev)) in i915_drpc_info()
1743 else if (IS_VALLEYVIEW(dev)) in i915_sr_status()
3895 else if (IS_VALLEYVIEW(dev)) in pipe_crc_set_source()
3964 else if (IS_VALLEYVIEW(dev)) in pipe_crc_set_source()
4340 else if (IS_VALLEYVIEW(dev)) in wm_latency_show()
4354 if (INTEL_INFO(dev)->gen >= 9 || IS_VALLEYVIEW(dev)) in wm_latency_show()
4457 else if (IS_VALLEYVIEW(dev)) in wm_latency_write()
Dintel_pm.c286 if (IS_VALLEYVIEW(dev)) { in intel_set_memory_cxsr()
4520 if (IS_VALLEYVIEW(dev)) in gen6_rps_idle()
4573 if (IS_VALLEYVIEW(dev)) in intel_set_rps()
4617 if (IS_VALLEYVIEW(dev)) { in intel_print_rc6_info()
6122 else if (IS_VALLEYVIEW(dev)) in intel_init_gt_powersave()
6130 else if (IS_VALLEYVIEW(dev)) in intel_cleanup_gt_powersave()
6178 else if (IS_VALLEYVIEW(dev)) in intel_disable_gt_powersave()
6201 } else if (IS_VALLEYVIEW(dev)) { in intel_gen6_powersave_work()
7099 } else if (IS_VALLEYVIEW(dev)) { in intel_init_pm()
7269 else if (IS_VALLEYVIEW(dev_priv->dev)) in intel_gpu_freq()
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Di915_gem_fence.c556 if (INTEL_INFO(dev)->gen >= 8 || IS_VALLEYVIEW(dev)) { in i915_gem_detect_bit_6_swizzle()
Dintel_sprite.c972 if (IS_VALLEYVIEW(dev) && in intel_sprite_set_colorkey()
1107 if (IS_VALLEYVIEW(dev)) { in intel_plane_init()
Dintel_i2c.c633 else if (IS_VALLEYVIEW(dev)) in intel_setup_gmbus()
Dintel_hdmi.c640 else if (IS_VALLEYVIEW(dev_priv)) in intel_hdmi_set_gcp_infoframe()
2099 if (IS_VALLEYVIEW(dev)) { in intel_hdmi_init_connector()
2179 } else if (IS_VALLEYVIEW(dev)) { in intel_hdmi_init()
Di915_gem_context.c193 if (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev)) { in i915_gem_alloc_context_obj()
Di915_irq.c563 if (IS_VALLEYVIEW(dev_priv->dev)) in i915_enable_pipestat()
577 if (IS_VALLEYVIEW(dev_priv->dev)) in i915_disable_pipestat()
1709 if (IS_G4X(dev) || IS_VALLEYVIEW(dev)) { in i9xx_hpd_irq_handler()
4391 if (IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) in intel_irq_init()
4432 } else if (IS_VALLEYVIEW(dev_priv)) { in intel_irq_init()
Dintel_runtime_pm.c1868 } else if (IS_VALLEYVIEW(dev_priv->dev)) { in intel_power_domains_init()
2058 } else if (IS_VALLEYVIEW(dev)) { in intel_power_domains_init_hw()
Di915_gem_gtt.c137 if (IS_VALLEYVIEW(dev) && !IS_CHERRYVIEW(dev) && in sanitize_enable_ppgtt()
3103 else if (IS_VALLEYVIEW(dev)) in i915_gem_gtt_init()
Dintel_panel.c1770 } else if (IS_VALLEYVIEW(dev)) { in intel_panel_init_backlight_funcs()
Di915_gem.c4897 if (IS_VALLEYVIEW(dev)) { in i915_gem_init()
5022 if (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev)) in i915_gem_load()