| /linux-4.4.14/drivers/clk/ |
| D | Kconfig | 25 menu "Common Clock Framework"
29 tristate "Clock driver for WM831x/2x PMICs"
41 tristate "Clock driver for Maxim 77686 MFD"
48 tristate "Clock driver for Maxim 77802 PMIC"
55 tristate "Clock driver for RK808"
64 tristate "Clock driver controlled via SCPI interface"
74 tristate "Clock driver for SiLabs 5351A/B/C"
83 tristate "Clock driver for SiLabs 514 devices"
93 tristate "Clock driver for SiLabs 570 and compatible devices"
103 tristate "Clock driver for TI CDCE925 devices"
[all …]
|
| /linux-4.4.14/drivers/clk/qcom/ |
| D | Kconfig | 13 tristate "APQ8084 Global Clock Controller"
22 tristate "APQ8084 Multimedia Clock Controller"
32 tristate "IPQ806x Global Clock Controller"
40 tristate "IPQ806x LPASS Clock Controller"
49 tristate "MSM8660 Global Clock Controller"
57 tristate "MSM8916 Global Clock Controller"
66 tristate "APQ8064/MSM8960 Global Clock Controller"
74 tristate "APQ8064/MSM8960 LPASS Clock Controller"
83 tristate "MSM8960 Multimedia Clock Controller"
92 tristate "MSM8974 Global Clock Controller"
[all …]
|
| /linux-4.4.14/Documentation/devicetree/bindings/clock/ |
| D | mvebu-gated-clock.txt | 1 * Gated Clock bindings for Marvell EBU SoCs
11 ID Clock Peripheral
14 1 pex0_en PCIe 0 Clock out
15 2 pex1_en PCIe 1 Clock out
28 ID Clock Peripheral
33 5 pex0 PCIe 0 Clock out
34 6 pex1 PCIe 1 Clock out
55 ID Clock Peripheral
82 ID Clock Peripheral
94 ID Clock Peripheral
[all …]
|
| D | renesas,r8a7778-cpg-clocks.txt | 1 * Renesas R8A7778 Clock Pulse Generator (CPG)
5 The CPG also provides a Clock Domain for SoC devices, in combination with the
17 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
39 - CPG/MSTP Clock Domain member device node:
|
| D | renesas,r8a7779-cpg-clocks.txt | 1 * Renesas R8A7779 Clock Pulse Generator (CPG)
5 The CPG also provides a Clock Domain for SoC devices, in combination with the
19 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
41 - CPG/MSTP Clock Domain member device node:
|
| D | emev2-clock.txt | 1 Device tree Clock bindings for Renesas EMMA Mobile EV2
15 "Serial clock generator" in fig."Clock System Overview" of the manual,
27 Clock gating node shown as "Clock stop processing block" in the
28 fig."Clock System Overview" of the manual.
|
| D | renesas,cpg-mssr.txt | 1 * Renesas Clock Pulse Generator / Module Standby and Software Reset
3 On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator)
10 1. Module Standby, providing a Clock Domain to control the clock supply
35 - SoC devices that are part of the CPG/MSSR Clock Domain and can be
57 - CPG/MSSR Clock Domain member device node:
|
| D | renesas,rz-cpg-clocks.txt | 1 * Renesas RZ Clock Pulse Generator (CPG)
5 The CPG also provides a Clock Domain for SoC devices, in combination with the
21 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
43 - CPG/MSTP Clock Domain member device node:
|
| D | renesas,rcar-gen2-cpg-clocks.txt | 1 * Renesas R-Car Gen2 Clock Pulse Generator (CPG)
5 The CPG also provides a Clock Domain for SoC devices, in combination with the
27 SoC devices that are part of the CPG/MSTP Clock Domain and can be power-managed
51 - CPG/MSTP Clock Domain member device node:
|
| D | efm32-clock.txt | 1 * Clock bindings for Energy Micro efm32 Giant Gecko's Clock Management Unit
|
| D | zynq-7000.txt | 1 Device Tree Clock bindings for the Zynq 7000 EPP
9 == Clock Controller ==
31 Clock inputs:
40 Clock outputs:
|
| D | alphascale,acc.txt | 1 Alphascale Clock Controller
3 The ACC (Alphascale Clock Controller) is responsible of choising proper
108 Clock consumer with only one, _AHB_ sink.
|
| D | mvebu-core-clock.txt | 1 * Core Clock bindings for Marvell MVEBU SoCs
30 3 = hclk (SDRAM Controller Internal Clock)
31 4 = dclk (SDRAM Interface Clock)
32 5 = refclk (Reference Clock)
|
| D | arm-integrator.txt | 1 Clock bindings for ARM Integrator and Versatile Core Module clocks
3 Auxiliary Oscillator Clock
|
| D | imx23-clock.txt | 1 * Clock bindings for Freescale i.MX23
12 Clock ID
|
| D | prima2-clock.txt | 1 * Clock bindings for CSR SiRFprimaII
13 Clock ID
|
| D | marvell,berlin.txt | 1 Device Tree Clock bindings for Marvell Berlin
7 Clock related registers are spread among the chip control registers. Berlin
|
| D | imx31-clock.txt | 1 * Clock bindings for Freescale i.MX31
13 Clock ID
|
| D | imx28-clock.txt | 1 * Clock bindings for Freescale i.MX28
12 Clock ID
|
| D | csr,atlas7-car.txt | 1 * Clock and reset bindings for CSR atlas7
17 Examples: Clock and reset controller node:
|
| D | amlogic,meson8b-clkc.txt | 1 * Amlogic Meson8b Clock and Reset Unit
22 Example: Clock controller node:
|
| D | imx35-clock.txt | 1 * Clock bindings for Freescale i.MX35
13 Clock ID
|
| D | hi6220-clock.txt | 1 * Hisilicon Hi6220 Clock Controller
3 Clock control registers reside in different Hi6220 system controllers,
|
| D | nvidia,tegra30-car.txt | 1 NVIDIA Tegra30 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | nvidia,tegra114-car.txt | 1 NVIDIA Tegra114 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | nvidia,tegra20-car.txt | 1 NVIDIA Tegra20 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | ste-u300-syscon-clock.txt | 1 Clock bindings for ST-Ericsson U300 System Controller Clocks
19 Type: ID: Clock:
|
| D | renesas,cpg-div6-clocks.txt | 1 * Renesas CPG DIV6 Clock
3 The CPG DIV6 clocks are variable factor clocks provided by the Clock Pulse
|
| D | imx25-clock.txt | 1 * Clock bindings for Freescale i.MX25
13 Clock ID
|
| D | samsung,s3c2412-clock.txt | 1 * Samsung S3C2412 Clock Controller
30 Example: Clock controller node:
|
| D | samsung,s3c2410-clock.txt | 1 * Samsung S3C2410 Clock Controller
31 Example: Clock controller node:
|
| D | clk-s5pv210-audss.txt | 1 * Samsung Audio Subsystem Clock Controller
30 Example: Clock controller node.
|
| D | rockchip,rk3288-cru.txt | 1 * Rockchip RK3288 Clock and Reset Unit
40 Example: Clock controller node:
|
| D | samsung,s3c2443-clock.txt | 1 * Samsung S3C2443 Clock Controller
35 Example: Clock controller node:
|
| D | rockchip,rk3188-cru.txt | 1 * Rockchip RK3188/RK3066 Clock and Reset Unit
40 Example: Clock controller node:
|
| D | rockchip,rk3368-cru.txt | 1 * Rockchip RK3368 Clock and Reset Unit
41 Example: Clock controller node:
|
| D | samsung,s5pv210-clock.txt | 1 * Samsung S5P6442/S5PC110/S5PV210 Clock Controller
40 Example: Clock controller node:
|
| D | samsung,s3c64xx-clock.txt | 1 * Samsung S3C64xx Clock Controller
39 Example: Clock controller node:
|
| D | lpc1850-ccu.txt | 1 * NXP LPC1850 Clock Control Unit (CCU)
4 or off independently by the Clock Control Units CCU1 or CCU2. The
|
| D | renesas,h8s2678-pll-clock.txt | 3 This device is Clock multiplyer
|
| D | pxa-clock.txt | 1 * Clock bindings for Marvell PXA chips
|
| D | qcom,lcc.txt | 1 Qualcomm LPASS Clock & Reset Controller Binding
|
| D | exynos7-clock.txt | 1 * Samsung Exynos7 Clock Controller
22 Required Properties for Clock Controller:
|
| D | imx6sl-clock.txt | 1 * Clock bindings for Freescale i.MX6 SoloLite
|
| D | clock-bindings.txt | 5 tree. Those nodes are designated as clock providers. Clock consumer
14 ==Clock providers==
32 Clock consumer nodes must never directly reference
63 ==Clock consumers==
|
| D | qcom,mmcc.txt | 1 Qualcomm Multimedia Clock & Reset Controller Binding
|
| D | clps711x-clock.txt | 1 * Clock bindings for the Cirrus Logic CLPS711X CPUs
|
| D | qcom,gcc.txt | 1 Qualcomm Global Clock & Reset Controller Binding
|
| D | imx7d-clock.txt | 1 * Clock bindings for Freescale i.MX7 Dual
|
| D | mvebu-cpu-clock.txt | 1 Device Tree Clock bindings for cpu clock of Marvell EBU platforms
|
| D | imx6ul-clock.txt | 1 * Clock bindings for Freescale i.MX6 UltraLite
|
| D | hi3620-clock.txt | 1 * Hisilicon Hi3620 Clock Controller
|
| D | imx6sx-clock.txt | 1 * Clock bindings for Freescale i.MX6 SoloX
|
| D | mvebu-corediv-clock.txt | 1 * Core Divider Clock bindings for Marvell MVEBU SoCs
|
| D | nvidia,tegra124-car.txt | 1 NVIDIA Tegra124 and Tegra132 Clock And Reset Controller
6 The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
|
| D | clk-exynos-audss.txt | 1 * Samsung Audio Subsystem Clock Controller
41 Clock ID SoC (if specific)
|
| D | imx1-clock.txt | 1 * Clock bindings for Freescale i.MX1 CPUs
|
| D | imx27-clock.txt | 1 * Clock bindings for Freescale i.MX27
|
| D | imx21-clock.txt | 1 * Clock bindings for Freescale i.MX21
|
| D | marvell,pxa910.txt | 1 * Marvell PXA910 Clock Controller
|
| D | hix5hd2-clock.txt | 1 * Hisilicon Hix5hd2 Clock Controller
|
| D | exynos5440-clock.txt | 1 * Samsung Exynos5440 Clock Controller
|
| D | marvell,pxa168.txt | 1 * Marvell PXA168 Clock Controller
|
| D | marvell,mmp2.txt | 1 * Marvell MMP2 Clock Controller
|
| D | brcm,iproc-clocks.txt | 100 Clock Source (Parent) Index ID
145 Clock Source Index ID
176 Clock Source Index ID
|
| D | imx5-clock.txt | 1 * Clock bindings for Freescale i.MX5
|
| D | imx6q-clock.txt | 1 * Clock bindings for Freescale i.MX6 Quad
|
| D | calxeda.txt | 1 Device Tree Clock bindings for Calxeda highbank platform
|
| D | marvell,pxa1928.txt | 1 * Marvell PXA1928 Clock Controllers
|
| D | renesas,r8a73a4-cpg-clocks.txt | 1 * Renesas R8A73A4 Clock Pulse Generator (CPG)
|
| D | nvidia,tegra124-dfll.txt | 24 - soc: Clock source for the DFLL control logic.
26 - i2c: Clock source for the integrated I2C master.
|
| D | zx296702-clk.txt | 1 Device Tree Clock bindings for ZTE zx296702
|
| D | renesas,sh73a0-cpg-clocks.txt | 3 * Renesas SH73A0 Clock Pulse Generator (CPG)
|
| D | qoriq-clock.txt | 1 * Clock Block on Freescale QorIQ Platforms
18 1. Clock Block Binding
56 2. Clock Provider
|
| D | moxa,moxart-clock.txt | 1 Device Tree Clock bindings for arch-moxart
|
| D | renesas,r8a7740-cpg-clocks.txt | 3 * Renesas R8A7740 Clock Pulse Generator (CPG)
|
| D | exynos5250-clock.txt | 1 * Samsung Exynos5250 Clock Controller
|
| D | maxim,max77686.txt | 39 Example: Clock consumer node
|
| D | maxim,max77802.txt | 37 Example: Clock consumer node
|
| D | vf610-clock.txt | 1 * Clock bindings for Freescale Vybrid VF610 SOC
|
| D | exynos4415-clock.txt | 1 * Samsung Exynos4415 Clock Controller
|
| D | lpc1850-cgu.txt | 1 * NXP LPC1850 Clock Generation Unit (CGU)
5 a base clock and itself is one of the inputs to the two Clock
|
| D | exynos5410-clock.txt | 1 * Samsung Exynos5410 Clock Controller
|
| D | ingenic,cgu.txt | 17 Clock consumers specify this argument to identify a clock. The valid values
|
| D | exynos5420-clock.txt | 1 * Samsung Exynos5420 Clock Controller
|
| D | exynos5260-clock.txt | 1 * Samsung Exynos5260 Clock Controller
49 Required Properties for Clock Controller:
|
| D | brcm,kona-ccu.txt | 72 CCU Clock Type Index Specifier
117 CCU Clock Type Index Specifier
|
| D | exynos4-clock.txt | 1 * Samsung Exynos4 Clock Controller
|
| D | st,stm32-rcc.txt | 1 STMicroelectronics STM32 Reset and Clock Controller
|
| D | exynos3250-clock.txt | 1 * Samsung Exynos3250 Clock Controller
|
| D | altr_socfpga.txt | 1 Device Tree Clock bindings for Altera's SoCFPGA platform
|
| D | rockchip.txt | 1 Device Tree Clock bindings for arch-rockchip
|
| D | ux500.txt | 1 Clock bindings for ST-Ericsson Ux500 clocks
|
| D | mt8173-cpu-dvfs.txt | 1 Device Tree Clock bindins for CPU DVFS of Mediatek MT8173 SoC
|
| D | vt8500.txt | 1 Device Tree Clock bindings for arch-vt8500
|
| /linux-4.4.14/Documentation/frv/ |
| D | clock.txt | 1 Clock scaling
42 Clock-In: 50.00 MHz
43 Clock-Core: 300.00 MHz
44 Clock-SDRAM: 100.00 MHz
45 Clock-CBus: 100.00 MHz
46 Clock-Res: 50.00 MHz
47 Clock-Ext: 50.00 MHz
48 Clock-DSU: 25.00 MHz
|
| /linux-4.4.14/drivers/iio/frequency/ |
| D | Kconfig | 4 # Clock Distribution device drivers
11 menu "Clock Generator/Distribution"
14 tristate "Analog Devices AD9523 Low Jitter Clock Generator"
18 Clock Generator. The driver provides direct access via sysfs.
|
| /linux-4.4.14/drivers/clk/versatile/ |
| D | Kconfig | 2 bool "Clock driver for ARM Reference designs"
11 bool "Clock driver for ARM SP810 System Controller"
19 bool "Clock driver for Versatile Express OSC clock generators"
|
| /linux-4.4.14/Documentation/input/ |
| D | amijoy.txt | 90 | 0 | M0H | JOY0DAT Horizontal Clock |
91 | 1 | M0HQ | JOY0DAT Horizontal Clock (quadrature) |
92 | 2 | M0V | JOY0DAT Vertical Clock |
93 | 3 | M0VQ | JOY0DAT Vertical Clock (quadrature) |
94 | 4 | M1V | JOY1DAT Horizontal Clock |
95 | 5 | M1VQ | JOY1DAT Horizontal Clock (quadrature) |
96 | 6 | M1V | JOY1DAT Vertical Clock |
97 | 7 | M1VQ | JOY1DAT Vertical Clock (quadrature) |
|
| D | joystick-parport.txt | 80 NES and SNES pads have two input bits, Clock and Latch, which drive the
84 (pin 2) -----> Clock
117 | | | +-> Ground | +------------------> Clock
118 | | +----> Clock +---------------------> Power
124 +---------> Clock +-----------------> Data
132 | | | | +----> Clock
323 | | | | | +--------> Clock --- (4)
|
| /linux-4.4.14/Documentation/devicetree/bindings/arm/altera/ |
| D | socfpga-clk-manager.txt | 1 Altera SOCFPGA Clock Manager
5 - reg : Should contain base address and length for Clock Manager
|
| /linux-4.4.14/drivers/clk/hisilicon/ |
| D | Kconfig | 2 bool "Hi6220 Clock Driver"
9 bool "Hi6220 Stub Clock Driver"
|
| /linux-4.4.14/Documentation/devicetree/bindings/rtc/ |
| D | pcf8563.txt | 1 * Philips PCF8563/Epson RTC8564 Real Time Clock
3 Philips PCF8563/Epson RTC8564 Real Time Clock
|
| D | xgene-rtc.txt | 1 * APM X-Gene Real Time Clock
3 RTC controller for the APM X-Gene Real Time Clock
|
| D | xlnx-rtc.txt | 1 * Xilinx Zynq Ultrascale+ MPSoC Real Time Clock
3 RTC controller for the Xilinx Zynq MPSoC Real Time Clock
|
| D | rtc-st-lpc.txt | 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
|
| D | via,vt8500-rtc.txt | 1 VIA/Wondermedia VT8500 Realtime Clock Controller
|
| D | maxim,ds1742.txt | 1 * Maxim (Dallas) DS1742/DS1743 Real Time Clock
|
| D | lpc32xx-rtc.txt | 1 * NXP LPC32xx SoC Real Time Clock controller
|
| D | nxp,rtc-2123.txt | 1 NXP PCF2123 SPI Real Time Clock
|
| D | digicolor-rtc.txt | 1 Conexant Digicolor Real Time Clock controller
|
| D | atmel,at91rm9200-rtc.txt | 1 Atmel AT91RM9200 Real Time Clock
|
| D | imxdi-rtc.txt | 1 * i.MX25 Real Time Clock controller
|
| D | orion-rtc.txt | 1 * Mvebu Real Time Clock
|
| D | sunxi-rtc.txt | 1 * sun4i/sun7i Real Time Clock
|
| D | sun6i-rtc.txt | 1 * sun6i Real Time Clock
|
| D | stmp3xxx-rtc.txt | 1 * STMP3xxx/i.MX28 Time Clock controller
|
| D | haoyu,hym8563.txt | 1 Haoyu Microelectronics HYM8563 Real Time Clock
|
| D | sa1100-rtc.txt | 1 * Marvell Real Time Clock controller
|
| D | dallas,ds1390.txt | 1 * Dallas DS1390 SPI Serial Real-Time Clock
|
| D | dallas,ds1339.txt | 1 * Dallas DS1339 I2C Serial Real-Time Clock
|
| D | ti,bq32k.txt | 1 * TI BQ32000 I2C Serial Real-Time Clock
|
| D | armada-380-rtc.txt | 1 * Real Time Clock of the Armada 38x SoCs
|
| D | rtc-mxc.txt | 1 * Real Time Clock of the i.MX SoCs
|
| D | s3c-rtc.txt | 1 * Samsung's S3C Real Time Clock controller
|
| D | rtc-omap.txt | 1 TI Real Time Clock
|
| /linux-4.4.14/Documentation/ABI/testing/ |
| D | sysfs-class-rtc-rtc0-device-rtc_calibration | 1 What: Attribute for calibrating ST-Ericsson AB8500 Real Time Clock
6 calibrate the AB8500.s 32KHz Real Time Clock.
|
| /linux-4.4.14/Documentation/devicetree/bindings/timer/ |
| D | st,stih407-lpc | 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
15 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
|
| /linux-4.4.14/Documentation/devicetree/bindings/iio/frequency/ |
| D | adf4350.txt | 9 - clocks: From common clock binding. Clock is phandle to clock for
10 ADF435x Reference Clock (CLKIN).
48 - adi,12bit-clk-divider: Clock divider value used when
52 0: Clock divider off (default)
|
| /linux-4.4.14/Documentation/sound/alsa/ |
| D | hdspm.txt | 115 System Clock -- suspended !!!!
117 Name -- "System Clock Mode"
125 Clock-source controller, which is a kind of ALSA-standard. I
129 Clock-source-controller instead !!!!
131 Clock Source
133 Name -- "Sample Clock Source"
290 Word Clock Sync Status
292 Name -- "Word Clock Lock Status"
298 Word Clock Input is 0=Unlocked, 1=Locked, or 2=Synced.
|
| D | ControlNames.txt | 92 Sample Clock Source { "Word", "Internal", "AutoSync" }
93 Clock Sync Status { "Lock", "Sync", "No Lock" }
|
| D | MIXART.txt | 13 (AES/EBU, Word Clock, Time Code and Video Synchro)
65 - external clock support (AES/EBU, Word Clock, Time Code, Video Sync)
|
| /linux-4.4.14/Documentation/sound/alsa/soc/ |
| D | clocking.txt | 8 Master Clock
23 The Digital Audio Interface is usually driven by a Bit Clock (often referred to
31 Bit Clock can be generated as follows:-
|
| /linux-4.4.14/Documentation/devicetree/bindings/net/ |
| D | ti,dp83867.txt | 5 - ti,rx-internal-delay - RGMII Recieve Clock Delay - see dt-bindings/net/ti-dp83867.h
7 - ti,tx-internal-delay - RGMII Transmit Clock Delay - see dt-bindings/net/ti-dp83867.h
|
| D | micrel.txt | 22 - micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select
25 Setting the RMII Reference Clock Select bit enables 25 MHz rather
|
| D | arc_emac.txt | 10 Clock handling:
|
| D | emac_rockchip.txt | 16 Clock handling:
|
| /linux-4.4.14/Documentation/devicetree/bindings/metag/ |
| D | meta.txt | 13 - clocks: Clock consumer specifiers as described in
16 - clock-names: Clock consumer names as described in
|
| /linux-4.4.14/Documentation/devicetree/bindings/pwm/ |
| D | imx-pwm.txt | 11 - clocks : Clock specifiers for both ipg and per clocks.
12 - clock-names : Clock names should include both "ipg" and "per"
|
| /linux-4.4.14/drivers/video/fbdev/sis/ |
| D | initextlfb.c | 55 int Clock; in sisfb_mode_rate_to_dclock() local
88 Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000; in sisfb_mode_rate_to_dclock()
90 return Clock; in sisfb_mode_rate_to_dclock()
|
| /linux-4.4.14/Documentation/devicetree/bindings/cpufreq/ |
| D | tegra124-cpufreq.txt | 11 - cpu_g: Clock mux for the fast CPU cluster.
12 - cpu_lp: Clock mux for the low-power CPU cluster.
|
| D | cpufreq-exynos5440.txt | 14 - clock-latency: Clock monitor latency in microsecond.
|
| /linux-4.4.14/Documentation/devicetree/bindings/watchdog/ |
| D | st_lpc_wdt.txt | 4 LPC currently supports Watchdog OR Real Time Clock OR Clocksource
16 - clocks : Clock used by LPC device (See: ../clock/clock-bindings.txt)
|
| /linux-4.4.14/Documentation/devicetree/bindings/spi/ |
| D | fsl-imx-cspi.txt | 16 - clocks : Clock specifiers for both ipg and per clocks.
17 - clock-names : Clock names should include both "ipg" and "per"
|
| D | spi-zynqmp-qspi.txt | 12 - clocks : Clock phandles (see clock bindings for details).
|
| D | spi-cadence.txt | 12 - clocks : Clock phandles (see clock bindings for details).
|
| /linux-4.4.14/Documentation/cpu-freq/ |
| D | index.txt | 13 Clock scaling allows you to change the clock speed of the CPUs on the
53 Clock and voltage scaling for the SA-1100:
|
| /linux-4.4.14/Documentation/devicetree/bindings/sound/ |
| D | fsl,spdif.txt | 24 "rxtx<0-7>" Clock source list for tx and rx clock.
27 Transceiver Clock Diagram" of SoC reference manual.
|
| D | da7213.txt | 11 - clock-names : Clock name string for 'clocks' attribute, should be "mclk".
|
| D | tlv320aic32x4.txt | 19 - clocks/clock-names: Clock named 'mclk' for the master clock of the codec.
|
| D | davinci-evm-audio.txt | 14 - ti,codec-clock-rate : The Codec Clock rate (in Hz) applied to the Codec.
|
| D | fsl,asrc.txt | 27 "asrck_<0-f>" Clock sources for input and output clock.
|
| /linux-4.4.14/Documentation/devicetree/bindings/i2c/ |
| D | trivial-devices.txt | 12 abracon,abb5zes3 AB-RTCMC-32.768kHz-B5ZE-S3: Real Time Clock/Calendar Module with I2C Interface
40 dallas,ds1307 64 x 8, Serial, I2C Real-Time Clock
67 mc,rv3029c2 Real Time Clock Module with I2C-Bus
77 nxp,pcf85063 Tiny Real-Time Clock
80 pericom,pt7c4338 Real-time Clock Module
|
| /linux-4.4.14/Documentation/devicetree/bindings/mfd/ |
| D | da9062.txt | 8 da9062-rtc : : Real-Time Clock
45 - rtc : This node defines settings required for the Real-Time Clock associated
|
| D | da9063.txt | 9 da9063-rtc : : Real-Time Clock
51 - rtc : This node defines settings for the Real-Time Clock associated with
|
| D | max77802.txt | 6 a Real-Time-Clock (RTC) and a I2C interface to program the individual
|
| D | sun6i-prcm.txt | 1 * Allwinner PRCM (Power/Reset/Clock Management) Multi-Functional Device
|
| D | mt6397.txt | 8 - Clock
|
| D | qcom-pm8xxx.txt | 56 == Real-Time Clock
|
| /linux-4.4.14/Documentation/devicetree/bindings/serial/ |
| D | brcm,bcm6345-uart.txt | 11 - clocks: Clock driving the hardware; used to figure out the baud rate
|
| D | snps-dw-apb-uart.txt | 8 Clock handling:
|
| /linux-4.4.14/Documentation/i2c/busses/ |
| D | i2c-pca-isa | 17 Clock rate as described in table 1 of PCA9564 datasheet
|
| D | i2c-sis630 | 20 * high_clock = [1|0] Forcibly set Host Master Clock to 56KHz (default,
|
| /linux-4.4.14/arch/arm/boot/dts/ |
| D | orion5x-rd88f5182-nas.dts | 134 * MPP[20] PCI Clock to MV88F5182
135 * MPP[21] PCI Clock to mini PCI CON11
|
| D | ste-href-ab8505.dtsi | 186 * Clock output pins associated with regulators.
|
| /linux-4.4.14/Documentation/timers/ |
| D | timekeeping.txt | 1 Clock sources, Clock events, sched_clock() and delay timers
21 Clock sources
84 Clock events
87 Clock events are the conceptual reverse of clock sources: they take a
91 Clock events are orthogonal to clock sources. The same hardware
|
| D | 00-INDEX | 16 - Clock sources, clock events, sched_clock() and delay timer notes
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| /linux-4.4.14/Documentation/devicetree/bindings/clock/ti/ |
| D | dra7-atl.txt | 1 Device Tree Clock bindings for ATL (Audio Tracking Logic) of DRA7 SoC.
12 Clock tree binding:
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| /linux-4.4.14/Documentation/devicetree/bindings/gpu/ |
| D | samsung-rotator.txt | 15 - clocks : Clock specifier for rotator clock, according to generic clock
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| /linux-4.4.14/Documentation/devicetree/bindings/crypto/ |
| D | img-hash.txt | 13 - clocks : Clock specifiers
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| /linux-4.4.14/Documentation/devicetree/bindings/arm/msm/ |
| D | qcom,kpss-acc.txt | 1 Krait Processor Sub-system (KPSS) Application Clock Controller (ACC)
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| /linux-4.4.14/Documentation/devicetree/bindings/gpio/ |
| D | nxp,lpc1850-gpio.txt | 7 - clocks : Clock specifier (see clock bindings for details)
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| D | gpio-zynq.txt | 10 - clocks : Clock specifier (see clock bindings for details)
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| /linux-4.4.14/Documentation/devicetree/bindings/c6x/ |
| D | clocks.txt | 1 C6X PLL Clock Controllers
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| /linux-4.4.14/Documentation/devicetree/bindings/media/i2c/ |
| D | tvp514x.txt | 21 - pclk-sample: Clock polarity of the endpoint.
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| D | tvp7002.txt | 16 - pclk-sample: Clock polarity of the bus. Default value when this property is
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| /linux-4.4.14/Documentation/devicetree/bindings/usb/ |
| D | keystone-usb.txt | 15 - clocks: Clock IDs array as required by the controller.
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| D | usb3503.txt | 18 - refclk: Clock used for driving REFCLK signal (optional, if not provided
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| D | exynos-usb.txt | 93 - clocks: Clock IDs array as required by the controller.
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| /linux-4.4.14/Documentation/devicetree/bindings/pinctrl/ |
| D | nxp,lpc1850-scu.txt | 7 - clocks : Clock specifier (see clock bindings for details)
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| /linux-4.4.14/Documentation/ptp/ |
| D | ptp.txt | 57 Clock drivers include include/linux/ptp_clock_kernel.h and register
59 registration method. Clock drivers must implement all of the
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| /linux-4.4.14/Documentation/devicetree/bindings/net/can/ |
| D | xilinx_can.txt | 16 - clocks : Clock phandles (see clock bindings for details).
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| D | rcar_can.txt | 17 - renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
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| /linux-4.4.14/Documentation/devicetree/bindings/arm/omap/ |
| D | prcm.txt | 3 Power Reset and Clock Manager lists the device clocks and clockdomains under
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| /linux-4.4.14/Documentation/devicetree/bindings/input/touchscreen/ |
| D | stmpe.txt | 14 - st,adc-freq: ADC Clock speed (0 -> 1.625 MHz, 1 -> 3.25 MHz, 2 || 3 -> 6.5 MHz)
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| /linux-4.4.14/drivers/video/fbdev/savage/ |
| D | savagefb.h | 138 unsigned int Clock; member
164 unsigned char Clock; member
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| /linux-4.4.14/Documentation/devicetree/bindings/arm/ |
| D | atmel-at91.txt | 136 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
140 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
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| D | arm,scpi.txt | 23 Clock bindings for the clocks based on SCPI Message Protocol
50 - #clock-cells : Should be 1. Contains the Clock ID value used by SCPI commands.
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| /linux-4.4.14/Documentation/devicetree/bindings/power/ |
| D | fsl,imx-gpc.txt | 14 - clocks: Clock phandles to devices in the PU power domain that need
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| /linux-4.4.14/arch/blackfin/ |
| D | Kconfig | 425 comment "Clock/PLL Setup"
456 bool "Half Clock In"
479 prompt "Core Clock Divider"
500 int "System Clock Divider"
509 System Clock = (PLL frequency) / (this setting)
520 System Clock0 = (System Clock) / (this setting)
530 System Clock1 = (System Clock) / (this setting)
533 int "DDR Clock Divider"
540 DDR Clock = (PLL frequency) / (this setting)
662 menu "Clock event device"
[all …]
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| /linux-4.4.14/Documentation/hwmon/ |
| D | max197 | 40 7,6 PD1,PD0 Clock and Power-Down modes
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| /linux-4.4.14/Documentation/devicetree/bindings/interrupt-controller/ |
| D | mips-gic.txt | 33 - clock-frequency : Clock frequency at which the GIC timers operate.
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| /linux-4.4.14/Documentation/devicetree/bindings/clock/st/ |
| D | st,flexgen.txt | 30 | | ------- | | Clock | | | | | | |
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| /linux-4.4.14/Documentation/devicetree/bindings/powerpc/4xx/ |
| D | cpm.txt | 1 PPC4xx Clock Power Management (CPM) node
|
| /linux-4.4.14/Documentation/arm/Samsung-S3C24XX/ |
| D | S3C2412.txt | 12 Clock
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| /linux-4.4.14/drivers/pci/pcie/ |
| D | Kconfig | 36 Power Management) and Clock Power Management. ASPM supports
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| /linux-4.4.14/Documentation/devicetree/bindings/memory-controllers/ |
| D | ingenic,jz4780-nemc.txt | 10 - clocks: Clock for the NEMC controller.
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| /linux-4.4.14/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | pmc.txt | 23 is the PMC block, and the second resource is the Clock Configuration
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| /linux-4.4.14/Documentation/ |
| D | rtc.txt | 2 Real Time Clock (RTC) Drivers for Linux
5 When Linux developers talk about a "Real Time Clock", they usually mean
38 All PCs (even Alpha machines) have a Real Time Clock built into them.
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| /linux-4.4.14/arch/unicore32/configs/ |
| D | unicore32_defconfig | 167 # Real Time Clock
|