| /linux-4.4.14/arch/arm/kernel/ |
| H A D | insn.c | 10 long offset; __arm_gen_branch_thumb2() local
12 offset = (long)addr - (long)(pc + 4); __arm_gen_branch_thumb2()
13 if (offset < -16777216 || offset > 16777214) { __arm_gen_branch_thumb2()
18 s = (offset >> 24) & 0x1; __arm_gen_branch_thumb2()
19 i1 = (offset >> 23) & 0x1; __arm_gen_branch_thumb2()
20 i2 = (offset >> 22) & 0x1; __arm_gen_branch_thumb2()
21 imm10 = (offset >> 12) & 0x3ff; __arm_gen_branch_thumb2()
22 imm11 = (offset >> 1) & 0x7ff; __arm_gen_branch_thumb2()
39 long offset; __arm_gen_branch_arm() local
44 offset = (long)addr - (long)(pc + 8); __arm_gen_branch_arm()
45 if (unlikely(offset < -33554432 || offset > 33554428)) { __arm_gen_branch_arm()
50 offset = (offset >> 2) & 0x00ffffff; __arm_gen_branch_arm()
52 return opcode | offset; __arm_gen_branch_arm()
|
| H A D | module.c | 68 s32 offset; apply_relocate() local
74 offset = ELF32_R_SYM(rel->r_info); apply_relocate()
75 if (offset < 0 || offset > (symsec->sh_size / sizeof(Elf32_Sym))) { apply_relocate()
76 pr_err("%s: section %u reloc %u: bad relocation sym offset\n", apply_relocate()
81 sym = ((Elf32_Sym *)symsec->sh_addr) + offset; apply_relocate()
85 pr_err("%s: section %u reloc %u sym '%s': out of bounds relocation, offset %d size %u\n", apply_relocate()
112 offset = __mem_to_opcode_arm(*(u32 *)loc); apply_relocate()
113 offset = (offset & 0x00ffffff) << 2; apply_relocate()
114 if (offset & 0x02000000) apply_relocate()
115 offset -= 0x04000000; apply_relocate()
117 offset += sym->st_value - loc; apply_relocate()
120 * Route through a PLT entry if 'offset' exceeds the apply_relocate()
121 * supported range. Note that 'offset + loc + 8' apply_relocate()
126 (offset <= (s32)0xfe000000 || apply_relocate()
127 offset >= (s32)0x02000000)) apply_relocate()
128 offset = get_module_plt(module, loc, apply_relocate()
129 offset + loc + 8) apply_relocate()
132 if (offset <= (s32)0xfe000000 || apply_relocate()
133 offset >= (s32)0x02000000) { apply_relocate()
141 offset >>= 2; apply_relocate()
142 offset &= 0x00ffffff; apply_relocate()
145 *(u32 *)loc |= __opcode_to_mem_arm(offset); apply_relocate()
158 offset = *(u32 *)loc + sym->st_value - loc; apply_relocate()
159 *(u32 *)loc = offset & 0x7fffffff; apply_relocate()
164 offset = tmp = __mem_to_opcode_arm(*(u32 *)loc); apply_relocate()
165 offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff); apply_relocate()
166 offset = (offset ^ 0x8000) - 0x8000; apply_relocate()
168 offset += sym->st_value; apply_relocate()
170 offset >>= 16; apply_relocate()
173 tmp |= ((offset & 0xf000) << 4) | apply_relocate()
174 (offset & 0x0fff); apply_relocate()
206 * S = upper[10] = offset[24] apply_relocate()
207 * I1 = ~(J1 ^ S) = offset[23] apply_relocate()
208 * I2 = ~(J2 ^ S) = offset[22] apply_relocate()
209 * imm10 = upper[9:0] = offset[21:12] apply_relocate()
210 * imm11 = lower[10:0] = offset[11:1] apply_relocate()
217 offset = (sign << 24) | ((~(j1 ^ sign) & 1) << 23) | apply_relocate()
221 if (offset & 0x01000000) apply_relocate()
222 offset -= 0x02000000; apply_relocate()
223 offset += sym->st_value - loc; apply_relocate()
226 * Route through a PLT entry if 'offset' exceeds the apply_relocate()
230 (offset <= (s32)0xff000000 || apply_relocate()
231 offset >= (s32)0x01000000)) apply_relocate()
232 offset = get_module_plt(module, loc, apply_relocate()
233 offset + loc + 4) apply_relocate()
236 if (offset <= (s32)0xff000000 || apply_relocate()
237 offset >= (s32)0x01000000) { apply_relocate()
245 sign = (offset >> 24) & 1; apply_relocate()
246 j1 = sign ^ (~(offset >> 23) & 1); apply_relocate()
247 j2 = sign ^ (~(offset >> 22) & 1); apply_relocate()
249 ((offset >> 12) & 0x03ff)); apply_relocate()
252 ((offset >> 1) & 0x07ff)); apply_relocate()
273 offset = ((upper & 0x000f) << 12) | apply_relocate()
276 offset = (offset ^ 0x8000) - 0x8000; apply_relocate()
277 offset += sym->st_value; apply_relocate()
280 offset >>= 16; apply_relocate()
283 ((offset & 0xf000) >> 12) | apply_relocate()
284 ((offset & 0x0800) >> 1)); apply_relocate()
286 ((offset & 0x0700) << 4) | apply_relocate()
287 (offset & 0x00ff)); apply_relocate()
|
| /linux-4.4.14/drivers/net/wireless/b43/ |
| H A D | tables_phy_ht.h | 9 #define B43_HTTAB8(table, offset) (((table) << 10) | (offset) | B43_HTTAB_8BIT)
10 #define B43_HTTAB16(table, offset) (((table) << 10) | (offset) | B43_HTTAB_16BIT)
11 #define B43_HTTAB32(table, offset) (((table) << 10) | (offset) | B43_HTTAB_32BIT)
13 u32 b43_httab_read(struct b43_wldev *dev, u32 offset);
14 void b43_httab_read_bulk(struct b43_wldev *dev, u32 offset,
16 void b43_httab_write(struct b43_wldev *dev, u32 offset, u32 value);
17 void b43_httab_write_few(struct b43_wldev *dev, u32 offset, size_t num, ...);
18 void b43_httab_write_bulk(struct b43_wldev *dev, u32 offset,
|
| H A D | tables_phy_lcn.h | 9 #define B43_LCNTAB8(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_8BIT)
10 #define B43_LCNTAB16(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_16BIT)
11 #define B43_LCNTAB32(table, offset) (((table) << 10) | (offset) | B43_LCNTAB_32BIT)
15 u32 b43_lcntab_read(struct b43_wldev *dev, u32 offset);
16 void b43_lcntab_read_bulk(struct b43_wldev *dev, u32 offset,
18 void b43_lcntab_write(struct b43_wldev *dev, u32 offset, u32 value);
19 void b43_lcntab_write_bulk(struct b43_wldev *dev, u32 offset,
|
| H A D | tables_lpphy.h | 9 #define B43_LPTAB8(table, offset) (((table) << 10) | (offset) | B43_LPTAB_8BIT)
10 #define B43_LPTAB16(table, offset) (((table) << 10) | (offset) | B43_LPTAB_16BIT)
11 #define B43_LPTAB32(table, offset) (((table) << 10) | (offset) | B43_LPTAB_32BIT)
17 u32 b43_lptab_read(struct b43_wldev *dev, u32 offset);
18 void b43_lptab_write(struct b43_wldev *dev, u32 offset, u32 value);
23 void b43_lptab_read_bulk(struct b43_wldev *dev, u32 offset,
25 void b43_lptab_write_bulk(struct b43_wldev *dev, u32 offset,
35 void lpphy_write_gain_table(struct b43_wldev *dev, int offset,
37 void lpphy_write_gain_table_bulk(struct b43_wldev *dev, int offset, int count,
|
| H A D | tables_lpphy.c | 34 u16 offset; member in struct:b206x_init_tab_entry
43 /* { .offset = B2062_N_COMM1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
44 /* { .offset = 0x0001, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
45 /* { .offset = B2062_N_COMM2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
46 /* { .offset = B2062_N_COMM3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
47 { .offset = B2062_N_COMM4, .value_a = 0x0001, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLAG_G, },
48 /* { .offset = B2062_N_COMM5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
49 /* { .offset = B2062_N_COMM6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
50 /* { .offset = B2062_N_COMM7, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
51 /* { .offset = B2062_N_COMM8, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
52 /* { .offset = B2062_N_COMM9, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
53 /* { .offset = B2062_N_COMM10, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
54 /* { .offset = B2062_N_COMM11, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
55 /* { .offset = B2062_N_COMM12, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
56 /* { .offset = B2062_N_COMM13, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
57 /* { .offset = B2062_N_COMM14, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
58 /* { .offset = B2062_N_COMM15, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
59 /* { .offset = B2062_N_PDN_CTL0, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
60 { .offset = B2062_N_PDN_CTL1, .value_a = 0x0000, .value_g = 0x00CA, .flags = B206X_FLAG_G, },
61 /* { .offset = B2062_N_PDN_CTL2, .value_a = 0x0018, .value_g = 0x0018, .flags = 0, }, */
62 { .offset = B2062_N_PDN_CTL3, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLAG_G, },
63 { .offset = B2062_N_PDN_CTL4, .value_a = 0x0015, .value_g = 0x002A, .flags = B206X_FLAG_A | B206X_FLAG_G, },
64 /* { .offset = B2062_N_GEN_CTL0, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
65 /* { .offset = B2062_N_IQ_CALIB, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
66 { .offset = B2062_N_LGENC, .value_a = 0x00DB, .value_g = 0x00FF, .flags = B206X_FLAG_A, },
67 /* { .offset = B2062_N_LGENA_LPF, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
68 /* { .offset = B2062_N_LGENA_BIAS0, .value_a = 0x0041, .value_g = 0x0041, .flags = 0, }, */
69 /* { .offset = B2062_N_LGNEA_BIAS1, .value_a = 0x0002, .value_g = 0x0002, .flags = 0, }, */
70 /* { .offset = B2062_N_LGENA_CTL0, .value_a = 0x0032, .value_g = 0x0032, .flags = 0, }, */
71 /* { .offset = B2062_N_LGENA_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
72 /* { .offset = B2062_N_LGENA_CTL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
73 { .offset = B2062_N_LGENA_TUNE0, .value_a = 0x00DD, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLAG_G, },
74 /* { .offset = B2062_N_LGENA_TUNE1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
75 { .offset = B2062_N_LGENA_TUNE2, .value_a = 0x00DD, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLAG_G, },
76 { .offset = B2062_N_LGENA_TUNE3, .value_a = 0x0077, .value_g = 0x00B5, .flags = B206X_FLAG_A | B206X_FLAG_G, },
77 { .offset = B2062_N_LGENA_CTL3, .value_a = 0x0000, .value_g = 0x00FF, .flags = B206X_FLAG_A | B206X_FLAG_G, },
78 /* { .offset = B2062_N_LGENA_CTL4, .value_a = 0x001F, .value_g = 0x001F, .flags = 0, }, */
79 /* { .offset = B2062_N_LGENA_CTL5, .value_a = 0x0032, .value_g = 0x0032, .flags = 0, }, */
80 /* { .offset = B2062_N_LGENA_CTL6, .value_a = 0x0032, .value_g = 0x0032, .flags = 0, }, */
81 { .offset = B2062_N_LGENA_CTL7, .value_a = 0x0033, .value_g = 0x0033, .flags = B206X_FLAG_A | B206X_FLAG_G, },
82 /* { .offset = B2062_N_RXA_CTL0, .value_a = 0x0009, .value_g = 0x0009, .flags = 0, }, */
83 { .offset = B2062_N_RXA_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
84 /* { .offset = B2062_N_RXA_CTL2, .value_a = 0x0018, .value_g = 0x0018, .flags = 0, }, */
85 /* { .offset = B2062_N_RXA_CTL3, .value_a = 0x0027, .value_g = 0x0027, .flags = 0, }, */
86 /* { .offset = B2062_N_RXA_CTL4, .value_a = 0x0028, .value_g = 0x0028, .flags = 0, }, */
87 /* { .offset = B2062_N_RXA_CTL5, .value_a = 0x0007, .value_g = 0x0007, .flags = 0, }, */
88 /* { .offset = B2062_N_RXA_CTL6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
89 /* { .offset = B2062_N_RXA_CTL7, .value_a = 0x0008, .value_g = 0x0008, .flags = 0, }, */
90 { .offset = B2062_N_RXBB_CTL0, .value_a = 0x0082, .value_g = 0x0080, .flags = B206X_FLAG_A | B206X_FLAG_G, },
91 /* { .offset = B2062_N_RXBB_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
92 /* { .offset = B2062_N_RXBB_CTL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
93 /* { .offset = B2062_N_RXBB_GAIN0, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
94 { .offset = B2062_N_RXBB_GAIN1, .value_a = 0x0004, .value_g = 0x0004, .flags = B206X_FLAG_A | B206X_FLAG_G, },
95 { .offset = B2062_N_RXBB_GAIN2, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLAG_G, },
96 /* { .offset = B2062_N_RXBB_GAIN3, .value_a = 0x0011, .value_g = 0x0011, .flags = 0, }, */
97 /* { .offset = B2062_N_RXBB_RSSI0, .value_a = 0x0043, .value_g = 0x0043, .flags = 0, }, */
98 /* { .offset = B2062_N_RXBB_RSSI1, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
99 /* { .offset = B2062_N_RXBB_CALIB0, .value_a = 0x0010, .value_g = 0x0010, .flags = 0, }, */
100 /* { .offset = B2062_N_RXBB_CALIB1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
101 /* { .offset = B2062_N_RXBB_CALIB2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
102 /* { .offset = B2062_N_RXBB_BIAS0, .value_a = 0x0006, .value_g = 0x0006, .flags = 0, }, */
103 /* { .offset = B2062_N_RXBB_BIAS1, .value_a = 0x002A, .value_g = 0x002A, .flags = 0, }, */
104 /* { .offset = B2062_N_RXBB_BIAS2, .value_a = 0x00AA, .value_g = 0x00AA, .flags = 0, }, */
105 /* { .offset = B2062_N_RXBB_BIAS3, .value_a = 0x0021, .value_g = 0x0021, .flags = 0, }, */
106 /* { .offset = B2062_N_RXBB_BIAS4, .value_a = 0x00AA, .value_g = 0x00AA, .flags = 0, }, */
107 /* { .offset = B2062_N_RXBB_BIAS5, .value_a = 0x0022, .value_g = 0x0022, .flags = 0, }, */
108 /* { .offset = B2062_N_RXBB_RSSI2, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
109 /* { .offset = B2062_N_RXBB_RSSI3, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
110 /* { .offset = B2062_N_RXBB_RSSI4, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
111 /* { .offset = B2062_N_RXBB_RSSI5, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
112 /* { .offset = B2062_N_TX_CTL0, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
113 /* { .offset = B2062_N_TX_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
114 /* { .offset = B2062_N_TX_CTL2, .value_a = 0x0084, .value_g = 0x0084, .flags = 0, }, */
115 /* { .offset = B2062_N_TX_CTL3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
116 { .offset = B2062_N_TX_CTL4, .value_a = 0x0003, .value_g = 0x0003, .flags = B206X_FLAG_A | B206X_FLAG_G, },
117 { .offset = B2062_N_TX_CTL5, .value_a = 0x0002, .value_g = 0x0002, .flags = B206X_FLAG_A | B206X_FLAG_G, },
118 /* { .offset = B2062_N_TX_CTL6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
119 /* { .offset = B2062_N_TX_CTL7, .value_a = 0x0058, .value_g = 0x0058, .flags = 0, }, */
120 /* { .offset = B2062_N_TX_CTL8, .value_a = 0x0082, .value_g = 0x0082, .flags = 0, }, */
121 /* { .offset = B2062_N_TX_CTL9, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
122 /* { .offset = B2062_N_TX_CTL_A, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
123 /* { .offset = B2062_N_TX_GC2G, .value_a = 0x00FF, .value_g = 0x00FF, .flags = 0, }, */
124 /* { .offset = B2062_N_TX_GC5G, .value_a = 0x00FF, .value_g = 0x00FF, .flags = 0, }, */
125 { .offset = B2062_N_TX_TUNE, .value_a = 0x0088, .value_g = 0x001B, .flags = B206X_FLAG_A | B206X_FLAG_G, },
126 /* { .offset = B2062_N_TX_PAD, .value_a = 0x0088, .value_g = 0x0088, .flags = 0, }, */
127 /* { .offset = B2062_N_TX_PGA, .value_a = 0x0088, .value_g = 0x0088, .flags = 0, }, */
128 /* { .offset = B2062_N_TX_PADAUX, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
129 /* { .offset = B2062_N_TX_PGAAUX, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
130 /* { .offset = B2062_N_TSSI_CTL0, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
131 /* { .offset = B2062_N_TSSI_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
132 /* { .offset = B2062_N_TSSI_CTL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
133 /* { .offset = B2062_N_IQ_CALIB_CTL0, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
134 /* { .offset = B2062_N_IQ_CALIB_CTL1, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
135 /* { .offset = B2062_N_IQ_CALIB_CTL2, .value_a = 0x0032, .value_g = 0x0032, .flags = 0, }, */
136 /* { .offset = B2062_N_CALIB_TS, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
137 /* { .offset = B2062_N_CALIB_CTL0, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
138 /* { .offset = B2062_N_CALIB_CTL1, .value_a = 0x0015, .value_g = 0x0015, .flags = 0, }, */
139 /* { .offset = B2062_N_CALIB_CTL2, .value_a = 0x000F, .value_g = 0x000F, .flags = 0, }, */
140 /* { .offset = B2062_N_CALIB_CTL3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
141 /* { .offset = B2062_N_CALIB_CTL4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
142 /* { .offset = B2062_N_CALIB_DBG0, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
143 /* { .offset = B2062_N_CALIB_DBG1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
144 /* { .offset = B2062_N_CALIB_DBG2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
145 /* { .offset = B2062_N_CALIB_DBG3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
146 /* { .offset = B2062_N_PSENSE_CTL0, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
147 /* { .offset = B2062_N_PSENSE_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
148 /* { .offset = B2062_N_PSENSE_CTL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
149 /* { .offset = B2062_N_TEST_BUF0, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
150 /* { .offset = B2062_S_COMM1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
151 /* { .offset = B2062_S_RADIO_ID_CODE, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
152 /* { .offset = B2062_S_COMM2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
153 /* { .offset = B2062_S_COMM3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
154 { .offset = B2062_S_COMM4, .value_a = 0x0001, .value_g = 0x0000, .flags = B206X_FLAG_A | B206X_FLAG_G, },
155 /* { .offset = B2062_S_COMM5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
156 /* { .offset = B2062_S_COMM6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
157 /* { .offset = B2062_S_COMM7, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
158 /* { .offset = B2062_S_COMM8, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
159 /* { .offset = B2062_S_COMM9, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
160 /* { .offset = B2062_S_COMM10, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
161 /* { .offset = B2062_S_COMM11, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
162 /* { .offset = B2062_S_COMM12, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
163 /* { .offset = B2062_S_COMM13, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
164 /* { .offset = B2062_S_COMM14, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
165 /* { .offset = B2062_S_COMM15, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
166 { .offset = B2062_S_PDS_CTL0, .value_a = 0x00FF, .value_g = 0x00FF, .flags = B206X_FLAG_A | B206X_FLAG_G, },
167 /* { .offset = B2062_S_PDS_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
168 /* { .offset = B2062_S_PDS_CTL2, .value_a = 0x008E, .value_g = 0x008E, .flags = 0, }, */
169 /* { .offset = B2062_S_PDS_CTL3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
170 /* { .offset = B2062_S_BG_CTL0, .value_a = 0x0006, .value_g = 0x0006, .flags = 0, }, */
171 /* { .offset = B2062_S_BG_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
172 /* { .offset = B2062_S_BG_CTL2, .value_a = 0x0011, .value_g = 0x0011, .flags = 0, }, */
173 { .offset = B2062_S_LGENG_CTL0, .value_a = 0x00F8, .value_g = 0x00D8, .flags = B206X_FLAG_A | B206X_FLAG_G, },
174 { .offset = B2062_S_LGENG_CTL1, .value_a = 0x003C, .value_g = 0x0024, .flags = B206X_FLAG_A | B206X_FLAG_G, },
175 /* { .offset = B2062_S_LGENG_CTL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
176 /* { .offset = B2062_S_LGENG_CTL3, .value_a = 0x0041, .value_g = 0x0041, .flags = 0, }, */
177 /* { .offset = B2062_S_LGENG_CTL4, .value_a = 0x0002, .value_g = 0x0002, .flags = 0, }, */
178 /* { .offset = B2062_S_LGENG_CTL5, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
179 /* { .offset = B2062_S_LGENG_CTL6, .value_a = 0x0022, .value_g = 0x0022, .flags = 0, }, */
180 /* { .offset = B2062_S_LGENG_CTL7, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
181 { .offset = B2062_S_LGENG_CTL8, .value_a = 0x0088, .value_g = 0x0080, .flags = B206X_FLAG_A | B206X_FLAG_G, },
182 /* { .offset = B2062_S_LGENG_CTL9, .value_a = 0x0088, .value_g = 0x0088, .flags = 0, }, */
183 { .offset = B2062_S_LGENG_CTL10, .value_a = 0x0088, .value_g = 0x0080, .flags = B206X_FLAG_A | B206X_FLAG_G, },
184 /* { .offset = B2062_S_LGENG_CTL11, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
185 /* { .offset = B2062_S_REFPLL_CTL0, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
186 /* { .offset = B2062_S_REFPLL_CTL1, .value_a = 0x0007, .value_g = 0x0007, .flags = 0, }, */
187 /* { .offset = B2062_S_REFPLL_CTL2, .value_a = 0x00AF, .value_g = 0x00AF, .flags = 0, }, */
188 /* { .offset = B2062_S_REFPLL_CTL3, .value_a = 0x0012, .value_g = 0x0012, .flags = 0, }, */
189 /* { .offset = B2062_S_REFPLL_CTL4, .value_a = 0x000B, .value_g = 0x000B, .flags = 0, }, */
190 /* { .offset = B2062_S_REFPLL_CTL5, .value_a = 0x005F, .value_g = 0x005F, .flags = 0, }, */
191 /* { .offset = B2062_S_REFPLL_CTL6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
192 /* { .offset = B2062_S_REFPLL_CTL7, .value_a = 0x0040, .value_g = 0x0040, .flags = 0, }, */
193 /* { .offset = B2062_S_REFPLL_CTL8, .value_a = 0x0052, .value_g = 0x0052, .flags = 0, }, */
194 /* { .offset = B2062_S_REFPLL_CTL9, .value_a = 0x0026, .value_g = 0x0026, .flags = 0, }, */
195 /* { .offset = B2062_S_REFPLL_CTL10, .value_a = 0x0003, .value_g = 0x0003, .flags = 0, }, */
196 /* { .offset = B2062_S_REFPLL_CTL11, .value_a = 0x0036, .value_g = 0x0036, .flags = 0, }, */
197 /* { .offset = B2062_S_REFPLL_CTL12, .value_a = 0x0057, .value_g = 0x0057, .flags = 0, }, */
198 /* { .offset = B2062_S_REFPLL_CTL13, .value_a = 0x0011, .value_g = 0x0011, .flags = 0, }, */
199 /* { .offset = B2062_S_REFPLL_CTL14, .value_a = 0x0075, .value_g = 0x0075, .flags = 0, }, */
200 /* { .offset = B2062_S_REFPLL_CTL15, .value_a = 0x00B4, .value_g = 0x00B4, .flags = 0, }, */
201 /* { .offset = B2062_S_REFPLL_CTL16, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
202 { .offset = B2062_S_RFPLL_CTL0, .value_a = 0x0098, .value_g = 0x0098, .flags = B206X_FLAG_A | B206X_FLAG_G, },
203 { .offset = B2062_S_RFPLL_CTL1, .value_a = 0x0010, .value_g = 0x0010, .flags = B206X_FLAG_A | B206X_FLAG_G, },
204 /* { .offset = B2062_S_RFPLL_CTL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
205 /* { .offset = B2062_S_RFPLL_CTL3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
206 /* { .offset = B2062_S_RFPLL_CTL4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
207 { .offset = B2062_S_RFPLL_CTL5, .value_a = 0x0043, .value_g = 0x0043, .flags = B206X_FLAG_A | B206X_FLAG_G, },
208 { .offset = B2062_S_RFPLL_CTL6, .value_a = 0x0047, .value_g = 0x0047, .flags = B206X_FLAG_A | B206X_FLAG_G, },
209 { .offset = B2062_S_RFPLL_CTL7, .value_a = 0x000C, .value_g = 0x000C, .flags = B206X_FLAG_A | B206X_FLAG_G, },
210 { .offset = B2062_S_RFPLL_CTL8, .value_a = 0x0011, .value_g = 0x0011, .flags = B206X_FLAG_A | B206X_FLAG_G, },
211 { .offset = B2062_S_RFPLL_CTL9, .value_a = 0x0011, .value_g = 0x0011, .flags = B206X_FLAG_A | B206X_FLAG_G, },
212 { .offset = B2062_S_RFPLL_CTL10, .value_a = 0x000E, .value_g = 0x000E, .flags = B206X_FLAG_A | B206X_FLAG_G, },
213 { .offset = B2062_S_RFPLL_CTL11, .value_a = 0x0008, .value_g = 0x0008, .flags = B206X_FLAG_A | B206X_FLAG_G, },
214 { .offset = B2062_S_RFPLL_CTL12, .value_a = 0x0033, .value_g = 0x0033, .flags = B206X_FLAG_A | B206X_FLAG_G, },
215 { .offset = B2062_S_RFPLL_CTL13, .value_a = 0x000A, .value_g = 0x000A, .flags = B206X_FLAG_A | B206X_FLAG_G, },
216 { .offset = B2062_S_RFPLL_CTL14, .value_a = 0x0006, .value_g = 0x0006, .flags = B206X_FLAG_A | B206X_FLAG_G, },
217 /* { .offset = B2062_S_RFPLL_CTL15, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
218 /* { .offset = B2062_S_RFPLL_CTL16, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
219 /* { .offset = B2062_S_RFPLL_CTL17, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
220 { .offset = B2062_S_RFPLL_CTL18, .value_a = 0x003E, .value_g = 0x003E, .flags = B206X_FLAG_A | B206X_FLAG_G, },
221 { .offset = B2062_S_RFPLL_CTL19, .value_a = 0x0013, .value_g = 0x0013, .flags = B206X_FLAG_A | B206X_FLAG_G, },
222 /* { .offset = B2062_S_RFPLL_CTL20, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
223 { .offset = B2062_S_RFPLL_CTL21, .value_a = 0x0062, .value_g = 0x0062, .flags = B206X_FLAG_A | B206X_FLAG_G, },
224 { .offset = B2062_S_RFPLL_CTL22, .value_a = 0x0007, .value_g = 0x0007, .flags = B206X_FLAG_A | B206X_FLAG_G, },
225 { .offset = B2062_S_RFPLL_CTL23, .value_a = 0x0016, .value_g = 0x0016, .flags = B206X_FLAG_A | B206X_FLAG_G, },
226 { .offset = B2062_S_RFPLL_CTL24, .value_a = 0x005C, .value_g = 0x005C, .flags = B206X_FLAG_A | B206X_FLAG_G, },
227 { .offset = B2062_S_RFPLL_CTL25, .value_a = 0x0095, .value_g = 0x0095, .flags = B206X_FLAG_A | B206X_FLAG_G, },
228 /* { .offset = B2062_S_RFPLL_CTL26, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
229 /* { .offset = B2062_S_RFPLL_CTL27, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
230 /* { .offset = B2062_S_RFPLL_CTL28, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
231 /* { .offset = B2062_S_RFPLL_CTL29, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
232 { .offset = B2062_S_RFPLL_CTL30, .value_a = 0x00A0, .value_g = 0x00A0, .flags = B206X_FLAG_A | B206X_FLAG_G, },
233 { .offset = B2062_S_RFPLL_CTL31, .value_a = 0x0004, .value_g = 0x0004, .flags = B206X_FLAG_A | B206X_FLAG_G, },
234 /* { .offset = B2062_S_RFPLL_CTL32, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
235 { .offset = B2062_S_RFPLL_CTL33, .value_a = 0x00CC, .value_g = 0x00CC, .flags = B206X_FLAG_A | B206X_FLAG_G, },
236 { .offset = B2062_S_RFPLL_CTL34, .value_a = 0x0007, .value_g = 0x0007, .flags = B206X_FLAG_A | B206X_FLAG_G, },
237 /* { .offset = B2062_S_RXG_CNT0, .value_a = 0x0010, .value_g = 0x0010, .flags = 0, }, */
238 /* { .offset = B2062_S_RXG_CNT1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
239 /* { .offset = B2062_S_RXG_CNT2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
240 /* { .offset = B2062_S_RXG_CNT3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
241 /* { .offset = B2062_S_RXG_CNT4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
242 /* { .offset = B2062_S_RXG_CNT5, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
243 /* { .offset = B2062_S_RXG_CNT6, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
244 /* { .offset = B2062_S_RXG_CNT7, .value_a = 0x0005, .value_g = 0x0005, .flags = 0, }, */
245 { .offset = B2062_S_RXG_CNT8, .value_a = 0x000F, .value_g = 0x000F, .flags = B206X_FLAG_A, },
246 /* { .offset = B2062_S_RXG_CNT9, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
247 /* { .offset = B2062_S_RXG_CNT10, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
248 /* { .offset = B2062_S_RXG_CNT11, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
249 /* { .offset = B2062_S_RXG_CNT12, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
250 /* { .offset = B2062_S_RXG_CNT13, .value_a = 0x0044, .value_g = 0x0044, .flags = 0, }, */
251 /* { .offset = B2062_S_RXG_CNT14, .value_a = 0x00A0, .value_g = 0x00A0, .flags = 0, }, */
252 /* { .offset = B2062_S_RXG_CNT15, .value_a = 0x0004, .value_g = 0x0004, .flags = 0, }, */
253 /* { .offset = B2062_S_RXG_CNT16, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
254 /* { .offset = B2062_S_RXG_CNT17, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
258 { .offset = B2063_COMM1, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
259 /* { .offset = B2063_COMM2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
260 /* { .offset = B2063_COMM3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
261 /* { .offset = B2063_COMM4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
262 /* { .offset = B2063_COMM5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
263 /* { .offset = B2063_COMM6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
264 /* { .offset = B2063_COMM7, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
265 /* { .offset = B2063_COMM8, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
266 /* { .offset = B2063_COMM9, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
267 { .offset = B2063_COMM10, .value_a = 0x0001, .value_g = 0x0000, .flags = B206X_FLAG_A, },
268 /* { .offset = B2063_COMM11, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
269 /* { .offset = B2063_COMM12, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
270 /* { .offset = B2063_COMM13, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
271 /* { .offset = B2063_COMM14, .value_a = 0x0006, .value_g = 0x0006, .flags = 0, }, */
272 /* { .offset = B2063_COMM15, .value_a = 0x000f, .value_g = 0x000f, .flags = 0, }, */
273 { .offset = B2063_COMM16, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
274 { .offset = B2063_COMM17, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
275 { .offset = B2063_COMM18, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
276 { .offset = B2063_COMM19, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
277 { .offset = B2063_COMM20, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
278 { .offset = B2063_COMM21, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
279 { .offset = B2063_COMM22, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
280 { .offset = B2063_COMM23, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
281 { .offset = B2063_COMM24, .value_a = 0x0000, .value_g = 0x0000, .flags = B206X_FLAG_G, },
282 /* { .offset = B2063_PWR_SWITCH_CTL, .value_a = 0x007f, .value_g = 0x007f, .flags = 0, }, */
283 /* { .offset = B2063_PLL_SP1, .value_a = 0x003f, .value_g = 0x003f, .flags = 0, }, */
284 /* { .offset = B2063_PLL_SP2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
285 { .offset = B2063_LOGEN_SP1, .value_a = 0x00e8, .value_g = 0x00d4, .flags = B206X_FLAG_A | B206X_FLAG_G, },
286 { .offset = B2063_LOGEN_SP2, .value_a = 0x00a7, .value_g = 0x0053, .flags = B206X_FLAG_A | B206X_FLAG_G, },
287 /* { .offset = B2063_LOGEN_SP3, .value_a = 0x00ff, .value_g = 0x00ff, .flags = 0, }, */
288 { .offset = B2063_LOGEN_SP4, .value_a = 0x00f0, .value_g = 0x000f, .flags = B206X_FLAG_A | B206X_FLAG_G, },
289 /* { .offset = B2063_LOGEN_SP5, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
290 { .offset = B2063_G_RX_SP1, .value_a = 0x001f, .value_g = 0x005e, .flags = B206X_FLAG_G, },
291 { .offset = B2063_G_RX_SP2, .value_a = 0x007f, .value_g = 0x007e, .flags = B206X_FLAG_G, },
292 { .offset = B2063_G_RX_SP3, .value_a = 0x0030, .value_g = 0x00f0, .flags = B206X_FLAG_G, },
293 /* { .offset = B2063_G_RX_SP4, .value_a = 0x0035, .value_g = 0x0035, .flags = 0, }, */
294 /* { .offset = B2063_G_RX_SP5, .value_a = 0x003f, .value_g = 0x003f, .flags = 0, }, */
295 /* { .offset = B2063_G_RX_SP6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
296 { .offset = B2063_G_RX_SP7, .value_a = 0x007f, .value_g = 0x007f, .flags = B206X_FLAG_A | B206X_FLAG_G, },
297 /* { .offset = B2063_G_RX_SP8, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
298 /* { .offset = B2063_G_RX_SP9, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
299 { .offset = B2063_G_RX_SP10, .value_a = 0x000c, .value_g = 0x000c, .flags = B206X_FLAG_A | B206X_FLAG_G, },
300 /* { .offset = B2063_G_RX_SP11, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
301 { .offset = B2063_A_RX_SP1, .value_a = 0x003c, .value_g = 0x003f, .flags = B206X_FLAG_A, },
302 { .offset = B2063_A_RX_SP2, .value_a = 0x00fc, .value_g = 0x00fe, .flags = B206X_FLAG_A, },
303 /* { .offset = B2063_A_RX_SP3, .value_a = 0x00ff, .value_g = 0x00ff, .flags = 0, }, */
304 /* { .offset = B2063_A_RX_SP4, .value_a = 0x00ff, .value_g = 0x00ff, .flags = 0, }, */
305 /* { .offset = B2063_A_RX_SP5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
306 /* { .offset = B2063_A_RX_SP6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
307 { .offset = B2063_A_RX_SP7, .value_a = 0x0008, .value_g = 0x0008, .flags = B206X_FLAG_A | B206X_FLAG_G, },
308 /* { .offset = B2063_RX_BB_SP1, .value_a = 0x000f, .value_g = 0x000f, .flags = 0, }, */
309 /* { .offset = B2063_RX_BB_SP2, .value_a = 0x0022, .value_g = 0x0022, .flags = 0, }, */
310 /* { .offset = B2063_RX_BB_SP3, .value_a = 0x00a8, .value_g = 0x00a8, .flags = 0, }, */
311 { .offset = B2063_RX_BB_SP4, .value_a = 0x0060, .value_g = 0x0060, .flags = B206X_FLAG_A | B206X_FLAG_G, },
312 /* { .offset = B2063_RX_BB_SP5, .value_a = 0x0011, .value_g = 0x0011, .flags = 0, }, */
313 /* { .offset = B2063_RX_BB_SP6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
314 /* { .offset = B2063_RX_BB_SP7, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
315 { .offset = B2063_RX_BB_SP8, .value_a = 0x0030, .value_g = 0x0030, .flags = B206X_FLAG_A | B206X_FLAG_G, },
316 /* { .offset = B2063_TX_RF_SP1, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
317 /* { .offset = B2063_TX_RF_SP2, .value_a = 0x0003, .value_g = 0x0003, .flags = 0, }, */
318 { .offset = B2063_TX_RF_SP3, .value_a = 0x000c, .value_g = 0x000b, .flags = B206X_FLAG_A | B206X_FLAG_G, },
319 { .offset = B2063_TX_RF_SP4, .value_a = 0x0010, .value_g = 0x000f, .flags = B206X_FLAG_A | B206X_FLAG_G, },
320 /* { .offset = B2063_TX_RF_SP5, .value_a = 0x000f, .value_g = 0x000f, .flags = 0, }, */
321 /* { .offset = B2063_TX_RF_SP6, .value_a = 0x0080, .value_g = 0x0080, .flags = 0, }, */
322 /* { .offset = B2063_TX_RF_SP7, .value_a = 0x0068, .value_g = 0x0068, .flags = 0, }, */
323 /* { .offset = B2063_TX_RF_SP8, .value_a = 0x0068, .value_g = 0x0068, .flags = 0, }, */
324 /* { .offset = B2063_TX_RF_SP9, .value_a = 0x0080, .value_g = 0x0080, .flags = 0, }, */
325 /* { .offset = B2063_TX_RF_SP10, .value_a = 0x00ff, .value_g = 0x00ff, .flags = 0, }, */
326 /* { .offset = B2063_TX_RF_SP11, .value_a = 0x0003, .value_g = 0x0003, .flags = 0, }, */
327 /* { .offset = B2063_TX_RF_SP12, .value_a = 0x0038, .value_g = 0x0038, .flags = 0, }, */
328 /* { .offset = B2063_TX_RF_SP13, .value_a = 0x00ff, .value_g = 0x00ff, .flags = 0, }, */
329 /* { .offset = B2063_TX_RF_SP14, .value_a = 0x0038, .value_g = 0x0038, .flags = 0, }, */
330 /* { .offset = B2063_TX_RF_SP15, .value_a = 0x00c0, .value_g = 0x00c0, .flags = 0, }, */
331 /* { .offset = B2063_TX_RF_SP16, .value_a = 0x00ff, .value_g = 0x00ff, .flags = 0, }, */
332 /* { .offset = B2063_TX_RF_SP17, .value_a = 0x00ff, .value_g = 0x00ff, .flags = 0, }, */
333 { .offset = B2063_PA_SP1, .value_a = 0x003d, .value_g = 0x00fd, .flags = B206X_FLAG_A | B206X_FLAG_G, },
334 /* { .offset = B2063_PA_SP2, .value_a = 0x000c, .value_g = 0x000c, .flags = 0, }, */
335 /* { .offset = B2063_PA_SP3, .value_a = 0x0096, .value_g = 0x0096, .flags = 0, }, */
336 /* { .offset = B2063_PA_SP4, .value_a = 0x005a, .value_g = 0x005a, .flags = 0, }, */
337 /* { .offset = B2063_PA_SP5, .value_a = 0x007f, .value_g = 0x007f, .flags = 0, }, */
338 /* { .offset = B2063_PA_SP6, .value_a = 0x007f, .value_g = 0x007f, .flags = 0, }, */
339 /* { .offset = B2063_PA_SP7, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
340 { .offset = B2063_TX_BB_SP1, .value_a = 0x0002, .value_g = 0x0002, .flags = B206X_FLAG_A | B206X_FLAG_G, },
341 /* { .offset = B2063_TX_BB_SP2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
342 /* { .offset = B2063_TX_BB_SP3, .value_a = 0x0030, .value_g = 0x0030, .flags = 0, }, */
343 /* { .offset = B2063_REG_SP1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
344 { .offset = B2063_BANDGAP_CTL1, .value_a = 0x0056, .value_g = 0x0056, .flags = B206X_FLAG_A | B206X_FLAG_G, },
345 /* { .offset = B2063_BANDGAP_CTL2, .value_a = 0x0006, .value_g = 0x0006, .flags = 0, }, */
346 /* { .offset = B2063_LPO_CTL1, .value_a = 0x000e, .value_g = 0x000e, .flags = 0, }, */
347 /* { .offset = B2063_RC_CALIB_CTL1, .value_a = 0x007e, .value_g = 0x007e, .flags = 0, }, */
348 /* { .offset = B2063_RC_CALIB_CTL2, .value_a = 0x0015, .value_g = 0x0015, .flags = 0, }, */
349 /* { .offset = B2063_RC_CALIB_CTL3, .value_a = 0x000f, .value_g = 0x000f, .flags = 0, }, */
350 /* { .offset = B2063_RC_CALIB_CTL4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
351 /* { .offset = B2063_RC_CALIB_CTL5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
352 /* { .offset = B2063_RC_CALIB_CTL6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
353 /* { .offset = B2063_RC_CALIB_CTL7, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
354 /* { .offset = B2063_RC_CALIB_CTL8, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
355 /* { .offset = B2063_RC_CALIB_CTL9, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
356 /* { .offset = B2063_RC_CALIB_CTL10, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
357 /* { .offset = B2063_PLL_JTAG_CALNRST, .value_a = 0x0004, .value_g = 0x0004, .flags = 0, }, */
358 /* { .offset = B2063_PLL_JTAG_IN_PLL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
359 /* { .offset = B2063_PLL_JTAG_IN_PLL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
360 /* { .offset = B2063_PLL_JTAG_PLL_CP1, .value_a = 0x00cf, .value_g = 0x00cf, .flags = 0, }, */
361 /* { .offset = B2063_PLL_JTAG_PLL_CP2, .value_a = 0x0059, .value_g = 0x0059, .flags = 0, }, */
362 /* { .offset = B2063_PLL_JTAG_PLL_CP3, .value_a = 0x0007, .value_g = 0x0007, .flags = 0, }, */
363 /* { .offset = B2063_PLL_JTAG_PLL_CP4, .value_a = 0x0042, .value_g = 0x0042, .flags = 0, }, */
364 /* { .offset = B2063_PLL_JTAG_PLL_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
365 /* { .offset = B2063_PLL_JTAG_PLL_LF1, .value_a = 0x00db, .value_g = 0x00db, .flags = 0, }, */
366 /* { .offset = B2063_PLL_JTAG_PLL_LF2, .value_a = 0x0094, .value_g = 0x0094, .flags = 0, }, */
367 /* { .offset = B2063_PLL_JTAG_PLL_LF3, .value_a = 0x0028, .value_g = 0x0028, .flags = 0, }, */
368 /* { .offset = B2063_PLL_JTAG_PLL_LF4, .value_a = 0x0063, .value_g = 0x0063, .flags = 0, }, */
369 /* { .offset = B2063_PLL_JTAG_PLL_SG1, .value_a = 0x0007, .value_g = 0x0007, .flags = 0, }, */
370 /* { .offset = B2063_PLL_JTAG_PLL_SG2, .value_a = 0x00d3, .value_g = 0x00d3, .flags = 0, }, */
371 /* { .offset = B2063_PLL_JTAG_PLL_SG3, .value_a = 0x00b1, .value_g = 0x00b1, .flags = 0, }, */
372 /* { .offset = B2063_PLL_JTAG_PLL_SG4, .value_a = 0x003b, .value_g = 0x003b, .flags = 0, }, */
373 /* { .offset = B2063_PLL_JTAG_PLL_SG5, .value_a = 0x0006, .value_g = 0x0006, .flags = 0, }, */
374 /* { .offset = B2063_PLL_JTAG_PLL_VCO1, .value_a = 0x0058, .value_g = 0x0058, .flags = 0, }, */
375 { .offset = B2063_PLL_JTAG_PLL_VCO2, .value_a = 0x00f7, .value_g = 0x00f7, .flags = B206X_FLAG_A | B206X_FLAG_G, },
376 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
377 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
378 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB3, .value_a = 0x0002, .value_g = 0x0002, .flags = 0, }, */
379 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
380 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB5, .value_a = 0x0009, .value_g = 0x0009, .flags = 0, }, */
381 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB6, .value_a = 0x0005, .value_g = 0x0005, .flags = 0, }, */
382 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB7, .value_a = 0x0016, .value_g = 0x0016, .flags = 0, }, */
383 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB8, .value_a = 0x006b, .value_g = 0x006b, .flags = 0, }, */
384 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB9, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
385 /* { .offset = B2063_PLL_JTAG_PLL_VCO_CALIB10, .value_a = 0x00b3, .value_g = 0x00b3, .flags = 0, }, */
386 /* { .offset = B2063_PLL_JTAG_PLL_XTAL_12, .value_a = 0x0004, .value_g = 0x0004, .flags = 0, }, */
387 /* { .offset = B2063_PLL_JTAG_PLL_XTAL3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
388 /* { .offset = B2063_LOGEN_ACL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
389 /* { .offset = B2063_LOGEN_ACL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
390 /* { .offset = B2063_LOGEN_ACL3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
391 /* { .offset = B2063_LOGEN_ACL4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
392 /* { .offset = B2063_LOGEN_ACL5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
393 /* { .offset = B2063_LO_CALIB_INPUTS, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
394 /* { .offset = B2063_LO_CALIB_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
395 /* { .offset = B2063_LO_CALIB_CTL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
396 /* { .offset = B2063_LO_CALIB_CTL3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
397 /* { .offset = B2063_LO_CALIB_WAITCNT, .value_a = 0x0002, .value_g = 0x0002, .flags = 0, }, */
398 /* { .offset = B2063_LO_CALIB_OVR1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
399 /* { .offset = B2063_LO_CALIB_OVR2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
400 /* { .offset = B2063_LO_CALIB_OVAL1, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
401 /* { .offset = B2063_LO_CALIB_OVAL2, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
402 /* { .offset = B2063_LO_CALIB_OVAL3, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
403 /* { .offset = B2063_LO_CALIB_OVAL4, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
404 /* { .offset = B2063_LO_CALIB_OVAL5, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
405 /* { .offset = B2063_LO_CALIB_OVAL6, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
406 /* { .offset = B2063_LO_CALIB_OVAL7, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
407 /* { .offset = B2063_LO_CALIB_CALVLD1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
408 /* { .offset = B2063_LO_CALIB_CALVLD2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
409 /* { .offset = B2063_LO_CALIB_CVAL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
410 /* { .offset = B2063_LO_CALIB_CVAL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
411 /* { .offset = B2063_LO_CALIB_CVAL3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
412 /* { .offset = B2063_LO_CALIB_CVAL4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
413 /* { .offset = B2063_LO_CALIB_CVAL5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
414 /* { .offset = B2063_LO_CALIB_CVAL6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
415 /* { .offset = B2063_LO_CALIB_CVAL7, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
416 /* { .offset = B2063_LOGEN_CALIB_EN, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
417 /* { .offset = B2063_LOGEN_PEAKDET1, .value_a = 0x00ff, .value_g = 0x00ff, .flags = 0, }, */
418 /* { .offset = B2063_LOGEN_RCCR1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
419 /* { .offset = B2063_LOGEN_VCOBUF1, .value_a = 0x0060, .value_g = 0x0060, .flags = 0, }, */
420 /* { .offset = B2063_LOGEN_MIXER1, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
421 /* { .offset = B2063_LOGEN_MIXER2, .value_a = 0x000c, .value_g = 0x000c, .flags = 0, }, */
422 /* { .offset = B2063_LOGEN_BUF1, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
423 /* { .offset = B2063_LOGEN_BUF2, .value_a = 0x000c, .value_g = 0x000c, .flags = 0, }, */
424 /* { .offset = B2063_LOGEN_DIV1, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
425 /* { .offset = B2063_LOGEN_DIV2, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
426 /* { .offset = B2063_LOGEN_DIV3, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
427 /* { .offset = B2063_LOGEN_CBUFRX1, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
428 /* { .offset = B2063_LOGEN_CBUFRX2, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
429 /* { .offset = B2063_LOGEN_CBUFTX1, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
430 /* { .offset = B2063_LOGEN_CBUFTX2, .value_a = 0x0066, .value_g = 0x0066, .flags = 0, }, */
431 /* { .offset = B2063_LOGEN_IDAC1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
432 /* { .offset = B2063_LOGEN_SPARE1, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
433 /* { .offset = B2063_LOGEN_SPARE2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
434 /* { .offset = B2063_LOGEN_SPARE3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
435 /* { .offset = B2063_G_RX_1ST1, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
436 /* { .offset = B2063_G_RX_1ST2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
437 /* { .offset = B2063_G_RX_1ST3, .value_a = 0x0005, .value_g = 0x0005, .flags = 0, }, */
438 /* { .offset = B2063_G_RX_2ND1, .value_a = 0x0030, .value_g = 0x0030, .flags = 0, }, */
439 /* { .offset = B2063_G_RX_2ND2, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
440 /* { .offset = B2063_G_RX_2ND3, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
441 /* { .offset = B2063_G_RX_2ND4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
442 /* { .offset = B2063_G_RX_2ND5, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
443 /* { .offset = B2063_G_RX_2ND6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
444 /* { .offset = B2063_G_RX_2ND7, .value_a = 0x0035, .value_g = 0x0035, .flags = 0, }, */
445 /* { .offset = B2063_G_RX_2ND8, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
446 /* { .offset = B2063_G_RX_PS1, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
447 /* { .offset = B2063_G_RX_PS2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
448 /* { .offset = B2063_G_RX_PS3, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
449 /* { .offset = B2063_G_RX_PS4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
450 /* { .offset = B2063_G_RX_PS5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
451 /* { .offset = B2063_G_RX_MIX1, .value_a = 0x0044, .value_g = 0x0044, .flags = 0, }, */
452 /* { .offset = B2063_G_RX_MIX2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
453 { .offset = B2063_G_RX_MIX3, .value_a = 0x0071, .value_g = 0x0071, .flags = B206X_FLAG_A | B206X_FLAG_G, },
454 { .offset = B2063_G_RX_MIX4, .value_a = 0x0071, .value_g = 0x0071, .flags = B206X_FLAG_A | B206X_FLAG_G, },
455 /* { .offset = B2063_G_RX_MIX5, .value_a = 0x0003, .value_g = 0x0003, .flags = 0, }, */
456 /* { .offset = B2063_G_RX_MIX6, .value_a = 0x0088, .value_g = 0x0088, .flags = 0, }, */
457 /* { .offset = B2063_G_RX_MIX7, .value_a = 0x0044, .value_g = 0x0044, .flags = 0, }, */
458 /* { .offset = B2063_G_RX_MIX8, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
459 /* { .offset = B2063_G_RX_PDET1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
460 /* { .offset = B2063_G_RX_SPARES1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
461 /* { .offset = B2063_G_RX_SPARES2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
462 /* { .offset = B2063_G_RX_SPARES3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
463 /* { .offset = B2063_A_RX_1ST1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
464 { .offset = B2063_A_RX_1ST2, .value_a = 0x00f0, .value_g = 0x0030, .flags = B206X_FLAG_A, },
465 /* { .offset = B2063_A_RX_1ST3, .value_a = 0x0005, .value_g = 0x0005, .flags = 0, }, */
466 /* { .offset = B2063_A_RX_1ST4, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
467 /* { .offset = B2063_A_RX_1ST5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
468 /* { .offset = B2063_A_RX_2ND1, .value_a = 0x0005, .value_g = 0x0005, .flags = 0, }, */
469 /* { .offset = B2063_A_RX_2ND2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
470 /* { .offset = B2063_A_RX_2ND3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
471 /* { .offset = B2063_A_RX_2ND4, .value_a = 0x0005, .value_g = 0x0005, .flags = 0, }, */
472 /* { .offset = B2063_A_RX_2ND5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
473 /* { .offset = B2063_A_RX_2ND6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
474 /* { .offset = B2063_A_RX_2ND7, .value_a = 0x0005, .value_g = 0x0005, .flags = 0, }, */
475 /* { .offset = B2063_A_RX_PS1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
476 /* { .offset = B2063_A_RX_PS2, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
477 /* { .offset = B2063_A_RX_PS3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
478 /* { .offset = B2063_A_RX_PS4, .value_a = 0x0033, .value_g = 0x0033, .flags = 0, }, */
479 /* { .offset = B2063_A_RX_PS5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
480 { .offset = B2063_A_RX_PS6, .value_a = 0x0077, .value_g = 0x0077, .flags = B206X_FLAG_A | B206X_FLAG_G, },
481 /* { .offset = B2063_A_RX_MIX1, .value_a = 0x0088, .value_g = 0x0088, .flags = 0, }, */
482 /* { .offset = B2063_A_RX_MIX2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
483 /* { .offset = B2063_A_RX_MIX3, .value_a = 0x0044, .value_g = 0x0044, .flags = 0, }, */
484 { .offset = B2063_A_RX_MIX4, .value_a = 0x0003, .value_g = 0x0003, .flags = B206X_FLAG_A | B206X_FLAG_G, },
485 { .offset = B2063_A_RX_MIX5, .value_a = 0x000f, .value_g = 0x000f, .flags = B206X_FLAG_A | B206X_FLAG_G, },
486 { .offset = B2063_A_RX_MIX6, .value_a = 0x000f, .value_g = 0x000f, .flags = B206X_FLAG_A | B206X_FLAG_G, },
487 /* { .offset = B2063_A_RX_MIX7, .value_a = 0x0044, .value_g = 0x0044, .flags = 0, }, */
488 /* { .offset = B2063_A_RX_MIX8, .value_a = 0x0001, .value_g = 0x0001, .flags = 0, }, */
489 /* { .offset = B2063_A_RX_PWRDET1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
490 /* { .offset = B2063_A_RX_SPARE1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
491 /* { .offset = B2063_A_RX_SPARE2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
492 /* { .offset = B2063_A_RX_SPARE3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
493 { .offset = B2063_RX_TIA_CTL1, .value_a = 0x0077, .value_g = 0x0077, .flags = B206X_FLAG_A | B206X_FLAG_G, },
494 /* { .offset = B2063_RX_TIA_CTL2, .value_a = 0x0058, .value_g = 0x0058, .flags = 0, }, */
495 { .offset = B2063_RX_TIA_CTL3, .value_a = 0x0077, .value_g = 0x0077, .flags = B206X_FLAG_A | B206X_FLAG_G, },
496 /* { .offset = B2063_RX_TIA_CTL4, .value_a = 0x0058, .value_g = 0x0058, .flags = 0, }, */
497 /* { .offset = B2063_RX_TIA_CTL5, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
498 /* { .offset = B2063_RX_TIA_CTL6, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
499 /* { .offset = B2063_RX_BB_CTL1, .value_a = 0x0074, .value_g = 0x0074, .flags = 0, }, */
500 { .offset = B2063_RX_BB_CTL2, .value_a = 0x0004, .value_g = 0x0004, .flags = B206X_FLAG_A | B206X_FLAG_G, },
501 /* { .offset = B2063_RX_BB_CTL3, .value_a = 0x00a2, .value_g = 0x00a2, .flags = 0, }, */
502 /* { .offset = B2063_RX_BB_CTL4, .value_a = 0x00aa, .value_g = 0x00aa, .flags = 0, }, */
503 /* { .offset = B2063_RX_BB_CTL5, .value_a = 0x0024, .value_g = 0x0024, .flags = 0, }, */
504 /* { .offset = B2063_RX_BB_CTL6, .value_a = 0x00a9, .value_g = 0x00a9, .flags = 0, }, */
505 /* { .offset = B2063_RX_BB_CTL7, .value_a = 0x0028, .value_g = 0x0028, .flags = 0, }, */
506 /* { .offset = B2063_RX_BB_CTL8, .value_a = 0x0010, .value_g = 0x0010, .flags = 0, }, */
507 /* { .offset = B2063_RX_BB_CTL9, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
508 /* { .offset = B2063_TX_RF_CTL1, .value_a = 0x0080, .value_g = 0x0080, .flags = 0, }, */
509 /* { .offset = B2063_TX_RF_IDAC_LO_RF_I, .value_a = 0x0088, .value_g = 0x0088, .flags = 0, }, */
510 /* { .offset = B2063_TX_RF_IDAC_LO_RF_Q, .value_a = 0x0088, .value_g = 0x0088, .flags = 0, }, */
511 /* { .offset = B2063_TX_RF_IDAC_LO_BB_I, .value_a = 0x0088, .value_g = 0x0088, .flags = 0, }, */
512 /* { .offset = B2063_TX_RF_IDAC_LO_BB_Q, .value_a = 0x0088, .value_g = 0x0088, .flags = 0, }, */
513 /* { .offset = B2063_TX_RF_CTL2, .value_a = 0x0080, .value_g = 0x0080, .flags = 0, }, */
514 /* { .offset = B2063_TX_RF_CTL3, .value_a = 0x0038, .value_g = 0x0038, .flags = 0, }, */
515 /* { .offset = B2063_TX_RF_CTL4, .value_a = 0x00b8, .value_g = 0x00b8, .flags = 0, }, */
516 /* { .offset = B2063_TX_RF_CTL5, .value_a = 0x0080, .value_g = 0x0080, .flags = 0, }, */
517 /* { .offset = B2063_TX_RF_CTL6, .value_a = 0x0038, .value_g = 0x0038, .flags = 0, }, */
518 /* { .offset = B2063_TX_RF_CTL7, .value_a = 0x0078, .value_g = 0x0078, .flags = 0, }, */
519 /* { .offset = B2063_TX_RF_CTL8, .value_a = 0x00c0, .value_g = 0x00c0, .flags = 0, }, */
520 /* { .offset = B2063_TX_RF_CTL9, .value_a = 0x0003, .value_g = 0x0003, .flags = 0, }, */
521 /* { .offset = B2063_TX_RF_CTL10, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
522 /* { .offset = B2063_TX_RF_CTL14, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
523 /* { .offset = B2063_TX_RF_CTL15, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
524 { .offset = B2063_PA_CTL1, .value_a = 0x0000, .value_g = 0x0004, .flags = B206X_FLAG_A, },
525 /* { .offset = B2063_PA_CTL2, .value_a = 0x000c, .value_g = 0x000c, .flags = 0, }, */
526 /* { .offset = B2063_PA_CTL3, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
527 /* { .offset = B2063_PA_CTL4, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
528 /* { .offset = B2063_PA_CTL5, .value_a = 0x0096, .value_g = 0x0096, .flags = 0, }, */
529 /* { .offset = B2063_PA_CTL6, .value_a = 0x0077, .value_g = 0x0077, .flags = 0, }, */
530 /* { .offset = B2063_PA_CTL7, .value_a = 0x005a, .value_g = 0x005a, .flags = 0, }, */
531 /* { .offset = B2063_PA_CTL8, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
532 /* { .offset = B2063_PA_CTL9, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
533 /* { .offset = B2063_PA_CTL10, .value_a = 0x0021, .value_g = 0x0021, .flags = 0, }, */
534 /* { .offset = B2063_PA_CTL11, .value_a = 0x0070, .value_g = 0x0070, .flags = 0, }, */
535 /* { .offset = B2063_PA_CTL12, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
536 /* { .offset = B2063_PA_CTL13, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
537 /* { .offset = B2063_TX_BB_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
538 /* { .offset = B2063_TX_BB_CTL2, .value_a = 0x00b3, .value_g = 0x00b3, .flags = 0, }, */
539 /* { .offset = B2063_TX_BB_CTL3, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
540 /* { .offset = B2063_TX_BB_CTL4, .value_a = 0x000b, .value_g = 0x000b, .flags = 0, }, */
541 /* { .offset = B2063_GPIO_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
542 { .offset = B2063_VREG_CTL1, .value_a = 0x0003, .value_g = 0x0003, .flags = B206X_FLAG_A | B206X_FLAG_G, },
543 /* { .offset = B2063_AMUX_CTL1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
544 /* { .offset = B2063_IQ_CALIB_GVAR, .value_a = 0x00b3, .value_g = 0x00b3, .flags = 0, }, */
545 /* { .offset = B2063_IQ_CALIB_CTL1, .value_a = 0x0055, .value_g = 0x0055, .flags = 0, }, */
546 /* { .offset = B2063_IQ_CALIB_CTL2, .value_a = 0x0030, .value_g = 0x0030, .flags = 0, }, */
547 /* { .offset = B2063_TEMPSENSE_CTL1, .value_a = 0x0046, .value_g = 0x0046, .flags = 0, }, */
548 /* { .offset = B2063_TEMPSENSE_CTL2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
549 /* { .offset = B2063_TX_RX_LOOPBACK1, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
550 /* { .offset = B2063_TX_RX_LOOPBACK2, .value_a = 0x0000, .value_g = 0x0000, .flags = 0, }, */
551 /* { .offset = B2063_EXT_TSSI_CTL1, .value_a = 0x0021, .value_g = 0x0021, .flags = 0, }, */
552 /* { .offset = B2063_EXT_TSSI_CTL2, .value_a = 0x0023, .value_g = 0x0023, .flags = 0, }, */
553 /* { .offset = B2063_AFE_CTL , .value_a = 0x0002, .value_g = 0x0002, .flags = 0, }, */
566 b43_radio_write(dev, e->offset, e->value_g); b2062_upload_init_table()
570 b43_radio_write(dev, e->offset, e->value_a); b2062_upload_init_table()
585 b43_radio_write(dev, e->offset, e->value_g); b2063_upload_init_table()
589 b43_radio_write(dev, e->offset, e->value_a); b2063_upload_init_table()
594 u32 b43_lptab_read(struct b43_wldev *dev, u32 offset) b43_lptab_read() argument
598 type = offset & B43_LPTAB_TYPEMASK; b43_lptab_read()
599 offset &= ~B43_LPTAB_TYPEMASK; b43_lptab_read()
600 B43_WARN_ON(offset > 0xFFFF); b43_lptab_read()
604 b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset); b43_lptab_read()
608 b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset); b43_lptab_read()
612 b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset); b43_lptab_read()
625 void b43_lptab_read_bulk(struct b43_wldev *dev, u32 offset, b43_lptab_read_bulk() argument
632 type = offset & B43_LPTAB_TYPEMASK; b43_lptab_read_bulk()
633 offset &= ~B43_LPTAB_TYPEMASK; b43_lptab_read_bulk()
634 B43_WARN_ON(offset > 0xFFFF); b43_lptab_read_bulk()
636 b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset); b43_lptab_read_bulk()
660 void b43_lptab_write(struct b43_wldev *dev, u32 offset, u32 value) b43_lptab_write() argument
664 type = offset & B43_LPTAB_TYPEMASK; b43_lptab_write()
665 offset &= ~B43_LPTAB_TYPEMASK; b43_lptab_write()
666 B43_WARN_ON(offset > 0xFFFF); b43_lptab_write()
671 b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset); b43_lptab_write()
676 b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset); b43_lptab_write()
680 b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset); b43_lptab_write()
689 void b43_lptab_write_bulk(struct b43_wldev *dev, u32 offset, b43_lptab_write_bulk() argument
696 type = offset & B43_LPTAB_TYPEMASK; b43_lptab_write_bulk()
697 offset &= ~B43_LPTAB_TYPEMASK; b43_lptab_write_bulk()
698 B43_WARN_ON(offset > 0xFFFF); b43_lptab_write_bulk()
700 b43_phy_write(dev, B43_LPPHY_TABLE_ADDR, offset); b43_lptab_write_bulk()
2355 static void lpphy_rev0_1_write_gain_table(struct b43_wldev *dev, int offset, lpphy_rev0_1_write_gain_table() argument
2366 b43_lptab_write(dev, B43_LPTAB32(10, 0xC0 + offset), tmp); lpphy_rev0_1_write_gain_table()
2368 b43_lptab_write(dev, B43_LPTAB32(10, 0x140 + offset), tmp); lpphy_rev0_1_write_gain_table()
2371 static void lpphy_rev2plus_write_gain_table(struct b43_wldev *dev, int offset, lpphy_rev2plus_write_gain_table() argument
2392 b43_lptab_write(dev, B43_LPTAB32(7, 0xC0 + offset), tmp); lpphy_rev2plus_write_gain_table()
2395 b43_lptab_write(dev, B43_LPTAB32(7, 0x140 + offset), tmp); lpphy_rev2plus_write_gain_table()
2398 void lpphy_write_gain_table(struct b43_wldev *dev, int offset, lpphy_write_gain_table() argument
2402 lpphy_rev2plus_write_gain_table(dev, offset, data); lpphy_write_gain_table()
2404 lpphy_rev0_1_write_gain_table(dev, offset, data); lpphy_write_gain_table()
2407 void lpphy_write_gain_table_bulk(struct b43_wldev *dev, int offset, int count, lpphy_write_gain_table_bulk() argument
2412 for (i = offset; i < count; i++) lpphy_write_gain_table_bulk()
|
| H A D | pio.h | 108 static inline u16 b43_piotx_read16(struct b43_pio_txqueue *q, u16 offset) b43_piotx_read16() argument
110 return b43_read16(q->dev, q->mmio_base + offset); b43_piotx_read16()
113 static inline u32 b43_piotx_read32(struct b43_pio_txqueue *q, u16 offset) b43_piotx_read32() argument
115 return b43_read32(q->dev, q->mmio_base + offset); b43_piotx_read32()
119 u16 offset, u16 value) b43_piotx_write16()
121 b43_write16(q->dev, q->mmio_base + offset, value); b43_piotx_write16()
125 u16 offset, u32 value) b43_piotx_write32()
127 b43_write32(q->dev, q->mmio_base + offset, value); b43_piotx_write32()
131 static inline u16 b43_piorx_read16(struct b43_pio_rxqueue *q, u16 offset) b43_piorx_read16() argument
133 return b43_read16(q->dev, q->mmio_base + offset); b43_piorx_read16()
136 static inline u32 b43_piorx_read32(struct b43_pio_rxqueue *q, u16 offset) b43_piorx_read32() argument
138 return b43_read32(q->dev, q->mmio_base + offset); b43_piorx_read32()
142 u16 offset, u16 value) b43_piorx_write16()
144 b43_write16(q->dev, q->mmio_base + offset, value); b43_piorx_write16()
148 u16 offset, u32 value) b43_piorx_write32()
150 b43_write32(q->dev, q->mmio_base + offset, value); b43_piorx_write32()
118 b43_piotx_write16(struct b43_pio_txqueue *q, u16 offset, u16 value) b43_piotx_write16() argument
124 b43_piotx_write32(struct b43_pio_txqueue *q, u16 offset, u32 value) b43_piotx_write32() argument
141 b43_piorx_write16(struct b43_pio_rxqueue *q, u16 offset, u16 value) b43_piorx_write16() argument
147 b43_piorx_write32(struct b43_pio_rxqueue *q, u16 offset, u32 value) b43_piorx_write32() argument
|
| H A D | bus.c | 57 static u16 b43_bus_bcma_read16(struct b43_bus_dev *dev, u16 offset) b43_bus_bcma_read16() argument
59 return bcma_read16(dev->bdev, offset); b43_bus_bcma_read16()
61 static u32 b43_bus_bcma_read32(struct b43_bus_dev *dev, u16 offset) b43_bus_bcma_read32() argument
63 return bcma_read32(dev->bdev, offset); b43_bus_bcma_read32()
66 void b43_bus_bcma_write16(struct b43_bus_dev *dev, u16 offset, u16 value) b43_bus_bcma_write16() argument
68 bcma_write16(dev->bdev, offset, value); b43_bus_bcma_write16()
71 void b43_bus_bcma_write32(struct b43_bus_dev *dev, u16 offset, u32 value) b43_bus_bcma_write32() argument
73 bcma_write32(dev->bdev, offset, value); b43_bus_bcma_write32()
77 size_t count, u16 offset, u8 reg_width) b43_bus_bcma_block_read()
79 bcma_block_read(dev->bdev, buffer, count, offset, reg_width); b43_bus_bcma_block_read()
83 size_t count, u16 offset, u8 reg_width) b43_bus_bcma_block_write()
85 bcma_block_write(dev->bdev, buffer, count, offset, reg_width); b43_bus_bcma_block_write()
163 static u16 b43_bus_ssb_read16(struct b43_bus_dev *dev, u16 offset) b43_bus_ssb_read16() argument
165 return ssb_read16(dev->sdev, offset); b43_bus_ssb_read16()
167 static u32 b43_bus_ssb_read32(struct b43_bus_dev *dev, u16 offset) b43_bus_ssb_read32() argument
169 return ssb_read32(dev->sdev, offset); b43_bus_ssb_read32()
171 static void b43_bus_ssb_write16(struct b43_bus_dev *dev, u16 offset, u16 value) b43_bus_ssb_write16() argument
173 ssb_write16(dev->sdev, offset, value); b43_bus_ssb_write16()
175 static void b43_bus_ssb_write32(struct b43_bus_dev *dev, u16 offset, u32 value) b43_bus_ssb_write32() argument
177 ssb_write32(dev->sdev, offset, value); b43_bus_ssb_write32()
180 size_t count, u16 offset, u8 reg_width) b43_bus_ssb_block_read()
182 ssb_block_read(dev->sdev, buffer, count, offset, reg_width); b43_bus_ssb_block_read()
186 size_t count, u16 offset, u8 reg_width) b43_bus_ssb_block_write()
188 ssb_block_write(dev->sdev, buffer, count, offset, reg_width); b43_bus_ssb_block_write()
76 b43_bus_bcma_block_read(struct b43_bus_dev *dev, void *buffer, size_t count, u16 offset, u8 reg_width) b43_bus_bcma_block_read() argument
82 b43_bus_bcma_block_write(struct b43_bus_dev *dev, const void *buffer, size_t count, u16 offset, u8 reg_width) b43_bus_bcma_block_write() argument
179 b43_bus_ssb_block_read(struct b43_bus_dev *dev, void *buffer, size_t count, u16 offset, u8 reg_width) b43_bus_ssb_block_read() argument
185 b43_bus_ssb_block_write(struct b43_bus_dev *dev, const void *buffer, size_t count, u16 offset, u8 reg_width) b43_bus_ssb_block_write() argument
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| H A D | bus.h | 28 u16 (*read16)(struct b43_bus_dev *dev, u16 offset);
29 u32 (*read32)(struct b43_bus_dev *dev, u16 offset);
30 void (*write16)(struct b43_bus_dev *dev, u16 offset, u16 value);
31 void (*write32)(struct b43_bus_dev *dev, u16 offset, u32 value);
33 size_t count, u16 offset, u8 reg_width);
35 size_t count, u16 offset, u8 reg_width);
|
| /linux-4.4.14/arch/mips/boot/compressed/ |
| H A D | uart-16550.c | 12 #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset))
17 #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset))
22 #define PORT(offset) (CKSEG1ADDR(JZ4740_UART0_BASE_ADDR) + (4 * offset))
27 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
33 #define PORT(offset) (CKSEG1ADDR(UART0_BASE) + (4 * offset))
45 static inline unsigned int serial_in(int offset) serial_in() argument
47 return *((volatile IOTYPE *)PORT(offset)) & 0xFF; serial_in()
50 static inline void serial_out(int offset, int value) serial_out() argument
52 *((volatile IOTYPE *)PORT(offset)) = value & 0xFF; serial_out()
|
| /linux-4.4.14/arch/sparc/lib/ |
| H A D | bitext.c | 23 * Returns offset in the map or -1 if out of space.
29 int offset, count; /* siamese twins */ bit_map_string_get() local
54 offset = t->first_free; bit_map_string_get()
56 offset = t->last_off & ~align1; bit_map_string_get()
59 off_new = find_next_zero_bit(t->map, t->size, offset); bit_map_string_get()
61 count += off_new - offset; bit_map_string_get()
62 offset = off_new; bit_map_string_get()
63 if (offset >= t->size) bit_map_string_get()
64 offset = 0; bit_map_string_get()
69 t->size, t->used, offset, len, align, count); bit_map_string_get()
73 if (offset + len > t->size) { bit_map_string_get()
74 count += t->size - offset; bit_map_string_get()
75 offset = 0; bit_map_string_get()
80 while (test_bit(offset + i, t->map) == 0) { bit_map_string_get()
83 bitmap_set(t->map, offset, len); bit_map_string_get()
84 if (offset == t->first_free) bit_map_string_get()
88 if ((t->last_off = offset + len) >= t->size) bit_map_string_get()
93 return offset; bit_map_string_get()
97 if ((offset += i + 1) >= t->size) bit_map_string_get()
98 offset = 0; bit_map_string_get()
102 void bit_map_clear(struct bit_map *t, int offset, int len) bit_map_clear() argument
110 if (test_bit(offset + i, t->map) == 0) bit_map_clear()
112 __clear_bit(offset + i, t->map); bit_map_clear()
114 if (offset < t->first_free) bit_map_clear()
115 t->first_free = offset; bit_map_clear()
|
| H A D | blockops.S | 10 /* Zero out 64 bytes of memory at (buf + offset).
13 #define BLAST_BLOCK(buf, offset) \
14 std %g0, [buf + offset + 0x38]; \
15 std %g0, [buf + offset + 0x30]; \
16 std %g0, [buf + offset + 0x28]; \
17 std %g0, [buf + offset + 0x20]; \
18 std %g0, [buf + offset + 0x18]; \
19 std %g0, [buf + offset + 0x10]; \
20 std %g0, [buf + offset + 0x08]; \
21 std %g0, [buf + offset + 0x00];
23 /* Copy 32 bytes of memory at (src + offset) to
24 * (dst + offset).
26 #define MIRROR_BLOCK(dst, src, offset, t0, t1, t2, t3, t4, t5, t6, t7) \
27 ldd [src + offset + 0x18], t0; \
28 ldd [src + offset + 0x10], t2; \
29 ldd [src + offset + 0x08], t4; \
30 ldd [src + offset + 0x00], t6; \
31 std t0, [dst + offset + 0x18]; \
32 std t2, [dst + offset + 0x10]; \
33 std t4, [dst + offset + 0x08]; \
34 std t6, [dst + offset + 0x00];
|
| H A D | memcpy.S | 17 #define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \
18 ldd [%src + (offset) + 0x00], %t0; \
19 ldd [%src + (offset) + 0x08], %t2; \
20 ldd [%src + (offset) + 0x10], %t4; \
21 ldd [%src + (offset) + 0x18], %t6; \
22 st %t0, [%dst + (offset) + 0x00]; \
23 st %t1, [%dst + (offset) + 0x04]; \
24 st %t2, [%dst + (offset) + 0x08]; \
25 st %t3, [%dst + (offset) + 0x0c]; \
26 st %t4, [%dst + (offset) + 0x10]; \
27 st %t5, [%dst + (offset) + 0x14]; \
28 st %t6, [%dst + (offset) + 0x18]; \
29 st %t7, [%dst + (offset) + 0x1c];
31 #define MOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \
32 ldd [%src + (offset) + 0x00], %t0; \
33 ldd [%src + (offset) + 0x08], %t2; \
34 ldd [%src + (offset) + 0x10], %t4; \
35 ldd [%src + (offset) + 0x18], %t6; \
36 std %t0, [%dst + (offset) + 0x00]; \
37 std %t2, [%dst + (offset) + 0x08]; \
38 std %t4, [%dst + (offset) + 0x10]; \
39 std %t6, [%dst + (offset) + 0x18];
41 #define MOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3) \
42 ldd [%src - (offset) - 0x10], %t0; \
43 ldd [%src - (offset) - 0x08], %t2; \
44 st %t0, [%dst - (offset) - 0x10]; \
45 st %t1, [%dst - (offset) - 0x0c]; \
46 st %t2, [%dst - (offset) - 0x08]; \
47 st %t3, [%dst - (offset) - 0x04];
49 #define MOVE_LASTALIGNCHUNK(src, dst, offset, t0, t1, t2, t3) \
50 ldd [%src - (offset) - 0x10], %t0; \
51 ldd [%src - (offset) - 0x08], %t2; \
52 std %t0, [%dst - (offset) - 0x10]; \
53 std %t2, [%dst - (offset) - 0x08];
55 #define MOVE_SHORTCHUNK(src, dst, offset, t0, t1) \
56 ldub [%src - (offset) - 0x02], %t0; \
57 ldub [%src - (offset) - 0x01], %t1; \
58 stb %t0, [%dst - (offset) - 0x02]; \
59 stb %t1, [%dst - (offset) - 0x01];
62 #define RMOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \
63 ldd [%src - (offset) - 0x20], %t0; \
64 ldd [%src - (offset) - 0x18], %t2; \
65 ldd [%src - (offset) - 0x10], %t4; \
66 ldd [%src - (offset) - 0x08], %t6; \
67 st %t0, [%dst - (offset) - 0x20]; \
68 st %t1, [%dst - (offset) - 0x1c]; \
69 st %t2, [%dst - (offset) - 0x18]; \
70 st %t3, [%dst - (offset) - 0x14]; \
71 st %t4, [%dst - (offset) - 0x10]; \
72 st %t5, [%dst - (offset) - 0x0c]; \
73 st %t6, [%dst - (offset) - 0x08]; \
74 st %t7, [%dst - (offset) - 0x04];
76 #define RMOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \
77 ldd [%src - (offset) - 0x20], %t0; \
78 ldd [%src - (offset) - 0x18], %t2; \
79 ldd [%src - (offset) - 0x10], %t4; \
80 ldd [%src - (offset) - 0x08], %t6; \
81 std %t0, [%dst - (offset) - 0x20]; \
82 std %t2, [%dst - (offset) - 0x18]; \
83 std %t4, [%dst - (offset) - 0x10]; \
84 std %t6, [%dst - (offset) - 0x08];
86 #define RMOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3) \
87 ldd [%src + (offset) + 0x00], %t0; \
88 ldd [%src + (offset) + 0x08], %t2; \
89 st %t0, [%dst + (offset) + 0x00]; \
90 st %t1, [%dst + (offset) + 0x04]; \
91 st %t2, [%dst + (offset) + 0x08]; \
92 st %t3, [%dst + (offset) + 0x0c];
94 #define RMOVE_SHORTCHUNK(src, dst, offset, t0, t1) \
95 ldub [%src + (offset) + 0x00], %t0; \
96 ldub [%src + (offset) + 0x01], %t1; \
97 stb %t0, [%dst + (offset) + 0x00]; \
98 stb %t1, [%dst + (offset) + 0x01];
100 #define SMOVE_CHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, prev, shil, shir, offset2) \
101 ldd [%src + (offset) + 0x00], %t0; \
102 ldd [%src + (offset) + 0x08], %t2; \
113 std %t4, [%dst + (offset) + (offset2) - 0x04]; \
114 std %t0, [%dst + (offset) + (offset2) + 0x04]; \
118 #define SMOVE_ALIGNCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, prev, shil, shir, offset2) \
119 ldd [%src + (offset) + 0x00], %t0; \
120 ldd [%src + (offset) + 0x08], %t2; \
133 std %t0, [%dst + (offset) + (offset2) + 0x00]; \
134 std %t2, [%dst + (offset) + (offset2) + 0x08];
|
| H A D | user_fixup.c | 21 static unsigned long compute_size(unsigned long start, unsigned long size, unsigned long *offset) compute_size() argument
27 *offset = 0; compute_size()
29 *offset = fault_addr - start; compute_size()
37 unsigned long offset; copy_from_user_fixup() local
39 size = compute_size((unsigned long) from, size, &offset); copy_from_user_fixup()
41 memset(to + offset, 0, size); copy_from_user_fixup()
49 unsigned long offset; copy_to_user_fixup() local
51 return compute_size((unsigned long) to, size, &offset); copy_to_user_fixup()
|
| H A D | memset.S | 38 #define ZERO_BIG_BLOCK(base, offset, source) \
39 std source, [base + offset + 0x00]; \
40 std source, [base + offset + 0x08]; \
41 std source, [base + offset + 0x10]; \
42 std source, [base + offset + 0x18]; \
43 std source, [base + offset + 0x20]; \
44 std source, [base + offset + 0x28]; \
45 std source, [base + offset + 0x30]; \
46 std source, [base + offset + 0x38];
48 #define ZERO_LAST_BLOCKS(base, offset, source) \
49 std source, [base - offset - 0x38]; \
50 std source, [base - offset - 0x30]; \
51 std source, [base - offset - 0x28]; \
52 std source, [base - offset - 0x20]; \
53 std source, [base - offset - 0x18]; \
54 std source, [base - offset - 0x10]; \
55 std source, [base - offset - 0x08]; \
56 std source, [base - offset - 0x00];
|
| H A D | copy_user.S | 67 #define MOVE_BIGCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \
68 ldd [%src + (offset) + 0x00], %t0; \
69 ldd [%src + (offset) + 0x08], %t2; \
70 ldd [%src + (offset) + 0x10], %t4; \
71 ldd [%src + (offset) + 0x18], %t6; \
72 st %t0, [%dst + (offset) + 0x00]; \
73 st %t1, [%dst + (offset) + 0x04]; \
74 st %t2, [%dst + (offset) + 0x08]; \
75 st %t3, [%dst + (offset) + 0x0c]; \
76 st %t4, [%dst + (offset) + 0x10]; \
77 st %t5, [%dst + (offset) + 0x14]; \
78 st %t6, [%dst + (offset) + 0x18]; \
79 st %t7, [%dst + (offset) + 0x1c];
81 #define MOVE_BIGALIGNCHUNK(src, dst, offset, t0, t1, t2, t3, t4, t5, t6, t7) \
82 ldd [%src + (offset) + 0x00], %t0; \
83 ldd [%src + (offset) + 0x08], %t2; \
84 ldd [%src + (offset) + 0x10], %t4; \
85 ldd [%src + (offset) + 0x18], %t6; \
86 std %t0, [%dst + (offset) + 0x00]; \
87 std %t2, [%dst + (offset) + 0x08]; \
88 std %t4, [%dst + (offset) + 0x10]; \
89 std %t6, [%dst + (offset) + 0x18];
91 #define MOVE_LASTCHUNK(src, dst, offset, t0, t1, t2, t3) \
92 ldd [%src - (offset) - 0x10], %t0; \
93 ldd [%src - (offset) - 0x08], %t2; \
94 st %t0, [%dst - (offset) - 0x10]; \
95 st %t1, [%dst - (offset) - 0x0c]; \
96 st %t2, [%dst - (offset) - 0x08]; \
97 st %t3, [%dst - (offset) - 0x04];
99 #define MOVE_HALFCHUNK(src, dst, offset, t0, t1, t2, t3) \
100 lduh [%src + (offset) + 0x00], %t0; \
101 lduh [%src + (offset) + 0x02], %t1; \
102 lduh [%src + (offset) + 0x04], %t2; \
103 lduh [%src + (offset) + 0x06], %t3; \
104 sth %t0, [%dst + (offset) + 0x00]; \
105 sth %t1, [%dst + (offset) + 0x02]; \
106 sth %t2, [%dst + (offset) + 0x04]; \
107 sth %t3, [%dst + (offset) + 0x06];
109 #define MOVE_SHORTCHUNK(src, dst, offset, t0, t1) \
110 ldub [%src - (offset) - 0x02], %t0; \
111 ldub [%src - (offset) - 0x01], %t1; \
112 stb %t0, [%dst - (offset) - 0x02]; \
113 stb %t1, [%dst - (offset) - 0x01];
|
| /linux-4.4.14/include/video/ |
| H A D | mach64.h | 24 #define CRTC_H_TOTAL_DISP 0x0000 /* Dword offset 0_00 */
25 #define CRTC2_H_TOTAL_DISP 0x0000 /* Dword offset 0_00 */
26 #define CRTC_H_SYNC_STRT_WID 0x0004 /* Dword offset 0_01 */
27 #define CRTC2_H_SYNC_STRT_WID 0x0004 /* Dword offset 0_01 */
34 #define CRTC_V_TOTAL_DISP 0x0008 /* Dword offset 0_02 */
35 #define CRTC2_V_TOTAL_DISP 0x0008 /* Dword offset 0_02 */
40 #define CRTC_V_SYNC_STRT_WID 0x000C /* Dword offset 0_03 */
41 #define CRTC2_V_SYNC_STRT_WID 0x000C /* Dword offset 0_03 */
46 #define CRTC_VLINE_CRNT_VLINE 0x0010 /* Dword offset 0_04 */
47 #define CRTC2_VLINE_CRNT_VLINE 0x0010 /* Dword offset 0_04 */
48 #define CRTC_OFF_PITCH 0x0014 /* Dword offset 0_05 */
51 #define CRTC_INT_CNTL 0x0018 /* Dword offset 0_06 */
52 #define CRTC_GEN_CNTL 0x001C /* Dword offset 0_07 */
58 #define DSP_CONFIG 0x0020 /* Dword offset 0_08 */
59 #define PM_DSP_CONFIG 0x0020 /* Dword offset 0_08 (Mobility Only) */
60 #define DSP_ON_OFF 0x0024 /* Dword offset 0_09 */
61 #define PM_DSP_ON_OFF 0x0024 /* Dword offset 0_09 (Mobility Only) */
62 #define TIMER_CONFIG 0x0028 /* Dword offset 0_0A */
63 #define MEM_BUF_CNTL 0x002C /* Dword offset 0_0B */
64 #define MEM_ADDR_CONFIG 0x0034 /* Dword offset 0_0D */
67 #define CRT_TRAP 0x0038 /* Dword offset 0_0E */
69 #define I2C_CNTL_0 0x003C /* Dword offset 0_0F */
71 #define DSTN_CONTROL_LG 0x003C /* Dword offset 0_0F (LG) */
74 #define OVR_CLR 0x0040 /* Dword offset 0_10 */
75 #define OVR2_CLR 0x0040 /* Dword offset 0_10 */
76 #define OVR_WID_LEFT_RIGHT 0x0044 /* Dword offset 0_11 */
77 #define OVR2_WID_LEFT_RIGHT 0x0044 /* Dword offset 0_11 */
78 #define OVR_WID_TOP_BOTTOM 0x0048 /* Dword offset 0_12 */
79 #define OVR2_WID_TOP_BOTTOM 0x0048 /* Dword offset 0_12 */
82 #define VGA_DSP_CONFIG 0x004C /* Dword offset 0_13 */
83 #define PM_VGA_DSP_CONFIG 0x004C /* Dword offset 0_13 (Mobility Only) */
84 #define VGA_DSP_ON_OFF 0x0050 /* Dword offset 0_14 */
85 #define PM_VGA_DSP_ON_OFF 0x0050 /* Dword offset 0_14 (Mobility Only) */
86 #define DSP2_CONFIG 0x0054 /* Dword offset 0_15 */
87 #define PM_DSP2_CONFIG 0x0054 /* Dword offset 0_15 (Mobility Only) */
88 #define DSP2_ON_OFF 0x0058 /* Dword offset 0_16 */
89 #define PM_DSP2_ON_OFF 0x0058 /* Dword offset 0_16 (Mobility Only) */
92 #define CRTC2_OFF_PITCH 0x005C /* Dword offset 0_17 */
95 #define CUR_CLR0 0x0060 /* Dword offset 0_18 */
96 #define CUR2_CLR0 0x0060 /* Dword offset 0_18 */
97 #define CUR_CLR1 0x0064 /* Dword offset 0_19 */
98 #define CUR2_CLR1 0x0064 /* Dword offset 0_19 */
99 #define CUR_OFFSET 0x0068 /* Dword offset 0_1A */
100 #define CUR2_OFFSET 0x0068 /* Dword offset 0_1A */
101 #define CUR_HORZ_VERT_POSN 0x006C /* Dword offset 0_1B */
102 #define CUR2_HORZ_VERT_POSN 0x006C /* Dword offset 0_1B */
103 #define CUR_HORZ_VERT_OFF 0x0070 /* Dword offset 0_1C */
104 #define CUR2_HORZ_VERT_OFF 0x0070 /* Dword offset 0_1C */
106 #define CNFG_PANEL_LG 0x0074 /* Dword offset 0_1D (LG) */
109 #define GP_IO 0x0078 /* Dword offset 0_1E */
112 #define HW_DEBUG 0x007C /* Dword offset 0_1F */
115 #define SCRATCH_REG0 0x0080 /* Dword offset 0_20 */
116 #define SCRATCH_REG1 0x0084 /* Dword offset 0_21 */
117 #define SCRATCH_REG2 0x0088 /* Dword offset 0_22 */
118 #define SCRATCH_REG3 0x008C /* Dword offset 0_23 */
121 #define CLOCK_CNTL 0x0090 /* Dword offset 0_24 */
146 #define CLOCK_SEL_CNTL 0x0090 /* Dword offset 0_24 */
149 #define CNFG_STAT1 0x0094 /* Dword offset 0_25 */
150 #define CNFG_STAT2 0x0098 /* Dword offset 0_26 */
153 #define BUS_CNTL 0x00A0 /* Dword offset 0_28 */
155 #define LCD_INDEX 0x00A4 /* Dword offset 0_29 */
156 #define LCD_DATA 0x00A8 /* Dword offset 0_2A */
158 #define HFB_PITCH_ADDR_LG 0x00A8 /* Dword offset 0_2A (LG) */
161 #define EXT_MEM_CNTL 0x00AC /* Dword offset 0_2B */
162 #define MEM_CNTL 0x00B0 /* Dword offset 0_2C */
163 #define MEM_VGA_WP_SEL 0x00B4 /* Dword offset 0_2D */
164 #define MEM_VGA_RP_SEL 0x00B8 /* Dword offset 0_2E */
166 #define I2C_CNTL_1 0x00BC /* Dword offset 0_2F */
168 #define LT_GIO_LG 0x00BC /* Dword offset 0_2F (LG) */
171 #define DAC_REGS 0x00C0 /* Dword offset 0_30 */
172 #define DAC_W_INDEX 0x00C0 /* Dword offset 0_30 */
173 #define DAC_DATA 0x00C1 /* Dword offset 0_30 */
174 #define DAC_MASK 0x00C2 /* Dword offset 0_30 */
175 #define DAC_R_INDEX 0x00C3 /* Dword offset 0_30 */
176 #define DAC_CNTL 0x00C4 /* Dword offset 0_31 */
178 #define EXT_DAC_REGS 0x00C8 /* Dword offset 0_32 */
180 #define HORZ_STRETCHING_LG 0x00C8 /* Dword offset 0_32 (LG) */
181 #define VERT_STRETCHING_LG 0x00CC /* Dword offset 0_33 (LG) */
184 #define GEN_TEST_CNTL 0x00D0 /* Dword offset 0_34 */
187 #define CUSTOM_MACRO_CNTL 0x00D4 /* Dword offset 0_35 */
189 #define LCD_GEN_CNTL_LG 0x00D4 /* Dword offset 0_35 (LG) */
190 #define POWER_MANAGEMENT_LG 0x00D8 /* Dword offset 0_36 (LG) */
193 #define CNFG_CNTL 0x00DC /* Dword offset 0_37 (CT, ET, VT) */
194 #define CNFG_CHIP_ID 0x00E0 /* Dword offset 0_38 */
195 #define CNFG_STAT0 0x00E4 /* Dword offset 0_39 */
198 #define CRC_SIG 0x00E8 /* Dword offset 0_3A */
199 #define CRC2_SIG 0x00E8 /* Dword offset 0_3A */
205 #define DST_OFF_PITCH 0x0100 /* Dword offset 0_40 */
206 #define DST_X 0x0104 /* Dword offset 0_41 */
207 #define DST_Y 0x0108 /* Dword offset 0_42 */
208 #define DST_Y_X 0x010C /* Dword offset 0_43 */
209 #define DST_WIDTH 0x0110 /* Dword offset 0_44 */
210 #define DST_HEIGHT 0x0114 /* Dword offset 0_45 */
211 #define DST_HEIGHT_WIDTH 0x0118 /* Dword offset 0_46 */
212 #define DST_X_WIDTH 0x011C /* Dword offset 0_47 */
213 #define DST_BRES_LNTH 0x0120 /* Dword offset 0_48 */
214 #define DST_BRES_ERR 0x0124 /* Dword offset 0_49 */
215 #define DST_BRES_INC 0x0128 /* Dword offset 0_4A */
216 #define DST_BRES_DEC 0x012C /* Dword offset 0_4B */
217 #define DST_CNTL 0x0130 /* Dword offset 0_4C */
218 #define DST_Y_X__ALIAS__ 0x0134 /* Dword offset 0_4D */
219 #define TRAIL_BRES_ERR 0x0138 /* Dword offset 0_4E */
220 #define TRAIL_BRES_INC 0x013C /* Dword offset 0_4F */
221 #define TRAIL_BRES_DEC 0x0140 /* Dword offset 0_50 */
222 #define LEAD_BRES_LNTH 0x0144 /* Dword offset 0_51 */
223 #define Z_OFF_PITCH 0x0148 /* Dword offset 0_52 */
224 #define Z_CNTL 0x014C /* Dword offset 0_53 */
225 #define ALPHA_TST_CNTL 0x0150 /* Dword offset 0_54 */
226 #define SECONDARY_STW_EXP 0x0158 /* Dword offset 0_56 */
227 #define SECONDARY_S_X_INC 0x015C /* Dword offset 0_57 */
228 #define SECONDARY_S_Y_INC 0x0160 /* Dword offset 0_58 */
229 #define SECONDARY_S_START 0x0164 /* Dword offset 0_59 */
230 #define SECONDARY_W_X_INC 0x0168 /* Dword offset 0_5A */
231 #define SECONDARY_W_Y_INC 0x016C /* Dword offset 0_5B */
232 #define SECONDARY_W_START 0x0170 /* Dword offset 0_5C */
233 #define SECONDARY_T_X_INC 0x0174 /* Dword offset 0_5D */
234 #define SECONDARY_T_Y_INC 0x0178 /* Dword offset 0_5E */
235 #define SECONDARY_T_START 0x017C /* Dword offset 0_5F */
238 #define SRC_OFF_PITCH 0x0180 /* Dword offset 0_60 */
239 #define SRC_X 0x0184 /* Dword offset 0_61 */
240 #define SRC_Y 0x0188 /* Dword offset 0_62 */
241 #define SRC_Y_X 0x018C /* Dword offset 0_63 */
242 #define SRC_WIDTH1 0x0190 /* Dword offset 0_64 */
243 #define SRC_HEIGHT1 0x0194 /* Dword offset 0_65 */
244 #define SRC_HEIGHT1_WIDTH1 0x0198 /* Dword offset 0_66 */
245 #define SRC_X_START 0x019C /* Dword offset 0_67 */
246 #define SRC_Y_START 0x01A0 /* Dword offset 0_68 */
247 #define SRC_Y_X_START 0x01A4 /* Dword offset 0_69 */
248 #define SRC_WIDTH2 0x01A8 /* Dword offset 0_6A */
249 #define SRC_HEIGHT2 0x01AC /* Dword offset 0_6B */
250 #define SRC_HEIGHT2_WIDTH2 0x01B0 /* Dword offset 0_6C */
251 #define SRC_CNTL 0x01B4 /* Dword offset 0_6D */
253 #define SCALE_OFF 0x01C0 /* Dword offset 0_70 */
254 #define SECONDARY_SCALE_OFF 0x01C4 /* Dword offset 0_71 */
256 #define TEX_0_OFF 0x01C0 /* Dword offset 0_70 */
257 #define TEX_1_OFF 0x01C4 /* Dword offset 0_71 */
258 #define TEX_2_OFF 0x01C8 /* Dword offset 0_72 */
259 #define TEX_3_OFF 0x01CC /* Dword offset 0_73 */
260 #define TEX_4_OFF 0x01D0 /* Dword offset 0_74 */
261 #define TEX_5_OFF 0x01D4 /* Dword offset 0_75 */
262 #define TEX_6_OFF 0x01D8 /* Dword offset 0_76 */
263 #define TEX_7_OFF 0x01DC /* Dword offset 0_77 */
265 #define SCALE_WIDTH 0x01DC /* Dword offset 0_77 */
266 #define SCALE_HEIGHT 0x01E0 /* Dword offset 0_78 */
268 #define TEX_8_OFF 0x01E0 /* Dword offset 0_78 */
269 #define TEX_9_OFF 0x01E4 /* Dword offset 0_79 */
270 #define TEX_10_OFF 0x01E8 /* Dword offset 0_7A */
271 #define S_Y_INC 0x01EC /* Dword offset 0_7B */
273 #define SCALE_PITCH 0x01EC /* Dword offset 0_7B */
274 #define SCALE_X_INC 0x01F0 /* Dword offset 0_7C */
276 #define RED_X_INC 0x01F0 /* Dword offset 0_7C */
277 #define GREEN_X_INC 0x01F4 /* Dword offset 0_7D */
279 #define SCALE_Y_INC 0x01F4 /* Dword offset 0_7D */
280 #define SCALE_VACC 0x01F8 /* Dword offset 0_7E */
281 #define SCALE_3D_CNTL 0x01FC /* Dword offset 0_7F */
284 #define HOST_DATA0 0x0200 /* Dword offset 0_80 */
285 #define HOST_DATA1 0x0204 /* Dword offset 0_81 */
286 #define HOST_DATA2 0x0208 /* Dword offset 0_82 */
287 #define HOST_DATA3 0x020C /* Dword offset 0_83 */
288 #define HOST_DATA4 0x0210 /* Dword offset 0_84 */
289 #define HOST_DATA5 0x0214 /* Dword offset 0_85 */
290 #define HOST_DATA6 0x0218 /* Dword offset 0_86 */
291 #define HOST_DATA7 0x021C /* Dword offset 0_87 */
292 #define HOST_DATA8 0x0220 /* Dword offset 0_88 */
293 #define HOST_DATA9 0x0224 /* Dword offset 0_89 */
294 #define HOST_DATAA 0x0228 /* Dword offset 0_8A */
295 #define HOST_DATAB 0x022C /* Dword offset 0_8B */
296 #define HOST_DATAC 0x0230 /* Dword offset 0_8C */
297 #define HOST_DATAD 0x0234 /* Dword offset 0_8D */
298 #define HOST_DATAE 0x0238 /* Dword offset 0_8E */
299 #define HOST_DATAF 0x023C /* Dword offset 0_8F */
300 #define HOST_CNTL 0x0240 /* Dword offset 0_90 */
303 #define BM_HOSTDATA 0x0244 /* Dword offset 0_91 */
304 #define BM_ADDR 0x0248 /* Dword offset 0_92 */
305 #define BM_DATA 0x0248 /* Dword offset 0_92 */
306 #define BM_GUI_TABLE_CMD 0x024C /* Dword offset 0_93 */
309 #define PAT_REG0 0x0280 /* Dword offset 0_A0 */
310 #define PAT_REG1 0x0284 /* Dword offset 0_A1 */
311 #define PAT_CNTL 0x0288 /* Dword offset 0_A2 */
314 #define SC_LEFT 0x02A0 /* Dword offset 0_A8 */
315 #define SC_RIGHT 0x02A4 /* Dword offset 0_A9 */
316 #define SC_LEFT_RIGHT 0x02A8 /* Dword offset 0_AA */
317 #define SC_TOP 0x02AC /* Dword offset 0_AB */
318 #define SC_BOTTOM 0x02B0 /* Dword offset 0_AC */
319 #define SC_TOP_BOTTOM 0x02B4 /* Dword offset 0_AD */
322 #define USR1_DST_OFF_PITCH 0x02B8 /* Dword offset 0_AE */
323 #define USR2_DST_OFF_PITCH 0x02BC /* Dword offset 0_AF */
324 #define DP_BKGD_CLR 0x02C0 /* Dword offset 0_B0 */
325 #define DP_FOG_CLR 0x02C4 /* Dword offset 0_B1 */
326 #define DP_FRGD_CLR 0x02C4 /* Dword offset 0_B1 */
327 #define DP_WRITE_MASK 0x02C8 /* Dword offset 0_B2 */
328 #define DP_CHAIN_MASK 0x02CC /* Dword offset 0_B3 */
329 #define DP_PIX_WIDTH 0x02D0 /* Dword offset 0_B4 */
330 #define DP_MIX 0x02D4 /* Dword offset 0_B5 */
331 #define DP_SRC 0x02D8 /* Dword offset 0_B6 */
332 #define DP_FRGD_CLR_MIX 0x02DC /* Dword offset 0_B7 */
333 #define DP_FRGD_BKGD_CLR 0x02E0 /* Dword offset 0_B8 */
336 #define DST_X_Y 0x02E8 /* Dword offset 0_BA */
337 #define DST_WIDTH_HEIGHT 0x02EC /* Dword offset 0_BB */
340 #define USR_DST_PICTH 0x02F0 /* Dword offset 0_BC */
341 #define DP_SET_GUI_ENGINE2 0x02F8 /* Dword offset 0_BE */
342 #define DP_SET_GUI_ENGINE 0x02FC /* Dword offset 0_BF */
345 #define CLR_CMP_CLR 0x0300 /* Dword offset 0_C0 */
346 #define CLR_CMP_MASK 0x0304 /* Dword offset 0_C1 */
347 #define CLR_CMP_CNTL 0x0308 /* Dword offset 0_C2 */
350 #define FIFO_STAT 0x0310 /* Dword offset 0_C4 */
352 #define CONTEXT_MASK 0x0320 /* Dword offset 0_C8 */
353 #define CONTEXT_LOAD_CNTL 0x032C /* Dword offset 0_CB */
356 #define GUI_TRAJ_CNTL 0x0330 /* Dword offset 0_CC */
359 #define GUI_STAT 0x0338 /* Dword offset 0_CE */
361 #define TEX_PALETTE_INDEX 0x0340 /* Dword offset 0_D0 */
362 #define STW_EXP 0x0344 /* Dword offset 0_D1 */
363 #define LOG_MAX_INC 0x0348 /* Dword offset 0_D2 */
364 #define S_X_INC 0x034C /* Dword offset 0_D3 */
365 #define S_Y_INC__ALIAS__ 0x0350 /* Dword offset 0_D4 */
367 #define SCALE_PITCH__ALIAS__ 0x0350 /* Dword offset 0_D4 */
369 #define S_START 0x0354 /* Dword offset 0_D5 */
370 #define W_X_INC 0x0358 /* Dword offset 0_D6 */
371 #define W_Y_INC 0x035C /* Dword offset 0_D7 */
372 #define W_START 0x0360 /* Dword offset 0_D8 */
373 #define T_X_INC 0x0364 /* Dword offset 0_D9 */
374 #define T_Y_INC 0x0368 /* Dword offset 0_DA */
376 #define SECONDARY_SCALE_PITCH 0x0368 /* Dword offset 0_DA */
378 #define T_START 0x036C /* Dword offset 0_DB */
379 #define TEX_SIZE_PITCH 0x0370 /* Dword offset 0_DC */
380 #define TEX_CNTL 0x0374 /* Dword offset 0_DD */
381 #define SECONDARY_TEX_OFFSET 0x0378 /* Dword offset 0_DE */
382 #define TEX_PALETTE 0x037C /* Dword offset 0_DF */
384 #define SCALE_PITCH_BOTH 0x0380 /* Dword offset 0_E0 */
385 #define SECONDARY_SCALE_OFF_ACC 0x0384 /* Dword offset 0_E1 */
386 #define SCALE_OFF_ACC 0x0388 /* Dword offset 0_E2 */
387 #define SCALE_DST_Y_X 0x038C /* Dword offset 0_E3 */
390 #define COMPOSITE_SHADOW_ID 0x0398 /* Dword offset 0_E6 */
392 #define SECONDARY_SCALE_X_INC 0x039C /* Dword offset 0_E7 */
394 #define SPECULAR_RED_X_INC 0x039C /* Dword offset 0_E7 */
395 #define SPECULAR_RED_Y_INC 0x03A0 /* Dword offset 0_E8 */
396 #define SPECULAR_RED_START 0x03A4 /* Dword offset 0_E9 */
398 #define SECONDARY_SCALE_HACC 0x03A4 /* Dword offset 0_E9 */
400 #define SPECULAR_GREEN_X_INC 0x03A8 /* Dword offset 0_EA */
401 #define SPECULAR_GREEN_Y_INC 0x03AC /* Dword offset 0_EB */
402 #define SPECULAR_GREEN_START 0x03B0 /* Dword offset 0_EC */
403 #define SPECULAR_BLUE_X_INC 0x03B4 /* Dword offset 0_ED */
404 #define SPECULAR_BLUE_Y_INC 0x03B8 /* Dword offset 0_EE */
405 #define SPECULAR_BLUE_START 0x03BC /* Dword offset 0_EF */
407 #define SCALE_X_INC__ALIAS__ 0x03C0 /* Dword offset 0_F0 */
409 #define RED_X_INC__ALIAS__ 0x03C0 /* Dword offset 0_F0 */
410 #define RED_Y_INC 0x03C4 /* Dword offset 0_F1 */
411 #define RED_START 0x03C8 /* Dword offset 0_F2 */
413 #define SCALE_HACC 0x03C8 /* Dword offset 0_F2 */
414 #define SCALE_Y_INC__ALIAS__ 0x03CC /* Dword offset 0_F3 */
416 #define GREEN_X_INC__ALIAS__ 0x03CC /* Dword offset 0_F3 */
417 #define GREEN_Y_INC 0x03D0 /* Dword offset 0_F4 */
419 #define SECONDARY_SCALE_Y_INC 0x03D0 /* Dword offset 0_F4 */
420 #define SECONDARY_SCALE_VACC 0x03D4 /* Dword offset 0_F5 */
422 #define GREEN_START 0x03D4 /* Dword offset 0_F5 */
423 #define BLUE_X_INC 0x03D8 /* Dword offset 0_F6 */
424 #define BLUE_Y_INC 0x03DC /* Dword offset 0_F7 */
425 #define BLUE_START 0x03E0 /* Dword offset 0_F8 */
426 #define Z_X_INC 0x03E4 /* Dword offset 0_F9 */
427 #define Z_Y_INC 0x03E8 /* Dword offset 0_FA */
428 #define Z_START 0x03EC /* Dword offset 0_FB */
429 #define ALPHA_X_INC 0x03F0 /* Dword offset 0_FC */
430 #define FOG_X_INC 0x03F0 /* Dword offset 0_FC */
431 #define ALPHA_Y_INC 0x03F4 /* Dword offset 0_FD */
432 #define FOG_Y_INC 0x03F4 /* Dword offset 0_FD */
433 #define ALPHA_START 0x03F8 /* Dword offset 0_FE */
434 #define FOG_START 0x03F8 /* Dword offset 0_FE */
436 #define OVERLAY_Y_X_START 0x0400 /* Dword offset 1_00 */
437 #define OVERLAY_Y_X_END 0x0404 /* Dword offset 1_01 */
438 #define OVERLAY_VIDEO_KEY_CLR 0x0408 /* Dword offset 1_02 */
439 #define OVERLAY_VIDEO_KEY_MSK 0x040C /* Dword offset 1_03 */
440 #define OVERLAY_GRAPHICS_KEY_CLR 0x0410 /* Dword offset 1_04 */
441 #define OVERLAY_GRAPHICS_KEY_MSK 0x0414 /* Dword offset 1_05 */
442 #define OVERLAY_KEY_CNTL 0x0418 /* Dword offset 1_06 */
444 #define OVERLAY_SCALE_INC 0x0420 /* Dword offset 1_08 */
445 #define OVERLAY_SCALE_CNTL 0x0424 /* Dword offset 1_09 */
446 #define SCALER_HEIGHT_WIDTH 0x0428 /* Dword offset 1_0A */
447 #define SCALER_TEST 0x042C /* Dword offset 1_0B */
448 #define SCALER_BUF0_OFFSET 0x0434 /* Dword offset 1_0D */
449 #define SCALER_BUF1_OFFSET 0x0438 /* Dword offset 1_0E */
450 #define SCALE_BUF_PITCH 0x043C /* Dword offset 1_0F */
452 #define CAPTURE_START_END 0x0440 /* Dword offset 1_10 */
453 #define CAPTURE_X_WIDTH 0x0444 /* Dword offset 1_11 */
454 #define VIDEO_FORMAT 0x0448 /* Dword offset 1_12 */
455 #define VBI_START_END 0x044C /* Dword offset 1_13 */
456 #define CAPTURE_CONFIG 0x0450 /* Dword offset 1_14 */
457 #define TRIG_CNTL 0x0454 /* Dword offset 1_15 */
459 #define OVERLAY_EXCLUSIVE_HORZ 0x0458 /* Dword offset 1_16 */
460 #define OVERLAY_EXCLUSIVE_VERT 0x045C /* Dword offset 1_17 */
462 #define VAL_WIDTH 0x0460 /* Dword offset 1_18 */
463 #define CAPTURE_DEBUG 0x0464 /* Dword offset 1_19 */
464 #define VIDEO_SYNC_TEST 0x0468 /* Dword offset 1_1A */
467 #define SNAPSHOT_VH_COUNTS 0x0470 /* Dword offset 1_1C */
468 #define SNAPSHOT_F_COUNT 0x0474 /* Dword offset 1_1D */
469 #define N_VIF_COUNT 0x0478 /* Dword offset 1_1E */
470 #define SNAPSHOT_VIF_COUNT 0x047C /* Dword offset 1_1F */
472 #define CAPTURE_BUF0_OFFSET 0x0480 /* Dword offset 1_20 */
473 #define CAPTURE_BUF1_OFFSET 0x0484 /* Dword offset 1_21 */
474 #define CAPTURE_BUF_PITCH 0x0488 /* Dword offset 1_22 */
477 #define SNAPSHOT2_VH_COUNTS 0x04B0 /* Dword offset 1_2C */
478 #define SNAPSHOT2_F_COUNT 0x04B4 /* Dword offset 1_2D */
479 #define N_VIF2_COUNT 0x04B8 /* Dword offset 1_2E */
480 #define SNAPSHOT2_VIF_COUNT 0x04BC /* Dword offset 1_2F */
482 #define MPP_CONFIG 0x04C0 /* Dword offset 1_30 */
483 #define MPP_STROBE_SEQ 0x04C4 /* Dword offset 1_31 */
484 #define MPP_ADDR 0x04C8 /* Dword offset 1_32 */
485 #define MPP_DATA 0x04CC /* Dword offset 1_33 */
486 #define TVO_CNTL 0x0500 /* Dword offset 1_40 */
489 #define CRT_HORZ_VERT_LOAD 0x0544 /* Dword offset 1_51 */
492 #define AGP_BASE 0x0548 /* Dword offset 1_52 */
493 #define AGP_CNTL 0x054C /* Dword offset 1_53 */
495 #define SCALER_COLOUR_CNTL 0x0550 /* Dword offset 1_54 */
496 #define SCALER_H_COEFF0 0x0554 /* Dword offset 1_55 */
497 #define SCALER_H_COEFF1 0x0558 /* Dword offset 1_56 */
498 #define SCALER_H_COEFF2 0x055C /* Dword offset 1_57 */
499 #define SCALER_H_COEFF3 0x0560 /* Dword offset 1_58 */
500 #define SCALER_H_COEFF4 0x0564 /* Dword offset 1_59 */
503 #define GUI_CMDFIFO_DEBUG 0x0570 /* Dword offset 1_5C */
504 #define GUI_CMDFIFO_DATA 0x0574 /* Dword offset 1_5D */
505 #define GUI_CNTL 0x0578 /* Dword offset 1_5E */
508 #define BM_FRAME_BUF_OFFSET 0x0580 /* Dword offset 1_60 */
509 #define BM_SYSTEM_MEM_ADDR 0x0584 /* Dword offset 1_61 */
510 #define BM_COMMAND 0x0588 /* Dword offset 1_62 */
511 #define BM_STATUS 0x058C /* Dword offset 1_63 */
512 #define BM_GUI_TABLE 0x05B8 /* Dword offset 1_6E */
513 #define BM_SYSTEM_TABLE 0x05BC /* Dword offset 1_6F */
515 #define SCALER_BUF0_OFFSET_U 0x05D4 /* Dword offset 1_75 */
516 #define SCALER_BUF0_OFFSET_V 0x05D8 /* Dword offset 1_76 */
517 #define SCALER_BUF1_OFFSET_U 0x05DC /* Dword offset 1_77 */
518 #define SCALER_BUF1_OFFSET_V 0x05E0 /* Dword offset 1_78 */
521 #define VERTEX_1_S 0x0640 /* Dword offset 1_90 */
522 #define VERTEX_1_T 0x0644 /* Dword offset 1_91 */
523 #define VERTEX_1_W 0x0648 /* Dword offset 1_92 */
524 #define VERTEX_1_SPEC_ARGB 0x064C /* Dword offset 1_93 */
525 #define VERTEX_1_Z 0x0650 /* Dword offset 1_94 */
526 #define VERTEX_1_ARGB 0x0654 /* Dword offset 1_95 */
527 #define VERTEX_1_X_Y 0x0658 /* Dword offset 1_96 */
528 #define ONE_OVER_AREA 0x065C /* Dword offset 1_97 */
529 #define VERTEX_2_S 0x0660 /* Dword offset 1_98 */
530 #define VERTEX_2_T 0x0664 /* Dword offset 1_99 */
531 #define VERTEX_2_W 0x0668 /* Dword offset 1_9A */
532 #define VERTEX_2_SPEC_ARGB 0x066C /* Dword offset 1_9B */
533 #define VERTEX_2_Z 0x0670 /* Dword offset 1_9C */
534 #define VERTEX_2_ARGB 0x0674 /* Dword offset 1_9D */
535 #define VERTEX_2_X_Y 0x0678 /* Dword offset 1_9E */
536 #define ONE_OVER_AREA 0x065C /* Dword offset 1_9F */
537 #define VERTEX_3_S 0x0680 /* Dword offset 1_A0 */
538 #define VERTEX_3_T 0x0684 /* Dword offset 1_A1 */
539 #define VERTEX_3_W 0x0688 /* Dword offset 1_A2 */
540 #define VERTEX_3_SPEC_ARGB 0x068C /* Dword offset 1_A3 */
541 #define VERTEX_3_Z 0x0690 /* Dword offset 1_A4 */
542 #define VERTEX_3_ARGB 0x0694 /* Dword offset 1_A5 */
543 #define VERTEX_3_X_Y 0x0698 /* Dword offset 1_A6 */
544 #define ONE_OVER_AREA 0x065C /* Dword offset 1_A7 */
545 #define VERTEX_1_S 0x0640 /* Dword offset 1_AB */
546 #define VERTEX_1_T 0x0644 /* Dword offset 1_AC */
547 #define VERTEX_1_W 0x0648 /* Dword offset 1_AD */
548 #define VERTEX_2_S 0x0660 /* Dword offset 1_AE */
549 #define VERTEX_2_T 0x0664 /* Dword offset 1_AF */
550 #define VERTEX_2_W 0x0668 /* Dword offset 1_B0 */
551 #define VERTEX_3_SECONDARY_S 0x06C0 /* Dword offset 1_B0 */
552 #define VERTEX_3_S 0x0680 /* Dword offset 1_B1 */
553 #define VERTEX_3_SECONDARY_T 0x06C4 /* Dword offset 1_B1 */
554 #define VERTEX_3_T 0x0684 /* Dword offset 1_B2 */
555 #define VERTEX_3_SECONDARY_W 0x06C8 /* Dword offset 1_B2 */
556 #define VERTEX_3_W 0x0688 /* Dword offset 1_B3 */
557 #define VERTEX_1_SPEC_ARGB 0x064C /* Dword offset 1_B4 */
558 #define VERTEX_2_SPEC_ARGB 0x066C /* Dword offset 1_B5 */
559 #define VERTEX_3_SPEC_ARGB 0x068C /* Dword offset 1_B6 */
560 #define VERTEX_1_Z 0x0650 /* Dword offset 1_B7 */
561 #define VERTEX_2_Z 0x0670 /* Dword offset 1_B8 */
562 #define VERTEX_3_Z 0x0690 /* Dword offset 1_B9 */
563 #define VERTEX_1_ARGB 0x0654 /* Dword offset 1_BA */
564 #define VERTEX_2_ARGB 0x0674 /* Dword offset 1_BB */
565 #define VERTEX_3_ARGB 0x0694 /* Dword offset 1_BC */
566 #define VERTEX_1_X_Y 0x0658 /* Dword offset 1_BD */
567 #define VERTEX_2_X_Y 0x0678 /* Dword offset 1_BE */
568 #define VERTEX_3_X_Y 0x0698 /* Dword offset 1_BF */
569 #define ONE_OVER_AREA_UC 0x0700 /* Dword offset 1_C0 */
570 #define SETUP_CNTL 0x0704 /* Dword offset 1_C1 */
571 #define VERTEX_1_SECONDARY_S 0x0728 /* Dword offset 1_CA */
572 #define VERTEX_1_SECONDARY_T 0x072C /* Dword offset 1_CB */
573 #define VERTEX_1_SECONDARY_W 0x0730 /* Dword offset 1_CC */
574 #define VERTEX_2_SECONDARY_S 0x0734 /* Dword offset 1_CD */
575 #define VERTEX_2_SECONDARY_T 0x0738 /* Dword offset 1_CE */
576 #define VERTEX_2_SECONDARY_W 0x073C /* Dword offset 1_CF */
|
| /linux-4.4.14/drivers/char/ |
| H A D | applicom.h | 34 u16 stjb_codef; /* offset 00 */
35 s16 stjb_status; /* offset 02 */
36 u16 stjb_ticuser_root; /* offset 04 */
37 u8 stjb_piduser[4]; /* offset 06 */
38 u16 stjb_mode; /* offset 0A */
39 u16 stjb_time; /* offset 0C */
40 u16 stjb_stop; /* offset 0E */
41 u16 stjb_nfonc; /* offset 10 */
42 u16 stjb_ncard; /* offset 12 */
43 u16 stjb_nchan; /* offset 14 */
44 u16 stjb_nes; /* offset 16 */
45 u16 stjb_nb; /* offset 18 */
46 u16 stjb_typvar; /* offset 1A */
47 u32 stjb_adr; /* offset 1C */
48 u16 stjb_ticuser_dispcyc; /* offset 20 */
49 u16 stjb_ticuser_protocol; /* offset 22 */
50 u8 stjb_filler[12]; /* offset 24 */
51 u8 stjb_data[256]; /* offset 30 */
|
| /linux-4.4.14/arch/mips/include/asm/mach-bcm63xx/ |
| H A D | ioremap.h | 11 static inline int is_bcm63xx_internal_registers(phys_addr_t offset) is_bcm63xx_internal_registers() argument
15 if (offset >= 0xfff80000) is_bcm63xx_internal_registers()
22 if (offset >= 0xfff00000) is_bcm63xx_internal_registers()
28 if (offset >= 0xb0000000 && offset < 0xb1000000) is_bcm63xx_internal_registers()
35 static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size, plat_ioremap() argument
38 if (is_bcm63xx_internal_registers(offset)) plat_ioremap()
39 return (void __iomem *)offset; plat_ioremap()
|
| /linux-4.4.14/arch/mips/include/asm/octeon/ |
| H A D | cvmx-pexp-defs.h | 31 #define CVMX_PEXP_NPEI_BAR1_INDEXX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008000ull) + ((offset) & 31) * 16)
43 #define CVMX_PEXP_NPEI_DMAX_COUNTS(offset) (CVMX_ADD_IO_SEG(0x00011F0000008450ull) + ((offset) & 7) * 16)
44 #define CVMX_PEXP_NPEI_DMAX_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F00000083B0ull) + ((offset) & 7) * 16)
45 #define CVMX_PEXP_NPEI_DMAX_IBUFF_SADDR(offset) (CVMX_ADD_IO_SEG(0x00011F0000008400ull) + ((offset) & 7) * 16)
46 #define CVMX_PEXP_NPEI_DMAX_NADDR(offset) (CVMX_ADD_IO_SEG(0x00011F00000084A0ull) + ((offset) & 7) * 16)
68 #define CVMX_PEXP_NPEI_MEM_ACCESS_SUBIDX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008280ull) + ((offset) & 31) * 16 - 16*12)
92 #define CVMX_PEXP_NPEI_PKTX_CNTS(offset) (CVMX_ADD_IO_SEG(0x00011F000000A400ull) + ((offset) & 31) * 16)
93 #define CVMX_PEXP_NPEI_PKTX_INSTR_BADDR(offset) (CVMX_ADD_IO_SEG(0x00011F000000A800ull) + ((offset) & 31) * 16)
94 #define CVMX_PEXP_NPEI_PKTX_INSTR_BAOFF_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F000000AC00ull) + ((offset) & 31) * 16)
95 #define CVMX_PEXP_NPEI_PKTX_INSTR_FIFO_RSIZE(offset) (CVMX_ADD_IO_SEG(0x00011F000000B000ull) + ((offset) & 31) * 16)
96 #define CVMX_PEXP_NPEI_PKTX_INSTR_HEADER(offset) (CVMX_ADD_IO_SEG(0x00011F000000B400ull) + ((offset) & 31) * 16)
97 #define CVMX_PEXP_NPEI_PKTX_IN_BP(offset) (CVMX_ADD_IO_SEG(0x00011F000000B800ull) + ((offset) & 31) * 16)
98 #define CVMX_PEXP_NPEI_PKTX_SLIST_BADDR(offset) (CVMX_ADD_IO_SEG(0x00011F0000009400ull) + ((offset) & 31) * 16)
99 #define CVMX_PEXP_NPEI_PKTX_SLIST_BAOFF_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F0000009800ull) + ((offset) & 31) * 16)
100 #define CVMX_PEXP_NPEI_PKTX_SLIST_FIFO_RSIZE(offset) (CVMX_ADD_IO_SEG(0x00011F0000009C00ull) + ((offset) & 31) * 16)
113 #define CVMX_PEXP_NPEI_PKT_IN_DONEX_CNTS(offset) (CVMX_ADD_IO_SEG(0x00011F000000A000ull) + ((offset) & 31) * 16)
135 #define CVMX_PEXP_SLI_CTL_PORTX(offset) (CVMX_ADD_IO_SEG(0x00011F0000010050ull) + ((offset) & 3) * 16)
140 #define CVMX_PEXP_SLI_DMAX_CNT(offset) (CVMX_ADD_IO_SEG(0x00011F0000010400ull) + ((offset) & 1) * 16)
141 #define CVMX_PEXP_SLI_DMAX_INT_LEVEL(offset) (CVMX_ADD_IO_SEG(0x00011F00000103E0ull) + ((offset) & 1) * 16)
142 #define CVMX_PEXP_SLI_DMAX_TIM(offset) (CVMX_ADD_IO_SEG(0x00011F0000010420ull) + ((offset) & 1) * 16)
144 #define CVMX_PEXP_SLI_INT_ENB_PORTX(offset) (CVMX_ADD_IO_SEG(0x00011F0000010340ull) + ((offset) & 1) * 16)
153 #define CVMX_PEXP_SLI_MEM_ACCESS_SUBIDX(offset) (CVMX_ADD_IO_SEG(0x00011F00000100E0ull) + ((offset) & 31) * 16 - 16*12)
176 #define CVMX_PEXP_SLI_PKTX_CNTS(offset) (CVMX_ADD_IO_SEG(0x00011F0000012400ull) + ((offset) & 31) * 16)
177 #define CVMX_PEXP_SLI_PKTX_INSTR_BADDR(offset) (CVMX_ADD_IO_SEG(0x00011F0000012800ull) + ((offset) & 31) * 16)
178 #define CVMX_PEXP_SLI_PKTX_INSTR_BAOFF_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F0000012C00ull) + ((offset) & 31) * 16)
179 #define CVMX_PEXP_SLI_PKTX_INSTR_FIFO_RSIZE(offset) (CVMX_ADD_IO_SEG(0x00011F0000013000ull) + ((offset) & 31) * 16)
180 #define CVMX_PEXP_SLI_PKTX_INSTR_HEADER(offset) (CVMX_ADD_IO_SEG(0x00011F0000013400ull) + ((offset) & 31) * 16)
181 #define CVMX_PEXP_SLI_PKTX_IN_BP(offset) (CVMX_ADD_IO_SEG(0x00011F0000013800ull) + ((offset) & 31) * 16)
182 #define CVMX_PEXP_SLI_PKTX_OUT_SIZE(offset) (CVMX_ADD_IO_SEG(0x00011F0000010C00ull) + ((offset) & 31) * 16)
183 #define CVMX_PEXP_SLI_PKTX_SLIST_BADDR(offset) (CVMX_ADD_IO_SEG(0x00011F0000011400ull) + ((offset) & 31) * 16)
184 #define CVMX_PEXP_SLI_PKTX_SLIST_BAOFF_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F0000011800ull) + ((offset) & 31) * 16)
185 #define CVMX_PEXP_SLI_PKTX_SLIST_FIFO_RSIZE(offset) (CVMX_ADD_IO_SEG(0x00011F0000011C00ull) + ((offset) & 31) * 16)
199 #define CVMX_PEXP_SLI_PKT_IN_DONEX_CNTS(offset) (CVMX_ADD_IO_SEG(0x00011F0000012000ull) + ((offset) & 31) * 16)
214 #define CVMX_PEXP_SLI_PORTX_PKIND(offset) (CVMX_ADD_IO_SEG(0x00011F0000010800ull) + ((offset) & 31) * 16)
215 #define CVMX_PEXP_SLI_S2M_PORTX_CTL(offset) (CVMX_ADD_IO_SEG(0x00011F0000013D80ull) + ((offset) & 3) * 16)
|
| H A D | cvmx-pcsx-defs.h | 31 static inline uint64_t CVMX_PCSX_ANX_ADV_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_ANX_ADV_REG() argument
35 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_ADV_REG()
38 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_ADV_REG()
42 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_ADV_REG()
44 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_ANX_ADV_REG()
46 return CVMX_ADD_IO_SEG(0x00011800B0001010ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_ADV_REG()
49 static inline uint64_t CVMX_PCSX_ANX_EXT_ST_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_ANX_EXT_ST_REG() argument
53 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_EXT_ST_REG()
56 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_EXT_ST_REG()
60 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_EXT_ST_REG()
62 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_ANX_EXT_ST_REG()
64 return CVMX_ADD_IO_SEG(0x00011800B0001028ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_EXT_ST_REG()
67 static inline uint64_t CVMX_PCSX_ANX_LP_ABIL_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_ANX_LP_ABIL_REG() argument
71 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_LP_ABIL_REG()
74 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_LP_ABIL_REG()
78 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_LP_ABIL_REG()
80 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_ANX_LP_ABIL_REG()
82 return CVMX_ADD_IO_SEG(0x00011800B0001018ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_LP_ABIL_REG()
85 static inline uint64_t CVMX_PCSX_ANX_RESULTS_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_ANX_RESULTS_REG() argument
89 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_RESULTS_REG()
92 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_RESULTS_REG()
96 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_RESULTS_REG()
98 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_ANX_RESULTS_REG()
100 return CVMX_ADD_IO_SEG(0x00011800B0001020ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_ANX_RESULTS_REG()
103 static inline uint64_t CVMX_PCSX_INTX_EN_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_INTX_EN_REG() argument
107 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_INTX_EN_REG()
110 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_INTX_EN_REG()
114 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_INTX_EN_REG()
116 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_INTX_EN_REG()
118 return CVMX_ADD_IO_SEG(0x00011800B0001088ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_INTX_EN_REG()
121 static inline uint64_t CVMX_PCSX_INTX_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_INTX_REG() argument
125 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_INTX_REG()
128 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_INTX_REG()
132 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_INTX_REG()
134 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_INTX_REG()
136 return CVMX_ADD_IO_SEG(0x00011800B0001080ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_INTX_REG()
139 static inline uint64_t CVMX_PCSX_LINKX_TIMER_COUNT_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_LINKX_TIMER_COUNT_REG() argument
143 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_LINKX_TIMER_COUNT_REG()
146 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_LINKX_TIMER_COUNT_REG()
150 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_LINKX_TIMER_COUNT_REG()
152 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_LINKX_TIMER_COUNT_REG()
154 return CVMX_ADD_IO_SEG(0x00011800B0001040ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_LINKX_TIMER_COUNT_REG()
157 static inline uint64_t CVMX_PCSX_LOG_ANLX_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_LOG_ANLX_REG() argument
161 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_LOG_ANLX_REG()
164 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_LOG_ANLX_REG()
168 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_LOG_ANLX_REG()
170 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_LOG_ANLX_REG()
172 return CVMX_ADD_IO_SEG(0x00011800B0001090ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_LOG_ANLX_REG()
175 static inline uint64_t CVMX_PCSX_MISCX_CTL_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_MISCX_CTL_REG() argument
179 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MISCX_CTL_REG()
182 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MISCX_CTL_REG()
186 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MISCX_CTL_REG()
188 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_MISCX_CTL_REG()
190 return CVMX_ADD_IO_SEG(0x00011800B0001078ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MISCX_CTL_REG()
193 static inline uint64_t CVMX_PCSX_MRX_CONTROL_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_MRX_CONTROL_REG() argument
197 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MRX_CONTROL_REG()
200 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MRX_CONTROL_REG()
204 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MRX_CONTROL_REG()
206 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_MRX_CONTROL_REG()
208 return CVMX_ADD_IO_SEG(0x00011800B0001000ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MRX_CONTROL_REG()
211 static inline uint64_t CVMX_PCSX_MRX_STATUS_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_MRX_STATUS_REG() argument
215 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MRX_STATUS_REG()
218 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MRX_STATUS_REG()
222 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MRX_STATUS_REG()
224 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_MRX_STATUS_REG()
226 return CVMX_ADD_IO_SEG(0x00011800B0001008ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_MRX_STATUS_REG()
229 static inline uint64_t CVMX_PCSX_RXX_STATES_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_RXX_STATES_REG() argument
233 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_RXX_STATES_REG()
236 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_RXX_STATES_REG()
240 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_RXX_STATES_REG()
242 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_RXX_STATES_REG()
244 return CVMX_ADD_IO_SEG(0x00011800B0001058ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_RXX_STATES_REG()
247 static inline uint64_t CVMX_PCSX_RXX_SYNC_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_RXX_SYNC_REG() argument
251 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_RXX_SYNC_REG()
254 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_RXX_SYNC_REG()
258 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_RXX_SYNC_REG()
260 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_RXX_SYNC_REG()
262 return CVMX_ADD_IO_SEG(0x00011800B0001050ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_RXX_SYNC_REG()
265 static inline uint64_t CVMX_PCSX_SGMX_AN_ADV_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_SGMX_AN_ADV_REG() argument
269 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_SGMX_AN_ADV_REG()
272 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_SGMX_AN_ADV_REG()
276 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_SGMX_AN_ADV_REG()
278 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_SGMX_AN_ADV_REG()
280 return CVMX_ADD_IO_SEG(0x00011800B0001068ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_SGMX_AN_ADV_REG()
283 static inline uint64_t CVMX_PCSX_SGMX_LP_ADV_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_SGMX_LP_ADV_REG() argument
287 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_SGMX_LP_ADV_REG()
290 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_SGMX_LP_ADV_REG()
294 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_SGMX_LP_ADV_REG()
296 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_SGMX_LP_ADV_REG()
298 return CVMX_ADD_IO_SEG(0x00011800B0001070ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_SGMX_LP_ADV_REG()
301 static inline uint64_t CVMX_PCSX_TXX_STATES_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_TXX_STATES_REG() argument
305 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_TXX_STATES_REG()
308 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_TXX_STATES_REG()
312 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_TXX_STATES_REG()
314 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_TXX_STATES_REG()
316 return CVMX_ADD_IO_SEG(0x00011800B0001060ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_TXX_STATES_REG()
319 static inline uint64_t CVMX_PCSX_TX_RXX_POLARITY_REG(unsigned long offset, unsigned long block_id) CVMX_PCSX_TX_RXX_POLARITY_REG() argument
323 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_TX_RXX_POLARITY_REG()
326 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_TX_RXX_POLARITY_REG()
330 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_TX_RXX_POLARITY_REG()
332 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x4000ull) * 1024; CVMX_PCSX_TX_RXX_POLARITY_REG()
334 return CVMX_ADD_IO_SEG(0x00011800B0001048ull) + ((offset) + (block_id) * 0x20000ull) * 1024; CVMX_PCSX_TX_RXX_POLARITY_REG()
|
| H A D | cvmx-smix-defs.h | 31 static inline uint64_t CVMX_SMIX_CLK(unsigned long offset) CVMX_SMIX_CLK() argument
39 return CVMX_ADD_IO_SEG(0x0001180000001818ull) + (offset) * 256; CVMX_SMIX_CLK()
46 return CVMX_ADD_IO_SEG(0x0001180000001818ull) + (offset) * 256; CVMX_SMIX_CLK()
48 return CVMX_ADD_IO_SEG(0x0001180000003818ull) + (offset) * 128; CVMX_SMIX_CLK()
50 return CVMX_ADD_IO_SEG(0x0001180000001818ull) + (offset) * 256; CVMX_SMIX_CLK()
53 static inline uint64_t CVMX_SMIX_CMD(unsigned long offset) CVMX_SMIX_CMD() argument
61 return CVMX_ADD_IO_SEG(0x0001180000001800ull) + (offset) * 256; CVMX_SMIX_CMD()
68 return CVMX_ADD_IO_SEG(0x0001180000001800ull) + (offset) * 256; CVMX_SMIX_CMD()
70 return CVMX_ADD_IO_SEG(0x0001180000003800ull) + (offset) * 128; CVMX_SMIX_CMD()
72 return CVMX_ADD_IO_SEG(0x0001180000001800ull) + (offset) * 256; CVMX_SMIX_CMD()
75 static inline uint64_t CVMX_SMIX_EN(unsigned long offset) CVMX_SMIX_EN() argument
83 return CVMX_ADD_IO_SEG(0x0001180000001820ull) + (offset) * 256; CVMX_SMIX_EN()
90 return CVMX_ADD_IO_SEG(0x0001180000001820ull) + (offset) * 256; CVMX_SMIX_EN()
92 return CVMX_ADD_IO_SEG(0x0001180000003820ull) + (offset) * 128; CVMX_SMIX_EN()
94 return CVMX_ADD_IO_SEG(0x0001180000001820ull) + (offset) * 256; CVMX_SMIX_EN()
97 static inline uint64_t CVMX_SMIX_RD_DAT(unsigned long offset) CVMX_SMIX_RD_DAT() argument
105 return CVMX_ADD_IO_SEG(0x0001180000001810ull) + (offset) * 256; CVMX_SMIX_RD_DAT()
112 return CVMX_ADD_IO_SEG(0x0001180000001810ull) + (offset) * 256; CVMX_SMIX_RD_DAT()
114 return CVMX_ADD_IO_SEG(0x0001180000003810ull) + (offset) * 128; CVMX_SMIX_RD_DAT()
116 return CVMX_ADD_IO_SEG(0x0001180000001810ull) + (offset) * 256; CVMX_SMIX_RD_DAT()
119 static inline uint64_t CVMX_SMIX_WR_DAT(unsigned long offset) CVMX_SMIX_WR_DAT() argument
127 return CVMX_ADD_IO_SEG(0x0001180000001808ull) + (offset) * 256; CVMX_SMIX_WR_DAT()
134 return CVMX_ADD_IO_SEG(0x0001180000001808ull) + (offset) * 256; CVMX_SMIX_WR_DAT()
136 return CVMX_ADD_IO_SEG(0x0001180000003808ull) + (offset) * 128; CVMX_SMIX_WR_DAT()
138 return CVMX_ADD_IO_SEG(0x0001180000001808ull) + (offset) * 256; CVMX_SMIX_WR_DAT()
|
| /linux-4.4.14/arch/sh/kernel/ |
| H A D | ptrace.c | 4 * regs_query_register_offset() - query register offset from its name
7 * regs_query_register_offset() returns the offset of a register in struct
15 return roff->offset; regs_query_register_offset()
20 * regs_query_register_name() - query register name from its offset
21 * @offset: the offset of a register in struct pt_regs.
24 * offset in struct pt_regs. If the @offset is invalid, this returns NULL;
26 const char *regs_query_register_name(unsigned int offset) regs_query_register_name() argument
30 if (roff->offset == offset) regs_query_register_name()
|
| /linux-4.4.14/include/drm/ |
| H A D | drm_os_linux.h | 26 #define DRM_READ8(map, offset) readb(((void __iomem *)(map)->handle) + (offset))
28 #define DRM_READ16(map, offset) readw(((void __iomem *)(map)->handle) + (offset))
30 #define DRM_READ32(map, offset) readl(((void __iomem *)(map)->handle) + (offset))
32 #define DRM_WRITE8(map, offset, val) writeb(val, ((void __iomem *)(map)->handle) + (offset))
34 #define DRM_WRITE16(map, offset, val) writew(val, ((void __iomem *)(map)->handle) + (offset))
36 #define DRM_WRITE32(map, offset, val) writel(val, ((void __iomem *)(map)->handle) + (offset))
39 #define DRM_READ64(map, offset) readq(((void __iomem *)(map)->handle) + (offset))
41 #define DRM_WRITE64(map, offset, val) writeq(val, ((void __iomem *)(map)->handle) + (offset))
|
| /linux-4.4.14/arch/avr32/mach-at32ap/ |
| H A D | hmatrix.c | 16 static inline void __hmatrix_write_reg(unsigned long offset, u32 value) __hmatrix_write_reg() argument
18 __raw_writel(value, (void __iomem __force *)(HMATRIX_BASE + offset)); __hmatrix_write_reg()
21 static inline u32 __hmatrix_read_reg(unsigned long offset) __hmatrix_read_reg() argument
23 return __raw_readl((void __iomem __force *)(HMATRIX_BASE + offset)); __hmatrix_read_reg()
28 * @offset: register offset
29 * @value: value to be written to the register at @offset
31 void hmatrix_write_reg(unsigned long offset, u32 value) hmatrix_write_reg() argument
34 __hmatrix_write_reg(offset, value); hmatrix_write_reg()
35 __hmatrix_read_reg(offset); hmatrix_write_reg()
41 * @offset: register offset
43 * Returns the value of the register at @offset.
45 u32 hmatrix_read_reg(unsigned long offset) hmatrix_read_reg() argument
50 value = __hmatrix_read_reg(offset); hmatrix_read_reg()
|
| /linux-4.4.14/tools/testing/selftests/powerpc/stringloops/ |
| H A D | memcmp.c | 14 unsigned long offset, size; test_one() local
16 for (offset = 0; offset < SIZE; offset++) { test_one()
17 for (size = 0; size < (SIZE-offset); size++) { test_one()
21 y = memcmp(s1+offset, s2+offset, size); test_one()
22 x = test_memcmp(s1+offset, s2+offset, size); test_one()
26 printf("memcmp returned %d, should have returned %d (offset %ld size %ld)\n", x, y, offset, size); test_one()
28 for (i = offset; i < offset+size; i++) test_one()
32 for (i = offset; i < offset+size; i++) test_one()
|
| /linux-4.4.14/arch/sh/boards/mach-microdev/ |
| H A D | io.c | 57 void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len) microdev_ioport_map() argument
61 if ((offset >= IO_LAN91C111_BASE) && microdev_ioport_map()
62 (offset < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) { microdev_ioport_map()
66 result = IO_LAN91C111_PHYS + offset - IO_LAN91C111_BASE; microdev_ioport_map()
67 } else if ((offset >= IO_SUPERIO_BASE) && microdev_ioport_map()
68 (offset < IO_SUPERIO_BASE + IO_SUPERIO_EXTENT)) { microdev_ioport_map()
74 result = IO_SUPERIO_PHYS + (offset << 1); microdev_ioport_map()
75 } else if (((offset >= IO_IDE1_BASE) && microdev_ioport_map()
76 (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) || microdev_ioport_map()
77 (offset == IO_IDE1_MISC)) { microdev_ioport_map()
83 result = IO_SUPERIO_PHYS + (offset << 1); microdev_ioport_map()
84 } else if (((offset >= IO_IDE2_BASE) && microdev_ioport_map()
85 (offset < IO_IDE2_BASE + IO_IDE_EXTENT)) || microdev_ioport_map()
86 (offset == IO_IDE2_MISC)) { microdev_ioport_map()
92 result = IO_SUPERIO_PHYS + (offset << 1); microdev_ioport_map()
93 } else if ((offset >= IO_SERIAL1_BASE) && microdev_ioport_map()
94 (offset < IO_SERIAL1_BASE + IO_SERIAL_EXTENT)) { microdev_ioport_map()
100 result = IO_SUPERIO_PHYS + (offset << 1); microdev_ioport_map()
101 } else if ((offset >= IO_SERIAL2_BASE) && microdev_ioport_map()
102 (offset < IO_SERIAL2_BASE + IO_SERIAL_EXTENT)) { microdev_ioport_map()
108 result = IO_SUPERIO_PHYS + (offset << 1); microdev_ioport_map()
109 } else if ((offset >= IO_ISP1161_BASE) && microdev_ioport_map()
110 (offset < IO_ISP1161_BASE + IO_ISP1161_EXTENT)) { microdev_ioport_map()
114 result = IO_ISP1161_PHYS + offset - IO_ISP1161_BASE; microdev_ioport_map()
119 printk("Warning: unexpected port in %s( offset = 0x%lx )\n", microdev_ioport_map()
120 __func__, offset); microdev_ioport_map()
|
| /linux-4.4.14/fs/udf/ |
| H A D | directory.c | 25 sector_t *offset) udf_fileident_read()
53 int lextoffset = epos->offset; udf_fileident_read()
60 block = udf_get_lb_pblock(dir->i_sb, eloc, *offset); udf_fileident_read()
62 (*offset)++; udf_fileident_read()
64 if ((*offset << blocksize_bits) >= *elen) udf_fileident_read()
65 *offset = 0; udf_fileident_read()
67 epos->offset = lextoffset; udf_fileident_read()
75 if (!(*offset & ((16 >> (blocksize_bits - 9)) - 1))) { udf_fileident_read()
77 if (i + *offset > (*elen >> blocksize_bits)) udf_fileident_read()
78 i = (*elen >> blocksize_bits)-*offset; udf_fileident_read()
81 *offset + i); udf_fileident_read()
112 int lextoffset = epos->offset; udf_fileident_read()
118 block = udf_get_lb_pblock(dir->i_sb, eloc, *offset); udf_fileident_read()
120 (*offset)++; udf_fileident_read()
122 if ((*offset << dir->i_sb->s_blocksize_bits) >= *elen) udf_fileident_read()
123 *offset = 0; udf_fileident_read()
125 epos->offset = lextoffset; udf_fileident_read()
156 struct fileIdentDesc *udf_get_fileident(void *buffer, int bufsize, int *offset) udf_get_fileident() argument
163 if ((!buffer) || (!offset)) { udf_get_fileident()
164 udf_debug("invalidparms, buffer=%p, offset=%p\n", udf_get_fileident()
165 buffer, offset); udf_get_fileident()
171 if ((*offset > 0) && (*offset < bufsize)) udf_get_fileident()
172 ptr += *offset; udf_get_fileident()
177 udf_debug("offset: %u sizeof: %lu bufsize: %u\n", udf_get_fileident()
178 *offset, (unsigned long)sizeof(struct fileIdentDesc), udf_get_fileident()
182 if ((*offset + sizeof(struct fileIdentDesc)) > bufsize) udf_get_fileident()
192 *offset = *offset + lengthThisIdent; udf_get_fileident()
197 struct short_ad *udf_get_fileshortad(uint8_t *ptr, int maxoffset, uint32_t *offset, udf_get_fileshortad() argument
202 if ((!ptr) || (!offset)) { udf_get_fileshortad()
207 if ((*offset + sizeof(struct short_ad)) > maxoffset) udf_get_fileshortad()
216 *offset += sizeof(struct short_ad); udf_get_fileshortad()
220 struct long_ad *udf_get_filelongad(uint8_t *ptr, int maxoffset, uint32_t *offset, int inc) udf_get_filelongad() argument
224 if ((!ptr) || (!offset)) { udf_get_filelongad()
229 if ((*offset + sizeof(struct long_ad)) > maxoffset) udf_get_filelongad()
238 *offset += sizeof(struct long_ad); udf_get_filelongad()
20 udf_fileident_read(struct inode *dir, loff_t *nf_pos, struct udf_fileident_bh *fibh, struct fileIdentDesc *cfi, struct extent_position *epos, struct kernel_lb_addr *eloc, uint32_t *elen, sector_t *offset) udf_fileident_read() argument
|
| H A D | misc.c | 51 int offset; udf_add_extendedattr() local
63 offset = inode->i_sb->s_blocksize - udf_file_entry_alloc_offset(inode) - udf_add_extendedattr()
68 if (loc & 0x01 && offset >= size) { udf_add_extendedattr()
101 offset = iinfo->i_lenEAttr; udf_add_extendedattr()
107 memmove(&ea[offset - aal + size], udf_add_extendedattr()
108 &ea[aal], offset - aal); udf_add_extendedattr()
109 offset -= aal; udf_add_extendedattr()
117 memmove(&ea[offset - ial + size], udf_add_extendedattr()
118 &ea[ial], offset - ial); udf_add_extendedattr()
119 offset -= ial; udf_add_extendedattr()
128 memmove(&ea[offset - aal + size], udf_add_extendedattr()
129 &ea[aal], offset - aal); udf_add_extendedattr()
130 offset -= aal; udf_add_extendedattr()
142 return (struct genericFormat *)&ea[offset]; udf_add_extendedattr()
155 uint32_t offset; udf_get_extendedattr() local
172 offset = sizeof(struct extendedAttrHeaderDesc); udf_get_extendedattr()
174 offset = le32_to_cpu(eahd->impAttrLocation); udf_get_extendedattr()
176 offset = le32_to_cpu(eahd->appAttrLocation); udf_get_extendedattr()
178 while (offset < iinfo->i_lenEAttr) { udf_get_extendedattr()
179 gaf = (struct genericFormat *)&ea[offset]; udf_get_extendedattr()
184 offset += le32_to_cpu(gaf->attrLength); udf_get_extendedattr()
262 uint32_t offset, uint16_t *ident) udf_read_ptagged()
264 return udf_read_tagged(sb, udf_get_lb_pblock(sb, loc, offset), udf_read_ptagged()
265 loc->logicalBlockNum + offset, ident); udf_read_ptagged()
260 udf_read_ptagged(struct super_block *sb, struct kernel_lb_addr *loc, uint32_t offset, uint16_t *ident) udf_read_ptagged() argument
|
| /linux-4.4.14/arch/sh/include/asm/ |
| H A D | io_trapped.h | 24 unsigned long offset,
31 __ioremap_trapped(unsigned long offset, unsigned long size) __ioremap_trapped() argument
33 return match_trapped_io_handler(&trapped_mem, offset, size); __ioremap_trapped()
36 #define __ioremap_trapped(offset, size) NULL
43 __ioport_map_trapped(unsigned long offset, unsigned long size) __ioport_map_trapped() argument
45 return match_trapped_io_handler(&trapped_io, offset, size); __ioport_map_trapped()
48 #define __ioport_map_trapped(offset, size) NULL
54 #define __ioremap_trapped(offset, size) NULL
55 #define __ioport_map_trapped(offset, size) NULL
|
| H A D | ptrace.h | 28 int offset; member in struct:pt_regs_offset
31 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
33 {.name = __stringify(r##num), .offset = offsetof(struct pt_regs, regs[num])}
35 {.name = __stringify(tr##num), .offset = offsetof(struct pt_regs, tregs[num])}
36 #define REG_OFFSET_END {.name = NULL, .offset = 0}
38 /* Query offset/name of register from its name/offset */
40 extern const char *regs_query_register_name(unsigned int offset);
45 * regs_get_register() - get register value from its offset
47 * @offset: offset number of the register.
49 * regs_get_register returns the value of a register. The @offset is the
50 * offset of the register in struct pt_regs address which specified by @regs.
51 * If @offset is bigger than MAX_REG_OFFSET, this returns 0.
54 unsigned int offset) regs_get_register()
56 if (unlikely(offset > MAX_REG_OFFSET)) regs_get_register()
58 return *(unsigned long *)((unsigned long)regs + offset); regs_get_register()
53 regs_get_register(struct pt_regs *regs, unsigned int offset) regs_get_register() argument
|
| /linux-4.4.14/include/trace/events/ |
| H A D | intel-sst.h | 53 TP_PROTO(unsigned int offset, unsigned int val),
55 TP_ARGS(offset, val),
58 __field( unsigned int, offset )
63 __entry->offset = offset;
68 (unsigned int)__entry->offset, (unsigned int)__entry->val)
73 TP_PROTO(unsigned int offset, unsigned int val),
75 TP_ARGS(offset, val)
81 TP_PROTO(unsigned int offset, unsigned int val),
83 TP_ARGS(offset, val)
89 TP_PROTO(unsigned int offset, unsigned int val),
91 TP_ARGS(offset, val)
97 TP_PROTO(unsigned int offset, unsigned int val),
99 TP_ARGS(offset, val)
|
| /linux-4.4.14/drivers/thunderbolt/ |
| H A D | cap.c | 39 /* extended_short/long have cap at the same offset. */ tb_cap()
43 static u32 tb_cap_next(struct tb_cap_any *cap, u32 offset) tb_cap_next() argument
46 if (offset == 1) { tb_cap_next()
66 * "Hey, we could terminate some capability lists with a null offset tb_cap_next()
69 if (next == offset) tb_cap_next()
77 * Return: Returns a positive offset if the capability was found and 0 if not.
82 u32 offset = 1; tb_find_cap() local
87 res = tb_port_read(port, &header, space, offset, 1); tb_find_cap()
90 if (space == TB_CFG_PORT && offset == 0xa tb_find_cap()
92 offset = 0x39; tb_find_cap()
97 if (offset != 1) { tb_find_cap()
99 return offset; tb_find_cap()
103 offset, 2); tb_find_cap()
108 offset = tb_cap_next(&header, offset); tb_find_cap()
109 if (!offset) tb_find_cap()
113 "run out of retries while looking for cap %#x in config space %d, last offset: %#x\n", tb_find_cap()
114 cap, space, offset); tb_find_cap()
|
| /linux-4.4.14/drivers/ssb/ |
| H A D | host_soc.c | 15 static u8 ssb_host_soc_read8(struct ssb_device *dev, u16 offset) ssb_host_soc_read8() argument
19 offset += dev->core_index * SSB_CORE_SIZE; ssb_host_soc_read8()
20 return readb(bus->mmio + offset); ssb_host_soc_read8()
23 static u16 ssb_host_soc_read16(struct ssb_device *dev, u16 offset) ssb_host_soc_read16() argument
27 offset += dev->core_index * SSB_CORE_SIZE; ssb_host_soc_read16()
28 return readw(bus->mmio + offset); ssb_host_soc_read16()
31 static u32 ssb_host_soc_read32(struct ssb_device *dev, u16 offset) ssb_host_soc_read32() argument
35 offset += dev->core_index * SSB_CORE_SIZE; ssb_host_soc_read32()
36 return readl(bus->mmio + offset); ssb_host_soc_read32()
41 size_t count, u16 offset, u8 reg_width) ssb_host_soc_block_read()
46 offset += dev->core_index * SSB_CORE_SIZE; ssb_host_soc_block_read()
47 addr = bus->mmio + offset; ssb_host_soc_block_read()
88 static void ssb_host_soc_write8(struct ssb_device *dev, u16 offset, u8 value) ssb_host_soc_write8() argument
92 offset += dev->core_index * SSB_CORE_SIZE; ssb_host_soc_write8()
93 writeb(value, bus->mmio + offset); ssb_host_soc_write8()
96 static void ssb_host_soc_write16(struct ssb_device *dev, u16 offset, u16 value) ssb_host_soc_write16() argument
100 offset += dev->core_index * SSB_CORE_SIZE; ssb_host_soc_write16()
101 writew(value, bus->mmio + offset); ssb_host_soc_write16()
104 static void ssb_host_soc_write32(struct ssb_device *dev, u16 offset, u32 value) ssb_host_soc_write32() argument
108 offset += dev->core_index * SSB_CORE_SIZE; ssb_host_soc_write32()
109 writel(value, bus->mmio + offset); ssb_host_soc_write32()
114 size_t count, u16 offset, u8 reg_width) ssb_host_soc_block_write()
119 offset += dev->core_index * SSB_CORE_SIZE; ssb_host_soc_block_write()
120 addr = bus->mmio + offset; ssb_host_soc_block_write()
40 ssb_host_soc_block_read(struct ssb_device *dev, void *buffer, size_t count, u16 offset, u8 reg_width) ssb_host_soc_block_read() argument
113 ssb_host_soc_block_write(struct ssb_device *dev, const void *buffer, size_t count, u16 offset, u8 reg_width) ssb_host_soc_block_write() argument
|
| H A D | driver_gige.c | 32 static inline u8 gige_read8(struct ssb_gige *dev, u16 offset) gige_read8() argument
34 return ssb_read8(dev->dev, offset); gige_read8()
37 static inline u16 gige_read16(struct ssb_gige *dev, u16 offset) gige_read16() argument
39 return ssb_read16(dev->dev, offset); gige_read16()
42 static inline u32 gige_read32(struct ssb_gige *dev, u16 offset) gige_read32() argument
44 return ssb_read32(dev->dev, offset); gige_read32()
48 u16 offset, u8 value) gige_write8()
50 ssb_write8(dev->dev, offset, value); gige_write8()
54 u16 offset, u16 value) gige_write16()
56 ssb_write16(dev->dev, offset, value); gige_write16()
60 u16 offset, u32 value) gige_write32()
62 ssb_write32(dev->dev, offset, value); gige_write32()
66 u8 gige_pcicfg_read8(struct ssb_gige *dev, unsigned int offset) gige_pcicfg_read8() argument
68 BUG_ON(offset >= 256); gige_pcicfg_read8()
69 return gige_read8(dev, SSB_GIGE_PCICFG + offset); gige_pcicfg_read8()
73 u16 gige_pcicfg_read16(struct ssb_gige *dev, unsigned int offset) gige_pcicfg_read16() argument
75 BUG_ON(offset >= 256); gige_pcicfg_read16()
76 return gige_read16(dev, SSB_GIGE_PCICFG + offset); gige_pcicfg_read16()
80 u32 gige_pcicfg_read32(struct ssb_gige *dev, unsigned int offset) gige_pcicfg_read32() argument
82 BUG_ON(offset >= 256); gige_pcicfg_read32()
83 return gige_read32(dev, SSB_GIGE_PCICFG + offset); gige_pcicfg_read32()
88 unsigned int offset, u8 value) gige_pcicfg_write8()
90 BUG_ON(offset >= 256); gige_pcicfg_write8()
91 gige_write8(dev, SSB_GIGE_PCICFG + offset, value); gige_pcicfg_write8()
96 unsigned int offset, u16 value) gige_pcicfg_write16()
98 BUG_ON(offset >= 256); gige_pcicfg_write16()
99 gige_write16(dev, SSB_GIGE_PCICFG + offset, value); gige_pcicfg_write16()
104 unsigned int offset, u32 value) gige_pcicfg_write32()
106 BUG_ON(offset >= 256); gige_pcicfg_write32()
107 gige_write32(dev, SSB_GIGE_PCICFG + offset, value); gige_pcicfg_write32()
47 gige_write8(struct ssb_gige *dev, u16 offset, u8 value) gige_write8() argument
53 gige_write16(struct ssb_gige *dev, u16 offset, u16 value) gige_write16() argument
59 gige_write32(struct ssb_gige *dev, u16 offset, u32 value) gige_write32() argument
87 gige_pcicfg_write8(struct ssb_gige *dev, unsigned int offset, u8 value) gige_pcicfg_write8() argument
95 gige_pcicfg_write16(struct ssb_gige *dev, unsigned int offset, u16 value) gige_pcicfg_write16() argument
103 gige_pcicfg_write32(struct ssb_gige *dev, unsigned int offset, u32 value) gige_pcicfg_write32() argument
|
| H A D | sdio.c | 68 #define SBSDIO_SB_OFT_ADDR_MASK 0x7FFF /* sb offset addr is <= 15 bits, 32k */
167 u32 ssb_sdio_scan_read32(struct ssb_bus *bus, u16 offset) ssb_sdio_scan_read32() argument
173 val = sdio_readl(bus->host_sdio, offset, &error); ssb_sdio_scan_read32()
177 bus->sdio_sbaddr >> 16, offset, val, error); ssb_sdio_scan_read32() local
229 static u8 ssb_sdio_read8(struct ssb_device *dev, u16 offset) ssb_sdio_read8() argument
238 offset |= bus->sdio_sbaddr & 0xffff; ssb_sdio_read8()
239 offset &= SBSDIO_SB_OFT_ADDR_MASK; ssb_sdio_read8()
240 val = sdio_readb(bus->host_sdio, offset, &error); ssb_sdio_read8()
243 bus->sdio_sbaddr >> 16, offset, val, error); ssb_sdio_read8() local
251 static u16 ssb_sdio_read16(struct ssb_device *dev, u16 offset) ssb_sdio_read16() argument
260 offset |= bus->sdio_sbaddr & 0xffff; ssb_sdio_read16()
261 offset &= SBSDIO_SB_OFT_ADDR_MASK; ssb_sdio_read16()
262 val = sdio_readw(bus->host_sdio, offset, &error); ssb_sdio_read16()
265 bus->sdio_sbaddr >> 16, offset, val, error); ssb_sdio_read16() local
273 static u32 ssb_sdio_read32(struct ssb_device *dev, u16 offset) ssb_sdio_read32() argument
282 offset |= bus->sdio_sbaddr & 0xffff; ssb_sdio_read32()
283 offset &= SBSDIO_SB_OFT_ADDR_MASK; ssb_sdio_read32()
284 offset |= SBSDIO_SB_ACCESS_2_4B_FLAG; /* 32 bit data access */ ssb_sdio_read32()
285 val = sdio_readl(bus->host_sdio, offset, &error); ssb_sdio_read32()
288 bus->sdio_sbaddr >> 16, offset, val, error); ssb_sdio_read32() local
298 size_t count, u16 offset, u8 reg_width) ssb_sdio_block_read()
310 offset |= bus->sdio_sbaddr & 0xffff; ssb_sdio_block_read()
311 offset &= SBSDIO_SB_OFT_ADDR_MASK; ssb_sdio_block_read()
315 error = sdio_readsb(bus->host_sdio, buffer, offset, count); sizeof()
320 error = sdio_readsb(bus->host_sdio, buffer, offset, count); sizeof()
325 offset |= SBSDIO_SB_ACCESS_2_4B_FLAG; /* 32 bit data access */ sizeof()
326 error = sdio_readsb(bus->host_sdio, buffer, offset, count); sizeof()
337 bus->sdio_sbaddr >> 16, offset, reg_width, saved_count, error); local
343 static void ssb_sdio_write8(struct ssb_device *dev, u16 offset, u8 val) ssb_sdio_write8() argument
351 offset |= bus->sdio_sbaddr & 0xffff; ssb_sdio_write8()
352 offset &= SBSDIO_SB_OFT_ADDR_MASK; ssb_sdio_write8()
353 sdio_writeb(bus->host_sdio, val, offset, &error); ssb_sdio_write8()
356 bus->sdio_sbaddr >> 16, offset, val, error); ssb_sdio_write8() local
362 static void ssb_sdio_write16(struct ssb_device *dev, u16 offset, u16 val) ssb_sdio_write16() argument
370 offset |= bus->sdio_sbaddr & 0xffff; ssb_sdio_write16()
371 offset &= SBSDIO_SB_OFT_ADDR_MASK; ssb_sdio_write16()
372 sdio_writew(bus->host_sdio, val, offset, &error); ssb_sdio_write16()
375 bus->sdio_sbaddr >> 16, offset, val, error); ssb_sdio_write16() local
381 static void ssb_sdio_write32(struct ssb_device *dev, u16 offset, u32 val) ssb_sdio_write32() argument
389 offset |= bus->sdio_sbaddr & 0xffff; ssb_sdio_write32()
390 offset &= SBSDIO_SB_OFT_ADDR_MASK; ssb_sdio_write32()
391 offset |= SBSDIO_SB_ACCESS_2_4B_FLAG; /* 32 bit data access */ ssb_sdio_write32()
392 sdio_writel(bus->host_sdio, val, offset, &error); ssb_sdio_write32()
395 bus->sdio_sbaddr >> 16, offset, val, error); ssb_sdio_write32() local
405 size_t count, u16 offset, u8 reg_width) ssb_sdio_block_write()
417 offset |= bus->sdio_sbaddr & 0xffff; ssb_sdio_block_write()
418 offset &= SBSDIO_SB_OFT_ADDR_MASK; ssb_sdio_block_write()
422 error = sdio_writesb(bus->host_sdio, offset, ssb_sdio_block_write()
427 error = sdio_writesb(bus->host_sdio, offset, ssb_sdio_block_write()
432 offset |= SBSDIO_SB_ACCESS_2_4B_FLAG; /* 32 bit data access */ ssb_sdio_block_write()
433 error = sdio_writesb(bus->host_sdio, offset, ssb_sdio_block_write()
444 bus->sdio_sbaddr >> 16, offset, reg_width, saved_count, error); ssb_sdio_block_write() local
297 ssb_sdio_block_read(struct ssb_device *dev, void *buffer, size_t count, u16 offset, u8 reg_width) ssb_sdio_block_read() argument
404 ssb_sdio_block_write(struct ssb_device *dev, const void *buffer, size_t count, u16 offset, u8 reg_width) ssb_sdio_block_write() argument
|
| /linux-4.4.14/arch/x86/include/asm/numachip/ |
| H A D | numachip_csr.h | 39 static inline void *lcsr_address(unsigned long offset) lcsr_address() argument
42 CSR_NODE_BITS(0xfff0) | (offset & CSR_OFFSET_MASK)); lcsr_address()
45 static inline unsigned int read_lcsr(unsigned long offset) read_lcsr() argument
47 return swab32(readl(lcsr_address(offset))); read_lcsr()
50 static inline void write_lcsr(unsigned long offset, unsigned int val) write_lcsr() argument
52 writel(swab32(val), lcsr_address(offset)); write_lcsr()
56 * On NumaChip2, local CSR space is 16MB and starts at fixed offset below 4G
67 static inline void __iomem *numachip2_lcsr_address(unsigned long offset) numachip2_lcsr_address() argument
70 (offset & (NUMACHIP2_LCSR_SIZE - 1))); numachip2_lcsr_address()
73 static inline u32 numachip2_read32_lcsr(unsigned long offset) numachip2_read32_lcsr() argument
75 return readl(numachip2_lcsr_address(offset)); numachip2_read32_lcsr()
78 static inline u64 numachip2_read64_lcsr(unsigned long offset) numachip2_read64_lcsr() argument
80 return readq(numachip2_lcsr_address(offset)); numachip2_read64_lcsr()
83 static inline void numachip2_write32_lcsr(unsigned long offset, u32 val) numachip2_write32_lcsr() argument
85 writel(val, numachip2_lcsr_address(offset)); numachip2_write32_lcsr()
88 static inline void numachip2_write64_lcsr(unsigned long offset, u64 val) numachip2_write64_lcsr() argument
90 writeq(val, numachip2_lcsr_address(offset)); numachip2_write64_lcsr()
|
| /linux-4.4.14/drivers/mtd/ |
| H A D | bcm47xxpart.c | 53 uint32_t offset[3]; member in struct:trx_header
57 u64 offset, uint32_t mask_flags) bcm47xxpart_add_part()
60 part->offset = offset; bcm47xxpart_add_part()
65 size_t offset) bcm47xxpart_trx_data_part_name()
70 if (mtd_read(master, offset, sizeof(buf), &bytes_read, bcm47xxpart_trx_data_part_name()
72 pr_err("mtd_read error while parsing (offset: 0x%X)!\n", bcm47xxpart_trx_data_part_name()
73 offset); bcm47xxpart_trx_data_part_name()
92 uint32_t offset; bcm47xxpart_parse() local
119 for (offset = 0; offset <= master->size - blocksize; bcm47xxpart_parse()
120 offset += blocksize) { bcm47xxpart_parse()
122 if (offset >= 0x2000000) bcm47xxpart_parse()
131 if (mtd_read(master, offset, BCM47XXPART_BYTES_TO_READ, bcm47xxpart_parse()
133 pr_err("mtd_read error while parsing (offset: 0x%X)!\n", bcm47xxpart_parse()
134 offset); bcm47xxpart_parse()
142 offset, MTD_WRITEABLE); bcm47xxpart_parse()
152 offset, MTD_WRITEABLE); bcm47xxpart_parse()
159 offset, MTD_WRITEABLE); bcm47xxpart_parse()
166 bcm47xxpart_add_part(&parts[curr_part++], "POT", offset, bcm47xxpart_parse()
174 bcm47xxpart_add_part(&parts[curr_part++], "ML", offset, bcm47xxpart_parse()
190 offset, 0); bcm47xxpart_parse()
193 /* We have LZMA loader if offset[2] points to sth */ bcm47xxpart_parse()
194 if (trx->offset[2]) { bcm47xxpart_parse()
197 offset + trx->offset[i], bcm47xxpart_parse()
202 if (trx->offset[i]) { bcm47xxpart_parse()
205 offset + trx->offset[i], bcm47xxpart_parse()
212 * trx->length - trx->offset[i]. We don't fill it as bcm47xxpart_parse()
215 if (trx->offset[i]) { bcm47xxpart_parse()
218 name = bcm47xxpart_trx_data_part_name(master, offset + trx->offset[i]); bcm47xxpart_parse()
221 offset + trx->offset[i], bcm47xxpart_parse()
231 * offset in next step. bcm47xxpart_parse()
233 offset = rounddown(offset + trx->length, blocksize); bcm47xxpart_parse()
241 offset, 0); bcm47xxpart_parse()
249 if (offset != master->size - blocksize && bcm47xxpart_parse()
252 offset, 0); bcm47xxpart_parse()
257 if (mtd_read(master, offset + 0x8000, 0x4, bcm47xxpart_parse()
259 pr_err("mtd_read error while parsing (offset: 0x%X)!\n", bcm47xxpart_parse()
260 offset); bcm47xxpart_parse()
267 offset, MTD_WRITEABLE); bcm47xxpart_parse()
279 offset = master->size - possible_nvram_sizes[i]; bcm47xxpart_parse()
280 if (mtd_read(master, offset, 0x4, &bytes_read, bcm47xxpart_parse()
282 pr_err("mtd_read error while reading at offset 0x%X!\n", bcm47xxpart_parse()
283 offset); bcm47xxpart_parse()
303 parts[i + 1].offset : master->size; bcm47xxpart_parse()
305 parts[i].size = next_part_offset - parts[i].offset; bcm47xxpart_parse()
308 parts[trx_part].offset; bcm47xxpart_parse()
56 bcm47xxpart_add_part(struct mtd_partition *part, const char *name, u64 offset, uint32_t mask_flags) bcm47xxpart_add_part() argument
64 bcm47xxpart_trx_data_part_name(struct mtd_info *master, size_t offset) bcm47xxpart_trx_data_part_name() argument
|
| H A D | ar7part.c | 50 unsigned int offset; create_mtd_partitions() local
62 ar7_parts[0].offset = 0; create_mtd_partitions()
67 ar7_parts[1].offset = 0; create_mtd_partitions()
72 offset = pre_size; create_mtd_partitions()
73 mtd_read(master, offset, sizeof(header), &len, create_mtd_partitions()
76 ar7_parts[1].offset = pre_size; create_mtd_partitions()
84 pre_size = offset; create_mtd_partitions()
86 if (!ar7_parts[1].offset) { create_mtd_partitions()
87 ar7_parts[1].offset = master->size - master->erasesize; create_mtd_partitions()
94 offset += sizeof(header) + header.length; create_mtd_partitions()
95 mtd_read(master, offset, sizeof(header), &len, create_mtd_partitions()
98 root_offset = offset + sizeof(header) + 4; create_mtd_partitions()
102 offset += sizeof(header) + header.length; create_mtd_partitions()
103 mtd_read(master, offset, sizeof(header), &len, create_mtd_partitions()
106 root_offset = offset + sizeof(header) + 4 + 0xff; create_mtd_partitions()
121 ar7_parts[2].offset = pre_size; create_mtd_partitions()
126 ar7_parts[3].offset = root_offset; create_mtd_partitions()
|
| /linux-4.4.14/scripts/dtc/libfdt/ |
| H A D | fdt_ro.c | 58 static int _fdt_nodename_eq(const void *fdt, int offset, _fdt_nodename_eq() argument
61 const char *p = fdt_offset_ptr(fdt, offset + FDT_TAGSIZE, len+1); _fdt_nodename_eq()
108 static int _nextprop(const void *fdt, int offset) _nextprop() argument
114 tag = fdt_next_tag(fdt, offset, &nextoffset); _nextprop()
124 return offset; _nextprop()
126 offset = nextoffset; _nextprop()
132 int fdt_subnode_offset_namelen(const void *fdt, int offset, fdt_subnode_offset_namelen() argument
140 (offset >= 0) && (depth >= 0); fdt_subnode_offset_namelen()
141 offset = fdt_next_node(fdt, offset, &depth)) fdt_subnode_offset_namelen()
143 && _fdt_nodename_eq(fdt, offset, name, namelen)) fdt_subnode_offset_namelen()
144 return offset; fdt_subnode_offset_namelen()
148 return offset; /* error */ fdt_subnode_offset_namelen()
161 int offset = 0; fdt_path_offset_namelen() local
175 offset = fdt_path_offset(fdt, p); fdt_path_offset_namelen()
186 return offset; fdt_path_offset_namelen()
192 offset = fdt_subnode_offset_namelen(fdt, offset, p, q-p); fdt_path_offset_namelen()
193 if (offset < 0) fdt_path_offset_namelen()
194 return offset; fdt_path_offset_namelen()
199 return offset; fdt_path_offset_namelen()
229 int offset; fdt_first_property_offset() local
231 if ((offset = _fdt_check_node_offset(fdt, nodeoffset)) < 0) fdt_first_property_offset()
232 return offset; fdt_first_property_offset()
234 return _nextprop(fdt, offset); fdt_first_property_offset()
237 int fdt_next_property_offset(const void *fdt, int offset) fdt_next_property_offset() argument
239 if ((offset = _fdt_check_prop_offset(fdt, offset)) < 0) fdt_next_property_offset()
240 return offset; fdt_next_property_offset()
242 return _nextprop(fdt, offset); fdt_next_property_offset()
246 int offset, fdt_get_property_by_offset()
252 if ((err = _fdt_check_prop_offset(fdt, offset)) < 0) { fdt_get_property_by_offset()
258 prop = _fdt_offset_ptr(fdt, offset); fdt_get_property_by_offset()
267 int offset, fdt_get_property_namelen()
271 for (offset = fdt_first_property_offset(fdt, offset); fdt_get_property_namelen()
272 (offset >= 0); fdt_get_property_namelen()
273 (offset = fdt_next_property_offset(fdt, offset))) { fdt_get_property_namelen()
276 if (!(prop = fdt_get_property_by_offset(fdt, offset, lenp))) { fdt_get_property_namelen()
277 offset = -FDT_ERR_INTERNAL; fdt_get_property_namelen()
286 *lenp = offset; fdt_get_property_namelen()
310 const void *fdt_getprop_by_offset(const void *fdt, int offset, fdt_getprop_by_offset() argument
315 prop = fdt_get_property_by_offset(fdt, offset, lenp); fdt_getprop_by_offset()
366 int offset, depth, namelen; fdt_get_path() local
374 for (offset = 0, depth = 0; fdt_get_path()
375 (offset >= 0) && (offset <= nodeoffset); fdt_get_path()
376 offset = fdt_next_node(fdt, offset, &depth)) { fdt_get_path()
385 name = fdt_get_name(fdt, offset, &namelen); fdt_get_path()
396 if (offset == nodeoffset) { fdt_get_path()
407 if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) fdt_get_path()
409 else if (offset == -FDT_ERR_BADOFFSET) fdt_get_path()
412 return offset; /* error from fdt_next_node() */ fdt_get_path()
418 int offset, depth; fdt_supernode_atdepth_offset() local
426 for (offset = 0, depth = 0; fdt_supernode_atdepth_offset()
427 (offset >= 0) && (offset <= nodeoffset); fdt_supernode_atdepth_offset()
428 offset = fdt_next_node(fdt, offset, &depth)) { fdt_supernode_atdepth_offset()
430 supernodeoffset = offset; fdt_supernode_atdepth_offset()
432 if (offset == nodeoffset) { fdt_supernode_atdepth_offset()
443 if ((offset == -FDT_ERR_NOTFOUND) || (offset >= 0)) fdt_supernode_atdepth_offset()
445 else if (offset == -FDT_ERR_BADOFFSET) fdt_supernode_atdepth_offset()
448 return offset; /* error from fdt_next_node() */ fdt_supernode_atdepth_offset()
476 int offset; fdt_node_offset_by_prop_value() local
487 for (offset = fdt_next_node(fdt, startoffset, NULL); fdt_node_offset_by_prop_value()
488 offset >= 0; fdt_node_offset_by_prop_value()
489 offset = fdt_next_node(fdt, offset, NULL)) { fdt_node_offset_by_prop_value()
490 val = fdt_getprop(fdt, offset, propname, &len); fdt_node_offset_by_prop_value()
493 return offset; fdt_node_offset_by_prop_value()
496 return offset; /* error from fdt_next_node() */ fdt_node_offset_by_prop_value()
501 int offset; fdt_node_offset_by_phandle() local
514 for (offset = fdt_next_node(fdt, -1, NULL); fdt_node_offset_by_phandle()
515 offset >= 0; fdt_node_offset_by_phandle()
516 offset = fdt_next_node(fdt, offset, NULL)) { fdt_node_offset_by_phandle()
517 if (fdt_get_phandle(fdt, offset) == phandle) fdt_node_offset_by_phandle()
518 return offset; fdt_node_offset_by_phandle()
521 return offset; /* error from fdt_next_node() */ fdt_node_offset_by_phandle()
559 int offset, err; fdt_node_offset_by_compatible() local
568 for (offset = fdt_next_node(fdt, startoffset, NULL); fdt_node_offset_by_compatible()
569 offset >= 0; fdt_node_offset_by_compatible()
570 offset = fdt_next_node(fdt, offset, NULL)) { fdt_node_offset_by_compatible()
571 err = fdt_node_check_compatible(fdt, offset, compatible); fdt_node_offset_by_compatible()
575 return offset; fdt_node_offset_by_compatible()
578 return offset; /* error from fdt_next_node() */ fdt_node_offset_by_compatible()
245 fdt_get_property_by_offset(const void *fdt, int offset, int *lenp) fdt_get_property_by_offset() argument
266 fdt_get_property_namelen(const void *fdt, int offset, const char *name, int namelen, int *lenp) fdt_get_property_namelen() argument
|
| H A D | fdt.c | 77 const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) fdt_offset_ptr() argument
82 if (((offset + len) < offset) fdt_offset_ptr()
83 || ((offset + len) > fdt_size_dt_struct(fdt))) fdt_offset_ptr()
86 p = _fdt_offset_ptr(fdt, offset); fdt_offset_ptr()
97 int offset = startoffset; fdt_next_tag() local
101 tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); fdt_next_tag()
105 offset += FDT_TAGSIZE; fdt_next_tag()
112 p = fdt_offset_ptr(fdt, offset++, 1); fdt_next_tag()
119 lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp)); fdt_next_tag()
122 /* skip-name offset, length and value */ fdt_next_tag()
123 offset += sizeof(struct fdt_property) - FDT_TAGSIZE fdt_next_tag()
136 if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset)) fdt_next_tag()
139 *nextoffset = FDT_TAGALIGN(offset); fdt_next_tag()
143 int _fdt_check_node_offset(const void *fdt, int offset) _fdt_check_node_offset() argument
145 if ((offset < 0) || (offset % FDT_TAGSIZE) _fdt_check_node_offset()
146 || (fdt_next_tag(fdt, offset, &offset) != FDT_BEGIN_NODE)) _fdt_check_node_offset()
149 return offset; _fdt_check_node_offset()
152 int _fdt_check_prop_offset(const void *fdt, int offset) _fdt_check_prop_offset() argument
154 if ((offset < 0) || (offset % FDT_TAGSIZE) _fdt_check_prop_offset()
155 || (fdt_next_tag(fdt, offset, &offset) != FDT_PROP)) _fdt_check_prop_offset()
158 return offset; _fdt_check_prop_offset()
161 int fdt_next_node(const void *fdt, int offset, int *depth) fdt_next_node() argument
166 if (offset >= 0) fdt_next_node()
167 if ((nextoffset = _fdt_check_node_offset(fdt, offset)) < 0) fdt_next_node()
171 offset = nextoffset; fdt_next_node()
172 tag = fdt_next_tag(fdt, offset, &nextoffset); fdt_next_node()
198 return offset; fdt_next_node()
201 int fdt_first_subnode(const void *fdt, int offset) fdt_first_subnode() argument
205 offset = fdt_next_node(fdt, offset, &depth); fdt_first_subnode()
206 if (offset < 0 || depth != 1) fdt_first_subnode()
209 return offset; fdt_first_subnode()
212 int fdt_next_subnode(const void *fdt, int offset) fdt_next_subnode() argument
221 offset = fdt_next_node(fdt, offset, &depth); fdt_next_subnode()
222 if (offset < 0 || depth < 1) fdt_next_subnode()
226 return offset; fdt_next_subnode()
|
| /linux-4.4.14/drivers/gpu/host1x/hw/ |
| H A D | host1x01_hardware.h | 44 unsigned indx, unsigned base_indx, unsigned offset) host1x_class_host_wait_syncpt_base()
48 | host1x_uclass_wait_syncpt_base_offset_f(offset); host1x_class_host_wait_syncpt_base()
52 unsigned base_indx, unsigned offset) host1x_class_host_incr_syncpt_base()
55 | host1x_uclass_incr_syncpt_base_offset_f(offset); host1x_class_host_incr_syncpt_base()
66 unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_write()
70 | host1x_uclass_indoff_indroffset_f(offset); host1x_class_host_indoff_reg_write()
77 unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_read()
80 | host1x_uclass_indoff_indroffset_f(offset) host1x_class_host_indoff_reg_read()
90 unsigned class_id, unsigned offset, unsigned mask) host1x_opcode_setclass()
92 return (0 << 28) | (offset << 16) | (class_id << 6) | mask; host1x_opcode_setclass()
95 static inline u32 host1x_opcode_incr(unsigned offset, unsigned count) host1x_opcode_incr() argument
97 return (1 << 28) | (offset << 16) | count; host1x_opcode_incr()
100 static inline u32 host1x_opcode_nonincr(unsigned offset, unsigned count) host1x_opcode_nonincr() argument
102 return (2 << 28) | (offset << 16) | count; host1x_opcode_nonincr()
105 static inline u32 host1x_opcode_mask(unsigned offset, unsigned mask) host1x_opcode_mask() argument
107 return (3 << 28) | (offset << 16) | mask; host1x_opcode_mask()
110 static inline u32 host1x_opcode_imm(unsigned offset, unsigned value) host1x_opcode_imm() argument
112 return (4 << 28) | (offset << 16) | value; host1x_opcode_imm()
131 static inline u32 host1x_opcode_gather_nonincr(unsigned offset, unsigned count) host1x_opcode_gather_nonincr() argument
133 return (6 << 28) | (offset << 16) | BIT(15) | count; host1x_opcode_gather_nonincr()
136 static inline u32 host1x_opcode_gather_incr(unsigned offset, unsigned count) host1x_opcode_gather_incr() argument
138 return (6 << 28) | (offset << 16) | BIT(15) | BIT(14) | count; host1x_opcode_gather_incr()
43 host1x_class_host_wait_syncpt_base( unsigned indx, unsigned base_indx, unsigned offset) host1x_class_host_wait_syncpt_base() argument
51 host1x_class_host_incr_syncpt_base( unsigned base_indx, unsigned offset) host1x_class_host_incr_syncpt_base() argument
65 host1x_class_host_indoff_reg_write( unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_write() argument
76 host1x_class_host_indoff_reg_read( unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_read() argument
89 host1x_opcode_setclass( unsigned class_id, unsigned offset, unsigned mask) host1x_opcode_setclass() argument
|
| H A D | host1x02_hardware.h | 44 unsigned indx, unsigned base_indx, unsigned offset) host1x_class_host_wait_syncpt_base()
48 | host1x_uclass_wait_syncpt_base_offset_f(offset); host1x_class_host_wait_syncpt_base()
52 unsigned base_indx, unsigned offset) host1x_class_host_incr_syncpt_base()
55 | host1x_uclass_incr_syncpt_base_offset_f(offset); host1x_class_host_incr_syncpt_base()
66 unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_write()
70 | host1x_uclass_indoff_indroffset_f(offset); host1x_class_host_indoff_reg_write()
77 unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_read()
80 | host1x_uclass_indoff_indroffset_f(offset) host1x_class_host_indoff_reg_read()
89 unsigned class_id, unsigned offset, unsigned mask) host1x_opcode_setclass()
91 return (0 << 28) | (offset << 16) | (class_id << 6) | mask; host1x_opcode_setclass()
94 static inline u32 host1x_opcode_incr(unsigned offset, unsigned count) host1x_opcode_incr() argument
96 return (1 << 28) | (offset << 16) | count; host1x_opcode_incr()
99 static inline u32 host1x_opcode_nonincr(unsigned offset, unsigned count) host1x_opcode_nonincr() argument
101 return (2 << 28) | (offset << 16) | count; host1x_opcode_nonincr()
104 static inline u32 host1x_opcode_mask(unsigned offset, unsigned mask) host1x_opcode_mask() argument
106 return (3 << 28) | (offset << 16) | mask; host1x_opcode_mask()
109 static inline u32 host1x_opcode_imm(unsigned offset, unsigned value) host1x_opcode_imm() argument
111 return (4 << 28) | (offset << 16) | value; host1x_opcode_imm()
130 static inline u32 host1x_opcode_gather_nonincr(unsigned offset, unsigned count) host1x_opcode_gather_nonincr() argument
132 return (6 << 28) | (offset << 16) | BIT(15) | count; host1x_opcode_gather_nonincr()
135 static inline u32 host1x_opcode_gather_incr(unsigned offset, unsigned count) host1x_opcode_gather_incr() argument
137 return (6 << 28) | (offset << 16) | BIT(15) | BIT(14) | count; host1x_opcode_gather_incr()
43 host1x_class_host_wait_syncpt_base( unsigned indx, unsigned base_indx, unsigned offset) host1x_class_host_wait_syncpt_base() argument
51 host1x_class_host_incr_syncpt_base( unsigned base_indx, unsigned offset) host1x_class_host_incr_syncpt_base() argument
65 host1x_class_host_indoff_reg_write( unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_write() argument
76 host1x_class_host_indoff_reg_read( unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_read() argument
88 host1x_opcode_setclass( unsigned class_id, unsigned offset, unsigned mask) host1x_opcode_setclass() argument
|
| H A D | host1x04_hardware.h | 44 unsigned indx, unsigned base_indx, unsigned offset) host1x_class_host_wait_syncpt_base()
48 | host1x_uclass_wait_syncpt_base_offset_f(offset); host1x_class_host_wait_syncpt_base()
52 unsigned base_indx, unsigned offset) host1x_class_host_incr_syncpt_base()
55 | host1x_uclass_incr_syncpt_base_offset_f(offset); host1x_class_host_incr_syncpt_base()
66 unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_write()
70 | host1x_uclass_indoff_indroffset_f(offset); host1x_class_host_indoff_reg_write()
77 unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_read()
80 | host1x_uclass_indoff_indroffset_f(offset) host1x_class_host_indoff_reg_read()
89 unsigned class_id, unsigned offset, unsigned mask) host1x_opcode_setclass()
91 return (0 << 28) | (offset << 16) | (class_id << 6) | mask; host1x_opcode_setclass()
94 static inline u32 host1x_opcode_incr(unsigned offset, unsigned count) host1x_opcode_incr() argument
96 return (1 << 28) | (offset << 16) | count; host1x_opcode_incr()
99 static inline u32 host1x_opcode_nonincr(unsigned offset, unsigned count) host1x_opcode_nonincr() argument
101 return (2 << 28) | (offset << 16) | count; host1x_opcode_nonincr()
104 static inline u32 host1x_opcode_mask(unsigned offset, unsigned mask) host1x_opcode_mask() argument
106 return (3 << 28) | (offset << 16) | mask; host1x_opcode_mask()
109 static inline u32 host1x_opcode_imm(unsigned offset, unsigned value) host1x_opcode_imm() argument
111 return (4 << 28) | (offset << 16) | value; host1x_opcode_imm()
130 static inline u32 host1x_opcode_gather_nonincr(unsigned offset, unsigned count) host1x_opcode_gather_nonincr() argument
132 return (6 << 28) | (offset << 16) | BIT(15) | count; host1x_opcode_gather_nonincr()
135 static inline u32 host1x_opcode_gather_incr(unsigned offset, unsigned count) host1x_opcode_gather_incr() argument
137 return (6 << 28) | (offset << 16) | BIT(15) | BIT(14) | count; host1x_opcode_gather_incr()
43 host1x_class_host_wait_syncpt_base( unsigned indx, unsigned base_indx, unsigned offset) host1x_class_host_wait_syncpt_base() argument
51 host1x_class_host_incr_syncpt_base( unsigned base_indx, unsigned offset) host1x_class_host_incr_syncpt_base() argument
65 host1x_class_host_indoff_reg_write( unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_write() argument
76 host1x_class_host_indoff_reg_read( unsigned mod_id, unsigned offset, bool auto_inc) host1x_class_host_indoff_reg_read() argument
88 host1x_opcode_setclass( unsigned class_id, unsigned offset, unsigned mask) host1x_opcode_setclass() argument
|
| /linux-4.4.14/arch/x86/pci/ |
| H A D | early.c | 10 u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) read_pci_config() argument
13 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); read_pci_config()
18 u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset) read_pci_config_byte() argument
21 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); read_pci_config_byte()
22 v = inb(0xcfc + (offset&3)); read_pci_config_byte()
26 u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset) read_pci_config_16() argument
29 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); read_pci_config_16()
30 v = inw(0xcfc + (offset&2)); read_pci_config_16()
34 void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, write_pci_config() argument
37 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); write_pci_config()
41 void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val) write_pci_config_byte() argument
43 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); write_pci_config_byte()
44 outb(val, 0xcfc + (offset&3)); write_pci_config_byte()
47 void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val) write_pci_config_16() argument
49 outl(0x80000000 | (bus<<16) | (slot<<11) | (func<<8) | offset, 0xcf8); write_pci_config_16()
50 outw(val, 0xcfc + (offset&2)); write_pci_config_16()
|
| /linux-4.4.14/arch/powerpc/kernel/ |
| H A D | smp-tbsync.c | 77 static int start_contest(int cmd, long offset, int num) start_contest() argument
88 tbsync->tb = tb + offset; start_contest()
114 int i, score, score2, old, min=0, max=5000, offset=1000; smp_generic_give_timebase() local
129 for (old = -1; old != offset ; offset = (min+max) / 2) { smp_generic_give_timebase()
130 score = start_contest(kSetAndTest, offset, NUM_ITER); smp_generic_give_timebase()
132 pr_debug("score %d, offset %d\n", score, offset ); smp_generic_give_timebase()
135 max = offset; smp_generic_give_timebase()
137 min = offset; smp_generic_give_timebase()
138 old = offset; smp_generic_give_timebase()
147 offset = (score < score2) ? min : max; smp_generic_give_timebase()
151 start_contest(kSetAndTest, offset, NUM_ITER/10); smp_generic_give_timebase()
153 if ((score2 = start_contest(kTest, offset, NUM_ITER)) < 0) smp_generic_give_timebase()
158 pr_debug("Final offset: %d (%d/%d)\n", offset, score2, NUM_ITER ); smp_generic_give_timebase()
|
| /linux-4.4.14/drivers/mtd/maps/ |
| H A D | tsunami_flash.c | 17 static inline map_word tsunami_flash_read8(struct map_info *map, unsigned long offset) tsunami_flash_read8() argument
20 val.x[0] = tsunami_tig_readb(offset); tsunami_flash_read8()
24 static void tsunami_flash_write8(struct map_info *map, map_word value, unsigned long offset) tsunami_flash_write8() argument
26 tsunami_tig_writeb(value.x[0], offset); tsunami_flash_write8()
30 struct map_info *map, void *addr, unsigned long offset, ssize_t len) tsunami_flash_copy_from()
34 while(len && (offset < MAX_TIG_FLASH_SIZE)) { tsunami_flash_copy_from()
35 *dest = tsunami_tig_readb(offset); tsunami_flash_copy_from()
36 offset++; tsunami_flash_copy_from()
43 struct map_info *map, unsigned long offset, tsunami_flash_copy_to()
48 while(len && (offset < MAX_TIG_FLASH_SIZE)) { tsunami_flash_copy_to()
49 tsunami_tig_writeb(*src, offset); tsunami_flash_copy_to()
50 offset++; tsunami_flash_copy_to()
29 tsunami_flash_copy_from( struct map_info *map, void *addr, unsigned long offset, ssize_t len) tsunami_flash_copy_from() argument
42 tsunami_flash_copy_to( struct map_info *map, unsigned long offset, const void *addr, ssize_t len) tsunami_flash_copy_to() argument
|
| /linux-4.4.14/drivers/pci/ |
| H A D | host-bridge.c | 53 resource_size_t offset = 0; pcibios_resource_to_bus() local
57 offset = window->offset; pcibios_resource_to_bus()
62 region->start = res->start - offset; pcibios_resource_to_bus()
63 region->end = res->end - offset; pcibios_resource_to_bus()
78 resource_size_t offset = 0; pcibios_bus_to_resource() local
86 bus_region.start = window->res->start - window->offset; pcibios_bus_to_resource()
87 bus_region.end = window->res->end - window->offset; pcibios_bus_to_resource()
90 offset = window->offset; pcibios_bus_to_resource()
95 res->start = region->start + offset; pcibios_bus_to_resource()
96 res->end = region->end + offset; pcibios_bus_to_resource()
|
| /linux-4.4.14/arch/mips/kernel/ |
| H A D | gpio_txx9.c | 22 static int txx9_gpio_get(struct gpio_chip *chip, unsigned int offset) txx9_gpio_get() argument
24 return __raw_readl(&txx9_pioptr->din) & (1 << offset); txx9_gpio_get()
27 static void txx9_gpio_set_raw(unsigned int offset, int value) txx9_gpio_set_raw() argument
32 val |= 1 << offset; txx9_gpio_set_raw()
34 val &= ~(1 << offset); txx9_gpio_set_raw()
38 static void txx9_gpio_set(struct gpio_chip *chip, unsigned int offset, txx9_gpio_set() argument
43 txx9_gpio_set_raw(offset, value); txx9_gpio_set()
48 static int txx9_gpio_dir_in(struct gpio_chip *chip, unsigned int offset) txx9_gpio_dir_in() argument
52 __raw_writel(__raw_readl(&txx9_pioptr->dir) & ~(1 << offset), txx9_gpio_dir_in()
59 static int txx9_gpio_dir_out(struct gpio_chip *chip, unsigned int offset, txx9_gpio_dir_out() argument
64 txx9_gpio_set_raw(offset, value); txx9_gpio_dir_out()
65 __raw_writel(__raw_readl(&txx9_pioptr->dir) | (1 << offset), txx9_gpio_dir_out()
|
| /linux-4.4.14/drivers/gpio/ |
| H A D | gpio-cs5535.c | 82 static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset, __cs5535_gpio_set() argument
85 if (offset < 16) __cs5535_gpio_set()
87 outl(1 << offset, chip->base + reg); __cs5535_gpio_set()
90 errata_outl(chip, 1 << (offset - 16), reg); __cs5535_gpio_set()
93 void cs5535_gpio_set(unsigned offset, unsigned int reg) cs5535_gpio_set() argument
99 __cs5535_gpio_set(chip, offset, reg); cs5535_gpio_set()
104 static void __cs5535_gpio_clear(struct cs5535_gpio_chip *chip, unsigned offset, __cs5535_gpio_clear() argument
107 if (offset < 16) __cs5535_gpio_clear()
109 outl(1 << (offset + 16), chip->base + reg); __cs5535_gpio_clear()
112 errata_outl(chip, 1 << offset, reg); __cs5535_gpio_clear()
115 void cs5535_gpio_clear(unsigned offset, unsigned int reg) cs5535_gpio_clear() argument
121 __cs5535_gpio_clear(chip, offset, reg); cs5535_gpio_clear()
126 int cs5535_gpio_isset(unsigned offset, unsigned int reg) cs5535_gpio_isset() argument
133 if (offset < 16) cs5535_gpio_isset()
139 offset -= 16; cs5535_gpio_isset()
143 return (val & (1 << offset)) ? 1 : 0; cs5535_gpio_isset()
164 void cs5535_gpio_setup_event(unsigned offset, int pair, int pme) cs5535_gpio_setup_event() argument
167 uint32_t shift = (offset % 8) * 4; cs5535_gpio_setup_event()
171 if (offset >= 24) cs5535_gpio_setup_event()
172 offset = GPIO_MAP_W; cs5535_gpio_setup_event()
173 else if (offset >= 16) cs5535_gpio_setup_event()
174 offset = GPIO_MAP_Z; cs5535_gpio_setup_event()
175 else if (offset >= 8) cs5535_gpio_setup_event()
176 offset = GPIO_MAP_Y; cs5535_gpio_setup_event()
178 offset = GPIO_MAP_X; cs5535_gpio_setup_event()
181 val = inl(chip->base + offset); cs5535_gpio_setup_event()
193 outl(val, chip->base + offset); cs5535_gpio_setup_event()
202 static int chip_gpio_request(struct gpio_chip *c, unsigned offset) chip_gpio_request() argument
211 if ((mask & (1 << offset)) == 0) { chip_gpio_request()
213 "pin %u is not available (check mask)\n", offset); chip_gpio_request()
219 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_AUX1); chip_gpio_request()
220 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_AUX2); chip_gpio_request()
223 __cs5535_gpio_clear(chip, offset, GPIO_INPUT_AUX1); chip_gpio_request()
230 static int chip_gpio_get(struct gpio_chip *chip, unsigned offset) chip_gpio_get() argument
232 return cs5535_gpio_isset(offset, GPIO_READ_BACK); chip_gpio_get()
235 static void chip_gpio_set(struct gpio_chip *chip, unsigned offset, int val) chip_gpio_set() argument
238 cs5535_gpio_set(offset, GPIO_OUTPUT_VAL); chip_gpio_set()
240 cs5535_gpio_clear(offset, GPIO_OUTPUT_VAL); chip_gpio_set()
243 static int chip_direction_input(struct gpio_chip *c, unsigned offset) chip_direction_input() argument
250 __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE); chip_direction_input()
251 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_ENABLE); chip_direction_input()
257 static int chip_direction_output(struct gpio_chip *c, unsigned offset, int val) chip_direction_output() argument
265 __cs5535_gpio_set(chip, offset, GPIO_INPUT_ENABLE); chip_direction_output()
266 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_ENABLE); chip_direction_output()
268 __cs5535_gpio_set(chip, offset, GPIO_OUTPUT_VAL); chip_direction_output()
270 __cs5535_gpio_clear(chip, offset, GPIO_OUTPUT_VAL); chip_direction_output()
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| H A D | gpio-lp3943.c | 53 static int lp3943_gpio_request(struct gpio_chip *chip, unsigned offset) lp3943_gpio_request() argument
59 if (test_and_set_bit(offset, &lp3943->pin_used)) lp3943_gpio_request()
65 static void lp3943_gpio_free(struct gpio_chip *chip, unsigned offset) lp3943_gpio_free() argument
70 clear_bit(offset, &lp3943->pin_used); lp3943_gpio_free()
73 static int lp3943_gpio_set_mode(struct lp3943_gpio *lp3943_gpio, u8 offset, lp3943_gpio_set_mode() argument
79 return lp3943_update_bits(lp3943, mux[offset].reg, mux[offset].mask, lp3943_gpio_set_mode()
80 val << mux[offset].shift); lp3943_gpio_set_mode()
83 static int lp3943_gpio_direction_input(struct gpio_chip *chip, unsigned offset) lp3943_gpio_direction_input() argument
87 lp3943_gpio->input_mask |= BIT(offset); lp3943_gpio_direction_input()
89 return lp3943_gpio_set_mode(lp3943_gpio, offset, LP3943_GPIO_IN); lp3943_gpio_direction_input()
93 struct gpio_chip *chip, unsigned offset) lp3943_get_gpio_in_status()
98 switch (offset) { lp3943_get_gpio_in_status()
104 offset = offset - 8; lp3943_get_gpio_in_status()
114 return !!(read & BIT(offset)); lp3943_get_gpio_in_status()
118 struct gpio_chip *chip, unsigned offset) lp3943_get_gpio_out_status()
125 err = lp3943_read_byte(lp3943, mux[offset].reg, &read); lp3943_get_gpio_out_status()
129 read = (read & mux[offset].mask) >> mux[offset].shift; lp3943_get_gpio_out_status()
139 static int lp3943_gpio_get(struct gpio_chip *chip, unsigned offset) lp3943_gpio_get() argument
152 if (lp3943_gpio->input_mask & BIT(offset)) lp3943_gpio_get()
153 return lp3943_get_gpio_in_status(lp3943_gpio, chip, offset); lp3943_gpio_get()
155 return lp3943_get_gpio_out_status(lp3943_gpio, chip, offset); lp3943_gpio_get()
158 static void lp3943_gpio_set(struct gpio_chip *chip, unsigned offset, int value) lp3943_gpio_set() argument
168 lp3943_gpio_set_mode(lp3943_gpio, offset, data); lp3943_gpio_set()
171 static int lp3943_gpio_direction_output(struct gpio_chip *chip, unsigned offset, lp3943_gpio_direction_output() argument
176 lp3943_gpio_set(chip, offset, value); lp3943_gpio_direction_output()
177 lp3943_gpio->input_mask &= ~BIT(offset); lp3943_gpio_direction_output()
92 lp3943_get_gpio_in_status(struct lp3943_gpio *lp3943_gpio, struct gpio_chip *chip, unsigned offset) lp3943_get_gpio_in_status() argument
117 lp3943_get_gpio_out_status(struct lp3943_gpio *lp3943_gpio, struct gpio_chip *chip, unsigned offset) lp3943_get_gpio_out_status() argument
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| H A D | gpio-da9052.c | 59 static unsigned char da9052_gpio_port_odd(unsigned offset) da9052_gpio_port_odd() argument
61 return offset % 2; da9052_gpio_port_odd()
64 static int da9052_gpio_get(struct gpio_chip *gc, unsigned offset) da9052_gpio_get() argument
71 DA9052_GPIO_0_1_REG + (offset >> 1)); da9052_gpio_get()
75 if (da9052_gpio_port_odd(offset)) { da9052_gpio_get()
84 if (offset < DA9052_GPIO_MAX_PORTS_PER_REGISTER) da9052_gpio_get()
92 if (ret & (1 << DA9052_GPIO_SHIFT_COUNT(offset))) da9052_gpio_get()
97 if (da9052_gpio_port_odd(offset)) da9052_gpio_get()
106 static void da9052_gpio_set(struct gpio_chip *gc, unsigned offset, int value) da9052_gpio_set() argument
111 if (da9052_gpio_port_odd(offset)) { da9052_gpio_set()
112 ret = da9052_reg_update(gpio->da9052, (offset >> 1) + da9052_gpio_set()
121 ret = da9052_reg_update(gpio->da9052, (offset >> 1) + da9052_gpio_set()
132 static int da9052_gpio_direction_input(struct gpio_chip *gc, unsigned offset) da9052_gpio_direction_input() argument
142 if (da9052_gpio_port_odd(offset)) da9052_gpio_direction_input()
143 ret = da9052_reg_update(gpio->da9052, (offset >> 1) + da9052_gpio_direction_input()
149 ret = da9052_reg_update(gpio->da9052, (offset >> 1) + da9052_gpio_direction_input()
158 unsigned offset, int value) da9052_gpio_direction_output()
168 if (da9052_gpio_port_odd(offset)) da9052_gpio_direction_output()
169 ret = da9052_reg_update(gpio->da9052, (offset >> 1) + da9052_gpio_direction_output()
175 ret = da9052_reg_update(gpio->da9052, (offset >> 1) + da9052_gpio_direction_output()
183 static int da9052_gpio_to_irq(struct gpio_chip *gc, u32 offset) da9052_gpio_to_irq() argument
190 irq = regmap_irq_get_virq(da9052->irq_data, DA9052_IRQ_GPI0 + offset); da9052_gpio_to_irq()
157 da9052_gpio_direction_output(struct gpio_chip *gc, unsigned offset, int value) da9052_gpio_direction_output() argument
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| H A D | gpio-da9055.c | 27 #define DA9055_PORT_SHIFT(offset) (4 * (offset % 2))
43 static int da9055_gpio_get(struct gpio_chip *gc, unsigned offset) da9055_gpio_get() argument
50 ret = da9055_reg_read(gpio->da9055, (offset >> 1) + DA9055_REG_GPIO0_1); da9055_gpio_get()
54 gpio_direction = ret & (DA9055_PORT_MASK) << DA9055_PORT_SHIFT(offset); da9055_gpio_get()
55 gpio_direction >>= DA9055_PORT_SHIFT(offset); da9055_gpio_get()
68 return ret & (1 << offset); da9055_gpio_get()
72 static void da9055_gpio_set(struct gpio_chip *gc, unsigned offset, int value) da9055_gpio_set() argument
78 1 << offset, da9055_gpio_set()
79 value << offset); da9055_gpio_set()
82 static int da9055_gpio_direction_input(struct gpio_chip *gc, unsigned offset) da9055_gpio_direction_input() argument
88 << DA9055_PORT_SHIFT(offset); da9055_gpio_direction_input()
90 return da9055_reg_update(gpio->da9055, (offset >> 1) + da9055_gpio_direction_input()
93 DA9055_PORT_SHIFT(offset), da9055_gpio_direction_input()
98 unsigned offset, int value) da9055_gpio_direction_output()
105 << DA9055_PORT_SHIFT(offset); da9055_gpio_direction_output()
107 ret = da9055_reg_update(gpio->da9055, (offset >> 1) + da9055_gpio_direction_output()
110 DA9055_PORT_SHIFT(offset), da9055_gpio_direction_output()
115 da9055_gpio_set(gc, offset, value); da9055_gpio_direction_output()
120 static int da9055_gpio_to_irq(struct gpio_chip *gc, u32 offset) da9055_gpio_to_irq() argument
126 DA9055_IRQ_GPI0 + offset); da9055_gpio_to_irq()
97 da9055_gpio_direction_output(struct gpio_chip *gc, unsigned offset, int value) da9055_gpio_direction_output() argument
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| H A D | gpio-pl061.c | 61 static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) pl061_direction_input() argument
67 if (offset >= gc->ngpio) pl061_direction_input()
72 gpiodir &= ~(BIT(offset)); pl061_direction_input()
79 static int pl061_direction_output(struct gpio_chip *gc, unsigned offset, pl061_direction_output() argument
86 if (offset >= gc->ngpio) pl061_direction_output()
90 writeb(!!value << offset, chip->base + (BIT(offset + 2))); pl061_direction_output()
92 gpiodir |= BIT(offset); pl061_direction_output()
99 writeb(!!value << offset, chip->base + (BIT(offset + 2))); pl061_direction_output()
105 static int pl061_get_value(struct gpio_chip *gc, unsigned offset) pl061_get_value() argument
109 return !!readb(chip->base + (BIT(offset + 2))); pl061_get_value()
112 static void pl061_set_value(struct gpio_chip *gc, unsigned offset, int value) pl061_set_value() argument
116 writeb(!!value << offset, chip->base + (BIT(offset + 2))); pl061_set_value()
123 int offset = irqd_to_hwirq(d); pl061_irq_type() local
126 u8 bit = BIT(offset); pl061_irq_type()
128 if (offset < 0 || offset >= PL061_GPIO_NR) pl061_irq_type()
137 offset); pl061_irq_type()
162 offset, pl061_irq_type()
170 dev_dbg(gc->dev, "line %d: IRQ on both edges\n", offset); pl061_irq_type()
186 offset, pl061_irq_type()
195 offset); pl061_irq_type()
210 int offset; pl061_irq_handler() local
219 for_each_set_bit(offset, &pending, PL061_GPIO_NR) pl061_irq_handler()
221 offset)); pl061_irq_handler()
367 int offset; pl061_suspend() local
376 for (offset = 0; offset < PL061_GPIO_NR; offset++) { pl061_suspend()
377 if (chip->csave_regs.gpio_dir & (BIT(offset))) pl061_suspend()
379 pl061_get_value(&chip->gc, offset) << offset; pl061_suspend()
388 int offset; pl061_resume() local
390 for (offset = 0; offset < PL061_GPIO_NR; offset++) { pl061_resume()
391 if (chip->csave_regs.gpio_dir & (BIT(offset))) pl061_resume()
392 pl061_direction_output(&chip->gc, offset, pl061_resume()
394 (BIT(offset))); pl061_resume()
396 pl061_direction_input(&chip->gc, offset); pl061_resume()
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| H A D | gpio-viperboard.c | 51 u8 offset; member in struct:vprbrd_gpioa_msg
88 unsigned offset) vprbrd_gpioa_get()
97 if (gpio->gpioa_out & (1 << offset)) vprbrd_gpioa_get()
98 return gpio->gpioa_val & (1 << offset); vprbrd_gpioa_get()
104 gamsg->offset = offset; vprbrd_gpioa_get()
139 unsigned offset, int value) vprbrd_gpioa_set()
147 if (gpio->gpioa_out & (1 << offset)) { vprbrd_gpioa_set()
149 gpio->gpioa_val |= (1 << offset); vprbrd_gpioa_set()
151 gpio->gpioa_val &= ~(1 << offset); vprbrd_gpioa_set()
157 gamsg->offset = offset; vprbrd_gpioa_set()
181 unsigned offset) vprbrd_gpioa_direction_input()
189 gpio->gpioa_out &= ~(1 << offset); vprbrd_gpioa_direction_input()
195 gamsg->offset = offset; vprbrd_gpioa_direction_input()
219 unsigned offset, int value) vprbrd_gpioa_direction_output()
227 gpio->gpioa_out |= (1 << offset); vprbrd_gpioa_direction_output()
229 gpio->gpioa_val |= (1 << offset); vprbrd_gpioa_direction_output()
231 gpio->gpioa_val &= ~(1 << offset); vprbrd_gpioa_direction_output()
237 gamsg->offset = offset; vprbrd_gpioa_direction_output()
264 static int vprbrd_gpiob_setdir(struct vprbrd *vb, unsigned offset, vprbrd_gpiob_setdir() argument
271 gbmsg->val = cpu_to_be16(dir << offset); vprbrd_gpiob_setdir()
272 gbmsg->mask = cpu_to_be16(0x0001 << offset); vprbrd_gpiob_setdir()
286 unsigned offset) vprbrd_gpiob_get()
296 if (gpio->gpiob_out & (1 << offset)) vprbrd_gpiob_get()
297 return gpio->gpiob_val & (1 << offset); vprbrd_gpiob_get()
315 return (gpio->gpiob_val >> offset) & 0x1; vprbrd_gpiob_get()
319 unsigned offset, int value) vprbrd_gpiob_set()
327 if (gpio->gpiob_out & (1 << offset)) { vprbrd_gpiob_set()
329 gpio->gpiob_val |= (1 << offset); vprbrd_gpiob_set()
331 gpio->gpiob_val &= ~(1 << offset); vprbrd_gpiob_set()
336 gbmsg->val = cpu_to_be16(value << offset); vprbrd_gpiob_set()
337 gbmsg->mask = cpu_to_be16(0x0001 << offset); vprbrd_gpiob_set()
353 unsigned offset) vprbrd_gpiob_direction_input()
360 gpio->gpiob_out &= ~(1 << offset); vprbrd_gpiob_direction_input()
364 ret = vprbrd_gpiob_setdir(vb, offset, 0); vprbrd_gpiob_direction_input()
375 unsigned offset, int value) vprbrd_gpiob_direction_output()
382 gpio->gpiob_out |= (1 << offset); vprbrd_gpiob_direction_output()
386 ret = vprbrd_gpiob_setdir(vb, offset, 1); vprbrd_gpiob_direction_output()
392 vprbrd_gpiob_set(chip, offset, value); vprbrd_gpiob_direction_output()
87 vprbrd_gpioa_get(struct gpio_chip *chip, unsigned offset) vprbrd_gpioa_get() argument
138 vprbrd_gpioa_set(struct gpio_chip *chip, unsigned offset, int value) vprbrd_gpioa_set() argument
180 vprbrd_gpioa_direction_input(struct gpio_chip *chip, unsigned offset) vprbrd_gpioa_direction_input() argument
218 vprbrd_gpioa_direction_output(struct gpio_chip *chip, unsigned offset, int value) vprbrd_gpioa_direction_output() argument
285 vprbrd_gpiob_get(struct gpio_chip *chip, unsigned offset) vprbrd_gpiob_get() argument
318 vprbrd_gpiob_set(struct gpio_chip *chip, unsigned offset, int value) vprbrd_gpiob_set() argument
352 vprbrd_gpiob_direction_input(struct gpio_chip *chip, unsigned offset) vprbrd_gpiob_direction_input() argument
374 vprbrd_gpiob_direction_output(struct gpio_chip *chip, unsigned offset, int value) vprbrd_gpiob_direction_output() argument
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| H A D | gpio-msic.c | 32 /* the offset for the mapping of global gpio pin to irq */
75 static int msic_gpio_to_ireg(unsigned offset) msic_gpio_to_ireg() argument
77 if (offset >= MSIC_NUM_GPIO) msic_gpio_to_ireg()
80 if (offset < 8) msic_gpio_to_ireg()
81 return INTEL_MSIC_GPIO0LV0CTLI - offset; msic_gpio_to_ireg()
82 if (offset < 16) msic_gpio_to_ireg()
83 return INTEL_MSIC_GPIO1LV0CTLI - offset + 8; msic_gpio_to_ireg()
84 if (offset < 20) msic_gpio_to_ireg()
85 return INTEL_MSIC_GPIO0HV0CTLI - offset + 16; msic_gpio_to_ireg()
87 return INTEL_MSIC_GPIO1HV0CTLI - offset + 20; msic_gpio_to_ireg()
90 static int msic_gpio_to_oreg(unsigned offset) msic_gpio_to_oreg() argument
92 if (offset >= MSIC_NUM_GPIO) msic_gpio_to_oreg()
95 if (offset < 8) msic_gpio_to_oreg()
96 return INTEL_MSIC_GPIO0LV0CTLO - offset; msic_gpio_to_oreg()
97 if (offset < 16) msic_gpio_to_oreg()
98 return INTEL_MSIC_GPIO1LV0CTLO - offset + 8; msic_gpio_to_oreg()
99 if (offset < 20) msic_gpio_to_oreg()
100 return INTEL_MSIC_GPIO0HV0CTLO - offset + 16; msic_gpio_to_oreg()
102 return INTEL_MSIC_GPIO1HV0CTLO - offset + 20; msic_gpio_to_oreg()
105 static int msic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) msic_gpio_direction_input() argument
109 reg = msic_gpio_to_oreg(offset); msic_gpio_direction_input()
117 unsigned offset, int value) msic_gpio_direction_output()
125 reg = msic_gpio_to_oreg(offset); msic_gpio_direction_output()
132 static int msic_gpio_get(struct gpio_chip *chip, unsigned offset) msic_gpio_get() argument
138 reg = msic_gpio_to_ireg(offset); msic_gpio_get()
149 static void msic_gpio_set(struct gpio_chip *chip, unsigned offset, int value) msic_gpio_set() argument
153 reg = msic_gpio_to_oreg(offset); msic_gpio_set()
180 static int msic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) msic_gpio_to_irq() argument
183 return mg->irq_base + offset; msic_gpio_to_irq()
195 int offset; msic_bus_sync_unlock() local
203 offset = __ffs(mg->trig_change_mask); msic_bus_sync_unlock()
205 reg = msic_gpio_to_ireg(offset); msic_bus_sync_unlock()
116 msic_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) msic_gpio_direction_output() argument
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| H A D | gpio-octeon.c | 22 * The address offset of the GPIO configuration register for a given
25 static unsigned int bit_cfg_reg(unsigned int offset) bit_cfg_reg() argument
31 if (offset < 16) bit_cfg_reg()
32 return 8 * offset; bit_cfg_reg()
34 return 8 * (offset - 16) + 0x100; bit_cfg_reg()
42 static int octeon_gpio_dir_in(struct gpio_chip *chip, unsigned offset) octeon_gpio_dir_in() argument
46 cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), 0); octeon_gpio_dir_in()
50 static void octeon_gpio_set(struct gpio_chip *chip, unsigned offset, int value) octeon_gpio_set() argument
53 u64 mask = 1ull << offset; octeon_gpio_set()
58 static int octeon_gpio_dir_out(struct gpio_chip *chip, unsigned offset, octeon_gpio_dir_out() argument
64 octeon_gpio_set(chip, offset, value); octeon_gpio_dir_out()
69 cvmx_write_csr(gpio->register_base + bit_cfg_reg(offset), cfgx.u64); octeon_gpio_dir_out()
73 static int octeon_gpio_get(struct gpio_chip *chip, unsigned offset) octeon_gpio_get() argument
78 return ((1ull << offset) & read_bits) != 0; octeon_gpio_get()
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| H A D | gpio-amdpt.c | 36 static int pt_gpio_request(struct gpio_chip *gc, unsigned offset) pt_gpio_request() argument
42 dev_dbg(gc->dev, "pt_gpio_request offset=%x\n", offset); pt_gpio_request()
47 if (using_pins & BIT(offset)) { pt_gpio_request()
49 offset); pt_gpio_request()
54 writel(using_pins | BIT(offset), pt_gpio->reg_base + PT_SYNC_REG); pt_gpio_request()
61 static void pt_gpio_free(struct gpio_chip *gc, unsigned offset) pt_gpio_free() argument
70 using_pins &= ~BIT(offset); pt_gpio_free()
75 dev_dbg(gc->dev, "pt_gpio_free offset=%x\n", offset); pt_gpio_free()
78 static void pt_gpio_set_value(struct gpio_chip *gc, unsigned offset, int value) pt_gpio_set_value() argument
84 dev_dbg(gc->dev, "pt_gpio_set_value offset=%x, value=%x\n", pt_gpio_set_value()
85 offset, value); pt_gpio_set_value()
90 data &= ~BIT(offset); pt_gpio_set_value()
92 data |= BIT(offset); pt_gpio_set_value()
98 static int pt_gpio_get_value(struct gpio_chip *gc, unsigned offset) pt_gpio_get_value() argument
109 if (data & BIT(offset)) pt_gpio_get_value()
116 data >>= offset; pt_gpio_get_value() local
119 dev_dbg(gc->dev, "pt_gpio_get_value offset=%x, value=%x\n", pt_gpio_get_value()
120 offset, data); pt_gpio_get_value()
125 static int pt_gpio_direction_input(struct gpio_chip *gc, unsigned offset) pt_gpio_direction_input() argument
131 dev_dbg(gc->dev, "pt_gpio_dirction_input offset=%x\n", offset); pt_gpio_direction_input()
136 data &= ~BIT(offset); pt_gpio_direction_input()
145 unsigned offset, int value) pt_gpio_direction_output()
151 dev_dbg(gc->dev, "pt_gpio_direction_output offset=%x, value=%x\n", pt_gpio_direction_output()
152 offset, value); pt_gpio_direction_output()
158 data |= BIT(offset); pt_gpio_direction_output()
160 data &= ~BIT(offset); pt_gpio_direction_output()
164 data |= BIT(offset); pt_gpio_direction_output()
144 pt_gpio_direction_output(struct gpio_chip *gc, unsigned offset, int value) pt_gpio_direction_output() argument
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| H A D | gpio-max730x.c | 51 static int max7301_direction_input(struct gpio_chip *chip, unsigned offset) max7301_direction_input() argument
59 offset += 4; max7301_direction_input()
60 offset_bits = (offset & 3) << 1; max7301_direction_input()
62 config = &ts->port_config[offset >> 2]; max7301_direction_input()
64 if (ts->input_pullup_active & BIT(offset)) max7301_direction_input()
74 ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config); max7301_direction_input()
81 static int __max7301_set(struct max7301 *ts, unsigned offset, int value) __max7301_set() argument
84 ts->out_level |= 1 << offset; __max7301_set()
85 return ts->write(ts->dev, 0x20 + offset, 0x01); __max7301_set()
87 ts->out_level &= ~(1 << offset); __max7301_set()
88 return ts->write(ts->dev, 0x20 + offset, 0x00); __max7301_set()
92 static int max7301_direction_output(struct gpio_chip *chip, unsigned offset, max7301_direction_output() argument
101 offset += 4; max7301_direction_output()
102 offset_bits = (offset & 3) << 1; max7301_direction_output()
104 config = &ts->port_config[offset >> 2]; max7301_direction_output()
111 ret = __max7301_set(ts, offset, value); max7301_direction_output()
114 ret = ts->write(ts->dev, 0x08 + (offset >> 2), *config); max7301_direction_output()
121 static int max7301_get(struct gpio_chip *chip, unsigned offset) max7301_get() argument
127 offset += 4; max7301_get()
131 config = (ts->port_config[offset >> 2] >> ((offset & 3) << 1)) max7301_get()
137 level = !!(ts->out_level & (1 << offset)); max7301_get()
142 level = ts->read(ts->dev, 0x20 + offset) & 0x01; max7301_get()
149 static void max7301_set(struct gpio_chip *chip, unsigned offset, int value) max7301_set() argument
154 offset += 4; max7301_set()
158 __max7301_set(ts, offset, value); max7301_set()
209 int offset = (i - 1) * 4 + j; __max730x_probe() local
210 ret = max7301_direction_input(&ts->chip, offset); __max730x_probe()
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| H A D | gpio-lpc18xx.c | 39 static void lpc18xx_gpio_set(struct gpio_chip *chip, unsigned offset, int value) lpc18xx_gpio_set() argument
42 writeb(value ? 1 : 0, gc->base + offset); lpc18xx_gpio_set()
45 static int lpc18xx_gpio_get(struct gpio_chip *chip, unsigned offset) lpc18xx_gpio_get() argument
48 return !!readb(gc->base + offset); lpc18xx_gpio_get()
51 static int lpc18xx_gpio_direction(struct gpio_chip *chip, unsigned offset, lpc18xx_gpio_direction() argument
58 port = offset / LPC18XX_PINS_PER_PORT; lpc18xx_gpio_direction()
59 pin = offset % LPC18XX_PINS_PER_PORT; lpc18xx_gpio_direction()
74 unsigned offset) lpc18xx_gpio_direction_input()
76 return lpc18xx_gpio_direction(chip, offset, false); lpc18xx_gpio_direction_input()
80 unsigned offset, int value) lpc18xx_gpio_direction_output()
82 lpc18xx_gpio_set(chip, offset, value); lpc18xx_gpio_direction_output()
83 return lpc18xx_gpio_direction(chip, offset, true); lpc18xx_gpio_direction_output()
73 lpc18xx_gpio_direction_input(struct gpio_chip *chip, unsigned offset) lpc18xx_gpio_direction_input() argument
79 lpc18xx_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) lpc18xx_gpio_direction_output() argument
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| H A D | gpio-wm8350.c | 36 static int wm8350_gpio_direction_in(struct gpio_chip *chip, unsigned offset) wm8350_gpio_direction_in() argument
42 1 << offset); wm8350_gpio_direction_in()
45 static int wm8350_gpio_get(struct gpio_chip *chip, unsigned offset) wm8350_gpio_get() argument
55 if (ret & (1 << offset)) wm8350_gpio_get()
61 static void wm8350_gpio_set(struct gpio_chip *chip, unsigned offset, int value) wm8350_gpio_set() argument
67 wm8350_set_bits(wm8350, WM8350_GPIO_LEVEL, 1 << offset); wm8350_gpio_set()
69 wm8350_clear_bits(wm8350, WM8350_GPIO_LEVEL, 1 << offset); wm8350_gpio_set()
73 unsigned offset, int value) wm8350_gpio_direction_out()
80 1 << offset); wm8350_gpio_direction_out()
85 wm8350_gpio_set(chip, offset, value); wm8350_gpio_direction_out()
90 static int wm8350_gpio_to_irq(struct gpio_chip *chip, unsigned offset) wm8350_gpio_to_irq() argument
98 return wm8350->irq_base + WM8350_IRQ_GPIO(offset); wm8350_gpio_to_irq()
72 wm8350_gpio_direction_out(struct gpio_chip *chip, unsigned offset, int value) wm8350_gpio_direction_out() argument
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| H A D | gpio-kempld.c | 66 static int kempld_gpio_get(struct gpio_chip *chip, unsigned offset) kempld_gpio_get() argument
72 return kempld_gpio_get_bit(pld, KEMPLD_GPIO_LVL_NUM(offset), offset); kempld_gpio_get()
75 static void kempld_gpio_set(struct gpio_chip *chip, unsigned offset, int value) kempld_gpio_set() argument
82 kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset), offset, value); kempld_gpio_set()
86 static int kempld_gpio_direction_input(struct gpio_chip *chip, unsigned offset) kempld_gpio_direction_input() argument
93 kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset), offset, 0); kempld_gpio_direction_input()
99 static int kempld_gpio_direction_output(struct gpio_chip *chip, unsigned offset, kempld_gpio_direction_output() argument
107 kempld_gpio_bitop(pld, KEMPLD_GPIO_LVL_NUM(offset), offset, value); kempld_gpio_direction_output()
108 kempld_gpio_bitop(pld, KEMPLD_GPIO_DIR_NUM(offset), offset, 1); kempld_gpio_direction_output()
114 static int kempld_gpio_get_direction(struct gpio_chip *chip, unsigned offset) kempld_gpio_get_direction() argument
120 return !kempld_gpio_get_bit(pld, KEMPLD_GPIO_DIR_NUM(offset), offset); kempld_gpio_get_direction()
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| H A D | gpio-rc5t583.c | 42 static int rc5t583_gpio_get(struct gpio_chip *gc, unsigned int offset) rc5t583_gpio_get() argument
53 return !!(val & BIT(offset)); rc5t583_gpio_get()
56 static void rc5t583_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) rc5t583_gpio_set() argument
61 rc5t583_set_bits(parent, RC5T583_GPIO_IOOUT, BIT(offset)); rc5t583_gpio_set()
63 rc5t583_clear_bits(parent, RC5T583_GPIO_IOOUT, BIT(offset)); rc5t583_gpio_set()
66 static int rc5t583_gpio_dir_input(struct gpio_chip *gc, unsigned int offset) rc5t583_gpio_dir_input() argument
72 ret = rc5t583_clear_bits(parent, RC5T583_GPIO_IOSEL, BIT(offset)); rc5t583_gpio_dir_input()
77 return rc5t583_clear_bits(parent, RC5T583_GPIO_PGSEL, BIT(offset)); rc5t583_gpio_dir_input()
80 static int rc5t583_gpio_dir_output(struct gpio_chip *gc, unsigned offset, rc5t583_gpio_dir_output() argument
87 rc5t583_gpio_set(gc, offset, value); rc5t583_gpio_dir_output()
88 ret = rc5t583_set_bits(parent, RC5T583_GPIO_IOSEL, BIT(offset)); rc5t583_gpio_dir_output()
93 return rc5t583_clear_bits(parent, RC5T583_GPIO_PGSEL, BIT(offset)); rc5t583_gpio_dir_output()
96 static int rc5t583_gpio_to_irq(struct gpio_chip *gc, unsigned offset) rc5t583_gpio_to_irq() argument
100 if (offset < RC5T583_MAX_GPIO) rc5t583_gpio_to_irq()
102 RC5T583_IRQ_GPIO0 + offset; rc5t583_gpio_to_irq()
106 static void rc5t583_gpio_free(struct gpio_chip *gc, unsigned offset) rc5t583_gpio_free() argument
111 rc5t583_set_bits(parent, RC5T583_GPIO_PGSEL, BIT(offset)); rc5t583_gpio_free()
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| H A D | gpio-stmpe.c | 44 static int stmpe_gpio_get(struct gpio_chip *chip, unsigned offset) stmpe_gpio_get() argument
48 u8 reg = stmpe->regs[STMPE_IDX_GPMR_LSB] - (offset / 8); stmpe_gpio_get()
49 u8 mask = 1 << (offset % 8); stmpe_gpio_get()
59 static void stmpe_gpio_set(struct gpio_chip *chip, unsigned offset, int val) stmpe_gpio_set() argument
64 u8 reg = stmpe->regs[which] - (offset / 8); stmpe_gpio_set()
65 u8 mask = 1 << (offset % 8); stmpe_gpio_set()
78 unsigned offset, int val) stmpe_gpio_direction_output()
82 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); stmpe_gpio_direction_output()
83 u8 mask = 1 << (offset % 8); stmpe_gpio_direction_output()
85 stmpe_gpio_set(chip, offset, val); stmpe_gpio_direction_output()
91 unsigned offset) stmpe_gpio_direction_input()
95 u8 reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); stmpe_gpio_direction_input()
96 u8 mask = 1 << (offset % 8); stmpe_gpio_direction_input()
101 static int stmpe_gpio_request(struct gpio_chip *chip, unsigned offset) stmpe_gpio_request() argument
106 if (stmpe_gpio->norequest_mask & (1 << offset)) stmpe_gpio_request()
109 return stmpe_set_altfunc(stmpe, 1 << offset, STMPE_BLOCK_GPIO); stmpe_gpio_request()
127 int offset = d->hwirq; stmpe_gpio_irq_set_type() local
128 int regoffset = offset / 8; stmpe_gpio_irq_set_type()
129 int mask = 1 << (offset % 8); stmpe_gpio_irq_set_type()
197 int offset = d->hwirq; stmpe_gpio_irq_mask() local
198 int regoffset = offset / 8; stmpe_gpio_irq_mask()
199 int mask = 1 << (offset % 8); stmpe_gpio_irq_mask()
208 int offset = d->hwirq; stmpe_gpio_irq_unmask() local
209 int regoffset = offset / 8; stmpe_gpio_irq_unmask()
210 int mask = 1 << (offset % 8); stmpe_gpio_irq_unmask()
217 unsigned offset, unsigned gpio) stmpe_dbg_show_one()
221 const char *label = gpiochip_is_requested(gc, offset); stmpe_dbg_show_one()
223 bool val = !!stmpe_gpio_get(gc, offset); stmpe_dbg_show_one()
224 u8 dir_reg = stmpe->regs[STMPE_IDX_GPDR_LSB] - (offset / 8); stmpe_dbg_show_one()
225 u8 mask = 1 << (offset % 8); stmpe_dbg_show_one()
239 u8 edge_det_reg = stmpe->regs[STMPE_IDX_GPEDR_MSB] + num_banks - 1 - (offset / 8); stmpe_dbg_show_one()
240 u8 rise_reg = stmpe->regs[STMPE_IDX_GPRER_LSB] - (offset / 8); stmpe_dbg_show_one()
241 u8 fall_reg = stmpe->regs[STMPE_IDX_GPFER_LSB] - (offset / 8); stmpe_dbg_show_one()
242 u8 irqen_reg = stmpe->regs[STMPE_IDX_IEGPIOR_LSB] - (offset / 8); stmpe_dbg_show_one()
77 stmpe_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int val) stmpe_gpio_direction_output() argument
90 stmpe_gpio_direction_input(struct gpio_chip *chip, unsigned offset) stmpe_gpio_direction_input() argument
215 stmpe_dbg_show_one(struct seq_file *s, struct gpio_chip *gc, unsigned offset, unsigned gpio) stmpe_dbg_show_one() argument
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| H A D | gpio-timberdale.c | 54 unsigned offset, bool enabled) timbgpio_update_bit()
60 reg = ioread32(tgpio->membase + offset); timbgpio_update_bit()
67 iowrite32(reg, tgpio->membase + offset); timbgpio_update_bit()
99 static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset) timbgpio_to_irq() argument
106 return tgpio->irq_base + offset; timbgpio_to_irq()
115 int offset = d->irq - tgpio->irq_base; timbgpio_irq_disable() local
119 tgpio->last_ier &= ~(1UL << offset); timbgpio_irq_disable()
127 int offset = d->irq - tgpio->irq_base; timbgpio_irq_enable() local
131 tgpio->last_ier |= 1UL << offset; timbgpio_irq_enable()
139 int offset = d->irq - tgpio->irq_base; timbgpio_irq_type() local
145 if (offset < 0 || offset > tgpio->gpio.ngpio) timbgpio_irq_type()
158 bflr &= ~(1 << offset); timbgpio_irq_type()
159 flr &= ~(1 << offset); timbgpio_irq_type()
161 lvr |= 1 << offset; timbgpio_irq_type()
163 lvr &= ~(1 << offset); timbgpio_irq_type()
171 flr |= 1 << offset; timbgpio_irq_type()
172 bflr |= 1 << offset; timbgpio_irq_type()
175 bflr &= ~(1 << offset); timbgpio_irq_type()
176 flr |= 1 << offset; timbgpio_irq_type()
178 lvr &= ~(1 << offset); timbgpio_irq_type()
180 lvr |= 1 << offset; timbgpio_irq_type()
188 iowrite32(1 << offset, tgpio->membase + TGPIO_ICR); timbgpio_irq_type()
200 int offset; timbgpio_irq() local
212 for_each_set_bit(offset, &ipr, tgpio->gpio.ngpio) timbgpio_irq()
213 generic_handle_irq(timbgpio_to_irq(&tgpio->gpio, offset)); timbgpio_irq()
53 timbgpio_update_bit(struct gpio_chip *gpio, unsigned index, unsigned offset, bool enabled) timbgpio_update_bit() argument
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| H A D | gpio-vr41xx.c | 86 #define giu_read(offset) readw(giu_base + (offset))
87 #define giu_write(offset, value) writew((value), giu_base + (offset))
93 static inline u16 giu_set(u16 offset, u16 set) giu_set() argument
97 data = giu_read(offset); giu_set()
99 giu_write(offset, data); giu_set()
104 static inline u16 giu_clear(u16 offset, u16 clear) giu_clear() argument
108 data = giu_read(offset); giu_clear()
110 giu_write(offset, data); giu_clear()
335 u16 offset, mask, reg; giu_set_direction() local
342 offset = GIUIOSELL; giu_set_direction()
345 offset = GIUIOSELH; giu_set_direction()
349 offset = GIUPODATEN; giu_set_direction()
354 offset = GIUPODATH; giu_set_direction()
358 offset = GIUPODATH; giu_set_direction()
369 reg = giu_read(offset); giu_set_direction()
374 giu_write(offset, reg); giu_set_direction()
449 u16 offset, mask, reg; vr41xx_gpio_set() local
456 offset = GIUPIODL; vr41xx_gpio_set()
459 offset = GIUPIODH; vr41xx_gpio_set()
462 offset = GIUPODATL; vr41xx_gpio_set()
465 offset = GIUPODATH; vr41xx_gpio_set()
471 reg = giu_read(offset); vr41xx_gpio_set()
476 giu_write(offset, reg); vr41xx_gpio_set()
482 static int vr41xx_gpio_direction_input(struct gpio_chip *chip, unsigned offset) vr41xx_gpio_direction_input() argument
484 return giu_set_direction(chip, offset, GPIO_INPUT); vr41xx_gpio_direction_input()
487 static int vr41xx_gpio_direction_output(struct gpio_chip *chip, unsigned offset, vr41xx_gpio_direction_output() argument
490 vr41xx_gpio_set(chip, offset, value); vr41xx_gpio_direction_output()
492 return giu_set_direction(chip, offset, GPIO_OUTPUT); vr41xx_gpio_direction_output()
495 static int vr41xx_gpio_to_irq(struct gpio_chip *chip, unsigned offset) vr41xx_gpio_to_irq() argument
497 if (offset >= chip->ngpio) vr41xx_gpio_to_irq()
500 return GIU_IRQ_BASE + offset; vr41xx_gpio_to_irq()
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| H A D | gpio-amd8111.c | 80 static int amd_gpio_request(struct gpio_chip *chip, unsigned offset) amd_gpio_request() argument
84 agp->orig[offset] = ioread8(agp->pm + AMD_REG_GPIO(offset)) & amd_gpio_request()
87 dev_dbg(&agp->pdev->dev, "Requested gpio %d, data %x\n", offset, agp->orig[offset]); amd_gpio_request()
92 static void amd_gpio_free(struct gpio_chip *chip, unsigned offset) amd_gpio_free() argument
96 dev_dbg(&agp->pdev->dev, "Freed gpio %d, data %x\n", offset, agp->orig[offset]); amd_gpio_free()
98 iowrite8(agp->orig[offset], agp->pm + AMD_REG_GPIO(offset)); amd_gpio_free()
101 static void amd_gpio_set(struct gpio_chip *chip, unsigned offset, int value) amd_gpio_set() argument
108 temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); amd_gpio_set()
110 iowrite8(temp, agp->pm + AMD_REG_GPIO(offset)); amd_gpio_set()
113 dev_dbg(&agp->pdev->dev, "Setting gpio %d, value %d, reg=%02x\n", offset, !!value, temp); amd_gpio_set()
116 static int amd_gpio_get(struct gpio_chip *chip, unsigned offset) amd_gpio_get() argument
121 temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); amd_gpio_get()
123 dev_dbg(&agp->pdev->dev, "Getting gpio %d, reg=%02x\n", offset, temp); amd_gpio_get()
128 static int amd_gpio_dirout(struct gpio_chip *chip, unsigned offset, int value) amd_gpio_dirout() argument
135 temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); amd_gpio_dirout()
137 iowrite8(temp, agp->pm + AMD_REG_GPIO(offset)); amd_gpio_dirout()
140 dev_dbg(&agp->pdev->dev, "Dirout gpio %d, value %d, reg=%02x\n", offset, !!value, temp); amd_gpio_dirout()
145 static int amd_gpio_dirin(struct gpio_chip *chip, unsigned offset) amd_gpio_dirin() argument
152 temp = ioread8(agp->pm + AMD_REG_GPIO(offset)); amd_gpio_dirin()
154 iowrite8(temp, agp->pm + AMD_REG_GPIO(offset)); amd_gpio_dirin()
157 dev_dbg(&agp->pdev->dev, "Dirin gpio %d, reg=%02x\n", offset, temp); amd_gpio_dirin()
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| H A D | gpio-tz1090-pdc.c | 40 * @reg: Base of registers, offset for this GPIO bank
71 unsigned int offset) tz1090_pdc_gpio_direction_input()
79 value |= BIT(offset); tz1090_pdc_gpio_direction_input()
87 unsigned int offset, tz1090_pdc_gpio_direction_output()
96 if (offset < 6) { tz1090_pdc_gpio_direction_output()
99 value |= BIT(offset); tz1090_pdc_gpio_direction_output()
101 value &= ~BIT(offset); tz1090_pdc_gpio_direction_output()
106 value &= ~BIT(offset); tz1090_pdc_gpio_direction_output()
113 static int tz1090_pdc_gpio_get(struct gpio_chip *chip, unsigned int offset) tz1090_pdc_gpio_get() argument
116 return pdc_read(priv, REG_SOC_GPIO_STATUS) & BIT(offset); tz1090_pdc_gpio_get()
119 static void tz1090_pdc_gpio_set(struct gpio_chip *chip, unsigned int offset, tz1090_pdc_gpio_set() argument
127 if (offset >= 6) tz1090_pdc_gpio_set()
133 value |= BIT(offset); tz1090_pdc_gpio_set()
135 value &= ~BIT(offset); tz1090_pdc_gpio_set()
140 static int tz1090_pdc_gpio_to_irq(struct gpio_chip *chip, unsigned int offset) tz1090_pdc_gpio_to_irq() argument
143 unsigned int syswake = offset - GPIO_PDC_IRQ_FIRST; tz1090_pdc_gpio_to_irq()
70 tz1090_pdc_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) tz1090_pdc_gpio_direction_input() argument
86 tz1090_pdc_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int output_value) tz1090_pdc_gpio_direction_output() argument
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| H A D | gpio-mc9s08dz60.c | 38 static void mc9s_gpio_to_reg_and_bit(int offset, u8 *reg, u8 *bit) mc9s_gpio_to_reg_and_bit() argument
40 *reg = 0x20 + offset / GPIO_NUM_PER_GROUP; mc9s_gpio_to_reg_and_bit()
41 *bit = offset % GPIO_NUM_PER_GROUP; mc9s_gpio_to_reg_and_bit()
44 static int mc9s08dz60_get_value(struct gpio_chip *gc, unsigned offset) mc9s08dz60_get_value() argument
50 mc9s_gpio_to_reg_and_bit(offset, ®, &bit); mc9s08dz60_get_value()
56 static int mc9s08dz60_set(struct mc9s08dz60 *mc9s, unsigned offset, int val) mc9s08dz60_set() argument
61 mc9s_gpio_to_reg_and_bit(offset, ®, &bit); mc9s08dz60_set()
76 static void mc9s08dz60_set_value(struct gpio_chip *gc, unsigned offset, int val) mc9s08dz60_set_value() argument
80 mc9s08dz60_set(mc9s, offset, val); mc9s08dz60_set_value()
84 unsigned offset, int val) mc9s08dz60_direction_output()
88 return mc9s08dz60_set(mc9s, offset, val); mc9s08dz60_direction_output()
83 mc9s08dz60_direction_output(struct gpio_chip *gc, unsigned offset, int val) mc9s08dz60_direction_output() argument
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| /linux-4.4.14/arch/unicore32/kernel/ |
| H A D | module.c | 45 s32 offset; apply_relocate() local
47 offset = ELF32_R_SYM(rel->r_info); apply_relocate()
48 if (offset < 0 || offset > apply_relocate()
56 sym = ((Elf32_Sym *)symsec->sh_addr) + offset; apply_relocate()
61 "section %d reloc %d offset %d size %d\n", apply_relocate()
81 offset = (*(u32 *)loc & 0x00ffffff) << 2; apply_relocate()
82 if (offset & 0x02000000) apply_relocate()
83 offset -= 0x04000000; apply_relocate()
85 offset += sym->st_value - loc; apply_relocate()
86 if (offset & 3 || apply_relocate()
87 offset <= (s32)0xfe000000 || apply_relocate()
88 offset >= (s32)0x02000000) { apply_relocate()
96 offset >>= 2; apply_relocate()
99 *(u32 *)loc |= offset & 0x00ffffff; apply_relocate()
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| H A D | gpio.c | 53 static int puv3_gpio_get(struct gpio_chip *chip, unsigned offset) puv3_gpio_get() argument
55 return readl(GPIO_GPLR) & GPIO_GPIO(offset); puv3_gpio_get()
58 static void puv3_gpio_set(struct gpio_chip *chip, unsigned offset, int value) puv3_gpio_set() argument
61 writel(GPIO_GPIO(offset), GPIO_GPSR); puv3_gpio_set()
63 writel(GPIO_GPIO(offset), GPIO_GPCR); puv3_gpio_set()
66 static int puv3_direction_input(struct gpio_chip *chip, unsigned offset) puv3_direction_input() argument
71 writel(readl(GPIO_GPDR) & ~GPIO_GPIO(offset), GPIO_GPDR); puv3_direction_input()
76 static int puv3_direction_output(struct gpio_chip *chip, unsigned offset, puv3_direction_output() argument
82 puv3_gpio_set(chip, offset, value); puv3_direction_output()
83 writel(readl(GPIO_GPDR) | GPIO_GPIO(offset), GPIO_GPDR); puv3_direction_output()
|
| /linux-4.4.14/drivers/xen/xen-pciback/ |
| H A D | conf_space.h | 14 typedef void *(*conf_field_init) (struct pci_dev *dev, int offset);
15 typedef void (*conf_field_reset) (struct pci_dev *dev, int offset, void *data);
16 typedef void (*conf_field_free) (struct pci_dev *dev, int offset, void *data);
18 typedef int (*conf_dword_write) (struct pci_dev *dev, int offset, u32 value,
20 typedef int (*conf_word_write) (struct pci_dev *dev, int offset, u16 value,
22 typedef int (*conf_byte_write) (struct pci_dev *dev, int offset, u8 value,
24 typedef int (*conf_dword_read) (struct pci_dev *dev, int offset, u32 *value,
26 typedef int (*conf_word_read) (struct pci_dev *dev, int offset, u16 *value,
28 typedef int (*conf_byte_read) (struct pci_dev *dev, int offset, u8 *value,
36 unsigned int offset; member in struct:config_field
69 #define OFFSET(cfg_entry) ((cfg_entry)->base_offset+(cfg_entry)->field->offset)
76 unsigned int offset);
98 unsigned int offset) xen_pcibk_config_add_fields_offset()
102 err = xen_pcibk_config_add_field_offset(dev, &field[i], offset); xen_pcibk_config_add_fields_offset()
110 int xen_pcibk_read_config_byte(struct pci_dev *dev, int offset, u8 *value,
112 int xen_pcibk_read_config_word(struct pci_dev *dev, int offset, u16 *value,
114 int xen_pcibk_read_config_dword(struct pci_dev *dev, int offset, u32 *value,
116 int xen_pcibk_write_config_byte(struct pci_dev *dev, int offset, u8 value,
118 int xen_pcibk_write_config_word(struct pci_dev *dev, int offset, u16 value,
120 int xen_pcibk_write_config_dword(struct pci_dev *dev, int offset, u32 value,
96 xen_pcibk_config_add_fields_offset(struct pci_dev *dev, const struct config_field *field, unsigned int offset) xen_pcibk_config_add_fields_offset() argument
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| H A D | conf_space_header.c | 32 static void *command_init(struct pci_dev *dev, int offset) command_init() argument
49 static int command_read(struct pci_dev *dev, int offset, u16 *value, void *data) command_read() argument
51 int ret = pci_read_config_word(dev, offset, value); command_read()
60 static int command_write(struct pci_dev *dev, int offset, u16 value, void *data) command_write() argument
125 err = pci_read_config_word(dev, offset, &val); command_write()
132 return pci_write_config_word(dev, offset, value); command_write()
135 static int rom_write(struct pci_dev *dev, int offset, u32 value, void *data) rom_write() argument
152 pci_read_config_dword(dev, offset, &tmpval); rom_write()
155 pci_write_config_dword(dev, offset, bar->val); rom_write()
169 static int bar_write(struct pci_dev *dev, int offset, u32 value, void *data) bar_write() argument
186 pci_read_config_dword(dev, offset, &tmpval); bar_write()
189 pci_write_config_dword(dev, offset, bar->val); bar_write()
197 static int bar_read(struct pci_dev *dev, int offset, u32 * value, void *data) bar_read() argument
213 struct pci_bar_info *bar_info, int offset, read_dev_bar()
219 if (offset == PCI_ROM_ADDRESS || offset == PCI_ROM_ADDRESS1) read_dev_bar()
222 pos = (offset - PCI_BASE_ADDRESS_0) / 4; read_dev_bar()
238 static void *bar_init(struct pci_dev *dev, int offset) bar_init() argument
245 read_dev_bar(dev, bar, offset, ~0); bar_init()
251 static void *rom_init(struct pci_dev *dev, int offset) rom_init() argument
258 read_dev_bar(dev, bar, offset, ~PCI_ROM_ADDRESS_ENABLE); rom_init()
264 static void bar_reset(struct pci_dev *dev, int offset, void *data) bar_reset() argument
271 static void bar_release(struct pci_dev *dev, int offset, void *data) bar_release() argument
276 static int xen_pcibk_read_vendor(struct pci_dev *dev, int offset, xen_pcibk_read_vendor() argument
284 static int xen_pcibk_read_device(struct pci_dev *dev, int offset, xen_pcibk_read_device() argument
292 static int interrupt_read(struct pci_dev *dev, int offset, u8 * value, interrupt_read() argument
300 static int bist_write(struct pci_dev *dev, int offset, u8 value, void *data) bist_write() argument
305 err = pci_read_config_byte(dev, offset, &cur_value); bist_write()
311 err = pci_write_config_byte(dev, offset, value); bist_write()
319 .offset = PCI_VENDOR_ID,
324 .offset = PCI_DEVICE_ID,
329 .offset = PCI_COMMAND,
337 .offset = PCI_INTERRUPT_LINE,
342 .offset = PCI_INTERRUPT_PIN,
348 .offset = PCI_CACHE_LINE_SIZE,
354 .offset = PCI_LATENCY_TIMER,
359 .offset = PCI_BIST,
369 .offset = reg_offset, \
380 .offset = reg_offset, \
212 read_dev_bar(struct pci_dev *dev, struct pci_bar_info *bar_info, int offset, u32 len_mask) read_dev_bar() argument
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| H A D | conf_space_capability.c | 25 .offset = PCI_CAP_LIST_ID,
67 static int vpd_address_write(struct pci_dev *dev, int offset, u16 value, vpd_address_write() argument
74 return pci_write_config_word(dev, offset, value); vpd_address_write()
79 .offset = PCI_VPD_ADDR,
85 .offset = PCI_VPD_DATA,
93 static int pm_caps_read(struct pci_dev *dev, int offset, u16 *value, pm_caps_read() argument
99 err = pci_read_config_word(dev, offset, &real_value); pm_caps_read()
113 static int pm_ctrl_write(struct pci_dev *dev, int offset, u16 new_value, pm_ctrl_write() argument
120 err = pci_read_config_word(dev, offset, &old_value); pm_ctrl_write()
130 err = pci_write_config_word(dev, offset, new_value); pm_ctrl_write()
148 static void *pm_ctrl_init(struct pci_dev *dev, int offset) pm_ctrl_init() argument
153 err = pci_read_config_word(dev, offset, &value); pm_ctrl_init()
159 err = pci_write_config_word(dev, offset, value); pm_ctrl_init()
168 .offset = PCI_PM_PMC,
173 .offset = PCI_PM_CTRL,
180 .offset = PCI_PM_PPB_EXTENSIONS,
185 .offset = PCI_PM_DATA_REGISTER,
|
| H A D | conf_space.c | 26 (struct pci_dev *dev, int offset, type value, void *data) \
28 return pci_##op##_config_##size(dev, offset, value); \
41 int offset, u32 *value) conf_space_read()
51 ret = field->u.b.read(dev, offset, (u8 *) value, conf_space_read()
56 ret = field->u.w.read(dev, offset, (u16 *) value, conf_space_read()
61 ret = field->u.dw.read(dev, offset, value, entry->data); conf_space_read()
69 int offset, u32 value) conf_space_write()
77 ret = field->u.b.write(dev, offset, (u8) value, conf_space_write()
82 ret = field->u.w.write(dev, offset, (u16) value, conf_space_write()
87 ret = field->u.dw.write(dev, offset, value, conf_space_write()
104 static inline int valid_request(int offset, int size) valid_request() argument
107 if ((size == 1 || size == 2 || size == 4) && (offset % size) == 0) valid_request()
113 int offset) merge_value()
115 if (offset >= 0) { merge_value()
116 new_val_mask <<= (offset * 8); merge_value()
117 new_val <<= (offset * 8); merge_value()
119 new_val_mask >>= (offset * -8); merge_value()
120 new_val >>= (offset * -8); merge_value()
144 int xen_pcibk_config_read(struct pci_dev *dev, int offset, int size, xen_pcibk_config_read() argument
158 pci_name(dev), size, offset); xen_pcibk_config_read()
160 if (!valid_request(offset, size)) { xen_pcibk_config_read()
168 err = pci_read_config_byte(dev, offset, (u8 *) &value); xen_pcibk_config_read()
171 err = pci_read_config_word(dev, offset, (u16 *) &value); xen_pcibk_config_read()
174 err = pci_read_config_dword(dev, offset, &value); xen_pcibk_config_read()
181 req_start = offset; xen_pcibk_config_read()
182 req_end = offset + size; xen_pcibk_config_read()
202 pci_name(dev), size, offset, value); xen_pcibk_config_read()
208 int xen_pcibk_config_write(struct pci_dev *dev, int offset, int size, u32 value) xen_pcibk_config_write() argument
220 pci_name(dev), size, offset, value); xen_pcibk_config_write()
222 if (!valid_request(offset, size)) xen_pcibk_config_write()
228 req_start = offset; xen_pcibk_config_write()
229 req_end = offset + size; xen_pcibk_config_write()
268 err = pci_write_config_byte(dev, offset, xen_pcibk_config_write()
272 err = pci_write_config_word(dev, offset, xen_pcibk_config_write()
276 err = pci_write_config_dword(dev, offset, xen_pcibk_config_write()
283 "read-only configuration space field at offset" xen_pcibk_config_write()
289 "device obtained from lspci.\n", offset, size); xen_pcibk_config_write()
397 dev_dbg(&dev->dev, "added config field at offset 0x%02x\n", xen_pcibk_config_add_field_offset()
39 conf_space_read(struct pci_dev *dev, const struct config_field_entry *entry, int offset, u32 *value) conf_space_read() argument
67 conf_space_write(struct pci_dev *dev, const struct config_field_entry *entry, int offset, u32 value) conf_space_write() argument
112 merge_value(u32 val, u32 new_val, u32 new_val_mask, int offset) merge_value() argument
|
| /linux-4.4.14/drivers/reset/ |
| H A D | reset-zynq.c | 29 u32 offset; member in struct:zynq_reset_data
41 int offset = id % BITS_PER_LONG; zynq_reset_assert() local
43 pr_debug("%s: %s reset bank %u offset %u\n", KBUILD_MODNAME, __func__, zynq_reset_assert()
44 bank, offset); zynq_reset_assert()
47 priv->offset + (bank * 4), zynq_reset_assert()
48 BIT(offset), zynq_reset_assert()
49 BIT(offset)); zynq_reset_assert()
58 int offset = id % BITS_PER_LONG; zynq_reset_deassert() local
60 pr_debug("%s: %s reset bank %u offset %u\n", KBUILD_MODNAME, __func__, zynq_reset_deassert()
61 bank, offset); zynq_reset_deassert()
64 priv->offset + (bank * 4), zynq_reset_deassert()
65 BIT(offset), zynq_reset_deassert()
66 ~BIT(offset)); zynq_reset_deassert()
75 int offset = id % BITS_PER_LONG; zynq_reset_status() local
79 pr_debug("%s: %s reset bank %u offset %u\n", KBUILD_MODNAME, __func__, zynq_reset_status()
80 bank, offset); zynq_reset_status()
82 ret = regmap_read(priv->slcr, priv->offset + (bank * 4), ®); zynq_reset_status()
86 return !!(reg & BIT(offset)); zynq_reset_status()
118 priv->offset = res->start; zynq_reset_probe()
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| H A D | init.c | 41 init->offset, init_exec(init) ? \
363 return bit_I.offset; init_table()
375 init_table_(struct nvbios_init *init, u16 offset, const char *name) init_table_() argument
380 if (len >= offset + 2) { init_table_()
381 data = nvbios_rd16(bios, data + offset); init_table_()
459 init_xlat_(struct nvbios_init *init, u8 index, u8 offset) init_xlat_() argument
466 return nvbios_rd08(bios, data + offset); init_xlat_()
545 * 0x6808b0 address, and then flip the offset by 8. init_tmds_reg()
583 u8 opcode = nvbios_rd08(init->bios, init->offset); init_reserved()
597 cont(" 0x%02x", nvbios_rd08(init->bios, init->offset + i)); init_reserved()
599 init->offset += length; init_reserved()
610 init->offset = 0x0000; init_done()
621 u16 port = nvbios_rd16(bios, init->offset + 1); init_io_restrict_prog()
622 u8 index = nvbios_rd08(bios, init->offset + 3); init_io_restrict_prog()
623 u8 mask = nvbios_rd08(bios, init->offset + 4); init_io_restrict_prog()
624 u8 shift = nvbios_rd08(bios, init->offset + 5); init_io_restrict_prog()
625 u8 count = nvbios_rd08(bios, init->offset + 6); init_io_restrict_prog()
626 u32 reg = nvbios_rd32(bios, init->offset + 7); init_io_restrict_prog()
632 init->offset += 11; init_io_restrict_prog()
636 u32 data = nvbios_rd32(bios, init->offset); init_io_restrict_prog()
645 init->offset += 4; init_io_restrict_prog()
658 u8 count = nvbios_rd08(bios, init->offset + 1); init_repeat()
662 init->offset += 2; init_repeat()
664 init->repeat = init->offset; init_repeat()
665 init->repend = init->offset; init_repeat()
667 init->offset = init->repeat; init_repeat()
672 init->offset = init->repend; init_repeat()
684 u16 port = nvbios_rd16(bios, init->offset + 1); init_io_restrict_pll()
685 u8 index = nvbios_rd08(bios, init->offset + 3); init_io_restrict_pll()
686 u8 mask = nvbios_rd08(bios, init->offset + 4); init_io_restrict_pll()
687 u8 shift = nvbios_rd08(bios, init->offset + 5); init_io_restrict_pll()
688 s8 iofc = nvbios_rd08(bios, init->offset + 6); init_io_restrict_pll()
689 u8 count = nvbios_rd08(bios, init->offset + 7); init_io_restrict_pll()
690 u32 reg = nvbios_rd32(bios, init->offset + 8); init_io_restrict_pll()
696 init->offset += 12; init_io_restrict_pll()
700 u32 freq = nvbios_rd16(bios, init->offset) * 10; init_io_restrict_pll()
711 init->offset += 2; init_io_restrict_pll()
724 init->offset += 1; init_end_repeat()
727 init->repend = init->offset; init_end_repeat()
728 init->offset = 0; init_end_repeat()
740 u32 reg = nvbios_rd32(bios, init->offset + 1); init_copy()
741 u8 shift = nvbios_rd08(bios, init->offset + 5); init_copy()
742 u8 smask = nvbios_rd08(bios, init->offset + 6); init_copy()
743 u16 port = nvbios_rd16(bios, init->offset + 7); init_copy()
744 u8 index = nvbios_rd08(bios, init->offset + 9); init_copy()
745 u8 mask = nvbios_rd08(bios, init->offset + 10); init_copy()
752 init->offset += 11; init_copy()
767 init->offset += 1; init_not()
779 u8 cond = nvbios_rd08(bios, init->offset + 1); init_io_flag_condition()
782 init->offset += 2; init_io_flag_condition()
797 u8 cond = nvbios_rd08(bios, init->offset + 1); init_dp_condition()
798 u8 unkn = nvbios_rd08(bios, init->offset + 2); init_dp_condition()
803 init->offset += 3; init_dp_condition()
844 u8 index = nvbios_rd08(bios, init->offset + 1); init_io_mask_or()
849 init->offset += 2; init_io_mask_or()
863 u8 index = nvbios_rd08(bios, init->offset + 1); init_io_or()
868 init->offset += 2; init_io_or()
882 u32 reg = nvbios_rd32(bios, init->offset + 1); init_andn_reg()
883 u32 mask = nvbios_rd32(bios, init->offset + 5); init_andn_reg()
886 init->offset += 9; init_andn_reg()
899 u32 reg = nvbios_rd32(bios, init->offset + 1); init_or_reg()
900 u32 mask = nvbios_rd32(bios, init->offset + 5); init_or_reg()
903 init->offset += 9; init_or_reg()
916 u32 creg = nvbios_rd32(bios, init->offset + 1); init_idx_addr_latched()
917 u32 dreg = nvbios_rd32(bios, init->offset + 5); init_idx_addr_latched()
918 u32 mask = nvbios_rd32(bios, init->offset + 9); init_idx_addr_latched()
919 u32 data = nvbios_rd32(bios, init->offset + 13); init_idx_addr_latched()
920 u8 count = nvbios_rd08(bios, init->offset + 17); init_idx_addr_latched()
924 init->offset += 18; init_idx_addr_latched()
927 u8 iaddr = nvbios_rd08(bios, init->offset + 0); init_idx_addr_latched()
928 u8 idata = nvbios_rd08(bios, init->offset + 1); init_idx_addr_latched()
931 init->offset += 2; init_idx_addr_latched()
946 u16 port = nvbios_rd16(bios, init->offset + 1); init_io_restrict_pll2()
947 u8 index = nvbios_rd08(bios, init->offset + 3); init_io_restrict_pll2()
948 u8 mask = nvbios_rd08(bios, init->offset + 4); init_io_restrict_pll2()
949 u8 shift = nvbios_rd08(bios, init->offset + 5); init_io_restrict_pll2()
950 u8 count = nvbios_rd08(bios, init->offset + 6); init_io_restrict_pll2()
951 u32 reg = nvbios_rd32(bios, init->offset + 7); init_io_restrict_pll2()
957 init->offset += 11; init_io_restrict_pll2()
961 u32 freq = nvbios_rd32(bios, init->offset); init_io_restrict_pll2()
968 init->offset += 4; init_io_restrict_pll2()
981 u32 reg = nvbios_rd32(bios, init->offset + 1); init_pll2()
982 u32 freq = nvbios_rd32(bios, init->offset + 5); init_pll2()
985 init->offset += 9; init_pll2()
998 u8 index = nvbios_rd08(bios, init->offset + 1); init_i2c_byte()
999 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; init_i2c_byte()
1000 u8 count = nvbios_rd08(bios, init->offset + 3); init_i2c_byte()
1003 init->offset += 4; init_i2c_byte()
1006 u8 reg = nvbios_rd08(bios, init->offset + 0); init_i2c_byte()
1007 u8 mask = nvbios_rd08(bios, init->offset + 1); init_i2c_byte()
1008 u8 data = nvbios_rd08(bios, init->offset + 2); init_i2c_byte()
1012 init->offset += 3; init_i2c_byte()
1029 u8 index = nvbios_rd08(bios, init->offset + 1); init_zm_i2c_byte()
1030 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; init_zm_i2c_byte()
1031 u8 count = nvbios_rd08(bios, init->offset + 3); init_zm_i2c_byte()
1034 init->offset += 4; init_zm_i2c_byte()
1037 u8 reg = nvbios_rd08(bios, init->offset + 0); init_zm_i2c_byte()
1038 u8 data = nvbios_rd08(bios, init->offset + 1); init_zm_i2c_byte()
1041 init->offset += 2; init_zm_i2c_byte()
1055 u8 index = nvbios_rd08(bios, init->offset + 1); init_zm_i2c()
1056 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; init_zm_i2c()
1057 u8 count = nvbios_rd08(bios, init->offset + 3); init_zm_i2c()
1061 init->offset += 4; init_zm_i2c()
1064 data[i] = nvbios_rd08(bios, init->offset); init_zm_i2c()
1066 init->offset++; init_zm_i2c()
1089 u8 tmds = nvbios_rd08(bios, init->offset + 1); init_tmds()
1090 u8 addr = nvbios_rd08(bios, init->offset + 2); init_tmds()
1091 u8 mask = nvbios_rd08(bios, init->offset + 3); init_tmds()
1092 u8 data = nvbios_rd08(bios, init->offset + 4); init_tmds()
1097 init->offset += 5; init_tmds()
1115 u8 tmds = nvbios_rd08(bios, init->offset + 1); init_zm_tmds_group()
1116 u8 count = nvbios_rd08(bios, init->offset + 2); init_zm_tmds_group()
1120 init->offset += 3; init_zm_tmds_group()
1123 u8 addr = nvbios_rd08(bios, init->offset + 0); init_zm_tmds_group()
1124 u8 data = nvbios_rd08(bios, init->offset + 1); init_zm_tmds_group()
1127 init->offset += 2; init_zm_tmds_group()
1142 u8 addr0 = nvbios_rd08(bios, init->offset + 1); init_cr_idx_adr_latch()
1143 u8 addr1 = nvbios_rd08(bios, init->offset + 2); init_cr_idx_adr_latch()
1144 u8 base = nvbios_rd08(bios, init->offset + 3); init_cr_idx_adr_latch()
1145 u8 count = nvbios_rd08(bios, init->offset + 4); init_cr_idx_adr_latch()
1149 init->offset += 5; init_cr_idx_adr_latch()
1153 u8 data = nvbios_rd08(bios, init->offset); init_cr_idx_adr_latch()
1156 init->offset += 1; init_cr_idx_adr_latch()
1172 u8 addr = nvbios_rd08(bios, init->offset + 1); init_cr()
1173 u8 mask = nvbios_rd08(bios, init->offset + 2); init_cr()
1174 u8 data = nvbios_rd08(bios, init->offset + 3); init_cr()
1178 init->offset += 4; init_cr()
1192 u8 addr = nvbios_rd08(bios, init->offset + 1); init_zm_cr()
1193 u8 data = nvbios_rd08(bios, init->offset + 2); init_zm_cr()
1196 init->offset += 3; init_zm_cr()
1209 u8 count = nvbios_rd08(bios, init->offset + 1); init_zm_cr_group()
1212 init->offset += 2; init_zm_cr_group()
1215 u8 addr = nvbios_rd08(bios, init->offset + 0); init_zm_cr_group()
1216 u8 data = nvbios_rd08(bios, init->offset + 1); init_zm_cr_group()
1219 init->offset += 2; init_zm_cr_group()
1233 u8 cond = nvbios_rd08(bios, init->offset + 1); init_condition_time()
1234 u8 retry = nvbios_rd08(bios, init->offset + 2); init_condition_time()
1238 init->offset += 3; init_condition_time()
1260 u16 msec = nvbios_rd16(bios, init->offset + 1); init_ltime()
1263 init->offset += 3; init_ltime()
1277 u32 base = nvbios_rd32(bios, init->offset + 1); init_zm_reg_sequence()
1278 u8 count = nvbios_rd08(bios, init->offset + 5); init_zm_reg_sequence()
1281 init->offset += 6; init_zm_reg_sequence()
1284 u32 data = nvbios_rd32(bios, init->offset); init_zm_reg_sequence()
1287 init->offset += 4; init_zm_reg_sequence()
1302 u32 reg = nvbios_rd32(bios, init->offset + 1); init_pll_indirect()
1303 u16 addr = nvbios_rd16(bios, init->offset + 5); init_pll_indirect()
1308 init->offset += 7; init_pll_indirect()
1321 u32 reg = nvbios_rd32(bios, init->offset + 1); init_zm_reg_indirect()
1322 u16 addr = nvbios_rd16(bios, init->offset + 5); init_zm_reg_indirect()
1327 init->offset += 7; init_zm_reg_indirect()
1340 u16 addr = nvbios_rd16(bios, init->offset + 1); init_sub_direct()
1346 save = init->offset; init_sub_direct()
1347 init->offset = addr; init_sub_direct()
1352 init->offset = save; init_sub_direct()
1355 init->offset += 3; init_sub_direct()
1366 u16 offset = nvbios_rd16(bios, init->offset + 1); init_jump() local
1368 trace("JUMP\t0x%04x\n", offset); init_jump()
1371 init->offset = offset; init_jump()
1373 init->offset += 3; init_jump()
1384 u8 index = nvbios_rd08(bios, init->offset + 1); init_i2c_if()
1385 u8 addr = nvbios_rd08(bios, init->offset + 2); init_i2c_if()
1386 u8 reg = nvbios_rd08(bios, init->offset + 3); init_i2c_if()
1387 u8 mask = nvbios_rd08(bios, init->offset + 4); init_i2c_if()
1388 u8 data = nvbios_rd08(bios, init->offset + 5); init_i2c_if()
1393 init->offset += 6; init_i2c_if()
1411 u32 sreg = nvbios_rd32(bios, init->offset + 1); init_copy_nv_reg()
1412 u8 shift = nvbios_rd08(bios, init->offset + 5); init_copy_nv_reg()
1413 u32 smask = nvbios_rd32(bios, init->offset + 6); init_copy_nv_reg()
1414 u32 sxor = nvbios_rd32(bios, init->offset + 10); init_copy_nv_reg()
1415 u32 dreg = nvbios_rd32(bios, init->offset + 14); init_copy_nv_reg()
1416 u32 dmask = nvbios_rd32(bios, init->offset + 18); init_copy_nv_reg()
1423 init->offset += 22; init_copy_nv_reg()
1437 u16 port = nvbios_rd16(bios, init->offset + 1); init_zm_index_io()
1438 u8 index = nvbios_rd08(bios, init->offset + 3); init_zm_index_io()
1439 u8 data = nvbios_rd08(bios, init->offset + 4); init_zm_index_io()
1442 init->offset += 5; init_zm_index_io()
1457 init->offset += 1; init_compute_mem()
1473 u32 reg = nvbios_rd32(bios, init->offset + 1); init_reset()
1474 u32 data1 = nvbios_rd32(bios, init->offset + 5); init_reset()
1475 u32 data2 = nvbios_rd32(bios, init->offset + 9); init_reset()
1479 init->offset += 13; init_reset()
1513 init->offset += 1; init_configure_mem()
1562 init->offset += 1; init_configure_clk()
1596 init->offset += 1; init_configure_preinit()
1619 u16 port = nvbios_rd16(bios, init->offset + 1); init_io()
1620 u8 mask = nvbios_rd16(bios, init->offset + 3); init_io()
1621 u8 data = nvbios_rd16(bios, init->offset + 4); init_io()
1625 init->offset += 5; init_io()
1659 u8 index = nvbios_rd08(bios, init->offset + 1); init_sub()
1666 save = init->offset; init_sub()
1667 init->offset = addr; init_sub()
1672 init->offset = save; init_sub()
1675 init->offset += 2; init_sub()
1686 u8 mask = nvbios_rd08(bios, init->offset + 1); init_ram_condition()
1687 u8 value = nvbios_rd08(bios, init->offset + 2); init_ram_condition()
1691 init->offset += 3; init_ram_condition()
1705 u32 reg = nvbios_rd32(bios, init->offset + 1); init_nv_reg()
1706 u32 mask = nvbios_rd32(bios, init->offset + 5); init_nv_reg()
1707 u32 data = nvbios_rd32(bios, init->offset + 9); init_nv_reg()
1710 init->offset += 13; init_nv_reg()
1723 u8 macro = nvbios_rd08(bios, init->offset + 1); init_macro()
1736 init->offset += 2; init_macro()
1747 init->offset += 1; init_resume()
1759 u32 mask = nvbios_rd32(bios, init->offset + 1); init_strap_condition()
1760 u32 value = nvbios_rd32(bios, init->offset + 5); init_strap_condition()
1763 init->offset += 9; init_strap_condition()
1777 u16 usec = nvbios_rd16(bios, init->offset + 1); init_time()
1780 init->offset += 3; init_time()
1798 u8 cond = nvbios_rd08(bios, init->offset + 1); init_condition()
1801 init->offset += 2; init_condition()
1815 u8 cond = nvbios_rd08(bios, init->offset + 1); init_io_condition()
1818 init->offset += 2; init_io_condition()
1832 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_reg16()
1833 u16 data = nvbios_rd16(bios, init->offset + 5); init_zm_reg16()
1836 init->offset += 7; init_zm_reg16()
1849 u16 port = nvbios_rd16(bios, init->offset + 1); init_index_io()
1850 u8 index = nvbios_rd16(bios, init->offset + 3); init_index_io()
1851 u8 mask = nvbios_rd08(bios, init->offset + 4); init_index_io()
1852 u8 data = nvbios_rd08(bios, init->offset + 5); init_index_io()
1857 init->offset += 6; init_index_io()
1871 u32 reg = nvbios_rd32(bios, init->offset + 1); init_pll()
1872 u32 freq = nvbios_rd16(bios, init->offset + 5) * 10; init_pll()
1875 init->offset += 7; init_pll()
1888 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_reg()
1889 u32 data = nvbios_rd32(bios, init->offset + 5); init_zm_reg()
1892 init->offset += 9; init_zm_reg()
1908 u8 type = nvbios_rd08(bios, init->offset + 1); init_ram_restrict_pll()
1914 init->offset += 2; init_ram_restrict_pll()
1917 u32 freq = nvbios_rd32(bios, init->offset); init_ram_restrict_pll()
1926 init->offset += 4; init_ram_restrict_pll()
1940 init->offset += 1; init_gpio()
1954 u32 addr = nvbios_rd32(bios, init->offset + 1); init_ram_restrict_zm_reg_group()
1955 u8 incr = nvbios_rd08(bios, init->offset + 5); init_ram_restrict_zm_reg_group()
1956 u8 num = nvbios_rd08(bios, init->offset + 6); init_ram_restrict_zm_reg_group()
1963 init->offset += 7; init_ram_restrict_zm_reg_group()
1968 u32 data = nvbios_rd32(bios, init->offset); init_ram_restrict_zm_reg_group()
1977 init->offset += 4; init_ram_restrict_zm_reg_group()
1992 u32 sreg = nvbios_rd32(bios, init->offset + 1); init_copy_zm_reg()
1993 u32 dreg = nvbios_rd32(bios, init->offset + 5); init_copy_zm_reg()
1996 init->offset += 9; init_copy_zm_reg()
2009 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_reg_group()
2010 u8 count = nvbios_rd08(bios, init->offset + 5); init_zm_reg_group()
2013 init->offset += 6; init_zm_reg_group()
2016 u32 data = nvbios_rd32(bios, init->offset); init_zm_reg_group()
2019 init->offset += 4; init_zm_reg_group()
2031 u32 saddr = nvbios_rd32(bios, init->offset + 1); init_xlat()
2032 u8 sshift = nvbios_rd08(bios, init->offset + 5); init_xlat()
2033 u8 smask = nvbios_rd08(bios, init->offset + 6); init_xlat()
2034 u8 index = nvbios_rd08(bios, init->offset + 7); init_xlat()
2035 u32 daddr = nvbios_rd32(bios, init->offset + 8); init_xlat()
2036 u32 dmask = nvbios_rd32(bios, init->offset + 12); init_xlat()
2037 u8 shift = nvbios_rd08(bios, init->offset + 16); init_xlat()
2044 init->offset += 17; init_xlat()
2059 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_mask_add()
2060 u32 mask = nvbios_rd32(bios, init->offset + 5); init_zm_mask_add()
2061 u32 add = nvbios_rd32(bios, init->offset + 9); init_zm_mask_add()
2065 init->offset += 13; init_zm_mask_add()
2080 u32 addr = nvbios_rd32(bios, init->offset + 1); init_auxch()
2081 u8 count = nvbios_rd08(bios, init->offset + 5); init_auxch()
2084 init->offset += 6; init_auxch()
2087 u8 mask = nvbios_rd08(bios, init->offset + 0); init_auxch()
2088 u8 data = nvbios_rd08(bios, init->offset + 1); init_auxch()
2092 init->offset += 2; init_auxch()
2104 u32 addr = nvbios_rd32(bios, init->offset + 1); init_zm_auxch()
2105 u8 count = nvbios_rd08(bios, init->offset + 5); init_zm_auxch()
2108 init->offset += 6; init_zm_auxch()
2111 u8 data = nvbios_rd08(bios, init->offset + 0); init_zm_auxch()
2114 init->offset += 1; init_zm_auxch()
2126 u8 index = nvbios_rd08(bios, init->offset + 1); init_i2c_long_if()
2127 u8 addr = nvbios_rd08(bios, init->offset + 2) >> 1; init_i2c_long_if()
2128 u8 reglo = nvbios_rd08(bios, init->offset + 3); init_i2c_long_if()
2129 u8 reghi = nvbios_rd08(bios, init->offset + 4); init_i2c_long_if()
2130 u8 mask = nvbios_rd08(bios, init->offset + 5); init_i2c_long_if()
2131 u8 data = nvbios_rd08(bios, init->offset + 6); init_i2c_long_if()
2137 init->offset += 7; init_i2c_long_if()
2167 u8 count = nvbios_rd08(bios, init->offset + 1); init_gpio_ne()
2172 init->offset += 2; init_gpio_ne()
2174 for (i = init->offset; i < init->offset + count; i++) init_gpio_ne()
2180 for (i = init->offset; i < init->offset + count; i++) { init_gpio_ne()
2186 if (i == (init->offset + count)) { init_gpio_ne()
2195 init->offset += count; init_gpio_ne()
2278 while (init->offset) { nvbios_exec()
2279 u8 opcode = nvbios_rd08(init->bios, init->offset); nvbios_exec()
2305 .offset = data, nvbios_init()
2321 .offset = data, nvbios_init()
|
| /linux-4.4.14/drivers/pinctrl/spear/ |
| H A D | pinctrl-plgpio.c | 57 * p2o: function ptr for pin to offset conversion. This is required only for
58 * machines where mapping b/w pin and offset is not 1-to-1.
59 * o2p: function ptr for offset to pin conversion. This is required only for
60 * machines where mapping b/w pin and offset is not 1-to-1.
71 int (*o2p)(int offset); /* offset_to_pin */
82 u32 offset = PIN_OFFSET(pin); is_plgpio_set() local
86 return !!(val & (1 << offset)); is_plgpio_set()
91 u32 offset = PIN_OFFSET(pin); plgpio_reg_set() local
95 writel_relaxed(val | (1 << offset), reg_off); plgpio_reg_set()
100 u32 offset = PIN_OFFSET(pin); plgpio_reg_reset() local
104 writel_relaxed(val & ~(1 << offset), reg_off); plgpio_reg_reset()
108 static int plgpio_direction_input(struct gpio_chip *chip, unsigned offset) plgpio_direction_input() argument
113 /* get correct offset for "offset" pin */ plgpio_direction_input()
115 offset = plgpio->p2o(offset); plgpio_direction_input()
116 if (offset == -1) plgpio_direction_input()
121 plgpio_reg_set(plgpio->base, offset, plgpio->regs.dir); plgpio_direction_input()
127 static int plgpio_direction_output(struct gpio_chip *chip, unsigned offset, plgpio_direction_output() argument
132 unsigned dir_offset = offset, wdata_offset = offset, tmp; plgpio_direction_output()
134 /* get correct offset for "offset" pin */ plgpio_direction_output()
136 tmp = plgpio->p2o(offset); plgpio_direction_output()
160 static int plgpio_get_value(struct gpio_chip *chip, unsigned offset) plgpio_get_value() argument
164 if (offset >= chip->ngpio) plgpio_get_value()
167 /* get correct offset for "offset" pin */ plgpio_get_value()
169 offset = plgpio->p2o(offset); plgpio_get_value()
170 if (offset == -1) plgpio_get_value()
174 return is_plgpio_set(plgpio->base, offset, plgpio->regs.rdata); plgpio_get_value()
177 static void plgpio_set_value(struct gpio_chip *chip, unsigned offset, int value) plgpio_set_value() argument
181 if (offset >= chip->ngpio) plgpio_set_value()
184 /* get correct offset for "offset" pin */ plgpio_set_value()
186 offset = plgpio->p2o(offset); plgpio_set_value()
187 if (offset == -1) plgpio_set_value()
192 plgpio_reg_set(plgpio->base, offset, plgpio->regs.wdata); plgpio_set_value()
194 plgpio_reg_reset(plgpio->base, offset, plgpio->regs.wdata); plgpio_set_value()
197 static int plgpio_request(struct gpio_chip *chip, unsigned offset) plgpio_request() argument
200 int gpio = chip->base + offset; plgpio_request()
204 if (offset >= chip->ngpio) plgpio_request()
223 ret = plgpio_direction_input(chip, offset); plgpio_request()
227 /* get correct offset for "offset" pin */ plgpio_request()
229 offset = plgpio->p2o(offset); plgpio_request()
230 if (offset == -1) { plgpio_request()
237 plgpio_reg_set(plgpio->base, offset, plgpio->regs.enb); plgpio_request()
249 static void plgpio_free(struct gpio_chip *chip, unsigned offset) plgpio_free() argument
252 int gpio = chip->base + offset; plgpio_free()
255 if (offset >= chip->ngpio) plgpio_free()
261 /* get correct offset for "offset" pin */ plgpio_free()
263 offset = plgpio->p2o(offset); plgpio_free()
264 if (offset == -1) plgpio_free()
269 plgpio_reg_reset(plgpio->base, offset, plgpio->regs.enb); plgpio_free()
284 int offset = d->hwirq; plgpio_irq_disable() local
287 /* get correct offset for "offset" pin */ plgpio_irq_disable()
289 offset = plgpio->p2o(offset); plgpio_irq_disable()
290 if (offset == -1) plgpio_irq_disable()
295 plgpio_reg_set(plgpio->base, offset, plgpio->regs.ie); plgpio_irq_disable()
303 int offset = d->hwirq; plgpio_irq_enable() local
306 /* get correct offset for "offset" pin */ plgpio_irq_enable()
308 offset = plgpio->p2o(offset); plgpio_irq_enable()
309 if (offset == -1) plgpio_irq_enable()
314 plgpio_reg_reset(plgpio->base, offset, plgpio->regs.ie); plgpio_irq_enable()
322 int offset = d->hwirq; plgpio_irq_set_type() local
326 if (offset >= plgpio->chip.ngpio) plgpio_irq_set_type()
340 reg_off = REG_OFFSET(plgpio->base, plgpio->regs.eit, offset); plgpio_irq_set_type()
343 offset = PIN_OFFSET(offset); plgpio_irq_set_type()
345 writel_relaxed(val | (1 << offset), reg_off); plgpio_irq_set_type()
347 writel_relaxed(val & ~(1 << offset), reg_off); plgpio_irq_set_type()
364 int regs_count, count, pin, offset, i = 0; plgpio_irq_handler() local
392 for_each_set_bit(offset, &pending, MAX_GPIO_PER_REG) { plgpio_irq_handler()
393 /* get correct pin for "offset" */ plgpio_irq_handler()
395 pin = plgpio->o2p(offset); plgpio_irq_handler()
399 pin = offset; plgpio_irq_handler()
411 * pin to offset and offset to pin converter functions
414 * for different plgpio pins. For example: for pin 27, bit offset is 23, pin
415 * 28-33 are not supported, pin 95 has offset bit 95, bit 100 has offset bit 1
419 int offset = pin; spear310_p2o() local
422 offset += 4; spear310_p2o()
424 offset = -1; spear310_p2o()
426 offset -= 2; spear310_p2o()
428 offset = 101 - pin; spear310_p2o()
430 offset = -1; spear310_p2o()
432 return offset; spear310_p2o()
435 static int spear310_o2p(int offset) spear310_o2p() argument
437 if (offset <= 3) spear310_o2p()
438 return 101 - offset; spear310_o2p()
439 else if (offset <= 31) spear310_o2p()
440 return offset - 4; spear310_o2p()
442 return offset + 2; spear310_o2p()
|
| /linux-4.4.14/arch/xtensa/include/asm/ |
| H A D | io.h | 32 static inline void __iomem *ioremap_nocache(unsigned long offset, ioremap_nocache() argument
35 if (offset >= XCHAL_KIO_PADDR ioremap_nocache()
36 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE) ioremap_nocache()
37 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_BYPASS_VADDR); ioremap_nocache()
42 static inline void __iomem *ioremap_cache(unsigned long offset, ioremap_cache() argument
45 if (offset >= XCHAL_KIO_PADDR ioremap_cache()
46 && offset - XCHAL_KIO_PADDR < XCHAL_KIO_SIZE) ioremap_cache()
47 return (void*)(offset-XCHAL_KIO_PADDR+XCHAL_KIO_CACHED_VADDR); ioremap_cache()
56 static inline void __iomem *ioremap(unsigned long offset, unsigned long size) ioremap() argument
58 return ioremap_nocache(offset, size); ioremap()
|
| /linux-4.4.14/drivers/pinctrl/ |
| H A D | pinctrl-coh901.c | 89 * its context. It calculates the port offset from the given pin
90 * offset, muliplies by the port stride and adds the register offset
220 static int u300_gpio_get(struct gpio_chip *chip, unsigned offset) u300_gpio_get() argument
224 return readl(U300_PIN_REG(offset, dir)) & U300_PIN_BIT(offset); u300_gpio_get()
227 static void u300_gpio_set(struct gpio_chip *chip, unsigned offset, int value) u300_gpio_set() argument
235 val = readl(U300_PIN_REG(offset, dor)); u300_gpio_set()
237 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, dor)); u300_gpio_set()
239 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, dor)); u300_gpio_set()
244 static int u300_gpio_direction_input(struct gpio_chip *chip, unsigned offset) u300_gpio_direction_input() argument
251 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_direction_input()
253 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1)); u300_gpio_direction_input()
254 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_direction_input()
259 static int u300_gpio_direction_output(struct gpio_chip *chip, unsigned offset, u300_gpio_direction_output() argument
268 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_direction_output()
274 ((offset & 0x07) << 1)); u300_gpio_direction_output()
278 ((offset & 0x07) << 1)); u300_gpio_direction_output()
280 << ((offset & 0x07) << 1)); u300_gpio_direction_output()
281 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_direction_output()
283 u300_gpio_set(chip, offset, value); u300_gpio_direction_output()
290 unsigned offset, u300_gpio_config_get()
299 biasmode = !!(readl(U300_PIN_REG(offset, per)) & U300_PIN_BIT(offset)); u300_gpio_config_get()
302 drmode = readl(U300_PIN_REG(offset, pcr)); u300_gpio_config_get()
303 drmode &= (U300_GPIO_PXPCR_PIN_MODE_MASK << ((offset & 0x07) << 1)); u300_gpio_config_get()
304 drmode >>= ((offset & 0x07) << 1); u300_gpio_config_get()
348 int u300_gpio_config_set(struct gpio_chip *chip, unsigned offset, u300_gpio_config_set() argument
359 val = readl(U300_PIN_REG(offset, per)); u300_gpio_config_set()
360 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); u300_gpio_config_set()
363 val = readl(U300_PIN_REG(offset, per)); u300_gpio_config_set()
364 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); u300_gpio_config_set()
367 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
369 << ((offset & 0x07) << 1)); u300_gpio_config_set()
371 << ((offset & 0x07) << 1)); u300_gpio_config_set()
372 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
375 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
377 << ((offset & 0x07) << 1)); u300_gpio_config_set()
379 << ((offset & 0x07) << 1)); u300_gpio_config_set()
380 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
383 val = readl(U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
385 << ((offset & 0x07) << 1)); u300_gpio_config_set()
387 << ((offset & 0x07) << 1)); u300_gpio_config_set()
388 writel(val, U300_PIN_REG(offset, pcr)); u300_gpio_config_set()
410 static void u300_toggle_trigger(struct u300_gpio *gpio, unsigned offset) u300_toggle_trigger() argument
414 val = readl(U300_PIN_REG(offset, icr)); u300_toggle_trigger()
416 if (u300_gpio_get(&gpio->chip, offset)) { u300_toggle_trigger()
418 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); u300_toggle_trigger()
420 offset); u300_toggle_trigger()
423 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); u300_toggle_trigger()
425 offset); u300_toggle_trigger()
434 int offset = d->hwirq; u300_gpio_irq_type() local
446 offset); u300_gpio_irq_type()
447 port->toggle_edge_mode |= U300_PIN_BIT(offset); u300_gpio_irq_type()
448 u300_toggle_trigger(gpio, offset); u300_gpio_irq_type()
451 offset); u300_gpio_irq_type()
452 val = readl(U300_PIN_REG(offset, icr)); u300_gpio_irq_type()
453 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); u300_gpio_irq_type()
454 port->toggle_edge_mode &= ~U300_PIN_BIT(offset); u300_gpio_irq_type()
457 offset); u300_gpio_irq_type()
458 val = readl(U300_PIN_REG(offset, icr)); u300_gpio_irq_type()
459 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, icr)); u300_gpio_irq_type()
460 port->toggle_edge_mode &= ~U300_PIN_BIT(offset); u300_gpio_irq_type()
471 int offset = d->hwirq; u300_gpio_irq_enable() local
475 dev_dbg(gpio->dev, "enable IRQ for hwirq %lu on port %s, offset %d\n", u300_gpio_irq_enable()
476 d->hwirq, port->name, offset); u300_gpio_irq_enable()
478 val = readl(U300_PIN_REG(offset, ien)); u300_gpio_irq_enable()
479 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, ien)); u300_gpio_irq_enable()
487 int offset = d->hwirq; u300_gpio_irq_disable() local
492 val = readl(U300_PIN_REG(offset, ien)); u300_gpio_irq_disable()
493 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, ien)); u300_gpio_irq_disable()
528 int offset = pinoffset + irqoffset; u300_gpio_irq_handler() local
529 int pin_irq = irq_find_mapping(chip->irqdomain, offset); u300_gpio_irq_handler()
532 pin_irq, offset); u300_gpio_irq_handler()
538 if (port->toggle_edge_mode & U300_PIN_BIT(offset)) u300_gpio_irq_handler()
539 u300_toggle_trigger(gpio, offset); u300_gpio_irq_handler()
547 int offset, u300_gpio_init_pin()
552 u300_gpio_direction_output(&gpio->chip, offset, conf->outval); u300_gpio_init_pin()
555 u300_gpio_config_set(&gpio->chip, offset, u300_gpio_init_pin()
559 u300_gpio_config_set(&gpio->chip, offset, u300_gpio_init_pin()
563 offset, conf->outval); u300_gpio_init_pin()
565 u300_gpio_direction_input(&gpio->chip, offset); u300_gpio_init_pin()
568 u300_gpio_set(&gpio->chip, offset, 0); u300_gpio_init_pin()
571 u300_gpio_config_set(&gpio->chip, offset, conf->bias_mode); u300_gpio_init_pin()
574 offset, conf->bias_mode); u300_gpio_init_pin()
586 int offset = (i*8) + j; u300_gpio_init_coh901571() local
589 u300_gpio_init_pin(gpio, offset, conf); u300_gpio_init_coh901571()
600 unsigned int offset; member in struct:coh901_pinpair
604 #define COH901_PINRANGE(a, b) { .offset = a, .pin_base = b }
731 p->offset, p->pin_base, 1); u300_gpio_probe()
289 u300_gpio_config_get(struct gpio_chip *chip, unsigned offset, unsigned long *config) u300_gpio_config_get() argument
546 u300_gpio_init_pin(struct u300_gpio *gpio, int offset, const struct u300_gpio_confdata *conf) u300_gpio_init_pin() argument
|
| /linux-4.4.14/drivers/oprofile/ |
| H A D | oprofile_files.c | 31 size_t count, loff_t *offset) timeout_read()
34 buf, count, offset); timeout_read()
39 size_t count, loff_t *offset) timeout_write()
44 if (*offset) timeout_write()
68 static ssize_t depth_read(struct file *file, char __user *buf, size_t count, loff_t *offset) depth_read() argument
71 offset); depth_read()
75 static ssize_t depth_write(struct file *file, char const __user *buf, size_t count, loff_t *offset) depth_write() argument
80 if (*offset) depth_write()
105 static ssize_t pointer_size_read(struct file *file, char __user *buf, size_t count, loff_t *offset) pointer_size_read() argument
107 return oprofilefs_ulong_to_user(sizeof(void *), buf, count, offset); pointer_size_read()
117 static ssize_t cpu_type_read(struct file *file, char __user *buf, size_t count, loff_t *offset) cpu_type_read() argument
119 return oprofilefs_str_to_user(oprofile_ops.cpu_type, buf, count, offset); cpu_type_read()
129 static ssize_t enable_read(struct file *file, char __user *buf, size_t count, loff_t *offset) enable_read() argument
131 return oprofilefs_ulong_to_user(oprofile_started, buf, count, offset); enable_read()
135 static ssize_t enable_write(struct file *file, char const __user *buf, size_t count, loff_t *offset) enable_write() argument
140 if (*offset) enable_write()
166 static ssize_t dump_write(struct file *file, char const __user *buf, size_t count, loff_t *offset) dump_write() argument
30 timeout_read(struct file *file, char __user *buf, size_t count, loff_t *offset) timeout_read() argument
38 timeout_write(struct file *file, char const __user *buf, size_t count, loff_t *offset) timeout_write() argument
|
| /linux-4.4.14/drivers/net/wireless/ath/ath6kl/ |
| H A D | bmi.c | 118 u32 offset; ath6kl_bmi_read() local
143 offset = 0; ath6kl_bmi_read()
144 memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid)); ath6kl_bmi_read()
145 offset += sizeof(cid); ath6kl_bmi_read()
146 memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr)); ath6kl_bmi_read()
147 offset += sizeof(addr); ath6kl_bmi_read()
148 memcpy(&(ar->bmi.cmd_buf[offset]), &rx_len, sizeof(rx_len)); ath6kl_bmi_read()
149 offset += sizeof(len); ath6kl_bmi_read()
151 ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset); ath6kl_bmi_read()
174 u32 offset; ath6kl_bmi_write() local
215 offset = 0; ath6kl_bmi_write()
216 memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid)); ath6kl_bmi_write()
217 offset += sizeof(cid); ath6kl_bmi_write()
218 memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr)); ath6kl_bmi_write()
219 offset += sizeof(addr); ath6kl_bmi_write()
220 memcpy(&(ar->bmi.cmd_buf[offset]), &tx_len, sizeof(tx_len)); ath6kl_bmi_write()
221 offset += sizeof(tx_len); ath6kl_bmi_write()
222 memcpy(&(ar->bmi.cmd_buf[offset]), src, tx_len); ath6kl_bmi_write()
223 offset += tx_len; ath6kl_bmi_write()
225 ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset); ath6kl_bmi_write()
241 u32 offset; ath6kl_bmi_execute() local
259 offset = 0; ath6kl_bmi_execute()
260 memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid)); ath6kl_bmi_execute()
261 offset += sizeof(cid); ath6kl_bmi_execute()
262 memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr)); ath6kl_bmi_execute()
263 offset += sizeof(addr); ath6kl_bmi_execute()
264 memcpy(&(ar->bmi.cmd_buf[offset]), param, sizeof(*param)); ath6kl_bmi_execute()
265 offset += sizeof(*param); ath6kl_bmi_execute()
267 ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset); ath6kl_bmi_execute()
288 u32 offset; ath6kl_bmi_set_app_start() local
305 offset = 0; ath6kl_bmi_set_app_start()
306 memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid)); ath6kl_bmi_set_app_start()
307 offset += sizeof(cid); ath6kl_bmi_set_app_start()
308 memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr)); ath6kl_bmi_set_app_start()
309 offset += sizeof(addr); ath6kl_bmi_set_app_start()
311 ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset); ath6kl_bmi_set_app_start()
324 u32 offset; ath6kl_bmi_reg_read() local
341 offset = 0; ath6kl_bmi_reg_read()
342 memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid)); ath6kl_bmi_reg_read()
343 offset += sizeof(cid); ath6kl_bmi_reg_read()
344 memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr)); ath6kl_bmi_reg_read()
345 offset += sizeof(addr); ath6kl_bmi_reg_read()
347 ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset); ath6kl_bmi_reg_read()
367 u32 offset; ath6kl_bmi_reg_write() local
386 offset = 0; ath6kl_bmi_reg_write()
387 memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid)); ath6kl_bmi_reg_write()
388 offset += sizeof(cid); ath6kl_bmi_reg_write()
389 memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr)); ath6kl_bmi_reg_write()
390 offset += sizeof(addr); ath6kl_bmi_reg_write()
391 memcpy(&(ar->bmi.cmd_buf[offset]), ¶m, sizeof(param)); ath6kl_bmi_reg_write()
392 offset += sizeof(param); ath6kl_bmi_reg_write()
394 ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset); ath6kl_bmi_reg_write()
407 u32 offset; ath6kl_bmi_lz_data() local
432 offset = 0; ath6kl_bmi_lz_data()
433 memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid)); ath6kl_bmi_lz_data()
434 offset += sizeof(cid); ath6kl_bmi_lz_data()
435 memcpy(&(ar->bmi.cmd_buf[offset]), &tx_len, sizeof(tx_len)); ath6kl_bmi_lz_data()
436 offset += sizeof(tx_len); ath6kl_bmi_lz_data()
437 memcpy(&(ar->bmi.cmd_buf[offset]), &buf[len - len_remain], ath6kl_bmi_lz_data()
439 offset += tx_len; ath6kl_bmi_lz_data()
441 ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset); ath6kl_bmi_lz_data()
458 u32 offset; ath6kl_bmi_lz_stream_start() local
477 offset = 0; ath6kl_bmi_lz_stream_start()
478 memcpy(&(ar->bmi.cmd_buf[offset]), &cid, sizeof(cid)); ath6kl_bmi_lz_stream_start()
479 offset += sizeof(cid); ath6kl_bmi_lz_stream_start()
480 memcpy(&(ar->bmi.cmd_buf[offset]), &addr, sizeof(addr)); ath6kl_bmi_lz_stream_start()
481 offset += sizeof(addr); ath6kl_bmi_lz_stream_start()
483 ret = ath6kl_hif_bmi_write(ar, ar->bmi.cmd_buf, offset); ath6kl_bmi_lz_stream_start()
|
| /linux-4.4.14/arch/m68k/coldfire/ |
| H A D | gpio.c | 117 static int mcfgpio_direction_input(struct gpio_chip *chip, unsigned offset) mcfgpio_direction_input() argument
119 return __mcfgpio_direction_input(offset); mcfgpio_direction_input()
122 static int mcfgpio_get_value(struct gpio_chip *chip, unsigned offset) mcfgpio_get_value() argument
124 return __mcfgpio_get_value(offset); mcfgpio_get_value()
127 static int mcfgpio_direction_output(struct gpio_chip *chip, unsigned offset, mcfgpio_direction_output() argument
130 return __mcfgpio_direction_output(offset, value); mcfgpio_direction_output()
133 static void mcfgpio_set_value(struct gpio_chip *chip, unsigned offset, mcfgpio_set_value() argument
136 __mcfgpio_set_value(offset, value); mcfgpio_set_value()
139 static int mcfgpio_request(struct gpio_chip *chip, unsigned offset) mcfgpio_request() argument
141 return __mcfgpio_request(offset); mcfgpio_request()
144 static void mcfgpio_free(struct gpio_chip *chip, unsigned offset) mcfgpio_free() argument
146 __mcfgpio_free(offset); mcfgpio_free()
149 static int mcfgpio_to_irq(struct gpio_chip *chip, unsigned offset) mcfgpio_to_irq() argument
152 if ((offset >= MCFGPIO_IRQ_MIN) && (offset < MCFGPIO_IRQ_MAX)) mcfgpio_to_irq()
154 if (offset < MCFGPIO_IRQ_MAX) mcfgpio_to_irq()
156 return MCFGPIO_IRQ_VECBASE + offset; mcfgpio_to_irq()
|
| /linux-4.4.14/drivers/usb/gadget/ |
| H A D | u_f.h | 26 size_t offset = (groupname##__next + align_mask) & ~align_mask;\
28 groupname##__next = offset + size; \
29 offset; \
36 size_t offset = (groupname##__next + align_mask) & ~align_mask;\
38 groupname##__next = offset + size; \
39 offset; \
|
| /linux-4.4.14/arch/x86/include/asm/ |
| H A D | pci-direct.h | 9 extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
10 extern u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset);
11 extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset);
12 extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val);
13 extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val);
14 extern void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val);
|
| H A D | iosf_mbi.h | 83 * @offset: register address offset
89 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr);
95 * @offset: register address offset
101 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr);
107 * @offset: register address offset
114 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask);
124 int iosf_mbi_read(u8 port, u8 opcode, u32 offset, u32 *mdr) iosf_mbi_read() argument
131 int iosf_mbi_write(u8 port, u8 opcode, u32 offset, u32 mdr) iosf_mbi_write() argument
138 int iosf_mbi_modify(u8 port, u8 opcode, u32 offset, u32 mdr, u32 mask) iosf_mbi_modify() argument
|
| H A D | kasan.h | 8 * Compiler uses shadow offset assuming that addresses start
10 * for kernel really starts from compiler's shadow offset +
|
| H A D | vvar.h | 14 * mapping for userspace. Each variable needs a unique offset within
15 * that page; specify that offset with the DECLARE_VVAR macro. (If
27 #define DECLARE_VVAR(offset, type, name) \
28 EMIT_VVAR(name, offset)
34 #define DECLARE_VVAR(offset, type, name) \
45 /* DECLARE_VVAR(offset, type, name) */
|
| /linux-4.4.14/arch/mips/loongson64/common/ |
| H A D | early_printk.c | 16 #define PORT(base, offset) (u8 *)(base + offset)
18 static inline unsigned int serial_in(unsigned char *base, int offset) serial_in() argument
20 return readb(PORT(base, offset)); serial_in()
23 static inline void serial_out(unsigned char *base, int offset, int value) serial_out() argument
25 writeb(value, PORT(base, offset)); serial_out()
|
| /linux-4.4.14/arch/mips/mti-sead3/ |
| H A D | sead3-console.c | 15 #define PORT(base_addr, offset) ((unsigned int __iomem *)(base_addr+(offset)*4))
19 static inline unsigned int serial_in(int offset, unsigned int base_addr) serial_in() argument
21 return __raw_readl(PORT(base_addr, offset)) & 0xff; serial_in()
24 static inline void serial_out(int offset, int value, unsigned int base_addr) serial_out() argument
26 __raw_writel(value, PORT(base_addr, offset)); serial_out()
|
| H A D | sead3-setup.c | 64 int offset; parse_memsize_param() local
72 offset = fdt_path_offset(__dtb_start, "/memory"); parse_memsize_param()
73 if (offset > 0) { parse_memsize_param()
76 * reg contains 2 32-bits BE values, offset and size. We just parse_memsize_param()
77 * want to replace the size value without affecting the offset parse_memsize_param()
79 prop_value = fdt_getprop(__dtb_start, offset, "reg", &prop_len); parse_memsize_param()
82 fdt_setprop_inplace_u64(__dtb_start, offset, "reg", new_value); parse_memsize_param()
|
| /linux-4.4.14/drivers/staging/rdma/ehca/ |
| H A D | hipz_fns.h | 50 #define hipz_galpa_store_eq(gal, offset, value) \
51 hipz_galpa_store(gal, EQTEMM_OFFSET(offset), value)
53 #define hipz_galpa_load_eq(gal, offset) \
54 hipz_galpa_load(gal, EQTEMM_OFFSET(offset))
56 #define hipz_galpa_store_qped(gal, offset, value) \
57 hipz_galpa_store(gal, QPEDMM_OFFSET(offset), value)
59 #define hipz_galpa_load_qped(gal, offset) \
60 hipz_galpa_load(gal, QPEDMM_OFFSET(offset))
62 #define hipz_galpa_store_mrmw(gal, offset, value) \
63 hipz_galpa_store(gal, MRMWMM_OFFSET(offset), value)
65 #define hipz_galpa_load_mrmw(gal, offset) \
66 hipz_galpa_load(gal, MRMWMM_OFFSET(offset))
|
| /linux-4.4.14/arch/um/kernel/ |
| H A D | syscall.c | 19 unsigned long fd, unsigned long offset) old_mmap()
22 if (offset & ~PAGE_MASK) old_mmap()
25 err = sys_mmap_pgoff(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); old_mmap()
17 old_mmap(unsigned long addr, unsigned long len, unsigned long prot, unsigned long flags, unsigned long fd, unsigned long offset) old_mmap() argument
|
| /linux-4.4.14/drivers/net/ethernet/intel/e1000/ |
| H A D | e1000_osdep.h | 48 #define GBE_CONFIG_FLASH_WRITE(base, offset, count, data) \
49 (iowrite16_rep(base + offset, data, count))
51 #define GBE_CONFIG_FLASH_READ(base, offset, count, data) \
52 (ioread16_rep(base + (offset << 1), data, count))
62 #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) ( \
65 ((offset) << 2))))
67 #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
70 ((offset) << 2)))
75 #define E1000_WRITE_REG_ARRAY_WORD(a, reg, offset, value) ( \
78 ((offset) << 1))))
80 #define E1000_READ_REG_ARRAY_WORD(a, reg, offset) ( \
83 ((offset) << 1)))
85 #define E1000_WRITE_REG_ARRAY_BYTE(a, reg, offset, value) ( \
88 (offset))))
90 #define E1000_READ_REG_ARRAY_BYTE(a, reg, offset) ( \
93 (offset)))
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ |
| H A D | bit.h | 7 u16 offset; member in struct:bit_entry
|
| /linux-4.4.14/fs/ecryptfs/ |
| H A D | read_write.c | 31 * @offset: Byte offset in the lower file to which to write the data
32 * @size: Number of bytes from @data to write at @offset in the lower
40 loff_t offset, size_t size) ecryptfs_write_lower()
48 rc = kernel_write(lower_file, data, size, offset); ecryptfs_write_lower()
58 * @offset_in_page: The offset in the @page_for_lower from which to
63 * Determines the byte offset in the file for the given page and
64 * offset within the page, maps the page, and makes the call to write
74 loff_t offset; ecryptfs_write_lower_page_segment() local
77 offset = ((((loff_t)page_for_lower->index) << PAGE_CACHE_SHIFT) ecryptfs_write_lower_page_segment()
80 rc = ecryptfs_write_lower(ecryptfs_inode, virt, offset, size); ecryptfs_write_lower_page_segment()
91 * @offset: Offset in the eCryptfs file at which to begin writing the
105 int ecryptfs_write(struct inode *ecryptfs_inode, char *data, loff_t offset, ecryptfs_write() argument
121 if (offset > ecryptfs_file_size) ecryptfs_write()
124 pos = offset; ecryptfs_write()
125 while (pos < (offset + size)) { ecryptfs_write()
129 loff_t total_remaining_bytes = ((offset + size) - pos); ecryptfs_write()
138 if (pos < offset) { ecryptfs_write()
139 /* remaining zeros to write, up to destination offset */ ecryptfs_write()
140 loff_t total_remaining_zeros = (offset - pos); ecryptfs_write()
158 * pos: where we're now writing, offset: where the request was ecryptfs_write()
163 if (pos < offset || !start_offset_in_page) { ecryptfs_write()
171 /* pos >= offset, we are now writing the data request */ ecryptfs_write()
172 if (pos >= offset) { ecryptfs_write()
221 * @offset: Byte offset in the lower file from which to read the data
222 * @size: Number of bytes to read from @offset of the lower file and
226 * Read @size bytes of data at byte offset @offset from the lower
231 int ecryptfs_read_lower(char *data, loff_t offset, size_t size, ecryptfs_read_lower() argument
238 return kernel_read(lower_file, offset, data, size); ecryptfs_read_lower()
250 * Determines the byte offset in the file for the given page and
251 * offset within the page, maps the page, and makes the call to read
262 loff_t offset; ecryptfs_read_lower_page_segment() local
265 offset = ((((loff_t)page_index) << PAGE_CACHE_SHIFT) + offset_in_page); ecryptfs_read_lower_page_segment()
267 rc = ecryptfs_read_lower(virt, offset, size, ecryptfs_inode); ecryptfs_read_lower_page_segment()
39 ecryptfs_write_lower(struct inode *ecryptfs_inode, char *data, loff_t offset, size_t size) ecryptfs_write_lower() argument
|
| /linux-4.4.14/arch/m68k/include/asm/ |
| H A D | atafd.h | 9 int sect_offset; /* offset of first sector */
|
| /linux-4.4.14/net/netfilter/ |
| H A D | nft_payload.c | 23 nft_payload_copy_vlan(u32 *d, const struct sk_buff *skb, u8 offset, u8 len) nft_payload_copy_vlan() argument
30 if (offset < ETH_HLEN) { nft_payload_copy_vlan()
31 u8 ethlen = min_t(u8, len, ETH_HLEN - offset); nft_payload_copy_vlan()
38 memcpy(dst_u8, vlanh + offset, ethlen); nft_payload_copy_vlan()
45 offset = ETH_HLEN; nft_payload_copy_vlan()
46 } else if (offset >= VLAN_ETH_HLEN) { nft_payload_copy_vlan()
47 offset -= VLAN_HLEN; nft_payload_copy_vlan()
54 vlanh += offset; nft_payload_copy_vlan()
56 vlan_len = min_t(u8, len, VLAN_ETH_HLEN - offset); nft_payload_copy_vlan()
65 return skb_copy_bits(skb, offset + mac_off, dst_u8, len) == 0; nft_payload_copy_vlan()
75 int offset; nft_payload_eval() local
85 priv->offset, priv->len)) nft_payload_eval()
89 offset = skb_mac_header(skb) - skb->data; nft_payload_eval()
92 offset = skb_network_offset(skb); nft_payload_eval()
95 offset = pkt->xt.thoff; nft_payload_eval()
100 offset += priv->offset; nft_payload_eval()
102 if (skb_copy_bits(skb, offset, dest, priv->len) < 0) nft_payload_eval()
123 priv->offset = ntohl(nla_get_be32(tb[NFTA_PAYLOAD_OFFSET])); nft_payload_init()
137 nla_put_be32(skb, NFTA_PAYLOAD_OFFSET, htonl(priv->offset)) || nft_payload_dump()
168 unsigned int offset, len; nft_payload_select_ops() local
186 offset = ntohl(nla_get_be32(tb[NFTA_PAYLOAD_OFFSET])); nft_payload_select_ops()
189 if (len <= 4 && is_power_of_2(len) && IS_ALIGNED(offset, len) && nft_payload_select_ops()
|
| /linux-4.4.14/fs/squashfs/ |
| H A D | inode.c | 29 * offset into that block where the inode is placed (<block, offset>).
117 int err, type, offset = SQUASHFS_INODE_OFFSET(ino); squashfs_read_inode() local
128 &offset, sizeof(*sqshb_ino)); squashfs_read_inode()
137 offset = SQUASHFS_INODE_OFFSET(ino); squashfs_read_inode()
147 err = squashfs_read_metadata(sb, sqsh_ino, &block, &offset, squashfs_read_inode()
154 frag_offset = le32_to_cpu(sqsh_ino->offset); squashfs_read_inode()
176 squashfs_i(inode)->offset = offset; squashfs_read_inode()
180 "%llx, offset %x\n", SQUASHFS_INODE_BLK(ino), squashfs_read_inode()
181 offset, squashfs_i(inode)->start, block, offset); squashfs_read_inode()
190 err = squashfs_read_metadata(sb, sqsh_ino, &block, &offset, squashfs_read_inode()
197 frag_offset = le32_to_cpu(sqsh_ino->offset); squashfs_read_inode()
223 squashfs_i(inode)->offset = offset; squashfs_read_inode()
227 "%llx, offset %x\n", SQUASHFS_INODE_BLK(ino), squashfs_read_inode()
228 offset, squashfs_i(inode)->start, block, offset); squashfs_read_inode()
234 err = squashfs_read_metadata(sb, sqsh_ino, &block, &offset, squashfs_read_inode()
245 squashfs_i(inode)->offset = le16_to_cpu(sqsh_ino->offset); squashfs_read_inode()
249 TRACE("Directory inode %x:%x, start_block %llx, offset %x\n", squashfs_read_inode()
250 SQUASHFS_INODE_BLK(ino), offset, squashfs_read_inode()
252 le16_to_cpu(sqsh_ino->offset)); squashfs_read_inode()
258 err = squashfs_read_metadata(sb, sqsh_ino, &block, &offset, squashfs_read_inode()
270 squashfs_i(inode)->offset = le16_to_cpu(sqsh_ino->offset); squashfs_read_inode()
272 squashfs_i(inode)->dir_idx_offset = offset; squashfs_read_inode()
276 TRACE("Long directory inode %x:%x, start_block %llx, offset " squashfs_read_inode()
277 "%x\n", SQUASHFS_INODE_BLK(ino), offset, squashfs_read_inode()
279 le16_to_cpu(sqsh_ino->offset)); squashfs_read_inode()
286 err = squashfs_read_metadata(sb, sqsh_ino, &block, &offset, squashfs_read_inode()
297 squashfs_i(inode)->offset = offset; squashfs_read_inode()
303 &offset, inode->i_size); squashfs_read_inode()
307 &offset, sizeof(xattr)); squashfs_read_inode()
313 TRACE("Symbolic link inode %x:%x, start_block %llx, offset " squashfs_read_inode()
314 "%x\n", SQUASHFS_INODE_BLK(ino), offset, squashfs_read_inode()
315 block, offset); squashfs_read_inode()
323 err = squashfs_read_metadata(sb, sqsh_ino, &block, &offset, squashfs_read_inode()
337 SQUASHFS_INODE_BLK(ino), offset, rdev); squashfs_read_inode()
345 err = squashfs_read_metadata(sb, sqsh_ino, &block, &offset, squashfs_read_inode()
361 SQUASHFS_INODE_BLK(ino), offset, rdev); squashfs_read_inode()
368 err = squashfs_read_metadata(sb, sqsh_ino, &block, &offset, squashfs_read_inode()
385 err = squashfs_read_metadata(sb, sqsh_ino, &block, &offset, squashfs_read_inode()
|
| H A D | file.c | 57 * Locate cache slot in range [offset, index] for specified inode. If
60 static struct meta_index *locate_meta_index(struct inode *inode, int offset, locate_meta_index() argument
69 TRACE("locate_meta_index: index %d, offset %d\n", index, offset); locate_meta_index()
76 msblk->meta_index[i].offset >= offset && locate_meta_index()
77 msblk->meta_index[i].offset <= index && locate_meta_index()
79 TRACE("locate_meta_index: entry %d, offset %d\n", i, locate_meta_index()
80 msblk->meta_index[i].offset); locate_meta_index()
82 offset = meta->offset; locate_meta_index()
97 * Find and initialise an empty cache slot for index offset.
99 static struct meta_index *empty_meta_index(struct inode *inode, int offset, empty_meta_index() argument
108 TRACE("empty_meta_index: offset %d, skip %d\n", offset, skip); empty_meta_index()
149 meta->offset = offset; empty_meta_index()
171 * metadata block <start_block, offset>.
174 u64 *start_block, int *offset) read_indexes()
189 offset, blocks << 2); read_indexes()
192 *start_block, *offset); read_indexes()
241 int offset = 0; fill_meta_index() local
245 int cur_offset = squashfs_i(inode)->offset; fill_meta_index()
254 while (offset < index) { fill_meta_index()
255 meta = locate_meta_index(inode, offset + 1, index); fill_meta_index()
258 meta = empty_meta_index(inode, offset + 1, skip); fill_meta_index()
262 offset = index < meta->offset + meta->entries ? index : fill_meta_index()
263 meta->offset + meta->entries - 1; fill_meta_index()
264 meta_entry = &meta->meta_entry[offset - meta->offset]; fill_meta_index()
267 cur_offset = meta_entry->offset; fill_meta_index()
269 TRACE("get_meta_index: offset %d, meta->offset %d, " fill_meta_index()
270 "meta->entries %d\n", offset, meta->offset, fill_meta_index()
272 TRACE("get_meta_index: index_block 0x%llx, offset 0x%x" fill_meta_index()
282 for (i = meta->offset + meta->entries; i <= index && fill_meta_index()
283 i < meta->offset + SQUASHFS_META_ENTRIES; i++) { fill_meta_index()
300 meta_entry = &meta->meta_entry[i - meta->offset]; fill_meta_index()
303 meta_entry->offset = cur_offset; fill_meta_index()
306 offset++; fill_meta_index()
309 TRACE("get_meta_index: meta->offset %d, meta->entries %d\n", fill_meta_index()
310 meta->offset, meta->entries); fill_meta_index()
323 return offset * SQUASHFS_META_INDEXES * skip; fill_meta_index()
339 int offset; read_blocklist() local
341 int res = fill_meta_index(inode, index, &start, &offset, block); read_blocklist()
343 TRACE("read_blocklist: res %d, index %d, start 0x%llx, offset" read_blocklist()
344 " 0x%x, block 0x%llx\n", res, index, start, offset, read_blocklist()
357 blks = read_indexes(inode->i_sb, index - res, &start, &offset); read_blocklist()
366 res = squashfs_read_metadata(inode->i_sb, &size, &start, &offset, read_blocklist()
375 int bytes, int offset) squashfs_copy_cache()
390 bytes -= PAGE_CACHE_SIZE, offset += PAGE_CACHE_SIZE) { squashfs_copy_cache()
406 squashfs_copy_data(pageaddr, buffer, offset, avail); squashfs_copy_cache()
173 read_indexes(struct super_block *sb, int n, u64 *start_block, int *offset) read_indexes() argument
374 squashfs_copy_cache(struct page *page, struct squashfs_cache_entry *buffer, int bytes, int offset) squashfs_copy_cache() argument
|
| H A D | block.c | 46 u64 *cur_index, int *offset, int *length) get_block_length()
55 if (msblk->devblksize - *offset == 1) { get_block_length()
56 *length = (unsigned char) bh->b_data[*offset]; get_block_length()
62 *offset = 1; get_block_length()
64 *length = (unsigned char) bh->b_data[*offset] | get_block_length()
65 (unsigned char) bh->b_data[*offset + 1] << 8; get_block_length()
66 *offset += 2; get_block_length()
68 if (*offset == msblk->devblksize) { get_block_length()
73 *offset = 0; get_block_length()
95 int offset = index & ((1 << msblk->devblksize_log2) - 1); squashfs_read_data() local
108 bytes = -offset; squashfs_read_data()
135 bh[0] = get_block_length(sb, &cur_index, &offset, &length); squashfs_read_data()
140 bytes = msblk->devblksize - offset; squashfs_read_data()
169 length = squashfs_decompress(msblk, bh, b, offset, length, squashfs_read_data()
181 in = min(bytes, msblk->devblksize - offset); squashfs_read_data()
190 memcpy(data + pg_offset, bh[k]->b_data + offset, squashfs_read_data()
194 offset += avail; squashfs_read_data()
196 offset = 0; squashfs_read_data()
45 get_block_length(struct super_block *sb, u64 *cur_index, int *offset, int *length) get_block_length() argument
|
| /linux-4.4.14/arch/s390/include/asm/ |
| H A D | elf.h | 17 #define R_390_GOT12 6 /* 12 bit GOT offset. */
18 #define R_390_GOT32 7 /* 32 bit GOT offset. */
24 #define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
25 #define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */
26 #define R_390_GOT16 15 /* 16 bit GOT offset. */
35 #define R_390_GOT64 24 /* 64 bit GOT offset. */
38 #define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */
39 #define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */
40 #define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */
41 #define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */
42 #define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */
43 #define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */
44 #define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */
45 #define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */
46 #define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */
47 #define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */
57 #define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS
58 block offset. */
59 #define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS
60 block offset. */
61 #define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS
62 block offset. */
68 negated static TLS block offset. */
70 negated static TLS block offset. */
71 #define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for
72 negated static TLS block offset. */
73 #define R_390_TLS_LE32 50 /* 32 bit negated offset relative to
75 #define R_390_TLS_LE64 51 /* 64 bit negated offset relative to
77 #define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS
79 #define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS
83 #define R_390_TLS_TPOFF 56 /* Negate offset in static TLS
86 #define R_390_GOT20 58 /* 20 bit GOT offset. */
87 #define R_390_GOTPLT20 59 /* 20 bit offset to jump slot. */
88 #define R_390_TLS_GOTIE20 60 /* 20 bit GOT offset for static TLS
89 block offset. */
|
| /linux-4.4.14/drivers/staging/vme/devices/ |
| H A D | vme_pio2_gpio.c | 33 static int pio2_gpio_get(struct gpio_chip *chip, unsigned int offset) pio2_gpio_get() argument
39 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) | pio2_gpio_get()
40 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { pio2_gpio_get()
47 PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]); pio2_gpio_get()
57 if (reg & PIO2_CHANNEL_BIT[offset]) { pio2_gpio_get()
58 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH) pio2_gpio_get()
64 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH) pio2_gpio_get()
70 static void pio2_gpio_set(struct gpio_chip *chip, unsigned int offset, pio2_gpio_set() argument
77 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) | pio2_gpio_set()
78 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { pio2_gpio_set()
85 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value | pio2_gpio_set()
86 PIO2_CHANNEL_BIT[offset]; pio2_gpio_set()
88 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value & pio2_gpio_set()
89 ~PIO2_CHANNEL_BIT[offset]; pio2_gpio_set()
92 PIO2_REGS_DATA[PIO2_CHANNEL_BANK[offset]]); pio2_gpio_set()
98 card->bank[PIO2_CHANNEL_BANK[offset]].value = reg; pio2_gpio_set()
102 static int pio2_gpio_dir_in(struct gpio_chip *chip, unsigned offset) pio2_gpio_dir_in() argument
107 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) | pio2_gpio_dir_in()
108 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { pio2_gpio_dir_in()
121 static int pio2_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int value) pio2_gpio_dir_out() argument
126 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) | pio2_gpio_dir_out()
127 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { pio2_gpio_dir_out()
|
| /linux-4.4.14/include/linux/ |
| H A D | rio_drv.h | 23 extern int __rio_local_read_config_32(struct rio_mport *port, u32 offset,
25 extern int __rio_local_write_config_32(struct rio_mport *port, u32 offset,
27 extern int __rio_local_read_config_16(struct rio_mport *port, u32 offset,
29 extern int __rio_local_write_config_16(struct rio_mport *port, u32 offset,
31 extern int __rio_local_read_config_8(struct rio_mport *port, u32 offset,
33 extern int __rio_local_write_config_8(struct rio_mport *port, u32 offset,
37 u8 hopcount, u32 offset, u32 * data);
39 u8 hopcount, u32 offset, u32 data);
41 u8 hopcount, u32 offset, u16 * data);
43 u8 hopcount, u32 offset, u16 data);
45 u8 hopcount, u32 offset, u8 * data);
47 u8 hopcount, u32 offset, u8 data);
52 * @offset: Offset into local configuration space
55 * Reads 32 bits of data from the specified offset within the local
58 static inline int rio_local_read_config_32(struct rio_mport *port, u32 offset, rio_local_read_config_32() argument
61 return __rio_local_read_config_32(port, offset, data); rio_local_read_config_32()
67 * @offset: Offset into local configuration space
70 * Writes 32 bits of data to the specified offset within the local
73 static inline int rio_local_write_config_32(struct rio_mport *port, u32 offset, rio_local_write_config_32() argument
76 return __rio_local_write_config_32(port, offset, data); rio_local_write_config_32()
82 * @offset: Offset into local configuration space
85 * Reads 16 bits of data from the specified offset within the local
88 static inline int rio_local_read_config_16(struct rio_mport *port, u32 offset, rio_local_read_config_16() argument
91 return __rio_local_read_config_16(port, offset, data); rio_local_read_config_16()
97 * @offset: Offset into local configuration space
100 * Writes 16 bits of data to the specified offset within the local
104 static inline int rio_local_write_config_16(struct rio_mport *port, u32 offset, rio_local_write_config_16() argument
107 return __rio_local_write_config_16(port, offset, data); rio_local_write_config_16()
113 * @offset: Offset into local configuration space
116 * Reads 8 bits of data from the specified offset within the local
119 static inline int rio_local_read_config_8(struct rio_mport *port, u32 offset, rio_local_read_config_8() argument
122 return __rio_local_read_config_8(port, offset, data); rio_local_read_config_8()
128 * @offset: Offset into local configuration space
131 * Writes 8 bits of data to the specified offset within the local
134 static inline int rio_local_write_config_8(struct rio_mport *port, u32 offset, rio_local_write_config_8() argument
137 return __rio_local_write_config_8(port, offset, data); rio_local_write_config_8()
143 * @offset: Offset into device configuration space
146 * Reads 32 bits of data from the specified offset within the
149 static inline int rio_read_config_32(struct rio_dev *rdev, u32 offset, rio_read_config_32() argument
153 rdev->hopcount, offset, data); rio_read_config_32()
159 * @offset: Offset into device configuration space
162 * Writes 32 bits of data to the specified offset within the
165 static inline int rio_write_config_32(struct rio_dev *rdev, u32 offset, rio_write_config_32() argument
169 rdev->hopcount, offset, data); rio_write_config_32()
175 * @offset: Offset into device configuration space
178 * Reads 16 bits of data from the specified offset within the
181 static inline int rio_read_config_16(struct rio_dev *rdev, u32 offset, rio_read_config_16() argument
185 rdev->hopcount, offset, data); rio_read_config_16()
191 * @offset: Offset into device configuration space
194 * Writes 16 bits of data to the specified offset within the
197 static inline int rio_write_config_16(struct rio_dev *rdev, u32 offset, rio_write_config_16() argument
201 rdev->hopcount, offset, data); rio_write_config_16()
207 * @offset: Offset into device configuration space
210 * Reads 8 bits of data from the specified offset within the
213 static inline int rio_read_config_8(struct rio_dev *rdev, u32 offset, u8 * data) rio_read_config_8() argument
216 rdev->hopcount, offset, data); rio_read_config_8()
222 * @offset: Offset into device configuration space
225 * Writes 8 bits of data to the specified offset within the
228 static inline int rio_write_config_8(struct rio_dev *rdev, u32 offset, u8 data) rio_write_config_8() argument
231 rdev->hopcount, offset, data); rio_write_config_8()
|
| H A D | iommu-helper.h | 7 unsigned long offset, iommu_device_max_index()
10 if (size + offset > dma_mask) iommu_device_max_index()
11 return dma_mask - offset + 1; iommu_device_max_index()
6 iommu_device_max_index(unsigned long size, unsigned long offset, u64 dma_mask) iommu_device_max_index() argument
|
| H A D | earlycpio.h | 15 long *offset);
|
| /linux-4.4.14/arch/score/kernel/ |
| H A D | module.c | 58 "section %d reloc %d offset %d size %d\n", apply_relocate()
74 unsigned long hi16_offset, offset; apply_relocate() local
82 offset = ((temp >> 16 & 0x03) << 15) | apply_relocate()
84 offset = (hi16_offset << 16) | (offset & 0xffff); apply_relocate()
85 uvalue = sym->st_value + offset; apply_relocate()
93 offset = (uvalue & 0xffff) << 1; apply_relocate()
94 temp = (temp & (~(0x37fff))) | (offset & 0x7fff) | apply_relocate()
95 ((offset << 1) & 0x30000); apply_relocate()
100 unsigned long hi16_offset, offset; apply_relocate() local
105 offset = (temp & 0x03FF7FFE); apply_relocate()
106 hi16_offset = (offset & 0xFFFF0000); apply_relocate()
107 offset = (hi16_offset | ((offset & 0xFFFF) << 1)) >> 2; apply_relocate()
109 uvalue = (sym->st_value + offset) >> 1; apply_relocate()
|
| /linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/pinctrl/ |
| H A D | omap.h | 54 * padconf registers instead of the offset from padconf base.
56 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
70 * Macros to allow using the offset from the padconf physical address
71 * instead of the offset from padconf base.
73 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
75 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
76 #define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
|
| /linux-4.4.14/include/dt-bindings/pinctrl/ |
| H A D | omap.h | 54 * padconf registers instead of the offset from padconf base.
56 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
70 * Macros to allow using the offset from the padconf physical address
71 * instead of the offset from padconf base.
73 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
75 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
76 #define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
|
| /linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/pinctrl/ |
| H A D | omap.h | 54 * padconf registers instead of the offset from padconf base.
56 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
70 * Macros to allow using the offset from the padconf physical address
71 * instead of the offset from padconf base.
73 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
75 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
76 #define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
|
| /linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/pinctrl/ |
| H A D | omap.h | 54 * padconf registers instead of the offset from padconf base.
56 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
70 * Macros to allow using the offset from the padconf physical address
71 * instead of the offset from padconf base.
73 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
75 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
76 #define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
|
| /linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/pinctrl/ |
| H A D | omap.h | 54 * padconf registers instead of the offset from padconf base.
56 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
70 * Macros to allow using the offset from the padconf physical address
71 * instead of the offset from padconf base.
73 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
75 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
76 #define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
|
| /linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/pinctrl/ |
| H A D | omap.h | 54 * padconf registers instead of the offset from padconf base.
56 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
70 * Macros to allow using the offset from the padconf physical address
71 * instead of the offset from padconf base.
73 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
75 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
76 #define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
|
| /linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/pinctrl/ |
| H A D | omap.h | 54 * padconf registers instead of the offset from padconf base.
56 #define OMAP_IOPAD_OFFSET(pa, offset) (((pa) & 0xffff) - (offset))
70 * Macros to allow using the offset from the padconf physical address
71 * instead of the offset from padconf base.
73 #define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
75 #define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
76 #define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
|
| /linux-4.4.14/sound/firewire/digi00x/ |
| H A D | digi00x-transaction.c | 47 unsigned long long offset, __be32 *buf) handle_unknown_message()
60 int generation, unsigned long long offset, handle_message()
66 if (offset == dg00x->async_handler.offset) handle_message()
67 handle_unknown_message(dg00x, offset, buf); handle_message()
68 else if (offset == dg00x->async_handler.offset + 4) handle_message()
82 (dg00x->async_handler.offset >> 32)); snd_dg00x_transaction_reregister()
83 data[1] = cpu_to_be32(dg00x->async_handler.offset); snd_dg00x_transaction_reregister()
92 (dg00x->async_handler.offset >> 32)); snd_dg00x_transaction_reregister()
93 data[1] = cpu_to_be32(dg00x->async_handler.offset + 4); snd_dg00x_transaction_reregister()
46 handle_unknown_message(struct snd_dg00x *dg00x, unsigned long long offset, __be32 *buf) handle_unknown_message() argument
58 handle_message(struct fw_card *card, struct fw_request *request, int tcode, int destination, int source, int generation, unsigned long long offset, void *data, size_t length, void *callback_data) handle_message() argument
|
| /linux-4.4.14/tools/perf/ui/browsers/ |
| H A D | header.c | 18 unsigned long offset = (unsigned long)browser->priv; ui_browser__argv_write() local
20 if (offset >= strlen(str)) ui_browser__argv_write()
23 str = str + offset; ui_browser__argv_write()
34 unsigned long offset; list_menu__run() local
50 offset = (unsigned long)menu->priv; list_menu__run()
51 offset += 10; list_menu__run()
52 menu->priv = (void *)offset; list_menu__run()
55 offset = (unsigned long)menu->priv; list_menu__run()
56 if (offset >= 10) list_menu__run()
57 offset -= 10; list_menu__run()
58 menu->priv = (void *)offset; list_menu__run()
|
| /linux-4.4.14/drivers/mtd/nand/ |
| H A D | omap_elm.c | 95 static void elm_write_reg(struct elm_info *info, int offset, u32 val) elm_write_reg() argument
97 writel(val, info->elm_base + offset); elm_write_reg()
100 static u32 elm_read_reg(struct elm_info *info, int offset) elm_read_reg() argument
102 return readl(info->elm_base + offset); elm_read_reg()
174 int i, offset; elm_load_syndrome() local
182 offset = ELM_SYNDROME_FRAGMENT_0 + elm_load_syndrome()
188 elm_write_reg(info, offset, val); elm_load_syndrome()
191 offset += 4; elm_load_syndrome()
193 elm_write_reg(info, offset, val); elm_load_syndrome()
196 offset += 4; elm_load_syndrome()
198 elm_write_reg(info, offset, val); elm_load_syndrome()
201 offset += 4; elm_load_syndrome()
203 elm_write_reg(info, offset, val); elm_load_syndrome()
209 elm_write_reg(info, offset, val); elm_load_syndrome()
212 offset += 4; elm_load_syndrome()
214 elm_write_reg(info, offset, val); elm_load_syndrome()
218 elm_write_reg(info, offset, val); elm_load_syndrome()
219 offset += 4; elm_load_syndrome()
221 elm_write_reg(info, offset, val); elm_load_syndrome()
222 offset += 4; elm_load_syndrome()
224 elm_write_reg(info, offset, val); elm_load_syndrome()
225 offset += 4; elm_load_syndrome()
227 elm_write_reg(info, offset, val); elm_load_syndrome()
228 offset += 4; elm_load_syndrome()
230 elm_write_reg(info, offset, val); elm_load_syndrome()
231 offset += 4; elm_load_syndrome()
233 elm_write_reg(info, offset, val); elm_load_syndrome()
234 offset += 4; elm_load_syndrome()
236 elm_write_reg(info, offset, val); elm_load_syndrome()
260 int i, offset; elm_start_processing() local
269 offset = ELM_SYNDROME_FRAGMENT_6 + elm_start_processing()
271 reg_val = elm_read_reg(info, offset); elm_start_processing()
273 elm_write_reg(info, offset, reg_val); elm_start_processing()
293 int offset; elm_error_correction() local
300 offset = ELM_LOCATION_STATUS + ERROR_LOCATION_SIZE * i; elm_error_correction()
301 reg_val = elm_read_reg(info, offset); elm_error_correction()
305 offset = ELM_ERROR_LOCATION_0 + elm_error_correction()
315 reg_val = elm_read_reg(info, offset); elm_error_correction()
320 offset += 4; elm_error_correction()
452 u32 offset = 0, i; elm_context_save() local
459 offset = i * SYNDROME_FRAGMENT_REG_SIZE; elm_context_save()
463 ELM_SYNDROME_FRAGMENT_6 + offset); elm_context_save()
465 ELM_SYNDROME_FRAGMENT_5 + offset); elm_context_save()
467 ELM_SYNDROME_FRAGMENT_4 + offset); elm_context_save()
470 ELM_SYNDROME_FRAGMENT_3 + offset); elm_context_save()
472 ELM_SYNDROME_FRAGMENT_2 + offset); elm_context_save()
475 ELM_SYNDROME_FRAGMENT_1 + offset); elm_context_save()
477 ELM_SYNDROME_FRAGMENT_0 + offset); elm_context_save()
485 ELM_SYNDROME_FRAGMENT_6 + offset); elm_context_save()
498 u32 offset = 0, i; elm_context_restore() local
505 offset = i * SYNDROME_FRAGMENT_REG_SIZE; elm_context_restore()
508 elm_write_reg(info, ELM_SYNDROME_FRAGMENT_6 + offset, elm_context_restore()
510 elm_write_reg(info, ELM_SYNDROME_FRAGMENT_5 + offset, elm_context_restore()
512 elm_write_reg(info, ELM_SYNDROME_FRAGMENT_4 + offset, elm_context_restore()
515 elm_write_reg(info, ELM_SYNDROME_FRAGMENT_3 + offset, elm_context_restore()
517 elm_write_reg(info, ELM_SYNDROME_FRAGMENT_2 + offset, elm_context_restore()
520 elm_write_reg(info, ELM_SYNDROME_FRAGMENT_1 + offset, elm_context_restore()
522 elm_write_reg(info, ELM_SYNDROME_FRAGMENT_0 + offset, elm_context_restore()
529 elm_write_reg(info, ELM_SYNDROME_FRAGMENT_6 + offset, elm_context_restore()
|
| /linux-4.4.14/sound/soc/intel/common/ |
| H A D | sst-dsp.c | 32 void sst_shim32_write(void __iomem *addr, u32 offset, u32 value) sst_shim32_write() argument
34 writel(value, addr + offset); sst_shim32_write()
38 u32 sst_shim32_read(void __iomem *addr, u32 offset) sst_shim32_read() argument
40 return readl(addr + offset); sst_shim32_read()
44 void sst_shim32_write64(void __iomem *addr, u32 offset, u64 value) sst_shim32_write64() argument
46 memcpy_toio(addr + offset, &value, sizeof(value)); sst_shim32_write64()
50 u64 sst_shim32_read64(void __iomem *addr, u32 offset) sst_shim32_read64() argument
54 memcpy_fromio(&val, addr + offset, sizeof(val)); sst_shim32_read64()
92 void sst_dsp_shim_write(struct sst_dsp *sst, u32 offset, u32 value) sst_dsp_shim_write() argument
97 sst->ops->write(sst->addr.shim, offset, value); sst_dsp_shim_write()
102 u32 sst_dsp_shim_read(struct sst_dsp *sst, u32 offset) sst_dsp_shim_read() argument
108 val = sst->ops->read(sst->addr.shim, offset); sst_dsp_shim_read()
115 void sst_dsp_shim_write64(struct sst_dsp *sst, u32 offset, u64 value) sst_dsp_shim_write64() argument
120 sst->ops->write64(sst->addr.shim, offset, value); sst_dsp_shim_write64()
125 u64 sst_dsp_shim_read64(struct sst_dsp *sst, u32 offset) sst_dsp_shim_read64() argument
131 val = sst->ops->read64(sst->addr.shim, offset); sst_dsp_shim_read64()
138 void sst_dsp_shim_write_unlocked(struct sst_dsp *sst, u32 offset, u32 value) sst_dsp_shim_write_unlocked() argument
140 sst->ops->write(sst->addr.shim, offset, value); sst_dsp_shim_write_unlocked()
144 u32 sst_dsp_shim_read_unlocked(struct sst_dsp *sst, u32 offset) sst_dsp_shim_read_unlocked() argument
146 return sst->ops->read(sst->addr.shim, offset); sst_dsp_shim_read_unlocked()
150 void sst_dsp_shim_write64_unlocked(struct sst_dsp *sst, u32 offset, u64 value) sst_dsp_shim_write64_unlocked() argument
152 sst->ops->write64(sst->addr.shim, offset, value); sst_dsp_shim_write64_unlocked()
156 u64 sst_dsp_shim_read64_unlocked(struct sst_dsp *sst, u32 offset) sst_dsp_shim_read64_unlocked() argument
158 return sst->ops->read64(sst->addr.shim, offset); sst_dsp_shim_read64_unlocked()
162 int sst_dsp_shim_update_bits_unlocked(struct sst_dsp *sst, u32 offset, sst_dsp_shim_update_bits_unlocked() argument
169 ret = sst_dsp_shim_read_unlocked(sst, offset); sst_dsp_shim_update_bits_unlocked()
176 sst_dsp_shim_write_unlocked(sst, offset, new); sst_dsp_shim_update_bits_unlocked()
182 int sst_dsp_shim_update_bits64_unlocked(struct sst_dsp *sst, u32 offset, sst_dsp_shim_update_bits64_unlocked() argument
188 old = sst_dsp_shim_read64_unlocked(sst, offset); sst_dsp_shim_update_bits64_unlocked()
194 sst_dsp_shim_write64_unlocked(sst, offset, new); sst_dsp_shim_update_bits64_unlocked()
201 void sst_dsp_shim_update_bits_forced_unlocked(struct sst_dsp *sst, u32 offset, sst_dsp_shim_update_bits_forced_unlocked() argument
207 ret = sst_dsp_shim_read_unlocked(sst, offset); sst_dsp_shim_update_bits_forced_unlocked()
212 sst_dsp_shim_write_unlocked(sst, offset, new); sst_dsp_shim_update_bits_forced_unlocked()
216 int sst_dsp_shim_update_bits(struct sst_dsp *sst, u32 offset, sst_dsp_shim_update_bits() argument
223 change = sst_dsp_shim_update_bits_unlocked(sst, offset, mask, value); sst_dsp_shim_update_bits()
229 int sst_dsp_shim_update_bits64(struct sst_dsp *sst, u32 offset, sst_dsp_shim_update_bits64() argument
236 change = sst_dsp_shim_update_bits64_unlocked(sst, offset, mask, value); sst_dsp_shim_update_bits64()
243 void sst_dsp_shim_update_bits_forced(struct sst_dsp *sst, u32 offset, sst_dsp_shim_update_bits_forced() argument
249 sst_dsp_shim_update_bits_forced_unlocked(sst, offset, mask, value); sst_dsp_shim_update_bits_forced()
254 int sst_dsp_register_poll(struct sst_dsp *ctx, u32 offset, u32 mask, sst_dsp_register_poll() argument
268 if ((sst_dsp_shim_read_unlocked(ctx, offset) & mask) == target) { sst_dsp_register_poll()
280 if ((sst_dsp_shim_read_unlocked(ctx, offset) & mask) == target) sst_dsp_register_poll()
287 reg = sst_dsp_shim_read_unlocked(ctx, offset); sst_dsp_register_poll()
|
| /linux-4.4.14/fs/hfsplus/ |
| H A D | bitmap.c | 19 u32 offset, u32 *max) hfsplus_block_allocate()
33 hfs_dbg(BITMAP, "block_allocate: %u,%u,%u\n", size, offset, len); hfsplus_block_allocate()
36 page = read_mapping_page(mapping, offset / PAGE_CACHE_BITS, NULL); hfsplus_block_allocate()
42 curr = pptr + (offset & (PAGE_CACHE_BITS - 1)) / 32; hfsplus_block_allocate()
43 i = offset % 32; hfsplus_block_allocate()
44 offset &= ~(PAGE_CACHE_BITS - 1); hfsplus_block_allocate()
45 if ((size ^ offset) / PAGE_CACHE_BITS) hfsplus_block_allocate()
77 offset += PAGE_CACHE_BITS; hfsplus_block_allocate()
78 if (offset >= size) hfsplus_block_allocate()
80 page = read_mapping_page(mapping, offset / PAGE_CACHE_BITS, hfsplus_block_allocate()
87 if ((size ^ offset) / PAGE_CACHE_BITS) hfsplus_block_allocate()
97 start = offset + (curr - pptr) * 32 + i; hfsplus_block_allocate()
130 offset += PAGE_CACHE_BITS; hfsplus_block_allocate()
131 page = read_mapping_page(mapping, offset / PAGE_CACHE_BITS, hfsplus_block_allocate()
154 *max = offset + (curr - pptr) * 32 + i - start; hfsplus_block_allocate()
163 int hfsplus_block_free(struct super_block *sb, u32 offset, u32 count) hfsplus_block_free() argument
176 hfs_dbg(BITMAP, "block_free: %u,%u\n", offset, count); hfsplus_block_free()
178 if ((offset + count) > sbi->total_blocks) hfsplus_block_free()
183 pnr = offset / PAGE_CACHE_BITS; hfsplus_block_free()
188 curr = pptr + (offset & (PAGE_CACHE_BITS - 1)) / 32; hfsplus_block_free()
193 i = offset % 32; hfsplus_block_free()
18 hfsplus_block_allocate(struct super_block *sb, u32 size, u32 offset, u32 *max) hfsplus_block_allocate() argument
|
| /linux-4.4.14/lib/lzo/ |
| H A D | lzo1x_decompress_safe.c | 68 size_t offset; lzo1x_decompress_safe() local
75 offset = ip - ip_last; lzo1x_decompress_safe()
76 if (unlikely(offset > MAX_255_COUNT)) lzo1x_decompress_safe()
79 offset = (offset << 8) - offset; lzo1x_decompress_safe()
80 t += offset + 15 + *ip++; lzo1x_decompress_safe()
136 size_t offset; lzo1x_decompress_safe() local
143 offset = ip - ip_last; lzo1x_decompress_safe()
144 if (unlikely(offset > MAX_255_COUNT)) lzo1x_decompress_safe()
147 offset = (offset << 8) - offset; lzo1x_decompress_safe()
148 t += offset + 31 + *ip++; lzo1x_decompress_safe()
161 size_t offset; lzo1x_decompress_safe() local
168 offset = ip - ip_last; lzo1x_decompress_safe()
169 if (unlikely(offset > MAX_255_COUNT)) lzo1x_decompress_safe()
172 offset = (offset << 8) - offset; lzo1x_decompress_safe()
173 t += offset + 7 + *ip++; lzo1x_decompress_safe()
|
| /linux-4.4.14/drivers/target/iscsi/ |
| H A D | iscsi_target_seq_pdu_list.c | 42 " offset: %d, xfer_len: %d, seq_send_order: %d," iscsit_dump_seq_list()
44 seq->offset, seq->xfer_len, seq->seq_send_order, iscsit_dump_seq_list()
59 pr_debug("i: %d, offset: %d, length: %d," iscsit_dump_pdu_list()
60 " pdu_send_order: %d, seq_no: %d\n", i, pdu->offset, iscsit_dump_pdu_list()
218 u32 burstlength = 0, offset = 0; iscsit_determine_counts_for_list() local
237 while (offset < cmd->se_cmd.data_length) { iscsit_determine_counts_for_list()
242 offset += bl->immediate_data_length; iscsit_determine_counts_for_list()
250 if ((offset + mdsl) >= cmd->se_cmd.data_length) { iscsit_determine_counts_for_list()
252 (cmd->se_cmd.data_length - offset); iscsit_determine_counts_for_list()
253 offset += (cmd->se_cmd.data_length - offset); iscsit_determine_counts_for_list()
256 if ((offset + mdsl) iscsit_determine_counts_for_list()
260 offset); iscsit_determine_counts_for_list()
261 offset += (conn->sess->sess_ops->FirstBurstLength - iscsit_determine_counts_for_list()
262 offset); iscsit_determine_counts_for_list()
268 offset += mdsl; iscsit_determine_counts_for_list()
272 if ((offset + mdsl) >= cmd->se_cmd.data_length) { iscsit_determine_counts_for_list()
273 offset += (cmd->se_cmd.data_length - offset); iscsit_determine_counts_for_list()
278 offset += (conn->sess->sess_ops->MaxBurstLength - iscsit_determine_counts_for_list()
286 offset += mdsl; iscsit_determine_counts_for_list()
300 u32 burstlength = 0, offset = 0, i = 0, mdsl; iscsit_do_build_pdu_and_seq_lists() local
323 while (offset < cmd->se_cmd.data_length) { iscsit_do_build_pdu_and_seq_lists()
326 pdu[i].offset = offset; iscsit_do_build_pdu_and_seq_lists()
332 seq[seq_no].offset = offset; iscsit_do_build_pdu_and_seq_lists()
333 seq[seq_no].orig_offset = offset; iscsit_do_build_pdu_and_seq_lists()
348 offset += bl->immediate_data_length; iscsit_do_build_pdu_and_seq_lists()
357 if ((offset + mdsl) >= cmd->se_cmd.data_length) { iscsit_do_build_pdu_and_seq_lists()
361 (cmd->se_cmd.data_length - offset); iscsit_do_build_pdu_and_seq_lists()
367 (cmd->se_cmd.data_length - offset)); iscsit_do_build_pdu_and_seq_lists()
370 (cmd->se_cmd.data_length - offset); iscsit_do_build_pdu_and_seq_lists()
371 offset += (cmd->se_cmd.data_length - offset); iscsit_do_build_pdu_and_seq_lists()
374 if ((offset + mdsl) >= iscsit_do_build_pdu_and_seq_lists()
380 offset); iscsit_do_build_pdu_and_seq_lists()
387 offset)); iscsit_do_build_pdu_and_seq_lists()
391 offset); iscsit_do_build_pdu_and_seq_lists()
392 offset += (conn->sess->sess_ops->FirstBurstLength - iscsit_do_build_pdu_and_seq_lists()
393 offset); iscsit_do_build_pdu_and_seq_lists()
405 offset += mdsl; iscsit_do_build_pdu_and_seq_lists()
409 if ((offset + mdsl) >= cmd->se_cmd.data_length) { iscsit_do_build_pdu_and_seq_lists()
412 pdu[i].length = (cmd->se_cmd.data_length - offset); iscsit_do_build_pdu_and_seq_lists()
418 (cmd->se_cmd.data_length - offset)); iscsit_do_build_pdu_and_seq_lists()
420 offset += (cmd->se_cmd.data_length - offset); iscsit_do_build_pdu_and_seq_lists()
438 offset += (conn->sess->sess_ops->MaxBurstLength - iscsit_do_build_pdu_and_seq_lists()
451 offset += mdsl; iscsit_do_build_pdu_and_seq_lists()
573 u32 offset, iscsit_get_pdu_holder()
587 if ((pdu[i].offset == offset) && (pdu[i].length == length)) iscsit_get_pdu_holder()
591 " %u, Length: %u\n", cmd->init_task_tag, offset, length); iscsit_get_pdu_holder()
614 "_send_order: %d, pdu[i].offset: %d," iscsit_get_pdu_holder_for_seq()
616 pdu[i].pdu_send_order, pdu[i].offset, iscsit_get_pdu_holder_for_seq()
674 u32 offset, iscsit_get_seq_holder()
692 (offset + length)) iscsit_get_seq_holder()
697 " Offset: %u, Length: %u\n", cmd->init_task_tag, offset, iscsit_get_seq_holder()
571 iscsit_get_pdu_holder( struct iscsi_cmd *cmd, u32 offset, u32 length) iscsit_get_pdu_holder() argument
672 iscsit_get_seq_holder( struct iscsi_cmd *cmd, u32 offset, u32 length) iscsit_get_seq_holder() argument
|
| /linux-4.4.14/drivers/net/wireless/mediatek/mt7601u/ |
| H A D | usb.c | 96 const u8 direction, const u16 val, const u16 offset, mt7601u_vendor_request()
107 val, offset, buf, buflen, mt7601u_vendor_request()
109 trace_mt_vend_req(dev, pipe, req, req_type, val, offset, mt7601u_vendor_request()
121 req, offset, ret); mt7601u_vendor_request()
132 u32 mt7601u_rr(struct mt7601u_dev *dev, u32 offset) mt7601u_rr() argument
137 WARN_ONCE(offset > USHRT_MAX, "read high off:%08x", offset); mt7601u_rr()
142 0, offset, dev->vend_buf, MT_VEND_BUF); mt7601u_rr()
147 ret, offset); mt7601u_rr()
151 trace_reg_read(dev, offset, val); mt7601u_rr()
156 const u16 offset, const u32 val) mt7601u_vendor_single_wr()
163 val & 0xffff, offset, NULL, 0); mt7601u_vendor_single_wr()
166 val >> 16, offset + 2, NULL, 0); mt7601u_vendor_single_wr()
173 void mt7601u_wr(struct mt7601u_dev *dev, u32 offset, u32 val) mt7601u_wr() argument
175 WARN_ONCE(offset > USHRT_MAX, "write high off:%08x", offset); mt7601u_wr()
177 mt7601u_vendor_single_wr(dev, MT_VEND_WRITE, offset, val); mt7601u_wr()
178 trace_reg_write(dev, offset, val); mt7601u_wr()
181 u32 mt7601u_rmw(struct mt7601u_dev *dev, u32 offset, u32 mask, u32 val) mt7601u_rmw() argument
183 val |= mt7601u_rr(dev, offset) & ~mask; mt7601u_rmw()
184 mt7601u_wr(dev, offset, val); mt7601u_rmw()
188 u32 mt7601u_rmc(struct mt7601u_dev *dev, u32 offset, u32 mask, u32 val) mt7601u_rmc() argument
190 u32 reg = mt7601u_rr(dev, offset); mt7601u_rmc()
194 mt7601u_wr(dev, offset, val); mt7601u_rmc()
198 void mt7601u_wr_copy(struct mt7601u_dev *dev, u32 offset, mt7601u_wr_copy() argument
201 WARN_ONCE(offset & 3, "unaligned write copy off:%08x", offset); mt7601u_wr_copy()
202 WARN_ONCE(len & 3, "short write copy off:%08x", offset); mt7601u_wr_copy()
204 mt7601u_burst_write_regs(dev, offset, data, len / 4); mt7601u_wr_copy()
207 void mt7601u_addr_wr(struct mt7601u_dev *dev, const u32 offset, const u8 *addr) mt7601u_addr_wr() argument
209 mt7601u_wr(dev, offset, get_unaligned_le32(addr)); mt7601u_addr_wr()
210 mt7601u_wr(dev, offset + 4, addr[4] | addr[5] << 8); mt7601u_addr_wr()
95 mt7601u_vendor_request(struct mt7601u_dev *dev, const u8 req, const u8 direction, const u16 val, const u16 offset, void *buf, const size_t buflen) mt7601u_vendor_request() argument
155 mt7601u_vendor_single_wr(struct mt7601u_dev *dev, const u8 req, const u16 offset, const u32 val) mt7601u_vendor_single_wr() argument
|
| H A D | core.c | 36 bool mt76_poll(struct mt7601u_dev *dev, u32 offset, u32 mask, u32 val, mt76_poll() argument
46 cur = mt7601u_rr(dev, offset) & mask; mt76_poll()
53 dev_err(dev->dev, "Error: Time out with reg %08x\n", offset); mt76_poll()
58 bool mt76_poll_msec(struct mt7601u_dev *dev, u32 offset, u32 mask, u32 val, mt76_poll_msec() argument
68 cur = mt7601u_rr(dev, offset) & mask; mt76_poll_msec()
75 dev_err(dev->dev, "Error: Time out with reg %08x\n", offset); mt76_poll_msec()
|
| /linux-4.4.14/arch/arm/mach-w90x900/ |
| H A D | clksel.c | 41 unsigned int clksel, offset; clock_source_select() local
46 offset = MSOFFSET; clock_source_select()
48 offset = ATAOFFSET; clock_source_select()
50 offset = LCDOFFSET; clock_source_select()
52 offset = AUDOFFSET; clock_source_select()
54 offset = CPUOFFSET; clock_source_select()
56 clksel &= ~(0x03 << offset); clock_source_select()
57 clksel |= (clkval << offset); clock_source_select()
|
| H A D | gpio.c | 54 static int nuc900_gpio_get(struct gpio_chip *chip, unsigned offset) nuc900_gpio_get() argument
61 regval &= GPIO_GPIO(offset); nuc900_gpio_get()
66 static void nuc900_gpio_set(struct gpio_chip *chip, unsigned offset, int val) nuc900_gpio_set() argument
78 regval |= GPIO_GPIO(offset); nuc900_gpio_set()
80 regval &= ~GPIO_GPIO(offset); nuc900_gpio_set()
87 static int nuc900_dir_input(struct gpio_chip *chip, unsigned offset) nuc900_dir_input() argument
97 regval &= ~GPIO_GPIO(offset); nuc900_dir_input()
105 static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val) nuc900_dir_output() argument
116 regval |= GPIO_GPIO(offset); nuc900_dir_output()
122 regval |= GPIO_GPIO(offset); nuc900_dir_output()
124 regval &= ~GPIO_GPIO(offset); nuc900_dir_output()
|
| /linux-4.4.14/drivers/video/fbdev/mmp/fb/ |
| H A D | mmpfb.c | 40 if (var->green.offset >= var->blue.offset) var_to_pixfmt()
51 if (var->green.offset >= var->blue.offset) var_to_pixfmt()
62 if (var->red.offset == 0) var_to_pixfmt()
64 else if (var->green.offset >= var->blue.offset) var_to_pixfmt()
76 if (var->red.offset >= var->blue.offset) var_to_pixfmt()
89 if (var->red.offset >= var->blue.offset) var_to_pixfmt()
95 if (var->bits_per_pixel == 32 && var->transp.offset == 24) { var_to_pixfmt()
96 if (var->red.offset >= var->blue.offset) var_to_pixfmt()
101 if (var->red.offset >= var->blue.offset) var_to_pixfmt()
118 var->red.offset = 11; var->red.length = 5; pixfmt_to_var()
119 var->green.offset = 5; var->green.length = 6; pixfmt_to_var()
120 var->blue.offset = 0; var->blue.length = 5; pixfmt_to_var()
121 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
125 var->red.offset = 0; var->red.length = 5; pixfmt_to_var()
126 var->green.offset = 5; var->green.length = 6; pixfmt_to_var()
127 var->blue.offset = 11; var->blue.length = 5; pixfmt_to_var()
128 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
132 var->red.offset = 16; var->red.length = 8; pixfmt_to_var()
133 var->green.offset = 8; var->green.length = 8; pixfmt_to_var()
134 var->blue.offset = 0; var->blue.length = 8; pixfmt_to_var()
135 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
139 var->red.offset = 0; var->red.length = 8; pixfmt_to_var()
140 var->green.offset = 8; var->green.length = 8; pixfmt_to_var()
141 var->blue.offset = 16; var->blue.length = 8; pixfmt_to_var()
142 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
146 var->red.offset = 16; var->red.length = 8; pixfmt_to_var()
147 var->green.offset = 8; var->green.length = 8; pixfmt_to_var()
148 var->blue.offset = 0; var->blue.length = 8; pixfmt_to_var()
149 var->transp.offset = 24; var->transp.length = 8; pixfmt_to_var()
153 var->red.offset = 0; var->red.length = 8; pixfmt_to_var()
154 var->green.offset = 8; var->green.length = 8; pixfmt_to_var()
155 var->blue.offset = 16; var->blue.length = 8; pixfmt_to_var()
156 var->transp.offset = 24; var->transp.length = 8; pixfmt_to_var()
160 var->red.offset = 16; var->red.length = 8; pixfmt_to_var()
161 var->green.offset = 8; var->green.length = 8; pixfmt_to_var()
162 var->blue.offset = 0; var->blue.length = 8; pixfmt_to_var()
163 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
167 var->red.offset = 0; var->red.length = 8; pixfmt_to_var()
168 var->green.offset = 8; var->green.length = 8; pixfmt_to_var()
169 var->blue.offset = 16; var->blue.length = 8; pixfmt_to_var()
170 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
174 var->red.offset = 4; var->red.length = 8; pixfmt_to_var()
175 var->green.offset = 2; var->green.length = 2; pixfmt_to_var()
176 var->blue.offset = 0; var->blue.length = 2; pixfmt_to_var()
177 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
181 var->red.offset = 4; var->red.length = 8; pixfmt_to_var()
182 var->green.offset = 0; var->green.length = 2; pixfmt_to_var()
183 var->blue.offset = 2; var->blue.length = 2; pixfmt_to_var()
184 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
188 var->red.offset = 8; var->red.length = 8; pixfmt_to_var()
189 var->green.offset = 4; var->green.length = 4; pixfmt_to_var()
190 var->blue.offset = 0; var->blue.length = 4; pixfmt_to_var()
191 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
195 var->red.offset = 8; var->red.length = 8; pixfmt_to_var()
196 var->green.offset = 0; var->green.length = 4; pixfmt_to_var()
197 var->blue.offset = 4; var->blue.length = 4; pixfmt_to_var()
198 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
202 var->red.offset = 8; var->red.length = 16; pixfmt_to_var()
203 var->green.offset = 4; var->green.length = 16; pixfmt_to_var()
204 var->blue.offset = 0; var->blue.length = 16; pixfmt_to_var()
205 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
209 var->red.offset = 8; var->red.length = 16; pixfmt_to_var()
210 var->green.offset = 0; var->green.length = 16; pixfmt_to_var()
211 var->blue.offset = 4; var->blue.length = 16; pixfmt_to_var()
212 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
216 var->red.offset = 0; var->red.length = 16; pixfmt_to_var()
217 var->green.offset = 4; var->green.length = 16; pixfmt_to_var()
218 var->blue.offset = 8; var->blue.length = 16; pixfmt_to_var()
219 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
223 var->red.offset = 0; var->red.length = 8; pixfmt_to_var()
224 var->green.offset = 0; var->green.length = 8; pixfmt_to_var()
225 var->blue.offset = 0; var->blue.length = 8; pixfmt_to_var()
226 var->transp.offset = 0; var->transp.length = 0; pixfmt_to_var()
314 return ((chan & 0xffff) >> (16 - bf->length)) << bf->offset; chan_to_field()
|
| /linux-4.4.14/crypto/ |
| H A D | scatterwalk.c | 39 walk->offset = sg->offset; scatterwalk_start()
46 offset_in_page(walk->offset); scatterwalk_map()
56 page = sg_page(walk->sg) + ((walk->offset - 1) >> PAGE_SHIFT); scatterwalk_pagedone()
66 walk->offset += PAGE_SIZE - 1; scatterwalk_pagedone()
67 walk->offset &= PAGE_MASK; scatterwalk_pagedone()
68 if (walk->offset >= walk->sg->offset + walk->sg->length) scatterwalk_pagedone()
119 sg->offset == offset_in_page(buf)) scatterwalk_map_and_copy()
130 int offset = 0, n = 0; scatterwalk_bytes_sglen() local
137 offset += sg->length; scatterwalk_bytes_sglen()
142 if (unlikely(!sg && (num_bytes < offset))) scatterwalk_bytes_sglen()
144 } while (sg && (num_bytes > offset)); scatterwalk_bytes_sglen()
166 sg_set_page(dst, sg_page(src), src->length - len, src->offset + len); scatterwalk_ffwd()
|
| /linux-4.4.14/arch/microblaze/pci/ |
| H A D | indirect_pci.c | 23 indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, indirect_read_config() argument
46 reg = ((offset & 0xf00) << 16) | (offset & 0xfc); indirect_read_config()
48 reg = offset & 0xfc; /* Only 3 bits for function */ indirect_read_config()
58 * Note: the caller has already checked that offset is indirect_read_config()
61 cfg_data = hose->cfg_data + (offset & 3); /* Only 3 bits for function */ indirect_read_config()
77 indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, indirect_write_config() argument
100 reg = ((offset & 0xf00) << 16) | (offset & 0xfc); indirect_write_config()
102 reg = offset & 0xfc; indirect_write_config()
113 if ((offset == PCI_PRIMARY_BUS) && indirect_write_config()
119 offset == PCI_CACHE_LINE_SIZE) { indirect_write_config()
124 * Note: the caller has already checked that offset is indirect_write_config()
127 cfg_data = hose->cfg_data + (offset & 3); indirect_write_config()
|
| /linux-4.4.14/drivers/staging/rtl8712/ |
| H A D | rtl8712_efuse.h | 18 #define MAKE_EFUSE_HEADER(offset, word_en) (((offset & 0x0F) << 4) | \
22 u8 offset; member in struct:PGPKT_STRUCT
33 u8 offset, u8 *data);
35 const u8 offset, const u8 word_en,
|
| /linux-4.4.14/drivers/bcma/ |
| H A D | host_soc.c | 16 static u8 bcma_host_soc_read8(struct bcma_device *core, u16 offset) bcma_host_soc_read8() argument
18 return readb(core->io_addr + offset); bcma_host_soc_read8()
21 static u16 bcma_host_soc_read16(struct bcma_device *core, u16 offset) bcma_host_soc_read16() argument
23 return readw(core->io_addr + offset); bcma_host_soc_read16()
26 static u32 bcma_host_soc_read32(struct bcma_device *core, u16 offset) bcma_host_soc_read32() argument
28 return readl(core->io_addr + offset); bcma_host_soc_read32()
31 static void bcma_host_soc_write8(struct bcma_device *core, u16 offset, bcma_host_soc_write8() argument
34 writeb(value, core->io_addr + offset); bcma_host_soc_write8()
37 static void bcma_host_soc_write16(struct bcma_device *core, u16 offset, bcma_host_soc_write16() argument
40 writew(value, core->io_addr + offset); bcma_host_soc_write16()
43 static void bcma_host_soc_write32(struct bcma_device *core, u16 offset, bcma_host_soc_write32() argument
46 writel(value, core->io_addr + offset); bcma_host_soc_write32()
51 size_t count, u16 offset, u8 reg_width) bcma_host_soc_block_read()
53 void __iomem *addr = core->io_addr + offset; bcma_host_soc_block_read()
95 size_t count, u16 offset, u8 reg_width) bcma_host_soc_block_write()
97 void __iomem *addr = core->io_addr + offset; bcma_host_soc_block_write()
138 static u32 bcma_host_soc_aread32(struct bcma_device *core, u16 offset) bcma_host_soc_aread32() argument
142 return readl(core->io_wrap + offset); bcma_host_soc_aread32()
145 static void bcma_host_soc_awrite32(struct bcma_device *core, u16 offset, bcma_host_soc_awrite32() argument
150 writel(value, core->io_wrap + offset); bcma_host_soc_awrite32()
50 bcma_host_soc_block_read(struct bcma_device *core, void *buffer, size_t count, u16 offset, u8 reg_width) bcma_host_soc_block_read() argument
93 bcma_host_soc_block_write(struct bcma_device *core, const void *buffer, size_t count, u16 offset, u8 reg_width) bcma_host_soc_block_write() argument
|
| H A D | host_pci.c | 26 /* Provides access to the requested core. Returns base offset that has to be
42 static u8 bcma_host_pci_read8(struct bcma_device *core, u16 offset) bcma_host_pci_read8() argument
44 offset += bcma_host_pci_provide_access_to_core(core); bcma_host_pci_read8()
45 return ioread8(core->bus->mmio + offset); bcma_host_pci_read8()
48 static u16 bcma_host_pci_read16(struct bcma_device *core, u16 offset) bcma_host_pci_read16() argument
50 offset += bcma_host_pci_provide_access_to_core(core); bcma_host_pci_read16()
51 return ioread16(core->bus->mmio + offset); bcma_host_pci_read16()
54 static u32 bcma_host_pci_read32(struct bcma_device *core, u16 offset) bcma_host_pci_read32() argument
56 offset += bcma_host_pci_provide_access_to_core(core); bcma_host_pci_read32()
57 return ioread32(core->bus->mmio + offset); bcma_host_pci_read32()
60 static void bcma_host_pci_write8(struct bcma_device *core, u16 offset, bcma_host_pci_write8() argument
63 offset += bcma_host_pci_provide_access_to_core(core); bcma_host_pci_write8()
64 iowrite8(value, core->bus->mmio + offset); bcma_host_pci_write8()
67 static void bcma_host_pci_write16(struct bcma_device *core, u16 offset, bcma_host_pci_write16() argument
70 offset += bcma_host_pci_provide_access_to_core(core); bcma_host_pci_write16()
71 iowrite16(value, core->bus->mmio + offset); bcma_host_pci_write16()
74 static void bcma_host_pci_write32(struct bcma_device *core, u16 offset, bcma_host_pci_write32() argument
77 offset += bcma_host_pci_provide_access_to_core(core); bcma_host_pci_write32()
78 iowrite32(value, core->bus->mmio + offset); bcma_host_pci_write32()
83 size_t count, u16 offset, u8 reg_width) bcma_host_pci_block_read()
85 void __iomem *addr = core->bus->mmio + offset; bcma_host_pci_block_read()
107 u16 offset, u8 reg_width) bcma_host_pci_block_write()
109 void __iomem *addr = core->bus->mmio + offset; bcma_host_pci_block_write()
130 static u32 bcma_host_pci_aread32(struct bcma_device *core, u16 offset) bcma_host_pci_aread32() argument
134 return ioread32(core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset); bcma_host_pci_aread32()
137 static void bcma_host_pci_awrite32(struct bcma_device *core, u16 offset, bcma_host_pci_awrite32() argument
142 iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset); bcma_host_pci_awrite32()
82 bcma_host_pci_block_read(struct bcma_device *core, void *buffer, size_t count, u16 offset, u8 reg_width) bcma_host_pci_block_read() argument
105 bcma_host_pci_block_write(struct bcma_device *core, const void *buffer, size_t count, u16 offset, u8 reg_width) bcma_host_pci_block_write() argument
|
| /linux-4.4.14/drivers/clk/h8300/ |
| H A D | clk-div.c | 22 int offset; h8300_div_clk_setup() local
35 offset = (unsigned long)divcr & 3; h8300_div_clk_setup()
36 offset = (3 - offset) * 8; h8300_div_clk_setup()
42 CLK_SET_RATE_GATE, divcr, offset, width, h8300_div_clk_setup()
|
| /linux-4.4.14/drivers/clk/st/ |
| H A D | clkgen.h | 15 unsigned int offset; member in struct:clkgen_field
23 return (readl(base + field->offset) >> field->shift) & field->mask; clkgen_read()
30 writel((readl(base + field->offset) & clkgen_write()
32 base + field->offset); clkgen_write()
38 .offset = _offset, \
|
| /linux-4.4.14/arch/s390/pci/ |
| H A D | pci_insn.c | 16 static inline void zpci_err_insn(u8 cc, u8 status, u64 req, u64 offset) zpci_err_insn() argument
20 u64 offset; zpci_err_insn() member in struct:__anon2556
23 } __packed data = {req, offset, cc, status}; zpci_err_insn()
102 static inline int __pcilg(u64 *data, u64 req, u64 offset, u8 *status) __pcilg() argument
105 register u64 __offset asm("3") = offset; __pcilg()
125 int zpci_load(u64 *data, u64 req, u64 offset) zpci_load() argument
131 cc = __pcilg(data, req, offset, &status); zpci_load()
137 zpci_err_insn(cc, status, req, offset); zpci_load()
144 static inline int __pcistg(u64 data, u64 req, u64 offset, u8 *status) __pcistg() argument
147 register u64 __offset asm("3") = offset; __pcistg()
163 int zpci_store(u64 data, u64 req, u64 offset) zpci_store() argument
169 cc = __pcistg(data, req, offset, &status); zpci_store()
175 zpci_err_insn(cc, status, req, offset); zpci_store()
182 static inline int __pcistb(const u64 *data, u64 req, u64 offset, u8 *status) __pcistb() argument
187 " .insn rsy,0xeb00000000d0,%[req],%[offset],%[data]\n" __pcistb()
193 : [offset] "d" (offset), [data] "Q" (*data) __pcistb()
199 int zpci_store_block(const u64 *data, u64 req, u64 offset) zpci_store_block() argument
205 cc = __pcistb(data, req, offset, &status); zpci_store_block()
211 zpci_err_insn(cc, status, req, offset); zpci_store_block()
|
| /linux-4.4.14/arch/mips/alchemy/common/ |
| H A D | gpiolib.c | 41 static int gpio2_get(struct gpio_chip *chip, unsigned offset) gpio2_get() argument
43 return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE); gpio2_get()
46 static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value) gpio2_set() argument
48 alchemy_gpio2_set_value(offset + ALCHEMY_GPIO2_BASE, value); gpio2_set()
51 static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset) gpio2_direction_input() argument
53 return alchemy_gpio2_direction_input(offset + ALCHEMY_GPIO2_BASE); gpio2_direction_input()
56 static int gpio2_direction_output(struct gpio_chip *chip, unsigned offset, gpio2_direction_output() argument
59 return alchemy_gpio2_direction_output(offset + ALCHEMY_GPIO2_BASE, gpio2_direction_output()
63 static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset) gpio2_to_irq() argument
65 return alchemy_gpio2_to_irq(offset + ALCHEMY_GPIO2_BASE); gpio2_to_irq()
69 static int gpio1_get(struct gpio_chip *chip, unsigned offset) gpio1_get() argument
71 return alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE); gpio1_get()
75 unsigned offset, int value) gpio1_set()
77 alchemy_gpio1_set_value(offset + ALCHEMY_GPIO1_BASE, value); gpio1_set()
80 static int gpio1_direction_input(struct gpio_chip *chip, unsigned offset) gpio1_direction_input() argument
82 return alchemy_gpio1_direction_input(offset + ALCHEMY_GPIO1_BASE); gpio1_direction_input()
86 unsigned offset, int value) gpio1_direction_output()
88 return alchemy_gpio1_direction_output(offset + ALCHEMY_GPIO1_BASE, gpio1_direction_output()
92 static int gpio1_to_irq(struct gpio_chip *chip, unsigned offset) gpio1_to_irq() argument
94 return alchemy_gpio1_to_irq(offset + ALCHEMY_GPIO1_BASE); gpio1_to_irq()
74 gpio1_set(struct gpio_chip *chip, unsigned offset, int value) gpio1_set() argument
85 gpio1_direction_output(struct gpio_chip *chip, unsigned offset, int value) gpio1_direction_output() argument
|
| /linux-4.4.14/tools/testing/nvdimm/test/ |
| H A D | iomap.c | 54 void __iomem *__nfit_test_ioremap(resource_size_t offset, unsigned long size, __nfit_test_ioremap() argument
60 nfit_res = get_nfit_res(offset); __nfit_test_ioremap()
63 return (void __iomem *) nfit_res->buf + offset __nfit_test_ioremap()
65 return fallback_fn(offset, size); __nfit_test_ioremap()
69 resource_size_t offset, unsigned long size) __wrap_devm_ioremap_nocache()
74 nfit_res = get_nfit_res(offset); __wrap_devm_ioremap_nocache()
77 return (void __iomem *) nfit_res->buf + offset __wrap_devm_ioremap_nocache()
79 return devm_ioremap_nocache(dev, offset, size); __wrap_devm_ioremap_nocache()
83 void *__wrap_devm_memremap(struct device *dev, resource_size_t offset, __wrap_devm_memremap() argument
89 nfit_res = get_nfit_res(offset); __wrap_devm_memremap()
92 return nfit_res->buf + offset - nfit_res->res->start; __wrap_devm_memremap()
93 return devm_memremap(dev, offset, size, flags); __wrap_devm_memremap()
97 void *__wrap_memremap(resource_size_t offset, size_t size, __wrap_memremap() argument
103 nfit_res = get_nfit_res(offset); __wrap_memremap()
106 return nfit_res->buf + offset - nfit_res->res->start; __wrap_memremap()
107 return memremap(offset, size, flags); __wrap_memremap()
124 void __iomem *__wrap_ioremap_nocache(resource_size_t offset, unsigned long size) __wrap_ioremap_nocache() argument
126 return __nfit_test_ioremap(offset, size, ioremap_nocache); __wrap_ioremap_nocache()
130 void __iomem *__wrap_ioremap_wc(resource_size_t offset, unsigned long size) __wrap_ioremap_wc() argument
132 return __nfit_test_ioremap(offset, size, ioremap_wc); __wrap_ioremap_wc()
68 __wrap_devm_ioremap_nocache(struct device *dev, resource_size_t offset, unsigned long size) __wrap_devm_ioremap_nocache() argument
|
| /linux-4.4.14/drivers/staging/rtl8188eu/include/ |
| H A D | rtw_debug.h | 121 off_t offset, int count,
125 off_t offset, int count,
131 off_t offset, int count,
138 off_t offset, int count,
141 off_t offset, int count,
144 off_t offset, int count,
148 off_t offset, int count,
151 off_t offset, int count,
154 off_t offset, int count,
157 off_t offset, int count,
161 off_t offset, int count,
165 off_t offset, int count,
169 off_t offset, int count,
173 off_t offset, int count,
177 off_t offset, int count,
181 off_t offset, int count,
185 off_t offset, int count,
189 off_t offset, int count,
193 off_t offset, int count,
197 off_t offset, int count,
201 off_t offset, int count,
205 off_t offset, int count,
211 off_t offset, int count,
217 off_t offset, int count,
221 off_t offset, int count,
228 off_t offset, int count,
235 off_t offset, int count,
242 off_t offset, int count,
249 off_t offset, int count,
256 off_t offset, int count,
260 off_t offset, int count,
|
| /linux-4.4.14/fs/btrfs/tests/ |
| H A D | inode-tests.c | 27 u64 ram_bytes, u64 offset, u64 disk_bytenr, insert_extent()
45 key.offset = start; insert_extent()
54 btrfs_set_file_extent_offset(leaf, fi, offset); insert_extent()
76 key.offset = 0; insert_inode_item_key()
104 u64 offset = 0; setup_file_extents() local
107 insert_extent(root, offset, 5, 5, 0, 0, 0, BTRFS_FILE_EXTENT_REG, 0, setup_file_extents()
110 offset += 5; setup_file_extents()
118 insert_extent(root, offset, 1, 1, 0, 0, 0, BTRFS_FILE_EXTENT_INLINE, 0, setup_file_extents()
121 offset = 4096; setup_file_extents()
124 insert_extent(root, offset, 4, 4, 0, 0, 0, BTRFS_FILE_EXTENT_REG, 0, setup_file_extents()
127 offset += 4; setup_file_extents()
130 insert_extent(root, offset, 4095, 4095, 0, disk_bytenr, 4096, setup_file_extents()
134 offset += 4095; setup_file_extents()
140 insert_extent(root, offset, 4096, 16384, 0, disk_bytenr, 16384, setup_file_extents()
143 offset += 4096; setup_file_extents()
144 insert_extent(root, offset, 4096, 4096, 0, 0, 0, BTRFS_FILE_EXTENT_REG, setup_file_extents()
147 offset += 4096; setup_file_extents()
148 insert_extent(root, offset, 8192, 16384, 8192, disk_bytenr, 16384, setup_file_extents()
151 offset += 8192; setup_file_extents()
155 insert_extent(root, offset, 4096, 4096, 0, disk_bytenr, 4096, setup_file_extents()
158 offset += 4096; setup_file_extents()
171 insert_extent(root, offset, 4096, 16384, 0, disk_bytenr, 16384, setup_file_extents()
174 offset += 4096; setup_file_extents()
175 insert_extent(root, offset, 4096, 16384, 4096, disk_bytenr, 16384, setup_file_extents()
178 offset += 4096; setup_file_extents()
179 insert_extent(root, offset, 8192, 16384, 8192, disk_bytenr, 16384, setup_file_extents()
182 offset += 8192; setup_file_extents()
186 insert_extent(root, offset, 8192, 8192, 0, disk_bytenr, 4096, setup_file_extents()
189 offset += 8192; setup_file_extents()
194 insert_extent(root, offset, 4096, 16384, 0, disk_bytenr, 4096, setup_file_extents()
197 offset += 4096; setup_file_extents()
198 insert_extent(root, offset, 4096, 4096, 0, disk_bytenr + 4096, 4096, setup_file_extents()
201 offset += 4096; setup_file_extents()
202 insert_extent(root, offset, 8192, 16384, 8192, disk_bytenr, 4096, setup_file_extents()
205 offset += 8192; setup_file_extents()
209 insert_extent(root, offset, 4096, 4096, 0, disk_bytenr, 4096, setup_file_extents()
212 offset += 16384; setup_file_extents()
214 insert_extent(root, offset, 4096, 4096, 0, disk_bytenr, 4096, setup_file_extents()
229 u64 offset; test_btrfs_get_extent() local
240 BTRFS_I(inode)->location.offset = 0; test_btrfs_get_extent()
317 offset = em->start + em->len; test_btrfs_get_extent()
320 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
329 if (em->start != offset || em->len != 4091) { test_btrfs_get_extent()
331 "%llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
343 offset = em->start + em->len; test_btrfs_get_extent()
346 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
355 if (em->start != offset || em->len != 4) { test_btrfs_get_extent()
357 "%llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
364 offset = em->start + em->len; test_btrfs_get_extent()
368 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
377 if (em->start != offset || em->len != 4095) { test_btrfs_get_extent()
379 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
387 test_msg("Wrong orig offset, want %llu, have %llu\n", em->start, test_btrfs_get_extent()
391 offset = em->start + em->len; test_btrfs_get_extent()
395 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
404 if (em->start != offset || em->len != 4096) { test_btrfs_get_extent()
406 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
414 test_msg("Wrong orig offset, want %llu, have %llu\n", em->start, test_btrfs_get_extent()
420 offset = em->start + em->len; test_btrfs_get_extent()
423 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
432 if (em->start != offset || em->len != 4096) { test_btrfs_get_extent()
434 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
441 offset = em->start + em->len; test_btrfs_get_extent()
444 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
453 if (em->start != offset || em->len != 8192) { test_btrfs_get_extent()
455 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
463 test_msg("Wrong orig offset, want %llu, have %llu\n", test_btrfs_get_extent()
473 offset = em->start + em->len; test_btrfs_get_extent()
477 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
486 if (em->start != offset || em->len != 4096) { test_btrfs_get_extent()
488 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
497 test_msg("Wrong orig offset, want %llu, have %llu\n", em->start, test_btrfs_get_extent()
501 offset = em->start + em->len; test_btrfs_get_extent()
505 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
514 if (em->start != offset || em->len != 4096) { test_btrfs_get_extent()
516 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
525 test_msg("Wrong orig offset, want %llu, have %llu\n", em->start, test_btrfs_get_extent()
531 offset = em->start + em->len; test_btrfs_get_extent()
534 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
543 if (em->start != offset || em->len != 4096) { test_btrfs_get_extent()
545 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
553 test_msg("Unexpected orig offset, wanted %llu, have %llu\n", test_btrfs_get_extent()
563 offset = em->start + em->len; test_btrfs_get_extent()
566 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
575 if (em->start != offset || em->len != 8192) { test_btrfs_get_extent()
577 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
586 test_msg("Wrong orig offset, want %llu, have %llu\n", orig_start, test_btrfs_get_extent()
596 offset = em->start + em->len; test_btrfs_get_extent()
600 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
609 if (em->start != offset || em->len != 8192) { test_btrfs_get_extent()
611 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
620 test_msg("Wrong orig offset, want %llu, have %llu\n", test_btrfs_get_extent()
629 offset = em->start + em->len; test_btrfs_get_extent()
633 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
642 if (em->start != offset || em->len != 4096) { test_btrfs_get_extent()
644 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
653 test_msg("Wrong orig offset, want %llu, have %llu\n", test_btrfs_get_extent()
664 offset = em->start + em->len; test_btrfs_get_extent()
667 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
676 if (em->start != offset || em->len != 4096) { test_btrfs_get_extent()
678 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
686 test_msg("Wrong orig offset, want %llu, have %llu\n", em->start, test_btrfs_get_extent()
690 offset = em->start + em->len; test_btrfs_get_extent()
693 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
703 if (em->start != offset || em->len != 8192) { test_btrfs_get_extent()
705 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
714 test_msg("Wrong orig offset, want %llu, have %llu\n", test_btrfs_get_extent()
723 offset = em->start + em->len; test_btrfs_get_extent()
727 em = btrfs_get_extent(inode, NULL, 0, offset + 6, 4096, 0); test_btrfs_get_extent()
736 if (em->start != offset || em->len != 4096) { test_btrfs_get_extent()
738 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
746 test_msg("Wrong orig offset, want %llu, have %llu\n", em->start, test_btrfs_get_extent()
750 offset = em->start + em->len; test_btrfs_get_extent()
753 em = btrfs_get_extent(inode, NULL, 0, offset, 4096 * 1024, 0); test_btrfs_get_extent()
767 if (em->start != offset || em->len != 12288) { test_btrfs_get_extent()
769 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
778 test_msg("Wrong orig offset, want %llu, have %llu\n", em->start, test_btrfs_get_extent()
782 offset = em->start + em->len; test_btrfs_get_extent()
785 em = btrfs_get_extent(inode, NULL, 0, offset, 4096, 0); test_btrfs_get_extent()
794 if (em->start != offset || em->len != 4096) { test_btrfs_get_extent()
796 "start %llu len %llu\n", offset, em->start, em->len); test_btrfs_get_extent()
804 test_msg("Wrong orig offset, want %llu, have %llu\n", em->start, test_btrfs_get_extent()
832 BTRFS_I(inode)->location.offset = 0; test_hole_first()
26 insert_extent(struct btrfs_root *root, u64 start, u64 len, u64 ram_bytes, u64 offset, u64 disk_bytenr, u64 disk_len, u32 type, u8 compression, int slot) insert_extent() argument
|
| /linux-4.4.14/arch/cris/arch-v32/mm/ |
| H A D | intmem.c | 24 unsigned offset; member in struct:intmem_allocation
43 alloc->offset = 0; crisv32_intmem_init()
59 int alignment = allocation->offset % align; crisv32_intmem_alloc()
70 alloc->offset = allocation->offset + size + crisv32_intmem_alloc()
77 tmp->offset = allocation->offset; crisv32_intmem_alloc()
80 allocation->offset += alignment; crisv32_intmem_alloc()
87 ret = (void*)((int)intmem_virtual + allocation->offset); crisv32_intmem_alloc()
106 if (allocation->offset == (int)(addr - intmem_virtual)) { crisv32_intmem_free()
|
| /linux-4.4.14/net/wireless/ |
| H A D | debugfs.c | 44 char *buf, int buf_size, int offset) ht_print_chan()
46 if (WARN_ON(offset > buf_size)) ht_print_chan()
50 return scnprintf(buf + offset, ht_print_chan()
51 buf_size - offset, ht_print_chan()
55 return scnprintf(buf + offset, ht_print_chan()
56 buf_size - offset, ht_print_chan()
71 unsigned int offset = 0, buf_size = PAGE_SIZE, i, r; ht40allow_map_read() local
86 offset += ht_print_chan(&sband->channels[i], ht40allow_map_read()
87 buf, buf_size, offset); ht40allow_map_read()
92 r = simple_read_from_buffer(user_buf, count, ppos, buf, offset); ht40allow_map_read()
43 ht_print_chan(struct ieee80211_channel *chan, char *buf, int buf_size, int offset) ht_print_chan() argument
|
| /linux-4.4.14/arch/mips/sibyte/swarm/ |
| H A D | platform.c | 53 phys_addr_t offset, size; swarm_pata_init() local
60 offset = __raw_readq(base + R_IO_EXT_REG(R_IO_EXT_START_ADDR, IDE_CS)); swarm_pata_init()
64 offset = G_IO_START_ADDR(offset) << S_IO_ADDRBASE; swarm_pata_init()
66 if (offset < A_PHYS_GENBUS || offset >= A_PHYS_GENBUS_END) { swarm_pata_init()
75 r[0].start = offset + (SWARM_IDE_BASE << SWARM_IDE_SHIFT); swarm_pata_init()
76 r[0].end = offset + ((SWARM_IDE_BASE + 8) << SWARM_IDE_SHIFT) - 1; swarm_pata_init()
77 r[1].start = offset + (SWARM_IDE_CTRL << SWARM_IDE_SHIFT); swarm_pata_init()
78 r[1].end = offset + ((SWARM_IDE_CTRL + 1) << SWARM_IDE_SHIFT) - 1; swarm_pata_init()
|
| /linux-4.4.14/arch/ia64/kernel/ |
| H A D | cyclone.c | 41 u64 offset; /* offset from pageaddr to cyclone_timer register */ init_cyclone_clock() local
51 offset = (CYCLONE_CBAR_ADDR); init_cyclone_clock()
52 reg = ioremap_nocache(offset, sizeof(u64)); init_cyclone_clock()
69 offset = (base + CYCLONE_PMCC_OFFSET); init_cyclone_clock()
70 reg = ioremap_nocache(offset, sizeof(u64)); init_cyclone_clock()
81 offset = (base + CYCLONE_MPCS_OFFSET); init_cyclone_clock()
82 reg = ioremap_nocache(offset, sizeof(u64)); init_cyclone_clock()
93 offset = (base + CYCLONE_MPMC_OFFSET); init_cyclone_clock()
94 cyclone_timer = ioremap_nocache(offset, sizeof(u32)); init_cyclone_clock()
|
| H A D | minstate.h | 99 .mem.offset 0,0; st8.spill [r16]=r8,16; \
100 .mem.offset 8,0; st8.spill [r17]=r9,16; \
102 .mem.offset 0,0; st8.spill [r16]=r10,24; \
103 .mem.offset 8,0; st8.spill [r17]=r11,24; \
129 .mem.offset 0,0; st8.spill [r16]=r20,16; /* save original r1 */ \
130 .mem.offset 8,0; st8.spill [r17]=r12,16; \
133 .mem.offset 0,0; st8.spill [r16]=r13,16; \
134 .mem.offset 8,0; st8.spill [r17]=r21,16; /* save ar.fpsr */ \
137 .mem.offset 0,0; st8.spill [r16]=r15,16; \
138 .mem.offset 8,0; st8.spill [r17]=r14,16; \
140 .mem.offset 0,0; st8.spill [r16]=r2,16; \
141 .mem.offset 8,0; st8.spill [r17]=r3,16; \
167 .mem.offset 0,0; st8.spill [r2]=r16,16; \
168 .mem.offset 8,0; st8.spill [r3]=r17,16; \
170 .mem.offset 0,0; st8.spill [r2]=r18,16; \
171 .mem.offset 8,0; st8.spill [r3]=r19,16; \
173 .mem.offset 0,0; st8.spill [r2]=r20,16; \
174 .mem.offset 8,0; st8.spill [r3]=r21,16; \
177 .mem.offset 0,0; st8.spill [r2]=r22,16; \
178 .mem.offset 8,0; st8.spill [r3]=r23,16; \
181 .mem.offset 0,0; st8.spill [r2]=r24,16; \
182 .mem.offset 8,0; st8.spill [r3]=r25,16; \
184 .mem.offset 0,0; st8.spill [r2]=r26,16; \
185 .mem.offset 8,0; st8.spill [r3]=r27,16; \
187 .mem.offset 0,0; st8.spill [r2]=r28,16; \
188 .mem.offset 8,0; st8.spill [r3]=r29,16; \
190 .mem.offset 0,0; st8.spill [r2]=r30,16; \
191 .mem.offset 8,0; st8.spill [r3]=r31,32; \
|
| /linux-4.4.14/arch/arm/boot/compressed/ |
| H A D | atags_to_fdt.c | 14 int offset = fdt_path_offset(fdt, node_path); node_offset() local
15 if (offset == -FDT_ERR_NOTFOUND) node_offset()
16 offset = fdt_add_subnode(fdt, 0, node_path); node_offset()
17 return offset; node_offset()
23 int offset = node_offset(fdt, node_path); setprop() local
24 if (offset < 0) setprop()
25 return offset; setprop()
26 return fdt_setprop(fdt, offset, property, val_array, size); setprop()
32 int offset = node_offset(fdt, node_path); setprop_string() local
33 if (offset < 0) setprop_string()
34 return offset; setprop_string()
35 return fdt_setprop_string(fdt, offset, property, string); setprop_string()
41 int offset = node_offset(fdt, node_path); setprop_cell() local
42 if (offset < 0) setprop_cell()
43 return offset; setprop_cell()
44 return fdt_setprop_cell(fdt, offset, property, val); setprop_cell()
50 int offset = fdt_path_offset(fdt, node_path); getprop() local
52 if (offset == -FDT_ERR_NOTFOUND) getprop()
55 return fdt_getprop(fdt, offset, property, len); getprop()
|
| /linux-4.4.14/fs/btrfs/ |
| H A D | struct-funcs.c | 45 * an unsigned long offset into the extent buffer which has been
58 unsigned long offset = part_offset + off; \
67 if (token && token->kaddr && token->offset <= offset && \
69 (token->offset + PAGE_CACHE_SIZE >= offset + size)) { \
71 p = kaddr + part_offset - token->offset; \
75 err = map_private_extent_buffer(eb, offset, size, \
80 read_extent_buffer(eb, &leres, offset, size); \
87 token->offset = map_start; \
97 unsigned long offset = part_offset + off; \
105 if (token && token->kaddr && token->offset <= offset && \
107 (token->offset + PAGE_CACHE_SIZE >= offset + size)) { \
109 p = kaddr + part_offset - token->offset; \
113 err = map_private_extent_buffer(eb, offset, size, \
119 write_extent_buffer(eb, &val2, offset, size); \
126 token->offset = map_start; \
|
| H A D | free-space-cache.c | 48 u64 offset) __lookup_free_space_inode()
59 key.offset = offset; __lookup_free_space_inode()
134 u64 ino, u64 offset) __create_free_space_inode()
167 btrfs_set_inode_block_group(leaf, inode_item, offset); __create_free_space_inode()
172 key.offset = offset; __create_free_space_inode()
467 unsigned offset = 0; io_ctl_set_crc() local
475 offset = sizeof(u32) * io_ctl->num_pages; io_ctl_set_crc()
477 crc = btrfs_csum_data(io_ctl->orig + offset, crc, io_ctl_set_crc()
478 PAGE_CACHE_SIZE - offset); io_ctl_set_crc()
490 unsigned offset = 0; io_ctl_check_crc() local
498 offset = sizeof(u32) * io_ctl->num_pages; io_ctl_check_crc()
505 crc = btrfs_csum_data(io_ctl->orig + offset, crc, io_ctl_check_crc()
506 PAGE_CACHE_SIZE - offset); io_ctl_check_crc()
518 static int io_ctl_add_entry(struct btrfs_io_ctl *io_ctl, u64 offset, u64 bytes, io_ctl_add_entry() argument
527 entry->offset = cpu_to_le64(offset); io_ctl_add_entry()
601 entry->offset = le64_to_cpu(e->offset); io_ctl_read_entry()
652 if (prev->offset + prev->bytes == e->offset) { merge_space_tree()
670 struct btrfs_path *path, u64 offset) __load_free_space_cache()
689 key.offset = offset; __load_free_space_cache()
713 offset); __load_free_space_cache()
876 matched = (ctl->free_space == (block_group->key.offset - used - load_free_space_cache()
936 ret = io_ctl_add_entry(io_ctl, e->offset, e->bytes, write_cache_extent_entries()
983 struct btrfs_path *path, u64 offset, update_cache_item()
992 key.offset = offset; update_cache_item()
1009 found_key.offset != offset) { update_cache_item()
1058 while (start < block_group->key.objectid + block_group->key.offset) { write_pinned_extent_entries()
1067 block_group->key.offset) write_pinned_extent_entries()
1072 block_group->key.offset, extent_end + 1); write_pinned_extent_entries()
1147 struct btrfs_path *path, u64 offset) btrfs_wait_cache_io()
1164 ret = update_cache_item(trans, root, inode, path, offset, btrfs_wait_cache_io()
1215 * @offset - the offset for the key we'll insert
1226 struct btrfs_path *path, u64 offset) __btrfs_write_out_cache()
1408 u64 offset) offset_to_bit()
1410 ASSERT(offset >= bitmap_start); offset_to_bit()
1411 offset -= bitmap_start; offset_to_bit()
1412 return (unsigned long)(div_u64(offset, unit)); offset_to_bit()
1421 u64 offset) offset_to_bitmap()
1427 bitmap_start = offset - ctl->start; offset_to_bitmap()
1435 static int tree_insert_offset(struct rb_root *root, u64 offset, tree_insert_offset() argument
1446 if (offset < info->offset) { tree_insert_offset()
1448 } else if (offset > info->offset) { tree_insert_offset()
1453 * share the same offset. If this is the case, we want tree_insert_offset()
1459 * this offset, we want to go right, or after this entry tree_insert_offset()
1487 * searches the tree for the given offset.
1491 * offset.
1495 u64 offset, int bitmap_only, int fuzzy) tree_search_offset()
1500 /* find entry that is closest to the 'offset' */ tree_search_offset()
1510 if (offset < entry->offset) tree_search_offset()
1512 else if (offset > entry->offset) tree_search_offset()
1525 * bitmap entry and extent entry may share same offset, tree_search_offset()
1532 if (entry->offset != offset) tree_search_offset()
1540 * if previous extent entry covers the offset, tree_search_offset()
1548 prev->offset + prev->bytes > offset) tree_search_offset()
1558 /* find last entry before the 'offset' */ tree_search_offset()
1560 if (entry->offset > offset) { tree_search_offset()
1565 ASSERT(entry->offset <= offset); tree_search_offset()
1580 prev->offset + prev->bytes > offset) tree_search_offset()
1583 if (entry->offset + BITS_PER_BITMAP * ctl->unit > offset) tree_search_offset()
1585 } else if (entry->offset + entry->bytes > offset) tree_search_offset()
1593 if (entry->offset + BITS_PER_BITMAP * tree_search_offset()
1594 ctl->unit > offset) tree_search_offset()
1597 if (entry->offset + entry->bytes > offset) tree_search_offset()
1630 ret = tree_insert_offset(&ctl->free_space_offset, info->offset, link_free_space()
1646 u64 size = block_group->key.offset; recalculate_thresholds()
1690 u64 offset, u64 bytes) __bitmap_clear_bits()
1694 start = offset_to_bit(info->offset, ctl->unit, offset); __bitmap_clear_bits()
1704 struct btrfs_free_space *info, u64 offset, bitmap_clear_bits()
1707 __bitmap_clear_bits(ctl, info, offset, bytes); bitmap_clear_bits()
1712 struct btrfs_free_space *info, u64 offset, bitmap_set_bits()
1717 start = offset_to_bit(info->offset, ctl->unit, offset); bitmap_set_bits()
1732 struct btrfs_free_space *bitmap_info, u64 *offset, search_bitmap()
1752 i = offset_to_bit(bitmap_info->offset, ctl->unit, search_bitmap()
1753 max_t(u64, *offset, bitmap_info->offset)); search_bitmap()
1774 *offset = (u64)(i * ctl->unit) + bitmap_info->offset; search_bitmap()
1786 find_free_space(struct btrfs_free_space_ctl *ctl, u64 *offset, u64 *bytes, find_free_space() argument
1798 entry = tree_search_offset(ctl, offset_to_bitmap(ctl, *offset), 0, 1); find_free_space()
1814 tmp = entry->offset - ctl->start + align - 1; find_free_space()
1817 align_off = tmp - entry->offset; find_free_space()
1820 tmp = entry->offset; find_free_space()
1834 *offset = tmp; find_free_space()
1843 *offset = tmp; find_free_space()
1852 struct btrfs_free_space *info, u64 offset) add_new_bitmap()
1854 info->offset = offset_to_bitmap(ctl, offset); add_new_bitmap()
1875 u64 *offset, u64 *bytes) remove_from_bitmap()
1882 end = bitmap_info->offset + (u64)(BITS_PER_BITMAP * ctl->unit) - 1; remove_from_bitmap()
1890 search_start = *offset; remove_from_bitmap()
1895 if (ret < 0 || search_start != *offset) remove_from_bitmap()
1905 *offset += search_bytes; remove_from_bitmap()
1936 search_start = *offset; remove_from_bitmap()
1940 if (ret < 0 || search_start != *offset) remove_from_bitmap()
1951 struct btrfs_free_space *info, u64 offset, add_bytes_to_bitmap()
1957 end = info->offset + (u64)(BITS_PER_BITMAP * ctl->unit); add_bytes_to_bitmap()
1959 bytes_to_set = min(end - offset, bytes); add_bytes_to_bitmap()
1961 bitmap_set_bits(ctl, info, offset, bytes_to_set); add_bytes_to_bitmap()
2013 if (((BITS_PER_BITMAP * ctl->unit) >> 1) > block_group->key.offset) use_bitmap()
2030 u64 bytes, offset, bytes_added; insert_into_bitmap() local
2034 offset = info->offset; insert_into_bitmap()
2068 if (entry->offset == offset_to_bitmap(ctl, offset)) { insert_into_bitmap()
2070 offset, bytes); insert_into_bitmap()
2072 offset += bytes_added; insert_into_bitmap()
2082 bitmap_info = tree_search_offset(ctl, offset_to_bitmap(ctl, offset), insert_into_bitmap()
2089 bytes_added = add_bytes_to_bitmap(ctl, bitmap_info, offset, bytes); insert_into_bitmap()
2091 offset += bytes_added; insert_into_bitmap()
2102 add_new_bitmap(ctl, info, offset); insert_into_bitmap()
2146 u64 offset = info->offset; try_merge_free_space() local
2154 right_info = tree_search_offset(ctl, offset + bytes, 0, 0); try_merge_free_space()
2159 left_info = tree_search_offset(ctl, offset - 1, 0, 0); try_merge_free_space()
2172 left_info->offset + left_info->bytes == offset) { try_merge_free_space()
2177 info->offset = left_info->offset; try_merge_free_space()
2193 const u64 end = info->offset + info->bytes; steal_from_bitmap_to_end()
2201 i = offset_to_bit(bitmap->offset, ctl->unit, end); steal_from_bitmap_to_end()
2230 bitmap_offset = offset_to_bitmap(ctl, info->offset); steal_from_bitmap_to_front()
2232 if (bitmap_offset == info->offset) { steal_from_bitmap_to_front()
2233 if (info->offset == 0) steal_from_bitmap_to_front()
2235 bitmap_offset = offset_to_bitmap(ctl, info->offset - 1); steal_from_bitmap_to_front()
2242 i = offset_to_bit(bitmap->offset, ctl->unit, info->offset) - 1; steal_from_bitmap_to_front()
2258 info->offset -= bytes; steal_from_bitmap_to_front()
2262 bitmap_clear_bits(ctl, bitmap, info->offset, bytes); steal_from_bitmap_to_front()
2264 __bitmap_clear_bits(ctl, bitmap, info->offset, bytes); steal_from_bitmap_to_front()
2288 * Only work with disconnected entries, as we can change their offset, steal_from_bitmap()
2309 u64 offset, u64 bytes) __btrfs_add_free_space()
2318 info->offset = offset; __btrfs_add_free_space()
2363 u64 offset, u64 bytes) btrfs_remove_free_space()
2377 info = tree_search_offset(ctl, offset, 0, 0); btrfs_remove_free_space()
2383 info = tree_search_offset(ctl, offset_to_bitmap(ctl, offset), btrfs_remove_free_space()
2399 if (offset == info->offset) { btrfs_remove_free_space()
2403 info->offset += to_free; btrfs_remove_free_space()
2411 offset += to_free; btrfs_remove_free_space()
2415 u64 old_end = info->bytes + info->offset; btrfs_remove_free_space()
2417 info->bytes = offset - info->offset; btrfs_remove_free_space()
2424 if (old_end < offset + bytes) { btrfs_remove_free_space()
2425 bytes -= old_end - offset; btrfs_remove_free_space()
2426 offset = old_end; btrfs_remove_free_space()
2428 } else if (old_end == offset + bytes) { btrfs_remove_free_space()
2434 ret = btrfs_add_free_space(block_group, offset + bytes, btrfs_remove_free_space()
2435 old_end - (offset + bytes)); btrfs_remove_free_space()
2441 ret = remove_from_bitmap(ctl, info, &offset, &bytes); btrfs_remove_free_space()
2465 "entry offset %llu, bytes %llu, bitmap %s", btrfs_dump_free_space()
2466 info->offset, info->bytes, btrfs_dump_free_space()
2534 entry->offset, &entry->offset_index, bitmap); __btrfs_return_cluster_to_free_space()
2593 u64 offset, u64 bytes, u64 empty_size, btrfs_find_space_for_alloc()
2604 entry = find_free_space(ctl, &offset, &bytes_search, btrfs_find_space_for_alloc()
2609 ret = offset; btrfs_find_space_for_alloc()
2611 bitmap_clear_bits(ctl, entry, offset, bytes); btrfs_find_space_for_alloc()
2616 align_gap_len = offset - entry->offset; btrfs_find_space_for_alloc()
2617 align_gap = entry->offset; btrfs_find_space_for_alloc()
2619 entry->offset = offset + bytes; btrfs_find_space_for_alloc()
2709 * if it couldn't find anything suitably large, or a logical disk offset
2738 (!entry->bitmap && entry->offset < min_start)) { btrfs_alloc_from_cluster()
2762 ret = entry->offset; btrfs_alloc_from_cluster()
2764 entry->offset += bytes; btrfs_alloc_from_cluster()
2799 u64 offset, u64 bytes, btrfs_bitmap_cluster()
2813 i = offset_to_bit(entry->offset, ctl->unit, btrfs_bitmap_cluster()
2814 max_t(u64, offset, entry->offset)); btrfs_bitmap_cluster()
2861 cluster->window_start = start * ctl->unit + entry->offset; btrfs_bitmap_cluster()
2863 ret = tree_insert_offset(&cluster->root, entry->offset, btrfs_bitmap_cluster()
2880 struct list_head *bitmaps, u64 offset, u64 bytes, setup_cluster_no_bitmap()
2892 entry = tree_search_offset(ctl, offset, 0, 1); setup_cluster_no_bitmap()
2936 cluster->window_start = first->offset; setup_cluster_no_bitmap()
2953 ret = tree_insert_offset(&cluster->root, entry->offset, setup_cluster_no_bitmap()
2971 struct list_head *bitmaps, u64 offset, u64 bytes, setup_cluster_bitmap()
2977 u64 bitmap_offset = offset_to_bitmap(ctl, offset); setup_cluster_bitmap()
2983 * The bitmap that covers offset won't be in the list unless offset setup_cluster_bitmap()
2984 * is just its start offset. setup_cluster_bitmap()
2989 if (!entry || entry->offset != bitmap_offset) { setup_cluster_bitmap()
2998 ret = btrfs_bitmap_cluster(block_group, entry, cluster, offset, list_for_each_entry()
3006 * starting after offset, so no more search is required.
3022 u64 offset, u64 bytes, u64 empty_size) btrfs_find_space_cluster()
3066 trace_btrfs_find_cluster(block_group, offset, bytes, empty_size, btrfs_find_space_cluster()
3069 ret = setup_cluster_no_bitmap(block_group, cluster, &bitmaps, offset, btrfs_find_space_cluster()
3074 offset, bytes + empty_size, btrfs_find_space_cluster()
3198 if (entry->offset >= end) { trim_no_bitmap()
3204 extent_start = entry->offset; trim_no_bitmap()
3249 u64 offset = offset_to_bitmap(ctl, start); trim_bitmaps() local
3251 while (offset < end) { trim_bitmaps()
3264 entry = tree_search_offset(ctl, offset, 1, 0); trim_bitmaps()
3304 offset += BITS_PER_BITMAP * ctl->unit; trim_bitmaps()
3307 if (start >= offset + BITS_PER_BITMAP * ctl->unit) trim_bitmaps()
3308 offset += BITS_PER_BITMAP * ctl->unit; trim_bitmaps()
3412 ino = entry->offset; btrfs_find_ino_for_alloc()
3415 entry->offset++; btrfs_find_ino_for_alloc()
3422 u64 offset = 0; btrfs_find_ino_for_alloc() local
3426 ret = search_bitmap(ctl, entry, &offset, &count, true); btrfs_find_ino_for_alloc()
3430 ino = offset; btrfs_find_ino_for_alloc()
3431 bitmap_clear_bits(ctl, entry, offset, 1); btrfs_find_ino_for_alloc()
3563 u64 offset, u64 bytes, bool bitmap) test_add_free_space_entry()
3580 info->offset = offset; test_add_free_space_entry()
3599 bitmap_info = tree_search_offset(ctl, offset_to_bitmap(ctl, offset), test_add_free_space_entry()
3604 add_new_bitmap(ctl, info, offset); test_add_free_space_entry()
3609 bytes_added = add_bytes_to_bitmap(ctl, bitmap_info, offset, bytes); test_add_free_space_entry()
3612 offset += bytes_added; test_add_free_space_entry()
3631 u64 offset, u64 bytes) test_check_exists()
3638 info = tree_search_offset(ctl, offset, 0, 0); test_check_exists()
3640 info = tree_search_offset(ctl, offset_to_bitmap(ctl, offset), test_check_exists()
3652 bit_off = offset; test_check_exists()
3656 if (bit_off == offset) { test_check_exists()
3659 } else if (bit_off > offset && test_check_exists()
3660 offset + bytes > bit_off) { test_check_exists()
3670 if (tmp->offset + tmp->bytes < offset) test_check_exists()
3672 if (offset + bytes < tmp->offset) { test_check_exists()
3684 if (offset + bytes < tmp->offset) test_check_exists()
3686 if (tmp->offset + tmp->bytes < offset) { test_check_exists()
3698 if (info->offset == offset) { test_check_exists()
3703 if (offset > info->offset && offset < info->offset + info->bytes) test_check_exists()
46 __lookup_free_space_inode(struct btrfs_root *root, struct btrfs_path *path, u64 offset) __lookup_free_space_inode() argument
131 __create_free_space_inode(struct btrfs_root *root, struct btrfs_trans_handle *trans, struct btrfs_path *path, u64 ino, u64 offset) __create_free_space_inode() argument
668 __load_free_space_cache(struct btrfs_root *root, struct inode *inode, struct btrfs_free_space_ctl *ctl, struct btrfs_path *path, u64 offset) __load_free_space_cache() argument
980 update_cache_item(struct btrfs_trans_handle *trans, struct btrfs_root *root, struct inode *inode, struct btrfs_path *path, u64 offset, int entries, int bitmaps) update_cache_item() argument
1143 btrfs_wait_cache_io(struct btrfs_root *root, struct btrfs_trans_handle *trans, struct btrfs_block_group_cache *block_group, struct btrfs_io_ctl *io_ctl, struct btrfs_path *path, u64 offset) btrfs_wait_cache_io() argument
1221 __btrfs_write_out_cache(struct btrfs_root *root, struct inode *inode, struct btrfs_free_space_ctl *ctl, struct btrfs_block_group_cache *block_group, struct btrfs_io_ctl *io_ctl, struct btrfs_trans_handle *trans, struct btrfs_path *path, u64 offset) __btrfs_write_out_cache() argument
1407 offset_to_bit(u64 bitmap_start, u32 unit, u64 offset) offset_to_bit() argument
1420 offset_to_bitmap(struct btrfs_free_space_ctl *ctl, u64 offset) offset_to_bitmap() argument
1494 tree_search_offset(struct btrfs_free_space_ctl *ctl, u64 offset, int bitmap_only, int fuzzy) tree_search_offset() argument
1688 __bitmap_clear_bits(struct btrfs_free_space_ctl *ctl, struct btrfs_free_space *info, u64 offset, u64 bytes) __bitmap_clear_bits() argument
1703 bitmap_clear_bits(struct btrfs_free_space_ctl *ctl, struct btrfs_free_space *info, u64 offset, u64 bytes) bitmap_clear_bits() argument
1711 bitmap_set_bits(struct btrfs_free_space_ctl *ctl, struct btrfs_free_space *info, u64 offset, u64 bytes) bitmap_set_bits() argument
1731 search_bitmap(struct btrfs_free_space_ctl *ctl, struct btrfs_free_space *bitmap_info, u64 *offset, u64 *bytes, bool for_alloc) search_bitmap() argument
1851 add_new_bitmap(struct btrfs_free_space_ctl *ctl, struct btrfs_free_space *info, u64 offset) add_new_bitmap() argument
1873 remove_from_bitmap(struct btrfs_free_space_ctl *ctl, struct btrfs_free_space *bitmap_info, u64 *offset, u64 *bytes) remove_from_bitmap() argument
1950 add_bytes_to_bitmap(struct btrfs_free_space_ctl *ctl, struct btrfs_free_space *info, u64 offset, u64 bytes) add_bytes_to_bitmap() argument
2308 __btrfs_add_free_space(struct btrfs_free_space_ctl *ctl, u64 offset, u64 bytes) __btrfs_add_free_space() argument
2362 btrfs_remove_free_space(struct btrfs_block_group_cache *block_group, u64 offset, u64 bytes) btrfs_remove_free_space() argument
2592 btrfs_find_space_for_alloc(struct btrfs_block_group_cache *block_group, u64 offset, u64 bytes, u64 empty_size, u64 *max_extent_size) btrfs_find_space_for_alloc() argument
2796 btrfs_bitmap_cluster(struct btrfs_block_group_cache *block_group, struct btrfs_free_space *entry, struct btrfs_free_cluster *cluster, u64 offset, u64 bytes, u64 cont1_bytes, u64 min_bytes) btrfs_bitmap_cluster() argument
2878 setup_cluster_no_bitmap(struct btrfs_block_group_cache *block_group, struct btrfs_free_cluster *cluster, struct list_head *bitmaps, u64 offset, u64 bytes, u64 cont1_bytes, u64 min_bytes) setup_cluster_no_bitmap() argument
2969 setup_cluster_bitmap(struct btrfs_block_group_cache *block_group, struct btrfs_free_cluster *cluster, struct list_head *bitmaps, u64 offset, u64 bytes, u64 cont1_bytes, u64 min_bytes) setup_cluster_bitmap() argument
3019 btrfs_find_space_cluster(struct btrfs_root *root, struct btrfs_block_group_cache *block_group, struct btrfs_free_cluster *cluster, u64 offset, u64 bytes, u64 empty_size) btrfs_find_space_cluster() argument
3562 test_add_free_space_entry(struct btrfs_block_group_cache *cache, u64 offset, u64 bytes, bool bitmap) test_add_free_space_entry() argument
3630 test_check_exists(struct btrfs_block_group_cache *cache, u64 offset, u64 bytes) test_check_exists() argument
|
| H A D | orphan.c | 23 struct btrfs_root *root, u64 offset) btrfs_insert_orphan_item()
31 key.offset = offset; btrfs_insert_orphan_item()
44 struct btrfs_root *root, u64 offset) btrfs_del_orphan_item()
52 key.offset = offset; btrfs_del_orphan_item()
22 btrfs_insert_orphan_item(struct btrfs_trans_handle *trans, struct btrfs_root *root, u64 offset) btrfs_insert_orphan_item() argument
43 btrfs_del_orphan_item(struct btrfs_trans_handle *trans, struct btrfs_root *root, u64 offset) btrfs_del_orphan_item() argument
|
| /linux-4.4.14/drivers/gpu/ipu-v3/ |
| H A D | ipu-cpmem.c | 297 ro = rgb->bits_per_pixel - rgb->red.length - rgb->red.offset; ipu_cpmem_set_format_rgb()
298 go = rgb->bits_per_pixel - rgb->green.length - rgb->green.offset; ipu_cpmem_set_format_rgb()
299 bo = rgb->bits_per_pixel - rgb->blue.length - rgb->blue.offset; ipu_cpmem_set_format_rgb()
300 to = rgb->bits_per_pixel - rgb->transp.length - rgb->transp.offset; ipu_cpmem_set_format_rgb()
456 .red = { .offset = 16, .length = 8, },
457 .green = { .offset = 8, .length = 8, },
458 .blue = { .offset = 0, .length = 8, },
459 .transp = { .offset = 24, .length = 8, },
464 .red = { .offset = 0, .length = 8, },
465 .green = { .offset = 8, .length = 8, },
466 .blue = { .offset = 16, .length = 8, },
467 .transp = { .offset = 24, .length = 8, },
472 .red = { .offset = 24, .length = 8, },
473 .green = { .offset = 16, .length = 8, },
474 .blue = { .offset = 8, .length = 8, },
475 .transp = { .offset = 0, .length = 8, },
480 .red = { .offset = 8, .length = 8, },
481 .green = { .offset = 16, .length = 8, },
482 .blue = { .offset = 24, .length = 8, },
483 .transp = { .offset = 0, .length = 8, },
488 .red = { .offset = 16, .length = 8, },
489 .green = { .offset = 8, .length = 8, },
490 .blue = { .offset = 0, .length = 8, },
491 .transp = { .offset = 0, .length = 0, },
496 .red = { .offset = 0, .length = 8, },
497 .green = { .offset = 8, .length = 8, },
498 .blue = { .offset = 16, .length = 8, },
499 .transp = { .offset = 0, .length = 0, },
504 .red = { .offset = 11, .length = 5, },
505 .green = { .offset = 5, .length = 6, },
506 .blue = { .offset = 0, .length = 5, },
507 .transp = { .offset = 0, .length = 0, },
512 .red = { .offset = 0, .length = 5, },
513 .green = { .offset = 5, .length = 6, },
514 .blue = { .offset = 11, .length = 5, },
515 .transp = { .offset = 0, .length = 0, },
520 .red = { .offset = 10, .length = 5, },
521 .green = { .offset = 5, .length = 5, },
522 .blue = { .offset = 0, .length = 5, },
523 .transp = { .offset = 15, .length = 1, },
528 .red = { .offset = 8, .length = 4, },
529 .green = { .offset = 4, .length = 4, },
530 .blue = { .offset = 0, .length = 4, },
531 .transp = { .offset = 12, .length = 4, },
536 .red = { .offset = 0, .length = 5, },
537 .green = { .offset = 5, .length = 5, },
538 .blue = { .offset = 10, .length = 5, },
539 .transp = { .offset = 15, .length = 1, },
544 .red = { .offset = 11, .length = 5, },
545 .green = { .offset = 6, .length = 5, },
546 .blue = { .offset = 1, .length = 5, },
547 .transp = { .offset = 0, .length = 1, },
552 .red = { .offset = 1, .length = 5, },
553 .green = { .offset = 6, .length = 5, },
554 .blue = { .offset = 11, .length = 5, },
555 .transp = { .offset = 0, .length = 1, },
674 int offset, u_offset, v_offset; ipu_cpmem_set_image() local
688 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); ipu_cpmem_set_image()
690 image->rect.top) - offset; ipu_cpmem_set_image()
692 image->rect.top) - offset; ipu_cpmem_set_image()
699 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); ipu_cpmem_set_image()
701 image->rect.top) - offset; ipu_cpmem_set_image()
703 image->rect.top) - offset; ipu_cpmem_set_image()
710 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); ipu_cpmem_set_image()
712 image->rect.top) - offset; ipu_cpmem_set_image()
720 offset = Y_OFFSET(pix, image->rect.left, image->rect.top); ipu_cpmem_set_image()
722 image->rect.top) - offset; ipu_cpmem_set_image()
732 offset = image->rect.left * 2 + ipu_cpmem_set_image()
737 offset = image->rect.left * 4 + ipu_cpmem_set_image()
742 offset = image->rect.left * 3 + ipu_cpmem_set_image()
749 ipu_cpmem_set_buffer(ch, 0, image->phys0 + offset); ipu_cpmem_set_image()
750 ipu_cpmem_set_buffer(ch, 1, image->phys1 + offset); ipu_cpmem_set_image()
|
| /linux-4.4.14/sound/firewire/dice/ |
| H A D | dice.h | 91 unsigned int offset,
94 enum snd_dice_addr_type type, unsigned int offset,
98 unsigned int offset, snd_dice_transaction_write_global()
102 SND_DICE_ADDR_TYPE_GLOBAL, offset, snd_dice_transaction_write_global()
106 unsigned int offset, snd_dice_transaction_read_global()
110 SND_DICE_ADDR_TYPE_GLOBAL, offset, snd_dice_transaction_read_global()
114 unsigned int offset, snd_dice_transaction_write_tx()
117 return snd_dice_transaction_write(dice, SND_DICE_ADDR_TYPE_TX, offset, snd_dice_transaction_write_tx()
121 unsigned int offset, snd_dice_transaction_read_tx()
124 return snd_dice_transaction_read(dice, SND_DICE_ADDR_TYPE_TX, offset, snd_dice_transaction_read_tx()
128 unsigned int offset, snd_dice_transaction_write_rx()
131 return snd_dice_transaction_write(dice, SND_DICE_ADDR_TYPE_RX, offset, snd_dice_transaction_write_rx()
135 unsigned int offset, snd_dice_transaction_read_rx()
138 return snd_dice_transaction_read(dice, SND_DICE_ADDR_TYPE_RX, offset, snd_dice_transaction_read_rx()
142 unsigned int offset, snd_dice_transaction_write_sync()
145 return snd_dice_transaction_write(dice, SND_DICE_ADDR_TYPE_SYNC, offset, snd_dice_transaction_write_sync()
149 unsigned int offset, snd_dice_transaction_read_sync()
152 return snd_dice_transaction_read(dice, SND_DICE_ADDR_TYPE_SYNC, offset, snd_dice_transaction_read_sync()
97 snd_dice_transaction_write_global(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) snd_dice_transaction_write_global() argument
105 snd_dice_transaction_read_global(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) snd_dice_transaction_read_global() argument
113 snd_dice_transaction_write_tx(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) snd_dice_transaction_write_tx() argument
120 snd_dice_transaction_read_tx(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) snd_dice_transaction_read_tx() argument
127 snd_dice_transaction_write_rx(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) snd_dice_transaction_write_rx() argument
134 snd_dice_transaction_read_rx(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) snd_dice_transaction_read_rx() argument
141 snd_dice_transaction_write_sync(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) snd_dice_transaction_write_sync() argument
148 snd_dice_transaction_read_sync(struct snd_dice *dice, unsigned int offset, void *buf, unsigned int len) snd_dice_transaction_read_sync() argument
|
| /linux-4.4.14/drivers/platform/x86/ |
| H A D | intel_pmic_gpio.c | 41 /* register offset that IPC driver should use
92 static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) pmic_gpio_direction_input() argument
94 if (offset >= 8) { pmic_gpio_direction_input()
98 return intel_scu_ipc_update_register(GPIO0 + offset, pmic_gpio_direction_input()
103 unsigned offset, int value) pmic_gpio_direction_output()
107 if (offset < 8)/* it is GPIO */ pmic_gpio_direction_output()
108 rc = intel_scu_ipc_update_register(GPIO0 + offset, pmic_gpio_direction_output()
111 else if (offset < 16)/* it is GPOSW */ pmic_gpio_direction_output()
112 rc = intel_scu_ipc_update_register(GPOSWCTL0 + offset - 8, pmic_gpio_direction_output()
115 else if (offset > 15 && offset < 24)/* it is GPO */ pmic_gpio_direction_output()
117 value ? 1 << (offset - 16) : 0, pmic_gpio_direction_output()
118 1 << (offset - 16)); pmic_gpio_direction_output()
120 pr_err("invalid PMIC GPIO pin %d!\n", offset); pmic_gpio_direction_output()
127 static int pmic_gpio_get(struct gpio_chip *chip, unsigned offset) pmic_gpio_get() argument
133 if (offset >= 8) pmic_gpio_get()
135 ret = intel_scu_ipc_ioread8(GPIO0 + offset, &r); pmic_gpio_get()
141 static void pmic_gpio_set(struct gpio_chip *chip, unsigned offset, int value) pmic_gpio_set() argument
143 if (offset < 8)/* it is GPIO */ pmic_gpio_set()
144 intel_scu_ipc_update_register(GPIO0 + offset, pmic_gpio_set()
147 else if (offset < 16)/* it is GPOSW */ pmic_gpio_set()
148 intel_scu_ipc_update_register(GPOSWCTL0 + offset - 8, pmic_gpio_set()
151 else if (offset > 15 && offset < 24) /* it is GPO */ pmic_gpio_set()
153 value ? 1 << (offset - 16) : 0, pmic_gpio_set()
154 1 << (offset - 16)); pmic_gpio_set()
175 static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) pmic_gpio_to_irq() argument
179 return pg->irq_base + offset; pmic_gpio_to_irq()
102 pmic_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) pmic_gpio_direction_output() argument
|
| /linux-4.4.14/drivers/crypto/caam/ |
| H A D | sg_sw_sec4.h | 14 dma_addr_t dma, u32 len, u32 offset) dma_to_sec4_sg_one()
19 sec4_sg_ptr->offset = offset; dma_to_sec4_sg_one()
33 struct sec4_sg_entry *sec4_sg_ptr, u32 offset) sg_to_sec4_sg()
37 sg_dma_len(sg), offset); sg_to_sec4_sg()
51 u32 offset) sg_to_sec4_sg_last()
53 sec4_sg_ptr = sg_to_sec4_sg(sg, sg_count, sec4_sg_ptr, offset); sg_to_sec4_sg_last()
13 dma_to_sec4_sg_one(struct sec4_sg_entry *sec4_sg_ptr, dma_addr_t dma, u32 len, u32 offset) dma_to_sec4_sg_one() argument
32 sg_to_sec4_sg(struct scatterlist *sg, int sg_count, struct sec4_sg_entry *sec4_sg_ptr, u32 offset) sg_to_sec4_sg() argument
49 sg_to_sec4_sg_last(struct scatterlist *sg, int sg_count, struct sec4_sg_entry *sec4_sg_ptr, u32 offset) sg_to_sec4_sg_last() argument
|
| /linux-4.4.14/arch/x86/entry/ |
| H A D | calling.h | 95 .macro SAVE_C_REGS_HELPER offset=0 rax=1 rcx=1 r8910=1 r11=1
97 movq %r11, 6*8+\offset(%rsp)
100 movq %r10, 7*8+\offset(%rsp)
101 movq %r9, 8*8+\offset(%rsp)
102 movq %r8, 9*8+\offset(%rsp)
105 movq %rax, 10*8+\offset(%rsp)
108 movq %rcx, 11*8+\offset(%rsp)
110 movq %rdx, 12*8+\offset(%rsp)
111 movq %rsi, 13*8+\offset(%rsp)
112 movq %rdi, 14*8+\offset(%rsp)
114 .macro SAVE_C_REGS offset=0
115 SAVE_C_REGS_HELPER \offset, 1, 1, 1, 1
117 .macro SAVE_C_REGS_EXCEPT_RAX_RCX offset=0
118 SAVE_C_REGS_HELPER \offset, 0, 0, 1, 1
130 .macro SAVE_EXTRA_REGS offset=0
131 movq %r15, 0*8+\offset(%rsp)
132 movq %r14, 1*8+\offset(%rsp)
133 movq %r13, 2*8+\offset(%rsp)
134 movq %r12, 3*8+\offset(%rsp)
135 movq %rbp, 4*8+\offset(%rsp)
136 movq %rbx, 5*8+\offset(%rsp)
139 .macro RESTORE_EXTRA_REGS offset=0
140 movq 0*8+\offset(%rsp), %r15
141 movq 1*8+\offset(%rsp), %r14
142 movq 2*8+\offset(%rsp), %r13
143 movq 3*8+\offset(%rsp), %r12
144 movq 4*8+\offset(%rsp), %rbp
145 movq 5*8+\offset(%rsp), %rbx
|
| /linux-4.4.14/fs/jffs2/ |
| H A D | read.c | 53 jffs2_dbg(1, "Node read from %08x: node_crc %08x, calculated CRC %08x. dsize %x, csize %x, offset %x, buf %p\n", jffs2_read_dnode()
56 je32_to_cpu(ri->offset), buf); jffs2_read_dnode()
158 unsigned char *buf, uint32_t offset, uint32_t len) jffs2_read_inode_range()
160 uint32_t end = offset + len; jffs2_read_inode_range()
165 __func__, f->inocache->ino, offset, offset + len); jffs2_read_inode_range()
167 frag = jffs2_lookup_node_frag(&f->fragtree, offset); jffs2_read_inode_range()
174 while(offset < end) { jffs2_read_inode_range()
175 jffs2_dbg(2, "%s(): offset %d, end %d\n", jffs2_read_inode_range()
176 __func__, offset, end); jffs2_read_inode_range()
177 if (unlikely(!frag || frag->ofs > offset || jffs2_read_inode_range()
178 frag->ofs + frag->size <= offset)) { jffs2_read_inode_range()
179 uint32_t holesize = end - offset; jffs2_read_inode_range()
180 if (frag && frag->ofs > offset) { jffs2_read_inode_range()
181 jffs2_dbg(1, "Eep. Hole in ino #%u fraglist. frag->ofs = 0x%08x, offset = 0x%08x\n", jffs2_read_inode_range()
182 f->inocache->ino, frag->ofs, offset); jffs2_read_inode_range()
183 holesize = min(holesize, frag->ofs - offset); jffs2_read_inode_range()
186 offset, offset + holesize); jffs2_read_inode_range()
189 offset += holesize; jffs2_read_inode_range()
194 offset, holeend, frag->ofs, jffs2_read_inode_range()
196 memset(buf, 0, holeend - offset); jffs2_read_inode_range()
197 buf += holeend - offset; jffs2_read_inode_range()
198 offset = holeend; jffs2_read_inode_range()
203 uint32_t fragofs; /* offset within the frag to start reading */ jffs2_read_inode_range()
205 fragofs = offset - frag->ofs; jffs2_read_inode_range()
206 readlen = min(frag->size - fragofs, end - offset); jffs2_read_inode_range()
221 offset += readlen; jffs2_read_inode_range()
157 jffs2_read_inode_range(struct jffs2_sb_info *c, struct jffs2_inode_info *f, unsigned char *buf, uint32_t offset, uint32_t len) jffs2_read_inode_range() argument
|
| /linux-4.4.14/arch/s390/lib/ |
| H A D | find.c | 39 unsigned long offset) find_next_bit_inv()
41 const unsigned long *p = addr + (offset / BITS_PER_LONG); find_next_bit_inv()
42 unsigned long result = offset & ~(BITS_PER_LONG - 1); find_next_bit_inv()
45 if (offset >= size) find_next_bit_inv()
48 offset %= BITS_PER_LONG; find_next_bit_inv()
49 if (offset) { find_next_bit_inv()
51 tmp &= (~0UL >> offset); find_next_bit_inv()
38 find_next_bit_inv(const unsigned long *addr, unsigned long size, unsigned long offset) find_next_bit_inv() argument
|
| /linux-4.4.14/arch/arm/mach-rpc/ |
| H A D | time.c | 33 long offset; ioc_timer_gettimeoffset() local
45 offset = count2; ioc_timer_gettimeoffset()
52 offset -= RPC_LATCH; ioc_timer_gettimeoffset()
58 offset -= RPC_LATCH; ioc_timer_gettimeoffset()
61 offset = (RPC_LATCH - offset) * (tick_nsec / 1000); ioc_timer_gettimeoffset()
62 return DIV_ROUND_CLOSEST(offset, RPC_LATCH) * 1000; ioc_timer_gettimeoffset()
|
| /linux-4.4.14/tools/lib/util/ |
| H A D | find_next_bit.c | 25 unsigned long offset) find_next_bit()
27 const unsigned long *p = addr + BITOP_WORD(offset); find_next_bit()
28 unsigned long result = offset & ~(BITS_PER_LONG-1); find_next_bit()
31 if (offset >= size) find_next_bit()
34 offset %= BITS_PER_LONG; find_next_bit()
35 if (offset) { find_next_bit()
37 tmp &= (~0UL << offset); find_next_bit()
24 find_next_bit(const unsigned long *addr, unsigned long size, unsigned long offset) find_next_bit() argument
|
| /linux-4.4.14/include/linux/bcma/ |
| H A D | bcma.h | 42 u8 (*read8)(struct bcma_device *core, u16 offset);
43 u16 (*read16)(struct bcma_device *core, u16 offset);
44 u32 (*read32)(struct bcma_device *core, u16 offset);
45 void (*write8)(struct bcma_device *core, u16 offset, u8 value);
46 void (*write16)(struct bcma_device *core, u16 offset, u16 value);
47 void (*write32)(struct bcma_device *core, u16 offset, u32 value);
50 size_t count, u16 offset, u8 reg_width);
52 size_t count, u16 offset, u8 reg_width);
55 u32 (*aread32)(struct bcma_device *core, u16 offset);
56 void (*awrite32)(struct bcma_device *core, u16 offset, u32 value);
363 static inline u32 bcma_read8(struct bcma_device *core, u16 offset) bcma_read8() argument
365 return core->bus->ops->read8(core, offset); bcma_read8()
367 static inline u32 bcma_read16(struct bcma_device *core, u16 offset) bcma_read16() argument
369 return core->bus->ops->read16(core, offset); bcma_read16()
371 static inline u32 bcma_read32(struct bcma_device *core, u16 offset) bcma_read32() argument
373 return core->bus->ops->read32(core, offset); bcma_read32()
376 void bcma_write8(struct bcma_device *core, u16 offset, u32 value) bcma_write8() argument
378 core->bus->ops->write8(core, offset, value); bcma_write8()
381 void bcma_write16(struct bcma_device *core, u16 offset, u32 value) bcma_write16() argument
383 core->bus->ops->write16(core, offset, value); bcma_write16()
386 void bcma_write32(struct bcma_device *core, u16 offset, u32 value) bcma_write32() argument
388 core->bus->ops->write32(core, offset, value); bcma_write32()
392 size_t count, u16 offset, u8 reg_width) bcma_block_read()
394 core->bus->ops->block_read(core, buffer, count, offset, reg_width); bcma_block_read()
398 u16 offset, u8 reg_width) bcma_block_write()
400 core->bus->ops->block_write(core, buffer, count, offset, reg_width); bcma_block_write()
403 static inline u32 bcma_aread32(struct bcma_device *core, u16 offset) bcma_aread32() argument
405 return core->bus->ops->aread32(core, offset); bcma_aread32()
408 void bcma_awrite32(struct bcma_device *core, u16 offset, u32 value) bcma_awrite32() argument
410 core->bus->ops->awrite32(core, offset, value); bcma_awrite32()
413 static inline void bcma_mask32(struct bcma_device *cc, u16 offset, u32 mask) bcma_mask32() argument
415 bcma_write32(cc, offset, bcma_read32(cc, offset) & mask); bcma_mask32()
417 static inline void bcma_set32(struct bcma_device *cc, u16 offset, u32 set) bcma_set32() argument
419 bcma_write32(cc, offset, bcma_read32(cc, offset) | set); bcma_set32()
422 u16 offset, u32 mask, u32 set) bcma_maskset32()
424 bcma_write32(cc, offset, (bcma_read32(cc, offset) & mask) | set); bcma_maskset32()
426 static inline void bcma_mask16(struct bcma_device *cc, u16 offset, u16 mask) bcma_mask16() argument
428 bcma_write16(cc, offset, bcma_read16(cc, offset) & mask); bcma_mask16()
430 static inline void bcma_set16(struct bcma_device *cc, u16 offset, u16 set) bcma_set16() argument
432 bcma_write16(cc, offset, bcma_read16(cc, offset) | set); bcma_set16()
435 u16 offset, u16 mask, u16 set) bcma_maskset16()
437 bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set); bcma_maskset16()
476 extern u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset);
391 bcma_block_read(struct bcma_device *core, void *buffer, size_t count, u16 offset, u8 reg_width) bcma_block_read() argument
396 bcma_block_write(struct bcma_device *core, const void *buffer, size_t count, u16 offset, u8 reg_width) bcma_block_write() argument
421 bcma_maskset32(struct bcma_device *cc, u16 offset, u32 mask, u32 set) bcma_maskset32() argument
434 bcma_maskset16(struct bcma_device *cc, u16 offset, u16 mask, u16 set) bcma_maskset16() argument
|
| H A D | bcma_driver_gmac_cmn.h | 89 #define gmac_cmn_read16(gc, offset) bcma_read16((gc)->core, offset)
90 #define gmac_cmn_read32(gc, offset) bcma_read32((gc)->core, offset)
91 #define gmac_cmn_write16(gc, offset, val) bcma_write16((gc)->core, offset, val)
92 #define gmac_cmn_write32(gc, offset, val) bcma_write32((gc)->core, offset, val)
|
| /linux-4.4.14/fs/qnx4/ |
| H A D | bitmap.c | 25 int offset = 0; qnx4_count_free_blocks() local
32 if ((bh = sb_bread(sb, start + offset)) == NULL) { qnx4_count_free_blocks()
40 offset++; qnx4_count_free_blocks()
|
| H A D | namei.c | 26 struct buffer_head *bh, unsigned long *offset) qnx4_match()
35 de = (struct qnx4_inode_entry *) (bh->b_data + *offset); qnx4_match()
36 *offset += QNX4_DIR_ENTRY_SIZE; qnx4_match()
59 unsigned long block, offset, blkofs; qnx4_find_entry() local
64 block = offset = blkofs = 0; qnx4_find_entry()
65 while (blkofs * QNX4_BLOCK_SIZE + offset < dir->i_size) { qnx4_find_entry()
75 *res_dir = (struct qnx4_inode_entry *) (bh->b_data + offset); qnx4_find_entry()
76 if (qnx4_match(len, name, bh, &offset)) { qnx4_find_entry()
78 (offset / QNX4_DIR_ENTRY_SIZE) - 1; qnx4_find_entry()
81 if (offset < bh->b_size) { qnx4_find_entry()
86 offset = 0; qnx4_find_entry()
25 qnx4_match(int len, const char *name, struct buffer_head *bh, unsigned long *offset) qnx4_match() argument
|
| /linux-4.4.14/drivers/net/ethernet/intel/e1000e/ |
| H A D | phy.h | 46 s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
47 s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data);
49 s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
50 s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data);
51 s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
54 s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
55 s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data);
56 s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
57 s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data);
58 s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
64 s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
65 s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
68 s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
69 s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
72 s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
73 s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
74 s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
75 s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data);
76 s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data);
77 s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
78 s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data);
79 s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 data);
116 #define BM_PHY_REG_PAGE(offset) \
117 ((u16)(((offset) >> PHY_PAGE_SHIFT) & 0xFFFF))
118 #define BM_PHY_REG_NUM(offset) \
119 ((u16)(((offset) & MAX_PHY_REG_ADDRESS) |\
120 (((offset) >> (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)) &\
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/core/ |
| H A D | mm.c | 38 node->offset, node->length, node->type); nvkm_mm_dump()
43 node->offset, node->length, node->type); nvkm_mm_dump()
63 next->offset = this->offset; nvkm_mm_free()
73 if (this->offset < prev->offset) nvkm_mm_free()
97 b->offset = a->offset; region_head()
101 a->offset += size; region_head()
126 e = this->offset + this->length; nvkm_mm_head()
127 s = this->offset; nvkm_mm_head()
142 splitoff = s - this->offset; nvkm_mm_head()
172 b->offset = a->offset + a->length; region_tail()
194 u32 e = this->offset + this->length; nvkm_mm_tail()
195 u32 s = this->offset; nvkm_mm_tail()
209 c = next->offset - e; nvkm_mm_tail()
238 nvkm_mm_init(struct nvkm_mm *mm, u32 offset, u32 length, u32 block) nvkm_mm_init() argument
245 next = prev->offset + prev->length; nvkm_mm_init()
246 if (next != offset) { nvkm_mm_init()
247 BUG_ON(next > offset); nvkm_mm_init()
251 node->offset = next; nvkm_mm_init()
252 node->length = offset - next; nvkm_mm_init()
268 node->offset = roundup(offset, mm->block_size); nvkm_mm_init()
269 node->length = rounddown(offset + length, mm->block_size); nvkm_mm_init()
270 node->length -= node->offset; nvkm_mm_init()
|
| /linux-4.4.14/arch/powerpc/platforms/cell/spufs/ |
| H A D | spu_restore.c | 83 unsigned int offset; restore_decr() local
92 offset = LSCSA_QW_OFFSET(decr_status); restore_decr()
93 decr_running = regs_spill[offset].slot[0] & SPU_DECR_STATUS_RUNNING; restore_decr()
95 offset = LSCSA_QW_OFFSET(decr); restore_decr()
96 decr = regs_spill[offset].slot[0]; restore_decr()
103 unsigned int offset; write_ppu_mb() local
110 offset = LSCSA_QW_OFFSET(ppu_mb); write_ppu_mb()
111 data = regs_spill[offset].slot[0]; write_ppu_mb()
117 unsigned int offset; write_ppuint_mb() local
124 offset = LSCSA_QW_OFFSET(ppuint_mb); write_ppuint_mb()
125 data = regs_spill[offset].slot[0]; write_ppuint_mb()
131 unsigned int offset; restore_fpcr() local
138 offset = LSCSA_QW_OFFSET(fpcr); restore_fpcr()
139 fpcr = regs_spill[offset].v; restore_fpcr()
145 unsigned int offset; restore_srr0() local
151 offset = LSCSA_QW_OFFSET(srr0); restore_srr0()
152 srr0 = regs_spill[offset].slot[0]; restore_srr0()
158 unsigned int offset; restore_event_mask() local
164 offset = LSCSA_QW_OFFSET(event_mask); restore_event_mask()
165 event_mask = regs_spill[offset].slot[0]; restore_event_mask()
171 unsigned int offset; restore_tag_mask() local
177 offset = LSCSA_QW_OFFSET(tag_mask); restore_tag_mask()
178 tag_mask = regs_spill[offset].slot[0]; restore_tag_mask()
186 unsigned int offset; restore_complete() local
205 offset = LSCSA_QW_OFFSET(stopped_status); restore_complete()
206 stopped_status = regs_spill[offset].slot[0]; restore_complete()
207 stopped_code = regs_spill[offset].slot[1]; restore_complete()
|
| /linux-4.4.14/drivers/gpu/drm/i915/ |
| H A D | dvo_ns2501.c | 169 * Registers 9C and 9D define the vertical output offset
194 uint8_t offset; member in struct:ns2501_reg
219 uint16_t voffs; /* vertical output offset, 9c/9d */
300 [0] = { .offset = 0x0a, .value = 0x81, },
302 [1] = { .offset = 0x12, .value = 0x02, },
303 [2] = { .offset = 0x18, .value = 0x07, },
304 [3] = { .offset = 0x19, .value = 0x00, },
305 [4] = { .offset = 0x1a, .value = 0x00, }, /* PLL?, ignored */
307 [5] = { .offset = 0x1e, .value = 0x02, },
308 [6] = { .offset = 0x1f, .value = 0x40, },
309 [7] = { .offset = 0x20, .value = 0x00, },
310 [8] = { .offset = 0x21, .value = 0x00, },
311 [9] = { .offset = 0x22, .value = 0x00, },
312 [10] = { .offset = 0x23, .value = 0x00, },
313 [11] = { .offset = 0x24, .value = 0x00, },
314 [12] = { .offset = 0x25, .value = 0x00, },
315 [13] = { .offset = 0x26, .value = 0x00, },
316 [14] = { .offset = 0x27, .value = 0x00, },
317 [15] = { .offset = 0x7e, .value = 0x18, },
319 [16] = { .offset = 0x84, .value = 0x00, },
320 [17] = { .offset = 0x85, .value = 0x00, },
321 [18] = { .offset = 0x86, .value = 0x00, },
322 [19] = { .offset = 0x87, .value = 0x00, },
323 [20] = { .offset = 0x88, .value = 0x00, },
324 [21] = { .offset = 0x89, .value = 0x00, },
325 [22] = { .offset = 0x8a, .value = 0x00, },
326 [23] = { .offset = 0x8b, .value = 0x00, },
327 [24] = { .offset = 0x8c, .value = 0x10, },
328 [25] = { .offset = 0x8d, .value = 0x02, },
330 [26] = { .offset = 0x90, .value = 0xff, },
331 [27] = { .offset = 0x91, .value = 0x07, },
332 [28] = { .offset = 0x92, .value = 0xa0, },
333 [29] = { .offset = 0x93, .value = 0x02, },
334 [30] = { .offset = 0x94, .value = 0x00, },
335 [31] = { .offset = 0x95, .value = 0x00, },
336 [32] = { .offset = 0x96, .value = 0x05, },
337 [33] = { .offset = 0x97, .value = 0x00, },
339 [34] = { .offset = 0x9a, .value = 0x88, },
340 [35] = { .offset = 0x9b, .value = 0x00, },
342 [36] = { .offset = 0x9e, .value = 0x25, },
343 [37] = { .offset = 0x9f, .value = 0x03, },
344 [38] = { .offset = 0xa0, .value = 0x28, },
345 [39] = { .offset = 0xa1, .value = 0x01, },
346 [40] = { .offset = 0xa2, .value = 0x28, },
347 [41] = { .offset = 0xa3, .value = 0x05, },
349 [42] = { .offset = 0xa4, .value = 0x84, },
350 [43] = { .offset = 0xa5, .value = 0x00, },
351 [44] = { .offset = 0xa6, .value = 0x00, },
352 [45] = { .offset = 0xa7, .value = 0x00, },
353 [46] = { .offset = 0xa8, .value = 0x00, },
355 [47] = { .offset = 0xa9, .value = 0x04, },
356 [48] = { .offset = 0xaa, .value = 0x70, },
357 [49] = { .offset = 0xab, .value = 0x4f, },
358 [50] = { .offset = 0xac, .value = 0x00, },
359 [51] = { .offset = 0xad, .value = 0x00, },
360 [52] = { .offset = 0xb6, .value = 0x09, },
361 [53] = { .offset = 0xb7, .value = 0x03, },
363 [54] = { .offset = 0xba, .value = 0x00, },
364 [55] = { .offset = 0xbb, .value = 0x20, },
365 [56] = { .offset = 0xf3, .value = 0x90, },
366 [57] = { .offset = 0xf4, .value = 0x00, },
367 [58] = { .offset = 0xf7, .value = 0x88, },
369 [59] = { .offset = 0xf8, .value = 0x0a, },
370 [60] = { .offset = 0xf9, .value = 0x00, }
374 [0] = { .offset = 0x35, .value = 0xff, },
375 [1] = { .offset = 0x34, .value = 0x00, },
376 [2] = { .offset = 0x08, .value = 0x30, },
601 ns2501_writeb(dvo, regs_init[i].offset, regs_init[i].value); ns2501_mode_set()
605 ns2501_writeb(dvo, mode_agnostic_values[i].offset, ns2501_mode_set()
|
| /linux-4.4.14/drivers/infiniband/hw/usnic/ |
| H A D | usnic_vnic.c | 99 int i, j, offset; usnic_vnic_dump() local
101 offset = 0; usnic_vnic_dump()
103 offset += scnprintf(buf + offset, buf_sz - offset, usnic_vnic_dump()
109 offset += printtitle(hdr_obj, buf + offset, buf_sz - offset); usnic_vnic_dump()
110 offset += scnprintf(buf + offset, buf_sz - offset, "\n"); usnic_vnic_dump()
111 offset += scnprintf(buf + offset, buf_sz - offset, usnic_vnic_dump()
114 offset += printcols(buf + offset, buf_sz - offset); usnic_vnic_dump()
115 offset += scnprintf(buf + offset, buf_sz - offset, "\n"); usnic_vnic_dump()
122 offset += scnprintf(buf + offset, buf_sz - offset, usnic_vnic_dump()
127 offset += printrow(res->owner, buf + offset, usnic_vnic_dump()
128 buf_sz - offset); usnic_vnic_dump()
130 offset += scnprintf(buf + offset, buf_sz - offset, usnic_vnic_dump()
135 return offset; usnic_vnic_dump()
185 int offset = 0; usnic_vnic_spec_dump() local
190 offset += scnprintf(buf + offset, buf_sz - offset, usnic_vnic_spec_dump()
196 return offset; usnic_vnic_spec_dump()
|
| /linux-4.4.14/drivers/iio/adc/ |
| H A D | xilinx-xadc-events.c | 74 unsigned int offset; xadc_get_threshold_offset() local
77 offset = XADC_THRESHOLD_OT_MAX; xadc_get_threshold_offset()
80 offset = chan->channel + 1; xadc_get_threshold_offset()
82 offset = chan->channel + 6; xadc_get_threshold_offset()
86 offset += 4; xadc_get_threshold_offset()
88 return offset; xadc_get_threshold_offset()
169 unsigned int offset = xadc_get_threshold_offset(chan, dir); xadc_read_event_value() local
174 *val = xadc->threshold[offset]; xadc_read_event_value()
193 unsigned int offset = xadc_get_threshold_offset(chan, dir); xadc_write_event_value() local
206 xadc->threshold[offset] = val; xadc_write_event_value()
230 if (xadc->threshold[offset] < xadc->temp_hysteresis) xadc_write_event_value()
231 xadc->threshold[offset + 4] = 0; xadc_write_event_value()
233 xadc->threshold[offset + 4] = xadc->threshold[offset] - xadc_write_event_value()
235 ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset + 4), xadc_write_event_value()
236 xadc->threshold[offset + 4]); xadc_write_event_value()
242 ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset), val); xadc_write_event_value()
|
| /linux-4.4.14/arch/mips/rb532/ |
| H A D | gpio.c | 57 * offset: bit index in the 4 byte address range
61 unsigned offset, void __iomem *ioaddr) rb532_set_bit()
69 val &= ~(!bitval << offset); /* unset bit if bitval == 0 */ rb532_set_bit()
70 val |= (!!bitval << offset); /* set bit if bitval == 1 */ rb532_set_bit()
80 static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr) rb532_get_bit() argument
82 return readl(ioaddr) & (1 << offset); rb532_get_bit()
87 static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset) rb532_gpio_get() argument
92 return rb532_get_bit(offset, gpch->regbase + GPIOD); rb532_gpio_get()
99 unsigned offset, int value) rb532_gpio_set()
104 rb532_set_bit(value, offset, gpch->regbase + GPIOD); rb532_gpio_set()
110 static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset) rb532_gpio_direction_input() argument
117 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); rb532_gpio_direction_input()
119 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG); rb532_gpio_direction_input()
127 unsigned offset, int value) rb532_gpio_direction_output()
134 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC); rb532_gpio_direction_output()
137 rb532_set_bit(value, offset, gpch->regbase + GPIOD); rb532_gpio_direction_output()
139 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG); rb532_gpio_direction_output()
60 rb532_set_bit(unsigned bitval, unsigned offset, void __iomem *ioaddr) rb532_set_bit() argument
98 rb532_gpio_set(struct gpio_chip *chip, unsigned offset, int value) rb532_gpio_set() argument
126 rb532_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) rb532_gpio_direction_output() argument
|
| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| H A D | r600_hdmi.c | 177 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset, r600_hdmi_update_acr() argument
186 WREG32_P(acr_ctl + offset, r600_hdmi_update_acr()
192 WREG32_P(HDMI0_ACR_32_0 + offset, r600_hdmi_update_acr()
195 WREG32_P(HDMI0_ACR_32_1 + offset, r600_hdmi_update_acr()
199 WREG32_P(HDMI0_ACR_44_0 + offset, r600_hdmi_update_acr()
202 WREG32_P(HDMI0_ACR_44_1 + offset, r600_hdmi_update_acr()
206 WREG32_P(HDMI0_ACR_48_0 + offset, r600_hdmi_update_acr()
209 WREG32_P(HDMI0_ACR_48_1 + offset, r600_hdmi_update_acr()
217 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset, r600_set_avi_packet() argument
222 WREG32(HDMI0_AVI_INFO0 + offset, r600_set_avi_packet()
224 WREG32(HDMI0_AVI_INFO1 + offset, r600_set_avi_packet()
226 WREG32(HDMI0_AVI_INFO2 + offset, r600_set_avi_packet()
228 WREG32(HDMI0_AVI_INFO3 + offset, r600_set_avi_packet()
231 WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset, r600_set_avi_packet()
234 WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset, r600_set_avi_packet()
250 uint32_t offset = dig->afmt->offset; r600_hdmi_update_audio_infoframe() local
253 WREG32(HDMI0_AUDIO_INFO0 + offset, r600_hdmi_update_audio_infoframe()
255 WREG32(HDMI0_AUDIO_INFO1 + offset, r600_hdmi_update_audio_infoframe()
268 uint32_t offset = dig->afmt->offset; r600_hdmi_is_audio_buffer_filled() local
270 return (RREG32(HDMI0_STATUS + offset) & 0x10) != 0; r600_hdmi_is_audio_buffer_filled()
301 uint32_t offset = dig->afmt->offset; r600_hdmi_audio_workaround() local
310 WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset, r600_hdmi_audio_workaround()
340 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset) r600_set_vbi_packet() argument
345 WREG32_OR(HDMI0_VBI_PACKET_CONTROL + offset, r600_set_vbi_packet()
351 void r600_set_audio_packet(struct drm_encoder *encoder, u32 offset) r600_set_audio_packet() argument
356 WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset, r600_set_audio_packet()
366 WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset, r600_set_audio_packet()
370 WREG32_P(HDMI0_INFOFRAME_CONTROL1 + offset, r600_set_audio_packet()
374 WREG32_AND(HDMI0_GENERIC_PACKET_CONTROL + offset, r600_set_audio_packet()
383 WREG32_P(HDMI0_60958_0 + offset, r600_set_audio_packet()
388 WREG32_P(HDMI0_60958_1 + offset, r600_set_audio_packet()
393 void r600_set_mute(struct drm_encoder *encoder, u32 offset, bool mute) r600_set_mute() argument
399 WREG32_OR(HDMI0_GC + offset, HDMI0_GC_AVMUTE); r600_set_mute()
401 WREG32_AND(HDMI0_GC + offset, ~HDMI0_GC_AVMUTE); r600_set_mute()
420 uint32_t offset; r600_hdmi_update_audio_settings() local
426 offset = dig->afmt->offset; r600_hdmi_update_audio_settings()
448 value = RREG32(HDMI0_AUDIO_PACKET_CONTROL + offset); r600_hdmi_update_audio_settings()
450 WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset, r600_hdmi_update_audio_settings()
453 WREG32_OR(HDMI0_CONTROL + offset, r600_hdmi_update_audio_settings()
456 WREG32_AND(HDMI0_INFOFRAME_CONTROL0 + offset, r600_hdmi_update_audio_settings()
461 WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset, r600_hdmi_update_audio_settings()
518 WREG32(HDMI0_CONTROL + dig->afmt->offset, hdmi); r600_hdmi_enable()
533 enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id); r600_hdmi_enable()
|
| H A D | evergreen_hdmi.c | 67 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset, evergreen_hdmi_update_acr() argument
80 WREG32(HDMI_ACR_PACKET_CONTROL + offset, evergreen_hdmi_update_acr()
83 WREG32(HDMI_ACR_PACKET_CONTROL + offset, evergreen_hdmi_update_acr()
87 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz)); evergreen_hdmi_update_acr()
88 WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz); evergreen_hdmi_update_acr()
90 WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz)); evergreen_hdmi_update_acr()
91 WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz); evergreen_hdmi_update_acr()
93 WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz)); evergreen_hdmi_update_acr()
94 WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz); evergreen_hdmi_update_acr()
208 void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset, evergreen_set_avi_packet() argument
213 WREG32(AFMT_AVI_INFO0 + offset, evergreen_set_avi_packet()
215 WREG32(AFMT_AVI_INFO1 + offset, evergreen_set_avi_packet()
217 WREG32(AFMT_AVI_INFO2 + offset, evergreen_set_avi_packet()
219 WREG32(AFMT_AVI_INFO3 + offset, evergreen_set_avi_packet()
222 WREG32_P(HDMI_INFOFRAME_CONTROL1 + offset, evergreen_set_avi_packet()
306 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset) dce4_set_vbi_packet() argument
311 WREG32(HDMI_VBI_PACKET_CONTROL + offset, dce4_set_vbi_packet()
317 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc) dce4_hdmi_set_color_depth() argument
324 val = RREG32(HDMI_CONTROL + offset); dce4_hdmi_set_color_depth()
351 WREG32(HDMI_CONTROL + offset, val); dce4_hdmi_set_color_depth()
354 void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset) dce4_set_audio_packet() argument
359 WREG32(AFMT_INFOFRAME_CONTROL0 + offset, dce4_set_audio_packet()
362 WREG32(AFMT_60958_0 + offset, dce4_set_audio_packet()
365 WREG32(AFMT_60958_1 + offset, dce4_set_audio_packet()
368 WREG32(AFMT_60958_2 + offset, dce4_set_audio_packet()
376 WREG32(AFMT_AUDIO_PACKET_CONTROL2 + offset, dce4_set_audio_packet()
379 WREG32(HDMI_AUDIO_PACKET_CONTROL + offset, dce4_set_audio_packet()
384 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset, dce4_set_audio_packet()
389 void dce4_set_mute(struct drm_encoder *encoder, u32 offset, bool mute) dce4_set_mute() argument
395 WREG32_OR(HDMI_GC + offset, HDMI_GC_AVMUTE); dce4_set_mute()
397 WREG32_AND(HDMI_GC + offset, ~HDMI_GC_AVMUTE); dce4_set_mute()
414 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, evergreen_hdmi_enable()
419 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, evergreen_hdmi_enable()
422 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, evergreen_hdmi_enable()
425 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, evergreen_hdmi_enable()
429 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, evergreen_hdmi_enable()
431 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0); evergreen_hdmi_enable()
437 enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id); evergreen_hdmi_enable()
458 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, evergreen_dp_enable()
461 WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset, evergreen_dp_enable()
466 val = RREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset); evergreen_dp_enable()
474 WREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset, val); evergreen_dp_enable()
477 WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, evergreen_dp_enable()
483 WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0); evergreen_dp_enable()
484 WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, evergreen_dp_enable()
|
| /linux-4.4.14/drivers/net/ethernet/mellanox/mlxsw/ |
| H A D | item.h | 44 unsigned short offset; /* bytes in container */ member in struct:mlxsw_item
46 unsigned short in_step_offset; /* offset within one step */
62 if (item->offset % typesize != 0 || __mlxsw_item_offset()
65 pr_err("mlxsw: item bug (name=%s,offset=%x,step=%x,in_step_offset=%x,typesize=%zx)\n", __mlxsw_item_offset()
66 item->name, item->offset, item->step, __mlxsw_item_offset()
71 return ((item->offset + item->step * index + item->in_step_offset) / __mlxsw_item_offset()
78 unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u16)); __mlxsw_item_get16() local
82 tmp = be16_to_cpu(b[offset]); __mlxsw_item_get16()
93 unsigned int offset = __mlxsw_item_offset(item, index, __mlxsw_item_set16() local
102 tmp = be16_to_cpu(b[offset]); __mlxsw_item_set16()
105 b[offset] = cpu_to_be16(tmp); __mlxsw_item_set16()
111 unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u32)); __mlxsw_item_get32() local
115 tmp = be32_to_cpu(b[offset]); __mlxsw_item_get32()
126 unsigned int offset = __mlxsw_item_offset(item, index, __mlxsw_item_set32() local
135 tmp = be32_to_cpu(b[offset]); __mlxsw_item_set32()
138 b[offset] = cpu_to_be32(tmp); __mlxsw_item_set32()
144 unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u64)); __mlxsw_item_get64() local
148 tmp = be64_to_cpu(b[offset]); __mlxsw_item_get64()
159 unsigned int offset = __mlxsw_item_offset(item, index, sizeof(u64)); __mlxsw_item_set64() local
167 tmp = be64_to_cpu(b[offset]); __mlxsw_item_set64()
170 b[offset] = cpu_to_be64(tmp); __mlxsw_item_set64()
177 unsigned int offset = __mlxsw_item_offset(item, index, sizeof(char)); __mlxsw_item_memcpy_from() local
179 memcpy(dst, &buf[offset], item->size.bytes); __mlxsw_item_memcpy_from()
186 unsigned int offset = __mlxsw_item_offset(item, index, sizeof(char)); __mlxsw_item_memcpy_to() local
188 memcpy(&buf[offset], src, item->size.bytes); __mlxsw_item_memcpy_to()
195 u16 offset; /* byte offset inside the array */ __mlxsw_item_bit_array_offset() local
199 if (item->offset % sizeof(u32) != 0 || __mlxsw_item_bit_array_offset()
201 pr_err("mlxsw: item bug (name=%s,offset=%x,element_size=%x)\n", __mlxsw_item_bit_array_offset()
202 item->name, item->offset, item->element_size); __mlxsw_item_bit_array_offset()
208 offset = be_index * item->element_size >> 3; __mlxsw_item_bit_array_offset()
212 return item->offset + offset; __mlxsw_item_bit_array_offset()
219 u16 offset = __mlxsw_item_bit_array_offset(item, index, &shift); __mlxsw_item_bit_array_get() local
221 tmp = buf[offset]; __mlxsw_item_bit_array_get()
231 u16 offset = __mlxsw_item_bit_array_offset(item, index, &shift); __mlxsw_item_bit_array_set() local
236 tmp = buf[offset]; __mlxsw_item_bit_array_set()
239 buf[offset] = tmp; __mlxsw_item_bit_array_set()
252 .offset = _offset, \
269 .offset = _offset, \
293 .offset = _offset, \
310 .offset = _offset, \
334 .offset = _offset, \
351 .offset = _offset, \
375 .offset = _offset, \
395 .offset = _offset, \
421 .offset = _offset, \
|
| /linux-4.4.14/drivers/rtc/ |
| H A D | rtc-snvs.c | 45 int offset; member in struct:snvs_rtc_data
56 regmap_read(data->regmap, data->offset + SNVS_LPSRTCMR, &val); rtc_read_lp_counter()
59 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &val); rtc_read_lp_counter()
62 regmap_read(data->regmap, data->offset + SNVS_LPSRTCMR, &val); rtc_read_lp_counter()
65 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &val); rtc_read_lp_counter()
81 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count1); rtc_write_sync_lp()
82 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count2); rtc_write_sync_lp()
88 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count2); rtc_write_sync_lp()
89 regmap_read(data->regmap, data->offset + SNVS_LPSRTCLR, &count3); rtc_write_sync_lp()
100 regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, SNVS_LPCR_SRTC_ENV, snvs_rtc_enable()
104 regmap_read(data->regmap, data->offset + SNVS_LPCR, &lpcr); snvs_rtc_enable()
142 regmap_write(data->regmap, data->offset + SNVS_LPSRTCLR, time << CNTR_TO_SECS_SH); snvs_rtc_set_time()
143 regmap_write(data->regmap, data->offset + SNVS_LPSRTCMR, time >> (32 - CNTR_TO_SECS_SH)); snvs_rtc_set_time()
156 regmap_read(data->regmap, data->offset + SNVS_LPTAR, &lptar); snvs_rtc_read_alarm()
159 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr); snvs_rtc_read_alarm()
169 regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, snvs_rtc_alarm_irq_enable()
186 regmap_update_bits(data->regmap, data->offset + SNVS_LPCR, SNVS_LPCR_LPTA_EN, 0); snvs_rtc_set_alarm()
187 regmap_write(data->regmap, data->offset + SNVS_LPTAR, time); snvs_rtc_set_alarm()
190 regmap_write(data->regmap, data->offset + SNVS_LPSR, SNVS_LPSR_LPTA); snvs_rtc_set_alarm()
210 regmap_read(data->regmap, data->offset + SNVS_LPSR, &lpsr); snvs_rtc_irq_handler()
222 regmap_write(data->regmap, data->offset + SNVS_LPSR, lpsr); snvs_rtc_irq_handler()
256 data->offset = SNVS_LPREGISTER_OFFSET; snvs_rtc_probe()
257 of_property_read_u32(pdev->dev.of_node, "offset", &data->offset); snvs_rtc_probe()
284 regmap_write(data->regmap, data->offset + SNVS_LPPGDR, SNVS_LPPGDR_INIT); snvs_rtc_probe()
287 regmap_write(data->regmap, data->offset + SNVS_LPSR, 0xffffffff); snvs_rtc_probe()
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/sw/ |
| H A D | nv50.h | 14 u64 offset; member in struct:nv50_sw_chan::__anon4511
|
| /linux-4.4.14/drivers/memory/tegra/ |
| H A D | mc.h | 17 static inline u32 mc_readl(struct tegra_mc *mc, unsigned long offset) mc_readl() argument
19 return readl(mc->regs + offset); mc_readl()
23 unsigned long offset) mc_writel()
25 writel(value, mc->regs + offset); mc_writel()
22 mc_writel(struct tegra_mc *mc, u32 value, unsigned long offset) mc_writel() argument
|
| /linux-4.4.14/arch/um/include/shared/skas/ |
| H A D | stub-data.h | 14 unsigned long offset; member in struct:stub_data
|
| /linux-4.4.14/kernel/ |
| H A D | elfcore.c | 11 int __weak elf_core_write_extra_phdrs(struct coredump_params *cprm, loff_t offset) elf_core_write_extra_phdrs() argument
|
| /linux-4.4.14/arch/powerpc/sysdev/ |
| H A D | indirect_pci.c | 25 int offset, int len, u32 *val) __indirect_read_config()
50 reg = ((offset & 0xf00) << 16) | (offset & 0xfc); __indirect_read_config()
52 reg = offset & 0xfc; __indirect_read_config()
62 * Note: the caller has already checked that offset is __indirect_read_config()
65 cfg_data = hose->cfg_data + (offset & 3); __indirect_read_config()
81 int offset, int len, u32 *val) indirect_read_config()
85 return __indirect_read_config(hose, bus->number, devfn, offset, len, indirect_read_config()
90 int offset, int len, u32 val) indirect_write_config()
116 reg = ((offset & 0xf00) << 16) | (offset & 0xfc); indirect_write_config()
118 reg = offset & 0xfc; indirect_write_config()
129 if ((offset == PCI_PRIMARY_BUS) && indirect_write_config()
135 offset == PCI_CACHE_LINE_SIZE) { indirect_write_config()
140 * Note: the caller has already checked that offset is indirect_write_config()
143 cfg_data = hose->cfg_data + (offset & 3); indirect_write_config()
23 __indirect_read_config(struct pci_controller *hose, unsigned char bus_number, unsigned int devfn, int offset, int len, u32 *val) __indirect_read_config() argument
80 indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 *val) indirect_read_config() argument
89 indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 val) indirect_write_config() argument
|
| /linux-4.4.14/arch/mips/include/asm/mach-tx39xx/ |
| H A D | ioremap.h | 23 static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size, plat_ioremap() argument
27 if (offset >= TXX9_DIRECTMAP_BASE && plat_ioremap()
28 offset < TXX9_DIRECTMAP_BASE + 0xff0000) plat_ioremap()
29 return (void __iomem *)offset; plat_ioremap()
|
| /linux-4.4.14/arch/mips/include/asm/mach-tx49xx/ |
| H A D | ioremap.h | 23 static inline void __iomem *plat_ioremap(phys_addr_t offset, unsigned long size, plat_ioremap() argument
31 if (offset >= TXX9_DIRECTMAP_BASE && plat_ioremap()
32 offset < TXX9_DIRECTMAP_BASE + 0x400000) plat_ioremap()
33 return (void __iomem *)(unsigned long)(int)offset; plat_ioremap()
|
| /linux-4.4.14/arch/parisc/include/asm/ |
| H A D | traps.h | 9 int code, unsigned long offset) __noreturn __cold;
|
| /linux-4.4.14/arch/arm/mach-gemini/ |
| H A D | gpio.c | 154 static void _set_gpio_direction(struct gpio_chip *chip, unsigned offset, _set_gpio_direction() argument
157 void __iomem *base = GPIO_BASE(offset / 32); _set_gpio_direction()
162 reg |= 1 << (offset % 32); _set_gpio_direction()
164 reg &= ~(1 << (offset % 32)); _set_gpio_direction()
168 static void gemini_gpio_set(struct gpio_chip *chip, unsigned offset, int value) gemini_gpio_set() argument
170 void __iomem *base = GPIO_BASE(offset / 32); gemini_gpio_set()
173 __raw_writel(1 << (offset % 32), base + GPIO_DATA_SET); gemini_gpio_set()
175 __raw_writel(1 << (offset % 32), base + GPIO_DATA_CLR); gemini_gpio_set()
178 static int gemini_gpio_get(struct gpio_chip *chip, unsigned offset) gemini_gpio_get() argument
180 void __iomem *base = GPIO_BASE(offset / 32); gemini_gpio_get()
182 return (__raw_readl(base + GPIO_DATA_IN) >> (offset % 32)) & 1; gemini_gpio_get()
185 static int gemini_gpio_direction_input(struct gpio_chip *chip, unsigned offset) gemini_gpio_direction_input() argument
187 _set_gpio_direction(chip, offset, 0); gemini_gpio_direction_input()
191 static int gemini_gpio_direction_output(struct gpio_chip *chip, unsigned offset, gemini_gpio_direction_output() argument
194 _set_gpio_direction(chip, offset, 1); gemini_gpio_direction_output()
195 gemini_gpio_set(chip, offset, value); gemini_gpio_direction_output()
|
| H A D | board-wbd111.c | 85 .offset = 0,
90 .offset = 0x020000,
94 .offset = 0x120000,
98 .offset = 0x7c0000,
103 .offset = 0x7d0000,
108 .offset = 0x7e0000,
|
| H A D | board-wbd222.c | 85 .offset = 0,
90 .offset = 0x020000,
94 .offset = 0x120000,
98 .offset = 0x7c0000,
103 .offset = 0x7d0000,
108 .offset = 0x7e0000,
|
| /linux-4.4.14/drivers/usb/musb/ |
| H A D | musb_io.h | 45 * @ep_offset: platform specific function to get end point offset
47 * @fifo_offset: platform specific function to get fifo offset
50 * @busctl_offset: platform specific function to get busctl offset
54 u32 (*ep_offset)(u8 epnum, u16 offset);
59 u32 (*busctl_offset)(u8 epnum, u16 offset);
63 extern u8 (*musb_readb)(const void __iomem *addr, unsigned offset);
64 extern void (*musb_writeb)(void __iomem *addr, unsigned offset, u8 data);
65 extern u16 (*musb_readw)(const void __iomem *addr, unsigned offset);
66 extern void (*musb_writew)(void __iomem *addr, unsigned offset, u16 data);
67 extern u32 (*musb_readl)(const void __iomem *addr, unsigned offset);
68 extern void (*musb_writel)(void __iomem *addr, unsigned offset, u32 data);
|
| /linux-4.4.14/drivers/staging/rtl8723au/include/ |
| H A D | HalPwrSeqCmd.h | 24 /* offset: the read register offset */
30 /* offset: the read register offset */
36 /* offset: the read register offset */
41 /* if( (Read(offset) & msk) == (value & msk) ) */
46 /* offset: the value to delay */
51 /* offset: N/A */
99 u16 offset; member in struct:wlan_pwr_cfg
110 #define GET_PWR_CFG_OFFSET(__PWR_CMD) __PWR_CMD.offset
|
| /linux-4.4.14/drivers/net/wireless/rt2x00/ |
| H A D | rt2x00mmio.h | 33 const unsigned int offset, rt2x00mmio_register_read()
36 *value = readl(rt2x00dev->csr.base + offset); rt2x00mmio_register_read()
40 const unsigned int offset, rt2x00mmio_register_multiread()
43 memcpy_fromio(value, rt2x00dev->csr.base + offset, length); rt2x00mmio_register_multiread()
47 const unsigned int offset, rt2x00mmio_register_write()
50 writel(value, rt2x00dev->csr.base + offset); rt2x00mmio_register_write()
54 const unsigned int offset, rt2x00mmio_register_multiwrite()
58 __iowrite32_copy(rt2x00dev->csr.base + offset, value, length >> 2); rt2x00mmio_register_multiwrite()
64 * @offset: Register offset
75 const unsigned int offset,
32 rt2x00mmio_register_read(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 *value) rt2x00mmio_register_read() argument
39 rt2x00mmio_register_multiread(struct rt2x00_dev *rt2x00dev, const unsigned int offset, void *value, const u32 length) rt2x00mmio_register_multiread() argument
46 rt2x00mmio_register_write(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 value) rt2x00mmio_register_write() argument
53 rt2x00mmio_register_multiwrite(struct rt2x00_dev *rt2x00dev, const unsigned int offset, const void *value, const u32 length) rt2x00mmio_register_multiwrite() argument
|
| H A D | rt2x00usb.h | 73 * enum rt2x00usb_mode_offset: Device modes offset.
91 * @offset: Register offset to perform action on
104 const u16 offset, const u16 value,
113 * @offset: Register offset to perform action on
127 const u16 offset, void *buffer,
135 * @offset: Register offset to perform action on
145 const u16 offset, void *buffer,
152 * @offset: Register offset to perform action on
162 const u16 offset, rt2x00usb_vendor_request_sw()
167 USB_VENDOR_REQUEST_OUT, offset, rt2x00usb_vendor_request_sw()
192 * @offset: Register offset
199 const unsigned int offset, rt2x00usb_register_read()
204 USB_VENDOR_REQUEST_IN, offset, rt2x00usb_register_read()
212 * @offset: Register offset
219 const unsigned int offset, rt2x00usb_register_read_lock()
224 USB_VENDOR_REQUEST_IN, offset, rt2x00usb_register_read_lock()
232 * @offset: Register offset
240 const unsigned int offset, rt2x00usb_register_multiread()
244 USB_VENDOR_REQUEST_IN, offset, rt2x00usb_register_multiread()
251 * @offset: Register offset
258 const unsigned int offset, rt2x00usb_register_write()
263 USB_VENDOR_REQUEST_OUT, offset, rt2x00usb_register_write()
270 * @offset: Register offset
277 const unsigned int offset, rt2x00usb_register_write_lock()
282 USB_VENDOR_REQUEST_OUT, offset, rt2x00usb_register_write_lock()
289 * @offset: Register offset
297 const unsigned int offset, rt2x00usb_register_multiwrite()
302 USB_VENDOR_REQUEST_OUT, offset, rt2x00usb_register_multiwrite()
309 * @offset: Register offset
320 const unsigned int offset,
327 * @offset: Register offset
338 const unsigned int offset,
160 rt2x00usb_vendor_request_sw(struct rt2x00_dev *rt2x00dev, const u8 request, const u16 offset, const u16 value, const int timeout) rt2x00usb_vendor_request_sw() argument
198 rt2x00usb_register_read(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 *value) rt2x00usb_register_read() argument
218 rt2x00usb_register_read_lock(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 *value) rt2x00usb_register_read_lock() argument
239 rt2x00usb_register_multiread(struct rt2x00_dev *rt2x00dev, const unsigned int offset, void *value, const u32 length) rt2x00usb_register_multiread() argument
257 rt2x00usb_register_write(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 value) rt2x00usb_register_write() argument
276 rt2x00usb_register_write_lock(struct rt2x00_dev *rt2x00dev, const unsigned int offset, u32 value) rt2x00usb_register_write_lock() argument
296 rt2x00usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, const unsigned int offset, const void *value, const u32 length) rt2x00usb_register_multiwrite() argument
|
| /linux-4.4.14/arch/s390/net/ |
| H A D | bpf_jit.S | 18 * %r3 (%b2) = offset into skb data
30 * %r3 = offset into skb data
37 * %r3 = offset into data
49 ltgr %r3,%r3; /* Is offset negative? */ \
60 aghi %r3,-SIZE; /* Arg2 = offset */ \
68 sk_load_common(word, 4, llgf) /* r14 = *(u32 *) (skb->data+offset) */
69 sk_load_common(half, 2, llgh) /* r14 = *(u16 *) (skb->data+offset) */
74 /* r14 = *(u8 *) (skb->data+offset) */
76 ltgr %r3,%r3 # Is offset negative?
86 # Arg2 = offset
99 /* Arg2 = offset */ \
|
| /linux-4.4.14/drivers/staging/wilc1000/ |
| H A D | wilc_wlan_cfg.h | 33 int wilc_wlan_cfg_set_wid(u8 *frame, u32 offset, u16 id, u8 *buf, int size);
34 int wilc_wlan_cfg_get_wid(u8 *frame, u32 offset, u16 id);
|
| H A D | wilc_wlan_cfg.c | 164 static int wilc_wlan_cfg_set_byte(u8 *frame, u32 offset, u16 id, u8 val8) wilc_wlan_cfg_set_byte() argument
168 if ((offset + 4) >= MAX_CFG_FRAME_SIZE) wilc_wlan_cfg_set_byte()
171 buf = &frame[offset]; wilc_wlan_cfg_set_byte()
180 static int wilc_wlan_cfg_set_hword(u8 *frame, u32 offset, u16 id, u16 val16) wilc_wlan_cfg_set_hword() argument
184 if ((offset + 5) >= MAX_CFG_FRAME_SIZE) wilc_wlan_cfg_set_hword()
187 buf = &frame[offset]; wilc_wlan_cfg_set_hword()
198 static int wilc_wlan_cfg_set_word(u8 *frame, u32 offset, u16 id, u32 val32) wilc_wlan_cfg_set_word() argument
202 if ((offset + 7) >= MAX_CFG_FRAME_SIZE) wilc_wlan_cfg_set_word()
205 buf = &frame[offset]; wilc_wlan_cfg_set_word()
218 static int wilc_wlan_cfg_set_str(u8 *frame, u32 offset, u16 id, u8 *str, u32 size) wilc_wlan_cfg_set_str() argument
222 if ((offset + size + 3) >= MAX_CFG_FRAME_SIZE) wilc_wlan_cfg_set_str()
225 buf = &frame[offset]; wilc_wlan_cfg_set_str()
237 static int wilc_wlan_cfg_set_bin(u8 *frame, u32 offset, u16 id, u8 *b, u32 size) wilc_wlan_cfg_set_bin() argument
243 if ((offset + size + 5) >= MAX_CFG_FRAME_SIZE) wilc_wlan_cfg_set_bin()
246 buf = &frame[offset]; wilc_wlan_cfg_set_bin()
389 int wilc_wlan_cfg_set_wid(u8 *frame, u32 offset, u16 id, u8 *buf, int size) wilc_wlan_cfg_set_wid() argument
396 ret = wilc_wlan_cfg_set_byte(frame, offset, id, *buf); wilc_wlan_cfg_set_wid()
399 ret = wilc_wlan_cfg_set_hword(frame, offset, id, *((u16 *)buf)); wilc_wlan_cfg_set_wid()
402 ret = wilc_wlan_cfg_set_word(frame, offset, id, *((u32 *)buf)); wilc_wlan_cfg_set_wid()
404 ret = wilc_wlan_cfg_set_str(frame, offset, id, buf, size); wilc_wlan_cfg_set_wid()
406 ret = wilc_wlan_cfg_set_bin(frame, offset, id, buf, size); wilc_wlan_cfg_set_wid()
414 int wilc_wlan_cfg_get_wid(u8 *frame, u32 offset, u16 id) wilc_wlan_cfg_get_wid() argument
418 if ((offset + 2) >= MAX_CFG_FRAME_SIZE) wilc_wlan_cfg_get_wid()
421 buf = &frame[offset]; wilc_wlan_cfg_get_wid()
|
| /linux-4.4.14/drivers/clk/versatile/ |
| H A D | clk-icst.h | 6 * @vco_offset: offset to the ICST VCO from the provided memory base
7 * @lock_offset: offset to the ICST VCO locking register from the provided
|
| /linux-4.4.14/arch/um/drivers/ |
| H A D | cow_sys.h | 25 static inline int cow_seek_file(int fd, __u64 offset) cow_seek_file() argument
27 return os_seek_file(fd, offset); cow_seek_file()
|
| /linux-4.4.14/fs/xfs/ |
| H A D | xfs_pnfs.h | 5 int xfs_fs_get_uuid(struct super_block *sb, u8 *buf, u32 *len, u64 *offset);
6 int xfs_fs_map_blocks(struct inode *inode, loff_t offset, u64 length,
|
| /linux-4.4.14/include/crypto/ |
| H A D | scatterwalk.h | 47 (int)(walk_in->offset - walk_out->offset)); scatterwalk_samebuf()
52 unsigned int len = walk->sg->offset + walk->sg->length - walk->offset; scatterwalk_pagelen()
53 unsigned int len_this_page = offset_in_page(~walk->offset) + 1; scatterwalk_pagelen()
67 walk->offset += nbytes; scatterwalk_advance()
73 return !(walk->offset & alignmask); scatterwalk_aligned()
78 return sg_page(walk->sg) + (walk->offset >> PAGE_SHIFT); scatterwalk_page()
|
| /linux-4.4.14/arch/arm/include/asm/hardware/ |
| H A D | memc.h | 19 #define video_set_dma(start,end,offset) \
23 memc_write (VDMA_INIT, (offset >> 2)); \
|
| /linux-4.4.14/drivers/mtd/devices/ |
| H A D | lart.c | 267 static __u8 read8 (__u32 offset) read8() argument
269 volatile __u8 *data = (__u8 *) (FLASH_OFFSET + offset); read8()
271 printk (KERN_DEBUG "%s(): 0x%.8x -> 0x%.2x\n", __func__, offset, *data); read8()
276 static __u32 read32 (__u32 offset) read32() argument
278 volatile __u32 *data = (__u32 *) (FLASH_OFFSET + offset); read32()
280 printk (KERN_DEBUG "%s(): 0x%.8x -> 0x%.8x\n", __func__, offset, *data); read32()
285 static void write32 (__u32 x,__u32 offset) write32() argument
287 volatile __u32 *data = (__u32 *) (FLASH_OFFSET + offset); write32()
290 printk (KERN_DEBUG "%s(): 0x%.8x <- 0x%.8x\n", __func__, offset, *data); write32()
323 * Erase one block of flash memory at offset ``offset'' which is any
328 static inline int erase_block (__u32 offset) erase_block() argument
333 printk (KERN_DEBUG "%s(): 0x%.8x\n", __func__, offset); erase_block()
337 write32 (DATA_TO_FLASH (ERASE_SETUP),offset); erase_block() local
338 write32 (DATA_TO_FLASH (ERASE_CONFIRM),offset); erase_block() local
343 write32 (DATA_TO_FLASH (STATUS_READ),offset); erase_block() local
344 status = FLASH_TO_DATA (read32 (offset)); erase_block()
349 write32 (DATA_TO_FLASH (READ_ARRAY),offset); erase_block() local
354 printk (KERN_WARNING "%s: erase error at address 0x%.8x.\n",module_name,offset); erase_block()
379 for (i = 0; i < mtd->numeraseregions && instr->addr >= mtd->eraseregions[i].offset; i++) ; flash_erase()
401 for (; i < mtd->numeraseregions && instr->addr + instr->len >= mtd->eraseregions[i].offset; i++) ; flash_erase()
425 if (addr == mtd->eraseregions[i].offset + (mtd->eraseregions[i].erasesize * mtd->eraseregions[i].numblocks)) i++; flash_erase()
469 * Write one dword ``x'' to flash memory at offset ``offset''. ``offset''
474 static inline int write_dword (__u32 offset,__u32 x) write_dword() argument
479 printk (KERN_DEBUG "%s(): 0x%.8x <- 0x%.8x\n", __func__, offset, x); write_dword()
483 write32 (DATA_TO_FLASH (PGM_SETUP),offset); write_dword() local
486 write32 (x,offset); write_dword()
491 write32 (DATA_TO_FLASH (STATUS_READ),offset); write_dword() local
492 status = FLASH_TO_DATA (read32 (offset)); write_dword()
497 write32 (DATA_TO_FLASH (READ_ARRAY),offset); write_dword() local
500 if ((status & STATUS_PGM_ERR) || read32 (offset) != x) write_dword()
502 printk (KERN_WARNING "%s: write error at address 0x%.8x.\n",module_name,offset); write_dword()
574 .offset = 0x00000000,
580 .offset = FLASH_BLOCKSIZE_PARAM * FLASH_NUMBLOCKS_16m_PARAM,
590 .offset = BLOB_START,
596 .offset = KERNEL_START, /* MTDPART_OFS_APPEND */
602 .offset = INITRD_START, /* MTDPART_OFS_APPEND */
649 "mtd.eraseregions[%d].offset = 0x%.8x\n" lart_flash_init()
652 result,mtd.eraseregions[result].offset, lart_flash_init()
662 "lart_partitions[%d].offset = 0x%.8x\n" lart_flash_init()
665 result,lart_partitions[result].offset, lart_flash_init()
|
| /linux-4.4.14/drivers/net/ethernet/qlogic/qed/ |
| H A D | qed_init_ops.h | 79 #define STORE_RT_REG(hwfn, offset, val) \
80 qed_init_store_rt_reg(hwfn, offset, val)
82 #define OVERWRITE_RT_REG(hwfn, offset, val) \
83 qed_init_store_rt_reg(hwfn, offset, val)
99 #define STORE_RT_REG_AGG(hwfn, offset, val) \
100 qed_init_store_rt_agg(hwfn, offset, (u32 *)&val, sizeof(val))
|
| /linux-4.4.14/arch/tile/include/hv/ |
| H A D | drv_srom_intf.h | 23 /** Read this offset to get the total device size. */
26 /** Read this offset to get the device sector size. */
29 /** Read this offset to get the device page size. */
32 /** Write this offset to flush any pending writes. */
35 /** Write this offset, plus the byte offset of the start of a sector, to
|
| /linux-4.4.14/include/asm-generic/bitops/ |
| H A D | le.h | 12 unsigned long size, unsigned long offset) find_next_zero_bit_le()
14 return find_next_zero_bit(addr, size, offset); find_next_zero_bit_le()
18 unsigned long size, unsigned long offset) find_next_bit_le()
20 return find_next_bit(addr, size, offset); find_next_bit_le()
35 unsigned long size, unsigned long offset);
40 unsigned long size, unsigned long offset);
11 find_next_zero_bit_le(const void *addr, unsigned long size, unsigned long offset) find_next_zero_bit_le() argument
17 find_next_bit_le(const void *addr, unsigned long size, unsigned long offset) find_next_bit_le() argument
|
| /linux-4.4.14/arch/ia64/include/asm/uv/ |
| H A D | uv_hub.h | 23 * M - The low M bits of a physical address represent the offset
50 * M - number of node offset bits (35 .. 40)
59 * M - number of node offset bits (35 .. 40)
171 /* pnode, offset --> socket virtual */ uv_pnode_offset_to_vaddr()
172 static inline void *uv_pnode_offset_to_vaddr(int pnode, unsigned long offset) uv_pnode_offset_to_vaddr() argument
174 return __va(((unsigned long)pnode << uv_hub_info->m_val) | offset); uv_pnode_offset_to_vaddr()
183 unsigned long offset) uv_global_mmr32_address()
186 UV_GLOBAL_MMR32_PNODE_BITS(pnode) | offset); uv_global_mmr32_address()
189 static inline void uv_write_global_mmr32(int pnode, unsigned long offset, uv_write_global_mmr32() argument
192 *uv_global_mmr32_address(pnode, offset) = val; uv_write_global_mmr32()
196 unsigned long offset) uv_read_global_mmr32()
198 return *uv_global_mmr32_address(pnode, offset); uv_read_global_mmr32()
206 unsigned long offset) uv_global_mmr64_address()
209 UV_GLOBAL_MMR64_PNODE_BITS(pnode) | offset); uv_global_mmr64_address()
212 static inline void uv_write_global_mmr64(int pnode, unsigned long offset, uv_write_global_mmr64() argument
215 *uv_global_mmr64_address(pnode, offset) = val; uv_write_global_mmr64()
219 unsigned long offset) uv_read_global_mmr64()
221 return *uv_global_mmr64_address(pnode, offset); uv_read_global_mmr64()
228 static inline unsigned long *uv_local_mmr_address(unsigned long offset) uv_local_mmr_address() argument
230 return __va(UV_LOCAL_MMR_BASE | offset); uv_local_mmr_address()
233 static inline unsigned long uv_read_local_mmr(unsigned long offset) uv_read_local_mmr() argument
235 return *uv_local_mmr_address(offset); uv_read_local_mmr()
238 static inline void uv_write_local_mmr(unsigned long offset, unsigned long val) uv_write_local_mmr() argument
240 *uv_local_mmr_address(offset) = val; uv_write_local_mmr()
182 uv_global_mmr32_address(int pnode, unsigned long offset) uv_global_mmr32_address() argument
195 uv_read_global_mmr32(int pnode, unsigned long offset) uv_read_global_mmr32() argument
205 uv_global_mmr64_address(int pnode, unsigned long offset) uv_global_mmr64_address() argument
218 uv_read_global_mmr64(int pnode, unsigned long offset) uv_read_global_mmr64() argument
|
| /linux-4.4.14/drivers/video/fbdev/ |
| H A D | 68328fb.c | 192 var->red.offset = 0; mc68x328fb_check_var()
194 var->green.offset = 0; mc68x328fb_check_var()
196 var->blue.offset = 0; mc68x328fb_check_var()
198 var->transp.offset = 0; mc68x328fb_check_var()
202 var->red.offset = 0; mc68x328fb_check_var()
204 var->green.offset = 0; mc68x328fb_check_var()
206 var->blue.offset = 0; mc68x328fb_check_var()
208 var->transp.offset = 0; mc68x328fb_check_var()
213 var->red.offset = 0; mc68x328fb_check_var()
215 var->green.offset = 5; mc68x328fb_check_var()
217 var->blue.offset = 10; mc68x328fb_check_var()
219 var->transp.offset = 15; mc68x328fb_check_var()
222 var->red.offset = 0; mc68x328fb_check_var()
224 var->green.offset = 5; mc68x328fb_check_var()
226 var->blue.offset = 11; mc68x328fb_check_var()
228 var->transp.offset = 0; mc68x328fb_check_var()
233 var->red.offset = 0; mc68x328fb_check_var()
235 var->green.offset = 8; mc68x328fb_check_var()
237 var->blue.offset = 16; mc68x328fb_check_var()
239 var->transp.offset = 0; mc68x328fb_check_var()
243 var->red.offset = 0; mc68x328fb_check_var()
245 var->green.offset = 8; mc68x328fb_check_var()
247 var->blue.offset = 16; mc68x328fb_check_var()
249 var->transp.offset = 24; mc68x328fb_check_var()
295 * var->{color}.offset contains start of bitfield mc68x328fb_setcolreg()
298 * cmap[X] is programmed to (X << red.offset) | (X << green.offset) | (X << blue.offset) mc68x328fb_setcolreg()
302 * uses offset = 0 && length = RAMDAC register width. mc68x328fb_setcolreg()
303 * var->{color}.offset is 0 mc68x328fb_setcolreg()
309 * var->{color}.offset contains start of bitfield mc68x328fb_setcolreg()
311 * cmap is programmed to (red << red.offset) | (green << green.offset) | mc68x328fb_setcolreg()
312 * (blue << blue.offset) | (transp << transp.offset) mc68x328fb_setcolreg()
340 v = (red << info->var.red.offset) | mc68x328fb_setcolreg()
341 (green << info->var.green.offset) | mc68x328fb_setcolreg()
342 (blue << info->var.blue.offset) | mc68x328fb_setcolreg()
343 (transp << info->var.transp.offset); mc68x328fb_setcolreg()
462 fb_info.var.red.offset = fb_info.var.green.offset = fb_info.var.blue.offset = 0; mc68x328fb_init()
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