Searched refs:u8 (Results 1 - 200 of 9716) sorted by relevance

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/linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dboost.h3 u16 nvbios_boostTe(struct nvkm_bios *, u8 *, u8 *, u8 *, u8 *, u8 *, u8 *);
6 u8 pstate;
11 u16 nvbios_boostEe(struct nvkm_bios *, int idx, u8 *, u8 *, u8 *, u8 *);
12 u16 nvbios_boostEp(struct nvkm_bios *, int idx, u8 *, u8 *, u8 *, u8 *,
14 u16 nvbios_boostEm(struct nvkm_bios *, u8, u8 *, u8 *, u8 *, u8 *,
18 u8 domain;
19 u8 percent;
24 u16 nvbios_boostSe(struct nvkm_bios *, int, u16, u8 *, u8 *, u8, u8);
25 u16 nvbios_boostSp(struct nvkm_bios *, int, u16, u8 *, u8 *, u8, u8,
H A Drammap.h5 u32 nvbios_rammapTe(struct nvkm_bios *, u8 *ver, u8 *hdr,
6 u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
9 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
11 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *);
13 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *);
16 u8 ever, u8 ehdr, u8 ecnt, u8 elen, int idx,
17 u8 *ver, u8 *hdr);
19 u8 ever, u8 ehdr, u8 ecnt, u8 elen, int idx,
20 u8 *ver, u8 *hdr, struct nvbios_ramcfg *);
H A DM0205.h8 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
10 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz,
14 u8 type;
18 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
20 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_M0205E *);
23 u8 data;
26 u32 nvbios_M0205Se(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr);
27 u32 nvbios_M0205Sp(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr,
H A Ddp.h6 u8 flags;
11 u16 nvbios_dpout_parse(struct nvkm_bios *, u8 idx,
12 u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
15 u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
19 u8 pc;
20 u8 dc;
21 u8 pe;
22 u8 tx_pu;
26 nvbios_dpcfg_parse(struct nvkm_bios *, u16 outp, u8 idx,
27 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_dpcfg *);
29 nvbios_dpcfg_match(struct nvkm_bios *, u16 outp, u8 pc, u8 vs, u8 pe,
30 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_dpcfg *);
H A Dtiming.h6 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
8 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
10 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ramcfg *);
H A DM0209.h4 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
7 u8 v00_40;
8 u8 bits;
9 u8 modulo;
10 u8 v02_40;
11 u8 v02_07;
12 u8 v03;
16 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
18 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_M0209E *);
24 u32 nvbios_M0209Se(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr);
25 u32 nvbios_M0209Sp(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr,
H A Dmxm.h3 u16 mxm_table(struct nvkm_bios *, u8 *ver, u8 *hdr);
4 u8 mxm_sor_map(struct nvkm_bios *, u8 conn);
5 u8 mxm_ddc_map(struct nvkm_bios *, u8 port);
H A Dxpio.h9 u8 type;
10 u8 addr;
11 u8 flags;
14 u16 dcb_xpio_table(struct nvkm_bios *, u8 idx,
15 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
16 u16 dcb_xpio_parse(struct nvkm_bios *, u8 idx,
17 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_xpio *);
H A Dcstep.h4 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz);
7 u8 pstate;
8 u8 index;
11 u16 nvbios_cstepEe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
12 u16 nvbios_cstepEp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
14 u16 nvbios_cstepEm(struct nvkm_bios *, u8 pstate, u8 *ver, u8 *hdr,
19 u8 unkn[2];
20 u8 voltage;
23 u16 nvbios_cstepXe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
24 u16 nvbios_cstepXp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
H A DP0260.h4 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *xnr, u8 *xsz);
10 u32 nvbios_P0260Ee(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
11 u32 nvbios_P0260Ep(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
18 u32 nvbios_P0260Xe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
19 u32 nvbios_P0260Xp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
H A Dvmap.h6 u16 nvbios_vmap_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
7 u16 nvbios_vmap_parse(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
11 u8 unk0;
12 u8 link;
18 u16 nvbios_vmap_entry(struct nvkm_bios *, int idx, u8 *ver, u8 *len);
19 u16 nvbios_vmap_entry_parse(struct nvkm_bios *, int idx, u8 *ver, u8 *len,
H A Dvolt.h4 u8 vidmask;
11 u16 nvbios_volt_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
12 u16 nvbios_volt_parse(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
17 u8 vid;
20 u16 nvbios_volt_entry(struct nvkm_bios *, int idx, u8 *ver, u8 *len);
21 u16 nvbios_volt_entry_parse(struct nvkm_bios *, int idx, u8 *ver, u8 *len,
H A DM0203.h5 u8 type;
9 u32 nvbios_M0203Te(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
10 u32 nvbios_M0203Tp(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
19 u8 type;
20 u8 strap;
21 u8 group;
24 u32 nvbios_M0203Ee(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
25 u32 nvbios_M0203Ep(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
27 u32 nvbios_M0203Em(struct nvkm_bios *, u8 ramcfg, u8 *ver, u8 *hdr,
H A Ddisp.h4 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *sub);
10 u16 nvbios_disp_entry(struct nvkm_bios *, u8 idx, u8 *ver, u8 *hdr, u8 *sub);
11 u16 nvbios_disp_parse(struct nvkm_bios *, u8 idx, u8 *ver, u8 *hdr, u8 *sub,
20 u16 nvbios_outp_entry(struct nvkm_bios *, u8 idx,
21 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
22 u16 nvbios_outp_parse(struct nvkm_bios *, u8 idx,
23 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
25 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *);
32 u16 nvbios_ocfg_entry(struct nvkm_bios *, u16 outp, u8 idx,
33 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
34 u16 nvbios_ocfg_parse(struct nvkm_bios *, u16 outp, u8 idx,
35 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
37 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *);
H A Dperf.h3 u16 nvbios_perf_table(struct nvkm_bios *, u8 *ver, u8 *hdr,
4 u8 *cnt, u8 *len, u8 *snr, u8 *ssz);
7 u8 pstate;
8 u8 fanspeed;
9 u8 voltage;
19 u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
21 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_perfE *);
32 u8 *ver, u8 *hdr, u8 cnt, u8 len);
34 u8 *ver, u8 *hdr, u8 cnt, u8 len, struct nvbios_perfS *);
H A Di2c.h16 u8 drive;
17 u8 sense;
18 u8 share;
19 u8 auxch;
22 u16 dcb_i2c_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
23 u16 dcb_i2c_entry(struct nvkm_bios *, u8 index, u8 *ver, u8 *len);
24 int dcb_i2c_parse(struct nvkm_bios *, u8 index, struct dcb_i2c_entry *);
H A Dconn.h27 u32 nvbios_connTe(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
28 u32 nvbios_connTp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
32 u8 type;
33 u8 location;
34 u8 hpd;
35 u8 dp;
36 u8 di;
37 u8 sr;
38 u8 lcdid;
41 u32 nvbios_connEe(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *hdr);
42 u32 nvbios_connEp(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *hdr,
H A Dpmu.h6 u32 nvbios_pmuTe(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
7 u32 nvbios_pmuTp(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len,
11 u8 type;
15 u32 nvbios_pmuEe(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr);
16 u32 nvbios_pmuEp(struct nvkm_bios *, int idx, u8 *ver, u8 *hdr,
34 bool nvbios_pmuRm(struct nvkm_bios *, u8 type, struct nvbios_pmuR *);
H A Dbit.h4 u8 id;
5 u8 version;
10 int bit_entry(struct nvkm_bios *, u8 id, struct bit_entry *);
H A Dgpio.h28 u8 func;
29 u8 line;
30 u8 log[2];
37 u8 param;
40 u16 dcb_gpio_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *cnt, u8 *len);
41 u16 dcb_gpio_entry(struct nvkm_bios *, int idx, int ent, u8 *ver, u8 *len);
42 u16 dcb_gpio_parse(struct nvkm_bios *, int idx, int ent, u8 *ver, u8 *len,
44 u16 dcb_gpio_match(struct nvkm_bios *, int idx, u8 func, u8 line,
45 u8 *ver, u8 *len, struct dcb_gpio_func *);
H A Ddcb.h57 u16 dcb_table(struct nvkm_bios *, u8 *ver, u8 *hdr, u8 *ent, u8 *len);
58 u16 dcb_outp(struct nvkm_bios *, u8 idx, u8 *ver, u8 *len);
59 u16 dcb_outp_parse(struct nvkm_bios *, u8 idx, u8 *, u8 *,
61 u16 dcb_outp_match(struct nvkm_bios *, u16 type, u16 mask, u8 *, u8 *,
H A Dpcir.h6 u8 class_code[3];
9 u8 image_type;
13 u32 nvbios_pcirTe(struct nvkm_bios *, u32, u8 *ver, u16 *hdr);
14 u32 nvbios_pcirTp(struct nvkm_bios *, u32, u8 *ver, u16 *hdr,
H A Dtherm.h4 u8 temp;
5 u8 hysteresis;
48 u8 min_duty;
49 u8 max_duty;
56 u8 nr_fan_trip;
57 u8 linear_min_temp;
58 u8 linear_max_temp;
/linux-4.1.27/include/drm/i2c/
H A Dtda998x.h5 u8 swap_b:3;
6 u8 mirr_b:1;
7 u8 swap_a:3;
8 u8 mirr_a:1;
9 u8 swap_d:3;
10 u8 mirr_d:1;
11 u8 swap_c:3;
12 u8 mirr_c:1;
13 u8 swap_f:3;
14 u8 mirr_f:1;
15 u8 swap_e:3;
16 u8 mirr_e:1;
18 u8 audio_cfg;
19 u8 audio_clk_cfg;
20 u8 audio_frame[6];
/linux-4.1.27/drivers/media/dvb-frontends/
H A Dbcm3510_priv.h39 u8 raw;
42 u8 CTL :8;
45 u8 LDCERC_4e;
46 u8 LDUERC_4f;
47 u8 LD_BER0_65;
48 u8 LD_BER1_66;
49 u8 LD_BER2_67;
50 u8 LD_BER3_68;
53 u8 RESET :1;
54 u8 IDLE :1;
55 u8 STOP :1;
56 u8 HIRQ0 :1;
57 u8 HIRQ1 :1;
58 u8 na0 :1;
59 u8 HABAV :1;
60 u8 na1 :1;
64 u8 na0 :1;
65 u8 IDLMSK :1;
66 u8 STMSK :1;
67 u8 I0MSK :1;
68 u8 I1MSK :1;
69 u8 na1 :1;
70 u8 HABMSK :1;
71 u8 na2 :1;
75 u8 RESET :1;
76 u8 IDLE :1;
77 u8 STOP :1;
78 u8 RUN :1;
79 u8 HABAV :1;
80 u8 MEMAV :1;
81 u8 ALDONE :1;
82 u8 REIRQ :1;
86 u8 RSTMSK :1;
87 u8 IMSK :1;
88 u8 SMSK :1;
89 u8 RMSK :1;
90 u8 HABMSK :1;
91 u8 MAVMSK :1;
92 u8 ALDMSK :1;
93 u8 REMSK :1;
96 u8 APSTAT2_a4;
97 u8 APMSK2_a5;
100 u8 HABADR :7;
101 u8 na :1;
104 u8 HABDATA_a7;
107 u8 HABR :1;
108 u8 LDHABR :1;
109 u8 APMSK :1;
110 u8 HMSK :1;
111 u8 LDMSK :1;
112 u8 na :3;
115 u8 MADRH_a9;
116 u8 MADRL_aa;
117 u8 MDATA_ab;
122 u8 JDEC :3;
123 u8 na :5;
127 u8 REV :4;
128 u8 LAYER :4;
132 u8 unk0 :1;
133 u8 CNTCTL :1;
134 u8 BITCNT :1;
135 u8 unk1 :1;
136 u8 RESYNC :1;
137 u8 unk2 :3;
141 u8 CSEL0 :1;
142 u8 CLKED0 :1;
143 u8 CSEL1 :1;
144 u8 CLKED1 :1;
145 u8 CLKLEV :1;
146 u8 SPIVAR :1;
147 u8 na :2;
151 u8 CLK :1;
152 u8 DATA :1;
153 u8 CS0 :1;
154 u8 CS1 :1;
155 u8 AGCSEL :1;
156 u8 na0 :1;
157 u8 TUNSEL :1;
158 u8 na1 :1;
161 u8 TUNSEL0_fe;
162 u8 TUNSEL1_ff;
172 u8 microcode_version;
173 u8 script_version;
174 u8 config_version;
175 u8 demod_version;
189 u8 MODE :4;
190 u8 BW :1;
191 u8 FA :1;
192 u8 NTSCSWEEP :1;
193 u8 OFFSET :1;
197 u8 IF_FREQ :3;
198 u8 zero0 :1;
199 u8 SYM_RATE :3;
200 u8 zero1 :1;
203 u8 IF_OFFSET0; /* IF_Offset_10hz */
204 u8 IF_OFFSET1;
205 u8 SYM_OFFSET0; /* SymbolRateOffset */
206 u8 SYM_OFFSET1;
207 u8 NTSC_OFFSET0; /* NTSC_Offset_10hz */
208 u8 NTSC_OFFSET1;
214 u8 MODE :4;
215 u8 BW :1;
216 u8 FA :1;
217 u8 NTSCSWEEP :1;
218 u8 OFFSET :1;
222 u8 IF_FREQ :3;
223 u8 zero0 :1;
224 u8 SYM_RATE :3;
225 u8 zero1 :1;
228 u8 TUNER_FREQ0;
229 u8 TUNER_FREQ1;
230 u8 TUNER_FREQ2;
231 u8 TUNER_FREQ3;
232 u8 IF_OFFSET0; /* IF_Offset_10hz */
233 u8 IF_OFFSET1;
234 u8 SYM_OFFSET0; /* SymbolRateOffset */
235 u8 SYM_OFFSET1;
236 u8 NTSC_OFFSET0; /* NTSC_Offset_10hz */
237 u8 NTSC_OFFSET1;
265 u8 HOST_SYM_RATE0;
266 u8 HOST_SYM_RATE1;
267 u8 HOST_SYM_RATE2;
268 u8 HOST_SYM_RATE3;
274 u8 HOST_IF_FREQ0;
275 u8 HOST_IF_FREQ1;
276 u8 HOST_IF_FREQ2;
277 u8 HOST_IF_FREQ3;
284 u8 ACQ :1; /* on/off*/
285 u8 unused :7;
290 u8 LVL :1;
291 u8 unused :6;
292 u8 SEL :1;
297 u8 AI :1;
298 u8 unused :7;
307 u8 BE :1;
308 u8 unused :7;
313 u8 RE :1; /* a/d ram port pins */
314 u8 PE :1; /* baud clock pin */
315 u8 AC :1; /* a/d clock pin */
316 u8 BE :1; /* baud clock pin */
317 u8 unused :4;
334 u8 size :3;
335 u8 unk :2;
336 u8 clk_off :1;
337 u8 cs0 :1;
338 u8 cs1 :1;
342 u8 data;
346 u8 length;
347 u8 clock_width;
348 u8 misc;
349 u8 TUNCTL_state;
358 u8 EQ_MODE :4;
359 u8 reserved :2;
360 u8 QRE :1; /* if QSE and the spectrum is inversed */
361 u8 QSE :1; /* automatic spectral inversion */
365 u8 RECEIVER_LOCK :1;
366 u8 FEC_LOCK :1;
367 u8 OUT_PLL_LOCK :1;
368 u8 reserved :5;
372 u8 reserved :2;
373 u8 BW :1;
374 u8 NTE :1; /* NTSC filter sweep enabled */
375 u8 AQI :1; /* currently acquiring */
376 u8 FA :1; /* fast acquisition */
377 u8 ARI :1; /* auto reacquire */
378 u8 TI :1; /* programming the tuner */
380 u8 STATUS3;
381 u8 SNR_EST0;
382 u8 SNR_EST1;
383 u8 TUNER_FREQ0;
384 u8 TUNER_FREQ1;
385 u8 TUNER_FREQ2;
386 u8 TUNER_FREQ3;
387 u8 SYM_RATE0;
388 u8 SYM_RATE1;
389 u8 SYM_RATE2;
390 u8 SYM_RATE3;
391 u8 SYM_OFFSET0;
392 u8 SYM_OFFSET1;
393 u8 SYM_ERROR0;
394 u8 SYM_ERROR1;
395 u8 IF_FREQ0;
396 u8 IF_FREQ1;
397 u8 IF_FREQ2;
398 u8 IF_FREQ3;
399 u8 IF_OFFSET0;
400 u8 IF_OFFSET1;
401 u8 IF_ERROR0;
402 u8 IF_ERROR1;
403 u8 NTSC_FILTER0;
404 u8 NTSC_FILTER1;
405 u8 NTSC_FILTER2;
406 u8 NTSC_FILTER3;
407 u8 NTSC_OFFSET0;
408 u8 NTSC_OFFSET1;
409 u8 NTSC_ERROR0;
410 u8 NTSC_ERROR1;
411 u8 INT_AGC_LEVEL0;
412 u8 INT_AGC_LEVEL1;
413 u8 EXT_AGC_LEVEL0;
414 u8 EXT_AGC_LEVEL1;
420 u8 EQ_MODE :4;
421 u8 reserved :2;
422 u8 QRE :1;
423 u8 QSR :1;
426 u8 RL :1;
427 u8 FL :1;
428 u8 OL :1;
429 u8 reserved :5;
431 u8 SYMBOL_RATE0;
432 u8 SYMBOL_RATE1;
433 u8 SYMBOL_RATE2;
434 u8 SYMBOL_RATE3;
435 u8 LDCERC0;
436 u8 LDCERC1;
437 u8 LDCERC2;
438 u8 LDCERC3;
439 u8 LDUERC0;
440 u8 LDUERC1;
441 u8 LDUERC2;
442 u8 LDUERC3;
443 u8 LDBER0;
444 u8 LDBER1;
445 u8 LDBER2;
446 u8 LDBER3;
448 u8 MODE_TYPE :4; /* acquire mode 0 */
449 u8 reservd :4;
451 u8 SNR_EST0;
452 u8 SNR_EST1;
453 u8 SIGNAL;
H A Ddrxd_firm.h77 extern u8 DRXD_InitAtomicRead[];
78 extern u8 DRXD_HiI2cPatch_1[];
79 extern u8 DRXD_HiI2cPatch_3[];
81 extern u8 DRXD_InitSC[];
83 extern u8 DRXD_ResetCEFR[];
84 extern u8 DRXD_InitFEA2_1[];
85 extern u8 DRXD_InitFEA2_2[];
86 extern u8 DRXD_InitCPA2[];
87 extern u8 DRXD_InitCEA2[];
88 extern u8 DRXD_InitEQA2[];
89 extern u8 DRXD_InitECA2[];
90 extern u8 DRXD_ResetECA2[];
91 extern u8 DRXD_ResetECRAM[];
93 extern u8 DRXD_A2_microcode[];
96 extern u8 DRXD_InitFEB1_1[];
97 extern u8 DRXD_InitFEB1_2[];
98 extern u8 DRXD_InitCPB1[];
99 extern u8 DRXD_InitCEB1[];
100 extern u8 DRXD_InitEQB1[];
101 extern u8 DRXD_InitECB1[];
103 extern u8 DRXD_InitDiversityFront[];
104 extern u8 DRXD_InitDiversityEnd[];
105 extern u8 DRXD_DisableDiversity[];
106 extern u8 DRXD_StartDiversityFront[];
107 extern u8 DRXD_StartDiversityEnd[];
109 extern u8 DRXD_DiversityDelay8MHZ[];
110 extern u8 DRXD_DiversityDelay6MHZ[];
112 extern u8 DRXD_B1_microcode[];
H A Ddib7000p.h9 u8 output_mpeg2_in_188_bytes;
10 u8 hostbus_diversity;
11 u8 tuner_is_baseband;
14 u8 agc_config_count;
31 u8 quartz_direct;
33 u8 spur_protect;
35 int (*agc_control) (struct dvb_frontend *, u8 before);
37 u8 output_mode;
38 u8 disable_sample_and_hold:1;
40 u8 enable_current_mirror:1;
43 u8 default_i2c_addr;
44 u8 enMpegOutput:1;
55 int (*set_gpio)(struct dvb_frontend *demod, u8 num, u8 dir, u8 val);
56 u32 (*ctrl_timf)(struct dvb_frontend *fe, u8 op, u32 timf);
59 int (*pid_filter_ctrl)(struct dvb_frontend *fe, u8 onoff);
60 int (*pid_filter)(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff);
61 int (*i2c_enumeration)(struct i2c_adapter *i2c, int no_of_demods, u8 default_addr, struct dib7000p_config cfg[]);
66 struct dvb_frontend *(*init)(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib7000p_config *cfg);
H A Ddib8000.h7 u8 output_mpeg2_in_188_bytes;
8 u8 hostbus_diversity;
9 u8 tuner_is_baseband;
12 u8 agc_config_count;
28 void (*agc_control) (struct dvb_frontend *, u8 before);
32 u8 div_cfg;
33 u8 output_mode;
34 u8 refclksel;
35 u8 enMpegOutput:1;
45 struct dibx000_bandwidth_config *pll, u32 bw, u8 ratio);
46 int (*set_gpio)(struct dvb_frontend *fe, u8 num, u8 dir, u8 val);
50 s32 (*get_adc_power)(struct dvb_frontend *fe, u8 mode);
51 int (*get_dc_power)(struct dvb_frontend *fe, u8 IQ);
59 u8 default_addr, u8 first_addr, u8 is_dib8096p);
61 int (*pid_filter_ctrl)(struct dvb_frontend *fe, u8 onoff);
62 int (*pid_filter)(struct dvb_frontend *fe, u8 id, u16 pid, u8 onoff);
63 struct dvb_frontend *(*init)(struct i2c_adapter *i2c_adap, u8 i2c_addr, struct dib8000_config *cfg);
H A Ddib7000m.h9 u8 dvbt_mode;
10 u8 output_mpeg2_in_188_bytes;
11 u8 hostbus_diversity;
12 u8 tuner_is_baseband;
13 u8 mobile_mode;
16 u8 agc_config_count;
34 u8 quartz_direct;
36 u8 input_clk_is_div_2;
38 int (*agc_control) (struct dvb_frontend *, u8 before);
45 u8 i2c_addr,
50 extern int dib7000m_pid_filter(struct dvb_frontend *, u8 id, u16 pid, u8 onoff);
51 extern int dib7000m_pid_filter_ctrl(struct dvb_frontend *fe, u8 onoff);
55 u8 i2c_addr, struct dib7000m_config *cfg) dib7000m_attach()
69 static inline int dib7000m_pid_filter(struct dvb_frontend *fe, u8 id, dib7000m_pid_filter()
70 u16 pid, u8 onoff) dib7000m_pid_filter()
H A Ddibx000_common.h28 u8 i2c_addr;
34 u8 i2c_write_buffer[8];
35 u8 i2c_read_buffer[2];
41 u8 i2c_addr);
67 u8 band_caps;
74 u8 alpha_level;
77 u8 wbd_inv;
79 u8 wbd_sel;
80 u8 wbd_alpha;
87 u8 agc1_pt1;
88 u8 agc1_pt2;
89 u8 agc1_pt3;
91 u8 agc1_slope1;
92 u8 agc1_slope2;
94 u8 agc2_pt1;
95 u8 agc2_pt2;
97 u8 agc2_slope1;
98 u8 agc2_slope2;
100 u8 alpha_mant;
101 u8 alpha_exp;
103 u8 beta_mant;
104 u8 beta_exp;
106 u8 perform_agc_softsplit;
120 u8 pll_prediv;
121 u8 pll_ratio;
122 u8 pll_range;
123 u8 pll_reset;
124 u8 pll_bypass;
126 u8 enable_refdiv;
127 u8 bypclk_div;
128 u8 IO_CLK_en_core;
129 u8 ADClkSrc;
130 u8 modulo;
209 u8 status;
236 u8 component;
244 u8 function;
263 u8 size; /* Actual number of subbands. */
/linux-4.1.27/arch/x86/include/asm/
H A Dpci-direct.h9 extern u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset);
10 extern u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset);
11 extern u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset);
12 extern void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, u32 val);
13 extern void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val);
14 extern void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val);
19 extern void early_dump_pci_device(u8 bus, u8 slot, u8 func);
H A Drio.h14 u8 version; /* Version number of this data structure */
15 u8 num_scal_dev; /* # of Scalability devices */
16 u8 num_rio_dev; /* # of RIO I/O devices */
20 u8 node_id; /* Scalability Node ID */
22 u8 port0node; /* Node ID port connected to: 0xFF=None */
23 u8 port0port; /* Port num port connected to: 0,1,2, or */
25 u8 port1node; /* Node ID port connected to: 0xFF = None */
26 u8 port1port; /* Port num port connected to: 0,1,2, or */
28 u8 port2node; /* Node ID port connected to: 0xFF = None */
29 u8 port2port; /* Port num port connected to: 0,1,2, or */
31 u8 chassis_num; /* 1 based Chassis number (1 = boot node) */
35 u8 node_id; /* RIO Node ID */
37 u8 type; /* Type of device */
38 u8 owner_id; /* Node ID of Hurricane that owns this */
40 u8 port0node; /* Node ID port connected to: 0xFF=None */
41 u8 port0port; /* Port num port connected to: 0,1,2, or */
43 u8 port1node; /* Node ID port connected to: 0xFF=None */
44 u8 port1port; /* Port num port connected to: 0,1,2, or */
46 u8 first_slot; /* Lowest slot number below this Calgary */
47 u8 status; /* Bit 0 = 1 : the XAPIC is used */
51 u8 WP_index; /* instance index - lower ones have */
53 u8 chassis_num; /* 1 based Chassis number */
/linux-4.1.27/drivers/staging/xgifb/
H A Dvb_util.h3 extern void xgifb_reg_set(unsigned long, u8, u8);
4 extern u8 xgifb_reg_get(unsigned long, u8);
5 extern void xgifb_reg_or(unsigned long, u8, unsigned);
6 extern void xgifb_reg_and(unsigned long, u8, unsigned);
7 extern void xgifb_reg_and_or(unsigned long, u8, unsigned, unsigned);
H A Dvb_util.c4 void xgifb_reg_set(unsigned long port, u8 index, u8 data) xgifb_reg_set()
10 u8 xgifb_reg_get(unsigned long port, u8 index) xgifb_reg_get()
16 void xgifb_reg_and_or(unsigned long port, u8 index, xgifb_reg_and_or()
19 u8 temp; xgifb_reg_and_or()
26 void xgifb_reg_and(unsigned long port, u8 index, unsigned data_and) xgifb_reg_and()
28 u8 temp; xgifb_reg_and()
35 void xgifb_reg_or(unsigned long port, u8 index, unsigned data_or) xgifb_reg_or()
37 u8 temp; xgifb_reg_or()
/linux-4.1.27/include/linux/
H A Dcrc7.h5 extern const u8 crc7_be_syndrome_table[256];
7 static inline u8 crc7_be_byte(u8 crc, u8 data) crc7_be_byte()
12 extern u8 crc7_be(u8 crc, const u8 *buffer, size_t len);
H A Dolpc-ec.h25 int (*ec_cmd)(u8, u8 *, size_t, u8 *, size_t, void *);
32 extern int olpc_ec_cmd(u8 cmd, u8 *inbuf, size_t inlen, u8 *outbuf,
37 static inline int olpc_ec_cmd(u8 cmd, u8 *inbuf, size_t inlen, u8 *outbuf, olpc_ec_cmd()
H A Dicmpv6.h15 extern void icmpv6_send(struct sk_buff *skb, u8 type, u8 code, __u32 info);
17 typedef void ip6_icmp_send_t(struct sk_buff *skb, u8 type, u8 code, __u32 info);
24 u8 type, u8 code, __u32 info) icmpv6_send()
31 extern int icmpv6_err_convert(u8 type, u8 code,
35 u8 code, int pos);
41 u8 type,
/linux-4.1.27/include/scsi/
H A Dsas.h212 u8 fis_type; /* 0x34 */
213 u8 flags;
214 u8 status;
215 u8 error;
217 u8 lbal;
218 union { u8 lbam; u8 byte_count_low; };
219 union { u8 lbah; u8 byte_count_high; };
220 u8 device;
222 u8 lbal_exp;
223 u8 lbam_exp;
224 u8 lbah_exp;
225 u8 _r_a;
227 union { u8 sector_count; u8 interrupt_reason; };
228 u8 sector_count_exp;
229 u8 _r_b;
230 u8 _r_c;
236 u8 fis_type; /* 0x27 */
237 u8 flags;
238 u8 command;
239 u8 features;
241 u8 lbal;
242 union { u8 lbam; u8 byte_count_low; };
243 union { u8 lbah; u8 byte_count_high; };
244 u8 device;
246 u8 lbal_exp;
247 u8 lbam_exp;
248 u8 lbah_exp;
249 u8 features_exp;
251 union { u8 sector_count; u8 interrupt_reason; };
252 u8 sector_count_exp;
253 u8 _r_a;
254 u8 control;
264 u8 frame_type:4;
265 u8 dev_type:3;
266 u8 _un0:1;
269 u8 _un1;
274 u8 _un20:1;
275 u8 smp_iport:1;
276 u8 stp_iport:1;
277 u8 ssp_iport:1;
278 u8 _un247:4;
280 u8 initiator_bits;
286 u8 _un30:1;
287 u8 smp_tport:1;
288 u8 stp_tport:1;
289 u8 ssp_tport:1;
290 u8 _un347:4;
292 u8 target_bits;
296 u8 _un4_11[8];
299 u8 sas_addr[SAS_ADDR_SIZE];
302 u8 phy_id;
304 u8 _un21_27[7];
310 u8 frame_type;
311 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
312 u8 _r_a;
313 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
316 u8 changing_data_ptr:1;
317 u8 retransmit:1;
318 u8 retry_data_frames:1;
319 u8 _r_c:5;
321 u8 num_fill_bytes:2;
322 u8 _r_d:6;
331 u8 _r_a[10];
333 u8 datapres:2;
334 u8 _r_b:6;
336 u8 status;
343 u8 resp_data[0];
344 u8 sense_data[0];
352 u8 _r_a;
353 u8 num_phys;
355 u8 conf_route_table:1;
356 u8 configuring:1;
357 u8 config_others:1;
358 u8 orej_retry_supp:1;
359 u8 stp_cont_awt:1;
360 u8 self_config:1;
361 u8 zone_config:1;
362 u8 t2t_supp:1;
364 u8 _r_c;
366 u8 enclosure_logical_id[8];
368 u8 _r_d[12];
372 u8 _r_a[5];
374 u8 phy_id;
377 u8 _r_c:4;
378 u8 attached_dev_type:3;
379 u8 _r_d:1;
381 u8 linkrate:4;
382 u8 _r_e:4;
384 u8 attached_sata_host:1;
385 u8 iproto:3;
386 u8 _r_f:4;
388 u8 attached_sata_dev:1;
389 u8 tproto:3;
390 u8 _r_g:3;
391 u8 attached_sata_ps:1;
393 u8 sas_addr[8];
394 u8 attached_sas_addr[8];
395 u8 attached_phy_id;
397 u8 _r_h[7];
399 u8 hmin_linkrate:4;
400 u8 pmin_linkrate:4;
401 u8 hmax_linkrate:4;
402 u8 pmax_linkrate:4;
404 u8 change_count;
406 u8 pptv:4;
407 u8 _r_i:3;
408 u8 virtual:1;
410 u8 routing_attr:4;
411 u8 _r_j:4;
413 u8 conn_type;
414 u8 conn_el_index;
415 u8 conn_phy_link;
417 u8 _r_k[8];
421 u8 _r_a[5];
423 u8 phy_id;
424 u8 _r_b;
426 u8 affil_valid:1;
427 u8 affil_supp:1;
428 u8 _r_c:6;
432 u8 stp_sas_addr[8];
438 u8 affil_stp_ini_addr[8];
444 u8 frame_type;
445 u8 function;
446 u8 result;
447 u8 reserved;
458 u8 _un0:1;
459 u8 dev_type:3;
460 u8 frame_type:4;
463 u8 _un1;
468 u8 _un247:4;
469 u8 ssp_iport:1;
470 u8 stp_iport:1;
471 u8 smp_iport:1;
472 u8 _un20:1;
474 u8 initiator_bits;
480 u8 _un347:4;
481 u8 ssp_tport:1;
482 u8 stp_tport:1;
483 u8 smp_tport:1;
484 u8 _un30:1;
486 u8 target_bits;
490 u8 _un4_11[8];
493 u8 sas_addr[SAS_ADDR_SIZE];
496 u8 phy_id;
498 u8 _un21_27[7];
504 u8 frame_type;
505 u8 hashed_dest_addr[HASHED_SAS_ADDR_SIZE];
506 u8 _r_a;
507 u8 hashed_src_addr[HASHED_SAS_ADDR_SIZE];
510 u8 _r_c:5;
511 u8 retry_data_frames:1;
512 u8 retransmit:1;
513 u8 changing_data_ptr:1;
515 u8 _r_d:6;
516 u8 num_fill_bytes:2;
525 u8 _r_a[10];
527 u8 _r_b:6;
528 u8 datapres:2;
530 u8 status;
537 u8 resp_data[0];
538 u8 sense_data[0];
546 u8 _r_a;
547 u8 num_phys;
549 u8 t2t_supp:1;
550 u8 zone_config:1;
551 u8 self_config:1;
552 u8 stp_cont_awt:1;
553 u8 orej_retry_supp:1;
554 u8 config_others:1;
555 u8 configuring:1;
556 u8 conf_route_table:1;
558 u8 _r_c;
560 u8 enclosure_logical_id[8];
562 u8 _r_d[12];
566 u8 _r_a[5];
568 u8 phy_id;
571 u8 _r_d:1;
572 u8 attached_dev_type:3;
573 u8 _r_c:4;
575 u8 _r_e:4;
576 u8 linkrate:4;
578 u8 _r_f:4;
579 u8 iproto:3;
580 u8 attached_sata_host:1;
582 u8 attached_sata_ps:1;
583 u8 _r_g:3;
584 u8 tproto:3;
585 u8 attached_sata_dev:1;
587 u8 sas_addr[8];
588 u8 attached_sas_addr[8];
589 u8 attached_phy_id;
591 u8 _r_h[7];
593 u8 pmin_linkrate:4;
594 u8 hmin_linkrate:4;
595 u8 pmax_linkrate:4;
596 u8 hmax_linkrate:4;
598 u8 change_count;
600 u8 virtual:1;
601 u8 _r_i:3;
602 u8 pptv:4;
604 u8 _r_j:4;
605 u8 routing_attr:4;
607 u8 conn_type;
608 u8 conn_el_index;
609 u8 conn_phy_link;
611 u8 _r_k[8];
615 u8 _r_a[5];
617 u8 phy_id;
618 u8 _r_b;
620 u8 _r_c:6;
621 u8 affil_supp:1;
622 u8 affil_valid:1;
626 u8 stp_sas_addr[8];
632 u8 affil_stp_ini_addr[8];
638 u8 frame_type;
639 u8 function;
640 u8 result;
641 u8 reserved;
H A Dsrp.h119 u8 opcode;
120 u8 reserved1[7];
123 u8 reserved2[4];
125 u8 req_flags;
126 u8 reserved3[5];
127 u8 initiator_port_id[16];
128 u8 target_port_id[16];
137 u8 opcode;
138 u8 reserved1[3];
144 u8 rsp_flags;
145 u8 reserved2[25];
149 u8 opcode;
150 u8 reserved1[3];
153 u8 reserved2[8];
155 u8 reserved3[6];
159 u8 opcode;
160 u8 reserved[7];
165 u8 opcode;
166 u8 sol_not;
167 u8 reserved[2];
177 u8 opcode;
178 u8 sol_not;
179 u8 reserved1[6];
181 u8 reserved2[4];
183 u8 reserved3[2];
184 u8 tsk_mgmt_func;
185 u8 reserved4;
187 u8 reserved5[8];
195 u8 opcode;
196 u8 sol_not;
197 u8 reserved1[3];
198 u8 buf_fmt;
199 u8 data_out_desc_cnt;
200 u8 data_in_desc_cnt;
202 u8 reserved2[4];
204 u8 reserved3;
205 u8 task_attr;
206 u8 reserved4;
207 u8 add_cdb_len;
208 u8 cdb[16];
209 u8 add_data[0];
227 u8 opcode;
228 u8 sol_not;
229 u8 reserved1[2];
232 u8 reserved2[2];
233 u8 flags;
234 u8 status;
239 u8 data[0];
243 u8 opcode;
244 u8 sol_not;
245 u8 reserved[2];
251 u8 opcode;
252 u8 reserved[7];
262 u8 opcode;
263 u8 sol_not;
264 u8 reserved[2];
271 u8 sense_data[0];
275 u8 opcode;
276 u8 reserved[7];
/linux-4.1.27/drivers/staging/rtl8192e/
H A Drtl819x_HT.h103 u8 AdvCoding:1;
104 u8 ChlWidth:1;
105 u8 MimoPwrSave:2;
106 u8 GreenField:1;
107 u8 ShortGI20Mhz:1;
108 u8 ShortGI40Mhz:1;
109 u8 TxSTBC:1;
110 u8 RxSTBC:2;
111 u8 DelayBA:1;
112 u8 MaxAMSDUSize:1;
113 u8 DssCCk:1;
114 u8 PSMP:1;
115 u8 Rsvd1:1;
116 u8 LSigTxopProtect:1;
118 u8 MaxRxAMPDUFactor:2;
119 u8 MPDUDensity:3;
120 u8 Rsvd2:3;
122 u8 MCS[16];
127 u8 TxBFCap[4];
129 u8 ASCap;
135 u8 ControlChl;
137 u8 ExtChlOffset:2;
138 u8 RecommemdedTxWidth:1;
139 u8 RIFS:1;
140 u8 PSMPAccessOnly:1;
141 u8 SrvIntGranularity:3;
143 u8 OptMode:2;
144 u8 NonGFDevPresent:1;
145 u8 Revd1:5;
146 u8 Revd2:8;
148 u8 Rsvd3:6;
149 u8 DualBeacon:1;
150 u8 DualCTSProtect:1;
152 u8 SecondaryBeacon:1;
153 u8 LSigTxopProtectFull:1;
154 u8 PcoActive:1;
155 u8 PcoPhase:1;
156 u8 Rsvd4:4;
158 u8 BasicMSC[16];
162 u8 MimoPsEnable:1;
163 u8 MimoPsMode:1;
164 u8 Reserved:6;
180 u8 bEnableHT;
181 u8 bCurrentHTSupport;
183 u8 bRegBW40MHz;
184 u8 bCurBW40MHz;
186 u8 bRegShortGI40MHz;
187 u8 bCurShortGI40MHz;
189 u8 bRegShortGI20MHz;
190 u8 bCurShortGI20MHz;
192 u8 bRegSuppCCK;
193 u8 bCurSuppCCK;
201 u8 PeerHTCapBuf[32];
202 u8 PeerHTInfoBuf[32];
205 u8 bAMSDU_Support;
207 u8 bCurrent_AMSDU_Support;
210 u8 bAMPDUEnable;
211 u8 bCurrentAMPDUEnable;
212 u8 AMPDU_Factor;
213 u8 CurrentAMPDUFactor;
214 u8 MPDU_Density;
215 u8 CurrentMPDUDensity;
218 u8 ForcedAMPDUFactor;
219 u8 ForcedMPDUDensity;
224 u8 bForcedShortGI;
226 u8 CurrentOpMode;
228 u8 SelfMimoPs;
229 u8 PeerMimoPs;
232 u8 bCurTxBW40MHz;
233 u8 PeerBandwidth;
235 u8 bSwBwInProgress;
237 u8 SwBwStep;
239 u8 bRegRT2RTAggregation;
240 u8 RT2RT_HT_Mode;
241 u8 bCurrentRT2RTAggregation;
242 u8 bCurrentRT2RTLongSlotTime;
243 u8 szRT2RTAggBuffer[10];
245 u8 bRegRxReorderEnable;
246 u8 bCurRxReorderEnable;
247 u8 RxReorderWinSize;
248 u8 RxReorderPendingTime;
251 u8 bIsPeerBcm;
253 u8 IOTPeer;
255 u8 IOTRaFunc;
257 u8 bWAIotBroadcom;
258 u8 WAIotTH;
260 u8 bAcceptAddbaReq;
266 u8 bEnableHT;
268 u8 bSupportCck;
272 u8 AMPDU_Factor;
273 u8 MPDU_Density;
275 u8 HTHighestOperaRate;
277 u8 bBw40MHz;
279 u8 bCurTxBW40MHz;
281 u8 bCurShortGI20MHz;
283 u8 bCurShortGI40MHz;
285 u8 MimoPs;
287 u8 McsRateSet[16];
289 u8 bCurRxReorderEnable;
302 u8 bdSupportHT;
304 u8 bdHTCapBuf[32];
306 u8 bdHTInfoBuf[32];
312 u8 bdRT2RTAggregation;
313 u8 bdRT2RTLongSlotTime;
314 u8 RT2RT_HT_Mode;
315 u8 bdHT1R;
343 extern u8 MCS_FILTER_ALL[16];
344 extern u8 MCS_FILTER_1SS[16];
H A Drtl819x_Qos.h56 u8 charData[3];
58 u8 ucTrafficType:1;
59 u8 ucTSID:4;
60 u8 ucDirection:2;
61 u8 ucAccessPolicy:2;
62 u8 ucAggregation:1;
63 u8 ucPSB:1;
64 u8 ucUP:3;
65 u8 ucTSInfoAckPolicy:2;
66 u8 ucSchedule:1;
67 u8 ucReserved:7;
72 u8 charData[55];
95 u8 ID;
96 u8 Length;
97 u8 OUI[3];
98 u8 OUI_Type;
99 u8 OUI_SubType;
100 u8 Version;
105 u8 *Octet;
227 u8 HwAcmCtl;
232 #define AC_UAPSD u8
249 u8 Priority;
250 u8 ClassifierType;
251 u8 Mask;
255 u8 Priority;
256 u8 ClassifierType;
257 u8 Mask;
258 u8 SrcAddr[6];
259 u8 DstAddr[6];
264 u8 Priority;
265 u8 ClassifierType;
266 u8 Mask;
267 u8 Version;
268 u8 SrcIP[4];
269 u8 DstIP[4];
272 u8 DSCP;
273 u8 Protocol;
274 u8 Reserved;
278 u8 Priority;
279 u8 ClassifierType;
280 u8 Mask;
281 u8 Version;
282 u8 SrcIP[16];
283 u8 DstIP[16];
286 u8 FlowLabel[3];
290 u8 Priority;
291 u8 ClassifierType;
292 u8 Mask;
302 u8 TimeSlotCount;
303 u8 DialogToken;
306 u8 NominalPhyRate;
310 u8 WMMIEBuf[MAX_WMMELE_LENGTH];
311 u8 *WMMIE;
318 u8 bInServicePeriod;
319 u8 MaxSPLength;
322 u8 *pWMMInfoEle;
323 u8 WMMParamEle[WMM_PARAM_ELEMENT_SIZE];
329 u8 DialogToken;
332 u8 QBssWirelessMode;
344 u8 bdWMMIEBuf[MAX_WMMELE_LENGTH];
349 u8 *pWMMInfoEle;
350 u8 *pWMMParamEle;
352 u8 QBssLoad[QBSS_LOAD_SIZE];
360 u8 charData;
363 u8 AIFSN:4;
364 u8 acm:1;
365 u8 ACI:2;
366 u8 Reserved:1;
371 u8 charData;
373 u8 ECWmin:4;
374 u8 ECWmax:4;
380 u8 charData[4];
/linux-4.1.27/drivers/net/wireless/ti/wlcore/
H A Dini.h33 u8 ref_clock;
34 u8 settling_time;
35 u8 clk_valid_on_wakeup;
36 u8 dc2dc_mode;
37 u8 dual_mode_select;
38 u8 tx_bip_fem_auto_detect;
39 u8 tx_bip_fem_manufacturer;
40 u8 general_settings;
41 u8 sr_state;
42 u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
43 u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
44 u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
50 u8 ref_clock;
51 u8 settling_time;
52 u8 clk_valid_on_wakeup;
53 u8 tcxo_ref_clock;
54 u8 tcxo_settling_time;
55 u8 tcxo_valid_on_wakeup;
56 u8 tcxo_ldo_voltage;
57 u8 xtal_itrim_val;
58 u8 platform_conf;
59 u8 dual_mode_select;
60 u8 tx_bip_fem_auto_detect;
61 u8 tx_bip_fem_manufacturer;
62 u8 general_settings[WL128X_INI_MAX_SETTINGS_PARAM];
63 u8 sr_state;
64 u8 srf1[WL1271_INI_MAX_SMART_REFLEX_PARAM];
65 u8 srf2[WL1271_INI_MAX_SMART_REFLEX_PARAM];
66 u8 srf3[WL1271_INI_MAX_SMART_REFLEX_PARAM];
72 u8 rx_trace_insertion_loss;
73 u8 tx_trace_loss;
74 u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
80 u8 rx_trace_insertion_loss;
81 u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_2];
82 u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
89 u8 tx_bip_ref_power;
90 u8 tx_bip_ref_offset;
91 u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
92 u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
93 u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
94 u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
95 u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
96 u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
97 u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
98 u8 rx_fem_insertion_loss;
99 u8 degraded_low_to_normal_thr;
100 u8 normal_to_degraded_high_thr;
109 u8 tx_bip_ref_power;
110 u8 tx_bip_ref_offset;
111 u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
112 u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
113 u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
114 u8 tx_per_chan_pwr_limits_11b[WL1271_INI_CHANNEL_COUNT_2];
115 u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_2];
116 u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
117 u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT + 1];
118 u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_2];
119 u8 tx_pd_vs_temperature[WL128X_INI_PD_VS_TEMPERATURE_RANGES];
120 u8 rx_fem_insertion_loss;
121 u8 degraded_low_to_normal_thr;
122 u8 normal_to_degraded_high_thr;
129 u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
130 u8 tx_trace_loss[WL1271_INI_SUB_BAND_COUNT_5];
131 u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
135 u8 rx_trace_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
136 u8 tx_trace_loss[WL1271_INI_CHANNEL_COUNT_5];
137 u8 rx_rssi_process_compens[WL1271_INI_RSSI_PROCESS_COMPENS_SIZE];
142 u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
143 u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
144 u8 tx_per_rate_pwr_limits_normal[WL1271_INI_RATE_GROUP_COUNT];
145 u8 tx_per_rate_pwr_limits_degraded[WL1271_INI_RATE_GROUP_COUNT];
146 u8 tx_per_rate_pwr_limits_extreme[WL1271_INI_RATE_GROUP_COUNT];
147 u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
148 u8 tx_pd_vs_rate_offsets[WL1271_INI_RATE_GROUP_COUNT];
149 u8 tx_ibias[WL1271_INI_RATE_GROUP_COUNT];
150 u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
151 u8 degraded_low_to_normal_thr;
152 u8 normal_to_degraded_high_thr;
157 u8 tx_bip_ref_power[WL1271_INI_SUB_BAND_COUNT_5];
158 u8 tx_bip_ref_offset[WL1271_INI_SUB_BAND_COUNT_5];
159 u8 tx_per_rate_pwr_limits_normal[WL128X_INI_RATE_GROUP_COUNT];
160 u8 tx_per_rate_pwr_limits_degraded[WL128X_INI_RATE_GROUP_COUNT];
161 u8 tx_per_rate_pwr_limits_extreme[WL128X_INI_RATE_GROUP_COUNT];
162 u8 tx_per_chan_pwr_limits_ofdm[WL1271_INI_CHANNEL_COUNT_5];
163 u8 tx_pd_vs_rate_offsets[WL128X_INI_RATE_GROUP_COUNT];
164 u8 tx_ibias[WL128X_INI_RATE_GROUP_COUNT];
165 u8 tx_pd_vs_chan_offsets[WL1271_INI_CHANNEL_COUNT_5];
166 u8 tx_pd_vs_temperature[WL1271_INI_SUB_BAND_COUNT_5 *
168 u8 rx_fem_insertion_loss[WL1271_INI_SUB_BAND_COUNT_5];
169 u8 degraded_low_to_normal_thr;
170 u8 normal_to_degraded_high_thr;
193 u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
197 u8 padding1;
199 u8 padding2;
202 u8 padding;
205 u8 padding3;
208 u8 padding;
214 u8 nvs[WL1271_INI_NVS_SECTION_SIZE];
218 u8 fem_vendor_and_options;
220 u8 padding2;
223 u8 padding;
226 u8 padding3;
229 u8 padding;
H A Dcmd.h34 int wl12xx_cmd_role_enable(struct wl1271 *wl, u8 *addr, u8 role_type,
35 u8 *role_id);
36 int wl12xx_cmd_role_disable(struct wl1271 *wl, u8 *role_id);
45 int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer);
53 u8 ps_mode, u16 auto_ps_timeout);
56 int wl1271_cmd_template_set(struct wl1271 *wl, u8 role_id,
63 u8 role_id, u8 band,
64 const u8 *ssid, size_t ssid_len,
65 const u8 *ie, size_t ie_len, const u8 *common_ie,
74 int wl12xx_cmd_set_default_wep_key(struct wl1271 *wl, u8 id, u8 hlid);
76 u16 action, u8 id, u8 key_type,
77 u8 key_size, const u8 *key, const u8 *addr,
80 u16 action, u8 id, u8 key_type,
81 u8 key_size, const u8 *key, u8 hlid, u32 tx_seq_32,
84 u8 hlid);
85 int wl12xx_roc(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 role_id,
86 enum ieee80211_band band, u8 channel);
87 int wl12xx_croc(struct wl1271 *wl, u8 role_id);
89 struct ieee80211_sta *sta, u8 hlid);
91 u8 hlid);
104 u8 *hlid);
105 void wl12xx_free_link(struct wl1271 *wl, struct wl12xx_vif *wlvif, u8 *hlid);
108 u8 wlcore_get_native_channel_type(u8 nl_channel_type);
224 u8 data[0];
231 u8 parameters[WL1271_CMD_MAX_PARAMS];
272 u8 role_id;
273 u8 role_type;
274 u8 mac_address[ETH_ALEN];
280 u8 role_id;
281 u8 padding[3];
303 u8 role_id;
304 u8 band;
305 u8 channel;
308 u8 channel_type;
312 u8 hlid;
313 u8 session;
314 u8 padding_1[54];
318 u8 bssid[ETH_ALEN];
319 u8 hlid; /* data hlid */
320 u8 session;
331 u8 ssid_type;
332 u8 ssid_len;
333 u8 ssid[IEEE80211_MAX_SSID_LEN];
338 u8 bssid[ETH_ALEN];
339 u8 hlid; /* data hlid */
340 u8 dtim_interval;
346 u8 ssid_type;
347 u8 ssid_len;
348 u8 ssid[IEEE80211_MAX_SSID_LEN];
352 u8 padding_1[4];
357 u8 beacon_expiry; /* in ms */
358 u8 bss_index;
360 u8 global_hlid;
362 u8 broadcast_hlid;
369 u8 dtim_interval;
371 u8 ssid_type;
372 u8 ssid_len;
373 u8 ssid[IEEE80211_MAX_SSID_LEN];
375 u8 reset_tsf;
381 u8 wmm;
383 u8 bcast_session_id;
384 u8 global_session_id;
385 u8 padding_1[1];
393 u8 role_id;
394 u8 disc_type; /* only STA and P2P_CLI */
401 u8 channel;
402 u8 padding[3];
410 u8 role_id;
411 u8 template_type;
413 u8 index; /* relevant only for KLV_TEMPLATE type */
414 u8 padding[3];
417 u8 short_retry_limit;
418 u8 long_retry_limit;
419 u8 aflags;
420 u8 reserved;
422 u8 template_data[WL1271_CMD_TEMPL_MAX_SIZE];
429 u8 identity;
430 u8 length;
431 u8 dtim_count;
432 u8 dtim_period;
433 u8 bitmap_ctrl;
434 u8 pvb_field[PARTIAL_VBM_MAX]; /* Partial Virtual Bitmap */
446 u8 role_id;
447 u8 ps_mode; /* STATION_* */
484 u8 hlid;
491 u8 lid_key_type;
502 u8 key_id;
503 u8 reserved_1;
509 u8 key_size;
512 u8 key_type;
515 u8 key[MAX_KEY_SIZE];
521 u8 id;
522 u8 padding[3];
553 u8 hlid;
554 u8 state;
561 u8 wmm;
562 u8 padding[1];
568 u8 role_id;
569 u8 channel;
570 u8 band;
571 u8 padding;
577 u8 role_id;
578 u8 padding[3];
597 u8 addr[ETH_ALEN];
598 u8 hlid;
599 u8 aid;
600 u8 psd_type[NUM_ACCESS_CATEGORIES_COPY];
602 u8 bss_index;
603 u8 sp_len;
604 u8 wmm;
605 u8 session_id;
606 u8 role_id;
607 u8 padding[3];
613 u8 hlid;
614 u8 reason_opcode;
615 u8 send_deauth_flag;
616 u8 role_id;
651 u8 dfs_region;
652 u8 padding[3];
659 u8 logger_mode;
662 u8 log_severity;
665 u8 timestamp;
668 u8 output;
671 u8 threshold;
673 u8 padding[3];
687 u8 role_id;
688 u8 padding[3];
702 u8 buf[MAX_TLV_LENGTH];
703 u8 type;
704 u8 padding;
708 u8 sub_band_mask;
709 u8 padding2;
H A Dwl12xx_80211.h64 u8 da[ETH_ALEN];
65 u8 sa[ETH_ALEN];
66 u8 bssid[ETH_ALEN];
68 u8 payload[0];
72 u8 id;
73 u8 len;
85 u8 rates[MAX_SUPPORTED_RATES];
90 u8 channel;
94 u8 channel;
95 u8 num_channels;
96 u8 max_tx_power;
101 u8 country_string[IEEE80211_COUNTRY_STRING_LEN];
115 u8 bssid[ETH_ALEN];
116 u8 ta[ETH_ALEN];
122 u8 llc_hdr[sizeof(rfc1042_header)];
126 u8 sender_hw[ETH_ALEN];
128 u8 target_hw[ETH_ALEN];
/linux-4.1.27/arch/powerpc/include/asm/
H A Dimmap_cpm2.h20 u8 res1[6];
22 u8 res2[20];
24 u8 sc_ppc_acr;
25 u8 res3[3];
28 u8 sc_lcl_acr;
29 u8 res4[3];
37 u8 sc_pdtem;
38 u8 res5[3];
40 u8 sc_ldtem;
41 u8 res6[163];
48 u8 res1[70];
50 u8 res2[4];
54 u8 res3[4];
57 u8 res4[144];
94 u8 res1[8];
96 u8 res2[4];
100 u8 res3[8];
102 u8 res4[2];
104 u8 res5[4];
107 u8 memc_purt;
108 u8 res6[3];
109 u8 memc_psrt;
110 u8 res7[3];
111 u8 memc_lurt;
112 u8 res8[3];
113 u8 memc_lsrt;
114 u8 res9[3];
118 u8 res10[16];
121 u8 res11[52];
127 u8 res1[32];
129 u8 res2[2];
131 u8 res3[4];
133 u8 res4[16];
135 u8 res5[2];
138 u8 res6[94];
139 u8 res7[390];
153 u8 res1[8];
156 u8 res2[8];
162 u8 res3[4];
164 u8 res4[20];
167 u8 res5[24];
169 u8 res6[4];
171 u8 res7[4];
173 u8 res8[4];
175 u8 res9[4];
177 u8 res10[4];
179 u8 res11[4];
181 u8 res12[4];
183 u8 res13[8];
185 u8 res14[8];
187 u8 res15[12];
191 u8 res16[4];
193 u8 res17[4];
195 u8 res18[4];
198 u8 res19[86];
202 u8 res20[4];
204 u8 res21[4];
206 u8 res22[4];
209 u8 res23[88];
213 u8 res24[4];
215 u8 res25[4];
217 u8 res26[4];
220 u8 res27[88];
224 u8 res28[4];
226 u8 res29[4];
228 u8 res30[4];
231 u8 res31[344];
233 u8 res32[4];
235 u8 res33[4];
237 u8 res34[4];
239 u8 res35[4];
241 u8 res36[4];
243 u8 res37[4];
245 u8 res38[4];
247 u8 res39[4];
249 u8 res40[50];
257 u8 res41[4];
259 u8 res42[4];
261 u8 res43[44];
263 u8 res44[4];
265 u8 res45[4];
267 u8 res46[4];
269 u8 res47[4];
271 u8 res48[4];
273 u8 res49[4];
277 u8 res50[756];
284 u8 res1[2];
294 u8 res2[88];
301 u8 res1[4];
303 u8 res2[4];
306 u8 res[104];
319 u8 res1[12];
325 u8 res2[12];
331 u8 res3[12];
337 u8 res4[12];
343 u8 cpmt_tgcr1;
344 u8 res1[3];
345 u8 cpmt_tgcr2;
346 u8 res2[11];
367 u8 res3[584];
373 u8 res0[24];
374 u8 sdma_sdsr;
375 u8 res1[3];
376 u8 sdma_sdmr;
377 u8 res2[3];
378 u8 sdma_idsr1;
379 u8 res3[3];
380 u8 sdma_idmr1;
381 u8 res4[3];
382 u8 sdma_idsr2;
383 u8 res5[3];
384 u8 sdma_idmr2;
385 u8 res6[3];
386 u8 sdma_idsr3;
387 u8 res7[3];
388 u8 sdma_idmr3;
389 u8 res8[3];
390 u8 sdma_idsr4;
391 u8 res9[3];
392 u8 sdma_idmr4;
393 u8 res10[707];
402 u8 res1[2];
404 u8 res2[2];
406 u8 res3[2];
408 u8 res4[2];
409 u8 fcc_fccs;
410 u8 res5[3];
411 u8 fcc_ftirr_phy[4];
421 u8 fcc_gfemr;
422 u8 res1[15];
438 u8 res1[12];
445 u8 i2c_i2mod;
446 u8 res1[3];
447 u8 i2c_i2add;
448 u8 res2[3];
449 u8 i2c_i2brg;
450 u8 res3[3];
451 u8 i2c_i2com;
452 u8 res4[3];
453 u8 i2c_i2cer;
454 u8 res5[3];
455 u8 i2c_i2cmr;
456 u8 res6[331];
463 u8 res1[2];
467 u8 res2[2];
469 u8 res3;
470 u8 scc_sccs;
471 u8 res4[8];
475 u8 res1[2];
477 u8 res2[2];
478 u8 smc_smce;
479 u8 res3[3];
480 u8 smc_smcm;
481 u8 res4[5];
488 u8 res1[4];
489 u8 spi_spie;
490 u8 res2[3];
491 u8 spi_spim;
492 u8 res3[2];
493 u8 spi_spcom;
494 u8 res4[82];
500 u8 cmx_si1cr;
501 u8 res1;
502 u8 cmx_si2cr;
503 u8 res2;
506 u8 cmx_smr;
507 u8 res3;
509 u8 res4[16];
519 u8 si_gmr;
520 u8 res1;
521 u8 si_cmdr;
522 u8 res2;
523 u8 si_str;
524 u8 res3;
530 u8 res1[2];
532 u8 res2[2];
533 u8 mcc_mccf;
534 u8 res3[7];
540 u8 res1[14];
542 u8 res2[2];
545 u8 res3[2];
547 u8 res4[12];
553 u8 usb_usmod;
554 u8 usb_usadr;
555 u8 usb_uscom;
556 u8 res1[1];
558 u8 res2[4];
560 u8 res3[2];
562 u8 usb_usbs;
563 u8 res4[7];
574 u8 im_dpram1[16*1024];
575 u8 res1[16*1024];
576 u8 im_dpram2[4*1024];
577 u8 res2[8*1024];
578 u8 im_dpram3[4*1024];
579 u8 res3[16*1024];
592 u8 res4z[32];
595 u8 res4[32];
603 u8 res[236];
609 u8 res5[608];
631 u8 res6[1153];
634 u8 res7[512];
636 u8 res8[512];
638 u8 res9[512];
640 u8 res10[512];
641 u8 res11[4096];
H A Dmpc52xx_psc.h153 u8 mode; /* PSC + 0x00 */
154 u8 reserved0[3];
162 u8 command; /* PSC + 0x08 */
163 u8 reserved2[3];
165 u8 buffer_8;
173 u8 ipcr;
174 u8 acr;
178 u8 reserved3[3];
186 u8 ctur; /* PSC + 0x18 */
187 u8 reserved5[3];
188 u8 ctlr; /* PSC + 0x1c */
189 u8 reserved6[3];
196 u8 ivr; /* PSC + 0x30 */
197 u8 reserved8[3];
198 u8 ip; /* PSC + 0x34 */
199 u8 reserved9[3];
200 u8 op1; /* PSC + 0x38 */
201 u8 reserved10[3];
202 u8 op0; /* PSC + 0x3c */
203 u8 reserved11[3];
205 u8 ircr1; /* PSC + 0x44 */
206 u8 reserved13[3];
207 u8 ircr2; /* PSC + 0x44 */
208 u8 reserved14[3];
209 u8 irsdr; /* PSC + 0x4c */
210 u8 reserved15[3];
211 u8 irmdr; /* PSC + 0x50 */
212 u8 reserved16[3];
213 u8 irfdr; /* PSC + 0x54 */
214 u8 reserved17[3];
225 u8 rfcntl; /* PSC + 0x68 */
226 u8 reserved21[5];
239 u8 tfcntl; /* PSC + 0x88 */
240 u8 reserved27[5];
276 u8 txdata_8;
293 u8 rxdata_8;
303 u8 mr1; /* PSC + 0x00 */
304 u8 reserved0[3];
305 u8 mr2; /* PSC + 0x04 */
306 u8 reserved1[3];
309 u8 reserved2[2];
310 u8 clock_select; /* PSC + 0x0c */
311 u8 reserved3[3];
313 u8 command; /* PSC + 0x10 */
314 u8 reserved4[3];
316 u8 buffer_8;
321 u8 ipcr; /* PSC + 0x18 */
322 u8 reserved5[3];
323 u8 acr; /* PSC + 0x1c */
324 u8 reserved6[3];
328 u8 reserved7[2];
330 u8 reserved8[2];
332 u8 ctur; /* PSC + 0x28 */
333 u8 reserved9[3];
334 u8 ctlr; /* PSC + 0x2c */
335 u8 reserved10[3];
340 u8 reserved11[4];
341 u8 ip; /* PSC + 0x44 */
342 u8 reserved12[3];
343 u8 op1; /* PSC + 0x48 */
344 u8 reserved13[3];
345 u8 op0; /* PSC + 0x4c */
346 u8 reserved14[3];
348 u8 reserved15[4]; /* make eq. sizeof(mpc52xx_psc) */
/linux-4.1.27/drivers/clk/sunxi/
H A Dclk-factors.h11 u8 nshift;
12 u8 nwidth;
13 u8 kshift;
14 u8 kwidth;
15 u8 mshift;
16 u8 mwidth;
17 u8 pshift;
18 u8 pwidth;
19 u8 n_start;
27 void (*getter) (u32 *rate, u32 parent_rate, u8 *n, u8 *k, u8 *m, u8 *p);
35 void (*get_factors) (u32 *rate, u32 parent, u8 *n, u8 *k, u8 *m, u8 *p);
/linux-4.1.27/arch/mips/include/asm/
H A Dm48t37.h12 volatile u8 pad[0x7ff0]; /* NVRAM */
13 volatile u8 flags;
14 volatile u8 century;
15 volatile u8 alarm_sec;
16 volatile u8 alarm_min;
17 volatile u8 alarm_hour;
18 volatile u8 alarm_data;
19 volatile u8 interrupts;
20 volatile u8 watchdog;
21 volatile u8 control;
22 volatile u8 sec;
23 volatile u8 min;
24 volatile u8 hour;
25 volatile u8 day;
26 volatile u8 date;
27 volatile u8 month;
28 volatile u8 year;
/linux-4.1.27/include/linux/mlx5/
H A Dmlx5_ifc.h144 u8 reserved_0[0x80];
146 u8 log_max_srq_sz[0x8];
147 u8 log_max_qp_sz[0x8];
148 u8 reserved_1[0xb];
149 u8 log_max_qp[0x5];
151 u8 log_max_strq_sz[0x8];
152 u8 reserved_2[0x3];
153 u8 log_max_srqs[0x5];
154 u8 reserved_3[0x10];
156 u8 reserved_4[0x8];
157 u8 log_max_cq_sz[0x8];
158 u8 reserved_5[0xb];
159 u8 log_max_cq[0x5];
161 u8 log_max_eq_sz[0x8];
162 u8 reserved_6[0x2];
163 u8 log_max_mkey[0x6];
164 u8 reserved_7[0xc];
165 u8 log_max_eq[0x4];
167 u8 max_indirection[0x8];
168 u8 reserved_8[0x1];
169 u8 log_max_mrw_sz[0x7];
170 u8 reserved_9[0x2];
171 u8 log_max_bsf_list_size[0x6];
172 u8 reserved_10[0x2];
173 u8 log_max_klm_list_size[0x6];
175 u8 reserved_11[0xa];
176 u8 log_max_ra_req_dc[0x6];
177 u8 reserved_12[0xa];
178 u8 log_max_ra_res_dc[0x6];
180 u8 reserved_13[0xa];
181 u8 log_max_ra_req_qp[0x6];
182 u8 reserved_14[0xa];
183 u8 log_max_ra_res_qp[0x6];
185 u8 pad_cap[0x1];
186 u8 cc_query_allowed[0x1];
187 u8 cc_modify_allowed[0x1];
188 u8 reserved_15[0x1d];
190 u8 reserved_16[0x6];
191 u8 max_qp_cnt[0xa];
192 u8 pkey_table_size[0x10];
194 u8 eswitch_owner[0x1];
195 u8 reserved_17[0xa];
196 u8 local_ca_ack_delay[0x5];
197 u8 reserved_18[0x8];
198 u8 num_ports[0x8];
200 u8 reserved_19[0x3];
201 u8 log_max_msg[0x5];
202 u8 reserved_20[0x18];
204 u8 stat_rate_support[0x10];
205 u8 reserved_21[0x10];
207 u8 reserved_22[0x10];
208 u8 cmdif_checksum[0x2];
209 u8 sigerr_cqe[0x1];
210 u8 reserved_23[0x1];
211 u8 wq_signature[0x1];
212 u8 sctr_data_cqe[0x1];
213 u8 reserved_24[0x1];
214 u8 sho[0x1];
215 u8 tph[0x1];
216 u8 rf[0x1];
217 u8 dc[0x1];
218 u8 reserved_25[0x2];
219 u8 roce[0x1];
220 u8 atomic[0x1];
221 u8 rsz_srq[0x1];
223 u8 cq_oi[0x1];
224 u8 cq_resize[0x1];
225 u8 cq_moderation[0x1];
226 u8 sniffer_rule_flow[0x1];
227 u8 sniffer_rule_vport[0x1];
228 u8 sniffer_rule_phy[0x1];
229 u8 reserved_26[0x1];
230 u8 pg[0x1];
231 u8 block_lb_mc[0x1];
232 u8 reserved_27[0x3];
233 u8 cd[0x1];
234 u8 reserved_28[0x1];
235 u8 apm[0x1];
236 u8 reserved_29[0x7];
237 u8 qkv[0x1];
238 u8 pkv[0x1];
239 u8 reserved_30[0x4];
240 u8 xrc[0x1];
241 u8 ud[0x1];
242 u8 uc[0x1];
243 u8 rc[0x1];
245 u8 reserved_31[0xa];
246 u8 uar_sz[0x6];
247 u8 reserved_32[0x8];
248 u8 log_pg_sz[0x8];
250 u8 bf[0x1];
251 u8 reserved_33[0xa];
252 u8 log_bf_reg_size[0x5];
253 u8 reserved_34[0x10];
255 u8 reserved_35[0x10];
256 u8 max_wqe_sz_sq[0x10];
258 u8 reserved_36[0x10];
259 u8 max_wqe_sz_rq[0x10];
261 u8 reserved_37[0x10];
262 u8 max_wqe_sz_sq_dc[0x10];
264 u8 reserved_38[0x7];
265 u8 max_qp_mcg[0x19];
267 u8 reserved_39[0x18];
268 u8 log_max_mcg[0x8];
270 u8 reserved_40[0xb];
271 u8 log_max_pd[0x5];
272 u8 reserved_41[0xb];
273 u8 log_max_xrcd[0x5];
275 u8 reserved_42[0x20];
277 u8 reserved_43[0x3];
278 u8 log_max_rq[0x5];
279 u8 reserved_44[0x3];
280 u8 log_max_sq[0x5];
281 u8 reserved_45[0x3];
282 u8 log_max_tir[0x5];
283 u8 reserved_46[0x3];
284 u8 log_max_tis[0x5];
286 u8 reserved_47[0x13];
287 u8 log_max_rq_per_tir[0x5];
288 u8 reserved_48[0x3];
289 u8 log_max_tis_per_sq[0x5];
291 u8 reserved_49[0xe0];
293 u8 reserved_50[0x10];
294 u8 log_uar_page_sz[0x10];
296 u8 reserved_51[0x100];
298 u8 reserved_52[0x1f];
299 u8 cqe_zip[0x1];
301 u8 cqe_zip_timeout[0x10];
302 u8 cqe_zip_max_num[0x10];
304 u8 reserved_53[0x220];
308 u8 opcode[0x10];
309 u8 reserved_0[0x10];
311 u8 reserved_1[0x10];
312 u8 op_mod[0x10];
314 u8 reserved_2[0x40];
320 u8 opcode[0x10];
321 u8 reserved_0[0x10];
323 u8 reserved_1[0x10];
324 u8 op_mod[0x10];
326 u8 reserved_2[0x40];
330 u8 status[0x8];
331 u8 reserved_0[0x18];
333 u8 syndrome[0x20];
335 u8 reserved_1[0x40];
337 u8 capability_struct[256][0x8];
341 u8 status[0x8];
342 u8 reserved_0[0x18];
344 u8 syndrome[0x20];
346 u8 reserved_1[0x40];
H A Ddevice.h324 u8 rsvd[4];
329 u8 status;
330 u8 rsvd[3];
336 u8 rsvd[8];
341 u8 rsvd0[24];
342 u8 intapin;
343 u8 rsvd1[13];
345 u8 vsd[208];
346 u8 vsd_psid[16];
368 u8 rsvd0[2];
370 u8 rsvd1[4];
375 u8 rsvd[8];
380 u8 rsvd0[2];
382 u8 rsvd1[4];
387 u8 rsvd[8];
391 u8 type;
392 u8 rsvd0[3];
399 u8 token;
400 u8 sig;
401 u8 rsvd1;
402 u8 status_own;
415 u8 irisc_index;
416 u8 synd;
449 u8 reserved1[7];
450 u8 syndrome;
454 u8 reserved0[8];
455 u8 port;
464 u8 type;
465 u8 rsvd0;
466 u8 congestion_level;
470 u8 rsvd0[3];
471 u8 port_vl;
480 u8 rsvd0[2];
494 u8 reserved3[12];
522 u8 rsvd0;
523 u8 type;
524 u8 rsvd1;
525 u8 sub_type;
529 u8 signature;
530 u8 owner;
534 u8 data[MLX5_CMD_DATA_BLOCK_SIZE];
535 u8 rsvd0[48];
538 u8 rsvd1;
539 u8 token;
540 u8 ctrl_sig;
541 u8 sig;
545 u8 rsvd0[32];
547 u8 rsvd1[18];
548 u8 vendor_err_synd;
549 u8 syndrome;
552 u8 signature;
553 u8 op_own;
557 u8 rsvd0[17];
558 u8 ml_path;
559 u8 rsvd20[4];
562 u8 rsvd28[4];
565 u8 rsvd40[4];
570 u8 signature;
571 u8 op_own;
575 u8 rsvd0[16];
581 u8 rsvd22[2];
584 u8 rsvd30[8];
586 u8 rsvd38[2];
587 u8 signature;
588 u8 op_own;
592 u8 rsvd0[2];
594 u8 signature;
595 u8 rsvd1[11];
600 u8 inl[64];
609 u8 state_log_sz;
610 u8 rsvd0[3];
613 u8 rsvd1[4];
614 u8 log_pg_sz;
615 u8 rsvd2[7];
619 u8 rsvd3[8];
626 u8 rsvd0[4];
628 u8 rsvd1[208];
635 u8 rsvd[4];
641 u8 rsvd[4];
646 u8 rsvd[8];
652 u8 rsvd0[4];
657 u8 rsvd0[8];
659 u8 rsvd1[32];
672 u8 rsvd[8];
676 u8 status;
677 u8 cqe_sz_flags;
678 u8 st;
679 u8 rsvd3;
680 u8 rsvd4[6];
687 u8 log_pg_sz;
688 u8 rsvd25[7];
693 u8 rsvd48[8];
700 u8 rsvdx[4];
702 u8 rsvd6[192];
709 u8 rsvd0[4];
715 u8 rsvd0[4];
720 u8 rsvd0[8];
726 u8 rsvd0[4];
731 u8 rsvd0[8];
733 u8 rsvd6[16];
742 u8 rsvd[192];
748 u8 rsvd[8];
753 u8 rsvd[8];
758 u8 rsvd[8];
763 u8 rsvd[8];
768 u8 rsvd[8];
772 u8 status;
773 u8 ec_oi;
774 u8 st;
775 u8 rsvd2[7];
778 u8 rsvd3[7];
779 u8 intr;
780 u8 log_page_size;
781 u8 rsvd4[15];
784 u8 rsvd5[16];
789 u8 rsvd0[3];
790 u8 input_eqn;
791 u8 rsvd1[4];
793 u8 rsvd2[8];
795 u8 rsvd3[176];
801 u8 rsvd0[3];
802 u8 eq_number;
803 u8 rsvd1[4];
808 u8 rsvd0[3];
809 u8 eqn;
810 u8 rsvd1[4];
815 u8 rsvd[8];
821 u8 mu;
822 u8 rsvd0[2];
823 u8 eqn;
824 u8 rsvd1[24];
829 u8 rsvd[8];
834 u8 rsvd0[3];
835 u8 eqn;
836 u8 rsvd1[4];
841 u8 rsvd[8];
854 u8 status;
855 u8 pcie_control;
856 u8 flags;
857 u8 version;
859 u8 rsvd1[4];
864 u8 rsvd2[16];
866 u8 rsvd3[3];
867 u8 log2_page_size;
868 u8 rsvd4[4];
873 u8 rsvd[8];
887 u8 rsvd1[16];
890 u8 rsvd3[168];
897 u8 rsvd[4];
903 u8 rsvd[4];
908 u8 rsvd[8];
929 u8 rsvd[8];
944 u8 rsvd0;
945 u8 port;
946 u8 rsvd1[4];
947 u8 data[256];
952 u8 rsvd[8];
953 u8 data[256];
958 u8 rsvd0[2];
966 u8 rsvd[8];
984 u8 rsvd[8];
991 u8 rsvd[4];
996 u8 rsvd[8];
H A Dqp.h189 u8 signature;
190 u8 rsvd[2];
191 u8 fm_ce_se;
205 u8 rsvd[12];
224 u8 stat_rate_sl;
225 u8 fl_mlid;
227 u8 reserved0[10];
228 u8 tclass;
229 u8 hop_limit;
231 u8 rgid[16];
256 u8 flags;
257 u8 rsvd0[3];
261 u8 rsvd1[32];
273 u8 rsvd[19];
274 u8 num_psv;
281 u8 rsvd0[2];
283 u8 rsvd1[2];
285 u8 rsvd2[2];
287 u8 rsvd3[7];
288 u8 num_psv;
295 u8 rsvd0[4];
296 u8 signature;
297 u8 rsvd1[11];
301 u8 rsvd0[4];
302 u8 signature;
303 u8 rsvd1[11];
321 u8 sig_type;
322 u8 rp_inv_seed;
323 u8 rsvd[3];
324 u8 dif_inc_ref_guard_check;
330 u8 bsf_size_sbs;
331 u8 check_byte_mask;
333 u8 copy_byte_mask;
334 u8 bs_selector;
335 u8 rsvd_wflags;
338 u8 bs_selector;
339 u8 rsvd_mflags;
385 u8 event_subtype;
422 u8 fl;
423 u8 rsvd3;
424 u8 free_ar;
425 u8 pkey_index;
426 u8 rsvd0;
427 u8 grh_mlid;
429 u8 ackto_lt;
430 u8 mgid_index;
431 u8 static_rate;
432 u8 hop_limit;
434 u8 rgid[16];
435 u8 rsvd1[4];
436 u8 sl;
437 u8 port;
438 u8 rsvd2[6];
444 u8 mtu_msgmax;
445 u8 rq_size_stride;
453 u8 reserved2[4];
456 u8 reserved3[8];
473 u8 rsvd0[5];
474 u8 cgs;
475 u8 cs_req;
476 u8 cs_res;
478 u8 rsvd1[24];
484 u8 rsvd0[4];
486 u8 rsvd1[4];
488 u8 rsvd3[16];
495 u8 rsvd0[4];
501 u8 rsvd0[4];
506 u8 rsvd0[8];
512 u8 rsvd1[4];
514 u8 rsvd0[4];
520 u8 rsvd0[8];
526 u8 rsvd[4];
531 u8 rsvd1[8];
533 u8 rsvd0[4];
535 u8 rsvd2[16];
542 u8 rsvd[3];
543 u8 type;
548 u8 rsvd[8];
553 u8 rsvd[8];
559 u8 rsvd[4];
565 u8 rsvd[4];
570 u8 rsvd[8];
586 u8 reserved[4];
591 u8 rsvd[8];
615 u8 context, int error);
/linux-4.1.27/drivers/staging/ozwpan/
H A Dozprotocol.h26 u8 type;
27 u8 length;
31 (struct oz_elt *)((u8 *)((__elt) + 1) + (__elt)->length)
46 u8 control;
47 u8 last_pkt_num;
75 u8 mode;
76 u8 resv1[16];
77 u8 pd_info;
78 u8 session_id;
79 u8 presleep;
80 u8 ms_isoc_latency;
81 u8 host_vendor;
82 u8 keep_alive;
84 u8 max_len_div16;
85 u8 ms_per_isoc;
86 u8 resv3[2];
110 u8 mode;
111 u8 status;
112 u8 resv1[3];
113 u8 session_id;
119 u8 ep_num;
120 u8 index;
121 u8 report[1];
125 u8 resv1[16];
126 u8 presleep;
127 u8 resv2;
128 u8 host_vendor;
129 u8 keepalive;
135 u8 app_id;
136 u8 elt_seq_num;
151 u8 app_id;
152 u8 elt_seq_num;
153 u8 type;
185 u8 app_id;
186 u8 elt_seq_num;
187 u8 type;
188 u8 req_id;
191 u8 req_type;
192 u8 desc_type;
194 u8 index;
216 u8 app_id;
217 u8 elt_seq_num;
218 u8 type;
219 u8 req_id;
222 u8 rcode;
223 u8 data[1];
227 u8 app_id;
228 u8 elt_seq_num;
229 u8 type;
230 u8 req_id;
231 u8 recipient;
232 u8 index;
237 u8 app_id;
238 u8 elt_seq_num;
239 u8 type;
240 u8 req_id;
241 u8 rcode;
245 u8 app_id;
246 u8 elt_seq_num;
247 u8 type;
248 u8 req_id;
249 u8 index;
253 u8 app_id;
254 u8 elt_seq_num;
255 u8 type;
256 u8 req_id;
257 u8 rcode;
261 u8 app_id;
262 u8 elt_seq_num;
263 u8 type;
264 u8 req_id;
265 u8 index;
266 u8 alternative;
270 u8 app_id;
271 u8 elt_seq_num;
272 u8 type;
273 u8 req_id;
274 u8 rcode;
278 u8 app_id;
279 u8 elt_seq_num;
280 u8 type;
281 u8 req_id;
282 u8 index;
286 u8 app_id;
287 u8 elt_seq_num;
288 u8 type;
289 u8 req_id;
290 u8 rcode;
291 u8 alternative;
295 u8 app_id;
296 u8 elt_seq_num;
297 u8 type;
298 u8 req_id;
299 u8 req_type;
300 u8 request;
303 u8 data[1];
307 u8 app_id;
308 u8 elt_seq_num;
309 u8 type;
310 u8 req_id;
311 u8 rcode;
312 u8 data[1];
316 u8 app_id;
317 u8 elt_seq_num;
318 u8 type;
319 u8 endpoint;
320 u8 format;
324 u8 app_id;
325 u8 elt_seq_num;
326 u8 type;
327 u8 endpoint;
328 u8 format;
329 u8 unit_size;
330 u8 frame_number;
331 u8 data[1];
335 u8 app_id;
336 u8 elt_seq_num;
337 u8 type;
338 u8 endpoint;
339 u8 format;
340 u8 unit_size;
341 u8 data[1];
345 u8 app_id;
346 u8 elt_seq_num;
347 u8 type;
348 u8 endpoint;
349 u8 format;
352 u8 data[1];
361 u8 endpoint;
362 u8 format;
363 u8 ms_data;
364 u8 frame_number;
H A Dozusbif.h18 int oz_usb_stream_create(void *hpd, u8 ep_num);
19 int oz_usb_stream_delete(void *hpd, u8 ep_num);
23 int oz_usb_control_req(void *hpd, u8 req_id, struct usb_ctrlrequest *setup,
24 const u8 *data, int data_len);
25 int oz_usb_get_desc_req(void *hpd, u8 req_id, u8 req_type, u8 desc_type,
26 u8 index, __le16 windex, int offset, int len);
27 int oz_usb_send_isoc(void *hpd, u8 ep_num, struct urb *urb);
32 void oz_hcd_get_desc_cnf(void *hport, u8 req_id, u8 status,
33 const u8 *desc, u8 length, u16 offset, u16 total_size);
34 void oz_hcd_control_cnf(void *hport, u8 req_id, u8 rcode,
35 const u8 *data, int data_len);
39 void oz_hcd_data_ind(void *hport, u8 endpoint, const u8 *data, int data_len);
/linux-4.1.27/drivers/net/wireless/b43/
H A Dradio_2059.h30 u8 radio_syn16;
31 u8 radio_syn17;
32 u8 radio_syn22;
33 u8 radio_syn25;
34 u8 radio_syn27;
35 u8 radio_syn28;
36 u8 radio_syn29;
37 u8 radio_syn2c;
38 u8 radio_syn2d;
39 u8 radio_syn37;
40 u8 radio_syn41;
41 u8 radio_syn43;
42 u8 radio_syn47;
43 u8 radio_rxtx4a;
44 u8 radio_rxtx58;
45 u8 radio_rxtx5a;
46 u8 radio_rxtx6a;
47 u8 radio_rxtx6d;
48 u8 radio_rxtx6e;
49 u8 radio_rxtx92;
50 u8 radio_rxtx98;
H A Dppr.h15 u8 cck[B43_PPR_CCK_RATES_NUM];
16 u8 ofdm[B43_PPR_OFDM_RATES_NUM];
17 u8 ofdm_20_cdd[B43_PPR_OFDM_RATES_NUM];
18 u8 mcs_20[B43_PPR_MCS_RATES_NUM]; /* SISO */
19 u8 mcs_20_cdd[B43_PPR_MCS_RATES_NUM];
20 u8 mcs_20_stbc[B43_PPR_MCS_RATES_NUM];
21 u8 mcs_20_sdm[B43_PPR_MCS_RATES_NUM];
27 u8 __all_rates[B43_PPR_RATES_NUM];
38 void b43_ppr_apply_max(struct b43_wldev *dev, struct b43_ppr *ppr, u8 max);
39 void b43_ppr_apply_min(struct b43_wldev *dev, struct b43_ppr *ppr, u8 min);
40 u8 b43_ppr_get_max(struct b43_wldev *dev, struct b43_ppr *ppr);
/linux-4.1.27/drivers/crypto/nx/
H A Dnx_csbcpb.h6 u8 key[32];
7 u8 __rsvd[80];
11 u8 iv[16];
12 u8 key[32];
13 u8 cv[16];
15 u8 __rsvd[44];
19 u8 in_pat[16];
20 u8 key[32];
21 u8 out_pat[16];
23 u8 __rsvd[44];
27 u8 in_pat_or_aad[16];
28 u8 iv_or_cnt[16];
31 u8 in_s0[16];
32 u8 key[32];
33 u8 __rsvd1[16];
34 u8 out_pat_or_mac[16];
35 u8 out_s0[16];
36 u8 out_cnt[16];
38 u8 __rsvd2[12];
42 u8 iv[16];
43 u8 key[32];
44 u8 cv[16];
46 u8 __rsvd2[44];
50 u8 b0[16];
51 u8 b1[16];
52 u8 key[16];
53 u8 out_pat_or_b0[16];
55 u8 __rsvd[44];
59 u8 in_pat_or_b0[16];
60 u8 iv_or_ctr[16];
61 u8 in_s0[16];
62 u8 key[16];
63 u8 __rsvd1[48];
64 u8 out_pat_or_mac[16];
65 u8 out_s0[16];
66 u8 out_ctr[16];
68 u8 __rsvd2[12];
72 u8 cv[16];
73 u8 key[16];
74 u8 __rsvd1[16];
75 u8 out_cv_mac[16];
77 u8 __rsvd2[44];
83 u8 input_partial_digest[32];
84 u8 message_digest[32];
86 u8 __rsvd2[44];
92 u8 input_partial_digest[64];
93 u8 __rsvd1[32];
94 u8 message_digest[64];
96 u8 __rsvd2[76];
111 u8 mode;
112 u8 fdm;
113 u8 ks_ds;
114 u8 pad_byte;
115 u8 __rsvd[12];
138 u8 valid;
139 u8 crb_seq_number;
140 u8 completion_code;
141 u8 completion_extension;
/linux-4.1.27/drivers/media/pci/saa7164/
H A Dsaa7164-types.h28 u8 bLength;
29 u8 bDescriptorType;
30 u8 bDescriptorSubtype;
34 u8 bCapabilities;
48 u8 bLength;
49 u8 bDescriptorType;
50 u8 bDescriptorSubtype;
51 u8 bFlags;
52 u8 bInterfaceType;
53 u8 bInterfaceId;
54 u8 bBaseInterface;
55 u8 bInterruptId;
56 u8 bDebugInterruptId;
57 u8 BARLocation;
58 u8 Reserved[3];
81 u8 __iomem *m_pdwSetRing;
83 u8 __iomem *m_pdwGetRing;
96 u8 id;
97 u8 flags;
101 u8 seqno;
116 u8 seqno;
131 u8 len;
132 u8 type;
133 u8 subtype;
134 u8 unitid;
138 u8 len;
139 u8 type;
140 u8 subtype;
141 u8 unitid;
145 u8 numgpiogroups;
146 u8 controlsize;
151 u8 state;
155 u8 len;
156 u8 type;
157 u8 subtype;
158 u8 pathid;
173 u8 len;
174 u8 type;
175 u8 subtype;
176 u8 terminalid;
178 u8 assocterminal;
179 u8 iterminal;
180 u8 controlsize;
184 u8 len;
185 u8 type;
186 u8 subtype;
187 u8 unitid;
188 u8 sourceid;
189 u8 iunit;
191 u8 controlsize;
210 u8 *context;
239 u8 len;
240 u8 type;
241 u8 subtyle;
242 u8 unitid;
244 u8 assocterminal;
245 u8 sourceid;
246 u8 iterminal;
248 u8 flags;
249 u8 interruptid;
250 u8 buffercount;
251 u8 metadatasize;
252 u8 numformats;
253 u8 controlsize;
278 u8 len;
279 u8 type;
280 u8 subtype;
281 u8 bFormatIndex;
282 u8 bDataOffset;
283 u8 bPacketLength;
284 u8 bStrideLength;
285 u8 guidStrideFormat[16];
292 u8 len;
293 u8 type;
294 u8 subtype;
295 u8 unitid;
296 u8 nrinpins;
297 u8 sourceid;
302 u8 len;
303 u8 type;
304 u8 subtype;
305 u8 unitid;
306 u8 sourceid;
308 u8 controlsize;
316 u8 ucVideoBitRateMode;
323 u8 width;
324 u8 height;
334 u8 ucGOPSize; /* GOP Size 12, 15 */
335 u8 ucRefFrameDist; /* Reference Frame Distance */
340 u8 len;
341 u8 type;
342 u8 subtype;
343 u8 unitid;
344 u8 vsourceid;
345 u8 asourceid;
346 u8 iunit;
350 u8 bmVidBitrateCap;
354 u8 bmAudBitrateCap;
359 u8 len;
360 u8 type;
361 u8 subtype;
362 u8 unitid;
363 u8 sourceid;
364 u8 controlsize;
369 u8 ucDecoderLevel;
370 u8 ucDecoderFM_Level;
371 u8 ucMonoLevel;
372 u8 ucNICAM_Level;
373 u8 ucSAP_Level;
374 u8 ucADC_Level;
379 u8 ucAudioBitRateMode;
386 u8 std;
391 u8 mode;
396 u8 len;
397 u8 type;
398 u8 subtype;
399 u8 bFormatIndex;
402 u8 bPackDataType;
407 u8 len;
408 u8 type;
409 u8 subtype; /* VS_FORMAT_VBI */
410 u8 bFormatIndex;
412 u8 StartLine; /* NTSC Start = 10 */
413 u8 EndLine; /* NTSC = 21 */
414 u8 FieldRate; /* 60 for NTSC */
415 u8 bNumLines; /* Unused - scheduled for removal */
420 u8 bFormatIndex;
421 u8 bFrameIndex;
430 u8 ucDebugData[256];
/linux-4.1.27/drivers/staging/rtl8188eu/include/
H A Drf.h7 u8 *powerlevel);
9 u8 *powerlevel_ofdm,
10 u8 *powerlevel_bw20,
11 u8 *powerlevel_bw40, u8 channel);
H A Ddrv_types.h61 u8 chip_version;
62 u8 rfintfs;
63 u8 lbkmode;
64 u8 hci;
66 u8 network_mode; /* infra, ad-hoc, auto */
67 u8 channel;/* ad-hoc support requirement */
68 u8 wireless_mode;/* A, B, G, auto */
69 u8 scan_mode;/* active, passive */
70 u8 radio_enable;
71 u8 preamble;/* long, short, auto */
72 u8 vrtl_carrier_sense;/* Enable, Disable, Auto */
73 u8 vcs_type;/* RTS/CTS, CTS-to-self */
76 u8 adhoc_tx_pwr;
77 u8 soft_ap;
78 u8 power_mgnt;
79 u8 ips_mode;
80 u8 smart_ps;
81 u8 long_retry_lmt;
82 u8 short_retry_lmt;
84 u8 ack_policy;
85 u8 mp_mode;
86 u8 software_encrypt;
87 u8 software_decrypt;
88 u8 acm_method;
90 u8 wmm_enable;
91 u8 uapsd_enable;
92 u8 uapsd_max_sp;
93 u8 uapsd_acbk_en;
94 u8 uapsd_acbe_en;
95 u8 uapsd_acvi_en;
96 u8 uapsd_acvo_en;
100 u8 ht_enable;
101 u8 cbw40_enable;
102 u8 ampdu_enable;/* for tx */
103 u8 rx_stbc;
104 u8 ampdu_amsdu;/* A-MPDU Supports A-MSDU is permitted */
105 u8 lowrate_two_xmit;
107 u8 rf_config;
108 u8 low_power;
110 u8 wifi_spec;/* !turbo_mode */
112 u8 channel_plan;
115 u8 antdiv_cfg;
116 u8 antdiv_type;
118 u8 usbss_enable;/* 0:disable,1:enable */
119 u8 hwpdn_mode;/* 0:disable,1:enable,2:decide by EFUSE config */
120 u8 hwpwrp_detect;/* 0:disable,1:enable */
122 u8 hw_wps_pbc;/* 0:disable,1:enable */
124 u8 max_roaming_times; /* the max number driver will try */
126 u8 fw_iol; /* enable iol without other concern */
128 u8 enable80211d;
130 u8 ifname[16];
131 u8 if2name[16];
133 u8 notch_filter;
147 u8 InterfaceNumber;
148 u8 NumInterfaces;
153 u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
157 u8 nr_endpoint;
158 u8 ishighspeed;
159 u8 RtNumInPipes;
160 u8 RtNumOutPipes;
164 u8 *usb_vendor_req_buf;
206 u8 hw_init_completed;
218 u8 old_ips_mode;
219 u8 old_bRegUseLed;
228 u8 bFWReady;
229 u8 bReadPortCancel;
230 u8 bWritePortCancel;
231 u8 bRxRSSIDisplay;
234 u8 bNotifyChannelChange;
240 u8 fix_rate;
249 static inline u8 *myid(struct eeprom_priv *peepriv) myid()
H A Drtl8188e_cmd.h58 u8 eid; /* element id */
59 u8 sz; /* sz */
60 u8 buf[6];
68 u8 Mode;/* 0:Active,1:LPS,2:WMMPS */
69 u8 SmartPS_RLBM;/* LPS= 0:PS_Poll,1:PS_Poll,2:NullData,WMM= 0:PS_Poll,1:NullData */
70 u8 AwakeInterval; /* unit: beacon interval */
71 u8 bAllQueueUAPSD;
72 u8 PwrState;/* AllON(0x0c),RFON(0x04),RFOFF(0x00) */
76 u8 ROFOn; /* 1: on, 0:off */
81 u8 OpMode; /* RT_MEDIA_STATUS */
85 u8 LocProbeRsp;
86 u8 LocPsPoll;
87 u8 LocNullData;
88 u8 LocQosNull;
89 u8 LocBTQosNull;
93 u8 Offload_En:1;
94 u8 role:1; /* 1: Owner, 0: Client */
95 u8 CTWindow_En:1;
96 u8 NoA0_En:1;
97 u8 NoA1_En:1;
98 u8 AllStaSleep:1; /* Only valid in Owner */
99 u8 discovery:1;
100 u8 rsvd:1;
104 u8 CTWPeriod; /* TU */
108 void rtl8188e_set_FwPwrMode_cmd(struct adapter *padapter, u8 Mode);
109 void rtl8188e_set_FwJoinBssReport_cmd(struct adapter *padapter, u8 mstatus);
110 u8 rtl8188e_set_raid_cmd(struct adapter *padapter, u32 mask);
111 void rtl8188e_Add_RateATid(struct adapter *padapter, u32 bitmap, u8 arg,
112 u8 rssi_level);
H A Drtw_efuse.h76 u8 offset;
77 u8 word_en;
78 u8 data[8];
79 u8 word_cnts;
84 u8 fakeEfuseBank;
86 u8 fakeEfuseContent[EFUSE_MAX_HW_SIZE];
87 u8 fakeEfuseInitMap[EFUSE_MAX_MAP_LEN];
88 u8 fakeEfuseModifiedMap[EFUSE_MAX_MAP_LEN];
91 u8 BTEfuseUsedPercentage;
92 u8 BTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
93 u8 BTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN];
94 u8 BTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN];
97 u8 fakeBTEfuseContent[EFUSE_MAX_BT_BANK][EFUSE_MAX_HW_SIZE];
98 u8 fakeBTEfuseInitMap[EFUSE_BT_MAX_MAP_LEN];
99 u8 fakeBTEfuseModifiedMap[EFUSE_BT_MAX_MAP_LEN];
102 u8 Efuse_CalculateWordCnts(u8 word_en);
103 void EFUSE_GetEfuseDefinition(struct adapter *adapt, u8 type, u8 type1,
105 u8 efuse_OneByteRead(struct adapter *adapter, u16 addr, u8 *data);
106 u8 efuse_OneByteWrite(struct adapter *adapter, u16 addr, u8 data);
108 void efuse_ReadEFuse(struct adapter *Adapter, u8 efuseType, u16 _offset,
109 u16 _size_byte, u8 *pbuf);
110 void Efuse_PowerSwitch(struct adapter *adapt, u8 bWrite, u8 PwrState);
111 int Efuse_PgPacketRead(struct adapter *adapt, u8 offset, u8 *data);
112 bool Efuse_PgPacketWrite(struct adapter *adapter, u8 offset, u8 word, u8 *data);
113 void efuse_WordEnableDataRead(u8 word_en, u8 *sourdata, u8 *targetdata);
114 u8 Efuse_WordEnableDataWrite(struct adapter *adapter, u16 efuse_addr,
115 u8 word_en, u8 *data);
117 void EFUSE_ShadowMapUpdate(struct adapter *adapter, u8 efusetype);
H A Dieee80211_ext.h51 u8 elem_id;
52 u8 len;
53 u8 oui[4]; /* 24-bit OUI followed by 8-bit OUI type */
54 u8 version[2]; /* little endian */
58 u8 elem_id; /* WLAN_EID_RSN */
59 u8 len;
60 u8 version[2]; /* little endian */
66 u8 aifsn:4,
72 u8 eCWmin:4,
76 u8 reserved:1,
82 u8 eCWmax:4,
94 u8 oui[3];
95 u8 oui_type;
96 u8 oui_subtype;
97 u8 version;
98 u8 acInfo;
99 u8 reserved;
112 (a)[0] = (u8)((((u32) (val)) >> 24) & 0xff); \
113 (a)[1] = (u8)((((u32) (val)) >> 16) & 0xff); \
114 (a)[2] = (u8)((((u32) (val)) >> 8) & 0xff); \
115 (a)[3] = (u8)(((u32) (val)) & 0xff); \
120 (a)[3] = (u8)((((u32) (val)) >> 24) & 0xff); \
121 (a)[2] = (u8)((((u32) (val)) >> 16) & 0xff); \
122 (a)[1] = (u8)((((u32) (val)) >> 8) & 0xff); \
123 (a)[0] = (u8)(((u32) (val)) & 0xff); \
126 #define RSN_SELECTOR_PUT(a, val) WPA_PUT_BE32((u8 *)(a), (val))
178 u8 da[6];
179 u8 sa[6];
180 u8 bssid[6];
188 u8 variable[0];
197 u8 variable[0];
204 u8 variable[0];
209 u8 current_ap[6];
211 u8 variable[0];
222 u8 variable[0];
226 u8 variable[0];
234 u8 variable[0];
237 u8 category;
240 u8 action_code;
241 u8 dialog_token;
242 u8 status_code;
243 u8 variable[0];
246 u8 action_code;
247 u8 dialog_token;
253 u8 action_code;
254 u8 dialog_token;
260 u8 action_code;
265 u8 action_code;
275 u8 variable[0];
278 u8 action_code;
279 u8 variable[0];
H A Dodm_HWConfig.h65 u8 gain:7, trsw:1;
67 u8 trsw:1, gain:7;
73 u8 ch_corr[2];
74 u8 cck_sig_qual_ofdm_pwdb_all;
75 u8 cck_agc_rpt_ofdm_cfosho_a;
76 u8 cck_rpt_b_ofdm_cfosho_b;
77 u8 rsvd_1;/* ch_corr_msb; */
78 u8 noise_power_db_msb;
79 u8 path_cfotail[2];
80 u8 pcts_mask[2];
82 u8 path_rxsnr[3];
83 u8 noise_power_db_lsb;
84 u8 rsvd_2[3];
85 u8 stream_csi[2];
86 u8 stream_target_csi[2];
88 u8 rsvd_3;
91 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
92 u8 sgi_en:1;
93 u8 rxsc:2;
94 u8 idle_long:1;
95 u8 r_ant_train_en:1;
96 u8 ant_sel_b:1;
97 u8 ant_sel:1;
99 u8 ant_sel:1;
100 u8 ant_sel_b:1;
101 u8 r_ant_train_en:1;
102 u8 idle_long:1;
103 u8 rxsc:2;
104 u8 sgi_en:1;
105 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
113 u8 *pPhyStatus,
117 u8 *pMacStatus,
118 u8 MacID,
H A Dodm.h94 u8 Dig_Enable_Flag;
95 u8 Dig_Ext_Port_Stage;
103 u8 CurSTAConnectState;
104 u8 PreSTAConnectState;
105 u8 CurMultiSTAConnectState;
107 u8 PreIGValue;
108 u8 CurIGValue;
109 u8 BackupIGValue;
114 u8 rx_gain_range_max;
115 u8 rx_gain_range_min;
116 u8 Rssi_val_min;
118 u8 PreCCK_CCAThres;
119 u8 CurCCK_CCAThres;
120 u8 PreCCKPDState;
121 u8 CurCCKPDState;
123 u8 LargeFAHit;
124 u8 ForbiddenIGI;
127 u8 DIG_Dynamic_MIN_0;
128 u8 DIG_Dynamic_MIN_1;
137 u8 PreCCAState;
138 u8 CurCCAState;
140 u8 PreRFState;
141 u8 CurRFState;
145 u8 initialize;
168 u8 RXHP_flag;
169 u8 PSD_func_trigger;
170 u8 PSD_bitmap_RXHP[80];
171 u8 Pre_IGI;
172 u8 Cur_IGI;
173 u8 Pre_pw_th;
174 u8 Cur_pw_th;
177 u8 TP_Mode;
200 u8 try_flag;
202 u8 CurAntenna;
203 u8 PreAntenna;
204 u8 RSSI_Trying;
205 u8 TestMode;
206 u8 bTriggerAntennaSwitch;
207 u8 SelectAntennaMap;
208 u8 RSSI_target;
211 u8 SWAS_NoLink_State;
226 u8 TrafficLoad;
235 u8 TxAnt[ASSOCIATE_ENTRY_NUM];
236 u8 TargetSTA;
237 u8 antsel;
238 u8 RxIdleAnt;
248 u8 Type; /* DM_Type_ByFW/DM_Type_ByDriver */
249 u8 HighRSSIThresh; /* if RSSI > HighRSSIThresh => RATRState is DM_RATR_STA_HIGH */
250 u8 LowRSSIThresh; /* if RSSI <= LowRSSIThresh => RATRState is DM_RATR_STA_LOW */
251 u8 RATRState; /* Current RSSI level, DM_RATR_STA_HIGH/DM_RATR_STA_MIDDLE/DM_RATR_STA_LOW */
271 u8 RxPWDBAll;
272 u8 SignalQuality; /* in 0-100 index. */
273 u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */
274 u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */
279 u8 BTRxRSSIPercentage;
280 u8 SignalStrength; /* in 0-100 index. */
281 u8 RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */
282 u8 RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */
297 u8 StationID;
304 u8 test;
329 u8 IOTPeer; /* Enum value. HT_IOT_PEER_E */
333 u8 RSSI_Path[4]; /* */
334 u8 RSSI_Ave;
335 u8 RXEVM[4];
336 u8 RXSNR[4];
396 ODM_CMNINFO_RA_THRESHOLD_HIGH, /* u8 */
397 ODM_CMNINFO_RA_THRESHOLD_LOW, /* u8 */
398 ODM_CMNINFO_RF_ANTENNA_TYPE, /* u8 */
575 u8 RateID;
578 u8 RateSGI;
579 u8 RssiStaRA;
580 u8 PreRssiStaRA;
581 u8 SGIEnable;
582 u8 DecisionRate;
583 u8 PreRate;
584 u8 HighestRate;
585 u8 LowestRate;
591 u8 Active;
593 u8 RAWaitingCounter;
594 u8 RAPendingCounter;
595 u8 PTActive; /* on or off */
596 u8 PTTryState; /* 0 trying state, 1 for decision state */
597 u8 PTStage; /* 0~6 */
598 u8 PTStopCount; /* Stop PT counter */
599 u8 PTPreRate; /* if rate change do PT */
600 u8 PTPreRssi; /* if RSSI change 5% do PT */
601 u8 PTModeSS; /* decide whitch rate should do PT */
602 u8 RAstage; /* StageRA, decide how many times RA will be done
604 u8 PTSmoothFactor;
620 u8 TXPowercount;
623 u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking
625 u8 TM_Trigger;
626 u8 InternalPA5G[2]; /* pathA / pathB */
628 u8 ThermalMeter[2]; /* ThermalMeter, index 0 for RFIC0,
630 u8 ThermalValue;
631 u8 ThermalValue_LCK;
632 u8 ThermalValue_IQK;
633 u8 ThermalValue_DPK;
634 u8 ThermalValue_AVG[AVG_THERMAL_NUM];
635 u8 ThermalValue_AVG_index;
636 u8 ThermalValue_RxGain;
637 u8 ThermalValue_Crystal;
638 u8 ThermalValue_DPKstore;
639 u8 ThermalValue_DPKtrack;
644 u8 bRfPiEnable;
647 u8 bCCKinCH14;
648 u8 CCK_index;
649 u8 OFDM_index[2];
652 u8 ThermalValue_HP[HP_THERMAL_NUM];
653 u8 ThermalValue_HP_index;
656 u8 Delta_IQK;
657 u8 Delta_LCK;
679 u8 bAPKdone;
680 u8 bAPKThermalMeterIgnore;
681 u8 bDPdone;
682 u8 bDPPathAOK;
683 u8 bDPPathBOK;
689 u8 Bssid[6];
690 u8 antsel_rx_keep_0;
691 u8 antsel_rx_keep_1;
692 u8 antsel_rx_keep_2;
696 u8 FAT_State;
698 u8 antsel_a[ODM_ASSOCIATE_ENTRY_NUM];
699 u8 antsel_b[ODM_ASSOCIATE_ENTRY_NUM];
700 u8 antsel_c[ODM_ASSOCIATE_ENTRY_NUM];
705 u8 RxIdleAnt;
737 u8 RFPathRxEnable; /* ODM_CMNINFO_RFPATH_ENABLE */
738 u8 ControlChannel;
745 u8 SupportPlatform;
749 u8 SupportInterface;
754 u8 CutVersion;
756 u8 FabVersion;
758 u8 RFType;
760 u8 BoardType;
762 u8 ExtLNA;
764 u8 ExtPA;
766 u8 ExtTRSW;
767 u8 PatchID; /* Customer ID */
773 u8 AntDivType;
779 u8 u8_temp;
784 u8 *pMacPhyMode;
790 u8 *pWirelessMode; /* ODM_WIRELESS_MODE_E */
792 u8 *pBandType;
794 u8 *pSecChOffset;
796 u8 *pSecurity;
798 u8 *pBandWidth;
800 u8 *pChannel; /* central channel number */
810 u8 *pOnePathCCA;
812 u8 *pAntennaTest;
820 u8 RSSI_Min;
821 u8 InterfaceIndex; /* Add for 92D dual MAC: 0--Mac0 1--Mac1 */
827 u8 btHsDigVal; /* use BT rssi to decide the DIG value */
882 u8 RSSI_BT; /* come from BT */
887 u8 bUseRAMask;
894 u8 BbSwingIdxOfdm;
895 u8 BbSwingIdxOfdmCurrent;
896 u8 BbSwingIdxOfdmBase;
898 u8 BbSwingIdxCck;
899 u8 BbSwingIdxCckCurrent;
900 u8 BbSwingIdxCckBase;
902 u8 *mp_mode;
1070 extern u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8];
1071 extern u8 CCKSwingTable_Ch14 [CCK_TABLE_SIZE][8];
1088 void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal);
1091 void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres);
1093 bool bForceUpdate, u8 *pRATRState);
1096 u32 ra_mask, u8 rssi_level);
1107 void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI);
H A Drtw_recv.h43 u8 enable;
46 u8 wsize_b;
81 u8 update_req; /* used to indicate */
82 u8 avg_val; /* avg of valid elements */
88 u8 RxPWDBAll;
89 u8 SignalQuality; /* in 0-100 index. */
90 u8 RxMIMOSignalQuality[MAX_PATH_NUM_92CS]; /* EVM */
91 u8 RxMIMOSignalStrength[MAX_PATH_NUM_92CS];/* in 0~100 index */
96 u8 BTRxRSSIPercentage;
97 u8 SignalStrength; /* in 0-100 index. */
98 u8 RxPwr[MAX_PATH_NUM_92CS];/* per-path's pwdb */
99 u8 RxSNR[MAX_PATH_NUM_92CS];/* per-path's SNR */
104 u8 physt;
105 u8 drvinfo_sz;
106 u8 shift_sz;
107 u8 hdrlen; /* the WLAN Header Len */
108 u8 to_fr_ds;
109 u8 amsdu;
110 u8 qos;
111 u8 priority;
112 u8 pw_save;
113 u8 mdata;
115 u8 frag_num;
116 u8 mfrag;
117 u8 order;
118 u8 privacy; /* in frame_ctrl field */
119 u8 bdecrypted;
120 u8 encrypt; /* when 0 indicate no encrypt. when non-zero,
122 u8 iv_len;
123 u8 icv_len;
124 u8 crc_err;
125 u8 icv_err;
129 u8 dst[ETH_ALEN];
130 u8 src[ETH_ALEN];
131 u8 ta[ETH_ALEN];
132 u8 ra[ETH_ALEN];
133 u8 bssid[ETH_ALEN];
135 u8 ack_policy;
137 u8 key_index;
139 u8 mcs_rate;
140 u8 rxht;
141 u8 sgi;
142 u8 pkt_rpt_type;
181 u8 *pallocated_frame_buf;
182 u8 *precv_frame_buf;
192 u8 rx_pending_cnt;
198 u8 *pallocated_recv_buf;
199 u8 *precv_buf; /* 4 alignment */
203 u8 is_signal_dbg; /* for debug */
204 u8 signal_strength_dbg; /* for debug */
207 u8 signal_strength;
208 u8 signal_qual;
209 u8 noise;
233 u8 reuse;
258 u8 *rx_head;
259 u8 *rx_data;
260 u8 *rx_tail;
261 u8 *rx_end;
283 static inline u8 *get_rxmem(struct recv_frame *precvframe) get_rxmem()
291 static inline u8 *recvframe_pull(struct recv_frame *precvframe, int sz) recvframe_pull()
309 static inline u8 *recvframe_put(struct recv_frame *precvframe, int sz) recvframe_put()
328 static inline u8 *recvframe_pull_tail(struct recv_frame *precvframe, int sz) recvframe_pull_tail()
H A Drtl8188e_hal.h142 u8 IndexCCK_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
143 u8 IndexBW40_Base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
209 u8 *pfirmware;
215 u8 PGMaxGroup;
220 u8 CurrentChannel;
221 u8 nCur40MhzPrimeSC;/* Control channel sub-carrier */
226 u8 rf_chip;
227 u8 rf_type;
228 u8 NumTotalRFPath;
230 u8 BoardType;
237 u8 EEPROMCustomerID;
238 u8 EEPROMSubCustomerID;
239 u8 EEPROMVersion;
240 u8 EEPROMRegulatory;
242 u8 bTXPowerDataReadFromEEPORM;
243 u8 EEPROMThermalMeter;
244 u8 bAPKThermalMeterIgnore;
248 u8 EfuseMap[2][HWSET_MAX_SIZE_512];
249 u8 EfuseUsedPercentage;
252 u8 Index24G_CCK_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
253 u8 Index24G_BW40_Base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
260 u8 TxPwrLevelCck[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
262 u8 TxPwrLevelHT40_1S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
264 u8 TxPwrLevelHT40_2S[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
266 u8 TxPwrHt20Diff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
268 u8 TxPwrLegacyHtDiff[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
270 u8 PwrGroupHT20[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
271 u8 PwrGroupHT40[RF_PATH_MAX][CHANNEL_MAX_NUMBER];
273 u8 LegacyHTTxPowerDiff;/* Legacy to HT rate power diff */
275 u8 CurrentCckTxPwrIdx;
276 u8 CurrentOfdm24GTxPwrIdx;
277 u8 CurrentBW2024GTxPwrIdx;
278 u8 CurrentBW4024GTxPwrIdx;
282 u8 framesync;
284 u8 framesyncMonitor;
285 u8 DefaultInitialGain[4];
286 u8 pwrGroupCnt;
290 u8 CrystalCap;
293 u8 BluetoothCoexist;
294 u8 ExternalPA;
296 u8 bLedOpenDrain; /* Open-drain support for controlling the LED.*/
298 u8 b1x1RecvCombine; /* for 1T1R receive combining */
310 u8 LastHMEBoxNum;
312 u8 fw_ractrl;
313 u8 RegTxPause;
316 u8 RegFwHwTxQCtrl;
317 u8 RegReg542;
318 u8 RegCR_1;
324 u8 CurAntenna;
325 u8 AntDivCfg;
326 u8 TRxAntDivType;
329 u8 bDumpRxPkt;/* for debug */
330 u8 bDumpTxPkt;/* for debug */
331 u8 FwRsvdPageStartOffset; /* Reserve page start offset except
340 u8 OutEpQueueSel;
341 u8 OutEpNumber;
355 u8 bMacPwrCtrlOn;
362 u8 C2hArray[16];
363 u8 UsbTxAggMode;
364 u8 UsbTxAggDescNum;
369 u8 UsbRxAggBlockCount; /* USB Block count. Block size is
372 u8 UsbRxAggBlockTimeout;
373 u8 UsbRxAggPageCount; /* 8192C DMA page count */
374 u8 UsbRxAggPageTimeout;
391 s32 InitLLTTable(struct adapter *padapter, u8 txpktbuf_bndy);
395 void Hal_EfuseParseIDCode88E(struct adapter *padapter, u8 *hwinfo);
396 void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *hwinfo,
399 void Hal_EfuseParseEEPROMVer88E(struct adapter *padapter, u8 *hwinfo,
401 void rtl8188e_EfuseParseChnlPlan(struct adapter *padapter, u8 *hwinfo,
403 void Hal_EfuseParseCustomerID88E(struct adapter *padapter, u8 *hwinfo,
405 void Hal_ReadAntennaDiversity88E(struct adapter *pAdapter, u8 *PROMContent,
407 void Hal_ReadThermalMeter_88E(struct adapter *dapter, u8 *PROMContent,
409 void Hal_EfuseParseXtal_8188E(struct adapter *pAdapter, u8 *hwinfo,
411 void Hal_EfuseParseBoardType88E(struct adapter *pAdapter, u8 *hwinfo,
413 void Hal_ReadPowerSavingMode88E(struct adapter *pAdapter, u8 *hwinfo,
423 s32 iol_execute(struct adapter *padapter, u8 control);
424 void iol_mode_enable(struct adapter *padapter, u8 enable);
H A Drtw_security.h67 u8 TSC0;
68 u8 TSC1;
69 u8 TSC2;
70 u8 TSC3;
71 u8 TSC4;
72 u8 TSC5;
73 u8 TSC6;
74 u8 TSC7;
80 u8 TSC7;
81 u8 TSC6;
82 u8 TSC5;
83 u8 TSC4;
84 u8 TSC3;
85 u8 TSC2;
86 u8 TSC1;
87 u8 TSC0;
93 u8 skey[16];
98 u8 bUsed;
99 u8 Bssid[6];
100 u8 PMKID[16];
101 u8 SsidBuf[33];
102 u8 *ssid_octet;
135 u8 wps_ie[MAX_WPS_IE_LEN];/* added in assoc req */
137 u8 binstallGrpkey;
138 u8 busetkipkey;
139 u8 bcheck_grpkey;
140 u8 bgrpkey_handshake;
152 u8 assoc_info[600];
153 u8 szofcapability[256]; /* for wpa2 usage */
154 u8 oidassociation[512]; /* for wpa/wpa2 usage */
155 u8 authenticator_ie[256]; /* store ap security information element */
156 u8 supplicant_ie[256]; /* store sta security information element */
160 u8 btkip_countermeasure;
161 u8 btkip_wait_report;
168 u8 PMKIDIndex;
169 u8 bWepDefaultKeyIdxSet;
175 u8 buf[64];
184 encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm; \
188 encry_algo = (u8)psecuritypriv->dot118021XGrpPrivacy;\
190 encry_algo = (u8)psta->dot118021XPrivacy; \
193 encry_algo = (u8)psecuritypriv->dot11PrivacyAlgrthm; \
254 extern const u8 Td4s[256];
255 extern const u8 rcons[10];
273 (ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \
274 (ct)[2] = (u8)((st) >> 8); (ct)[3] = (u8)(st); }
287 (a)[0] = (u8)((((u32)(val)) >> 24) & 0xff); \
288 (a)[1] = (u8)((((u32)(val)) >> 16) & 0xff); \
289 (a)[2] = (u8)((((u32)(val)) >> 8) & 0xff); \
290 (a)[3] = (u8)(((u32)(val)) & 0xff); \
295 (a)[0] = (u8)(((u64)(val)) >> 56); \
296 (a)[1] = (u8)(((u64)(val)) >> 48); \
297 (a)[2] = (u8)(((u64)(val)) >> 40); \
298 (a)[3] = (u8)(((u64)(val)) >> 32); \
299 (a)[4] = (u8)(((u64)(val)) >> 24); \
300 (a)[5] = (u8)(((u64)(val)) >> 16); \
301 (a)[6] = (u8)(((u64)(val)) >> 8); \
302 (a)[7] = (u8)(((u64)(val)) & 0xff); \
343 void rtw_secmicsetkey(struct mic_data *pmicdata, u8 *key);
344 void rtw_secmicappendbyte(struct mic_data *pmicdata, u8 b);
345 void rtw_secmicappend(struct mic_data *pmicdata, u8 *src, u32 nBytes);
346 void rtw_secgetmic(struct mic_data *pmicdata, u8 *dst);
347 void rtw_seccalctkipmic(u8 *key, u8 *header, u8 *data, u32 data_len,
348 u8 *Miccode, u8 priority);
349 u32 rtw_aes_encrypt(struct adapter *padapter, u8 *pxmitframe);
350 u32 rtw_tkip_encrypt(struct adapter *padapter, u8 *pxmitframe);
351 void rtw_wep_encrypt(struct adapter *padapter, u8 *pxmitframe);
352 u32 rtw_aes_decrypt(struct adapter *padapter, u8 *precvframe);
353 u32 rtw_tkip_decrypt(struct adapter *padapter, u8 *precvframe);
354 void rtw_wep_decrypt(struct adapter *padapter, u8 *precvframe);
/linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/subdev/
H A Dvga.h7 u8 nv_rdport(void *obj, int head, u16 port);
8 void nv_wrport(void *obj, int head, u16 port, u8 value);
11 u8 nv_rdvgas(void *obj, int head, u8 index);
12 void nv_wrvgas(void *obj, int head, u8 index, u8 value);
15 u8 nv_rdvgag(void *obj, int head, u8 index);
16 void nv_wrvgag(void *obj, int head, u8 index, u8 value);
19 u8 nv_rdvgac(void *obj, int head, u8 index);
20 void nv_wrvgac(void *obj, int head, u8 index, u8 value);
23 u8 nv_rdvgai(void *obj, int head, u16 port, u8 index);
24 void nv_wrvgai(void *obj, int head, u16 port, u8 index, u8 value);
27 u8 nv_rdvgaowner(void *obj);
28 void nv_wrvgaowner(void *obj, u8);
H A Dbios.h8 u8 *data;
14 u8 major;
15 u8 chip;
16 u8 minor;
17 u8 micro;
18 u8 patch;
28 u8 nvbios_checksum(const u8 *data, int size);
29 u16 nvbios_findstr(const u8 *data, int size, const char *str, int len);
H A Dgpio.h13 u8 mask;
14 u8 line;
18 u8 mask;
26 void (*reset)(struct nvkm_gpio *, u8 func);
27 int (*find)(struct nvkm_gpio *, int idx, u8 tag, u8 line,
29 int (*set)(struct nvkm_gpio *, int idx, u8 tag, u8 line, int state);
30 int (*get)(struct nvkm_gpio *, int idx, u8 tag, u8 line);
/linux-4.1.27/drivers/input/touchscreen/
H A Dcyttsp_core.h45 u8 z;
50 u8 hst_mode;
51 u8 tt_mode;
52 u8 tt_stat;
54 u8 touch12_id;
56 u8 gest_cnt;
57 u8 gest_id;
59 u8 touch34_id;
61 u8 tt_undef[3];
62 u8 act_dist;
63 u8 tt_reserved;
69 u8 hst_mode;
70 u8 mfg_stat;
71 u8 mfg_cmd;
72 u8 cid[3];
73 u8 tt_undef1;
74 u8 uid[8];
75 u8 bl_verh;
76 u8 bl_verl;
77 u8 tts_verh;
78 u8 tts_verl;
79 u8 app_idh;
80 u8 app_idl;
81 u8 app_verh;
82 u8 app_verl;
83 u8 tt_undef[5];
84 u8 scn_typ;
85 u8 act_intrvl;
86 u8 tch_tmout;
87 u8 lp_intrvl;
93 u8 bl_file;
94 u8 bl_status;
95 u8 bl_error;
96 u8 blver_hi;
97 u8 blver_lo;
98 u8 bld_blver_hi;
99 u8 bld_blver_lo;
100 u8 ttspver_hi;
101 u8 ttspver_lo;
102 u8 appid_hi;
103 u8 appid_lo;
104 u8 appver_hi;
105 u8 appver_lo;
106 u8 cid_0;
107 u8 cid_1;
108 u8 cid_2;
115 int (*write)(struct device *dev, u8 *xfer_buf, u16 addr, u8 length,
117 int (*read)(struct device *dev, u8 *xfer_buf, u16 addr, u8 length,
141 u8 xfer_buf[] ____cacheline_aligned;
148 int cyttsp_i2c_write_block_data(struct device *dev, u8 *xfer_buf, u16 addr,
149 u8 length, const void *values);
150 int cyttsp_i2c_read_block_data(struct device *dev, u8 *xfer_buf, u16 addr,
151 u8 length, void *values);
H A Dad7879.h19 int (*read)(struct device *dev, u8 reg);
20 int (*multi_read)(struct device *dev, u8 first_reg, u8 count, u16 *buf);
21 int (*write)(struct device *dev, u8 reg, u16 val);
26 struct ad7879 *ad7879_probe(struct device *dev, u8 devid, unsigned irq,
H A Dcyttsp4_core.h137 u8 ttpidh;
138 u8 ttpidl;
139 u8 fw_ver_major;
140 u8 fw_ver_minor;
141 u8 revctrl[CY_NUM_REVCTRL];
142 u8 blver_major;
143 u8 blver_minor;
144 u8 jtag_si_id3;
145 u8 jtag_si_id2;
146 u8 jtag_si_id1;
147 u8 jtag_si_id0;
148 u8 mfgid_sz;
149 u8 cyito_idh;
150 u8 cyito_idl;
151 u8 cyito_verh;
152 u8 cyito_verl;
153 u8 ttsp_ver_major;
154 u8 ttsp_ver_minor;
155 u8 device_info;
156 u8 mfg_id[];
160 u8 post_codeh;
161 u8 post_codel;
165 u8 electrodes_x;
166 u8 electrodes_y;
167 u8 len_xh;
168 u8 len_xl;
169 u8 len_yh;
170 u8 len_yl;
171 u8 res_xh;
172 u8 res_xl;
173 u8 res_yh;
174 u8 res_yl;
175 u8 max_zh;
176 u8 max_zl;
177 u8 panel_info0;
181 u8 loc;
182 u8 size;
188 u8 cmd_ofs;
189 u8 rep_ofs;
190 u8 rep_szh;
191 u8 rep_szl;
192 u8 num_btns;
193 u8 tt_stat_ofs;
194 u8 obj_cfg0;
195 u8 max_tchs;
196 u8 tch_rec_size;
198 u8 btn_rec_size; /* btn record size (in bytes) */
199 u8 btn_diff_ofs; /* btn data loc, diff counts */
200 u8 btn_diff_size; /* btn size of diff counts (in bits) */
214 u8 hst_mode;
215 u8 reserved;
216 u8 map_szh;
217 u8 map_szl;
218 u8 cydata_ofsh;
219 u8 cydata_ofsl;
220 u8 test_ofsh;
221 u8 test_ofsl;
222 u8 pcfg_ofsh;
223 u8 pcfg_ofsl;
224 u8 opcfg_ofsh;
225 u8 opcfg_ofsl;
226 u8 ddata_ofsh;
227 u8 ddata_ofsl;
228 u8 mdata_ofsh;
229 u8 mdata_ofsl;
327 u8 *btn_rec_data; /* button diff count data */
328 u8 *xy_mode; /* operational mode and status regs */
329 u8 *xy_data; /* operational touch regs */
364 u8 *xfer_buf;
366 u8 pr_buf[CY_MAX_PRBUF_SIZE];
372 int (*write)(struct device *dev, u8 *xfer_buf, u16 addr, u8 length,
374 int (*read)(struct device *dev, u8 *xfer_buf, u16 addr, u8 length,
466 int cyttsp_i2c_write_block_data(struct device *dev, u8 *xfer_buf, u16 addr,
467 u8 length, const void *values);
468 int cyttsp_i2c_read_block_data(struct device *dev, u8 *xfer_buf, u16 addr,
469 u8 length, void *values);
/linux-4.1.27/include/video/
H A Duvesafb.h15 u8 flags;
18 u8 reserved[40];
34 u8 winA_attr;
35 u8 winB_attr;
46 u8 x_char_size;
47 u8 y_char_size;
48 u8 planes;
49 u8 bits_per_pixel;
50 u8 banks;
51 u8 memory_model;
52 u8 bank_size;
53 u8 image_pages;
54 u8 reserved1;
58 u8 red_len;
59 u8 red_off;
60 u8 green_len;
61 u8 green_off;
62 u8 blue_len;
63 u8 blue_off;
64 u8 rsvd_len;
65 u8 rsvd_off;
66 u8 direct_color_info; /* direct color mode attributes */
70 u8 reserved2[6];
74 u8 bnk_image_pages;
75 u8 lin_image_pages;
76 u8 lin_red_len;
77 u8 lin_red_off;
78 u8 lin_green_len;
79 u8 lin_green_off;
80 u8 lin_blue_len;
81 u8 lin_blue_off;
82 u8 lin_rsvd_len;
83 u8 lin_rsvd_off;
86 u8 depth;
121 u8 nocrtc;
122 u8 ypan; /* 0 - nothing, 1 - ypan, 2 - ywrap */
123 u8 pmi_setpal; /* PMI for palette changes */
127 u8 *vbe_state_orig; /*
131 u8 *vbe_state_saved; /* state saved by fb_save_state */
/linux-4.1.27/drivers/staging/rtl8712/
H A Drtl8712_efuse.h13 #define PGPKT_DATA_SIZE 8 /* PGPKG_MAX_WORDS*2; BYTES sizeof(u8)*8*/
22 u8 offset;
23 u8 word_en;
24 u8 data[PGPKT_DATA_SIZE];
27 u8 r8712_efuse_reg_init(struct _adapter *padapter);
32 u8 r8712_efuse_pg_packet_read(struct _adapter *padapter,
33 u8 offset, u8 *data);
34 u8 r8712_efuse_pg_packet_write(struct _adapter *padapter,
35 const u8 offset, const u8 word_en,
36 const u8 *data);
37 u8 r8712_efuse_access(struct _adapter *padapter, u8 bRead,
38 u16 start_addr, u16 cnts, u8 *data);
39 u8 r8712_efuse_map_read(struct _adapter *padapter, u16 addr,
40 u16 cnts, u8 *data);
41 u8 r8712_efuse_map_write(struct _adapter *padapter, u16 addr,
42 u16 cnts, u8 *data);
H A Ddrv_types.h83 u8 chip_version;
84 u8 rfintfs;
85 u8 lbkmode;
86 u8 hci;
87 u8 network_mode; /*infra, ad-hoc, auto*/
89 u8 channel;/* ad-hoc support requirement */
90 u8 wireless_mode;/* A, B, G, auto */
91 u8 vrtl_carrier_sense; /*Enable, Disable, Auto*/
92 u8 vcs_type;/*RTS/CTS, CTS-to-self*/
95 u8 preamble;/*long, short, auto*/
96 u8 scan_mode;/*active, passive*/
97 u8 adhoc_tx_pwr;
98 u8 soft_ap;
99 u8 smart_ps;
100 u8 power_mgnt;
101 u8 radio_enable;
102 u8 long_retry_lmt;
103 u8 short_retry_lmt;
105 u8 ack_policy;
106 u8 mp_mode;
107 u8 software_encrypt;
108 u8 software_decrypt;
110 u8 wmm_enable;
111 u8 uapsd_enable;
112 u8 uapsd_max_sp;
113 u8 uapsd_acbk_en;
114 u8 uapsd_acbe_en;
115 u8 uapsd_acvi_en;
116 u8 uapsd_acvo_en;
120 u8 ht_enable;
121 u8 cbw40_enable;
122 u8 ampdu_enable;/*for tx*/
123 u8 rf_config;
124 u8 low_power;
125 u8 wifi_test;
131 u8 ishighspeed;
163 u8 EepromAddressSize;
164 u8 hw_init_completed;
177 u8 blnEnableRxFF0Filter;
185 static inline u8 *myid(struct eeprom_priv *peepriv) myid()
190 u8 r8712_usb_hal_bus_init(struct _adapter *adapter);
H A Drtl871x_recv.h21 u8 wsize_b;
43 u8 amsdu;
44 u8 order;
45 u8 qos;
46 u8 to_fr_ds;
47 u8 frag_num;
49 u8 pw_save;
50 u8 mfrag;
51 u8 mdata;
52 u8 privacy; /* in frame_ctrl field */
53 u8 bdecrypted;
60 u8 crc_err;
61 u8 dst[ETH_ALEN];
62 u8 src[ETH_ALEN];
63 u8 ta[ETH_ALEN];
64 u8 ra[ETH_ALEN];
65 u8 bssid[ETH_ALEN];
66 u8 tcpchk_valid; /* 0: invalid, 1: valid */
67 u8 ip_chkrpt; /* 0: incorrect, 1: correct */
68 u8 tcp_chkrpt; /* 0: incorrect, 1: correct */
69 u8 signal_qual;
71 u8 mcs_rate;
72 u8 htc;
73 u8 signal_strength;
87 u8 *pallocated_frame_buf;
88 u8 *precv_frame_buf;
98 u8 rx_pending_cnt;
103 u8 *pallocated_recv_buf;
104 u8 *precv_buf; /* 4 alignment */
109 u8 signal;
110 u8 noise;
111 u8 fw_rssi;
137 static inline u8 *get_rxmem(union recv_frame *precvframe) get_rxmem()
145 static inline u8 *get_recvframe_data(union recv_frame *precvframe) get_recvframe_data()
153 static inline u8 *recvframe_pull(union recv_frame *precvframe, sint sz) recvframe_pull()
168 static inline u8 *recvframe_put(union recv_frame *precvframe, sint sz) recvframe_put()
184 static inline u8 *recvframe_pull_tail(union recv_frame *precvframe, sint sz) recvframe_pull_tail()
/linux-4.1.27/drivers/crypto/vmx/
H A Daesp8-ppc.h7 u8 key[AES_MAX_KEYLENGTH];
11 int aes_p8_set_encrypt_key(const u8 *userKey, const int bits,
13 int aes_p8_set_decrypt_key(const u8 *userKey, const int bits,
15 void aes_p8_encrypt(const u8 *in, u8 *out, const struct aes_key *key);
16 void aes_p8_decrypt(const u8 *in, u8 *out,const struct aes_key *key);
17 void aes_p8_cbc_encrypt(const u8 *in, u8 *out, size_t len,
18 const struct aes_key *key, u8 *iv, const int enc);
19 void aes_p8_ctr32_encrypt_blocks(const u8 *in, u8 *out,
20 size_t len, const struct aes_key *key, const u8 *iv);
/linux-4.1.27/drivers/staging/rtl8723au/include/
H A Dodm_HWConfig.h70 u8 gain:7, trsw:1;
72 u8 trsw:1, gain:7;
78 u8 ch_corr[RF_PATH_MAX];
79 u8 cck_sig_qual_ofdm_pwdb_all;
80 u8 cck_agc_rpt_ofdm_cfosho_a;
81 u8 cck_rpt_b_ofdm_cfosho_b;
82 u8 rsvd_1;/* ch_corr_msb; */
83 u8 noise_power_db_msb;
84 u8 path_cfotail[RF_PATH_MAX];
85 u8 pcts_mask[RF_PATH_MAX];
87 u8 path_rxsnr[RF_PATH_MAX];
88 u8 noise_power_db_lsb;
89 u8 rsvd_2[3];
90 u8 stream_csi[RF_PATH_MAX];
91 u8 stream_target_csi[RF_PATH_MAX];
93 u8 rsvd_3;
96 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
97 u8 sgi_en:1;
98 u8 rxsc:2;
99 u8 idle_long:1;
100 u8 r_ant_train_en:1;
101 u8 ant_sel_b:1;
102 u8 ant_sel:1;
104 u8 ant_sel:1;
105 u8 ant_sel_b:1;
106 u8 r_ant_train_en:1;
107 u8 idle_long:1;
108 u8 rxsc:2;
109 u8 sgi_en:1;
110 u8 antsel_rx_keep_2:1; /* ex_intf_flg:1; */
117 u8 ch_num[2];
118 u8 cck_sig_qual_ofdm_pwdb_all;
119 u8 cck_agc_rpt_ofdm_cfosho_a;
120 u8 cck_bb_pwr_ofdm_cfosho_b;
121 u8 cck_rx_path; /* CCK_RX_PATH [3:0] (with regA07[3:0] definition) */
122 u8 rsvd_1;
123 u8 path_cfotail[2];
124 u8 pcts_mask[2];
126 u8 path_rxsnr[2];
127 u8 rsvd_2[2];
128 u8 stream_snr[2];
129 u8 stream_csi[2];
130 u8 rsvd_3[2];
132 u8 rsvd_4;
134 u8 antidx_anta:3;
135 u8 antidx_antb:3;
136 u8 rsvd_5:2;
138 u8 rsvd_5:2;
139 u8 antidx_antb:3;
140 u8 antidx_anta:3;
151 u8 * pPhyStatus,
H A Ddrv_types.h60 u8 chip_version;
61 u8 rfintfs;
63 u8 channel;/* ad-hoc support requirement */
64 u8 wireless_mode;/* A, B, G, auto */
65 u8 scan_mode;/* active, passive */
66 u8 preamble;/* long, short, auto */
67 u8 vrtl_carrier_sense;/* Enable, Disable, Auto */
68 u8 vcs_type;/* RTS/CTS, CTS-to-self */
71 u8 adhoc_tx_pwr;
72 u8 soft_ap;
73 u8 power_mgnt;
74 u8 ips_mode;
75 u8 smart_ps;
76 u8 long_retry_lmt;
77 u8 short_retry_lmt;
79 u8 ack_policy;
80 u8 software_encrypt;
81 u8 software_decrypt;
82 u8 acm_method;
84 u8 wmm_enable;
85 u8 uapsd_enable;
89 u8 ht_enable;
90 u8 cbw40_enable;
91 u8 ampdu_enable;/* for tx */
92 u8 rx_stbc;
93 u8 ampdu_amsdu;/* A-MPDU Supports A-MSDU is permitted */
94 u8 lowrate_two_xmit;
96 u8 rf_config;
97 u8 low_power;
99 u8 wifi_spec;/* !turbo_mode */
101 u8 channel_plan;
103 u8 btcoex;
104 u8 bt_iso;
105 u8 bt_sco;
106 u8 bt_ampdu;
110 u8 antdiv_cfg;
111 u8 antdiv_type;
113 u8 hwpdn_mode;/* 0:disable,1:enable,2:decide by EFUSE config */
114 u8 hwpwrp_detect;/* 0:disable,1:enable */
116 u8 hw_wps_pbc;/* 0:disable,1:enable */
118 u8 max_roaming_times; /* max number driver will try to roaming */
120 u8 enable80211d;
122 u8 ifname[16];
123 u8 if2name[16];
125 u8 notch_filter;
127 u8 regulatory_tid;
159 u8 iface_nums; /* total number of ifaces used runtime */
162 u8 InterfaceNumber;
163 u8 NumInterfaces;
168 u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */
172 u8 nr_endpoint;
173 u8 ishighspeed;
174 u8 RtNumInPipes;
175 u8 RtNumOutPipes;
183 u8 val8;
242 u8 EepromAddressSize;
243 u8 hw_init_completed;
244 u8 bDriverIsGoingToUnload;
245 u8 init_adpt_in_progress;
246 u8 bHaltInProgress;
257 u8 bFWReady;
258 u8 bReadPortCancel;
259 u8 bWritePortCancel;
264 u8 iface_id;
269 static inline u8 *myid(struct eeprom_priv *peepriv) myid()
H A Drtl8723a_cmd.h56 u8 eid; /* element id */
57 u8 sz; /* sz */
58 u8 buf[6];
62 u8 Mode;
63 u8 SmartPS;
64 u8 AwakeInterval; /* unit: beacon interval */
65 u8 bAllQueueUAPSD;
70 u8 BcnAntMode;
74 u8 ROFOn; /* 1: on, 0:off */
80 u8 OpMode; /* enum rt_media_status */
84 u8 LocProbeRsp;
85 u8 LocPsPoll;
86 u8 LocNullData;
87 u8 LocQosNull;
88 u8 LocBTQosNull;
92 u8 Offload_En:1;
93 u8 role:1; /* 1: Owner, 0: Client */
94 u8 CTWindow_En:1;
95 u8 NoA0_En:1;
96 u8 NoA1_En:1;
97 u8 AllStaSleep:1; /* Only valid in Owner */
98 u8 discovery:1;
99 u8 rsvd:1;
103 u8 CTWPeriod; /* TU */
115 u8 option;
117 u8 TBTTOnPeriod;
118 u8 MedPeriod;
119 u8 rsvd30;
123 u8 En;
134 u8 bcn_count:4;
135 u8 tb_bcn_threshold:3;
136 u8 enable:1;
137 u8 bcn_interval;
138 u8 drop_threshold;
139 u8 max_early_period;
140 u8 max_bcn_timeout_period;
145 void rtl8723a_set_FwPwrMode_cmd(struct rtw_adapter *padapter, u8 Mode);
146 void rtl8723a_set_FwJoinBssReport_cmd(struct rtw_adapter *padapter, u8 mstatus);
152 int rtl8723a_set_rssi_cmd(struct rtw_adapter *padapter, u8 *param);
153 int rtl8723a_set_raid_cmd(struct rtw_adapter *padapter, u32 mask, u8 arg);
154 void rtl8723a_add_rateatid(struct rtw_adapter *padapter, u32 bitmap, u8 arg, u8 rssi_level);
156 int FillH2CCmd(struct rtw_adapter *padapter, u8 ElementID, u32 CmdLen, u8 *pCmdBuffer);
H A DHal8723UHWImg_CE.h8 extern u8 Rtl8723UFwImgArray[Rtl8723UImgArrayLength];
10 extern u8 Rtl8723UFwBTImgArray[Rtl8723UBTImgArrayLength];
15 extern u8 Rtl8723UFwUMCBCutImgArrayWithBT[Rtl8723UUMCBCutImgArrayWithBTLength];
16 extern u8 Rtl8723UFwUMCBCutImgArrayWithoutBT[Rtl8723UUMCBCutImgArrayWithoutBTLength];
19 extern const u8 Rtl8723SFwUMCBCutMPImgArray[Rtl8723SUMCBCutMPImgArrayLength];
22 extern u8 Rtl8723EFwBTImgArray[Rtl8723EBTImgArrayLength];
H A Drtw_efuse.h76 u8 offset;
77 u8 word_en;
78 u8 data[8];
79 u8 word_cnts;
85 int rtw_efuse_access23a(struct rtw_adapter *padapter, u8 bRead, u16 start_addr, u16 cnts, u8 *data);
86 int rtw_efuse_map_read23a(struct rtw_adapter *padapter, u16 addr, u16 cnts, u8 *data);
87 u8 rtw_efuse_map_write(struct rtw_adapter *padapter, u16 addr, u16 cnts, u8 *data);
88 int rtw_BT_efuse_map_read23a(struct rtw_adapter *padapter, u16 addr, u16 cnts, u8 *data);
89 u8 rtw_BT_efuse_map_write(struct rtw_adapter *padapter, u16 addr, u16 cnts, u8 *data);
91 u16 Efuse_GetCurrentSize23a(struct rtw_adapter *pAdapter, u8 efuseType);
92 u8 Efuse_CalculateWordCnts23a(u8 word_en);
93 void ReadEFuseByte23a(struct rtw_adapter *Adapter, u16 _offset, u8 *pbuf);
94 void EFUSE_GetEfuseDefinition23a(struct rtw_adapter *pAdapter, u8 efuseType, u8 type, void *pOut);
95 int efuse_OneByteRead23a(struct rtw_adapter *pAdapter, u16 addr, u8 *data);
96 int efuse_OneByteWrite23a(struct rtw_adapter *pAdapter, u16 addr, u8 data);
98 void Efuse_PowerSwitch23a(struct rtw_adapter *pAdapter, u8 bWrite,
99 u8 PwrState);
100 int Efuse_PgPacketRead23a(struct rtw_adapter *pAdapter, u8 offset, u8 *data);
101 int Efuse_PgPacketWrite23a(struct rtw_adapter *pAdapter, u8 offset, u8 word_en, u8 *data);
102 void efuse_WordEnableDataRead23a(u8 word_en, u8 *sourdata, u8 *targetdata);
103 u8 Efuse_WordEnableDataWrite23a(struct rtw_adapter *pAdapter, u16 efuse_addr, u8 word_en, u8 *data);
105 u8 EFUSE_Read1Byte23a(struct rtw_adapter *pAdapter, u16 Address);
106 void EFUSE_ShadowMapUpdate23a(struct rtw_adapter *pAdapter, u8 efuseType);
107 void EFUSE_ShadowRead23a(struct rtw_adapter *pAdapter, u8 Type, u16 Offset, u32 *Value);
H A Drtl8723a_bt-coexist.h33 u8 *rssi_wifi, u8 *rssi_bt);
50 u8 *Octet;
82 u8 FirstChnl;
83 u8 NumChnls;
567 #define HCIOPCODELOW(_OCF, _OGF) (u8)(HCIOPCODE(_OCF, _OGF)&0x00ff)
568 #define HCIOPCODEHIGHT(_OCF, _OGF) (u8)(HCIOPCODE(_OCF, _OGF)>>8)
570 #define TWOBYTE_HIGHTBYTE(_DATA) (u8)(_DATA>>8)
571 #define TWOBYTE_LOWBYTE(_DATA) (u8)(_DATA)
653 u8 Identifier;
654 u8 ServiceType;
662 u8 BtPhyLinkhandle;
664 u8 BtTxFlowSpecID;
670 u8 bLLCompleteEventIsSet;
672 u8 bLLCancelCMDIsSetandComplete;
677 u8 BtPhyLinkhandle;
684 u8 BtAMPKeyLen;
686 u8 BtAMPKeyType;
688 u8 BtAMPKey[PMK_LEN];
693 u8 TypeID;
697 u8 Data[1];
701 u8 reXId;
702 u8 regulatoryClass;
703 u8 coverageClass;
708 u8 BtPhyLinkhandle;
721 u8 IncomingTrafficMode;
722 u8 OutgoingTrafficMode;
723 u8 BTProfile;
724 u8 BTCoreSpec;
726 u8 TrafficProfile;
727 u8 linkRole;
732 u8 btOperationCode;
734 u8 CurrentIncomingTrafficMode;
735 u8 CurrentOutgoingTrafficMode;
737 u8 NumberOfHandle;
738 u8 NumberOfSCO;
739 u8 CurrentBTStatus;
743 u8 btProfileCase;
744 u8 btProfileAction;
745 u8 bManualControl;
746 u8 bBTBusy;
747 u8 bBTA2DPBusy;
748 u8 bEnableWifiScanNotify;
750 u8 bHoldForBtOperation;
756 u8 SyncDataPacketLen;
768 u8 Length;
769 u8 Data[20];
773 u8 bUsed;
774 u8 mAssoc;
775 u8 b4waySuccess;
776 u8 Bssid[6];
785 u8 BTSsidBuf[33];
789 u8 bSendSupervisionPacket;
790 /* u8 CurrentSuervisionPacketSendNum; */
791 /* u8 LastSuervisionPacketSendNum; */
797 u8 BtCurrentState;
799 u8 BtNextState;
801 u8 bNeedPhysLinkCompleteEvent;
805 u8 BTRemoteMACAddr[6];
809 u8 SyncDataPacketLen;
814 u8 ShortRangeMode;
816 u8 PTK[PTK_LEN_TKIP];
817 u8 GTK[GTK_LEN];
818 u8 ANonce[KEY_NONCE_LEN];
819 u8 SNonce[KEY_NONCE_LEN];
821 u8 WPAAuthReplayCount;
822 u8 AESKeyBuf[AESCCMP_BLK_SIZE_TOTAL];
823 u8 PMK[PMK_LEN];
828 u8 HwCAMIndex; /* Cam index */
829 u8 bPeerQosSta;
835 u8 bTxBusyTraffic;
836 u8 bRxBusyTraffic;
837 u8 bIdle;
845 u8 bBTConnectInProgress;
846 u8 bLogLinkInProgress;
847 u8 bPhyLinkInProgress;
848 u8 bPhyLinkInProgressStartLL;
849 u8 BtCurrentPhyLinkhandle;
851 u8 CurrentConnectEntryNum;
852 u8 DisconnectEntryNum;
853 u8 CurrentBTConnectionCnt;
856 u8 BTAuthCount;
857 u8 BTAsocCount;
858 u8 bStartSendSupervisionPkt;
859 u8 BtOperationOn;
860 u8 BTNeedAMPStatusChg;
861 u8 JoinerNeedSendAuth;
864 u8 bNeedNotifyAMPNoCap;
865 u8 bCreateSpportQos;
866 u8 bSupportProfile;
867 u8 BTChannel;
868 u8 CheckChnlIsSuit;
869 u8 bBtScan;
870 u8 btLogoTest;
938 u8 dbgCtrl;
947 u8 BTPalVersion;
953 u8 BTConnectChnllist[64];
967 u8 LocationDomainAware;
969 u8 LocationDomainOptions;
970 u8 LocationOptions;
972 u8 FlowControlMode;
976 u8 BTPreChnllist[64];
983 u8 bInTestMode;
984 u8 bTestIsEnd;
985 u8 bTestNeedReport;
986 u8 TestScenario;
987 u8 TestReportInterval;
988 u8 TestCtrType;
999 u8 LastRxUniFragNum;
1016 u8 RSNIEBuf[MAXRSNIELEN];
1017 u8 bRegNoEncrypt;
1018 u8 bUsedHwEncrypt;
1038 u8 BTBeaconTmrOn;
1050 u8 Data[1];
1054 u8 EventCode;
1055 u8 Length;
1056 u8 Data[20];
1060 u8 byte_1st;
1061 u8 byte_2nd;
1062 u8 byte_3rd;
1098 u8 BTHCI_HsConnectionEstablished(struct rtw_adapter *padapter);
1100 void BTHCI_WifiScanNotify(struct rtw_adapter *padapter, u8 scanType);
1101 void BTHCI_StateMachine(struct rtw_adapter *padapter, u8 StateToEnter,
1102 enum hci_state_with_cmd StateCmd, u8 EntryNum);
1103 void BTHCI_DisconnectPeer(struct rtw_adapter *padapter, u8 EntryNum);
1105 void BTHCI_EventAMPStatusChange(struct rtw_adapter *padapter, u8 AMP_Status);
1139 u8 prePsTdma;
1140 u8 curPsTdma;
1141 u8 psTdmaDuAdjType;
1142 u8 bPrePsTdmaOn;
1143 u8 bCurPsTdmaOn;
1144 u8 preWifiPara;
1145 u8 curWifiPara;
1146 u8 preCoexWifiCon;
1147 u8 curCoexWifiCon;
1148 u8 wifiRssiThresh;
1155 u8 psTdmaDuAdjTypeForSCO;
1156 u8 RSSI_WiFi_Last;
1157 u8 RSSI_BT_Last;
1159 u8 bWiFiHalt;
1160 u8 bRAChanged;
1164 u8 *rssi_wifi, u8 *rssi_bt);
1194 u8 bPreDecBtPwr;
1195 u8 bCurDecBtPwr;
1197 u8 preWlanActHi;
1198 u8 curWlanActHi;
1199 u8 preWlanActLo;
1200 u8 curWlanActLo;
1202 u8 preFwDacSwingLvl;
1203 u8 curFwDacSwingLvl;
1205 u8 bPreRfRxLpfShrink;
1206 u8 bCurRfRxLpfShrink;
1208 u8 bPreLowPenaltyRa;
1209 u8 bCurLowPenaltyRa;
1211 u8 preBtRetryIndex;
1212 u8 curBtRetryIndex;
1214 u8 bPreDacSwingOn;
1216 u8 bCurDacSwingOn;
1219 u8 bPreAdcBackOff;
1220 u8 bCurAdcBackOff;
1222 u8 bPreAgcTableEn;
1223 u8 bCurAgcTableEn;
1229 u8 preVal0x6cc;
1230 u8 curVal0x6cc;
1232 u8 bCurIgnoreWlanAct;
1233 u8 bPreIgnoreWlanAct;
1235 u8 prePsTdma;
1236 u8 curPsTdma;
1237 u8 psTdmaDuAdjType;
1238 u8 bPrePsTdmaOn;
1239 u8 bCurPsTdmaOn;
1241 u8 preAlgorithm;
1242 u8 curAlgorithm;
1243 u8 bResetTdmaAdjust;
1245 u8 btStatus;
1299 u8 btRssi;
1300 u8 TotalAntNum;
1301 u8 bC2hBtInfoSupport;
1302 u8 c2hBtInfo;
1303 u8 c2hBtInfoOriginal;
1304 u8 prec2hBtInfo; /* for 1Ant */
1305 u8 bC2hBtInquiryPage;
1307 u8 c2hBtProfile; /* for 1Ant */
1308 u8 btRetryCnt;
1309 u8 btInfoExt;
1310 u8 bC2hBtInfoReqSent;
1311 u8 bForceFwBtInfo;
1312 u8 bForceA2dpSink;
1319 u8 BTDM_IsWifiConnectionExist(struct rtw_adapter *padapter);
1320 void BTDM_SetFw3a(struct rtw_adapter *padapter, u8 byte1, u8 byte2, u8 byte3,
1321 u8 byte4, u8 byte5);
1323 void BTDM_SetSwRfRxLpfCorner(struct rtw_adapter *padapter, u8 type);
1324 void BTDM_SetSwPenaltyTxRateAdaptive(struct rtw_adapter *padapter, u8 raType);
1325 void BTDM_SetFwDecBtPwr(struct rtw_adapter *padapter, u8 bDecBtPwr);
1326 u8 BTDM_BtProfileSupport(struct rtw_adapter *padapter);
1349 void BTDM_SingleAnt(struct rtw_adapter *padapter, u8 bSingleAntOn,
1350 u8 bInterruptOn, u8 bMultiNAVOn);
1371 void BTDM_DiminishWiFi(struct rtw_adapter *Adapter, u8 bDACOn, u8 bInterruptOn,
1372 u8 DACSwingLevel, u8 bNAVOn);
1499 u8 BluetoothCoexist;
1500 u8 BT_Ant_Num;
1501 u8 BT_CoexistType;
1502 u8 BT_Ant_isolation; /* 0:good, 1:bad */
1503 u8 bt_radiosharedtype;
1506 u8 bInitlized;
1509 u8 bBTBusyTraffic;
1510 u8 bBTTrafficModeSet;
1511 u8 bBTNonTrafficModeSet;
1515 u8 preRssiState;
1516 u8 preRssiState1;
1517 u8 preRssiStateBeacon;
1518 u8 bFWCoexistAllOff;
1519 u8 bSWCoexistAllOff;
1520 u8 bHWCoexistAllOff;
1521 u8 bBalanceOn;
1522 u8 bSingleAntOn;
1523 u8 bInterruptOn;
1524 u8 bMultiNAVOn;
1525 u8 PreWLANActH;
1526 u8 PreWLANActL;
1527 u8 WLANActH;
1528 u8 WLANActL;
1529 u8 A2DPState;
1530 u8 AntennaState;
1533 u8 bEDCAInitialized;
1534 u8 exec_cnt;
1535 u8 b8723aAgcTableOn;
1536 u8 b92DAgcTableOn;
1538 u8 btActiveZeroCnt;
1539 u8 bCurBtDisabled;
1540 u8 bPreBtDisabled;
1541 u8 bNeedToRoamForBtDisableEnable;
1542 u8 fw3aVal[5];
1546 void BTDM_FwC2hBtRssi(struct rtw_adapter *padapter, u8 *tmpBuf);
1550 void BTDM_RejectAPAggregatedPacket(struct rtw_adapter *padapter, u8 bReject);
1551 u8 BTDM_IsHT40(struct rtw_adapter *padapter);
1552 u8 BTDM_Legacy(struct rtw_adapter *padapter);
1555 u8 BTDM_CheckCoexBcnRssiState(struct rtw_adapter *padapter, u8 levelNum,
1556 u8 RssiThresh, u8 RssiThresh1);
1557 u8 BTDM_CheckCoexRSSIState1(struct rtw_adapter *padapter, u8 levelNum,
1558 u8 RssiThresh, u8 RssiThresh1);
1559 u8 BTDM_CheckCoexRSSIState(struct rtw_adapter *padapter, u8 levelNum,
1560 u8 RssiThresh, u8 RssiThresh1);
1561 void BTDM_Balance(struct rtw_adapter *padapter, u8 bBalanceOn, u8 ms0, u8 ms1);
1562 void BTDM_AGCTable(struct rtw_adapter *padapter, u8 type);
1563 void BTDM_BBBackOffLevel(struct rtw_adapter *padapter, u8 type);
1569 void BTDM_SignalCompensation(struct rtw_adapter *padapter, u8 *rssi_wifi,
1570 u8 *rssi_bt);
1572 u8 BTDM_IsSameCoexistState(struct rtw_adapter *padapter);
1574 u8 BTDM_IsBTBusy(struct rtw_adapter *padapter);
1576 u8 BTDM_IsWifiBusy(struct rtw_adapter *padapter);
1577 u8 BTDM_IsCoexistStateChanged(struct rtw_adapter *padapter);
1578 u8 BTDM_IsWifiUplink(struct rtw_adapter *padapter);
1579 u8 BTDM_IsWifiDownlink(struct rtw_adapter *padapter);
1580 u8 BTDM_IsBTHSMode(struct rtw_adapter *padapter);
1581 u8 BTDM_IsBTUplink(struct rtw_adapter *padapter);
1582 u8 BTDM_IsBTDownlink(struct rtw_adapter *padapter);
1585 void BTDM_WifiScanNotify(struct rtw_adapter *padapter, u8 scanType);
1586 void BTDM_WifiAssociateNotify(struct rtw_adapter *padapter, u8 action);
1591 void BTDM_SetBtCoexCurrAntNum(struct rtw_adapter *padapter, u8 antNum);
1593 u8 BTDM_IsActionSCO(struct rtw_adapter *padapter);
1594 u8 BTDM_IsActionHID(struct rtw_adapter *padapter);
1595 u8 BTDM_IsActionA2DP(struct rtw_adapter *padapter);
1596 u8 BTDM_IsActionPAN(struct rtw_adapter *padapter);
1597 u8 BTDM_IsActionHIDA2DP(struct rtw_adapter *padapter);
1598 u8 BTDM_IsActionHIDPAN(struct rtw_adapter *padapter);
1599 u8 BTDM_IsActionPANA2DP(struct rtw_adapter *padapter);
1609 u8 HALBT_GetPGAntNum(struct rtw_adapter *padapter);
1611 void HALBT_SetKey(struct rtw_adapter *padapter, u8 EntryNum);
1612 void HALBT_RemoveKey(struct rtw_adapter *padapter, u8 EntryNum);
1613 u8 HALBT_IsBTExist(struct rtw_adapter *padapter);
1615 u8 HALBT_BTChipType(struct rtw_adapter *padapter);
H A Drtl8723a_dm.h58 u8 DynamicTxHighPowerLvl;/* Add by Jacken Tx Power Control for Near/Far Range 2008/03/06 */
61 u8 bTXPowerTracking;
62 u8 TXPowercount;
63 u8 bTXPowerTrackingInit;
64 u8 TxPowerTrackControl; /* for mp mode, turn off txpwrtracking as default */
65 u8 TM_Trigger;
67 u8 ThermalMeter[2]; /* ThermalMeter, index 0 for RFIC0, and 1 for RFIC1 */
68 u8 ThermalValue;
69 u8 ThermalValue_LCK;
70 u8 ThermalValue_IQK;
71 u8 ThermalValue_DPK;
73 u8 bRfPiEnable;
77 u8 bAPKdone;
78 u8 bAPKThermalMeterIgnore;
79 u8 bDPdone;
80 u8 bDPPathAOK;
81 u8 bDPPathBOK;
96 u8 PowerIndex_backup[6];
98 u8 bCCKinCH14;
100 u8 CCK_index;
101 u8 OFDM_index[2];
103 u8 bDoneTxpower;
104 u8 CCK_index_HP;
105 u8 OFDM_index_HP[2];
106 u8 ThermalValue_HP[HP_THERMAL_NUM];
107 u8 ThermalValue_HP_index;
120 u8 RSSI_Select;
121 /* u8 DIG_Dynamic_MIN ; */
124 u8 INIDATA_RATE[32];
H A Dieee80211.h60 extern u8 RTW_WPA_OUI23A_TYPE[] ;
62 extern u8 WPA_AUTH_KEY_MGMT_NONE23A[];
63 extern u8 WPA_AUTH_KEY_MGMT_UNSPEC_802_1X23A[];
64 extern u8 WPA_AUTH_KEY_MGMT_PSK_OVER_802_1X23A[];
65 extern u8 WPA_CIPHER_SUITE_NONE23A[];
66 extern u8 WPA_CIPHER_SUITE_WEP4023A[];
67 extern u8 WPA_CIPHER_SUITE_TKIP23A[];
68 extern u8 WPA_CIPHER_SUITE_WRAP23A[];
69 extern u8 WPA_CIPHER_SUITE_CCMP23A[];
70 extern u8 WPA_CIPHER_SUITE_WEP10423A[];
76 extern u8 RSN_AUTH_KEY_MGMT_UNSPEC_802_1X23A[];
77 extern u8 RSN_AUTH_KEY_MGMT_PSK_OVER_802_1X23A[];
78 extern u8 RSN_CIPHER_SUITE_NONE23A[];
79 extern u8 RSN_CIPHER_SUITE_WEP4023A[];
80 extern u8 RSN_CIPHER_SUITE_TKIP23A[];
81 extern u8 RSN_CIPHER_SUITE_WRAP23A[];
82 extern u8 RSN_CIPHER_SUITE_CCMP23A[];
83 extern u8 RSN_CIPHER_SUITE_WEP10423A[];
162 u8 dsap; /* always 0xAA */
163 u8 ssap; /* always 0xAA */
164 u8 ctrl; /* always 0x03 */
165 u8 oui[P80211_OUI_LEN]; /* organizational universal id */
308 u8 *rtw_set_ie23a(u8 *pbuf, int index, uint len, const u8 *source, uint *frlen);
310 u8 hal_ch_offset_to_secondary_ch_offset23a(u8 ch_offset);
311 u8 *rtw_set_ie23a_ch_switch(u8 *buf, u32 *buf_len, u8 ch_switch_mode, u8 new_ch, u8 ch_switch_cnt);
312 u8 *rtw_set_ie23a_secondary_ch_offset(u8 *buf, u32 *buf_len, u8 secondary_ch_offset);
314 u8 *rtw_get_ie23a(u8*pbuf, int index, int *len, int limit);
315 u8 *rtw_get_ie23a_ex(u8 *in_ie, uint in_len, u8 eid, u8 *oui, u8 oui_len, u8 *ie, uint *ielen);
316 int rtw_ies_remove_ie23a(u8 *ies, uint *ies_len, uint offset, u8 eid, u8 *oui, u8 oui_len);
318 void rtw_set_supported_rate23a(u8 *SupportedRates, uint mode);
320 int rtw_parse_wpa_ie23a(const u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x);
321 int rtw_parse_wpa2_ie23a(const u8* wpa_ie, int wpa_ie_len, int *group_cipher, int *pairwise_cipher, int *is_8021x);
323 const u8 *rtw_get_wps_attr23a(const u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_attr, u32 *len_attr);
324 const u8 *rtw_get_wps_attr_content23a(const u8 *wps_ie, uint wps_ielen, u16 target_attr_id ,u8 *buf_content);
326 uint rtw_get_rateset_len23a(u8 *rateset);
332 int rtw_get_bit_value_from_ieee_value23a(u8 val);
338 u16 rtw_mcs_rate23a(u8 rf_type, u8 bw_40MHz, u8 short_GI_20, u8 short_GI_40,
H A Drtw_cmd.h39 u8 *parmbuf;
40 u8 *rsp;
62 pcmd->parmbuf = (u8 *)(pparm);\
69 u8 id:4;
70 u8 plen:4;
71 u8 seq;
72 u8 payload[0];
83 u8 buf[16];
187 u8 ssid_num;
188 u8 ch_num;
202 u8 mode; /* 0: legacy open, 1: legacy shared 2: 802.1x */
203 u8 _1x; /* 0: PSK, 1: TLS */
204 u8 rsvd[2];
221 u8 keyid;
222 u8 grpkey; /* 1: this is the grpkey for 802.1x. 0: this is the unicast key for 802.1x */
223 u8 set_tx; /* 1: main tx key for wep. 0: other key. */
224 u8 key[16]; /* this could be 40 or 104 */
237 u8 addr[ETH_ALEN];
238 u8 id;/* currently for erasing cam entry if algorithm == _NO_PRIVACY_ */
240 u8 key[16];
244 u8 addr[ETH_ALEN];
245 u8 keyid;
246 u8 rsvd;
260 u8 addr[ETH_ALEN];
264 u8 cam_id;
265 u8 rsvd[3];
279 u8 addr[ETH_ALEN];
291 u8 staid;
292 u8 status;
293 u8 hwaddr[6];
305 u8 basicrates[NumRates];
321 u8 basicrates[NumRates];
333 u8 mac_id;
334 u8 datarates[NumRates];
350 u8 datarates[NumRates];
370 u8 status;
379 u8 status;
392 u8 rfchannel;
393 u8 modem;
409 u8 rfchannel;
410 u8 modem;
414 u8 offset;
418 u8 value;
422 u8 offset;
426 u8 value;
430 u8 offset;
431 u8 value;
435 u8 offset;
448 u8 rfintfs;
465 u8 tx_antset;
466 u8 rx_antset;
467 u8 tx_antenna;
468 u8 rx_antenna;
500 u8 ss_ForceUp[MAX_RATES_LENGTH];
504 u8 ss_DLevel[MAX_RATES_LENGTH];
512 u8 ss_DLevel[MAX_RATES_LENGTH];
516 u8 ss_ULevel[MAX_RATES_LENGTH];
524 u8 ss_ULevel[MAX_RATES_LENGTH];
528 u8 count_judge[MAX_RATES_LENGTH];
536 u8 count_judge[MAX_RATES_LENGTH];
540 u8 ss_ForceUp[NumRates];
541 u8 ss_ULevel[NumRates];
542 u8 ss_DLevel[NumRates];
543 u8 count_judge[NumRates];
551 u8 ss_ForceUp[NumRates];
552 u8 ss_ULevel[NumRates];
553 u8 ss_DLevel[NumRates];
554 u8 count_judge[NumRates];
622 u8 addr[ETH_ALEN];
627 u8 ch;
628 u8 bw;
629 u8 ch_offset;
634 u8 channel_plan;
644 u8 new_ch_no;
649 u8 addr[ETH_ALEN];
650 u8 option;
678 int rtw_setassocsta_cmd(struct rtw_adapter *padapter, u8 *mac_addr);
683 int rtw_setphy_cmd(struct rtw_adapter *padapter, u8 modem, u8 ch);
684 int rtw_setstakey_cmd23a(struct rtw_adapter *padapter, u8 *psta, u8 unicast_key);
685 int rtw_clearstakey_cmd23a(struct rtw_adapter *padapter, u8 *psta, u8 entry, u8 enqueue);
689 int rtw_setdatarate_cmd(struct rtw_adapter *padapter, u8 *rateset);
690 int rtw_setbasicrate_cmd(struct rtw_adapter *padapter, u8 *rateset);
691 int rtw_setbbreg_cmd(struct rtw_adapter *padapter, u8 offset, u8 val);
692 int rtw_setrfreg_cmd(struct rtw_adapter *padapter, u8 offset, u32 val);
693 int rtw_getbbreg_cmd(struct rtw_adapter *padapter, u8 offset, u8 *pval);
694 int rtw_getrfreg_cmd(struct rtw_adapter *padapter, u8 offset, u8 *pval);
695 int rtw_setrfintfs_cmd(struct rtw_adapter *padapter, u8 mode);
699 int rtw_gettssi_cmd(struct rtw_adapter *padapter, u8 offset, u8 *pval);
700 int rtw_setfwdig_cmd(struct rtw_adapter*padapter, u8 type);
701 int rtw_setfwra_cmd(struct rtw_adapter*padapter, u8 type);
703 int rtw_addbareq_cmd23a(struct rtw_adapter*padapter, u8 tid, u8 *addr);
707 int rtw_lps_ctrl_wk_cmd23a(struct rtw_adapter*padapter, u8 lps_ctrl_type, u8 enqueue);
715 int rtw_set_chplan_cmd(struct rtw_adapter*padapter, u8 chplan, u8 enqueue);
717 int rtw_set_csa_cmd(struct rtw_adapter*padapter, u8 new_ch_no);
719 int rtw_c2h_wk_cmd23a(struct rtw_adapter *padapter, u8 *c2h_evt);
721 int rtw_drvextra_cmd_hdl23a(struct rtw_adapter *padapter, const u8 *pbuf);
H A Drtw_security.h52 u8 TSC0;
53 u8 TSC1;
54 u8 TSC2;
55 u8 TSC3;
56 u8 TSC4;
57 u8 TSC5;
58 u8 TSC6;
59 u8 TSC7;
65 u8 TSC7;
66 u8 TSC6;
67 u8 TSC5;
68 u8 TSC4;
69 u8 TSC3;
70 u8 TSC2;
71 u8 TSC1;
72 u8 TSC0;
82 u8 skey[16];
87 u8 key[WLAN_KEY_LEN_WEP104 + 1]; /* 14 */
92 u8 bUsed;
93 u8 Bssid[6];
94 u8 PMKID[16];
95 u8 SsidBuf[33];
96 u8 *ssid_octet;
134 u8 wps_ie[MAX_WPS_IE_LEN];/* added in assoc req */
143 u8 assoc_info[600];
144 u8 szofcapability[256]; /* for wpa2 usage */
145 u8 oidassociation[512]; /* for wpa/wpa2 usage */
146 u8 supplicant_ie[256]; /* store sta security information element */
150 u8 btkip_countermeasure;
151 u8 btkip_wait_report;
156 u8 PMKIDIndex;
157 u8 bWepDefaultKeyIdxSet;
163 u8 buf[64];
214 extern const u8 Td4s[256];
215 extern const u8 rcons[10];
255 (ct)[0] = (u8)((st) >> 24); (ct)[1] = (u8)((st) >> 16); \
256 (ct)[2] = (u8)((st) >> 8); (ct)[3] = (u8)(st); }
269 (a)[0] = (u8) ((((u32) (val)) >> 24) & 0xff); \
270 (a)[1] = (u8) ((((u32) (val)) >> 16) & 0xff); \
271 (a)[2] = (u8) ((((u32) (val)) >> 8) & 0xff); \
272 (a)[3] = (u8) (((u32) (val)) & 0xff); \
277 (a)[0] = (u8) (((u64) (val)) >> 56); \
278 (a)[1] = (u8) (((u64) (val)) >> 48); \
279 (a)[2] = (u8) (((u64) (val)) >> 40); \
280 (a)[3] = (u8) (((u64) (val)) >> 32); \
281 (a)[4] = (u8) (((u64) (val)) >> 24); \
282 (a)[5] = (u8) (((u64) (val)) >> 16); \
283 (a)[6] = (u8) (((u64) (val)) >> 8); \
284 (a)[7] = (u8) (((u64) (val)) & 0xff); \
309 void rtw_secmicsetkey23a(struct mic_data *pmicdata, u8 *key);
310 void rtw_secmicappend23abyte23a(struct mic_data *pmicdata, u8 b);
311 void rtw_secmicappend23a(struct mic_data *pmicdata, u8 *src, u32 nbBytes);
312 void rtw_secgetmic23a(struct mic_data *pmicdata, u8 *dst);
314 void rtw_seccalctkipmic23a(u8 *key, u8 *header, u8 *data, u32 data_len,
315 u8 *Miccode, u8 priorityi);
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmsmac/phy/
H A Dphy_lcn.h24 u8 lcnphy_full_cal_channel;
25 u8 lcnphy_cal_counter;
29 u8 lcnphy_rc_cap;
32 u8 lcnphy_tr_isolation_mid;
33 u8 lcnphy_tr_isolation_low;
34 u8 lcnphy_tr_isolation_hi;
36 u8 lcnphy_bx_arch;
37 u8 lcnphy_rx_power_offset;
38 u8 lcnphy_rssi_vf;
39 u8 lcnphy_rssi_vc;
40 u8 lcnphy_rssi_gs;
41 u8 lcnphy_tssi_val;
42 u8 lcnphy_rssi_vf_lowtemp;
43 u8 lcnphy_rssi_vc_lowtemp;
44 u8 lcnphy_rssi_gs_lowtemp;
46 u8 lcnphy_rssi_vf_hightemp;
47 u8 lcnphy_rssi_vc_hightemp;
48 u8 lcnphy_rssi_gs_hightemp;
55 u8 lcnphy_measPower;
56 u8 lcnphy_tempsense_slope;
57 u8 lcnphy_freqoffset_corr;
58 u8 lcnphy_tempsense_option;
59 u8 lcnphy_tempcorrx;
88 u8 lcnphy_saved_tx_user_target[TXP_NUM_RATES];
89 u8 lcnphy_volt_winner;
90 u8 lcnphy_volt_low;
91 u8 lcnphy_54_48_36_24mbps_backoff;
92 u8 lcnphy_11n_backoff;
93 u8 lcnphy_lowerofdm;
94 u8 lcnphy_cck;
95 u8 lcnphy_psat_2pt3_detected;
105 u8 lcnphy_psat_pwr;
106 u8 lcnphy_psat_indx;
108 u8 lcnphy_final_idx;
109 u8 lcnphy_start_idx;
110 u8 lcnphy_current_index;
117 u8 lcnphy_aci_stat;
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
H A Dmxms.h6 u8 outp_type;
7 u8 conn_type;
8 u8 ddc_port;
9 u8 dig_conn;
12 void mxms_output_device(struct nvkm_mxm *, u8 *, struct mxms_odev *);
20 bool mxms_foreach(struct nvkm_mxm *, u8,
21 bool (*)(struct nvkm_mxm *, u8 *, void *), void *);
/linux-4.1.27/drivers/staging/rtl8192u/ieee80211/
H A Drtl819x_Qos.h80 u8 charData[2];
85 u8 UP:3;
86 u8 usRsvd1:1;
87 u8 EOSP:1;
88 u8 AckPolicy:2;
89 u8 usRsvd2:1;
90 u8 ucRsvdByte;
95 u8 TID:4;
96 u8 bIsQsize:1;// 0: BIT[8:15] is TXOP Duration Requested, 1: BIT[8:15] is Queue Size.
97 u8 AckPolicy:2;
98 u8 usRsvd:1;
99 u8 TxopOrQsize; // (BIT4=0)TXOP Duration Requested or (BIT4=1)Queue Size.
104 u8 TID:4;
105 u8 EOSP:1;
106 u8 AckPolicy:2;
107 u8 usRsvd:1;
108 u8 PSBufState; // QAP PS Buffer State.
113 u8 TID:4;
114 u8 EOSP:1;
115 u8 AckPolicy:2;
116 u8 usRsvd:1;
117 u8 TxopLimit; // TXOP Limit.
130 u8 charData;
133 u8 ucParameterSetCount:4;
134 u8 ucReserved:4;
139 u8 ucAC_VO_UAPSD:1;
140 u8 ucAC_VI_UAPSD:1;
141 u8 ucAC_BE_UAPSD:1;
142 u8 ucAC_BK_UAPSD:1;
143 u8 ucReserved1:1;
144 u8 ucMaxSPLen:2;
145 u8 ucReserved2:1;
151 u8 ucParameterSetCount:4;
152 u8 ucReserved:3;
153 u8 ucApUapsd:1;
157 u8 ucAC3_UAPSD:1;
158 u8 ucAC2_UAPSD:1;
159 u8 ucAC1_UAPSD:1;
160 u8 ucAC0_UAPSD:1;
161 u8 ucQAck:1;
162 u8 ucMaxSPLen:2;
163 u8 ucMoreDataAck:1;
167 u8 ucParameterSetCount:4;
168 u8 ucQAck:1;
169 u8 ucQueueReq:1;
170 u8 ucTXOPReq:1;
171 u8 ucReserved:1;
175 u8 ucReserved1:4;
176 u8 ucQAck:1;
177 u8 ucReserved2:2;
178 u8 ucMoreDataAck:1;
182 u8 ucReserved1:4;
183 u8 ucQAck:1;
184 u8 ucQueueReq:1;
185 u8 ucTXOPReq:1;
186 u8 ucReserved2:1;
190 u8 ucAC3_UAPSD:1;
191 u8 ucAC2_UAPSD:1;
192 u8 ucAC1_UAPSD:1;
193 u8 ucAC0_UAPSD:1;
194 u8 ucQAck:1;
195 u8 ucMaxSPLen:2;
196 u8 ucMoreDataAck:1;
200 u8 ucParameterSetCount:4;
201 u8 ucQAck:1;
202 u8 ucQueueReq:1;
203 u8 ucTXOPReq:1;
204 u8 ucApUapsd:1;
234 u8 charData;
237 u8 AIFSN:4;
238 u8 ACM:1;
239 u8 ACI:2;
240 u8 Reserved:1;
249 u8 charData;
251 u8 ECWmin:4;
252 u8 ECWmax:4;
262 u8 charData[4];
301 u8 charData[3];
303 u8 ucTrafficType:1; //WMM is reserved
304 u8 ucTSID:4;
305 u8 ucDirection:2;
306 u8 ucAccessPolicy:2; //WMM: bit8=0, bit7=1
307 u8 ucAggregation:1; //WMM is reserved
308 u8 ucPSB:1; //WMMSA is APSD
309 u8 ucUP:3;
310 u8 ucTSInfoAckPolicy:2; //WMM is reserved
311 u8 ucSchedule:1; //WMM is reserved
312 u8 ucReserved:7;
321 u8 charData[55];
324 QOS_TSINFO TSInfo; //u8 TSInfo[3];
349 u8 ID;
350 u8 Length;
351 u8 OUI[3];
352 u8 OUI_Type;
353 u8 OUI_SubType;
354 u8 Version;
370 // u8 RegEnableACM;
373 u8 HwAcmCtl; // TRUE: UsedTime exceed => Do NOT USE this AC. It wll be written to ACM_CONTROL(0xBF BIT 0/1/2 in 8185B).
376 typedef u8 AC_UAPSD, *PAC_UAPSD;
397 u8 Priority;
398 u8 ClassifierType;
399 u8 Mask;
403 u8 Priority;
404 u8 ClassifierType;
405 u8 Mask;
406 u8 SrcAddr[6];
407 u8 DstAddr[6];
412 u8 Priority;
413 u8 ClassifierType;
414 u8 Mask;
415 u8 Version;
416 u8 SrcIP[4];
417 u8 DstIP[4];
420 u8 DSCP;
421 u8 Protocol;
422 u8 Reserved;
426 u8 Priority;
427 u8 ClassifierType;
428 u8 Mask;
429 u8 Version;
430 u8 SrcIP[16];
431 u8 DstIP[16];
434 u8 FlowLabel[3];
438 u8 Priority;
439 u8 ClassifierType;
440 u8 Mask;
451 u8 AC;
466 // u8 bTriggerEnable[4];
467 // u8 MaxSPLength;
468 // u8 HighestBufAC;
475 u8 *Octet;
485 u8 WMMIEBuf[MAX_WMMELE_LENGTH];
486 u8 *WMMIE;
496 u8 bInServicePeriod;
497 u8 MaxSPLength;
501 u8 *pWMMInfoEle;
502 u8 WMMParamEle[WMM_PARAM_ELEMENT_SIZE];
503 u8 WMMPELength;
525 u8 bNoAck;
528 u8 bEnableRxImmBA;
539 u8 bdWMMIEBuf[MAX_WMMELE_LENGTH];
540 u8 *bdWMMIE;
544 u8 *pWMMInfoEle;
545 u8 *pWMMParamEle;
H A Drtl819x_HT.h91 u8 CharData[2];
111 u8 ShortData;
112 u8 CharData[1];
115 u8 MaxRxAMPDU:2;
116 u8 MPDUDensity:2;
117 u8 Rsvd:4;
147 u8 AdvCoding:1;
148 u8 ChlWidth:1;
149 u8 MimoPwrSave:2;
150 u8 GreenField:1;
151 u8 ShortGI20Mhz:1;
152 u8 ShortGI40Mhz:1;
153 u8 TxSTBC:1;
154 u8 RxSTBC:2;
155 u8 DelayBA:1;
156 u8 MaxAMSDUSize:1;
157 u8 DssCCk:1;
158 u8 PSMP:1;
159 u8 Rsvd1:1;
160 u8 LSigTxopProtect:1;
163 u8 MaxRxAMPDUFactor:2;
164 u8 MPDUDensity:3;
165 u8 Rsvd2:3;
168 u8 MCS[16];
175 u8 TxBFCap[4];
178 u8 ASCap;
188 u8 ControlChl;
190 u8 ExtChlOffset:2;
191 u8 RecommemdedTxWidth:1;
192 u8 RIFS:1;
193 u8 PSMPAccessOnly:1;
194 u8 SrvIntGranularity:3;
196 u8 OptMode:2;
197 u8 NonGFDevPresent:1;
198 u8 Revd1:5;
199 u8 Revd2:8;
201 u8 Rsvd3:6;
202 u8 DualBeacon:1;
203 u8 DualCTSProtect:1;
205 u8 SecondaryBeacon:1;
206 u8 LSigTxopProtectFull:1;
207 u8 PcoActive:1;
208 u8 PcoPhase:1;
209 u8 Rsvd4:4;
211 u8 BasicMSC[16];
219 u8 MimoPsEnable:1;
220 u8 MimoPsMode:1;
221 u8 Reserved:6;
242 u8 bEnableHT;
243 u8 bCurrentHTSupport;
245 u8 bRegBW40MHz; // Tx 40MHz channel capability
246 u8 bCurBW40MHz; // Tx 40MHz channel capability
248 u8 bRegShortGI40MHz; // Tx Short GI for 40Mhz
249 u8 bCurShortGI40MHz; // Tx Short GI for 40MHz
251 u8 bRegShortGI20MHz; // Tx Short GI for 20MHz
252 u8 bCurShortGI20MHz; // Tx Short GI for 20MHz
254 u8 bRegSuppCCK; // Tx CCK rate capability
255 u8 bCurSuppCCK; // Tx CCK rate capability
266 u8 PeerHTCapBuf[32];
267 u8 PeerHTInfoBuf[32];
271 u8 bAMSDU_Support; // This indicates Tx A-MSDU capability
273 u8 bCurrent_AMSDU_Support; // This indicates Tx A-MSDU capability
278 u8 bAMPDUEnable; // This indicate Tx A-MPDU capability
279 u8 bCurrentAMPDUEnable; // This indicate Tx A-MPDU capability
280 u8 AMPDU_Factor; // This indicate Tx A-MPDU capability
281 u8 CurrentAMPDUFactor; // This indicate Tx A-MPDU capability
282 u8 MPDU_Density; // This indicate Tx A-MPDU capability
283 u8 CurrentMPDUDensity; // This indicate Tx A-MPDU capability
287 u8 ForcedAMPDUFactor;
288 u8 ForcedMPDUDensity;
294 u8 bForcedShortGI;
296 u8 CurrentOpMode;
299 u8 SelfMimoPs;
300 u8 PeerMimoPs;
304 u8 bCurTxBW40MHz; // If we use 40 MHz to Tx
305 u8 PeerBandwidth;
308 u8 bSwBwInProgress;
310 u8 SwBwStep;
314 u8 bRegRT2RTAggregation;
315 u8 bCurrentRT2RTAggregation;
316 u8 bCurrentRT2RTLongSlotTime;
317 u8 szRT2RTAggBuffer[10];
320 u8 bRegRxReorderEnable;
321 u8 bCurRxReorderEnable;
322 u8 RxReorderWinSize;
323 u8 RxReorderPendingTime;
327 u8 UsbTxAggrNum;
330 u8 UsbRxFwAggrEn;
331 u8 UsbRxFwAggrPageNum;
332 u8 UsbRxFwAggrPacketNum;
333 u8 UsbRxFwAggrTimeout;
337 u8 bIsPeerBcm;
340 u8 IOTPeer;
351 u8 bEnableHT;
353 u8 bSupportCck;
357 u8 AMPDU_Factor;
358 u8 MPDU_Density;
360 u8 HTHighestOperaRate;
362 u8 bBw40MHz;
364 u8 MimoPs;
366 u8 McsRateSet[16];
382 u8 bdSupportHT;
385 u8 bdHTCapBuf[32];
387 u8 bdHTInfoBuf[32];
394 u8 bdRT2RTAggregation;
395 u8 bdRT2RTLongSlotTime;
420 extern u8 MCS_FILTER_ALL[16];
421 extern u8 MCS_FILTER_1SS[16];
H A Drtl819x_TS.h21 u8 Addr[6];
24 u8 TClasProc;
25 u8 TClasNum;
34 u8 bAddBaReqInProgress;
35 u8 bAddBaReqDelayed;
36 u8 bUsingBa;
38 u8 num;
49 u8 RxLastFragNum;
50 u8 num;
/linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_cmdpkt.h34 u8 element_id;
35 u8 length;
36 u8 TID:4;
37 u8 fail_reason:3;
38 u8 tok:1;
39 u8 reserve1:4;
40 u8 pkt_type:2;
41 u8 bandwidth:1;
42 u8 qos_pkt:1;
44 u8 reserve2;
45 u8 retry_cnt;
49 u8 s_rate;
50 u8 f_rate;
52 u8 s_rts_rate;
53 u8 f_rts_rate;
61 u8 element_id;
62 u8 length;
69 u8 element_id;
70 u8 length;
72 u8 cfg_reserve1:3;
73 u8 cfg_size:2;
74 u8 cfg_type:2;
75 u8 cfg_action:1;
76 u8 cfg_reserve2;
77 u8 cfg_page:4;
78 u8 cfg_reserve3:4;
79 u8 cfg_offset;
88 u8 length;
89 u8 element_id;
111 u8 reserve3_1;
112 u8 rate;
117 u8 length;
118 u8 element_id;
124 u8 element_id;
125 u8 length;
155 u8 *codevirtualaddress, u32 packettype,
H A Dr8190P_def.h182 u8 TxRate:7;
183 u8 CtsEnable:1;
184 u8 RtsRate:7;
185 u8 RtsEnable:1;
186 u8 TxHT:1;
187 u8 Short:1;
188 u8 TxBandwidth:1;
189 u8 TxSubCarrier:2;
190 u8 STBC:2;
191 u8 AllowAggregation:1;
192 u8 RtsHT:1;
193 u8 RtsShort:1;
194 u8 RtsBandwidth:1;
195 u8 RtsSubcarrier:2;
196 u8 RtsSTBC:2;
197 u8 EnableCPUDur:1;
209 u8 TxRate:7;
210 u8 CtsEnable:1;
211 u8 RtsRate:7;
212 u8 RtsEnable:1;
213 u8 TxHT:1;
214 u8 Short:1;
215 u8 TxBandwidth:1;
216 u8 TxSubCarrier:2;
217 u8 STBC:2;
218 u8 AllowAggregation:1;
219 u8 RtsHT:1;
220 u8 RtsShort:1;
221 u8 RtsBandwidth:1;
222 u8 RtsSubcarrier:2;
223 u8 RtsSTBC:2;
224 u8 EnableCPUDur:1;
273 u8 reserved:4;
274 u8 rxsc:2;
275 u8 sgi_en:1;
276 u8 ex_intf_flag:1;
280 u8 trsw_gain_X[4];
281 u8 pwdb_all;
282 u8 cfosho_X[4];
283 u8 cfotail_X[4];
284 u8 rxevm_X[2];
285 u8 rxsnr_X[4];
286 u8 pdsnr_X[2];
287 u8 csi_current_X[2];
288 u8 csi_target_X[2];
289 u8 sigevm;
290 u8 max_ex_pwr;
291 u8 sgi_en;
292 u8 rxsc_sgien_exflg;
296 u8 adc_pwdb_X[4];
297 u8 sq_rpt;
298 u8 cck_agc_rpt;
307 u8 Offset;
308 u8 Reserved1:3;
309 u8 CmdInit:1;
310 u8 LastSeg:1;
311 u8 FirstSeg:1;
312 u8 LINIP:1;
313 u8 OWN:1;
315 u8 TxFWInfoSize;
316 u8 RATid:3;
317 u8 DISFB:1;
318 u8 USERATE:1;
319 u8 MOREFRAG:1;
320 u8 NoEnc:1;
321 u8 PIFS:1;
322 u8 QueueSelect:5;
323 u8 NoACM:1;
324 u8 Resv:2;
325 u8 SecCAMID:5;
326 u8 SecDescAssign:1;
327 u8 SecType:2;
330 u8 PktId:7;
331 u8 Resv1:1;
332 u8 Reserved2;
346 u8 Reserved1;
347 u8 CmdType:3;
348 u8 CmdInit:1;
349 u8 LastSeg:1;
350 u8 FirstSeg:1;
351 u8 LINIP:1;
352 u8 OWN:1;
371 u8 RxDrvInfoSize;
372 u8 Shift:2;
373 u8 PHYStatus:1;
374 u8 SWDec:1;
375 u8 LastSeg:1;
376 u8 FirstSeg:1;
377 u8 EOR:1;
378 u8 OWN:1;
395 u8 RxRate:7;
396 u8 RxHT:1;
398 u8 BW:1;
399 u8 SPLCP:1;
400 u8 Reserved3:2;
401 u8 PAM:1;
402 u8 Mcast:1;
403 u8 Bcast:1;
404 u8 Reserved4:1;
H A Drtl_core.h417 u8 last_packet_rate;
426 u8 rx_rssi_percentage[4];
427 u8 rx_evm_percentage[2];
460 u8 ccktxbb_valuearray[8];
464 u8 xaagccore1;
465 u8 xbagccore1;
466 u8 xcagccore1;
467 u8 xdagccore1;
468 u8 cca;
474 u8 nStuckCount;
610 u8 (*rf_set_chan)(struct net_device *dev, u8 ch);
625 u8 AcmControl;
626 u8 RFProgType;
627 u8 retry_data;
628 u8 retry_rts;
640 u8 RegCWinMin;
641 u8 keepAliveLevel;
647 u8 polling_timer_on;
658 u8 bIbssCoordinator;
670 u8 ScanDelay;
675 u8 Rf_Mode;
677 u8 card_8192_version;
681 u8 rf_type;
682 u8 IC_Cut;
685 u8 RegBcnCtrlVal;
693 u8 check_roaming_cnt;
701 u8 hwscan_bw_40;
704 u8 nrxAMPDU_aggr_num;
710 u8 short_preamble;
711 u8 dot11CurrentPreambleMode;
712 u8 slot_time;
715 u8 RegWirelessMode;
717 u8 firmware_version;
722 u8 RegPciASPM;
723 u8 RegAMDPciASPM;
724 u8 RegHwSwRfOffD3;
725 u8 RegSupportPciASPM;
730 u8 ShowRateMode;
731 u8 RATRTableBitmap;
733 u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
735 u8 EfuseUsedPercentage;
742 u8 eeprom_CustomerID;
744 u8 eeprom_version;
746 u8 EEPROMRegulatory;
747 u8 EEPROMPwrGroup[2][3];
748 u8 EEPROMOptional;
750 u8 EEPROMTxPowerLevelCCK[14];
751 u8 EEPROMTxPowerLevelOFDM24G[14];
752 u8 EEPROMTxPowerLevelOFDM5G[24];
753 u8 EEPROMRfACCKChnl1TxPwLevel[3];
754 u8 EEPROMRfAOfdmChnlTxPwLevel[3];
755 u8 EEPROMRfCCCKChnl1TxPwLevel[3];
756 u8 EEPROMRfCOfdmChnlTxPwLevel[3];
759 u8 EEPROMThermalMeter;
760 u8 EEPROMPwDiff;
761 u8 EEPROMCrystalCap;
763 u8 EEPROMBluetoothCoexist;
764 u8 EEPROMBluetoothType;
765 u8 EEPROMBluetoothAntNum;
766 u8 EEPROMBluetoothAntIsolation;
767 u8 EEPROMBluetoothRadioShared;
770 u8 EEPROMSupportWoWLAN;
771 u8 EEPROMBoardType;
772 u8 EEPROM_Def_Ver;
773 u8 EEPROMHT2T_TxPwr[6];
774 u8 EEPROMTSSI_A;
775 u8 EEPROMTSSI_B;
776 u8 EEPROMTxPowerLevelCCK_V1[3];
777 u8 EEPROMLegacyHTTxPowerDiff;
779 u8 BluetoothCoexist;
781 u8 CrystalCap;
782 u8 ThermalMeter[2];
787 u8 SwChnlInProgress;
788 u8 SwChnlStage;
789 u8 SwChnlStep;
790 u8 SetBWModeInProgress;
792 u8 nCur40MhzPrimeSC;
795 u8 NumTotalRFPath;
807 u8 bHwRfOffAction;
811 u8 RegHostPciASPMSetting;
812 u8 RegDevicePciASPMSetting;
818 u8 pwrGroupCnt;
820 u8 ThermalValue_LCK;
821 u8 ThermalValue_IQK;
839 u8 CurrentFwCmdIO;
841 u8 rssi_level;
844 u8 PwrGroupHT20[2][14];
845 u8 PwrGroupHT40[2][14];
847 u8 ThermalValue;
850 u8 DynamicTxHighPowerLvl;
851 u8 LastDTPLvl;
855 u8 DMFlag;
856 u8 DM_Type;
858 u8 CckPwEnl;
861 u8 CCKPresentAttentuation_20Mdefault;
862 u8 CCKPresentAttentuation_40Mdefault;
865 u8 bCckHighPower;
871 u8 TxPowerLevelCCK[14];
872 u8 TxPowerLevelCCK_A[14];
873 u8 TxPowerLevelCCK_C[14];
874 u8 TxPowerLevelOFDM24G[14];
875 u8 TxPowerLevelOFDM5G[14];
876 u8 TxPowerLevelOFDM24G_A[14];
877 u8 TxPowerLevelOFDM24G_C[14];
878 u8 LegacyHTTxPowerDiff;
879 u8 TxPowerDiff;
882 u8 RfTxPwrLevelCck[2][14];
883 u8 RfTxPwrLevelOfdm1T[2][14];
884 u8 RfTxPwrLevelOfdm2T[2][14];
885 u8 AntennaTxPwDiff[3];
886 u8 TxPwrHt20Diff[2][14];
887 u8 TxPwrLegacyHtDiff[2][14];
888 u8 TxPwrSafetyFlag;
889 u8 HT2T_TxPwr_A[14];
890 u8 HT2T_TxPwr_B[14];
891 u8 CurrentCckTxPwrIdx;
892 u8 CurrentOfdm24GTxPwrIdx;
903 u8 rfa_txpowertrackingindex;
904 u8 rfa_txpowertrackingindex_real;
905 u8 rfa_txpowertracking_default;
906 u8 rfc_txpowertrackingindex;
907 u8 rfc_txpowertrackingindex_real;
908 u8 rfc_txpowertracking_default;
912 u8 TxPowerTrackControl;
913 u8 txpower_count;
916 u8 OFDM_index[2];
917 u8 CCK_index;
919 u8 Record_CCK_20Mindex;
920 u8 Record_CCK_40Mindex;
923 u8 DefaultInitialGain[4];
930 u8 MidHighPwrTHR_L1;
931 u8 MidHighPwrTHR_L2;
938 u8 framesync;
940 u8 framesyncMonitor;
952 u8 thermal_read_val[40];
953 u8 thermal_readback_index;
966 u8 InitialGainOperateType;
974 u8 RegPaModel;
975 u8 btMpCckTxPower;
976 u8 btMpOfdmTxPower;
985 u8 MptChannelToSw;
988 u8 PwrDomainProtect;
989 u8 H2CTxCmdSeq;
999 u8 read_nic_io_byte(struct net_device *dev, int x);
1002 void write_nic_io_byte(struct net_device *dev, int x, u8 y);
1006 u8 read_nic_byte(struct net_device *dev, int x);
1009 void write_nic_byte(struct net_device *dev, int x, u8 y);
1048 void rtl8192_SetWirelessMode(struct net_device *dev, u8 wireless_mode);
1056 long rtl819x_translate_todbm(struct r8192_priv *priv, u8 signal_strength_index);
1059 u8 rtl819x_evm_dbtopercentage(char value);
1062 u8 rtl819x_query_rxpwrpercentage(char antpower);
/linux-4.1.27/drivers/net/wireless/ath/ath9k/
H A Deeprom.h275 u8 opCapFlags;
276 u8 eepMisc;
278 u8 macAddr[6];
279 u8 rxMask;
280 u8 txMask;
285 u8 deviceType;
286 u8 pwdclkind;
287 u8 fastClk5g;
288 u8 divChain;
289 u8 rxGainType;
290 u8 dacHiPwrMode_5G;
291 u8 openLoopPwrCntl;
292 u8 dacLpMode;
293 u8 txGainType;
294 u8 rcChainMask;
295 u8 desiredScaleCCK;
296 u8 pwr_table_offset;
297 u8 frac_n_5g;
298 u8 futureBase_3[21];
305 u8 opCapFlags;
306 u8 eepMisc;
308 u8 macAddr[6];
309 u8 rxMask;
310 u8 txMask;
315 u8 deviceType;
316 u8 txGainType;
322 u8 spurRangeLow;
323 u8 spurRangeHigh;
329 u8 antennaGainCh[AR5416_MAX_CHAINS];
330 u8 switchSettling;
331 u8 txRxAttenCh[AR5416_MAX_CHAINS];
332 u8 rxTxMarginCh[AR5416_MAX_CHAINS];
333 u8 adcDesiredSize;
334 u8 pgaDesiredSize;
335 u8 xlnaGainCh[AR5416_MAX_CHAINS];
336 u8 txEndToXpaOff;
337 u8 txEndToRxOn;
338 u8 txFrameToXpaOn;
339 u8 thresh62;
340 u8 noiseFloorThreshCh[AR5416_MAX_CHAINS];
341 u8 xpdGain;
342 u8 xpd;
343 u8 iqCalICh[AR5416_MAX_CHAINS];
344 u8 iqCalQCh[AR5416_MAX_CHAINS];
345 u8 pdGainOverlap;
346 u8 ob;
347 u8 db;
348 u8 xpaBiasLvl;
349 u8 pwrDecreaseFor2Chain;
350 u8 pwrDecreaseFor3Chain;
351 u8 txFrameToDataStart;
352 u8 txFrameToPaOn;
353 u8 ht40PowerIncForPdadc;
354 u8 bswAtten[AR5416_MAX_CHAINS];
355 u8 bswMargin[AR5416_MAX_CHAINS];
356 u8 swSettleHt40;
357 u8 xatten2Db[AR5416_MAX_CHAINS];
358 u8 xatten2Margin[AR5416_MAX_CHAINS];
359 u8 ob_ch1;
360 u8 db_ch1;
361 u8 lna_ctl;
362 u8 miscBits;
364 u8 futureModal[6];
370 u8 pwrPdg[2][5];
371 u8 vpdPdg[2][5];
372 u8 pcdac[2][5];
373 u8 empty[2][5];
379 u8 antennaGainCh[AR5416_EEP4K_MAX_CHAINS];
380 u8 switchSettling;
381 u8 txRxAttenCh[AR5416_EEP4K_MAX_CHAINS];
382 u8 rxTxMarginCh[AR5416_EEP4K_MAX_CHAINS];
383 u8 adcDesiredSize;
384 u8 pgaDesiredSize;
385 u8 xlnaGainCh[AR5416_EEP4K_MAX_CHAINS];
386 u8 txEndToXpaOff;
387 u8 txEndToRxOn;
388 u8 txFrameToXpaOn;
389 u8 thresh62;
390 u8 noiseFloorThreshCh[AR5416_EEP4K_MAX_CHAINS];
391 u8 xpdGain;
392 u8 xpd;
393 u8 iqCalICh[AR5416_EEP4K_MAX_CHAINS];
394 u8 iqCalQCh[AR5416_EEP4K_MAX_CHAINS];
395 u8 pdGainOverlap;
397 u8 ob_1:4, ob_0:4;
398 u8 db1_1:4, db1_0:4;
400 u8 ob_0:4, ob_1:4;
401 u8 db1_0:4, db1_1:4;
403 u8 xpaBiasLvl;
404 u8 txFrameToDataStart;
405 u8 txFrameToPaOn;
406 u8 ht40PowerIncForPdadc;
407 u8 bswAtten[AR5416_EEP4K_MAX_CHAINS];
408 u8 bswMargin[AR5416_EEP4K_MAX_CHAINS];
409 u8 swSettleHt40;
410 u8 xatten2Db[AR5416_EEP4K_MAX_CHAINS];
411 u8 xatten2Margin[AR5416_EEP4K_MAX_CHAINS];
413 u8 db2_1:4, db2_0:4;
415 u8 db2_0:4, db2_1:4;
417 u8 version;
419 u8 ob_3:4, ob_2:4;
420 u8 antdiv_ctl1:4, ob_4:4;
421 u8 db1_3:4, db1_2:4;
422 u8 antdiv_ctl2:4, db1_4:4;
423 u8 db2_2:4, db2_3:4;
424 u8 reserved:4, db2_4:4;
426 u8 ob_2:4, ob_3:4;
427 u8 ob_4:4, antdiv_ctl1:4;
428 u8 db1_2:4, db1_3:4;
429 u8 db1_4:4, antdiv_ctl2:4;
430 u8 db2_2:4, db2_3:4;
431 u8 db2_4:4, reserved:4;
433 u8 tx_diversity;
434 u8 flc_pwr_thresh;
435 u8 bb_scale_smrt_antenna;
437 u8 futureModal[1];
445 u8 opCapFlags;
446 u8 eepMisc;
448 u8 macAddr[6];
449 u8 rxMask;
450 u8 txMask;
455 u8 deviceType;
456 u8 openLoopPwrCntl;
460 u8 futureBase[29];
467 u8 switchSettling;
468 u8 txRxAttenCh[AR9287_MAX_CHAINS];
469 u8 rxTxMarginCh[AR9287_MAX_CHAINS];
471 u8 txEndToXpaOff;
472 u8 txEndToRxOn;
473 u8 txFrameToXpaOn;
474 u8 thresh62;
476 u8 xpdGain;
477 u8 xpd;
480 u8 pdGainOverlap;
481 u8 xpaBiasLvl;
482 u8 txFrameToDataStart;
483 u8 txFrameToPaOn;
484 u8 ht40PowerIncForPdadc;
485 u8 bswAtten[AR9287_MAX_CHAINS];
486 u8 bswMargin[AR9287_MAX_CHAINS];
487 u8 swSettleHt40;
488 u8 version;
489 u8 db1;
490 u8 db2;
491 u8 ob_cck;
492 u8 ob_psk;
493 u8 ob_qam;
494 u8 ob_pal_off;
495 u8 futureModal[30];
500 u8 pwrPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
501 u8 vpdPdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
505 u8 pwrPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
506 u8 vpdPdg[AR5416_EEP4K_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
510 u8 bChannel;
511 u8 tPow2x[4];
515 u8 bChannel;
516 u8 tPow2x[8];
520 u8 bChannel;
521 u8 ctl;
525 u8 pwrPdg[2][5];
526 u8 vpdPdg[2][5];
527 u8 pcdac[2][5];
528 u8 empty[2][5];
532 u8 pwrPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
533 u8 vpdPdg[AR5416_NUM_PD_GAINS][AR9287_PD_GAIN_ICEPTS];
558 u8 custData[64];
560 u8 calFreqPier5G[AR5416_NUM_5G_CAL_PIERS];
561 u8 calFreqPier2G[AR5416_NUM_2G_CAL_PIERS];
580 u8 ctlIndex[AR5416_NUM_CTLS];
582 u8 padding;
587 u8 custData[20];
589 u8 calFreqPier2G[AR5416_EEP4K_NUM_2G_CAL_PIERS];
600 u8 ctlIndex[AR5416_EEP4K_NUM_CTLS];
602 u8 padding;
607 u8 custData[AR9287_DATA_SZ];
609 u8 calFreqPier2G[AR9287_NUM_2G_CAL_PIERS];
620 u8 ctlIndex[AR9287_NUM_CTLS];
622 u8 padding;
638 u8 isMultidomain;
639 u8 iso[3];
646 u32 (*dump_eeprom)(struct ath_hw *hw, bool dump_base_hdr, u8 *buf,
653 u16 cfgCtl, u8 twiceAntennaReduction,
654 u8 powerLimit, bool test);
664 bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
669 void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
670 u8 *pVpdList, u16 numIntercepts,
671 u8 *pRetVpdList);
687 u8 antenna_reduction);
694 u8 *bChans, u16 availPiers,
696 u16 *pPdGainBoundaries, u8 *pPDADCValues,
699 static inline u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz) ath9k_hw_fbin2freq()
H A Dar9003_eeprom.h157 u8 opFlags;
158 u8 eepMisc;
175 u8 txrxMask;
177 u8 rfSilent;
178 u8 blueToothOptions;
179 u8 deviceCap;
181 u8 deviceType;
186 u8 params_for_tuning_caps[2];
194 u8 featureEnable;
196 u8 miscConfiguration;
197 u8 eepromWriteEnableGpio;
198 u8 wlanDisableGpio;
199 u8 wlanLedGpio;
200 u8 rxBandSelectGpio;
201 u8 txrxgain;
214 u8 xatten1DB[AR9300_MAX_CHAINS];
216 u8 xatten1Margin[AR9300_MAX_CHAINS];
220 u8 spurChans[AR_EEPROM_MODAL_SPURS];
223 u8 reserved[11];
225 u8 xpaBiasLvl;
226 u8 txFrameToDataStart;
227 u8 txFrameToPaOn;
228 u8 txClip;
230 u8 switchSettling;
232 u8 txEndToXpaOff;
233 u8 txEndToRxOn;
234 u8 txFrameToXpaOn;
235 u8 thresh62;
239 u8 xlna_bias_strength;
240 u8 futureModal[7];
246 u8 voltMeas;
248 u8 tempMeas;
254 u8 rxTempMeas;
258 u8 tPow2x[4];
262 u8 tPow2x[14];
266 u8 ctlEdges[AR9300_NUM_BAND_EDGES_2G];
270 u8 ctlEdges[AR9300_NUM_BAND_EDGES_5G];
276 u8 ant_div_control;
277 u8 future[MAX_BASE_EXTENSION_FUTURE];
285 u8 misc_enable;
294 u8 xatten1DBLow[AR9300_MAX_CHAINS];
295 u8 xatten1MarginLow[AR9300_MAX_CHAINS];
296 u8 xatten1DBHigh[AR9300_MAX_CHAINS];
297 u8 xatten1MarginHigh[AR9300_MAX_CHAINS];
301 u8 eepromVersion;
302 u8 templateVersion;
303 u8 macAddr[6];
304 u8 custData[AR9300_CUSTOMER_DATA_SIZE];
310 u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS];
313 u8 calTarget_freqbin_Cck[AR9300_NUM_2G_CCK_TARGET_POWERS];
314 u8 calTarget_freqbin_2G[AR9300_NUM_2G_20_TARGET_POWERS];
315 u8 calTarget_freqbin_2GHT20[AR9300_NUM_2G_20_TARGET_POWERS];
316 u8 calTarget_freqbin_2GHT40[AR9300_NUM_2G_40_TARGET_POWERS];
325 u8 ctlIndex_2G[AR9300_NUM_CTLS_2G];
326 u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G];
330 u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS];
333 u8 calTarget_freqbin_5G[AR9300_NUM_5G_20_TARGET_POWERS];
334 u8 calTarget_freqbin_5GHT20[AR9300_NUM_5G_20_TARGET_POWERS];
335 u8 calTarget_freqbin_5GHT40[AR9300_NUM_5G_40_TARGET_POWERS];
342 u8 ctlIndex_5G[AR9300_NUM_CTLS_5G];
343 u8 ctl_freqbin_5G[AR9300_NUM_CTLS_5G][AR9300_NUM_BAND_EDGES_5G];
352 u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz);
/linux-4.1.27/drivers/net/wireless/
H A Dat76c50x-usb.h93 u8 cr39_values[14];
94 u8 reserved1[14];
95 u8 bb_cr[14];
96 u8 pidvid[4];
97 u8 mac_addr[ETH_ALEN];
98 u8 regulatory_domain;
99 u8 reserved2[14];
100 u8 cr15_values[14];
101 u8 reserved3[3];
105 u8 cr20_values[14];
106 u8 cr21_values[14];
107 u8 bb_cr[14];
108 u8 pidvid[4];
109 u8 mac_addr[ETH_ALEN];
110 u8 regulatory_domain;
111 u8 low_power_values[14];
112 u8 normal_power_values[14];
113 u8 reserved1[3];
117 u8 mac_addr[ETH_ALEN];
118 u8 cr31_values[14];
119 u8 cr58_values[14];
120 u8 pidvid[4];
121 u8 regulatory_domain;
122 u8 reserved[1];
136 u8 exclude_unencrypted;
137 u8 promiscuous_mode;
138 u8 short_retry_limit;
139 u8 encryption_type;
142 u8 basic_rate_set[4];
143 u8 auto_rate_fallback; /* 0,1 */
144 u8 channel;
145 u8 privacy_invoked;
146 u8 wep_default_key_id; /* 0..3 */
147 u8 current_ssid[32];
148 u8 wep_default_key_value[4][WEP_LARGE_KEY_LEN];
149 u8 ssid_len;
150 u8 short_preamble;
155 u8 cmd;
156 u8 reserved;
158 u8 data[0];
166 u8 rx_rate;
167 u8 newbss;
168 u8 fragmentation;
169 u8 rssi;
170 u8 link_quality;
171 u8 noise_level;
173 u8 packet[IEEE80211_MAX_FRAG_THRESHOLD];
181 u8 tx_rate;
182 u8 padding;
183 u8 reserved[4];
184 u8 packet[IEEE80211_MAX_FRAG_THRESHOLD];
192 u8 bssid[ETH_ALEN];
193 u8 essid[32];
194 u8 scan_type;
195 u8 channel;
199 u8 essid_size;
200 u8 international_scan;
204 u8 bssid[ETH_ALEN];
205 u8 essid[32];
206 u8 bss_type;
207 u8 channel;
208 u8 essid_size;
209 u8 reserved[3];
213 u8 bssid[ETH_ALEN];
214 u8 essid[32];
215 u8 bss_type;
216 u8 channel;
218 u8 essid_size;
219 u8 reserved;
224 u8 beacon_enable;
225 u8 txautorate_fallback;
226 u8 reserved1;
227 u8 ssid_size;
228 u8 promiscuous_mode;
230 u8 preamble_type;
235 u8 mac_addr[ETH_ALEN];
236 u8 res[2]; /* ??? */
237 u8 group_addr[4][ETH_ALEN];
238 u8 group_addr_status[4];
248 u8 short_retry_time;
249 u8 long_retry_time;
250 u8 scan_type; /* active or passive */
251 u8 scan_channel;
256 u8 desired_ssid[32];
257 u8 desired_bssid[ETH_ALEN];
258 u8 desired_bsstype; /* ad-hoc or infrastructure */
259 u8 reserved2;
268 u8 CFP_mode;
269 u8 privacy_option_implemented;
270 u8 DTIM_period;
271 u8 CFP_period;
272 u8 current_bssid[ETH_ALEN];
273 u8 current_essid[32];
274 u8 current_bss_type;
275 u8 power_mgmt_mode;
277 u8 ibss_change;
278 u8 res;
279 u8 multi_domain_capability_implemented;
280 u8 multi_domain_capability_enabled;
281 u8 country_string[IEEE80211_COUNTRY_STRING_LEN];
282 u8 reserved[3];
286 u8 privacy_invoked; /* 0 disable encr., 1 enable encr */
287 u8 wep_default_key_id;
288 u8 wep_key_mapping_len;
289 u8 exclude_unencrypted;
292 u8 wep_default_keyvalue[WEP_KEYS][WEP_LARGE_KEY_LEN];
293 u8 encryption_level; /* 1 for 40bit, 2 for 104bit encryption */
306 u8 operation_rate_set[4];
307 u8 channel_id;
308 u8 current_cca_mode;
309 u8 phy_type;
310 u8 current_reg_domain;
314 u8 major;
315 u8 minor;
316 u8 patch;
317 u8 build;
321 u8 tx_powerlevel[14];
322 u8 channel_list[14]; /* 0 for invalid channels */
326 u8 type;
327 u8 size;
328 u8 index;
329 u8 reserved;
331 u8 byte;
333 u8 addr[ETH_ALEN];
341 u8 build; /* firmware build number */
342 u8 patch; /* firmware patch level */
343 u8 minor; /* firmware minor version */
344 u8 major; /* firmware major version */
366 u8 *extfw; /* external firmware, extfw_size bytes long */
367 u8 *intfw; /* internal firmware, intfw_size bytes long */
399 u8 wep_keys[WEP_KEYS][WEP_LARGE_KEY_LEN]; /* WEP keys */
400 u8 wep_keys_len[WEP_KEYS]; /* length of WEP keys */
404 u8 bssid[ETH_ALEN];
405 u8 essid[IW_ESSID_MAX_SIZE];
425 u8 pm_mode; /* power management mode */
432 u8 mac_addr[ETH_ALEN];
433 u8 regulatory_domain;
H A Dwl3501.h230 u8 id; /* one of enum iw_mgmt_info_element_ids,
231 but sizeof(enum) > sizeof(u8) :-( */
232 u8 len;
233 u8 data[0];
238 u8 essid[IW_ESSID_MAX_SIZE];
249 u8 data_rate_labels[IW_DATA_RATE_MAX_LABELS];
254 u8 chan;
259 u8 cfp_count;
260 u8 cfp_period;
272 u8 sync[16];
274 u8 signal;
275 u8 service;
280 u8 addr1[ETH_ALEN];
281 u8 addr2[ETH_ALEN];
282 u8 addr3[ETH_ALEN];
284 u8 addr4[ETH_ALEN];
290 u8 rx_blk_ctrl;
291 u8 rx_next_frame;
292 u8 rx_next_frame1;
293 u8 rssi;
295 u8 signal;
296 u8 service;
301 u8 addr1[ETH_ALEN];
302 u8 addr2[ETH_ALEN];
303 u8 addr3[ETH_ALEN];
305 u8 addr4[ETH_ALEN];
310 u8 sig_id;
311 u8 bss_type;
326 u8 sig_id;
327 u8 reserved;
331 u8 mac_addr[ETH_ALEN];
336 u8 sig_id;
337 u8 reserved;
343 u8 sig_id;
344 u8 mac_addr[ETH_ALEN];
349 u8 sig_id;
350 u8 reserved;
353 u8 mac_addr[ETH_ALEN];
358 u8 sig_id;
359 u8 reserved;
362 u8 mac_addr[ETH_ALEN];
367 u8 sig_id;
368 u8 reserved;
374 u8 sig_id;
375 u8 reserved;
378 u8 mib_value[100];
383 u8 sig_id;
384 u8 reserved;
389 u8 timestamp[8];
390 u8 local_time[8];
394 u8 bss_type;
395 u8 bssid[ETH_ALEN];
405 u8 sig_id;
406 u8 reserved;
412 u8 sig_id;
413 u8 pwr_save;
414 u8 wake_up;
415 u8 receive_dtims;
420 u8 sig_id;
421 u8 reserved;
427 u8 sig_id;
428 u8 bss_type;
432 u8 chan_list[14];
433 u8 bssid[ETH_ALEN];
440 u8 sig_id;
441 u8 reserved;
448 u8 bss_type;
449 u8 bssid[ETH_ALEN];
455 u8 rssi;
460 u8 sig_id;
461 u8 reserved;
467 u8 sig_id;
468 u8 routing;
471 u8 pri;
472 u8 service_class;
473 u8 daddr[ETH_ALEN];
474 u8 saddr[ETH_ALEN];
479 u8 sig_id;
480 u8 routing;
483 u8 reception;
484 u8 pri;
485 u8 service_class;
486 u8 daddr[ETH_ALEN];
487 u8 saddr[ETH_ALEN];
492 u8 sig_id;
493 u8 reserved;
495 u8 status;
496 u8 pri;
497 u8 service_class;
502 u8 sig_id;
507 #define WL3501_NIC_GCR ((u8)0x00) /* SIR0 - General Conf Register */
508 #define WL3501_NIC_BSS ((u8)0x01) /* SIR1 - Bank Switching Select Reg */
509 #define WL3501_NIC_LMAL ((u8)0x02) /* SIR2 - Local Mem addr Reg [7:0] */
510 #define WL3501_NIC_LMAH ((u8)0x03) /* SIR3 - Local Mem addr Reg [14:8] */
511 #define WL3501_NIC_IODPA ((u8)0x04) /* SIR4 - I/O Data Port A */
512 #define WL3501_NIC_IODPB ((u8)0x05) /* SIR5 - I/O Data Port B */
513 #define WL3501_NIC_IODPC ((u8)0x06) /* SIR6 - I/O Data Port C */
514 #define WL3501_NIC_IODPD ((u8)0x07) /* SIR7 - I/O Data Port D */
517 #define WL3501_GCR_SWRESET ((u8)0x80)
518 #define WL3501_GCR_CORESET ((u8)0x40)
519 #define WL3501_GCR_DISPWDN ((u8)0x20)
520 #define WL3501_GCR_ECWAIT ((u8)0x10)
521 #define WL3501_GCR_ECINT ((u8)0x08)
522 #define WL3501_GCR_INT2EC ((u8)0x04)
523 #define WL3501_GCR_ENECINT ((u8)0x02)
524 #define WL3501_GCR_DAM ((u8)0x01)
527 #define WL3501_BSS_FPAGE0 ((u8)0x20) /* Flash memory page0 */
528 #define WL3501_BSS_FPAGE1 ((u8)0x28)
529 #define WL3501_BSS_FPAGE2 ((u8)0x30)
530 #define WL3501_BSS_FPAGE3 ((u8)0x38)
531 #define WL3501_BSS_SPAGE0 ((u8)0x00) /* SRAM page0 */
532 #define WL3501_BSS_SPAGE1 ((u8)0x08)
533 #define WL3501_BSS_SPAGE2 ((u8)0x10)
534 #define WL3501_BSS_SPAGE3 ((u8)0x18)
541 u8 sync[16];
543 u8 signal;
544 u8 service;
576 u8 mac_addr[ETH_ALEN];
594 u8 bssid[ETH_ALEN];
599 u8 chan;
600 u8 cap_info;
604 u8 rssi;
605 u8 adhoc_times;
606 u8 reg_domain;
607 u8 version[2];
/linux-4.1.27/arch/x86/include/asm/crypto/
H A Daes.h7 void crypto_aes_encrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst,
8 const u8 *src);
9 void crypto_aes_decrypt_x86(struct crypto_aes_ctx *ctx, u8 *dst,
10 const u8 *src);
H A Dserpent-sse2.h11 asmlinkage void __serpent_enc_blk_4way(struct serpent_ctx *ctx, u8 *dst,
12 const u8 *src, bool xor);
13 asmlinkage void serpent_dec_blk_4way(struct serpent_ctx *ctx, u8 *dst,
14 const u8 *src);
16 static inline void serpent_enc_blk_xway(struct serpent_ctx *ctx, u8 *dst, serpent_enc_blk_xway()
17 const u8 *src) serpent_enc_blk_xway()
22 static inline void serpent_enc_blk_xway_xor(struct serpent_ctx *ctx, u8 *dst, serpent_enc_blk_xway_xor()
23 const u8 *src) serpent_enc_blk_xway_xor()
28 static inline void serpent_dec_blk_xway(struct serpent_ctx *ctx, u8 *dst, serpent_dec_blk_xway()
29 const u8 *src) serpent_dec_blk_xway()
38 asmlinkage void __serpent_enc_blk_8way(struct serpent_ctx *ctx, u8 *dst,
39 const u8 *src, bool xor);
40 asmlinkage void serpent_dec_blk_8way(struct serpent_ctx *ctx, u8 *dst,
41 const u8 *src);
43 static inline void serpent_enc_blk_xway(struct serpent_ctx *ctx, u8 *dst, serpent_enc_blk_xway()
44 const u8 *src) serpent_enc_blk_xway()
49 static inline void serpent_enc_blk_xway_xor(struct serpent_ctx *ctx, u8 *dst, serpent_enc_blk_xway_xor()
50 const u8 *src) serpent_enc_blk_xway_xor()
55 static inline void serpent_dec_blk_xway(struct serpent_ctx *ctx, u8 *dst, serpent_dec_blk_xway()
56 const u8 *src) serpent_dec_blk_xway()
H A Dcamellia.h32 extern int lrw_camellia_setkey(struct crypto_tfm *tfm, const u8 *key,
36 extern int xts_camellia_setkey(struct crypto_tfm *tfm, const u8 *key,
40 asmlinkage void __camellia_enc_blk(struct camellia_ctx *ctx, u8 *dst,
41 const u8 *src, bool xor);
42 asmlinkage void camellia_dec_blk(struct camellia_ctx *ctx, u8 *dst,
43 const u8 *src);
46 asmlinkage void __camellia_enc_blk_2way(struct camellia_ctx *ctx, u8 *dst,
47 const u8 *src, bool xor);
48 asmlinkage void camellia_dec_blk_2way(struct camellia_ctx *ctx, u8 *dst,
49 const u8 *src);
52 asmlinkage void camellia_ecb_enc_16way(struct camellia_ctx *ctx, u8 *dst,
53 const u8 *src);
54 asmlinkage void camellia_ecb_dec_16way(struct camellia_ctx *ctx, u8 *dst,
55 const u8 *src);
57 asmlinkage void camellia_cbc_dec_16way(struct camellia_ctx *ctx, u8 *dst,
58 const u8 *src);
59 asmlinkage void camellia_ctr_16way(struct camellia_ctx *ctx, u8 *dst,
60 const u8 *src, le128 *iv);
62 asmlinkage void camellia_xts_enc_16way(struct camellia_ctx *ctx, u8 *dst,
63 const u8 *src, le128 *iv);
64 asmlinkage void camellia_xts_dec_16way(struct camellia_ctx *ctx, u8 *dst,
65 const u8 *src, le128 *iv);
67 static inline void camellia_enc_blk(struct camellia_ctx *ctx, u8 *dst, camellia_enc_blk()
68 const u8 *src) camellia_enc_blk()
73 static inline void camellia_enc_blk_xor(struct camellia_ctx *ctx, u8 *dst, camellia_enc_blk_xor()
74 const u8 *src) camellia_enc_blk_xor()
79 static inline void camellia_enc_blk_2way(struct camellia_ctx *ctx, u8 *dst, camellia_enc_blk_2way()
80 const u8 *src) camellia_enc_blk_2way()
85 static inline void camellia_enc_blk_xor_2way(struct camellia_ctx *ctx, u8 *dst, camellia_enc_blk_xor_2way()
86 const u8 *src) camellia_enc_blk_xor_2way()
H A Dtwofish.h20 asmlinkage void twofish_enc_blk(struct twofish_ctx *ctx, u8 *dst,
21 const u8 *src);
22 asmlinkage void twofish_dec_blk(struct twofish_ctx *ctx, u8 *dst,
23 const u8 *src);
26 asmlinkage void __twofish_enc_blk_3way(struct twofish_ctx *ctx, u8 *dst,
27 const u8 *src, bool xor);
28 asmlinkage void twofish_dec_blk_3way(struct twofish_ctx *ctx, u8 *dst,
29 const u8 *src);
38 extern int lrw_twofish_setkey(struct crypto_tfm *tfm, const u8 *key,
43 extern int xts_twofish_setkey(struct crypto_tfm *tfm, const u8 *key,
/linux-4.1.27/include/net/
H A Dgeneve.h28 u8 type;
30 u8 length:5;
31 u8 r3:1;
32 u8 r2:1;
33 u8 r1:1;
35 u8 r1:1;
36 u8 r2:1;
37 u8 r3:1;
38 u8 length:5;
40 u8 opt_data[];
47 u8 opt_len:6;
48 u8 ver:2;
49 u8 rsvd1:6;
50 u8 critical:1;
51 u8 oam:1;
53 u8 ver:2;
54 u8 opt_len:6;
55 u8 oam:1;
56 u8 critical:1;
57 u8 rsvd1:6;
60 u8 vni[3];
61 u8 rsvd2;
92 __be16 tun_flags, u8 vni[3], u8 opt_len, u8 *opt,
H A Ddcbnl.h28 u8 dcbx;
32 u8 dcb_getapp(struct net_device *, struct dcb_app *);
35 u8 dcb_ieee_getapp_mask(struct net_device *, struct dcb_app *);
64 u8 (*getstate)(struct net_device *);
65 u8 (*setstate)(struct net_device *, u8);
66 void (*getpermhwaddr)(struct net_device *, u8 *);
67 void (*setpgtccfgtx)(struct net_device *, int, u8, u8, u8, u8);
68 void (*setpgbwgcfgtx)(struct net_device *, int, u8);
69 void (*setpgtccfgrx)(struct net_device *, int, u8, u8, u8, u8);
70 void (*setpgbwgcfgrx)(struct net_device *, int, u8);
71 void (*getpgtccfgtx)(struct net_device *, int, u8 *, u8 *, u8 *, u8 *);
72 void (*getpgbwgcfgtx)(struct net_device *, int, u8 *);
73 void (*getpgtccfgrx)(struct net_device *, int, u8 *, u8 *, u8 *, u8 *);
74 void (*getpgbwgcfgrx)(struct net_device *, int, u8 *);
75 void (*setpfccfg)(struct net_device *, int, u8);
76 void (*getpfccfg)(struct net_device *, int, u8 *);
77 u8 (*setall)(struct net_device *);
78 u8 (*getcap)(struct net_device *, int, u8 *);
79 int (*getnumtcs)(struct net_device *, int, u8 *);
80 int (*setnumtcs)(struct net_device *, int, u8);
81 u8 (*getpfcstate)(struct net_device *);
82 void (*setpfcstate)(struct net_device *, u8);
85 void (*getbcnrp)(struct net_device *, int, u8 *);
86 void (*setbcnrp)(struct net_device *, int, u8);
87 int (*setapp)(struct net_device *, u8, u16, u8);
88 int (*getapp)(struct net_device *, u8, u16);
89 u8 (*getfeatcfg)(struct net_device *, int, u8 *);
90 u8 (*setfeatcfg)(struct net_device *, int, u8);
93 u8 (*getdcbx)(struct net_device *);
94 u8 (*setdcbx)(struct net_device *, u8);
/linux-4.1.27/arch/powerpc/platforms/44x/
H A D44x.h4 extern u8 as1_readb(volatile u8 __iomem *addr);
5 extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
/linux-4.1.27/arch/mips/lasat/
H A Dat93c.h17 u8 at93c_read(u8 addr);
18 void at93c_write(u8 addr, u8 data);
/linux-4.1.27/drivers/net/wireless/ti/wl18xx/
H A Dconf.h39 u8 phy_standalone;
40 u8 spare0;
41 u8 enable_clpc;
42 u8 enable_tx_low_pwr_on_siso_rdl;
43 u8 auto_detect;
44 u8 dedicated_fem;
46 u8 low_band_component;
49 u8 low_band_component_type;
51 u8 high_band_component;
54 u8 high_band_component_type;
55 u8 number_of_assembled_ant2_4;
56 u8 number_of_assembled_ant5;
57 u8 pin_muxing_platform_options[PIN_MUXING_SIZE];
58 u8 external_pa_dc2dc;
59 u8 tcxo_ldo_voltage;
60 u8 xtal_itrim_val;
61 u8 srf_state;
62 u8 srf1[SRF_TABLE_LEN];
63 u8 srf2[SRF_TABLE_LEN];
64 u8 srf3[SRF_TABLE_LEN];
65 u8 io_configuration;
66 u8 sdio_configuration;
67 u8 settings;
68 u8 rx_profile;
69 u8 per_chan_pwr_limit_arr_11abg[NUM_OF_CHANNELS_11_ABG];
70 u8 pwr_limit_reference_11_abg;
71 u8 per_chan_pwr_limit_arr_11p[NUM_OF_CHANNELS_11_P];
72 u8 pwr_limit_reference_11p;
73 u8 spare1;
74 u8 per_chan_bo_mode_11_abg[13];
75 u8 per_chan_bo_mode_11_p[4];
76 u8 primary_clock_setting_time;
77 u8 clock_valid_on_wake_up;
78 u8 secondary_clock_setting_time;
79 u8 board_type;
81 u8 psat;
88 u8 tx_rf_margin;
94 u8 padding[1];
110 u8 mode;
117 u8 idle_duty_cycle;
121 u8 connected_duty_cycle;
125 u8 max_stations_thresh;
129 u8 idle_conn_thresh;
H A Dscan.h35 u8 padding[2];
51 u8 role_id;
52 u8 scan_type;
57 u8 bss_type; /* for filtering */
58 u8 ssid_from_list; /* use ssid from configured ssid list */
59 u8 filter; /* forward only results with matching ssids */
65 u8 add_broadcast;
67 u8 urgency;
68 u8 protect; /* ??? */
69 u8 n_probe_reqs; /* Number of probes requests per channel */
70 u8 terminate_after; /* early terminate scan operation */
72 u8 passive[SCAN_MAX_BANDS]; /* number of passive scan channels */
73 u8 active[SCAN_MAX_BANDS]; /* number of active scan channels */
74 u8 dfs; /* number of dfs channels in 5ghz */
75 u8 passive_active; /* number of passive before active channels 2.4ghz */
79 u8 short_cycles_count;
80 u8 total_cycles; /* 0 - infinite */
81 u8 padding[2];
92 u8 ssid[IEEE80211_MAX_SSID_LEN];
93 u8 ssid_len; /* For SCAN_SSID_FILTER_SPECIFIC */
94 u8 tag;
95 u8 rate;
101 u8 report_threshold;
106 u8 terminate_on_report;
108 u8 padding1[3];
114 u8 role_id;
115 u8 scan_type;
116 u8 padding[2];
H A Dcmd.h31 u8 role_id;
34 u8 channel;
36 u8 switch_time;
38 u8 stop_tx;
42 u8 channel_type;
43 u8 band;
45 u8 padding[2];
59 u8 key[16];
65 u8 channel;
66 u8 padding[3];
72 u8 role_id;
73 u8 padding[3];
80 u8 role_id;
81 u8 channel;
82 u8 band;
83 u8 bandwidth;
92 u8 key_len, u8 *key);
94 int wl18xx_cmd_radar_detection_debug(struct wl1271 *wl, u8 channel);
H A Devent.h54 u8 number_of_scan_results;
55 u8 number_of_sched_scan_results;
81 u8 rx_ba_role_id;
82 u8 rx_ba_link_id;
83 u8 rx_ba_win_size;
84 u8 padding;
87 u8 sc_ssid_len;
88 u8 sc_pwd_len;
89 u8 sc_token_len;
90 u8 padding1;
91 u8 sc_ssid[32];
92 u8 sc_pwd[64];
93 u8 sc_token[32];
96 u8 sc_sync_channel;
97 u8 sc_sync_band;
98 u8 padding2[2];
101 u8 radar_channel;
102 u8 radar_type;
104 u8 padding3[2];
/linux-4.1.27/drivers/net/wireless/orinoco/
H A Dmic.h18 int orinoco_mic(struct crypto_hash *tfm_michael, u8 *key,
19 u8 *da, u8 *sa, u8 priority,
20 u8 *data, size_t data_len, u8 *mic);
/linux-4.1.27/drivers/crypto/caam/
H A Dpdb.h69 u8 b0_flags;
70 u8 ctr_flags;
82 u8 hmo_rsvd;
83 u8 ip_nh;
84 u8 ip_nh_offset;
85 u8 options;
111 u8 iv_flags;
112 u8 ctr_flags;
123 u8 ip_nh_offset;
124 u8 options;
142 u8 ovrd_ecn;
143 u8 ip_hdr_len;
144 u8 nh_offset;
145 u8 next_header; /* reserved if decap */
156 u8 rsvd;
157 u8 options;
158 u8 iv_flags;
159 u8 pri;
164 u8 rsvd1[2];
165 u8 cnst;
166 u8 key_id;
167 u8 ctr_flags;
168 u8 rsvd2;
174 u8 rsvd;
175 u8 options;
176 u8 iv_flags;
177 u8 pri;
182 u8 rsvd1[4];
183 u8 ctr_flags;
184 u8 rsvd2;
195 u8 rsvd[3];
196 u8 options;
198 u8 b0_flags;
199 u8 ctr_flags;
207 u8 rsvd[3];
208 u8 options;
210 u8 iv_flags;
211 u8 ctr_flags;
215 u8 rsvd1[2];
229 u8 rsvd;
230 u8 options;
233 u8 tci_an;
234 u8 rsvd1;
242 u8 rsvd;
243 u8 options;
245 u8 rsvd1[3];
247 u8 antireplay_len;
264 u8 type;
265 u8 version[2];
266 u8 options;
272 u8 type;
273 u8 version[2];
274 u8 options;
276 u8 i;
277 u8 j;
278 u8 rsvd1[2];
282 u8 type;
283 u8 version[2];
284 u8 options;
291 u8 rsvd[3];
292 u8 options;
298 u8 rsvd[3];
299 u8 options;
301 u8 i;
302 u8 j;
303 u8 rsvd1[2];
307 u8 rsvd[3];
308 u8 options;
322 u8 x_len;
323 u8 mki_len;
324 u8 n_tag;
325 u8 options;
327 u8 rsvd[2];
337 u8 x_len;
338 u8 mki_len;
339 u8 n_tag;
340 u8 options;
342 u8 rsvd[2];
378 u8 *q;
379 u8 *r;
380 u8 *g; /* or Gx,y */
381 u8 *s;
382 u8 *f;
383 u8 *c;
384 u8 *d;
385 u8 *ab; /* ECC only */
386 u8 *u;
391 u8 *q;
392 u8 *r;
393 u8 *g; /* or Gx,y */
394 u8 *w; /* or Wx,y */
395 u8 *f;
396 u8 *c;
397 u8 *d;
398 u8 *tmp; /* temporary data block */
399 u8 *ab; /* only used if ECC processing */
/linux-4.1.27/arch/powerpc/boot/
H A Dmv64x60.h48 u32 mv64x60_cfg_read(u8 *bridge_base, u8 hose, u8 bus, u8 devfn,
49 u8 offset);
50 void mv64x60_cfg_write(u8 *bridge_base, u8 hose, u8 bus, u8 devfn,
51 u8 offset, u32 val);
53 void mv64x60_config_ctlr_windows(u8 *bridge_base, u8 *bridge_pbase,
54 u8 is_coherent);
55 void mv64x60_config_pci_windows(u8 *bridge_base, u8 *bridge_pbase, u8 hose,
56 u8 bus, u32 mem_size, u32 acc_bits);
57 void mv64x60_config_cpu2pci_window(u8 *bridge_base, u8 hose, u32 pci_base_hi,
60 u32 mv64x60_get_mem_size(u8 *bridge_base);
61 u8 *mv64x60_get_bridge_pbase(void);
62 u8 *mv64x60_get_bridge_base(void);
63 u8 mv64x60_is_coherent(void);
66 int mv64x60_i2c_read(u32 devaddr, u8 *buf, u32 offset, u32 offset_size,
/linux-4.1.27/include/crypto/
H A Dcast5.h14 u8 Kr[16];
18 int cast5_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen);
20 void __cast5_encrypt(struct cast5_ctx *ctx, u8 *dst, const u8 *src);
21 void __cast5_decrypt(struct cast5_ctx *ctx, u8 *dst, const u8 *src);
H A Dcast6.h14 u8 Kr[12][4];
17 int __cast6_setkey(struct cast6_ctx *ctx, const u8 *key,
19 int cast6_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen);
21 void __cast6_encrypt(struct cast6_ctx *ctx, u8 *dst, const u8 *src);
22 void __cast6_decrypt(struct cast6_ctx *ctx, u8 *dst, const u8 *src);
H A Dserpent.h20 int __serpent_setkey(struct serpent_ctx *ctx, const u8 *key,
22 int serpent_setkey(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen);
24 void __serpent_encrypt(struct serpent_ctx *ctx, u8 *dst, const u8 *src);
25 void __serpent_decrypt(struct serpent_ctx *ctx, u8 *dst, const u8 *src);
H A Dxts.h16 void (*tweak_fn)(void *ctx, u8* dst, const u8* src);
18 void (*crypt_fn)(void *ctx, u8 *blks, unsigned int nbytes);
21 #define XTS_TWEAK_CAST(x) ((void (*)(void *, u8*, const u8*))(x))
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb/
H A Dcpl5_cmd.h162 u8 opcode;
180 u8 wsf;
182 u8 rsvd:4;
183 u8 ecn:1;
184 u8 sack:1;
185 u8 tstamp:1;
187 u8 tstamp:1;
188 u8 sack:1;
189 u8 ecn:1;
190 u8 rsvd:4;
212 u8 resvd[7];
213 u8 status;
223 u8 l2t_idx;
224 u8 rsvd[3];
237 u8 dst_mac[6];
239 u8 src_mac[6];
240 u8 rsvd[2];
254 u8 rsvd[3];
255 u8 status;
279 u8 rsvd[3];
280 u8 status;
303 u8 rsvd;
304 u8 status;
315 u8 rsvd[3];
316 u8 offset;
323 u8 rsvd[3];
324 u8 status;
354 u8 rsvd[3];
355 u8 status;
367 u8 rsvd[3];
368 u8 status;
374 u8 rsvd1;
375 u8 cmd;
376 u8 rsvd2[6];
382 u8 rsvd1;
383 u8 status;
384 u8 rsvd2[6];
410 u8 rsvd;
411 u8 status;
426 u8 rsvd;
427 u8 status;
432 * All fields are u8 or u16 except for the length. However that field is not
436 u8 opcode;
438 u8 iff:4;
439 u8 ip_csum_dis:1;
440 u8 l4_csum_dis:1;
441 u8 vlan_valid:1;
442 u8 rsvd:1;
444 u8 rsvd:1;
445 u8 vlan_valid:1;
446 u8 l4_csum_dis:1;
447 u8 ip_csum_dis:1;
448 u8 iff:4;
456 u8 opcode;
458 u8 iff:4;
459 u8 ip_csum_dis:1;
460 u8 l4_csum_dis:1;
461 u8 vlan_valid:1;
462 u8 :1; member in struct:cpl_tx_pkt_lso
464 u8 :1; member in struct:cpl_tx_pkt_lso
465 u8 vlan_valid:1;
466 u8 l4_csum_dis:1;
467 u8 ip_csum_dis:1;
468 u8 iff:4;
473 u8 rsvd[5];
475 u8 tcp_hdr_words:4;
476 u8 ip_hdr_words:4;
478 u8 ip_hdr_words:4;
479 u8 tcp_hdr_words:4;
485 u8 opcode;
487 u8 iff:4;
488 u8 csum_valid:1;
489 u8 bad_pkt:1;
490 u8 vlan_valid:1;
491 u8 rsvd:1;
493 u8 rsvd:1;
494 u8 vlan_valid:1;
495 u8 bad_pkt:1;
496 u8 csum_valid:1;
497 u8 iff:4;
507 u8 rsvd1[2];
508 u8 dst_mac[6];
513 u8 status;
514 u8 rsvd[3];
519 u8 rsvd[3];
520 u8 l2t_idx;
526 u8 rsvd1[2];
527 u8 dst_mac[6];
532 u8 rsvd0;
534 u8 rsvd1:1;
535 u8 mtu_idx:3;
536 u8 iff:4;
538 u8 iff:4;
539 u8 mtu_idx:3;
540 u8 rsvd1:1;
544 u8 src_mac1[6];
546 u8 src_mac0[6];
551 u8 status;
552 u8 rsvd[3];
557 u8 rsvd0;
559 u8 rsvd1:4;
560 u8 iff:4;
562 u8 iff:4;
563 u8 rsvd1:4;
570 u8 status;
572 u8 rsvd1:1;
573 u8 mtu_idx:3;
574 u8 rsvd0:4;
576 u8 rsvd0:4;
577 u8 mtu_idx:3;
578 u8 rsvd1:1;
582 u8 src_mac1[6];
584 u8 src_mac0[6];
594 u8 status;
595 u8 rsvd[3];
607 u8 status;
608 u8 rsvd[3];
618 u8 status;
619 u8 rsvd0[2];
620 u8 l2t_idx;
622 u8 rsvd1:7;
623 u8 select:1;
625 u8 select:1;
626 u8 rsvd1:7;
628 u8 rsvd2[3];
/linux-4.1.27/arch/x86/pci/
H A Dearly.c10 u32 read_pci_config(u8 bus, u8 slot, u8 func, u8 offset) read_pci_config()
18 u8 read_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset) read_pci_config_byte()
20 u8 v; read_pci_config_byte()
26 u16 read_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset) read_pci_config_16()
34 void write_pci_config(u8 bus, u8 slot, u8 func, u8 offset, write_pci_config()
41 void write_pci_config_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 val) write_pci_config_byte()
47 void write_pci_config_16(u8 bus, u8 slot, u8 func, u8 offset, u16 val) write_pci_config_16()
59 void early_dump_pci_device(u8 bus, u8 slot, u8 func) early_dump_pci_device()
92 u8 type; early_dump_pci_devices()
/linux-4.1.27/drivers/tty/serial/
H A Dsunsab.h10 u8 rfifo[0x20]; /* Receive FIFO */
11 u8 star; /* Status Register */
12 u8 __pad1;
13 u8 mode; /* Mode Register */
14 u8 timr; /* Timer Register */
15 u8 xon; /* XON Character */
16 u8 xoff; /* XOFF Character */
17 u8 tcr; /* Termination Character Register */
18 u8 dafo; /* Data Format */
19 u8 rfc; /* RFIFO Control Register */
20 u8 __pad2;
21 u8 rbcl; /* Receive Byte Count Low */
22 u8 rbch; /* Receive Byte Count High */
23 u8 ccr0; /* Channel Configuration Register 0 */
24 u8 ccr1; /* Channel Configuration Register 1 */
25 u8 ccr2; /* Channel Configuration Register 2 */
26 u8 ccr3; /* Channel Configuration Register 3 */
27 u8 __pad3[4];
28 u8 vstr; /* Version Status Register */
29 u8 __pad4[3];
30 u8 gis; /* Global Interrupt Status */
31 u8 ipc; /* Interrupt Port Configuration */
32 u8 isr0; /* Interrupt Status 0 */
33 u8 isr1; /* Interrupt Status 1 */
34 u8 pvr; /* Port Value Register */
35 u8 pis; /* Port Interrupt Status */
36 u8 pcr; /* Port Configuration Register */
37 u8 ccr4; /* Channel Configuration Register 4 */
41 u8 xfifo[0x20]; /* Transmit FIFO */
42 u8 cmdr; /* Command Register */
43 u8 __pad1;
44 u8 mode;
45 u8 timr;
46 u8 xon;
47 u8 xoff;
48 u8 tcr;
49 u8 dafo;
50 u8 rfc;
51 u8 __pad2;
52 u8 xbcl; /* Transmit Byte Count Low */
53 u8 xbch; /* Transmit Byte Count High */
54 u8 ccr0;
55 u8 ccr1;
56 u8 ccr2;
57 u8 ccr3;
58 u8 tsax; /* Time-Slot Assignment Reg. Transmit */
59 u8 tsar; /* Time-Slot Assignment Reg. Receive */
60 u8 xccr; /* Transmit Channel Capacity Register */
61 u8 rccr; /* Receive Channel Capacity Register */
62 u8 bgr; /* Baud Rate Generator Register */
63 u8 tic; /* Transmit Immediate Character */
64 u8 mxn; /* Mask XON Character */
65 u8 mxf; /* Mask XOFF Character */
66 u8 iva; /* Interrupt Vector Address */
67 u8 ipc;
68 u8 imr0; /* Interrupt Mask Register 0 */
69 u8 imr1; /* Interrupt Mask Register 1 */
70 u8 pvr;
71 u8 pim; /* Port Interrupt Mask */
72 u8 pcr;
73 u8 ccr4;
77 u8 __pad1[0x20];
78 u8 __pad2;
79 u8 __pad3;
80 u8 mode;
81 u8 timr;
82 u8 xon;
83 u8 xoff;
84 u8 tcr;
85 u8 dafo;
86 u8 rfc;
87 u8 __pad4;
88 u8 __pad5;
89 u8 __pad6;
90 u8 ccr0;
91 u8 ccr1;
92 u8 ccr2;
93 u8 ccr3;
94 u8 __pad7;
95 u8 __pad8;
96 u8 __pad9;
97 u8 __pad10;
98 u8 __pad11;
99 u8 __pad12;
100 u8 __pad13;
101 u8 __pad14;
102 u8 __pad15;
103 u8 ipc;
104 u8 __pad16;
105 u8 __pad17;
106 u8 pvr;
107 u8 __pad18;
108 u8 pcr;
109 u8 ccr4;
/linux-4.1.27/drivers/staging/iio/addac/
H A Dadt7316.h21 int (*read)(void *client, u8 reg, u8 *data);
22 int (*write)(void *client, u8 reg, u8 val);
23 int (*multi_read)(void *client, u8 first_reg, u8 count, u8 *data);
24 int (*multi_write)(void *client, u8 first_reg, u8 count, u8 *data);
/linux-4.1.27/drivers/acpi/
H A Dsbshc.h17 static const u8 SMBUS_PEC = 0x80;
27 extern int acpi_smbus_read(struct acpi_smb_hc *hc, u8 protocol, u8 address,
28 u8 command, u8 * data);
29 extern int acpi_smbus_write(struct acpi_smb_hc *hc, u8 protocol, u8 slave_address,
30 u8 command, u8 * data, u8 length);
/linux-4.1.27/drivers/s390/block/
H A Ddasd_diag.h31 u8 vdev_class;
32 u8 vdev_type;
33 u8 vdev_status;
34 u8 vdev_flags;
35 u8 rdev_class;
36 u8 rdev_type;
37 u8 rdev_model;
38 u8 rdev_features;
47 u8 type;
48 u8 status;
49 u8 spare1[2];
57 u8 flaga;
58 u8 spare1[21];
60 u8 spare2[4];
64 u8 spare3[8];
69 u8 flaga;
70 u8 spare1[21];
71 u8 key;
72 u8 flags;
73 u8 spare2[2];
76 u8 spare3[4];
79 u8 spare4[8];
/linux-4.1.27/drivers/net/wireless/ti/wl12xx/
H A Dscan.h34 u8 role_id;
36 u8 n_ch;
39 u8 n_probe_reqs;
40 u8 tid_trigger;
41 u8 ssid_len;
42 u8 use_ssid_list;
47 u8 ssid[IEEE80211_MAX_SSID_LEN];
49 u8 band;
51 u8 scan_tag;
52 u8 padding2[2];
61 u8 early_termination;
62 u8 tx_power_att;
63 u8 channel;
65 u8 dfs_candidate;
66 u8 activity_detected;
67 u8 pad;
77 u8 addr[ETH_ALEN];
78 u8 padding[2];
89 u8 cycles; /* maximum number of scan cycles */
90 u8 report_after; /* report when this number of results are received */
91 u8 terminate; /* stop scanning after reporting */
93 u8 tag;
94 u8 bss_type; /* for filtering */
95 u8 filter_type;
97 u8 ssid_len; /* For SCAN_SSID_FILTER_SPECIFIC */
98 u8 ssid[IEEE80211_MAX_SSID_LEN];
100 u8 n_probe_reqs; /* Number of probes requests per channel */
102 u8 passive[SCAN_MAX_BANDS];
103 u8 active[SCAN_MAX_BANDS];
105 u8 dfs;
107 u8 n_pactive_ch; /* number of pactive (passive until fw detects energy)
109 u8 role_id;
110 u8 padding[1];
119 u8 tag;
120 u8 role_id;
121 u8 padding[2];
127 u8 tag;
128 u8 role_id;
129 u8 padding[2];
H A Devent.h60 u8 number_of_scan_results;
61 u8 scan_tag;
62 u8 completed_scan_status;
63 u8 reserved_3;
65 u8 soft_gemini_sense_info;
66 u8 soft_gemini_protective_info;
68 u8 change_auto_mode_timeout;
69 u8 scheduled_scan_status;
70 u8 reserved4;
72 u8 roc_channel;
83 u8 discovery_tag;
84 u8 number_of_preq_results;
85 u8 number_of_prsp_results;
86 u8 reserved_5;
89 u8 role_id; /* 0xFF means any role. */
90 u8 rx_ba_allowed;
91 u8 reserved_6[2];
95 u8 channel_switch_role_id;
96 u8 channel_switch_status;
97 u8 reserved_7[2];
99 u8 ps_poll_delivery_failure_role_ids;
100 u8 stopped_role_ids;
101 u8 started_role_ids;
103 u8 reserved_8[9];
H A Dcmd.h38 u8 sr_debug_table[WL1271_INI_MAX_SMART_REFLEX_PARAM];
39 u8 sr_sen_n_p;
40 u8 sr_sen_n_p_gain;
41 u8 sr_sen_nrn;
42 u8 sr_sen_prn;
43 u8 padding[3];
53 u8 sr_debug_table[WL1271_INI_MAX_SMART_REFLEX_PARAM];
54 u8 sr_sen_n_p;
55 u8 sr_sen_n_p_gain;
56 u8 sr_sen_nrn;
57 u8 sr_sen_prn;
58 u8 padding[3];
72 u8 padding2;
74 u8 padding3[2];
86 u8 fem_vendor_and_options;
90 u8 padding2;
101 u8 tx_per_channel_power_compensation_2[CONF_TX_PWR_COMPENSATION_LEN_2];
102 u8 tx_per_channel_power_compensation_5[CONF_TX_PWR_COMPENSATION_LEN_5];
103 u8 padding[3];
109 u8 role_id;
112 u8 channel;
114 u8 switch_time;
116 u8 stop_tx;
118 u8 post_switch_tx_disable;
120 u8 padding[3];
/linux-4.1.27/drivers/net/wireless/libertas/
H A Dradiotap.h5 u8 rate;
6 u8 txpower;
7 u8 rts_retries;
8 u8 data_retries;
34 u8 flags;
35 u8 rate;
36 u8 antsignal;
/linux-4.1.27/drivers/net/wireless/rtlwifi/
H A Defuse.h47 u8 offset;
48 u8 word_start;
49 u8 byte_start;
50 u8 byte_cnts;
54 u8 offset;
55 u8 word_en;
56 u8 data[8];
81 u8 id[2];
82 u8 ldo_setting[2];
83 u8 clk_setting[2];
84 u8 cccr;
85 u8 sdio_mode;
86 u8 ocr[3];
87 u8 cis0[17];
88 u8 cis1[48];
89 u8 mac_addr[6];
90 u8 eeprom_verno;
91 u8 channel_plan;
92 u8 tx_power_b[14];
93 u8 tx_power_g[14];
96 void read_efuse_byte(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
98 u8 efuse_read_1byte(struct ieee80211_hw *hw, u16 address);
99 int efuse_one_byte_read(struct ieee80211_hw *hw, u16 addr, u8 *data);
100 void efuse_write_1byte(struct ieee80211_hw *hw, u16 address, u8 value);
102 u16 _size_byte, u8 *pbuf);
103 void efuse_shadow_read(struct ieee80211_hw *hw, u8 type,
105 void efuse_shadow_write(struct ieee80211_hw *hw, u8 type,
111 void efuse_re_pg_section(struct ieee80211_hw *hw, u8 section_idx);
H A Dwifi.h226 u8 index_cck_base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
227 u8 index_bw40_base[MAX_RF_PATH][MAX_CHNL_GROUP_24G];
229 u8 cck_diff[MAX_RF_PATH][MAX_TX_COUNT];
230 u8 ofdm_diff[MAX_RF_PATH][MAX_TX_COUNT];
231 u8 bw20_diff[MAX_RF_PATH][MAX_TX_COUNT];
232 u8 bw40_diff[MAX_RF_PATH][MAX_TX_COUNT];
233 u8 bw80_diff[MAX_RF_PATH][MAX_TX_COUNT];
234 u8 bw160_diff[MAX_RF_PATH][MAX_TX_COUNT];
238 u8 index_bw40_base[MAX_RF_PATH][MAX_CHNL_GROUP_5G];
240 u8 ofdm_diff[MAX_RF_PATH][MAX_TX_COUNT];
241 u8 bw20_diff[MAX_RF_PATH][MAX_TX_COUNT];
242 u8 bw40_diff[MAX_RF_PATH][MAX_TX_COUNT];
243 u8 bw80_diff[MAX_RF_PATH][MAX_TX_COUNT];
244 u8 bw160_diff[MAX_RF_PATH][MAX_TX_COUNT];
814 u8 char_data;
817 u8 aifsn:4;
818 u8 acm:1;
819 u8 aci:2;
820 u8 reserved:1;
915 u8 *octet;
922 u8 addr1[ETH_ALEN];
923 u8 addr2[ETH_ALEN];
924 u8 addr3[ETH_ALEN];
926 u8 payload[0];
930 u8 id;
931 u8 len;
932 u8 data[0];
962 u8 aifs;
963 u8 flag;
992 u8 xaagccore1;
993 u8 xbagccore1;
994 u8 xcagccore1;
995 u8 xdagccore1;
996 u8 cca;
1020 u8 rx_rssi_percentage[4];
1021 u8 rx_evm_dbm[4];
1022 u8 rx_evm_percentage[2];
1032 u8 rate_adaptive_disabled;
1033 u8 ratr_state;
1038 u8 low2high_rssi_thresh_for_ra40m;
1040 u8 low2high_rssi_thresh_for_ra20m;
1050 u8 ping_rssi_enable;
1054 u8 pre_ratr_state;
1055 u8 ldpc_thres;
1068 u8 pricca_flag;
1069 u8 intf_flag;
1070 u8 intf_type;
1071 u8 dup_rts_flag;
1072 u8 monitor_flag;
1073 u8 ch_offset;
1074 u8 mf_state;
1120 u8 noa_index; /* Identifies instance of Notice of Absence timing. */
1122 u8 ctwindow;
1123 u8 opp_ps; /* opportunistic power save. */
1124 u8 noa_num; /* number of NoA descriptor in P2P IE. */
1126 u8 noa_count_type[P2P_MAX_NOA_NUM];
1140 u8 offload_en:1;
1141 u8 role:1; /* 1: Owner, 0: Client */
1142 u8 ctwindow_en:1;
1143 u8 noa0_en:1;
1144 u8 noa1_en:1;
1145 u8 allstasleep:1;
1146 u8 discovery:1;
1147 u8 reserved:1;
1182 u8 rf_mode;
1183 u8 rf_type;
1184 u8 current_chan_bw;
1185 u8 set_bwmode_inprogress;
1186 u8 sw_chnl_inprogress;
1187 u8 sw_chnl_stage;
1188 u8 sw_chnl_step;
1189 u8 current_channel;
1190 u8 h2c_box_num;
1191 u8 set_io_inprogress;
1192 u8 lck_inprogress;
1203 u8 rfpienable;
1204 u8 reserve_0;
1213 u8 reg_837;
1221 u8 pwrgroup_cnt;
1222 u8 cck_high_power;
1231 u8 txpwr_by_rate_base_24g[TX_PWR_BY_RATE_NUM_RF]
1234 u8 txpwr_by_rate_base_5g[TX_PWR_BY_RATE_NUM_RF]
1237 u8 default_initialgain[4];
1240 u8 cur_cck_txpwridx;
1241 u8 cur_ofdm24g_txpwridx;
1242 u8 cur_bw20_txpwridx;
1243 u8 cur_bw40_txpwridx;
1262 u8 framesync;
1265 u8 num_total_rfpath;
1269 u8 hw_rof_enable; /*Enable GPIO[9] as WL RF HW PDn source*/
1291 u8 agg_state;
1292 u8 rx_agg_state;
1307 u8 ratr_index;
1308 u8 wireless_mode;
1309 u8 mimo_ps;
1310 u8 mac_addr[ETH_ALEN];
1329 void (*write8_async) (struct rtl_priv *rtlpriv, u32 addr, u8 val);
1335 u8(*read8_sync) (struct rtl_priv *rtlpriv, u32 addr);
1342 u8 mac_addr[ETH_ALEN];
1343 u8 mac80211_registered;
1344 u8 beacon_enabled;
1362 u8 p2p; /*using p2p role*/
1372 u8 cnt_after_linked;
1379 u8 ht_stbc_cap;
1380 u8 ht_cur_stbc;
1383 u8 vht_enable;
1384 u8 bw_80;
1385 u8 vht_cur_ldpc;
1386 u8 vht_cur_stbc;
1387 u8 vht_stbc_cap;
1388 u8 vht_ldpc_cap;
1394 u8 bssid[ETH_ALEN] __aligned(2);
1396 u8 mcs[16]; /* 16 bytes mcs for HT rates. */
1398 u8 ht_enable;
1399 u8 sgi_40;
1400 u8 sgi_20;
1401 u8 bw_40;
1403 u8 slot_time;
1404 u8 short_preamble;
1405 u8 use_cts_protect;
1406 u8 cur_40_prime_sc;
1407 u8 cur_40_prime_sc_bk;
1408 u8 cur_80_prime_sc;
1410 u8 retry_short;
1411 u8 retry_long;
1419 u8 min_space_cfg; /*For Min spacing configurations */
1420 u8 max_mss_density;
1421 u8 current_ampdu_factor;
1422 u8 current_ampdu_density;
1444 u8 tra_tdma_nav;
1445 u8 tra_tdma_ant;
1447 u8 tdma_ant;
1448 u8 tdma_nav;
1449 u8 tdma_dac_swing;
1450 u8 fw_dac_swing_lvl;
1452 u8 ps_tdma_byte[5];
1471 u8 c2h_bt_info;
1475 u8 bt_retry_cnt;
1476 u8 c2h_bt_info_original;
1477 u8 bt_inquiry_page_cnt;
1494 u8 ic_class;
1495 u8 oem_id;
1497 u8 state; /*stop 0, start 1 */
1498 u8 board_type;
1499 u8 external_pa;
1501 u8 pa_mode;
1502 u8 pa_type_2g;
1503 u8 pa_type_5g;
1504 u8 lna_type_2g;
1505 u8 lna_type_5g;
1506 u8 external_pa_2g;
1507 u8 external_lna_2g;
1508 u8 external_pa_5g;
1509 u8 external_lna_5g;
1510 u8 rfe_type;
1514 u8 *pfirmware;
1518 u8 last_hmeboxnum;
1521 u8 fw_rsvdpage_startoffset;
1522 u8 h2c_txcmd_seq;
1523 u8 current_ra_rate;
1529 u8 current_fwcmd_io;
1534 u8 fw_ps_state;
1539 u8 minspace_cfg; /*For Min spacing configurations */
1549 u8 macphyctl_reg;
1551 u8 max_earlymode_num;
1565 u8 rts_en;
1574 u8 *wowlan_firmware;
1576 u8 hw_rof_enable; /*Enable GPIO[9] as WL RF HW PDn source*/
1594 u8 hwsec_cam_sta_addr[TOTAL_CAM_ENTRY][ETH_ALEN];
1597 u8 key_buf[KEY_BUF_SIZE][MAX_KEY_LEN];
1598 u8 key_len[KEY_BUF_SIZE];
1602 u8 *pairwise_key;
1608 u8 bssid[6];
1609 u8 antsel_rx_keep_0;
1610 u8 antsel_rx_keep_1;
1611 u8 antsel_rx_keep_2;
1615 u8 fat_state;
1617 u8 antsel_a[ASSOCIATE_ENTRY_NUM];
1618 u8 antsel_b[ASSOCIATE_ENTRY_NUM];
1619 u8 antsel_c[ASSOCIATE_ENTRY_NUM];
1624 u8 rx_idle_ant;
1658 u8 txpowercount;
1659 u8 powerindex_backup[6];
1661 u8 thermalvalue_rxgain;
1662 u8 thermalvalue_iqk;
1663 u8 thermalvalue_lck;
1664 u8 thermalvalue;
1665 u8 last_dtp_lvl;
1666 u8 thermalvalue_avg[AVG_THERMAL_NUM];
1667 u8 thermalvalue_avg_index;
1669 u8 dynamic_txhighpower_lvl; /*Tx high power level */
1670 u8 dm_flag; /*Indicate each dynamic mechanism's status. */
1671 u8 dm_flag_tmp;
1672 u8 dm_type;
1673 u8 dm_rssi_sel;
1674 u8 txpower_track_control;
1678 u8 default_ofdm_index;
1679 u8 default_cck_index;
1700 u8 cfo_threshold;
1703 u8 tx_rate;
1706 u8 swing_idx_ofdm[MAX_RF_PATH];
1707 u8 swing_idx_ofdm_cur;
1708 u8 swing_idx_ofdm_base[MAX_RF_PATH];
1710 u8 swing_idx_cck;
1711 u8 swing_idx_cck_cur;
1712 u8 swing_idx_cck_base;
1718 u8 delta_swing_table_idx_24gccka_p[DEL_SW_IDX_SZ];
1719 u8 delta_swing_table_idx_24gccka_n[DEL_SW_IDX_SZ];
1720 u8 delta_swing_table_idx_24gcckb_p[DEL_SW_IDX_SZ];
1721 u8 delta_swing_table_idx_24gcckb_n[DEL_SW_IDX_SZ];
1722 u8 delta_swing_table_idx_24ga_p[DEL_SW_IDX_SZ];
1723 u8 delta_swing_table_idx_24ga_n[DEL_SW_IDX_SZ];
1724 u8 delta_swing_table_idx_24gb_p[DEL_SW_IDX_SZ];
1725 u8 delta_swing_table_idx_24gb_n[DEL_SW_IDX_SZ];
1726 u8 delta_swing_table_idx_5ga_p[BAND_NUM][DEL_SW_IDX_SZ];
1727 u8 delta_swing_table_idx_5ga_n[BAND_NUM][DEL_SW_IDX_SZ];
1728 u8 delta_swing_table_idx_5gb_p[BAND_NUM][DEL_SW_IDX_SZ];
1729 u8 delta_swing_table_idx_5gb_n[BAND_NUM][DEL_SW_IDX_SZ];
1730 u8 delta_swing_table_idx_24ga_p_8188e[DEL_SW_IDX_SZ];
1731 u8 delta_swing_table_idx_24ga_n_8188e[DEL_SW_IDX_SZ];
1739 u8 resp_tx_path;
1740 u8 path_sel;
1746 u8 pre_channel;
1747 u8 *p_channel;
1748 u8 linked_interval;
1761 u8 efuse_map[2][EFUSE_MAX_LOGICAL_SIZE];
1763 u8 efuse_usedpercentage;
1766 u8 efuse_re_pg_data[8];
1769 u8 autoload_failflag;
1770 u8 autoload_status;
1777 u8 eeprom_oemid;
1779 u8 eeprom_version;
1780 u8 board_type;
1781 u8 external_pa;
1783 u8 dev_addr[6];
1784 u8 wowlan_enable;
1785 u8 antenna_div_cfg;
1786 u8 antenna_div_type;
1789 u8 eeprom_crystalcap;
1790 u8 eeprom_tssi[2];
1791 u8 eeprom_tssi_5g[3][2]; /* for 5GL/5GM/5GH band. */
1792 u8 eeprom_pwrlimit_ht20[CHANNEL_GROUP_MAX];
1793 u8 eeprom_pwrlimit_ht40[CHANNEL_GROUP_MAX];
1794 u8 eeprom_chnlarea_txpwr_cck[MAX_RF_PATH][CHANNEL_GROUP_MAX_2G];
1795 u8 eeprom_chnlarea_txpwr_ht40_1s[MAX_RF_PATH][CHANNEL_GROUP_MAX];
1796 u8 eprom_chnl_txpwr_ht40_2sdf[MAX_RF_PATH][CHANNEL_GROUP_MAX];
1798 u8 internal_pa_5g[2]; /* pathA / pathB */
1799 u8 eeprom_c9;
1800 u8 eeprom_cc;
1803 u8 eeprom_pwrgroup[2][3];
1804 u8 pwrgroup_ht20[2][CHANNEL_MAX_NUMBER];
1805 u8 pwrgroup_ht40[2][CHANNEL_MAX_NUMBER];
1807 u8 txpwrlevel_cck[MAX_RF_PATH][CHANNEL_MAX_NUMBER_2G];
1809 u8 txpwrlevel_ht40_1s[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
1811 u8 txpwrlevel_ht40_2s[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
1832 u8 txpwr_5g_bw40base[MAX_RF_PATH][CHANNEL_MAX_NUMBER];
1833 u8 txpwr_5g_bw80base[MAX_RF_PATH][CHANNEL_MAX_NUMBER_5G_80M];
1839 u8 txpwr_safetyflag; /* Band edge enable flag */
1841 u8 legacy_httxpowerdiff; /* Legacy to HT rate power diff */
1842 u8 antenna_txpwdiff[3];
1844 u8 eeprom_regulatory;
1845 u8 eeprom_thermalmeter;
1846 u8 thermalmeter[2]; /*ThermalMeter, index 0 for RFIC0, 1 for RFIC1 */
1848 u8 crystalcap; /* CrystalCap. */
1849 u8 delta_iqk;
1850 u8 delta_lck;
1852 u8 legacy_ht_txpowerdiff; /*Legacy to HT rate power diff */
1859 u8 channel_plan;
1881 u8 fwctrl_psmode;
1883 u8 reg_fwctrl_lps;
1886 u8 reg_max_lps_awakeintvl;
1900 u8 const_amdpci_aspm;
1924 u8 pwr_mode;
1925 u8 smart_ps;
1928 u8 wo_wlan_mode;
1929 u8 arp_offload_enable;
1930 u8 gtk_offload_enable;
1938 u8 psaddr[ETH_ALEN];
1941 u8 signal;
1942 u8 noise;
1943 u8 rate; /* hw desc rate */
1944 u8 received_channel;
1945 u8 control;
1946 u8 mask;
1947 u8 freq;
1951 u8 nic_type;
1953 u8 signalquality; /*in 0-100 index. */
1960 u8 signalstrength; /*in 0-100 index. */
1972 u8 rx_drvinfo_size;
1973 u8 rx_bufshift;
1977 u8 rx_packet_bw;
1979 u8 rx_mimo_signalstrength[4]; /*in 0~100 index */
1981 u8 rx_mimo_evm_dbm[4];
1986 u8 rx_pwr[4]; /* per-path's pwdb */
1987 u8 rx_snr[4]; /* per-path's SNR */
1988 u8 bandwidth;
1989 u8 bt_coex_pwr_adjust;
1999 u8 vht_nss;
2001 u8 packet_report_type;
2004 u8 wake_match;
2033 u8 packet_bw:2;
2034 u8 multicast:1;
2035 u8 broadcast:1;
2037 u8 rts_stbc:1;
2038 u8 rts_enable:1;
2039 u8 cts_enable:1;
2040 u8 rts_use_shortpreamble:1;
2041 u8 rts_use_shortgi:1;
2042 u8 rts_sc:1;
2043 u8 rts_bw:1;
2044 u8 rts_rate;
2046 u8 use_shortgi:1;
2047 u8 use_shortpreamble:1;
2048 u8 use_driver_rate:1;
2049 u8 disable_ratefallback:1;
2051 u8 ratr_index;
2052 u8 mac_id;
2053 u8 hw_rate;
2055 u8 last_inipkt:1;
2056 u8 cmd_or_init:1;
2057 u8 queue_index;
2060 u8 empkt_num;
2069 u8 type;
2095 u8(*switch_channel) (struct ieee80211_hw *hw);
2101 void (*get_hw_reg) (struct ieee80211_hw *hw, u8 variable, u8 *val);
2102 void (*set_hw_reg) (struct ieee80211_hw *hw, u8 variable, u8 *val);
2104 struct ieee80211_sta *sta, u8 rssi_level);
2105 void (*pre_fill_tx_bd_desc)(struct ieee80211_hw *hw, u8 *tx_bd_desc,
2106 u8 *desc, u8 queue_index,
2108 void (*update_rate_mask) (struct ieee80211_hw *hw, u8 rssi_level);
2110 u8 queue_index);
2111 void (*rx_check_dma_ok)(struct ieee80211_hw *hw, u8 *header_desc,
2112 u8 queue_index);
2114 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
2115 u8 *pbd_desc_tx,
2118 struct sk_buff *skb, u8 hw_queue,
2120 void (*fill_fake_txdesc) (struct ieee80211_hw *hw, u8 *pDesc,
2122 void (*fill_tx_cmddesc) (struct ieee80211_hw *hw, u8 *pdesc,
2128 u8 *pdesc, struct sk_buff *skb);
2130 bool (*radio_onoff_checking) (struct ieee80211_hw *hw, u8 *valid);
2132 void (*scan_operation_backup) (struct ieee80211_hw *hw, u8 operation);
2137 void (*set_desc)(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
2138 u8 desc_name, u8 *val);
2139 u32 (*get_desc) (u8 *pdesc, bool istx, u8 desc_name);
2141 u8 hw_queue, u16 index);
2142 void (*tx_polling) (struct ieee80211_hw *hw, u8 hw_queue);
2145 u8 *macaddr, bool is_group, u8 enc_algo,
2162 u8 *powerlevel);
2164 u8 *ppowerlevel, u8 channel);
2166 u8 configtype);
2168 u8 configtype);
2176 void (*fill_h2c_cmd) (struct ieee80211_hw *hw, u8 element_id,
2177 u32 cmd_len, u8 *p_cmdbuffer);
2184 u8 index);
2185 u16 (*get_available_desc)(struct ieee80211_hw *hw, u8 q_idx);
2190 void (*read_efuse_byte)(struct ieee80211_hw *hw, u16 _offset, u8 *pbuf);
2268 u8 bar_id;
2369 u8 curcckpdstate_for_anothermacofdmsp;
2371 u8 curtxhighlvl_for_anothermacofdmsp;
2376 u8 pre_ccastate;
2377 u8 cur_ccasate;
2378 u8 pre_rfstate;
2379 u8 cur_rfstate;
2380 u8 initialize;
2396 u8 dig_enable_flag;
2397 u8 dig_ext_port_stage;
2398 u8 dig_algorithm;
2399 u8 dig_twoport_algorithm;
2400 u8 dig_dbgmode;
2401 u8 dig_slgorithm_switch;
2402 u8 cursta_cstate;
2403 u8 presta_cstate;
2404 u8 curmultista_cstate;
2405 u8 stop_dig;
2409 u8 rx_gain_max;
2410 u8 rx_gain_min;
2411 u8 min_undec_pwdb_for_dm;
2412 u8 rssi_val_min;
2413 u8 pre_cck_cca_thres;
2414 u8 cur_cck_cca_thres;
2415 u8 pre_cck_pd_state;
2416 u8 cur_cck_pd_state;
2417 u8 pre_cck_fa_state;
2418 u8 cur_cck_fa_state;
2419 u8 pre_ccastate;
2420 u8 cur_ccasate;
2421 u8 large_fa_hit;
2422 u8 forbidden_igi;
2423 u8 dig_state;
2424 u8 dig_highpwrstate;
2425 u8 cur_sta_cstate;
2426 u8 pre_sta_cstate;
2427 u8 cur_ap_cstate;
2428 u8 pre_ap_cstate;
2429 u8 cur_pd_thstate;
2430 u8 pre_pd_thstate;
2431 u8 cur_cs_ratiostate;
2432 u8 pre_cs_ratiostate;
2433 u8 backoff_enable_flag;
2436 u8 dig_min_0;
2437 u8 dig_min_1;
2438 u8 bt30_cur_igi;
2454 u8 bt_type;
2455 u8 btcoexist;
2456 u8 ant_num;
2463 u8 eeprom_bt_coexist;
2464 u8 eeprom_bt_type;
2465 u8 eeprom_bt_ant_num;
2466 u8 eeprom_bt_ant_isol;
2467 u8 eeprom_bt_radio_shared;
2469 u8 bt_coexistence;
2470 u8 bt_ant_num;
2471 u8 bt_coexist_type;
2472 u8 bt_state;
2473 u8 bt_cur_state; /* 0:on, 1:off */
2474 u8 bt_ant_isolation; /* 0:good, 1:bad */
2475 u8 bt_pape_ctrl; /* 0:SW, 1:SW/HW dynamic */
2476 u8 bt_service;
2477 u8 bt_radio_shared_type;
2478 u8 bt_rfreg_origin_1e;
2479 u8 bt_rfreg_origin_1f;
2480 u8 bt_rssi_state;
2499 u8 bt_pre_rssi_state;
2500 u8 bt_pre_rssi_state1;
2502 u8 reg_bt_iso;
2503 u8 reg_bt_sco;
2505 u8 bt_active_zero_cnt;
2509 u8 bt_profile_case;
2510 u8 bt_profile_action;
2513 u8 lps_counter;
2520 void (*btc_ips_notify) (struct rtl_priv *rtlpriv, u8 type);
2521 void (*btc_lps_notify)(struct rtl_priv *rtlpriv, u8 type);
2522 void (*btc_scan_notify) (struct rtl_priv *rtlpriv, u8 scantype);
2523 void (*btc_connect_notify) (struct rtl_priv *rtlpriv, u8 action);
2529 u8 *tmp_buf, u8 length);
2534 u8 pkt_type);
2543 u8 (*proxim_get_var)(struct ieee80211_hw *hw, u8 type);
2607 u8 rate_mask[5];
2630 u8 priv[0] __aligned(sizeof(void *));
2701 ((u8)(_val))
2709 EF1BYTE(*((u8 *)(_ptr)))
2718 (*((u8 *)(_ptr))) = EF1BYTE(_val)
2760 (EF1BYTE(*((u8 *)(__pstart))))
2817 *((u8 *)(__pstart)) = EF1BYTE \
2820 ((((u8)__val) & BIT_LEN_MASK_8(__bitlen)) << (__bitoffset)) \
2866 (_os).octet = (u8 *)(_octet); \
2894 static inline u8 rtl_read_byte(struct rtl_priv *rtlpriv, u32 addr) rtl_read_byte()
2909 static inline void rtl_write_byte(struct rtl_priv *rtlpriv, u32 addr, u8 val8) rtl_write_byte()
2983 static inline u8 get_rf_type(struct rtl_phy *rtlphy) get_rf_type()
3010 const u8 *bssid) get_sta()
3016 u8 *mac_addr) rtl_find_sta()
/linux-4.1.27/arch/x86/boot/
H A Dvesa.h29 u8 reserved[236]; /* 20 */
36 u8 win_attr[2]; /* 2 */
45 u8 char_width; /* 22 */
46 u8 char_height; /* 23 */
47 u8 memory_planes; /* 24 */
48 u8 bpp; /* 25 */
49 u8 banks; /* 26 */
50 u8 memory_layout; /* 27 */
51 u8 bank_size; /* 28 */
52 u8 image_planes; /* 29 */
53 u8 page_function; /* 30 */
55 u8 rmask; /* 31 */
56 u8 rpos; /* 32 */
57 u8 gmask; /* 33 */
58 u8 gpos; /* 34 */
59 u8 bmask; /* 35 */
60 u8 bpos; /* 36 */
61 u8 resv_mask; /* 37 */
62 u8 resv_pos; /* 38 */
63 u8 dcm_info; /* 39 */
69 u8 reserved[206]; /* 50 */
/linux-4.1.27/drivers/firmware/
H A Dpcdp.h39 u8 type;
40 u8 bits;
41 u8 parity;
42 u8 stop_bits;
43 u8 pci_seg;
44 u8 pci_bus;
45 u8 pci_dev;
46 u8 pci_func;
53 u8 pci_prog_intfc;
54 u8 flags;
66 u8 interconnect;
67 u8 reserved;
69 u8 segment;
70 u8 bus;
71 u8 dev;
72 u8 fun;
78 u8 flags;
79 u8 trans;
83 u8 count; /* address space descriptors */
90 u8 type;
91 u8 flags;
99 u8 signature[4];
101 u8 rev; /* PCDP v2.0 is rev 3 */
102 u8 chksum;
103 u8 oemid[6];
104 u8 oem_tabid[8];
106 u8 creator_id[4];
/linux-4.1.27/net/mac80211/
H A Daes_ccm.h15 struct crypto_aead *ieee80211_aes_key_setup_encrypt(const u8 key[],
18 void ieee80211_aes_ccm_encrypt(struct crypto_aead *tfm, u8 *b_0, u8 *aad,
19 u8 *data, size_t data_len, u8 *mic,
21 int ieee80211_aes_ccm_decrypt(struct crypto_aead *tfm, u8 *b_0, u8 *aad,
22 u8 *data, size_t data_len, u8 *mic,
H A Daes_gcm.h14 void ieee80211_aes_gcm_encrypt(struct crypto_aead *tfm, u8 *j_0, u8 *aad,
15 u8 *data, size_t data_len, u8 *mic);
16 int ieee80211_aes_gcm_decrypt(struct crypto_aead *tfm, u8 *j_0, u8 *aad,
17 u8 *data, size_t data_len, u8 *mic);
18 struct crypto_aead *ieee80211_aes_gcm_key_setup_encrypt(const u8 key[],
H A Daes_cmac.h14 struct crypto_cipher *ieee80211_aes_cmac_key_setup(const u8 key[],
16 void ieee80211_aes_cmac(struct crypto_cipher *tfm, const u8 *aad,
17 const u8 *data, size_t data_len, u8 *mic);
18 void ieee80211_aes_cmac_256(struct crypto_cipher *tfm, const u8 *aad,
19 const u8 *data, size_t data_len, u8 *mic);
H A Daes_gmac.h14 struct crypto_aead *ieee80211_aes_gmac_key_setup(const u8 key[],
16 int ieee80211_aes_gmac(struct crypto_aead *tfm, const u8 *aad, u8 *nonce,
17 const u8 *data, size_t data_len, u8 *mic);
/linux-4.1.27/arch/mips/include/asm/sgi/
H A Dpi1.h9 u8 _data[3];
10 volatile u8 data;
11 u8 _ctrl[3];
12 volatile u8 ctrl;
20 u8 _status[3];
21 volatile u8 status;
29 u8 _dmactrl[3];
30 volatile u8 dmactrl;
41 u8 _intstat[3];
42 volatile u8 intstat;
49 u8 _intmask[3];
50 volatile u8 intmask; /* enabled low, reset high*/
57 u8 _timer1[3];
58 volatile u8 timer1;
60 u8 _timer2[3];
61 volatile u8 timer2;
63 u8 _timer3[3];
64 volatile u8 timer3;
66 u8 _timer4[3];
67 volatile u8 timer4;
H A Dioc.h25 u8 _ctrl1[3];
26 volatile u8 ctrl1;
27 u8 _data1[3];
28 volatile u8 data1;
29 u8 _ctrl2[3];
30 volatile u8 ctrl2;
31 u8 _data2[3];
32 volatile u8 data2;
36 u8 _data[3];
37 volatile u8 data;
38 u8 _command[3];
39 volatile u8 command;
43 u8 _istat0[3];
44 volatile u8 istat0; /* Interrupt status zero */
53 u8 _imask0[3];
54 volatile u8 imask0; /* Interrupt mask zero */
55 u8 _istat1[3];
56 volatile u8 istat1; /* Interrupt status one */
65 u8 _imask1[3];
66 volatile u8 imask1; /* Interrupt mask one */
67 u8 _vmeistat[3];
68 volatile u8 vmeistat; /* VME interrupt status */
69 u8 _cmeimask0[3];
70 volatile u8 cmeimask0; /* VME interrupt mask zero */
71 u8 _cmeimask1[3];
72 volatile u8 cmeimask1; /* VME interrupt mask one */
73 u8 _cmepol[3];
74 volatile u8 cmepol; /* VME polarity */
75 u8 _tclear[3];
76 volatile u8 tclear;
77 u8 _errstat[3];
78 volatile u8 errstat; /* Error status reg, reserved on INT2 */
80 u8 _tcnt0[3];
81 volatile u8 tcnt0; /* counter 0 */
82 u8 _tcnt1[3];
83 volatile u8 tcnt1; /* counter 1 */
84 u8 _tcnt2[3];
85 volatile u8 tcnt2; /* counter 2 */
86 u8 _tcword[3];
87 volatile u8 tcword; /* control word */
118 extern u8 sgi_ioc_reset, sgi_ioc_write;
125 u8 _gcsel[3];
126 volatile u8 gcsel;
127 u8 _genctrl[3];
128 volatile u8 genctrl;
129 u8 _panel[3];
130 volatile u8 panel;
138 u8 _sysid[3];
139 volatile u8 sysid;
144 u8 _read[3];
145 volatile u8 read;
147 u8 _dmasel[3];
148 volatile u8 dmasel;
156 u8 _reset[3];
157 volatile u8 reset;
165 u8 _write[3];
166 volatile u8 write;
/linux-4.1.27/drivers/gpu/drm/gma500/
H A Dintel_bios.h29 u8 signature[20]; /**< Always starts with 'VBT$' */
33 u8 vbt_checksum;
34 u8 reserved0;
41 u8 signature[16]; /**< Always 'BIOS_DATA_BLOCK' */
49 u8 type; /* 0 == desktop, 1 == mobile */
50 u8 relstage;
51 u8 chipset;
52 u8 lvds_present:1;
53 u8 tv_present:1;
54 u8 rsvd2:6; /* finish byte */
55 u8 rsvd3[4];
56 u8 signon[155];
57 u8 copyright[61];
59 u8 dos_boot_mode;
60 u8 bandwidth_percent;
61 u8 rsvd4; /* popup memory size */
62 u8 resize_pci_bios;
63 u8 rsvd5; /* is crt already on ddc2 */
107 u8 panel_fitting:2;
108 u8 flexaim:1;
109 u8 msg_enable:1;
110 u8 clear_screen:3;
111 u8 color_flip:1;
114 u8 download_ext_vbt:1;
115 u8 enable_ssc:1;
116 u8 ssc_freq:1;
117 u8 enable_lfp_on_override:1;
118 u8 disable_ssc_ddt:1;
119 u8 rsvd8:3; /* finish byte */
122 u8 disable_smooth_vision:1;
123 u8 single_dvi:1;
124 u8 rsvd9:6; /* finish byte */
127 u8 legacy_monitor_detect;
130 u8 int_crt_support:1;
131 u8 int_tv_support:1;
132 u8 int_efp_support:1;
133 u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */
134 u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
135 u8 rsvd11:3; /* finish byte */
199 u8 device_id[10]; /* ascii string */
201 u8 dvo_port; /* See Device_PORT_* above */
202 u8 i2c_pin;
203 u8 slave_addr;
204 u8 ddc_pin;
206 u8 dvo_cfg; /* See DEVICE_CFG_* above */
207 u8 dvo2_port;
208 u8 i2c2_pin;
209 u8 slave2_addr;
210 u8 ddc2_pin;
211 u8 capabilities;
212 u8 dvo_wiring;/* See DEVICE_WIRE_* above */
213 u8 dvo2_wiring;
215 u8 dvo_function;
221 u8 crt_ddc_gmbus_pin;
224 u8 dpms_acpi:1;
225 u8 skip_boot_crt_detect:1;
226 u8 dpms_aim:1;
227 u8 rsvd1:5; /* finish byte */
230 u8 boot_display[2];
231 u8 child_dev_size;
248 u8 panel_type;
249 u8 rsvd1;
251 u8 pfit_mode:2;
252 u8 pfit_text_mode_enhanced:1;
253 u8 pfit_gfx_mode_enhanced:1;
254 u8 pfit_ratio_auto:1;
255 u8 pixel_dither:1;
256 u8 lvds_edid:1;
257 u8 rsvd2:1;
258 u8 rsvd4;
262 u8 type:2;
263 u8 pol:1;
264 u8 gpio:3;
265 u8 gmbus:2;
267 u8 minbrightness;
268 u8 i2caddr;
269 u8 brightnesscmd;
276 u8 fp_table_size;
278 u8 dvo_table_size;
280 u8 pnp_table_size;
284 u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
307 u8 hactive_lo;
308 u8 hblank_lo;
309 u8 hblank_hi:4;
310 u8 hactive_hi:4;
311 u8 vactive_lo;
312 u8 vblank_lo;
313 u8 vblank_hi:4;
314 u8 vactive_hi:4;
315 u8 hsync_off_lo;
316 u8 hsync_pulse_width;
317 u8 vsync_pulse_width:4;
318 u8 vsync_off:4;
319 u8 rsvd0:6;
320 u8 hsync_off_hi:2;
321 u8 h_image;
322 u8 v_image;
323 u8 max_hv;
324 u8 h_border;
325 u8 v_border;
326 u8 rsvd1:3;
327 u8 digital:2;
328 u8 vsync_positive:1;
329 u8 hsync_positive:1;
330 u8 rsvd2:1;
337 u8 mfg_week;
338 u8 mfg_year;
360 u8 aimdb_id;
366 u8 fp_timing_size;
368 u8 dvo_timing_size;
370 u8 text_fitting_size;
372 u8 graphics_fitting_size;
381 u8 panel_backlight;
382 u8 h40_set_panel_type;
383 u8 panel_type;
384 u8 ssc_clk_freq;
387 u8 sclalarcoeff_tab_row_num;
388 u8 sclalarcoeff_tab_row_size;
389 u8 coefficient[8];
390 u8 panel_misc_bits_1;
391 u8 panel_misc_bits_2;
392 u8 panel_misc_bits_3;
393 u8 panel_misc_bits_4;
402 u8 boot_dev_algorithm:1;
403 u8 block_display_switch:1;
404 u8 allow_display_switch:1;
405 u8 hotplug_dvo:1;
406 u8 dual_view_zoom:1;
407 u8 int15h_hook:1;
408 u8 sprite_in_clone:1;
409 u8 primary_lfp_id:1;
413 u8 boot_mode_bpp;
414 u8 boot_mode_refresh;
431 u8 static_display:1;
432 u8 reserved2:7;
435 u8 legacy_crt_max_refresh;
437 u8 hdmi_termination;
438 u8 custom_vbt_version;
467 u8 rate:4;
468 u8 lanes:4;
469 u8 preemphasis:4;
470 u8 vswing:4;
/linux-4.1.27/drivers/misc/mei/
H A Dhw.h162 u8 hbm_cmd;
163 u8 data[0];
176 u8 hbm_cmd;
177 u8 me_addr;
178 u8 host_addr;
179 u8 data;
183 u8 minor_version;
184 u8 major_version;
188 u8 hbm_cmd;
189 u8 reserved;
194 u8 hbm_cmd;
195 u8 host_version_supported;
200 u8 hbm_cmd;
201 u8 reason;
202 u8 reserved[2];
206 u8 hbm_cmd;
207 u8 reserved[3];
211 u8 hbm_cmd;
212 u8 reason;
213 u8 reserved[2];
217 u8 hbm_cmd;
218 u8 reserved[3];
222 u8 hbm_cmd;
223 u8 reserved[3];
224 u8 valid_addresses[32];
229 u8 protocol_version;
230 u8 max_number_of_connections;
231 u8 fixed_address;
232 u8 single_recv_buf;
237 u8 hbm_cmd;
238 u8 me_addr;
239 u8 reserved[2];
243 u8 hbm_cmd;
244 u8 me_addr;
245 u8 status;
246 u8 reserved[1];
257 u8 hbm_cmd;
258 u8 reserved[3];
270 u8 hbm_cmd;
271 u8 me_addr;
272 u8 host_addr;
273 u8 reserved;
285 u8 hbm_cmd;
286 u8 me_addr;
287 u8 host_addr;
288 u8 status;
295 u8 hbm_cmd;
296 u8 me_addr;
297 u8 host_addr;
298 u8 reserved[MEI_FC_MESSAGE_RESERVED_LENGTH];
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8192se/
H A Dfw.h80 u8 signature_0;
82 u8 signature_1;
85 u8 hci_sel;
87 u8 chip_version;
89 u8 customer_id_0;
91 u8 customer_id_1;
94 u8 rf_config;
96 u8 usb_ep_num;
100 u8 regulatory_class_0;
102 u8 regulatory_class_1;
104 u8 regulatory_class_2;
106 u8 regulatory_class_3;
108 u8 rfintfs;
109 u8 def_nettype;
110 u8 rsvd010;
111 u8 rsvd011;
115 u8 lbk_mode;
118 u8 mp_mode;
119 u8 rsvd020;
120 u8 rsvd021;
121 u8 rsvd022;
122 u8 rsvd023;
123 u8 rsvd024;
124 u8 rsvd025;
128 u8 qos_en;
131 u8 bw_40mhz_en;
132 u8 amsdu2ampdu_en;
134 u8 ampdu_en;
136 u8 rate_control_offload;
138 u8 aggregation_offload;
139 u8 rsvd030;
140 u8 rsvd031;
144 u8 beacon_offload;
146 u8 mlme_offload;
148 u8 hwpc_offload;
150 u8 tcp_checksum_offload;
152 u8 tcp_offload;
154 u8 ps_control_offload;
156 u8 wwlan_offload;
157 u8 rsvd040;
161 u8 tcp_tx_frame_len_L;
163 u8 tcp_tx_frame_len_H;
165 u8 tcp_rx_frame_len_L;
167 u8 tcp_rx_frame_len_H;
168 u8 rsvd050;
169 u8 rsvd051;
170 u8 rsvd052;
171 u8 rsvd053;
217 u8 fw_imem[RTL8190_MAX_FIRMWARE_CODE_SIZE];
218 u8 fw_emem[RTL8190_MAX_FIRMWARE_CODE_SIZE];
221 u8 sz_fw_tmpbuffer[RTL8190_MAX_RAW_FIRMWARE_CODE_SIZE];
227 u8 mode;
228 u8 flag_low_traffic_en;
229 u8 flag_lpnav_en;
230 u8 flag_rf_low_snr_en;
232 u8 flag_dps_en;
233 u8 bcn_rx_en;
234 u8 bcn_pass_cnt;
236 u8 bcn_to;
239 u8 app_itv;
240 u8 awake_bcn_itvl;
241 u8 smart_ps;
243 u8 bcn_pass_period;
247 u8 opmode;
248 u8 ps_qos_info;
249 u8 bssid[6];
256 u8 kck[16];
258 u8 kek[16];
260 u8 tk1[16];
263 u8 tk2[16];
265 u8 tx_mic_key[8];
266 u8 rx_mic_key[8];
273 u8 pairwise_en_alg;
274 u8 group_en_alg;
370 void rtl92s_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode);
372 u8 mstatus, u8 ps_qosinfo);
/linux-4.1.27/drivers/video/fbdev/nvidia/
H A Dnv_proto.h8 void NVWriteCrtc(struct nvidia_par *par, u8 index, u8 value);
9 u8 NVReadCrtc(struct nvidia_par *par, u8 index);
10 void NVWriteGr(struct nvidia_par *par, u8 index, u8 value);
11 u8 NVReadGr(struct nvidia_par *par, u8 index);
12 void NVWriteSeq(struct nvidia_par *par, u8 index, u8 value);
13 u8 NVReadSeq(struct nvidia_par *par, u8 index);
14 void NVWriteAttr(struct nvidia_par *par, u8 index, u8 value);
15 u8 NVReadAttr(struct nvidia_par *par, u8 index);
16 void NVWriteMiscOut(struct nvidia_par *par, u8 value);
17 u8 NVReadMiscOut(struct nvidia_par *par);
18 void NVWriteDacMask(struct nvidia_par *par, u8 value);
19 void NVWriteDacReadAddr(struct nvidia_par *par, u8 value);
20 void NVWriteDacWriteAddr(struct nvidia_par *par, u8 value);
21 void NVWriteDacData(struct nvidia_par *par, u8 value);
22 u8 NVReadDacData(struct nvidia_par *par);
38 u8 ** out_edid);
46 u8 ** out_edid);
/linux-4.1.27/drivers/net/wireless/ath/wil6210/
H A Dwmi.h202 u8 network_type;
203 u8 dot11_auth_mode;
204 u8 auth_mode;
205 u8 pairwise_crypto_type;
206 u8 pairwise_crypto_len;
207 u8 group_crypto_type;
208 u8 group_crypto_len;
209 u8 ssid_len;
210 u8 ssid[WMI_MAX_SSID_LEN];
211 u8 channel;
212 u8 reserved0;
213 u8 bssid[WMI_MAC_LEN];
215 u8 dst_mac[WMI_MAC_LEN];
216 u8 reserved1[2];
223 u8 dst_mac[WMI_MAC_LEN];
238 u8 pmk[WMI_PMK_LEN];
245 u8 ssid[WMI_MAX_SSID_LEN];
246 u8 passphrase[WMI_PASSPHRASE_LEN];
247 u8 ssid_len;
248 u8 passphrase_len;
261 u8 key_index;
262 u8 key_type;
263 u8 key_usage; /* enum wmi_key_usage */
264 u8 key_len;
265 u8 key_rsc[8]; /* key replay sequence counter */
266 u8 key[WMI_MAX_KEY_LEN];
267 u8 key_op_ctrl; /* Additional Key Control information */
268 u8 mac[WMI_MAC_LEN];
275 u8 key_index;
276 u8 mac[WMI_MAC_LEN];
297 u8 direct_scan_mac_addr[6];
298 u8 reserved[2];
301 u8 scan_type; /* wmi_scan_type */
302 u8 num_channels; /* how many channels follow */
304 u8 channel;
305 u8 reserved;
324 u8 entry_index; /* 0 to MAX_PROBED_SSID_INDEX */
325 u8 flag; /* enum wmi_ssid_flag */
326 u8 ssid_len;
327 u8 ssid[WMI_MAX_SSID_LEN];
349 u8 mgmt_frm_type; /* enum wmi_mgmt_frame_type */
350 u8 reserved;
352 u8 ie_info[0];
359 u8 dst_mac[WMI_MAC_LEN];
415 u8 ssid[WMI_MAX_SSID_LEN];
422 u8 channel;
423 u8 reserved[3];
433 u8 network_type;
434 u8 pcp_max_assoc_sta;
435 u8 disable_sec_offload;
436 u8 disable_sec;
454 u8 mac[WMI_MAC_LEN];
455 u8 port_role;
456 u8 mid;
463 u8 mid;
464 u8 reserved[3];
477 u8 discovery_mode; /* wmi_discovery_mode */
478 u8 channel;
491 u8 power_source; /* wmi_power_source_type */
492 u8 reserved[3];
500 u8 pcp_max_assoc_sta;
501 u8 reserved0[9];
502 u8 network_type;
503 u8 channel;
504 u8 disable_sec_offload;
505 u8 disable_sec;
512 u8 dst_mac[WMI_MAC_LEN];
514 u8 payload[0];
564 u8 ringid; /* 0-23 vrings */
566 u8 cidxtid;
568 u8 encap_trans_type;
569 u8 ds_cfg; /* 802.3 DS cfg */
570 u8 nwifi_ds_trans_type;
578 u8 mac_ctrl;
583 u8 to_resolution;
584 u8 agg_max_wsize;
604 u8 ringid; /* 0-23 vrings */
605 u8 encap_trans_type;
606 u8 ds_cfg; /* 802.3 DS cfg */
607 u8 nwifi_ds_trans_type;
619 u8 ringid;
620 u8 agg_max_wsize;
622 u8 amsdu;
629 u8 ringid;
630 u8 reserved;
638 u8 cid;
639 u8 year;
640 u8 month;
641 u8 day;
643 u8 hour;
644 u8 minute;
645 u8 second;
646 u8 miliseconds;
672 u8 channel;
673 u8 reserved[3];
701 u8 mid;
702 u8 decap_trans_type;
710 u8 l2_802_3_offload_ctrl;
718 u8 l2_nwifi_offload_ctrl;
720 u8 vlan_id;
721 u8 nwifi_ds_trans_type;
729 u8 l3_l4_ctrl;
743 u8 ring_ctrl;
749 u8 reorder_type;
750 u8 reserved;
758 u8 cidxtid;
759 u8 dialog_token;
769 u8 cidxtid;
770 u8 reserved;
778 u8 cidxtid;
779 u8 dialog_token;
791 u8 mac[WMI_MAC_LEN];
792 u8 reserved[2];
799 u8 dst_mac[WMI_MAC_LEN];
801 u8 eapol[0];
961 u8 cid;
962 u8 reserved0[3];
963 u8 bssid[WMI_MAC_LEN];
964 u8 channel;
965 u8 reserved1;
966 u8 network_type;
967 u8 reserved2[3];
969 u8 ssid[WMI_MAX_SSID_LEN];
978 u8 major;
979 u8 minor;
988 u8 mac[WMI_MAC_LEN];
989 u8 auth_mode;
990 u8 crypt_mode;
998 u8 src_mac[WMI_MAC_LEN];
1000 u8 eapol[0];
1020 u8 mac[WMI_MAC_LEN];
1021 u8 phy_capability; /* enum wmi_phy_capability */
1022 u8 numof_additional_mids;
1041 u8 sqi;
1042 u8 reserved[3];
1049 u8 channel;
1050 u8 reserved0;
1051 u8 bssid[WMI_MAC_LEN];
1054 u8 network_type;
1055 u8 reserved1[3];
1056 u8 beacon_ie_len;
1057 u8 assoc_req_len;
1058 u8 assoc_resp_len;
1059 u8 cid;
1060 u8 reserved2[3];
1061 u8 assoc_info[0];
1085 u8 bssid[WMI_MAC_LEN]; /* set if known */
1086 u8 disconnect_reason; /* see wmi_disconnect_reason */
1087 u8 assoc_resp_len; /* not used */
1088 u8 assoc_info[0]; /* not used */
1123 u8 reserved[2];
1124 u8 ringid;
1125 u8 agg_wsize;
1127 u8 amsdu;
1134 u8 cidxtid;
1135 u8 from_initiator;
1143 u8 ringid;
1144 u8 status;
1145 u8 reserved[2];
1153 u8 cidxtid;
1154 u8 reserved;
1162 u8 cidxtid;
1163 u8 dialog_token;
1191 u8 cid;
1192 u8 reserved[3];
1200 u8 cid;
1201 u8 reserved[3];
1208 u8 channel;
1209 u8 reserved[3];
1216 u8 status; /* wmi_fw_status */
1217 u8 reserved[3];
1224 u8 status; /* wmi_fw_status */
1225 u8 reserved[3];
1232 u8 status; /* wmi_fw_status */
1233 u8 reserved[3];
1240 u8 status; /* wmi_fw_status */
1241 u8 reserved[3];
1248 u8 status; /* wmi_fw_status */
1249 u8 reserved[3];
1256 u8 status; /* wmi_fw_status */
1257 u8 reserved[3];
1277 u8 status; /* enum wmi_sw_tx_status */
1278 u8 reserved[3];
1303 u8 ssid[WMI_MAX_SSID_LEN];
1310 u8 mcs;
1312 u8 range;
1313 u8 sqi;
1317 u8 qid;
1318 u8 mid;
1319 u8 cid;
1320 u8 channel; /* From Radio MNGR */
1327 u8 payload[0];
1332 u8 payload[0];
/linux-4.1.27/drivers/net/wireless/p54/
H A Dlmac.h85 u8 rts_tries;
86 u8 tries;
87 u8 data[0];
143 u8 data[0];
148 u8 magic2;
149 u8 pad;
150 u8 magic[4];
151 u8 data[0];
174 u8 antenna;
175 u8 rate;
176 u8 rssi;
177 u8 quality;
178 u8 decrypt_status;
179 u8 rssi_raw;
182 u8 align[0];
211 u8 status;
212 u8 tries;
213 u8 ack_rssi;
214 u8 quality;
216 u8 antenna;
217 u8 padding;
251 u8 rateset[8];
252 u8 rts_rate_idx;
253 u8 crypt_offset;
254 u8 key_type;
255 u8 key_len;
256 u8 key[16];
257 u8 hw_queue;
258 u8 backlog;
260 u8 tx_antenna;
263 u8 cts_rate;
267 u8 output_power;
268 u8 cts_rate;
269 u8 unalloc;
272 u8 unalloc2[2];
273 u8 align[0];
293 u8 mac_addr[ETH_ALEN];
294 u8 bssid[ETH_ALEN];
295 u8 rx_antenna;
296 u8 rx_align;
300 u8 rts_rates[8];
314 u8 sbss_offset;
315 u8 mcast_window;
316 u8 rx_rssi_threshold;
317 u8 rx_ed_threshold;
336 u8 scan_params[20];
341 u8 rf_power;
342 u8 pa_detector;
343 u8 data_barker;
344 u8 data_bpsk;
345 u8 data_qpsk;
346 u8 data_16qam;
347 u8 data_64qam;
348 u8 padding;
352 u8 pa_points_per_curve;
353 u8 val_barker;
354 u8 val_bpsk;
355 u8 val_qpsk;
356 u8 val_16qam;
357 u8 val_64qam;
359 u8 dup_bpsk;
360 u8 dup_qpsk;
361 u8 dup_16qam;
362 u8 dup_64qam;
393 u8 rts_rates[8];
403 u8 flags;
404 u8 slottime;
405 u8 sifs;
406 u8 eofpad;
408 u8 mapping[4];
440 u8 entry;
441 u8 key_id;
442 u8 mac[ETH_ALEN];
443 u8 padding[2];
444 u8 key_type;
445 u8 key_len;
446 u8 key[24];
450 u8 flags;
451 u8 queue;
452 u8 backlog;
453 u8 pad;
479 u8 beacon_rssi_skip_max;
480 u8 rssi_delta_threshold;
481 u8 nr;
482 u8 exclude[1];
490 u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
498 u8 addr[ETH_ALEN];
504 u8 count;
505 u8 padding[3];
520 u8 ipv4_addr[4];
540 int p54_sta_unlock(struct p54_common *priv, u8 *addr);
551 int p54_upload_key(struct p54_common *priv, u8 algo, int slot,
552 u8 idx, u8 len, u8 *addr, u8* key);
560 u8 *p54_find_ie(struct sk_buff *skb, u8 ie);
/linux-4.1.27/arch/arm/crypto/
H A Dsha1.h7 extern int sha1_update_arm(struct shash_desc *desc, const u8 *data,
10 extern int sha1_finup_arm(struct shash_desc *desc, const u8 *data,
11 unsigned int len, u8 *out);
H A Dsha256_glue.h8 int crypto_sha256_arm_update(struct shash_desc *desc, const u8 *data,
11 int crypto_sha256_arm_finup(struct shash_desc *desc, const u8 *data,
12 unsigned int len, u8 *hash);
/linux-4.1.27/include/linux/mfd/
H A Djanz.h22 u8 unused1;
28 u8 int_disable;
29 u8 unused2;
35 u8 int_enable;
36 u8 unused3;
39 u8 reset_assert;
40 u8 unused4;
43 u8 reset_deassert;
44 u8 unused5;
47 u8 eep;
48 u8 unused6;
51 u8 enid;
H A Dviperboard.h54 u8 cmd;
56 u8 len1;
57 u8 len2;
58 u8 last;
59 u8 chan;
64 u8 cmd;
66 u8 len0;
67 u8 len1;
68 u8 len2;
69 u8 len3;
70 u8 len4;
71 u8 len5;
77 u8 unknown[11];
78 u8 status;
83 u8 data[VPRBRD_I2C_MSG_LEN
89 u8 data[VPRBRD_I2C_MSG_LEN
94 u8 cmd;
95 u8 addr;
96 u8 unknown1;
98 u8 unknown2;
99 u8 unknown3;
106 u8 buf[sizeof(struct vprbrd_i2c_write_msg)];
/linux-4.1.27/drivers/scsi/csiostor/
H A Dt4fw_api_stor.h118 u8 protocol;
119 u8 event_cause;
120 u8 cur_state;
121 u8 prev_state;
126 u8 protocol;
127 u8 event_cause;
128 u8 flags;
129 u8 rjt_reason;
130 u8 cur_login_st;
131 u8 prev_login_st;
133 u8 rd_xfer_rdy_to_rport_type;
134 u8 vft_to_qos;
135 u8 org_proc_assoc_to_acc_rsp_code;
136 u8 enh_disc_to_tgt;
137 u8 wwnn[8];
138 u8 wwpn[8];
140 u8 fc_oui[3];
141 u8 r_id[3];
145 u8 protocol;
146 u8 event_cause;
147 u8 flags;
148 u8 r3;
165 u8 r5[6];
187 u8 tmo_val;
188 u8 els_ct_type;
189 u8 ctl_pri;
190 u8 cp_en_class;
192 u8 fl_to_sp;
193 u8 l_id[3];
194 u8 r5;
195 u8 r_id[3];
212 u8 tmo_val;
213 u8 use_xfer_cnt;
216 u8 ctl_pri;
217 u8 cp_en_class;
218 u8 r3_lo[2];
221 u8 r3[4];
238 u8 tmo_val;
239 u8 use_xfer_cnt;
242 u8 ctl_pri;
243 u8 cp_en_class;
244 u8 r3_lo[2];
247 u8 r3[4];
264 u8 tmo_val;
265 u8 r3;
268 u8 ctl_pri;
269 u8 cp_en_class;
270 u8 r4_lo[2];
273 u8 r4[4];
276 u8 r5[8];
292 u8 tmo_val;
293 u8 sub_opcode_to_chk_all_io;
294 u8 r3[4];
332 u8 r3;
333 u8 lstatus;
335 u8 r4;
336 u8 set_vlan;
340 u8 phy_mac[6];
341 u8 vnport_wwnn[8];
342 u8 vnport_wwpn[8];
358 u8 vnport_mac[6];
359 u8 vnport_wwnn[8];
360 u8 vnport_wwpn[8];
361 u8 cmn_srv_parms[16];
362 u8 clsp_word_0_1[8];
377 u8 r3[7];
378 u8 cos;
379 u8 lport_wwnn[8];
380 u8 lport_wwpn[8];
381 u8 cmn_srv_parms[16];
382 u8 cls_srv_parms[16];
392 u8 nstats_port;
393 u8 port_valid_ix;
441 u8 no_fka_req;
442 u8 no_vnp;
472 u8 rx_data_ddp_err;
473 u8 ddp_flt_set_err;
475 u8 bad_st_abrt_req;
476 u8 no_io_abrt_req;
477 u8 abort_tmo;
478 u8 abort_tmo_2;
480 u8 no_ppod_res_tmo;
481 u8 bp_tmo;
482 u8 adap_auto_cls;
483 u8 no_io_cls_req;
496 u8 adisc_rjt_rcvd;
497 u8 scr_rjt;
498 u8 ct_rjt;
499 u8 inval_bls_rcvd;
516 u8 mac[6];
517 u8 name_id[8];
518 u8 fabric[8];
521 u8 vlan_id;
522 u8 fc_map[3];
525 u8 r7_hi;
526 u8 fpma_to_portid;
527 u8 spma_mac[6];
/linux-4.1.27/include/rdma/
H A Dib_smi.h46 u8 base_version;
47 u8 mgmt_class;
48 u8 class_version;
49 u8 method;
51 u8 hop_ptr;
52 u8 hop_cnt;
60 u8 reserved[28];
61 u8 data[IB_SMP_DATA_SIZE];
62 u8 initial_path[IB_SMP_MAX_PATH_HOPS];
63 u8 return_path[IB_SMP_MAX_PATH_HOPS];
94 u8 local_port_num;
95 u8 link_width_enabled;
96 u8 link_width_supported;
97 u8 link_width_active;
98 u8 linkspeed_portstate; /* 4 bits, 4 bits */
99 u8 portphysstate_linkdown; /* 4 bits, 4 bits */
100 u8 mkeyprot_resv_lmc; /* 2 bits, 3, 3 */
101 u8 linkspeedactive_enabled; /* 4 bits, 4 bits */
102 u8 neighbormtu_mastersmsl; /* 4 bits, 4 bits */
103 u8 vlcap_inittype; /* 4 bits, 4 bits */
104 u8 vl_high_limit;
105 u8 vl_arb_high_cap;
106 u8 vl_arb_low_cap;
107 u8 inittypereply_mtucap; /* 4 bits, 4 bits */
108 u8 vlstallcnt_hoqlife; /* 3 bits, 5 bits */
109 u8 operationalvl_pei_peo_fpi_fpo; /* 4 bits, 1, 1, 1, 1 */
113 u8 guid_cap;
114 u8 clientrereg_resv_subnetto; /* 1 bit, 2 bits, 5 */
115 u8 resv_resptimevalue; /* 3 bits, 5 bits */
116 u8 localphyerrors_overrunerrors; /* 4 bits, 4 bits */
118 u8 resv;
119 u8 link_roundtrip_latency[3];
122 static inline u8 ib_get_smp_direction()
/linux-4.1.27/drivers/gpu/drm/i915/
H A Dintel_bios.h34 u8 signature[20]; /**< Always starts with 'VBT$' */
38 u8 vbt_checksum;
39 u8 reserved0;
45 u8 signature[16]; /**< Always 'BIOS_DATA_BLOCK' */
53 u8 type; /* 0 == desktop, 1 == mobile */
54 u8 relstage;
55 u8 chipset;
56 u8 lvds_present:1;
57 u8 tv_present:1;
58 u8 rsvd2:6; /* finish byte */
59 u8 rsvd3[4];
60 u8 signon[155];
61 u8 copyright[61];
63 u8 dos_boot_mode;
64 u8 bandwidth_percent;
65 u8 rsvd4; /* popup memory size */
66 u8 resize_pci_bios;
67 u8 rsvd5; /* is crt already on ddc2 */
113 u8 panel_fitting:2;
114 u8 flexaim:1;
115 u8 msg_enable:1;
116 u8 clear_screen:3;
117 u8 color_flip:1;
120 u8 download_ext_vbt:1;
121 u8 enable_ssc:1;
122 u8 ssc_freq:1;
123 u8 enable_lfp_on_override:1;
124 u8 disable_ssc_ddt:1;
125 u8 rsvd7:1;
126 u8 display_clock_mode:1;
127 u8 rsvd8:1; /* finish byte */
130 u8 disable_smooth_vision:1;
131 u8 single_dvi:1;
132 u8 rsvd9:1;
133 u8 fdi_rx_polarity_inverted:1;
134 u8 rsvd10:4; /* finish byte */
137 u8 legacy_monitor_detect;
140 u8 int_crt_support:1;
141 u8 int_tv_support:1;
142 u8 int_efp_support:1;
143 u8 dp_ssc_enb:1; /* PCH attached eDP supports SSC */
144 u8 dp_ssc_freq:1; /* SSC freq for PCH attached eDP */
145 u8 rsvd11:3; /* finish byte */
212 u8 device_id[10]; /* ascii string */
214 u8 dvo_port; /* See Device_PORT_* above */
215 u8 i2c_pin;
216 u8 slave_addr;
217 u8 ddc_pin;
219 u8 dvo_cfg; /* See DEVICE_CFG_* above */
220 u8 dvo2_port;
221 u8 i2c2_pin;
222 u8 slave2_addr;
223 u8 ddc2_pin;
224 u8 capabilities;
225 u8 dvo_wiring;/* See DEVICE_WIRE_* above */
226 u8 dvo2_wiring;
228 u8 dvo_function;
237 u8 not_common1[12];
238 u8 dvo_port;
239 u8 not_common2[2];
240 u8 ddc_pin;
249 u8 raw[33];
259 u8 crt_ddc_gmbus_pin;
262 u8 dpms_acpi:1;
263 u8 skip_boot_crt_detect:1;
264 u8 dpms_aim:1;
265 u8 rsvd1:5; /* finish byte */
268 u8 boot_display[2];
269 u8 child_dev_size;
289 u8 panel_type;
290 u8 rsvd1;
292 u8 pfit_mode:2;
293 u8 pfit_text_mode_enhanced:1;
294 u8 pfit_gfx_mode_enhanced:1;
295 u8 pfit_ratio_auto:1;
296 u8 pixel_dither:1;
297 u8 lvds_edid:1;
298 u8 rsvd2:1;
299 u8 rsvd4;
317 u8 fp_table_size;
319 u8 dvo_table_size;
321 u8 pnp_table_size;
325 u8 lvds_entries; /* followed by one or more lvds_data_ptr structs */
348 u8 hactive_lo;
349 u8 hblank_lo;
350 u8 hblank_hi:4;
351 u8 hactive_hi:4;
352 u8 vactive_lo;
353 u8 vblank_lo;
354 u8 vblank_hi:4;
355 u8 vactive_hi:4;
356 u8 hsync_off_lo;
357 u8 hsync_pulse_width;
358 u8 vsync_pulse_width:4;
359 u8 vsync_off:4;
360 u8 rsvd0:6;
361 u8 hsync_off_hi:2;
362 u8 h_image;
363 u8 v_image;
364 u8 max_hv;
365 u8 h_border;
366 u8 v_border;
367 u8 rsvd1:3;
368 u8 digital:2;
369 u8 vsync_positive:1;
370 u8 hsync_positive:1;
371 u8 rsvd2:1;
378 u8 mfg_week;
379 u8 mfg_year;
396 u8 type:2;
397 u8 active_low_pwm:1;
398 u8 obsolete1:5;
400 u8 min_brightness;
401 u8 obsolete2;
402 u8 obsolete3;
406 u8 entry_size;
408 u8 level[16];
420 u8 aimdb_id;
426 u8 fp_timing_size;
428 u8 dvo_timing_size;
430 u8 text_fitting_size;
432 u8 graphics_fitting_size;
441 u8 panel_backlight;
442 u8 h40_set_panel_type;
443 u8 panel_type;
444 u8 ssc_clk_freq;
447 u8 sclalarcoeff_tab_row_num;
448 u8 sclalarcoeff_tab_row_size;
449 u8 coefficient[8];
450 u8 panel_misc_bits_1;
451 u8 panel_misc_bits_2;
452 u8 panel_misc_bits_3;
453 u8 panel_misc_bits_4;
463 u8 boot_dev_algorithm:1;
464 u8 block_display_switch:1;
465 u8 allow_display_switch:1;
466 u8 hotplug_dvo:1;
467 u8 dual_view_zoom:1;
468 u8 int15h_hook:1;
469 u8 sprite_in_clone:1;
470 u8 primary_lfp_id:1;
474 u8 boot_mode_bpp;
475 u8 boot_mode_refresh;
492 u8 static_display:1;
493 u8 reserved2:7;
496 u8 legacy_crt_max_refresh;
498 u8 hdmi_termination;
499 u8 custom_vbt_version;
542 u8 rate:4;
543 u8 lanes:4;
544 u8 preemphasis:4;
545 u8 vswing:4;
562 u8 full_link:1;
563 u8 require_aux_to_wakeup:1;
564 u8 feature_bits_rsvd:6;
567 u8 idle_frames:4;
568 u8 lines_to_wait:3;
569 u8 wait_times_rsvd:1;
827 u8 rsvd5;
835 u8 byte_clk_sel:2;
837 u8 rsvd6:6;
868 u8 tclk_miss;
869 u8 tclk_post;
870 u8 rsvd12;
871 u8 tclk_pre;
872 u8 tclk_prepare;
873 u8 tclk_settle;
874 u8 tclk_term_enable;
875 u8 tclk_trail;
877 u8 rsvd13;
878 u8 td_term_enable;
879 u8 teot;
880 u8 ths_exit;
881 u8 ths_prepare;
883 u8 rsvd14;
884 u8 ths_settle;
885 u8 ths_skip;
886 u8 ths_trail;
887 u8 tinit;
888 u8 tlpx;
889 u8 rsvd15[3];
892 u8 panel_enable;
893 u8 bl_enable;
894 u8 pwm_enable;
895 u8 reset_r_n;
896 u8 pwr_down_r;
897 u8 stdby_r_n;
925 u8 version;
926 u8 data[0];
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmfmac/
H A Dflowring.h24 u8 mac[ETH_ALEN];
25 u8 fifo;
26 u8 ifidx;
27 u8 flowid;
37 u8 hash_id;
44 u8 mac[ETH_ALEN];
60 u32 brcmf_flowring_lookup(struct brcmf_flowring *flow, u8 da[ETH_ALEN],
61 u8 prio, u8 ifidx);
62 u32 brcmf_flowring_create(struct brcmf_flowring *flow, u8 da[ETH_ALEN],
63 u8 prio, u8 ifidx);
64 void brcmf_flowring_delete(struct brcmf_flowring *flow, u8 flowid);
65 void brcmf_flowring_open(struct brcmf_flowring *flow, u8 flowid);
66 u8 brcmf_flowring_tid(struct brcmf_flowring *flow, u8 flowid);
67 void brcmf_flowring_enqueue(struct brcmf_flowring *flow, u8 flowid,
69 struct sk_buff *brcmf_flowring_dequeue(struct brcmf_flowring *flow, u8 flowid);
70 void brcmf_flowring_reinsert(struct brcmf_flowring *flow, u8 flowid,
72 u32 brcmf_flowring_qlen(struct brcmf_flowring *flow, u8 flowid);
73 u8 brcmf_flowring_ifidx_get(struct brcmf_flowring *flow, u8 flowid);
79 u8 peer[ETH_ALEN]);
81 u8 peer[ETH_ALEN]);
/linux-4.1.27/include/linux/input/
H A Dlm8333.h20 extern int lm8333_read8(struct lm8333 *lm8333, u8 cmd);
21 extern int lm8333_write8(struct lm8333 *lm8333, u8 cmd, u8 val);
22 extern int lm8333_read_block(struct lm8333 *lm8333, u8 cmd, u8 len, u8 *buf);
H A Dedt-ft5x06.h18 u8 gain;
19 u8 threshold;
20 u8 offset;
21 u8 report_rate;
/linux-4.1.27/arch/s390/include/asm/
H A Dchpid.h12 u8 flags;
13 u8 lsn;
14 u8 desc;
15 u8 chpid;
16 u8 swla;
17 u8 zeroes;
18 u8 chla;
19 u8 chpp;
H A Dsclp.h16 u8 recognized[SCLP_CHP_INFO_MASK_SIZE];
17 u8 standby[SCLP_CHP_INFO_MASK_SIZE];
18 u8 configured[SCLP_CHP_INFO_MASK_SIZE];
30 u8 core_id;
31 u8 reserved0[2];
32 u8 : 3; member in struct:sclp_cpu_entry
33 u8 siif : 1;
34 u8 sigpif : 1;
35 u8 : 3; member in struct:sclp_cpu_entry
36 u8 reserved2[10];
37 u8 type;
38 u8 reserved1;
50 int sclp_cpu_configure(u8 cpu);
51 int sclp_cpu_deconfigure(u8 cpu);
55 unsigned int sclp_get_mtid(u8 cpu_type);
H A Dipl.h35 u8 reserved1[3];
36 u8 version;
38 u8 pbt;
39 u8 flags;
41 u8 loadparm[8];
45 u8 reserved1[305-1];
46 u8 opt;
47 u8 reserved2[3];
50 u8 reserved4[4];
54 u8 reserved5[12];
57 u8 reserved6[260];
58 u8 scp_data[];
66 u8 reserved1[84];
67 u8 reserved2[2];
69 u8 vm_flags;
70 u8 reserved3[3];
72 u8 nss_name[8];
73 u8 vm_parm[DIAG308_VMPARM_SIZE];
74 u8 reserved4[8];
/linux-4.1.27/include/acpi/
H A Dacrestyp.h56 #define ACPI_READ_ONLY_MEMORY (u8) 0x00
57 #define ACPI_READ_WRITE_MEMORY (u8) 0x01
59 #define ACPI_NON_CACHEABLE_MEMORY (u8) 0x00
60 #define ACPI_CACHABLE_MEMORY (u8) 0x01
61 #define ACPI_WRITE_COMBINING_MEMORY (u8) 0x02
62 #define ACPI_PREFETCHABLE_MEMORY (u8) 0x03
72 #define ACPI_NON_ISA_ONLY_RANGES (u8) 0x01
73 #define ACPI_ISA_ONLY_RANGES (u8) 0x02
78 #define ACPI_SPARSE_TRANSLATION (u8) 0x01
83 #define ACPI_DECODE_10 (u8) 0x00 /* 10-bit IO address decode */
84 #define ACPI_DECODE_16 (u8) 0x01 /* 16-bit IO address decode */
92 #define ACPI_LEVEL_SENSITIVE (u8) 0x00
93 #define ACPI_EDGE_SENSITIVE (u8) 0x01
97 #define ACPI_ACTIVE_HIGH (u8) 0x00
98 #define ACPI_ACTIVE_LOW (u8) 0x01
99 #define ACPI_ACTIVE_BOTH (u8) 0x02
103 #define ACPI_EXCLUSIVE (u8) 0x00
104 #define ACPI_SHARED (u8) 0x01
108 #define ACPI_NOT_WAKE_CAPABLE (u8) 0x00
109 #define ACPI_WAKE_CAPABLE (u8) 0x01
114 #define ACPI_COMPATIBILITY (u8) 0x00
115 #define ACPI_TYPE_A (u8) 0x01
116 #define ACPI_TYPE_B (u8) 0x02
117 #define ACPI_TYPE_F (u8) 0x03
119 #define ACPI_NOT_BUS_MASTER (u8) 0x00
120 #define ACPI_BUS_MASTER (u8) 0x01
122 #define ACPI_TRANSFER_8 (u8) 0x00
123 #define ACPI_TRANSFER_8_16 (u8) 0x01
124 #define ACPI_TRANSFER_16 (u8) 0x02
129 #define ACPI_GOOD_CONFIGURATION (u8) 0x00
130 #define ACPI_ACCEPTABLE_CONFIGURATION (u8) 0x01
131 #define ACPI_SUB_OPTIMAL_CONFIGURATION (u8) 0x02
136 #define ACPI_MEMORY_RANGE (u8) 0x00
137 #define ACPI_IO_RANGE (u8) 0x01
138 #define ACPI_BUS_NUMBER_RANGE (u8) 0x02
140 #define ACPI_ADDRESS_NOT_FIXED (u8) 0x00
141 #define ACPI_ADDRESS_FIXED (u8) 0x01
143 #define ACPI_POS_DECODE (u8) 0x00
144 #define ACPI_SUB_DECODE (u8) 0x01
148 #define ACPI_PRODUCER (u8) 0x00
149 #define ACPI_CONSUMER (u8) 0x01
161 u8 data[ACPI_UUID_LENGTH];
165 u8 subtype;
166 u8 data[ACPI_UUID_LENGTH];
173 u8 descriptor_length;
174 u8 triggering;
175 u8 polarity;
176 u8 sharable;
177 u8 wake_capable;
178 u8 interrupt_count;
179 u8 interrupts[1];
183 u8 type;
184 u8 bus_master;
185 u8 transfer;
186 u8 channel_count;
187 u8 channels[1];
191 u8 descriptor_length;
192 u8 compatibility_priority;
193 u8 performance_robustness;
202 u8 io_decode;
203 u8 alignment;
204 u8 address_length;
211 u8 address_length;
217 u8 width;
231 u8 byte_data[1];
238 u8 uuid_subtype;
239 u8 uuid[ACPI_UUID_LENGTH];
240 u8 byte_data[1];
244 u8 checksum;
248 u8 write_protect;
256 u8 write_protect;
264 u8 write_protect;
270 u8 write_protect;
271 u8 caching;
272 u8 range_type;
273 u8 translation;
277 u8 range_type;
278 u8 translation;
279 u8 translation_type;
280 u8 reserved1;
289 u8 type_specific;
293 u8 index;
301 u8 resource_type; \
302 u8 producer_consumer; \
303 u8 decode; \
304 u8 min_address_fixed; \
305 u8 max_address_fixed; \
351 ACPI_RESOURCE_ADDRESS_COMMON u8 revision_ID;
357 u8 producer_consumer;
358 u8 triggering;
359 u8 polarity;
360 u8 sharable;
361 u8 wake_capable;
362 u8 interrupt_count;
368 u8 space_id;
369 u8 bit_width;
370 u8 bit_offset;
371 u8 access_size;
376 u8 revision_id;
377 u8 connection_type;
378 u8 producer_consumer; /* For values, see Producer/Consumer above */
379 u8 pin_config;
380 u8 sharable; /* For values, see Interrupt Attributes above */
381 u8 wake_capable; /* For values, see Interrupt Attributes above */
382 u8 io_restriction;
383 u8 triggering; /* For values, see Interrupt Attributes above */
384 u8 polarity; /* For values, see Interrupt Attributes above */
391 u8 *vendor_data;
416 u8 revision_id; \
417 u8 type; \
418 u8 producer_consumer; /* For values, see Producer/Consumer above */\
419 u8 slave_mode; \
420 u8 type_revision_id; \
424 u8 *vendor_data;
441 ACPI_RESOURCE_SERIAL_COMMON u8 access_mode;
452 ACPI_RESOURCE_SERIAL_COMMON u8 wire_mode;
453 u8 device_polarity;
454 u8 data_bit_length;
455 u8 clock_phase;
456 u8 clock_polarity;
482 ACPI_RESOURCE_SERIAL_COMMON u8 endian;
483 u8 data_bits;
484 u8 stop_bits;
485 u8 flow_control;
486 u8 parity;
487 u8 lines_enabled;
/linux-4.1.27/drivers/net/wireless/ath/carl9170/
H A Deeprom.h50 u8 switchSettling;
51 u8 txRxAttenCh[AR5416_MAX_CHAINS];
52 u8 rxTxMarginCh[AR5416_MAX_CHAINS];
55 u8 xlnaGainCh[AR5416_MAX_CHAINS];
56 u8 txEndToXpaOff;
57 u8 txEndToRxOn;
58 u8 txFrameToXpaOn;
59 u8 thresh62;
61 u8 xpdGain;
62 u8 xpd;
65 u8 pdGainOverlap;
66 u8 ob;
67 u8 db;
68 u8 xpaBiasLvl;
69 u8 pwrDecreaseFor2Chain;
70 u8 pwrDecreaseFor3Chain;
71 u8 txFrameToDataStart;
72 u8 txFrameToPaOn;
73 u8 ht40PowerIncForPdadc;
74 u8 bswAtten[AR5416_MAX_CHAINS];
75 u8 bswMargin[AR5416_MAX_CHAINS];
76 u8 swSettleHt40;
77 u8 reserved[22];
80 u8 spurRangeLow;
81 u8 spurRangeHigh;
89 u8 pwr_pdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
90 u8 vpd_pdg[AR5416_NUM_PD_GAINS][AR5416_PD_GAIN_ICEPTS];
102 u8 freq;
103 u8 power[4];
107 u8 freq;
108 u8 power[8];
114 u8 channel;
116 u8 power_flags;
130 u8 operating_flags;
133 u8 misc;
135 u8 mac_address[6];
136 u8 rx_mask;
137 u8 tx_mask;
142 u8 deviceType;
143 u8 reserved[33];
145 u8 customer_data[64];
150 u8 cal_freq_pier_5G[AR5416_NUM_5G_CAL_PIERS];
151 u8 cal_freq_pier_2G[AR5416_NUM_2G_CAL_PIERS];
172 u8 ctl_index[AR5416_NUM_CTLS];
176 u8 pad;
/linux-4.1.27/drivers/net/ethernet/emulex/benet/
H A Dbe_hw.h206 u8 rsvd0[32]; /* dword 0 */
207 u8 rsvd1[32]; /* dword 1 */
208 u8 complete; /* dword 2 */
209 u8 event;
210 u8 crc;
211 u8 forward;
212 u8 lso6;
213 u8 mgmt;
214 u8 ipcs;
215 u8 udpcs;
216 u8 tcpcs;
217 u8 lso;
218 u8 vlan;
219 u8 gso[2];
220 u8 num_wrb[5];
221 u8 lso_mss[14];
222 u8 len[16]; /* dword 3 */
223 u8 vlan_tag[16];
253 u8 wrb_index[16]; /* dword 0 */
254 u8 ct[2]; /* dword 0 */
255 u8 port[2]; /* dword 0 */
256 u8 rsvd0[8]; /* dword 0 */
257 u8 status[4]; /* dword 0 */
258 u8 user_bytes[16]; /* dword 1 */
259 u8 nwh_bytes[8]; /* dword 1 */
260 u8 lso; /* dword 1 */
261 u8 cast_enc[2]; /* dword 1 */
262 u8 rsvd1[5]; /* dword 1 */
263 u8 rsvd2[32]; /* dword 2 */
264 u8 pkts[16]; /* dword 3 */
265 u8 ringid[11]; /* dword 3 */
266 u8 hash_val[4]; /* dword 3 */
267 u8 valid; /* dword 3 */
286 u8 vlan_tag[16]; /* dword 0 */
287 u8 pktsize[14]; /* dword 0 */
288 u8 port; /* dword 0 */
289 u8 ip_opt; /* dword 0 */
290 u8 err; /* dword 1 */
291 u8 rsshp; /* dword 1 */
292 u8 ipf; /* dword 1 */
293 u8 tcpf; /* dword 1 */
294 u8 udpf; /* dword 1 */
295 u8 ipcksm; /* dword 1 */
296 u8 l4_cksm; /* dword 1 */
297 u8 ip_version; /* dword 1 */
298 u8 macdst[6]; /* dword 1 */
299 u8 vtp; /* dword 1 */
300 u8 ip_frag; /* dword 1 */
301 u8 fragndx[10]; /* dword 1 */
302 u8 ct[2]; /* dword 1 */
303 u8 sw; /* dword 1 */
304 u8 numfrags[3]; /* dword 1 */
305 u8 rss_flush; /* dword 2 */
306 u8 cast_enc[2]; /* dword 2 */
307 u8 qnq; /* dword 2 */
308 u8 rss_bank; /* dword 2 */
309 u8 rsvd1[23]; /* dword 2 */
310 u8 lro_pkt; /* dword 2 */
311 u8 rsvd2[2]; /* dword 2 */
312 u8 valid; /* dword 2 */
313 u8 rsshash[32]; /* dword 3 */
320 u8 vlan_tag[16]; /* dword 0 */
321 u8 pktsize[14]; /* dword 0 */
322 u8 vtp; /* dword 0 */
323 u8 ip_opt; /* dword 0 */
324 u8 err; /* dword 1 */
325 u8 rsshp; /* dword 1 */
326 u8 ipf; /* dword 1 */
327 u8 tcpf; /* dword 1 */
328 u8 udpf; /* dword 1 */
329 u8 ipcksm; /* dword 1 */
330 u8 l4_cksm; /* dword 1 */
331 u8 ip_version; /* dword 1 */
332 u8 macdst[7]; /* dword 1 */
333 u8 rsvd0; /* dword 1 */
334 u8 fragndx[10]; /* dword 1 */
335 u8 ct[2]; /* dword 1 */
336 u8 sw; /* dword 1 */
337 u8 numfrags[3]; /* dword 1 */
338 u8 rss_flush; /* dword 2 */
339 u8 cast_enc[2]; /* dword 2 */
340 u8 qnq; /* dword 2 */
341 u8 rss_bank; /* dword 2 */
342 u8 port[2]; /* dword 2 */
343 u8 vntagp; /* dword 2 */
344 u8 header_len[8]; /* dword 2 */
345 u8 header_split[2]; /* dword 2 */
346 u8 rsvd1[12]; /* dword 2 */
347 u8 tunneled;
348 u8 valid; /* dword 2 */
349 u8 rsshash[32]; /* dword 3 */
/linux-4.1.27/drivers/video/fbdev/
H A Dbt455.h16 volatile u8 addr_cmap;
17 u8 pad0[3];
18 volatile u8 addr_cmap_data;
19 u8 pad1[3];
20 volatile u8 addr_clr;
21 u8 pad2[3];
22 volatile u8 addr_ovly;
23 u8 pad3[3];
36 u8* red, u8* green, u8* blue) bt455_read_cmap_entry()
48 u8 red, u8 green, u8 blue) bt455_write_cmap_entry()
60 u8 red, u8 green, u8 blue) bt455_write_ovly_entry()
/linux-4.1.27/drivers/macintosh/
H A Dwindfarm_mpu.h21 u8 signature; /* 0x00 - EEPROM sig. */
22 u8 bytes_used; /* 0x01 - Bytes used in eeprom (160 ?) */
23 u8 size; /* 0x02 - EEPROM size (256 ?) */
24 u8 version; /* 0x03 - EEPROM version */
26 u8 processor_bin_code[3]; /* 0x08 - Processor BIN code */
27 u8 bin_code_expansion; /* 0x0b - ??? (padding ?) */
28 u8 processor_num; /* 0x0c - Number of CPUs on this MPU */
29 u8 input_mul_bus_div; /* 0x0d - Clock input multiplier/bus divider */
30 u8 reserved1[2]; /* 0x0e - */
32 u8 cpu_nb_target_cycles; /* 0x14 - ??? */
33 u8 cpu_statlat; /* 0x15 - ??? */
34 u8 cpu_snooplat; /* 0x16 - ??? */
35 u8 cpu_snoopacc; /* 0x17 - ??? */
36 u8 nb_paamwin; /* 0x18 - ??? */
37 u8 nb_statlat; /* 0x19 - ??? */
38 u8 nb_snooplat; /* 0x1a - ??? */
39 u8 nb_snoopwin; /* 0x1b - ??? */
40 u8 api_bus_mode; /* 0x1c - ??? */
41 u8 reserved2[3]; /* 0x1d - */
43 u8 processor_card_slot; /* 0x24 - Processor card slot number */
44 u8 reserved3[2]; /* 0x25 - */
45 u8 padjmax; /* 0x27 - Max power adjustment (Not in OF!) */
46 u8 ttarget; /* 0x28 - Target temperature */
47 u8 tmax; /* 0x29 - Max temperature */
48 u8 pmaxh; /* 0x2a - Max power */
49 u8 tguardband; /* 0x2b - Guardband temp ??? Hist. len in OSX */
66 u8 processor_part_num[8]; /* 0x54 - Processor part number XX pumps min/max */
68 u8 orig_card_sernum[0x10]; /* 0x60 - Card original serial number */
69 u8 curr_card_sernum[0x10]; /* 0x70 - Card current serial number */
70 u8 mlb_sernum[0x18]; /* 0x80 - MLB serial number */
/linux-4.1.27/drivers/media/tuners/
H A Dfc2580_priv.h28 u8 reg;
29 u8 val;
53 u8 div;
54 u8 band;
67 u8 r36_val;
68 u8 r39_val;
80 u8 r25_val;
81 u8 r27_val;
82 u8 r28_val;
83 u8 r29_val;
84 u8 r2b_val;
85 u8 r2c_val;
86 u8 r2d_val;
87 u8 r30_val;
88 u8 r44_val;
89 u8 r50_val;
90 u8 r53_val;
91 u8 r5f_val;
92 u8 r61_val;
93 u8 r62_val;
94 u8 r63_val;
95 u8 r67_val;
96 u8 r68_val;
97 u8 r69_val;
98 u8 r6a_val;
99 u8 r6b_val;
100 u8 r6c_val;
101 u8 r6d_val;
102 u8 r6e_val;
103 u8 r6f_val;
/linux-4.1.27/drivers/pci/hotplug/
H A Dibmphp.h106 u8 ver_num;
107 u8 scal_count;
108 u8 riodev_count;
117 u8 node_id;
119 u8 port0_node_connect;
120 u8 port0_port_connect;
121 u8 port1_node_connect;
122 u8 port1_port_connect;
123 u8 port2_node_connect;
124 u8 port2_port_connect;
125 u8 chassis_num;
134 u8 rio_node_id;
136 u8 rio_type;
137 u8 owner_id;
138 u8 port0_node_connect;
139 u8 port0_port_connect;
140 u8 port1_node_connect;
141 u8 port1_port_connect;
142 u8 first_slot_num;
143 u8 status;
144 u8 wpindex;
145 u8 chassis_num;
150 u8 rio_type;
151 u8 chassis_num;
152 u8 first_slot_num;
153 u8 middle_num;
158 u8 rio_type;
159 u8 chassis_num;
160 u8 first_slot_num;
161 u8 middle_num;
162 u8 pack_count;
171 u8 format;
182 u8 slot_num;
184 u8 ctl_index;
185 u8 slot_cap;
190 u8 slots_at_33_conv;
191 u8 slots_at_66_conv;
192 u8 slots_at_66_pcix;
193 u8 slots_at_100_pcix;
194 u8 slots_at_133_pcix;
208 u8 bus;
209 u8 dev_fun;
214 u8 i2c_addr;
225 u8 format;
237 u8 rsrc_type;
238 u8 bus_num;
239 u8 dev_fun;
242 u8 marked; /* for NVRAM */
252 u8 slot_min;
253 u8 slot_max;
254 u8 slot_count;
255 u8 busno;
256 u8 controller_id;
257 u8 current_speed;
258 u8 current_bus_mode;
259 u8 index;
260 u8 slots_at_33_conv;
261 u8 slots_at_66_conv;
262 u8 slots_at_66_pcix;
263 u8 slots_at_100_pcix;
264 u8 slots_at_133_pcix;
280 struct slot *ibmphp_get_slot_from_physical_num(u8);
286 int ibmphp_get_bus_index(u8);
343 u8 busno;
362 u8 busno;
363 u8 devfunc;
368 u8 fromMem; /* this is to indicate that the range is from
378 u8 not_correct; /* needed for return */
388 int ibmphp_check_resource(struct resource_node *, u8);
389 int ibmphp_remove_bus(struct bus_node *, u8);
392 struct bus_node *ibmphp_find_res_bus(u8);
396 int ibmphp_hpc_readslot(struct slot *, u8, u8 *);
397 int ibmphp_hpc_writeslot(struct slot *, u8);
600 #define SLOT_POWER(s) ((u8) ((s & HPC_SLOT_POWER) \
603 #define SLOT_CONNECT(s) ((u8) ((s & HPC_SLOT_CONNECT) \
606 #define SLOT_ATTN(s,es) ((u8) ((es & HPC_SLOT_BLINK_ATTN) \
610 #define SLOT_PRESENT(s) ((u8) ((s & HPC_SLOT_PRSNT1) \
614 #define SLOT_PWRGD(s) ((u8) ((s & HPC_SLOT_PWRGD) \
617 #define SLOT_BUS_SPEED(s) ((u8) ((s & HPC_SLOT_BUS_SPEED) \
620 #define SLOT_LATCH(s) ((u8) ((s & HPC_SLOT_LATCH) \
623 #define SLOT_PCIX(es) ((u8) ((es & HPC_SLOT_PCIX) \
626 #define SLOT_SPEED(es) ((u8) ((es & HPC_SLOT_SPEED2) \
631 #define SLOT_BUS_MODE(es) ((u8) ((es & HPC_SLOT_BUS_MODE) \
637 #define CURRENT_BUS_SPEED(s) ((u8) (s & BUS_SPEED_2) \
641 #define CURRENT_BUS_MODE(s) ((u8) (s & BUS_MODE) ? BUS_MODE_PCIX : BUS_MODE_PCI)
643 #define READ_BUS_STATUS(s) ((u8) (s->options & BUS_STATUS_AVAILABLE))
647 #define SET_BUS_STATUS(s) ((u8) (s->options & BUS_CONTROL_AVAILABLE))
649 #define READ_SLOT_LATCH(s) ((u8) (s->options & SLOT_LATCH_REGS_SUPPORTED))
654 #define CTLR_WORKING(c) ((u8) ((c & HPC_CTLR_WORKING) \
656 #define CTLR_FINISHED(c) ((u8) ((c & HPC_CTLR_FINISHED) \
658 #define CTLR_RESULT(c) ((u8) ((c & HPC_CTLR_RESULT1) \
693 u8 busno;
694 u8 device;
695 u8 function;
701 u8 irq[4]; /* for interrupt config */
702 u8 bus; /* flag for unconfiguring, to say if PPB */
706 u8 bus;
707 u8 device;
708 u8 number;
709 u8 real_physical_slot_num;
711 u8 supported_speed;
712 u8 supported_bus_mode;
713 u8 flag; /* this is for disable slot and polling */
714 u8 ctlr_index;
718 u8 irq[4];
722 u8 status;
723 u8 ext_status;
724 u8 busstatus;
731 u8 starting_slot_num; /* starting and ending slot #'s this ctrl controls*/
732 u8 ending_slot_num;
733 u8 revision;
734 u8 options; /* which options HPC supports */
735 u8 status;
736 u8 ctlr_id;
737 u8 slot_count;
738 u8 bus_count;
739 u8 ctlr_relative_id;
746 u8 ctlr_type;
755 int ibmphp_configure_card(struct pci_func *, u8);
/linux-4.1.27/drivers/net/wireless/mwifiex/
H A Dfw.h29 u8 llc_dsap;
30 u8 llc_ssap;
31 u8 llc_ctrl;
32 u8 snap_oui[3];
550 u8 data[1];
560 u8 bss_type;
561 u8 bss_num;
566 u8 priority;
567 u8 flags;
568 u8 pkt_delay_2ms;
569 u8 reserved1[2];
570 u8 tx_token_id;
571 u8 reserved[2];
575 u8 bss_type;
576 u8 bss_num;
581 u8 priority;
582 u8 rx_rate;
601 u8 ht_info;
602 u8 reserved[3];
603 u8 flags;
607 u8 bss_type;
608 u8 bss_num;
613 u8 priority;
614 u8 flags;
615 u8 pkt_delay_2ms;
616 u8 reserved1[2];
617 u8 tx_token_id;
618 u8 reserved[2];
622 u8 bss_type;
623 u8 bss_num;
628 u8 priority;
629 u8 reserved1;
633 u8 chan_num;
634 u8 bandcfg;
635 u8 flags;
648 u8 radio_type;
649 u8 chan_number;
650 u8 chan_scan_mode_bitmap;
661 u8 radio_type;
662 u8 chan_number;
672 u8 rates[1];
677 u8 ssid[1];
698 u8 max_ssid_length;
699 u8 ssid[1];
705 u8 tsf_data[1];
709 u8 cfp_cnt;
710 u8 cfp_period;
729 u8 hop_set;
730 u8 hop_pattern;
731 u8 hop_index;
735 u8 current_chan;
753 u8 ie[MWIFIEX_MAX_VSIE_LEN];
765 u8 rsn_ie[1];
776 u8 key[50];
782 u8 ipn[IGTK_PN_LEN];
783 u8 key[WLAN_KEY_LEN_AES_CMAC];
788 u8 key[WLAN_KEY_LEN_WEP104];
792 u8 pn[WPA_PN_SIZE];
794 u8 key[WLAN_KEY_LEN_TKIP];
798 u8 pn[WPA_PN_SIZE];
800 u8 key[WLAN_KEY_LEN_CCMP];
804 u8 pn[PN_LEN];
806 u8 key[WLAN_KEY_LEN_SMS4];
810 u8 ipn[IGTK_PN_LEN];
812 u8 key[WLAN_KEY_LEN_AES_CMAC];
818 u8 mac_addr[ETH_ALEN];
819 u8 key_idx;
820 u8 key_type;
895 u8 major_ver;
896 u8 minor_ver;
904 u8 permanent_addr[ETH_ALEN];
913 u8 dev_mcs_support;
920 u8 tlvs[0];
948 u8 mac_addr[ETH_ALEN];
959 u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
963 u8 mac_addr[ETH_ALEN];
968 u8 peer_sta_addr[ETH_ALEN];
972 u8 dtim_period;
979 u8 ie_buffer[1];
987 u8 element_id;
988 u8 len;
989 u8 cfp_cnt;
990 u8 cfp_period;
996 u8 element_id;
997 u8 len;
1007 u8 element_id;
1008 u8 len;
1010 u8 hop_set;
1011 u8 hop_pattern;
1012 u8 hop_index;
1016 u8 element_id;
1017 u8 len;
1018 u8 current_chan;
1027 u8 element_id;
1028 u8 len;
1029 u8 oper_mode;
1033 u8 ssid[IEEE80211_MAX_SSID_LEN];
1034 u8 bss_mode;
1036 u8 dtim_period;
1041 u8 data_rate[HOSTCMD_SUPPORTED_RATES];
1045 u8 pad[3];
1046 u8 bssid[ETH_ALEN];
1050 u8 bssid[ETH_ALEN];
1051 u8 ssid[IEEE80211_MAX_SSID_LEN];
1052 u8 bss_mode;
1054 u8 dtim_period;
1055 u8 time_stamp[8];
1056 u8 local_time[8];
1060 u8 data_rates[HOSTCMD_SUPPORTED_RATES];
1103 u8 tx_rate;
1115 u8 ht_info;
1125 u8 gpio;
1126 u8 gap;
1159 u8 value[1];
1183 u8 modulation_class;
1184 u8 first_rate_code;
1185 u8 last_rate_code;
1189 u8 ht_bandwidth;
1190 u8 reserved;
1207 u8 max_power;
1208 u8 min_power;
1226 u8 peer_mac[ETH_ALEN];
1231 u8 chan_width;
1232 u8 chan_num;
1244 u8 tlvbuf[0];
1248 u8 action;
1249 u8 enable;
1261 u8 bss_index;
1262 u8 bss_type;
1263 u8 more_event;
1264 u8 reserved[3];
1266 u8 num_of_set;
1270 u8 packet_type;
1271 u8 tx_token_id;
1272 u8 status;
1283 u8 bss_mode;
1286 u8 specific_bssid[ETH_ALEN];
1297 u8 tlv_buf[1]; /* SSID TLV(s) and ChanList TLVs are stored
1302 u8 chan_number;
1303 u8 radio_type;
1304 u8 scan_type;
1305 u8 reserved;
1313 u8 bss_mode;
1315 u8 num_probes;
1316 u8 reserved;
1318 u8 specific_bssid[ETH_ALEN];
1321 u8 num_ssids;
1328 u8 grp_key_oui[4];
1329 u8 ptk_cnt[2];
1330 u8 ptk_body[4];
1334 u8 bss_mode;
1335 u8 bssid[ETH_ALEN];
1336 u8 tlv_buffer[1];
1341 u8 number_of_sets;
1342 u8 bss_desc_and_tlv_buffer[1];
1347 u8 tlv_buffer[1];
1352 u8 bssid[ETH_ALEN];
1353 u8 frame_body[1];
1360 u8 cca_busy_fraction;
1361 u8 radio_type;
1362 u8 channel;
1363 u8 reserved;
1368 u8 flush;
1378 u8 country_code[IEEE80211_COUNTRY_STRING_LEN];
1393 u8 add_req_result;
1394 u8 peer_mac_addr[ETH_ALEN];
1395 u8 dialog_token;
1402 u8 add_rsp_result;
1403 u8 peer_mac_addr[ETH_ALEN];
1404 u8 dialog_token;
1412 u8 del_result;
1413 u8 peer_mac_addr[ETH_ALEN];
1416 u8 reserved;
1420 u8 tid;
1421 u8 peer_mac_addr[ETH_ALEN];
1422 u8 origninator;
1446 u8 mac[ETH_ALEN];
1458 u8 chan;
1459 u8 constraint;
1464 u8 wmm_ie[1];
1469 u8 queue_index;
1470 u8 disabled;
1472 u8 flow_required;
1473 u8 flow_created;
1478 u8 element_id;
1479 u8 len;
1480 u8 oui[4]; /* 0~2: oui, 3: oui_type */
1481 u8 oui_subtype;
1482 u8 version;
1496 u8 qos_info_bitmap;
1497 u8 reserved;
1514 u8 qos_info_bitmap;
1518 u8 queue_status_tlv[sizeof(struct mwifiex_ie_types_wmm_queue_status) *
1520 u8 wmm_param_tlv[sizeof(struct ieee_types_wmm_parameter) + 2];
1524 u8 disabled;
1525 u8 flow_required;
1526 u8 flow_created;
1546 u8 oper_mode;
1552 u8 chan_width;
1553 u8 chan_center_freq_1;
1554 u8 chan_center_freq_2;
1571 u8 bss_co_2040;
1576 u8 ext_capab[0];
1581 u8 qos_info;
1593 u8 value;
1594 u8 reserved[3];
1600 u8 value;
1601 u8 reserved[3];
1607 u8 value;
1608 u8 reserved[3];
1616 u8 value;
1620 u8 sta_addr[ETH_ALEN];
1626 u8 data[0];
1631 u8 tlv[0];
1636 u8 band_config;
1637 u8 misc_config;
1652 u8 cipher;
1653 u8 reserved;
1658 u8 cipher;
1659 u8 reserved;
1664 u8 passphrase[0];
1669 u8 key_index;
1670 u8 is_default;
1671 u8 key[1];
1676 u8 auth_type;
1686 u8 ssid[0];
1691 u8 rates[0];
1696 u8 bssid[ETH_ALEN];
1701 u8 bcast_ctl;
1711 u8 period;
1726 u8 limit;
1731 u8 mac_addr[ETH_ALEN];
1736 u8 band_config;
1737 u8 channel;
1746 u8 version_str_sel;
1762 u8 status;
1763 u8 reserved;
1764 u8 band_cfg;
1765 u8 channel;
1772 u8 bssid[ETH_ALEN];
1779 u8 mode;
1780 u8 action;
1782 u8 expr[0];
1796 u8 con_type;
1825 u8 abs_value;
1826 u8 evt_freq;
1835 u8 reg_domain; /*1=fcc, 2=etsi, 3=mic*/
1836 u8 det_type; /*0=none, 1=pw(chirp), 2=pri(radar)*/
1838 u8 pw_chirp_idx;
1839 u8 pw_value;
1840 u8 pri_radar_type;
1841 u8 pri_bincnt;
1842 u8 bin_counter[MWIFIEX_BIN_COUNTER_LEN];
1843 u8 num_dfs_records;
1844 u8 dfs_record_hdr[MWIFIEX_DFS_REC_HDR_NUM][MWIFIEX_DFS_REC_HDR_LEN];
1849 u8 rssi:3;
1850 u8 unmeasured:1;
1851 u8 radar:1;
1852 u8 unidentified_sig:1;
1853 u8 ofdm_preamble:1;
1854 u8 bss:1;
1869 u8 peer_mac[ETH_ALEN];
1880 u8 ie_buffer[IEEE_MAX_IE_SIZE];
1891 u8 operation;
1892 u8 operand_len;
1894 u8 operand_byte_stream[4];
1899 u8 num_of_fields;
1900 u8 pkt_type;
H A Dioctl.h33 u8 scan_cfg_buf[1];
44 u8 mac_list[MWIFIEX_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
54 u8 bssid[ETH_ALEN];
68 u8 pairwise_cipher_wpa;
69 u8 pairwise_cipher_wpa2;
70 u8 group_cipher;
72 u8 passphrase[MWIFIEX_WPA_PASSHPHRASE_LEN];
76 u8 key_index;
77 u8 is_default;
79 u8 key[WLAN_KEY_LEN_WEP104];
94 u8 channel;
95 u8 band_cfg;
98 u8 retry_limit;
100 u8 bcast_ssid_ctl;
101 u8 radio_ctl;
102 u8 dtim_period;
112 u8 rates[MWIFIEX_SUPPORTED_RATES];
115 u8 qos_info;
155 u8 country_code[3];
164 u8 bssid[ETH_ALEN];
173 u8 ta[ETH_ALEN];
181 u8 ra[ETH_ALEN];
182 u8 amsdu;
188 u8 peer_addr[ETH_ALEN];
207 u8 is_deep_sleep;
208 u8 pm_wakeup_card_req;
210 u8 is_hs_configured;
211 u8 hs_activated;
222 u8 is_cmd_timedout;
232 u8 data_sent;
233 u8 cmd_sent;
234 u8 cmd_resp_received;
235 u8 event_received;
245 u8 key_material[WLAN_MAX_KEY_LEN];
246 u8 mac_addr[ETH_ALEN];
248 u8 pn[PN_LEN]; /* packet number */
249 u8 pn_len;
250 u8 is_igtk_key;
251 u8 is_current_wep_key;
252 u8 is_rx_seq_valid;
292 u8 band_config;
293 u8 misc_config;
342 u8 value[MAX_EEPROM_DATA];
352 u8 ie_data[IEEE_MAX_IE_SIZE];
357 u8 cmd[MWIFIEX_SIZE_OF_CMD_BUFFER];
370 u8 abs_value;
371 u8 evt_freq;
388 u8 filt_type;
389 u8 filt_action;
393 u8 mode;
394 u8 action;
433 u8 operation;
434 u8 operand_len;
436 u8 operand_byte_stream[MWIFIEX_COALESCE_MAX_BYTESEQ];
441 u8 num_of_fields;
442 u8 pkt_type;
453 u8 peer_mac[ETH_ALEN];
455 u8 qos_info;
456 u8 *ext_capab;
457 u8 ext_capab_len;
458 u8 *supp_rates;
459 u8 supp_rates_len;
460 u8 *ht_capab;
/linux-4.1.27/drivers/net/wireless/rtl818x/
H A Drtl818x.h20 u8 MAC[6];
21 u8 reserved_0[2];
27 u8 rf_sw_config; /* 0x8 */
28 u8 reserved_01[3];
35 u8 RX_FIFO_COUNT;
36 u8 reserved_1;
37 u8 TX_FIFO_COUNT;
38 u8 BQREQ;
63 u8 reserved_2a;
64 u8 EIFS_8187SE;
70 u8 BSSID[6]; /* 0x2e */
74 u8 RESP_RATE;
75 u8 EIFS;
80 u8 reserved_3[1]; /* 0x36 */
81 u8 CMD; /* 0x37 */
85 u8 reserved_4[4]; /* 0x38 */
174 u8 EEPROM_CMD;
183 u8 CONFIG0;
184 u8 CONFIG1;
185 u8 CONFIG2;
188 u8 MSR;
194 u8 CONFIG3;
197 u8 CONFIG4;
200 u8 TESTR;
201 u8 reserved_9[2];
202 u8 PGSELECT;
203 u8 SECURITY;
205 u8 reserved_10[8];
238 u8 PHY_DELAY; /* 0x78 */
239 u8 CARRIER_SENSE_COUNTER; /* 0x79 */
240 u8 reserved_11[2]; /* 0x7a */
241 u8 PHY[4]; /* 0x7c */
248 u8 GP_ENABLE; /* 0x90 */
249 u8 GPIO0; /* 0x91 */
250 u8 GPIO1; /* 0x92 */
251 u8 TPPOLL_STOP; /* 0x93 - rtl8187se only */
261 u8 reserved_13[4]; /* 0x98 */
262 u8 TX_AGC_CTL; /* 0x9c */
266 u8 TX_GAIN_CCK;
267 u8 TX_GAIN_OFDM;
268 u8 TX_ANTENNA;
269 u8 reserved_14[16];
270 u8 WPA_CONF;
271 u8 reserved_15[3];
272 u8 SIFS;
273 u8 DIFS;
274 u8 SLOT;
275 u8 reserved_16[5];
276 u8 CW_CONF;
279 u8 CW_VAL;
280 u8 RATE_FALLBACK;
282 u8 ACM_CONTROL;
283 u8 reserved_17[24];
284 u8 CONFIG5;
285 u8 TX_DMA_POLLING;
286 u8 PHY_PR;
287 u8 reserved_18;
289 u8 RETRY_CTR;
290 u8 reserved_19[3];
298 u8 reserved_20[4];
301 u8 ANAPARAM3A; /* for rtl8187 */
319 u8 reserved_21[2];
325 u8 TALLY_SEL; /* 0xfc */
337 #define REG_ADDR1(addr) ((u8 __iomem *)priv->map + (addr))
357 u8 (*calc_rssi)(u8 agc, u8 sq);
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8821ae/
H A Dphy.h164 u8 r_cckrx_enable_2:2;
165 u8 r_cckrx_enable:2;
166 u8 r_ccktx_enable:4;
170 u8 mac_addr[ETH_ALEN];
171 u8 cck_tx_power_idx[6];
172 u8 ht40_1s_tx_power_idx[6];
173 u8 ht40_2s_tx_power_idx_diff[3];
174 u8 ht20_tx_power_idx_diff[3];
175 u8 ofdm_tx_power_idx_diff[3];
176 u8 ht40_max_power_offset[3];
177 u8 ht20_max_power_offset[3];
178 u8 channel_plan;
179 u8 thermal_meter;
180 u8 rf_option[5];
181 u8 version;
182 u8 oem_id;
183 u8 regulatory;
187 u8 cck[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
188 u8 ht40_1s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
189 u8 ht40_2s[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
190 u8 ht20_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
191 u8 legacy_ht_diff[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
192 u8 legacy_ht_txpowerdiff;
193 u8 groupht20[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
194 u8 groupht40[RTL8821AE_MAX_PATH_NUM][CHANNEL_MAX_NUMBER];
195 u8 pwrgroup_cnt;
222 u8 band);
227 u8 channel);
229 u8 operation);
234 u8 rtl8821ae_phy_sw_chnl(struct ieee80211_hw *hw);
249 u8 _rtl8812ae_get_right_chnl_place_for_iqk(u8 chnl);
251 u8 channel, u8 path);
252 void rtl8812ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index,
253 u8 thermal_value, u8 threshold);
254 void rtl8821ae_do_iqk(struct ieee80211_hw *hw, u8 delta_thermal_index,
255 u8 thermal_value, u8 threshold);
257 u32 phy_get_tx_swing_8812A(struct ieee80211_hw *hw, u8 band, u8 rf_path);
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Ddisp.c30 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *sub) nvbios_disp_table()
59 nvbios_disp_entry(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, u8 *sub) nvbios_disp_entry()
61 u8 hdr, cnt; nvbios_disp_entry()
70 nvbios_disp_parse(struct nvkm_bios *bios, u8 idx, u8 *ver, u8 *len, u8 *sub, nvbios_disp_parse()
82 nvbios_outp_entry(struct nvkm_bios *bios, u8 idx, nvbios_outp_entry()
83 u8 *ver, u8 *hdr, u8 *cnt, u8 *len) nvbios_outp_entry()
96 nvbios_outp_parse(struct nvkm_bios *bios, u8 idx, nvbios_outp_parse()
97 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *info) nvbios_outp_parse()
117 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_outp *info) nvbios_outp_match()
130 nvbios_ocfg_entry(struct nvkm_bios *bios, u16 outp, u8 idx, nvbios_ocfg_entry()
131 u8 *ver, u8 *hdr, u8 *cnt, u8 *len) nvbios_ocfg_entry()
139 nvbios_ocfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx, nvbios_ocfg_parse()
140 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *info) nvbios_ocfg_parse()
153 u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_ocfg *info) nvbios_ocfg_match()
/linux-4.1.27/include/linux/i2c/
H A Dadp8870.h109 u8 bl_led_assign; /* 1 = Backlight 0 = Individual LED */
110 u8 pwm_assign; /* 1 = Enables PWM mode */
112 u8 bl_fade_in; /* Backlight Fade-In Timer */
113 u8 bl_fade_out; /* Backlight Fade-Out Timer */
114 u8 bl_fade_law; /* fade-on/fade-off transfer characteristic */
116 u8 en_ambl_sens; /* 1 = enable ambient light sensor */
117 u8 abml_filt; /* Light sensor filter time */
119 u8 l1_daylight_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
120 u8 l1_daylight_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
121 u8 l2_bright_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
122 u8 l2_bright_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
123 u8 l3_office_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
124 u8 l3_office_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
125 u8 l4_indoor_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
126 u8 l4_indor_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
127 u8 l5_dark_max; /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
128 u8 l5_dark_dim; /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
130 u8 l2_trip; /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
131 u8 l2_hyst; /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
132 u8 l3_trip; /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
133 u8 l3_hyst; /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
134 u8 l4_trip; /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
135 u8 l4_hyst; /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
136 u8 l5_trip; /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
137 u8 l5_hyst; /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
147 u8 led_fade_in; /* LED Fade-In Timer */
148 u8 led_fade_out; /* LED Fade-Out Timer */
149 u8 led_fade_law; /* fade-on/fade-off transfer characteristic */
150 u8 led_on_time;
/linux-4.1.27/drivers/net/wireless/rtl818x/rtl8180/
H A Drtl8225.h12 u8 addr, u8 data) rtl8225_write_phy_ofdm()
18 u8 addr, u8 data) rtl8225_write_phy_cck()
/linux-4.1.27/drivers/net/wireless/rtlwifi/btcoexist/
H A Dhalbtc8821a2ant.h76 u8 pre_bt_psd_mode;
77 u8 cur_bt_psd_mode;
78 u8 pre_fw_dac_swing_lvl;
79 u8 cur_fw_dac_swing_lvl;
82 u8 pre_ps_tdma;
83 u8 cur_ps_tdma;
84 u8 ps_tdma_para[5];
85 u8 tdma_adj_type;
112 u8 pre_val0x6cc;
113 u8 cur_val0x6cc;
117 u8 pre_algorithm;
118 u8 cur_algorithm;
119 u8 bt_status;
120 u8 wifi_chnl_info[3];
135 u8 bt_rssi;
136 u8 pre_bt_rssi_state;
137 u8 pre_wifi_rssi_state[4];
139 u8 bt_info_c2h[BT_INFO_SRC_8821A_2ANT_MAX][10];
142 u8 bt_retry_cnt;
143 u8 bt_info_ext;
161 u8 type
166 u8 type
171 u8 type
176 u8 type
181 u8 type
186 u8 type
191 u8 *tmp_buf,
192 u8 length
H A Dhalbtc8821a1ant.h92 u8 pre_ps_tdma;
93 u8 cur_ps_tdma;
94 u8 ps_tdma_para[5];
95 u8 tdma_adj_type;
101 u8 pre_lps;
102 u8 cur_lps;
103 u8 pre_rpwm;
104 u8 cur_rpwm;
115 u8 pre_val_0x6cc;
116 u8 cur_val_0x6cc;
122 u8 backup_ampdu_max_time;
125 u8 pre_algorithm;
126 u8 cur_algorithm;
127 u8 bt_status;
128 u8 wifi_chnl_info[3];
132 u8 pre_arfr_type;
133 u8 cur_arfr_type;
134 u8 pre_retry_limit_type;
135 u8 cur_retry_limit_type;
136 u8 pre_ampdu_time_type;
137 u8 cur_ampdu_time_type;
139 u8 error_condition;
156 u8 bt_rssi;
157 u8 pre_bt_rssi_state;
158 u8 pre_wifi_rssi_state[4];
160 u8 bt_info_c2h[BT_INFO_SRC_8821A_1ANT_MAX][10];
163 u8 bt_retry_cnt;
164 u8 bt_info_ext;
173 void ex_halbtc8821a1ant_ips_notify(struct btc_coexist *btcoexist, u8 type);
174 void ex_halbtc8821a1ant_lps_notify(struct btc_coexist *btcoexist, u8 type);
175 void ex_halbtc8821a1ant_scan_notify(struct btc_coexist *btcoexist, u8 type);
176 void ex_halbtc8821a1ant_connect_notify(struct btc_coexist *btcoexist, u8 type);
178 u8 type);
180 u8 type);
182 u8 *tmpbuf, u8 length);
184 void ex_halbtc8821a1ant_pnp_notify(struct btc_coexist *btcoexist, u8 pnpstate);
187 void ex_halbtc8821a1ant_dbg_control(struct btc_coexist *btcoexist, u8 op_code,
188 u8 op_len, u8 *data);
H A Dhalbtc8192e2ant.h76 u8 pre_dec_bt_pwr;
77 u8 cur_dec_bt_pwr;
78 u8 pre_fw_dac_swing_lvl;
79 u8 cur_fw_dac_swing_lvl;
82 u8 pre_ps_tdma;
83 u8 cur_ps_tdma;
84 u8 ps_tdma_para[5];
85 u8 tdma_adj_type;
113 u8 pre_val0x6cc;
114 u8 cur_val0x6cc;
120 u8 backup_ampdu_maxtime;
123 u8 pre_algorithm;
124 u8 cur_algorithm;
125 u8 bt_status;
126 u8 wifi_chnl_info[3];
128 u8 pre_sstype;
129 u8 cur_sstype;
133 u8 curra_masktype;
134 u8 pre_arfrtype;
135 u8 cur_arfrtype;
136 u8 pre_retrylimit_type;
137 u8 cur_retrylimit_type;
138 u8 pre_ampdutime_type;
139 u8 cur_ampdutime_type;
155 u8 bt_rssi;
156 u8 pre_bt_rssi_state;
157 u8 pre_wifi_rssi_state[4];
159 u8 bt_info_c2h[BT_INFO_SRC_8192E_2ANT_MAX][10];
162 u8 bt_retry_cnt;
163 u8 bt_info_ext;
171 void ex_halbtc8192e2ant_ips_notify(struct btc_coexist *btcoexist, u8 type);
172 void ex_halbtc8192e2ant_lps_notify(struct btc_coexist *btcoexist, u8 type);
173 void ex_halbtc8192e2ant_scan_notify(struct btc_coexist *btcoexist, u8 type);
174 void ex_halbtc8192e2ant_connect_notify(struct btc_coexist *btcoexist, u8 type);
176 u8 type);
178 u8 type);
180 u8 *tmpbuf, u8 length);
182 u8 type);
H A Dhalbtc8723b2ant.h80 u8 pre_fw_dac_swing_lvl;
81 u8 cur_fw_dac_swing_lvl;
84 u8 pre_ps_tdma;
85 u8 cur_ps_tdma;
86 u8 ps_tdma_para[5];
87 u8 tdma_adj_type;
115 u8 pre_val0x6cc;
116 u8 cur_val0x6cc;
120 u8 pre_algorithm;
121 u8 cur_algorithm;
122 u8 bt_status;
123 u8 wifi_chnl_info[3];
142 u8 bt_rssi;
143 u8 pre_bt_rssi_state;
144 u8 pre_wifi_rssi_state[4];
146 u8 bt_info_c2h[BT_INFO_SRC_8723B_2ANT_MAX][10];
149 u8 bt_retry_cnt;
150 u8 bt_info_ext;
158 void ex_btc8723b2ant_ips_notify(struct btc_coexist *btcoexist, u8 type);
159 void ex_btc8723b2ant_lps_notify(struct btc_coexist *btcoexist, u8 type);
160 void ex_btc8723b2ant_scan_notify(struct btc_coexist *btcoexist, u8 type);
161 void ex_btc8723b2ant_connect_notify(struct btc_coexist *btcoexist, u8 type);
163 u8 type);
165 u8 type);
167 u8 *tmpbuf, u8 length);
H A Dhalbtc8723b1ant.h90 u8 pre_ps_tdma;
91 u8 cur_ps_tdma;
92 u8 ps_tdma_para[5];
93 u8 tdma_adj_type;
99 u8 pre_lps;
100 u8 cur_lps;
101 u8 pre_rpwm;
102 u8 cur_rpwm;
113 u8 pre_val0x6cc;
114 u8 cur_val0x6cc;
120 u8 backup_ampdu_max_time;
123 u8 pre_algorithm;
124 u8 cur_algorithm;
125 u8 bt_status;
126 u8 wifi_chnl_info[3];
130 u8 pre_arfr_type;
131 u8 cur_arfr_type;
132 u8 pre_retry_limit_type;
133 u8 cur_retry_limit_type;
134 u8 pre_ampdu_time_type;
135 u8 cur_ampdu_time_type;
137 u8 error_condition;
154 u8 bt_rssi;
155 u8 pre_bt_rssi_state;
156 u8 pre_wifi_rssi_state[4];
158 u8 bt_info_c2h[BT_INFO_SRC_8723B_1ANT_MAX][10];
161 u8 bt_retry_cnt;
162 u8 bt_info_ext;
170 void ex_halbtc8723b1ant_ips_notify(struct btc_coexist *btcoexist, u8 type);
171 void ex_halbtc8723b1ant_lps_notify(struct btc_coexist *btcoexist, u8 type);
172 void ex_halbtc8723b1ant_scan_notify(struct btc_coexist *btcoexist, u8 type);
173 void ex_halbtc8723b1ant_connect_notify(struct btc_coexist *btcoexist, u8 type);
175 u8 type);
177 u8 type);
179 u8 *tmpbuf, u8 length);
181 void ex_halbtc8723b1ant_pnp_notify(struct btc_coexist *btcoexist, u8 pnpstate);
/linux-4.1.27/include/linux/platform_data/
H A Dmtd-davinci-aemif.h25 u8 wsetup;
26 u8 wstrobe;
27 u8 whold;
29 u8 rsetup;
30 u8 rstrobe;
31 u8 rhold;
33 u8 ta;
H A Dfsa9480.h18 void (*usb_cb) (u8 attached);
19 void (*uart_cb) (u8 attached);
20 void (*charger_cb) (u8 attached);
21 void (*jig_cb) (u8 attached);
23 void (*usb_power) (u8 on);
/linux-4.1.27/include/drm/
H A Ddrm_edid.h40 u8 t1;
41 u8 t2;
42 u8 mfg_rsvd;
54 u8 hsize; /* need to multiply by 8 then add 248 */
55 u8 vfreq_aspect;
66 u8 hactive_lo;
67 u8 hblank_lo;
68 u8 hactive_hblank_hi;
69 u8 vactive_lo;
70 u8 vblank_lo;
71 u8 vactive_vblank_hi;
72 u8 hsync_offset_lo;
73 u8 hsync_pulse_width_lo;
74 u8 vsync_offset_pulse_width_lo;
75 u8 hsync_vsync_offset_pulse_width_hi;
76 u8 width_mm_lo;
77 u8 height_mm_lo;
78 u8 width_height_mm_hi;
79 u8 hborder;
80 u8 vborder;
81 u8 misc;
86 u8 str[13];
90 u8 min_vfreq;
91 u8 max_vfreq;
92 u8 min_hfreq_khz;
93 u8 max_hfreq_khz;
94 u8 pixel_clock_mhz; /* need to multiply by 10 */
95 u8 flags;
98 u8 reserved;
99 u8 hfreq_start_khz; /* need to multiply by 2 */
100 u8 c; /* need to divide by 2 */
102 u8 k;
103 u8 j; /* need to divide by 2 */
106 u8 version;
107 u8 data1; /* high 6 bits: extra clock resolution */
108 u8 data2; /* plus low 2 of above: max hactive */
109 u8 supported_aspects;
110 u8 flags; /* preferred aspect and blanking support */
111 u8 supported_scalings;
112 u8 preferred_refresh;
118 u8 white_yx_lo; /* Lower 2 bits each */
119 u8 white_x_hi;
120 u8 white_y_hi;
121 u8 gamma; /* need to divide by 100 then add 1 */
125 u8 windex1;
126 u8 wpindex1[3];
127 u8 windex2;
128 u8 wpindex2[3];
132 u8 code[3];
136 u8 pad1;
137 u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
140 u8 pad2;
270 u8 header[8];
272 u8 mfg_id[2];
273 u8 prod_code[2];
275 u8 mfg_week;
276 u8 mfg_year;
278 u8 version;
279 u8 revision;
281 u8 input;
282 u8 width_cm;
283 u8 height_cm;
284 u8 gamma;
285 u8 features;
287 u8 red_green_lo;
288 u8 black_white_lo;
289 u8 red_x;
290 u8 red_y;
291 u8 green_x;
292 u8 green_y;
293 u8 blue_x;
294 u8 blue_y;
295 u8 white_x;
296 u8 white_y;
304 u8 extensions;
306 u8 checksum;
313 u8 format;
314 u8 channels; /* max number of channels - 1 */
315 u8 freq;
316 u8 byte2; /* meaning depends on format */
327 int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb);
389 int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
/linux-4.1.27/drivers/scsi/be2iscsi/
H A Dbe_main.h349 u8 __iomem *csr_va; /* CSR */
350 u8 __iomem *db_va; /* Door Bell */
351 u8 __iomem *pci_va; /* PCI Config */
421 u8 mac_address[ETH_ALEN];
469 u8 opcode[6]; /* opcode */
470 u8 rsvd0[2]; /* should be 0 */
471 u8 rsvd1[7];
472 u8 final_bit; /* F bit */
473 u8 rsvd2[16];
474 u8 ahs_length[8]; /* no AHS */
475 u8 data_len_hi[8];
476 u8 data_len_lo[16]; /* DataSegmentLength */
477 u8 lun[64];
478 u8 itt[32]; /* ITT; initiator task tag */
479 u8 ttt[32]; /* TTT; valid for R2T or 0xffffffff */
480 u8 rsvd3[32];
481 u8 exp_stat_sn[32];
482 u8 rsvd4[32];
483 u8 data_sn[32];
484 u8 buffer_offset[32];
485 u8 rsvd5[32];
541 u8 addr_hi[32];
542 u8 addr_lo[32];
543 u8 sge_offset[22]; /* DWORD 2 */
544 u8 rsvd0[9]; /* DWORD 2 */
545 u8 last_sge; /* DWORD 2 */
546 u8 len[17]; /* DWORD 3 */
547 u8 rsvd1[15]; /* DWORD 3 */
568 u8 max_burst_length[32];
569 u8 max_send_data_segment_length[32];
570 u8 first_burst_length[32];
571 u8 erl[2];
572 u8 dde[1];
573 u8 hde[1];
574 u8 ir2t[1];
575 u8 imd[1];
576 u8 data_seq_inorder[1];
577 u8 pdu_seq_inorder[1];
578 u8 max_r2t[16];
579 u8 pad[8];
580 u8 exp_statsn[32];
581 u8 max_recv_data_segment_length[32];
667 u8 db_addr_hi[32];
668 u8 db_addr_lo[32];
669 u8 code[6];
670 u8 cid[10];
671 u8 dpl[16];
672 u8 index[16];
673 u8 num_cons[10];
674 u8 rsvd0[4];
675 u8 final;
676 u8 valid;
680 u8 db_addr_hi[32]; /* DWORD 0 */
681 u8 db_addr_lo[32]; /* DWORD 1 */
682 u8 code[6]; /* DWORD 2 */
683 u8 num_cons; /* DWORD 2*/
684 u8 rsvd0[8]; /* DWORD 2 */
685 u8 dpl[17]; /* DWORD 2 */
686 u8 index[16]; /* DWORD 3 */
687 u8 cid[13]; /* DWORD 3 */
688 u8 rsvd1; /* DWORD 3 */
689 u8 final; /* DWORD 3 */
690 u8 valid; /* DWORD 3 */
710 u8 valid; /* DWORD 0 */
711 u8 major_code[3]; /* DWORD 0 */
712 u8 minor_code[12]; /* DWORD 0 */
713 u8 resource_id[16]; /* DWORD 0 */
726 u8 qid[10];
727 u8 event[1];
728 u8 rsvd0[5];
729 u8 num_popped[13];
730 u8 rearm[1];
731 u8 rsvd1[2];
752 u8 lun[14]; /* DWORD 0 */
753 u8 lt; /* DWORD 0 */
754 u8 invld; /* DWORD 0 */
755 u8 wrb_idx[8]; /* DWORD 0 */
756 u8 dsp; /* DWORD 0 */
757 u8 dmsg; /* DWORD 0 */
758 u8 undr_run; /* DWORD 0 */
759 u8 over_run; /* DWORD 0 */
760 u8 type[4]; /* DWORD 0 */
761 u8 ptr2nextwrb[8]; /* DWORD 1 */
762 u8 r2t_exp_dtl[24]; /* DWORD 1 */
763 u8 sgl_icd_idx[12]; /* DWORD 2 */
764 u8 rsvd0[20]; /* DWORD 2 */
765 u8 exp_data_sn[32]; /* DWORD 3 */
766 u8 iscsi_bhs_addr_hi[32]; /* DWORD 4 */
767 u8 iscsi_bhs_addr_lo[32]; /* DWORD 5 */
768 u8 cmdsn_itt[32]; /* DWORD 6 */
769 u8 dif_ref_tag[32]; /* DWORD 7 */
770 u8 sge0_addr_hi[32]; /* DWORD 8 */
771 u8 sge0_addr_lo[32]; /* DWORD 9 */
772 u8 sge0_offset[22]; /* DWORD 10 */
773 u8 pbs; /* DWORD 10 */
774 u8 dif_mode[2]; /* DWORD 10 */
775 u8 rsvd1[6]; /* DWORD 10 */
776 u8 sge0_last; /* DWORD 10 */
777 u8 sge0_len[17]; /* DWORD 11 */
778 u8 dif_meta_tag[14]; /* DWORD 11 */
779 u8 sge0_in_ddr; /* DWORD 11 */
780 u8 sge1_addr_hi[32]; /* DWORD 12 */
781 u8 sge1_addr_lo[32]; /* DWORD 13 */
782 u8 sge1_r2t_offset[22]; /* DWORD 14 */
783 u8 rsvd2[9]; /* DWORD 14 */
784 u8 sge1_last; /* DWORD 14 */
785 u8 sge1_len[17]; /* DWORD 15 */
786 u8 ref_sgl_icd_idx[12]; /* DWORD 15 */
787 u8 rsvd3[2]; /* DWORD 15 */
788 u8 sge1_in_ddr; /* DWORD 15 */
793 u8 r2t_exp_dtl[25]; /* DWORD 0 */
794 u8 rsvd0[2]; /* DWORD 0*/
795 u8 type[5]; /* DWORD 0 */
796 u8 ptr2nextwrb[8]; /* DWORD 1 */
797 u8 wrb_idx[8]; /* DWORD 1 */
798 u8 lun[16]; /* DWORD 1 */
799 u8 sgl_idx[16]; /* DWORD 2 */
800 u8 ref_sgl_icd_idx[16]; /* DWORD 2 */
801 u8 exp_data_sn[32]; /* DWORD 3 */
802 u8 iscsi_bhs_addr_hi[32]; /* DWORD 4 */
803 u8 iscsi_bhs_addr_lo[32]; /* DWORD 5 */
804 u8 cq_id[16]; /* DWORD 6 */
805 u8 rsvd1[16]; /* DWORD 6 */
806 u8 cmdsn_itt[32]; /* DWORD 7 */
807 u8 sge0_addr_hi[32]; /* DWORD 8 */
808 u8 sge0_addr_lo[32]; /* DWORD 9 */
809 u8 sge0_offset[24]; /* DWORD 10 */
810 u8 rsvd2[7]; /* DWORD 10 */
811 u8 sge0_last; /* DWORD 10 */
812 u8 sge0_len[17]; /* DWORD 11 */
813 u8 rsvd3[7]; /* DWORD 11 */
814 u8 diff_enbl; /* DWORD 11 */
815 u8 u_run; /* DWORD 11 */
816 u8 o_run; /* DWORD 11 */
817 u8 invalid; /* DWORD 11 */
818 u8 dsp; /* DWORD 11 */
819 u8 dmsg; /* DWORD 11 */
820 u8 rsvd4; /* DWORD 11 */
821 u8 lt; /* DWORD 11 */
822 u8 sge1_addr_hi[32]; /* DWORD 12 */
823 u8 sge1_addr_lo[32]; /* DWORD 13 */
824 u8 sge1_r2t_offset[24]; /* DWORD 14 */
825 u8 rsvd5[7]; /* DWORD 14 */
826 u8 sge1_last; /* DWORD 14 */
827 u8 sge1_len[17]; /* DWORD 15 */
828 u8 rsvd6[15]; /* DWORD 15 */
860 u8 opcode[6]; /* opcode 0x00 */
861 u8 i_bit; /* I Bit */
862 u8 x_bit; /* reserved; should be 0 */
863 u8 fp_bit_filler1[7];
864 u8 f_bit; /* always 1 */
865 u8 reserved1[16];
866 u8 ahs_length[8]; /* no AHS */
867 u8 data_len_hi[8];
868 u8 data_len_lo[16]; /* DataSegmentLength */
869 u8 lun[64];
870 u8 itt[32]; /* initiator id for ping or 0xffffffff */
871 u8 ttt[32]; /* target id for ping or 0xffffffff */
872 u8 cmd_sn[32];
873 u8 exp_stat_sn[32];
874 u8 reserved5[128];
890 u8 opcode[6];
891 u8 i_bit; /* immediate bit */
892 u8 x_bit; /* reserved, always 0 */
893 u8 reserved1[24]; /* opcode-specific fields */
894 u8 ahs_length[8]; /* length units is 4 byte words */
895 u8 data_len_hi[8];
896 u8 data_len_lo[16]; /* DatasegmentLength */
897 u8 lun[64]; /* lun or opcode-specific fields */
898 u8 itt[32]; /* initiator task tag */
899 u8 reserved4[224];
912 u8 lun[14]; /* DWORD 0 */
913 u8 lt; /* DWORD 0 */
914 u8 invld; /* DWORD 0 */
915 u8 wrb_idx[8]; /* DWORD 0 */
916 u8 dsp; /* DWORD 0 */
917 u8 dmsg; /* DWORD 0 */
918 u8 undr_run; /* DWORD 0 */
919 u8 over_run; /* DWORD 0 */
920 u8 type[4]; /* DWORD 0 */
921 u8 ptr2nextwrb[8]; /* DWORD 1 */
922 u8 max_burst_length[19]; /* DWORD 1 */
923 u8 rsvd0[5]; /* DWORD 1 */
924 u8 rsvd1[15]; /* DWORD 2 */
925 u8 max_send_data_segment_length[17]; /* DWORD 2 */
926 u8 first_burst_length[14]; /* DWORD 3 */
927 u8 rsvd2[2]; /* DWORD 3 */
928 u8 tx_wrbindex_drv_msg[8]; /* DWORD 3 */
929 u8 rsvd3[5]; /* DWORD 3 */
930 u8 session_state[3]; /* DWORD 3 */
931 u8 rsvd4[16]; /* DWORD 4 */
932 u8 tx_jumbo; /* DWORD 4 */
933 u8 hde; /* DWORD 4 */
934 u8 dde; /* DWORD 4 */
935 u8 erl[2]; /* DWORD 4 */
936 u8 domain_id[5]; /* DWORD 4 */
937 u8 mode; /* DWORD 4 */
938 u8 imd; /* DWORD 4 */
939 u8 ir2t; /* DWORD 4 */
940 u8 notpredblq[2]; /* DWORD 4 */
941 u8 compltonack; /* DWORD 4 */
942 u8 stat_sn[32]; /* DWORD 5 */
943 u8 pad_buffer_addr_hi[32]; /* DWORD 6 */
944 u8 pad_buffer_addr_lo[32]; /* DWORD 7 */
945 u8 pad_addr_hi[32]; /* DWORD 8 */
946 u8 pad_addr_lo[32]; /* DWORD 9 */
947 u8 rsvd5[32]; /* DWORD 10 */
948 u8 rsvd6[32]; /* DWORD 11 */
949 u8 rsvd7[32]; /* DWORD 12 */
950 u8 rsvd8[32]; /* DWORD 13 */
951 u8 rsvd9[32]; /* DWORD 14 */
952 u8 rsvd10[32]; /* DWORD 15 */
959 u8 max_burst_length[24]; /* DWORD 0 */
960 u8 rsvd0[3]; /* DWORD 0 */
961 u8 type[5]; /* DWORD 0 */
962 u8 ptr2nextwrb[8]; /* DWORD 1 */
963 u8 wrb_idx[8]; /* DWORD 1 */
964 u8 rsvd1[16]; /* DWORD 1 */
965 u8 max_send_data_segment_length[24]; /* DWORD 2 */
966 u8 rsvd2[8]; /* DWORD 2 */
967 u8 first_burst_length[24]; /* DWORD 3 */
968 u8 rsvd3[8]; /* DOWRD 3 */
969 u8 max_r2t[16]; /* DWORD 4 */
970 u8 rsvd4; /* DWORD 4 */
971 u8 hde; /* DWORD 4 */
972 u8 dde; /* DWORD 4 */
973 u8 erl[2]; /* DWORD 4 */
974 u8 rsvd5[6]; /* DWORD 4 */
975 u8 imd; /* DWORD 4 */
976 u8 ir2t; /* DWORD 4 */
977 u8 rsvd6[3]; /* DWORD 4 */
978 u8 stat_sn[32]; /* DWORD 5 */
979 u8 rsvd7[32]; /* DWORD 6 */
980 u8 rsvd8[32]; /* DWORD 7 */
981 u8 max_recv_dataseg_len[24]; /* DWORD 8 */
982 u8 rsvd9[8]; /* DWORD 8 */
983 u8 rsvd10[32]; /* DWORD 9 */
984 u8 rsvd11[32]; /* DWORD 10 */
985 u8 max_cxns[16]; /* DWORD 11 */
986 u8 rsvd12[11]; /* DWORD 11*/
987 u8 invld; /* DWORD 11 */
988 u8 rsvd13;/* DWORD 11*/
989 u8 dmsg; /* DWORD 11 */
990 u8 data_seq_inorder; /* DWORD 11 */
991 u8 pdu_seq_inorder; /* DWORD 11 */
992 u8 rsvd14[32]; /*DWORD 12 */
993 u8 rsvd15[32]; /* DWORD 13 */
994 u8 rsvd16[32]; /* DWORD 14 */
995 u8 rsvd17[32]; /* DWORD 15 */
1006 u8 ulp_num; /* ULP to which CID binded */
H A Dbe_cmds.h44 u8 embedded_payload[236]; /* used by embedded cmds */
144 u8 physical_port;
145 u8 port_link_status;
146 u8 port_duplex;
147 u8 port_speed;
151 u8 port_fault;
152 u8 rsvd0[7];
210 u8 opcode; /* dword 0 */
211 u8 subsystem; /* dword 0 */
212 u8 port_number; /* dword 0 */
213 u8 domain; /* dword 0 */
216 u8 version; /* dword 3 */
217 u8 rsvd0[3]; /* dword 3 */
245 u8 cidx[13]; /* dword 0 */
246 u8 rsvd0[3]; /* dword 0 */
247 u8 epidx[13]; /* dword 0 */
248 u8 valid; /* dword 0 */
249 u8 rsvd1; /* dword 0 */
250 u8 size; /* dword 0 */
251 u8 pidx[13]; /* dword 1 */
252 u8 rsvd2[3]; /* dword 1 */
253 u8 pd[10]; /* dword 1 */
254 u8 count[3]; /* dword 1 */
255 u8 solevent; /* dword 1 */
256 u8 stalled; /* dword 1 */
257 u8 armed; /* dword 1 */
258 u8 rsvd3[4]; /* dword 2 */
259 u8 func[8]; /* dword 2 */
260 u8 rsvd4; /* dword 2 */
261 u8 delaymult[10]; /* dword 2 */
262 u8 rsvd5[2]; /* dword 2 */
263 u8 phase[2]; /* dword 2 */
264 u8 nodelay; /* dword 2 */
265 u8 rsvd6[4]; /* dword 2 */
266 u8 rsvd7[32]; /* dword 3 */
273 u8 context[sizeof(struct amap_eq_context) / 8]; /* dw[4] */
291 u8 intr_chap_name[256];
292 u8 intr_secret[16];
293 u8 target_chap_name[256];
294 u8 target_secret[16];
302 u8 auth_method_type;
303 u8 padding[3];
308 u8 flags;
309 u8 header_digest;
310 u8 data_digest;
311 u8 rsvd0;
321 u8 reserved;
322 u8 ip_type;
323 u8 addr[16];
342 u8 flags;
343 u8 error_recovery_level;
356 u8 isid[6];
361 u8 target_name[224];
362 u8 initiator_iscsiname[224];
379 u8 addr[ETH_ALEN];
411 u8 type;
412 u8 permanent;
423 u8 ip_type;
424 u8 ipv6_prefix_length;
425 u8 addr[16];
426 u8 subnet_mask[16];
505 u8 cidx[11]; /* dword 0 */
506 u8 rsvd0; /* dword 0 */
507 u8 coalescwm[2]; /* dword 0 */
508 u8 nodelay; /* dword 0 */
509 u8 epidx[11]; /* dword 0 */
510 u8 rsvd1; /* dword 0 */
511 u8 count[2]; /* dword 0 */
512 u8 valid; /* dword 0 */
513 u8 solevent; /* dword 0 */
514 u8 eventable; /* dword 0 */
515 u8 pidx[11]; /* dword 1 */
516 u8 rsvd2; /* dword 1 */
517 u8 pd[10]; /* dword 1 */
518 u8 eqid[8]; /* dword 1 */
519 u8 stalled; /* dword 1 */
520 u8 armed; /* dword 1 */
521 u8 rsvd3[4]; /* dword 2 */
522 u8 func[8]; /* dword 2 */
523 u8 rsvd4[20]; /* dword 2 */
524 u8 rsvd5[32]; /* dword 3 */
528 u8 rsvd0[12]; /* dword 0 */
529 u8 coalescwm[2]; /* dword 0 */
530 u8 nodelay; /* dword 0 */
531 u8 rsvd1[12]; /* dword 0 */
532 u8 count[2]; /* dword 0 */
533 u8 valid; /* dword 0 */
534 u8 rsvd2; /* dword 0 */
535 u8 eventable; /* dword 0 */
536 u8 eqid[16]; /* dword 1 */
537 u8 rsvd3[15]; /* dword 1 */
538 u8 armed; /* dword 1 */
539 u8 cqecount[16];/* dword 2 */
540 u8 rsvd4[16]; /* dword 2 */
541 u8 rsvd5[32]; /* dword 3 */
547 u8 page_size;
548 u8 rsvd0;
549 u8 context[sizeof(struct amap_cq_context) / 8];
565 u8 con_index[14];
566 u8 rsvd0[2];
567 u8 ring_size[4];
568 u8 fetch_wrb;
569 u8 fetch_r2t;
570 u8 cq_id[10];
571 u8 prod_index[14];
572 u8 fid[8];
573 u8 pdid[9];
574 u8 valid;
575 u8 rsvd1[32];
576 u8 rsvd2[32];
583 u8 context[sizeof(struct amap_mcc_context) / 8];
611 u8 byte[ETH_ALEN];
617 u8 promiscuous;
618 u8 interface_id;
655 u8 mac_address[ETH_ALEN];
667 u8 mac_address[6];
677 u8 initiator_name[ISCSI_NAME_LEN];
678 u8 initiator_alias[BEISCSI_ALIAS_LEN];
694 u8 phys_port;
695 u8 mac_duplex;
696 u8 mac_speed;
697 u8 mac_fault;
698 u8 mgmt_mac_duplex;
699 u8 mgmt_mac_speed;
779 u8 dbuf_cindex[13]; /* dword 0 */
780 u8 rsvd0[3]; /* dword 0 */
781 u8 ring_size[4]; /* dword 0 */
782 u8 ring_state[4]; /* dword 0 */
783 u8 rsvd1[8]; /* dword 0 */
784 u8 dbuf_pindex[13]; /* dword 1 */
785 u8 rsvd2; /* dword 1 */
786 u8 pci_func_id[8]; /* dword 1 */
787 u8 rx_pdid[9]; /* dword 1 */
788 u8 rx_pdid_valid; /* dword 1 */
789 u8 default_buffer_size[16]; /* dword 2 */
790 u8 cq_id_recv[10]; /* dword 2 */
791 u8 rx_pdid_not_valid; /* dword 2 */
792 u8 rsvd3[5]; /* dword 2 */
793 u8 rsvd4[32]; /* dword 3 */
797 u8 rsvd0[16]; /* dword 0 */
798 u8 ring_size[4]; /* dword 0 */
799 u8 rsvd1[12]; /* dword 0 */
800 u8 rsvd2[22]; /* dword 1 */
801 u8 rx_pdid[9]; /* dword 1 */
802 u8 rx_pdid_valid; /* dword 1 */
803 u8 default_buffer_size[16]; /* dword 2 */
804 u8 cq_id_recv[16]; /* dword 2 */
805 u8 rsvd3[32]; /* dword 3 */
811 u8 ulp_num;
814 u8 dua_feature;
822 u8 rsvd0;
823 u8 ulp_num;
858 u8 ulp_num;
859 u8 dua_feature;
866 u8 rsvd0;
867 u8 ulp_num;
890 u8 hw_sts[8]; /* dword 0 */
891 u8 i_sts[8]; /* dword 0 */
892 u8 i_resp[8]; /* dword 0 */
893 u8 i_flags[7]; /* dword 0 */
894 u8 s; /* dword 0 */
895 u8 i_exp_cmd_sn[32]; /* dword 1 */
896 u8 code[6]; /* dword 2 */
897 u8 cid[10]; /* dword 2 */
898 u8 wrb_index[8]; /* dword 2 */
899 u8 i_cmd_wnd[8]; /* dword 2 */
900 u8 i_res_cnt[31]; /* dword 3 */
901 u8 valid; /* dword 3 */
906 u8 hw_sts[8]; /* dword 0 */
907 u8 i_sts[8]; /* dword 0 */
908 u8 i_resp[8]; /* dword 0 */
909 u8 i_flags[7]; /* dword 0 */
910 u8 s; /* dword 0 */
911 u8 i_exp_cmd_sn[32]; /* dword 1 */
912 u8 code[6]; /* dword 2 */
913 u8 icd_index[12]; /* dword 2 */
914 u8 rsvd[6]; /* dword 2 */
915 u8 i_cmd_wnd[8]; /* dword 2 */
916 u8 i_res_cnt[31]; /* dword 3 */
917 u8 valid; /* dword 3 */
921 u8 hw_sts[8]; /* dword 0 */
922 u8 i_sts[8]; /* dword 0 */
923 u8 wrb_index[16]; /* dword 0 */
924 u8 i_exp_cmd_sn[32]; /* dword 1 */
925 u8 code[6]; /* dword 2 */
926 u8 cmd_cmpl; /* dword 2 */
927 u8 rsvd0; /* dword 2 */
928 u8 i_cmd_wnd[8]; /* dword 2 */
929 u8 cid[13]; /* dword 2 */
930 u8 u; /* dword 2 */
931 u8 o; /* dword 2 */
932 u8 s; /* dword 2 */
933 u8 i_res_cnt[31]; /* dword 3 */
934 u8 valid; /* dword 3 */
942 u8 hw_sts;
943 u8 cmd_wnd;
944 u8 res_flag; /* the s feild of structure */
945 u8 i_resp; /* for skh if cmd_complete is set then i_sts is response */
946 u8 i_flags; /* for skh or the u and o feilds */
947 u8 i_sts; /* for skh if cmd_complete is not-set then i_sts is status */
952 u8 ack_num[32]; /* DWORD 0 */
953 u8 pdu_bytes_rcvd[32]; /* DWORD 1 */
954 u8 code[6]; /* DWORD 2 */
955 u8 cid[10]; /* DWORD 2 */
956 u8 wrb_idx[8]; /* DWORD 2 */
957 u8 rsvd0[8]; /* DWORD 2*/
958 u8 rsvd1[31]; /* DWORD 3*/
959 u8 valid; /* DWORD 3 */
963 u8 ack_num[32]; /* DWORD 0 */
964 u8 pdu_bytes_rcvd[32]; /* DWORD 1 */
965 u8 code[6]; /* DWORD 2 */
966 u8 rsvd0[10]; /* DWORD 2 */
967 u8 wrb_idx[16]; /* DWORD 2 */
968 u8 rsvd1[16]; /* DWORD 3 */
969 u8 cid[13]; /* DWORD 3 */
970 u8 rsvd2[2]; /* DWORD 3 */
971 u8 valid; /* DWORD 3 */
994 u8 hdr_ring_id;
995 u8 data_ring_id;
1021 u8 do_offload;
1022 u8 rsvd0[3];
1035 u8 do_offload;
1036 u8 ifd_state;
1037 u8 rsvd0[2];
1039 u8 tcp_window_scale_count;
1040 u8 rsvd1;
1042 u8 rsvd2;
1353 bool embedded, u8 sge_cnt);
1356 u8 subsystem, u8 opcode, int cmd_len);
/linux-4.1.27/arch/x86/kvm/
H A Di8254.h11 u8 count_latched;
12 u8 status_latched;
13 u8 status;
14 u8 read_state;
15 u8 write_state;
16 u8 write_latch;
17 u8 rw_mode;
18 u8 mode;
19 u8 bcd; /* not supported */
20 u8 gate; /* timer start */
/linux-4.1.27/arch/arm/mach-omap2/
H A Dprminst44xx.h23 extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx);
24 extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx);
25 extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part,
30 extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
32 extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
34 int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
/linux-4.1.27/sound/usb/6fire/
H A Dcomm.h27 u8 *receiver_buffer;
29 u8 serial; /* urb serial */
31 void (*init_urb)(struct comm_runtime *rt, struct urb *urb, u8 *buffer,
34 int (*write8)(struct comm_runtime *rt, u8 request, u8 reg, u8 value);
35 int (*write16)(struct comm_runtime *rt, u8 request, u8 reg,
36 u8 vh, u8 vl);
/linux-4.1.27/drivers/scsi/
H A Dgdth.h318 u8 msg_answer; /* answer flag */
319 u8 msg_ext; /* more messages */
320 u8 msg_reserved[2];
360 u8 vendor[8]; /* vendor string */
361 u8 product[16]; /* product string */
362 u8 revision[4]; /* revision */
368 u8 available; /* flag: access is available */
369 u8 init; /* medium is initialized */
370 u8 devtype; /* SCSI devicetype */
371 u8 rm_medium; /* medium is removable */
372 u8 wp_medium; /* medium is write protected */
373 u8 ansi; /* SCSI I/II or III? */
374 u8 protocol; /* same as ansi */
375 u8 sync; /* flag: sync. transfer enab. */
376 u8 disc; /* flag: disconnect enabled */
377 u8 queueing; /* flag: command queing enab. */
378 u8 cached; /* flag: caching enabled */
379 u8 target_id; /* target ID of device */
380 u8 lun; /* LUN id of device */
381 u8 orphan; /* flag: drive fragment */
385 u8 percent; /* progress for surface check */
386 u8 last_check; /* IOCTRL operation */
387 u8 res[2];
389 u8 multi_bus; /* multi bus dev? (fibre ch.) */
390 u8 mb_status; /* status: available? */
391 u8 res2[2];
392 u8 mb_alt_status; /* status on second bus */
393 u8 mb_alt_bid; /* number of second bus */
394 u8 mb_alt_tid; /* target id on second bus */
395 u8 res3;
396 u8 fc_flag; /* from 1.22/2.22: info valid?*/
397 u8 res4;
406 u8 siop_id; /* SCSI processor ID */
407 u8 siop_state; /* SCSI processor state */
419 u8 sddc_type; /* 0x08: grown, 0x10: prim. */
420 u8 sddc_format; /* list entry format */
421 u8 sddc_len; /* list entry length */
422 u8 sddc_res;
434 u8 tid; /* target ID */
435 u8 lun; /* LUN */
436 u8 res[2];
450 u8 list_entries; /* list entry count */
451 u8 first_chan; /* first channel number */
452 u8 last_chan; /* last channel number */
453 u8 chan_count; /* (R) channel count */
462 u8 type; /* type (SCSI, FCAL) */
463 u8 local_no; /* local number */
472 u8 proc_id; /* processor id */
473 u8 proc_defect; /* defect ? */
474 u8 reserved[2];
481 u8 al_cache_drive; /* cache drive number */
482 u8 al_status; /* cache drive state */
483 u8 al_res[2];
488 u8 ai_type; /* array type (RAID0,4,5) */
489 u8 ai_cache_drive_cnt; /* active cachedrives */
490 u8 ai_state; /* array drive state */
491 u8 ai_master_cd; /* master cachedrive */
497 u8 ai_name[8]; /* name of the array drive */
498 u8 ai_controller_cnt; /* number of controllers */
499 u8 ai_removable; /* flag: removable */
500 u8 ai_write_protected; /* flag: write protected */
501 u8 ai_devtype; /* type: always direct access */
503 u8 ai_drive_entries; /* number of drive components */
504 u8 ai_protected; /* protection flag */
505 u8 ai_verify_state; /* state of a parity verify */
506 u8 ai_ext_state; /* extended array drive state */
507 u8 ai_expand_state; /* array expand state (>=2.18)*/
508 u8 ai_reserved[3];
514 u8 cd_handle; /* master cachedrive */
515 u8 is_arrayd; /* Flag: is array drive? */
516 u8 is_master; /* Flag: is array master? */
517 u8 is_parity; /* Flag: is parity drive? */
518 u8 is_hotfix; /* Flag: is hotfix drive? */
519 u8 res[3];
555 u8 cd_name[8]; /* cache drive name */
559 u8 cd_initialized; /* drive is initialized */
560 u8 cd_removable; /* media is removable */
561 u8 cd_write_protected; /* write protected */
562 u8 cd_flags; /* Pool Hot Fix? */
569 u8 ld_name[8]; /* log. drive name */
570 u8 ld_error; /* error */
586 u8 product_0_1_name[16];
587 u8 product_4_5_name[16];
588 u8 product_cluster_name[16];
589 u8 product_reserved[16];
590 u8 scsi_cluster_target_vendor_id[16];
591 u8 cluster_raid_fw_name[16];
592 u8 oem_brand_name[16];
593 u8 oem_raid_type[16];
594 u8 bios_type[13];
595 u8 bios_title[50];
596 u8 oem_company_name[37];
599 u8 validation_status[80];
600 u8 reserved_1[4];
601 u8 scsi_host_drive_inquiry_vendor_id[16];
602 u8 library_file_template[16];
603 u8 reserved_2[16];
604 u8 tool_name_1[32];
605 u8 tool_name_2[32];
606 u8 tool_name_3[32];
607 u8 oem_contact_1[84];
608 u8 oem_contact_2[84];
609 u8 oem_contact_3[84];
619 u8 chaining; /* Chaining supported */
620 u8 striping; /* Striping (RAID-0) supp. */
621 u8 mirroring; /* Mirroring (RAID-1) supp. */
622 u8 raid; /* RAID-4/5/10 supported */
628 u8 oem_id[2]; /* OEM ID */
632 u8 mem_banks; /* memory banks */
633 u8 chan_type; /* channel type */
634 u8 chan_count; /* channel count */
635 u8 rdongle_pres; /* dongle present? */
641 u8 update_pres; /* update present? */
642 u8 xor_pres; /* XOR engine present? */
643 u8 prom_type; /* ROM type (eprom/flash) */
644 u8 prom_count; /* number of ROM devices */
648 u8 ft_bus_system; /* fault bus supported? */
649 u8 subtype_valid; /* board_subtype valid? */
650 u8 board_subtype; /* subtype/hardware level */
651 u8 ramparity_pres; /* RAM parity check hardware? */
658 u8 host_drive; /* host drive number */
659 u8 log_drive; /* log. drive (master) */
660 u8 reserved;
661 u8 rw_attribs; /* r/w attribs */
668 u8 secs_p_head; /* sectors/head */
669 u8 heads_p_cyl; /* heads/cylinder */
670 u8 reserved;
671 u8 clust_drvtype; /* cluster drive type */
681 u8 S_Cmd_Indx; /* special command */
682 u8 volatile S_Status; /* status special command */
685 u8 volatile Sema0; /* command semaphore */
686 u8 reserved2[3];
687 u8 Cmd_Index; /* command number */
688 u8 reserved3[3];
697 u8 gdt_dpr_cmd[1]; /* commands */
704 u8 switch_support; /* see need_deinit */
705 u8 padding[9];
706 u8 os_used[16]; /* OS code per service */
707 u8 unused[28];
708 u8 fw_magic; /* contr. ID from firmware */
713 u8 os_used[16]; /* OS code per service */
715 u8 switch_support; /* see need_deinit */
716 u8 padding;
724 u8 bios_used[0x3c00-32]; /* 15KB - 32Bytes BIOS */
727 u8 switch_support; /* see need_deinit */
728 u8 padding[9];
729 u8 os_used[16]; /* OS code per service */
731 u8 bios_area[0x4000]; /* 16KB reserved for BIOS */
735 u8 if_area[0x3000]; /* 12KB for interface */
738 u8 memlock; /* write protection DPRAM */
739 u8 event; /* release event */
740 u8 irqen; /* board interrupts enable */
741 u8 irqdel; /* acknowledge board int. */
742 u8 volatile Sema1; /* status semaphore */
743 u8 rq; /* IRQ/DRQ configuration */
751 u8 if_area[0xff0-sizeof(gdt_pci_sram)];
755 u8 unused0[1];
756 u8 volatile Sema1; /* command semaphore */
757 u8 unused1[3];
758 u8 irqen; /* board interrupts enable */
759 u8 unused2[2];
760 u8 event; /* release event */
761 u8 unused3[3];
762 u8 irqdel; /* acknowledge board int. */
763 u8 unused4[3];
769 u8 cfg_reg; /* DPRAM cfg.(2:below 1MB,0:anywhere)*/
770 u8 unused1[0x3f];
771 u8 volatile sema0_reg; /* command semaphore */
772 u8 volatile sema1_reg; /* status semaphore */
773 u8 unused2[2];
777 u8 unused3[0x10];
778 u8 ldoor_reg; /* PCI to local doorbell */
779 u8 unused4[3];
780 u8 volatile edoor_reg; /* local to PCI doorbell */
781 u8 unused5[3];
782 u8 control0; /* control0 register(unused) */
783 u8 control1; /* board interrupts enable */
784 u8 unused6[0x16];
791 u8 if_area[0x4000-sizeof(gdt_pci_sram)];
798 u8 unused1[16];
799 u8 volatile sema0_reg; /* command semaphore */
800 u8 unused2;
801 u8 volatile sema1_reg; /* status semaphore */
802 u8 unused3;
806 u8 ldoor_reg; /* PCI to local doorbell */
807 u8 unused4[11];
808 u8 volatile edoor_reg; /* local to PCI doorbell */
809 u8 unused5[7];
810 u8 edoor_en_reg; /* board interrupts enable */
811 u8 unused6[27];
822 u8 if_area[0x3000-sizeof(gdt_pci_sram)];
861 u8 scratch_busy; /* in use? */
862 u8 dma64_support; /* 64-bit DMA supported? */
865 u8 scan_mode; /* current scan mode */
866 u8 irq; /* IRQ */
867 u8 drq; /* DRQ (ISA controllers) */
874 u8 present; /* Flag: host drive present? */
875 u8 is_logdrv; /* Flag: log. drive (master)? */
876 u8 is_arraydrv; /* Flag: array drive? */
877 u8 is_master; /* Flag: array drive master? */
878 u8 is_parity; /* Flag: parity drive? */
879 u8 is_hotfix; /* Flag: hotfix drive? */
880 u8 master_no; /* number of master drive */
881 u8 lock; /* drive locked? (hot plug) */
882 u8 heads; /* mapping */
883 u8 secs;
886 u8 ldr_no; /* log. drive no. */
887 u8 rw_attribs; /* r/w attributes */
888 u8 cluster_type; /* cluster properties */
889 u8 media_changed; /* Flag:MOUNT/UNMOUNT occurred */
893 u8 lock; /* channel locked? (hot plug) */
894 u8 pdev_cnt; /* physical device count */
895 u8 local_no; /* local channel number */
896 u8 io_cnt[MAXID]; /* current IO count */
909 u8 priority;
918 u8 bus_cnt; /* SCSI bus count */
919 u8 tid_cnt; /* Target ID count */
920 u8 bus_id[MAXBUS]; /* IOP IDs */
921 u8 virt_bus; /* number of virtual bus */
922 u8 more_proc; /* more /proc info supported */
947 u8 type_qual;
948 u8 modif_rmb;
949 u8 version;
950 u8 resp_aenc;
951 u8 add_length;
952 u8 reserved1;
953 u8 reserved2;
954 u8 misc;
955 u8 vendor[8];
956 u8 product[16];
957 u8 revision[4];
974 u8 errorcode;
975 u8 segno;
976 u8 key;
978 u8 add_length;
980 u8 adsc;
981 u8 adsq;
982 u8 fruc;
983 u8 key_spec[3];
989 u8 data_length;
990 u8 med_type;
991 u8 dev_par;
992 u8 bd_length;
995 u8 dens_code;
996 u8 block_count[3];
997 u8 reserved;
998 u8 block_length[3];
/linux-4.1.27/drivers/iio/accel/
H A Dmma9551_core.h49 int mma9551_read_config_byte(struct i2c_client *client, u8 app_id,
50 u16 reg, u8 *val);
51 int mma9551_write_config_byte(struct i2c_client *client, u8 app_id,
52 u16 reg, u8 val);
53 int mma9551_read_status_byte(struct i2c_client *client, u8 app_id,
54 u16 reg, u8 *val);
55 int mma9551_read_config_word(struct i2c_client *client, u8 app_id,
57 int mma9551_write_config_word(struct i2c_client *client, u8 app_id,
59 int mma9551_read_status_word(struct i2c_client *client, u8 app_id,
61 int mma9551_read_config_words(struct i2c_client *client, u8 app_id,
62 u16 reg, u8 len, u16 *buf);
63 int mma9551_read_status_words(struct i2c_client *client, u8 app_id,
64 u16 reg, u8 len, u16 *buf);
65 int mma9551_write_config_words(struct i2c_client *client, u8 app_id,
66 u16 reg, u8 len, u16 *buf);
67 int mma9551_update_config_bits(struct i2c_client *client, u8 app_id,
68 u16 reg, u8 mask, u8 val);
70 u8 app_id, u8 bitnum, int polarity);
/linux-4.1.27/arch/sparc/include/asm/
H A Didprom.h13 u8 id_format; /* Format identifier (always 0x01) */
14 u8 id_machtype; /* Machine type */
15 u8 id_ethaddr[6]; /* Hardware ethernet address */
18 u8 id_cksum; /* Checksum - xor of the data bytes */
19 u8 reserved[16];
/linux-4.1.27/drivers/usb/gadget/
H A Du_os_desc.h38 static inline u8 *__usb_ext_prop_ptr(u8 *buf, size_t offset) __usb_ext_prop_ptr()
43 static inline u8 *usb_ext_prop_size_ptr(u8 *buf) usb_ext_prop_size_ptr()
48 static inline u8 *usb_ext_prop_type_ptr(u8 *buf) usb_ext_prop_type_ptr()
53 static inline u8 *usb_ext_prop_name_len_ptr(u8 *buf) usb_ext_prop_name_len_ptr()
58 static inline u8 *usb_ext_prop_name_ptr(u8 *buf) usb_ext_prop_name_ptr()
63 static inline u8 *usb_ext_prop_data_len_ptr(u8 *buf, size_t off) usb_ext_prop_data_len_ptr()
69 static inline u8 *usb_ext_prop_data_ptr(u8 *buf, size_t off) usb_ext_prop_data_ptr()
74 static inline void usb_ext_prop_put_size(u8 *buf, int dw_size) usb_ext_prop_put_size()
79 static inline void usb_ext_prop_put_type(u8 *buf, int type) usb_ext_prop_put_type()
84 static inline int usb_ext_prop_put_name(u8 *buf, const char *name, int pnl) usb_ext_prop_put_name()
99 static inline void usb_ext_prop_put_binary(u8 *buf, int pnl, const u8 *data, usb_ext_prop_put_binary()
106 static inline int usb_ext_prop_put_unicode(u8 *buf, int pnl, const char *string, usb_ext_prop_put_unicode()
/linux-4.1.27/include/linux/spi/
H A Dad7877.h18 u8 stopacq_polarity; /* 1 = Active HIGH, 0 = Active LOW */
19 u8 first_conversion_delay; /* 0 = 0.5us, 1 = 128us, 2 = 1ms, 3 = 8ms */
20 u8 acquisition_time; /* 0 = 2us, 1 = 4us, 2 = 8us, 3 = 16us */
21 u8 averaging; /* 0 = 1, 1 = 4, 2 = 8, 3 = 16 */
22 u8 pen_down_acc_interval; /* 0 = covert once, 1 = every 0.5 ms,
/linux-4.1.27/arch/m68k/include/asm/
H A Didprom.h12 u8 id_format; /* Format identifier (always 0x01) */
13 u8 id_machtype; /* Machine type */
14 u8 id_ethaddr[6]; /* Hardware ethernet address */
17 u8 id_cksum; /* Checksum - xor of the data bytes */
18 u8 reserved[16];
/linux-4.1.27/drivers/scsi/esas2r/
H A Datioctl.h55 u8 signature[EXPRESS_IOCTL_SIGNATURE_SIZE];
56 u8 return_code;
70 u8 channel;
71 u8 retries;
72 u8 pad[5];
82 u8 function;
86 u8 img_type;
94 u8 pad[2];
97 u8 image[0x80000];
109 u8 channel[MAX_CHANNEL];
113 u8 major_rev;
114 u8 minor_rev;
115 u8 IRQ;
116 u8 revision_id;
117 u8 pci_bus;
118 u8 pci_dev_func;
119 u8 core_rev;
120 u8 host_no;
124 u8 pad[3];
206 u8 bus_num;
207 u8 device_num;
208 u8 function_num;
209 u8 reserved;
224 u8 cntlr_class;
227 u8 io_bus_type;
233 u8 reserved[32];
264 u8 reserved2[7];
280 u8 reserved[28];
290 u8 reserved[32];
310 u8 reserved[92];
317 u8 sas_addr[8];
318 u8 lun[8];
319 u8 drive_sts;
325 u8 drive_usage;
330 u8 reserved[30]; /* spec says 22 */
337 u8 raid_type;
338 u8 status;
339 u8 information;
340 u8 drive_cnt;
341 u8 reserved[20];
348 u8 ident_frame[0x1C];
349 u8 port_id;
350 u8 neg_link_rate;
351 u8 min_link_rate;
352 u8 max_link_rate;
353 u8 phy_change_cnt;
354 u8 auto_discover;
361 u8 reserved[2];
362 u8 attach_ident_frame[0x1C];
366 u8 number_of_phys;
367 u8 reserved[3];
373 u8 phy_id;
374 u8 neg_link_rate;
378 u8 prog_minlink_rate;
379 u8 prog_maxlink_rate;
380 u8 signal_class;
386 u8 reserved[3];
390 u8 phy_id;
391 u8 reset_cnts;
395 u8 reserved[2];
412 u8 phy_id;
413 u8 port_id;
414 u8 conn_rate;
415 u8 reserved;
416 u8 dest_sas_addr[8];
418 u8 smp_req[1020];
419 u8 conn_sts;
420 u8 reserved2[3];
422 u8 smp_rsp[1020];
426 u8 conn_sts;
427 u8 reserved[3];
428 u8 data_present;
429 u8 status;
431 u8 rsp[256];
436 u8 phy_id;
437 u8 port_id;
438 u8 conn_rate;
439 u8 reserved;
440 u8 dest_sas_addr[8];
441 u8 lun[8];
442 u8 cdb_len;
443 u8 add_cdb_len;
444 u8 reserved2[2];
445 u8 cdb[16];
455 u8 add_cdb[24];
462 u8 conn_sts;
463 u8 reserved[3];
464 u8 sts_fis[20];
470 u8 phy_id;
471 u8 port_id;
472 u8 conn_rate;
473 u8 reserved;
474 u8 dest_sas_addr[8];
475 u8 reserved2[4];
476 u8 command_fis[20];
494 u8 phy_id;
495 u8 reserved[3];
496 u8 reg_dth_fis[20];
500 u8 sas_addr[8];
501 u8 sas_lun[8];
502 u8 host_index;
503 u8 path_id;
504 u8 target_id;
505 u8 lun;
509 u8 host_index;
510 u8 path_id;
511 u8 target_id;
512 u8 lun;
513 u8 sas_addr[8];
514 u8 sas_lun[8];
518 u8 host_index;
519 u8 path_id;
520 u8 target_id;
521 u8 lun;
529 u8 task_mgt_func;
530 u8 reserved2[7];
554 u8 connector[16];
555 u8 location;
561 u8 reserved[15];
566 u8 type_flags;
571 u8 value;
575 u8 type;
579 u8 rate;
580 u8 reserved[6];
589 u8 tx_vendor_unique[64];
596 u8 rx_vendor_unique[64];
603 u8 fixed_pattern;
607 u8 user_pattern_len;
608 u8 pattern_reserved[6];
617 u8 phy_id;
619 u8 num_of_cntls;
620 u8 reserved[4];
626 u8 spinup_rate;
627 u8 link_reserved[7];
685 u8 class_code[3];
686 u8 rev_id;
687 u8 bus_num;
688 u8 dev_num;
689 u8 func_num;
690 u8 link_width_max;
691 u8 link_width_curr;
694 u8 link_speed_max;
695 u8 link_speed_curr;
701 u8 interrupt_mode;
707 u8 msi_vector_cnt;
708 u8 reserved[19];
711 u8 adap_type;
725 u8 adap_flags;
735 u8 num_ports;
736 u8 num_phys;
737 u8 drvr_rev_major;
738 u8 drvr_rev_minor;
739 u8 drvr_revsub_minor;
740 u8 drvr_rev_build;
750 u8 num_busses;
751 u8 num_connectors;
752 u8 adap_flags2;
761 u8 num_temp_sensors;
772 u8 reserved3[0x138];
781 u8 addr_type;
788 u8 port_id;
790 u8 address[256];
798 u8 mem_func;
799 u8 mem_type;
801 u8 pci_index;
802 u8 i2c_dev;
804 u8 i2c_status;
807 u8 reserved[48];
817 u8 trace_func;
825 u8 trace_type;
829 u8 reserved[2];
833 u8 reserved2[48];
841 u8 cdb[32];
842 u8 cdb_length;
843 u8 req_status;
856 u8 scsi_status;
857 u8 sense_length;
867 u8 lun[8];
869 u8 sense_data[0xFC];
870 u8 reserved[0x28];
878 u8 addr_type;
885 u8 reserved;
888 u8 address[256];
901 u8 adap_func;
906 u8 adap_state;
916 u8 reserved[2];
920 u8 temp_sensor;
921 u8 temp_state;
934 u8 reserved2[20];
947 u8 phy_id[ATTO_SDI_MAX_PHYS_WIDE_PORT]; /* IDs of parent exp/adapt */
951 u8 sas_level;
954 u8 slot_num;
957 u8 dev_type;
962 u8 ini_flags;
963 u8 tgt_flags;
964 u8 link_rate; /* SMP_RATE_XXX */
965 u8 loc_flags;
969 u8 pm_port;
970 u8 reserved[0x60];
979 u8 info_type;
985 u8 reserved[11];
990 u8 version;
991 u8 function; /* ATTO_FUNC_XXX */
992 u8 status;
1006 u8 flags;
1010 u8 reserved2[56];
1013 u8 byte[1];
1030 u8 cdb[16];
1035 u8 sense_len;
1036 u8 scsi_stat;
1037 u8 reserved[8];
1038 u8 sense_data[80];
1048 u8 sub_func;
1049 u8 reserved[15];
1055 u8 prod_info[32];
1073 u8 sub_func;
1074 u8 flags;
1075 u8 reserved[3];
1101 u8 cfg_func;
1102 u8 reserved[11];
1105 u8 bytes[112];
1116 u8 mgt_func;
1117 u8 scan_generation;
1120 u8 reserved[8];
1122 u8 bytes[112];
1142 u8 rsp_len;
1143 u8 reserved[7];
1144 u8 version_info[1];
1150 u8 version;
1151 u8 function; /* VDA_FUNC_XXXX */
1152 u8 status; /* ATTO_STS_XXX */
1153 u8 vda_status; /* RS_XXX (if status == ATTO_STS_SUCCESS) */
1155 u8 reserved[8];
1166 u8 cmd_info[256];
1170 u8 data[1];
1177 u8 version;
1183 u8 function;
1191 u8 status; /* ATTO_STS_XXX */
1192 u8 smp_status; /* if status == ATTO_STS_SUCCESS */
1199 u8 phy_id;
1200 u8 dev_index;
1205 u8 flags;
1208 u8 reserved[31];
1211 u8 byte[1];
/linux-4.1.27/drivers/net/can/usb/peak_usb/
H A Dpcan_usb_pro.h45 u8 version[4];
46 u8 day;
47 u8 month;
48 u8 year;
49 u8 dummy;
59 u8 version[4];
60 u8 day;
61 u8 month;
62 u8 year;
63 u8 dummy;
89 u8 data_type;
90 u8 channel;
96 u8 data_type;
97 u8 channel;
102 u8 data_type;
103 u8 channel;
108 u8 data_type;
109 u8 dummy;
114 u8 data_type;
115 u8 dummy;
120 u8 data_type;
121 u8 channel;
127 u8 data_type;
128 u8 channel;
134 u8 data_type;
135 u8 client;
136 u8 flags;
137 u8 len;
141 u8 data[8];
150 u8 data_type;
151 u8 channel;
158 u8 data_type;
159 u8 dummy[3];
164 u8 data_type;
165 u8 client;
166 u8 flags;
167 u8 len;
169 u8 data[8];
173 u8 data_type;
/linux-4.1.27/drivers/staging/vt6656/
H A Dint.h36 u8 tsr0;
37 u8 pkt0;
39 u8 tsr1;
40 u8 pkt1;
42 u8 tsr2;
43 u8 pkt2;
45 u8 tsr3;
46 u8 pkt3;
49 u8 isr0;
50 u8 isr1;
51 u8 rts_success;
52 u8 rts_fail;
53 u8 ack_fail;
54 u8 fcs_err;
55 u8 sw[2];
/linux-4.1.27/drivers/scsi/bfa/
H A Dbfa_defs.h112 u8 version; /* vpd data version */
113 u8 vpd_sig[3]; /* characters 'V', 'P', 'D' */
114 u8 chksum; /* u8 checksum */
115 u8 vendor; /* vendor */
116 u8 len; /* vpd data length excluding header */
117 u8 rsv;
118 u8 data[BFA_MFG_VPD_LEN]; /* vpd data */
287 u8 nports;
288 u8 max_speed;
289 u8 prototype;
292 u8 pcie_gen;
293 u8 pcie_lanes_orig;
294 u8 pcie_lanes;
295 u8 cna_capable;
297 u8 is_mezz;
298 u8 trunk_capable;
299 u8 mfg_day; /* manufacturing day */
300 u8 mfg_month; /* manufacturing month */
303 u8 uuid[BFA_ADAPTER_UUID_LEN];
413 u8 port_id; /* port number */
414 u8 port_mode; /* bfa_mode_s */
415 u8 cap_bm; /* capability */
416 u8 port_mode_cfg; /* bfa_mode_s */
417 u8 def_fn; /* 1 if default fn */
418 u8 rsvd[3]; /* 64bit align */
590 u8 version; /*!< manufacturing block version */
591 u8 mfg_sig[3]; /*!< characters 'M', 'F', 'G' */
596 u8 mfg_day; /*!< manufacturing day */
597 u8 mfg_month; /*!< manufacturing month */
600 u8 num_wwn; /*!< number of wwns assigned */
601 u8 mfg_speeds; /*!< speeds allowed for this adapter */
602 u8 rsv[2];
608 u8 num_mac; /*!< number of mac addresses */
609 u8 rsv2;
617 u8 rsv3;
618 u8 mfg_nports; /*!< number of ports */
621 u8 rsv4[84];
622 u8 md5_chksum[BFA_MFG_CHKSUM_SIZE]; /*!< md5 checksum */
720 u8 version;
721 u8 rsvd1;
723 u8 enable; /* enable/disable SAN boot */
724 u8 speed; /* boot speed settings */
725 u8 topology; /* boot topology setting */
726 u8 bootopt; /* bfa_boot_bootopt_t */
734 u8 enable; /* enable/disable SAN boot */
735 u8 speed; /* boot speed settings */
736 u8 topology; /* boot topology setting */
737 u8 rsvd1;
743 u8 version;
744 u8 rsvd1;
746 u8 enable; /* enable/disable Eth/PXE boot */
747 u8 rsvd2;
773 u8 port_id;
774 u8 optrom;
775 u8 valid;
776 u8 sriov;
777 u8 max_vfs;
778 u8 rsvd[1];
786 u8 mode;
787 u8 type;
788 u8 max_pfs;
789 u8 rsvd[5];
793 u8 nports;
794 u8 max_pfs;
795 u8 rsvd[6];
848 u8 id; /* 00: Identifier */
849 u8 extid; /* 01: Extended Identifier */
850 u8 connector; /* 02: Connector */
851 u8 xcvr[8]; /* 03-10: Transceiver */
852 u8 encoding; /* 11: Encoding */
853 u8 br_norm; /* 12: BR, Nominal */
854 u8 rate_id; /* 13: Rate Identifier */
855 u8 len_km; /* 14: Length single mode km */
856 u8 len_100m; /* 15: Length single mode 100m */
857 u8 len_om2; /* 16: Length om2 fiber 10m */
858 u8 len_om1; /* 17: Length om1 fiber 10m */
859 u8 len_cu; /* 18: Length copper 1m */
860 u8 len_om3; /* 19: Length om3 fiber 10m */
861 u8 vendor_name[16];/* 20-35 */
862 u8 unalloc1;
863 u8 vendor_oui[3]; /* 37-39 */
864 u8 vendor_pn[16]; /* 40-55 */
865 u8 vendor_rev[4]; /* 56-59 */
866 u8 wavelen[2]; /* 60-61 */
867 u8 unalloc2;
868 u8 cc_base; /* 63: check code for base id field */
876 u8 options[2];
877 u8 br_max;
878 u8 br_min;
879 u8 vendor_sn[16];
880 u8 date_code[8];
881 u8 diag_mon_type; /* 92: Diagnostic Monitoring type */
882 u8 en_options;
883 u8 sff_8472;
884 u8 cc_ext;
895 u8 temp_high_alarm[2]; /* 00-01 */
896 u8 temp_low_alarm[2]; /* 02-03 */
897 u8 temp_high_warning[2]; /* 04-05 */
898 u8 temp_low_warning[2]; /* 06-07 */
900 u8 volt_high_alarm[2]; /* 08-09 */
901 u8 volt_low_alarm[2]; /* 10-11 */
902 u8 volt_high_warning[2]; /* 12-13 */
903 u8 volt_low_warning[2]; /* 14-15 */
905 u8 bias_high_alarm[2]; /* 16-17 */
906 u8 bias_low_alarm[2]; /* 18-19 */
907 u8 bias_high_warning[2]; /* 20-21 */
908 u8 bias_low_warning[2]; /* 22-23 */
910 u8 tx_pwr_high_alarm[2]; /* 24-25 */
911 u8 tx_pwr_low_alarm[2]; /* 26-27 */
912 u8 tx_pwr_high_warning[2]; /* 28-29 */
913 u8 tx_pwr_low_warning[2]; /* 30-31 */
915 u8 rx_pwr_high_alarm[2]; /* 32-33 */
916 u8 rx_pwr_low_alarm[2]; /* 34-35 */
917 u8 rx_pwr_high_warning[2]; /* 36-37 */
918 u8 rx_pwr_low_warning[2]; /* 38-39 */
920 u8 unallocate_1[16];
925 u8 rx_pwr[20];
926 u8 tx_i[4];
927 u8 tx_pwr[4];
928 u8 temp[4];
929 u8 volt[4];
930 u8 unallocate_2[3];
931 u8 cc_dmi;
939 u8 diag[SFP_DIAGMON_SIZE];
940 u8 unalloc1[4];
941 u8 status_ctl;
942 u8 rsvd;
943 u8 alarm_flags[2];
944 u8 unalloc2[2];
945 u8 warning_flags[2];
946 u8 ext_status_ctl[2];
955 u8 rsvd1[2]; /* 128-129 */
956 u8 ewrap; /* 130 */
957 u8 rsvd2[2]; /* */
958 u8 owrap; /* 133 */
959 u8 rsvd3[2]; /* */
960 u8 prbs; /* 136: PRBS 7 generator */
961 u8 rsvd4[2]; /* */
962 u8 tx_eqz_16; /* 139: TX Equalizer (16xFC) */
963 u8 tx_eqz_8; /* 140: TX Equalizer (8xFC) */
964 u8 rsvd5[2]; /* */
965 u8 rx_emp_16; /* 143: RX Emphasis (16xFC) */
966 u8 rx_emp_8; /* 144: RX Emphasis (8xFC) */
967 u8 rsvd6[2]; /* */
968 u8 tx_eye_adj; /* 147: TX eye Threshold Adjust */
969 u8 rsvd7[3]; /* */
970 u8 tx_eye_qctl; /* 151: TX eye Quality Control */
971 u8 tx_eye_qres; /* 152: TX eye Quality Result */
972 u8 rsvd8[2]; /* */
973 u8 poh[3]; /* 155-157: Power On Hours */
974 u8 rsvd9[2]; /* */
989 u8 b;
992 u8 e10g_unall:1; /* 10G Ethernet compliance */
993 u8 e10g_lrm:1;
994 u8 e10g_lr:1;
995 u8 e10g_sr:1;
996 u8 ib_sx:1; /* Infiniband compliance */
997 u8 ib_lx:1;
998 u8 ib_cu_a:1;
999 u8 ib_cu_p:1;
1001 u8 ib_cu_p:1;
1002 u8 ib_cu_a:1;
1003 u8 ib_lx:1;
1004 u8 ib_sx:1; /* Infiniband compliance */
1005 u8 e10g_sr:1;
1006 u8 e10g_lr:1;
1007 u8 e10g_lrm:1;
1008 u8 e10g_unall:1; /* 10G Ethernet compliance */
1014 u8 b;
1016 u8 escon:2; /* ESCON compliance code */
1017 u8 oc192_reach:1; /* SONET compliance code */
1018 u8 so_reach:2;
1019 u8 oc48_reach:3;
1024 u8 b;
1026 u8 reserved:1;
1027 u8 oc12_reach:3; /* OC12 reach */
1028 u8 reserved1:1;
1029 u8 oc3_reach:3; /* OC3 reach */
1034 u8 b;
1036 u8 base_px:1;
1037 u8 base_bx10:1;
1038 u8 e100base_fx:1;
1039 u8 e100base_lx:1;
1040 u8 e1000base_t:1;
1041 u8 e1000base_cx:1;
1042 u8 e1000base_lx:1;
1043 u8 e1000base_sx:1;
1048 u8 link_len:5; /* FC link length */
1049 u8 xmtr_tech2:3;
1050 u8 xmtr_tech1:7; /* FC transmitter technology */
1051 u8 reserved1:1;
1055 u8 b;
1057 u8 tw_media:1; /* twin axial pair (tw) */
1058 u8 tp_media:1; /* shielded twisted pair (sp) */
1059 u8 mi_media:1; /* miniature coax (mi) */
1060 u8 tv_media:1; /* video coax (tv) */
1061 u8 m6_media:1; /* multimode, 62.5m (m6) */
1062 u8 m5_media:1; /* multimode, 50m (m5) */
1063 u8 reserved:1;
1064 u8 sm_media:1; /* single mode (sm) */
1069 u8 b;
1072 u8 rsv4:1;
1073 u8 mb800:1; /* 800 Mbytes/sec */
1074 u8 mb1600:1; /* 1600 Mbytes/sec */
1075 u8 mb400:1; /* 400 Mbytes/sec */
1076 u8 rsv2:1;
1077 u8 mb200:1; /* 200 Mbytes/sec */
1078 u8 rsv1:1;
1079 u8 mb100:1; /* 100 Mbytes/sec */
1081 u8 mb100:1; /* 100 Mbytes/sec */
1082 u8 rsv1:1;
1083 u8 mb200:1; /* 200 Mbytes/sec */
1084 u8 rsv2:1;
1085 u8 mb400:1; /* 400 Mbytes/sec */
1086 u8 mb1600:1; /* 1600 Mbytes/sec */
1087 u8 mb800:1; /* 800 Mbytes/sec */
1088 u8 rsv4:1;
1159 u8 algo;
1160 u8 rsvd[7];
1171 u8 algo;
1172 u8 rsv[3];
1181 u8 status; /* loopback test result */
1182 u8 rsvd[3];
1210 u8 status; /* bfa_diag_dport_test_status */
1211 u8 rsvd[7]; /* 64bit align */
1220 u8 status; /* bfa_diag_dport_test_status */
1221 u8 mode; /* bfa_diag_dport_test_opmode */
1222 u8 rsvd; /* 64bit align */
1223 u8 speed; /* link speed for buf_reqd */
1237 u8 led; /* bitmap of LEDs to be tested */
1238 u8 rsvd[5];
1244 u8 lb_mode; /* bfa_port_opmode_t */
1245 u8 speed; /* bfa_port_speed_t */
1246 u8 rsvd[2];
/linux-4.1.27/arch/mn10300/unit-asb2303/include/unit/
H A Dserial.h39 .iomem_base = (u8 *) SERIAL_PORT0_BASE_ADDRESS, \
47 .iomem_base = (u8 *) SERIAL_PORT1_BASE_ADDRESS, \
65 #define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_RX * 4, u8)
66 #define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_TX * 4, u8)
67 #define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLL * 4, u8)
68 #define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_DLM * 4, u8)
69 #define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IER * 4, u8)
70 #define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_IIR * 4, u8)
71 #define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_FCR * 4, u8)
72 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LCR * 4, u8)
73 #define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MCR * 4, u8)
74 #define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_LSR * 4, u8)
75 #define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_MSR * 4, u8)
76 #define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT0_BASE_ADDRESS + UART_SCR * 4, u8)
80 #define GDBPORT_SERIAL_RX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_RX * 4, u8)
81 #define GDBPORT_SERIAL_TX __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_TX * 4, u8)
82 #define GDBPORT_SERIAL_DLL __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLL * 4, u8)
83 #define GDBPORT_SERIAL_DLM __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_DLM * 4, u8)
84 #define GDBPORT_SERIAL_IER __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IER * 4, u8)
85 #define GDBPORT_SERIAL_IIR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_IIR * 4, u8)
86 #define GDBPORT_SERIAL_FCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_FCR * 4, u8)
87 #define GDBPORT_SERIAL_LCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LCR * 4, u8)
88 #define GDBPORT_SERIAL_MCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MCR * 4, u8)
89 #define GDBPORT_SERIAL_LSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_LSR * 4, u8)
90 #define GDBPORT_SERIAL_MSR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_MSR * 4, u8)
91 #define GDBPORT_SERIAL_SCR __SYSREG(SERIAL_PORT1_BASE_ADDRESS + UART_SCR * 4, u8)
/linux-4.1.27/drivers/infiniband/core/
H A Dcm_msgs.h76 u8 offset50;
78 u8 offset51;
86 u8 primary_traffic_class;
87 u8 primary_hop_limit;
89 u8 primary_offset94;
91 u8 primary_offset95;
99 u8 alt_traffic_class;
100 u8 alt_hop_limit;
102 u8 alt_offset138;
104 u8 alt_offset139;
122 static inline u8 cm_req_get_resp_res(struct cm_req_msg *req_msg) cm_req_get_resp_res()
124 return (u8) be32_to_cpu(req_msg->offset32); cm_req_get_resp_res()
127 static inline void cm_req_set_resp_res(struct cm_req_msg *req_msg, u8 resp_res) cm_req_set_resp_res()
134 static inline u8 cm_req_get_init_depth(struct cm_req_msg *req_msg) cm_req_get_init_depth()
136 return (u8) be32_to_cpu(req_msg->offset36); cm_req_get_init_depth()
140 u8 init_depth) cm_req_set_init_depth()
147 static inline u8 cm_req_get_remote_resp_timeout(struct cm_req_msg *req_msg) cm_req_get_remote_resp_timeout()
149 return (u8) ((be32_to_cpu(req_msg->offset40) & 0xF8) >> 3); cm_req_get_remote_resp_timeout()
153 u8 resp_timeout) cm_req_set_remote_resp_timeout()
162 u8 transport_type = (u8) (be32_to_cpu(req_msg->offset40) & 0x06) >> 1; cm_req_get_qp_type()
197 static inline u8 cm_req_get_flow_ctrl(struct cm_req_msg *req_msg) cm_req_get_flow_ctrl()
203 u8 flow_ctrl) cm_req_set_flow_ctrl()
222 static inline u8 cm_req_get_local_resp_timeout(struct cm_req_msg *req_msg) cm_req_get_local_resp_timeout()
224 return (u8) ((be32_to_cpu(req_msg->offset44) & 0xF8) >> 3); cm_req_get_local_resp_timeout()
228 u8 resp_timeout) cm_req_set_local_resp_timeout()
234 static inline u8 cm_req_get_retry_count(struct cm_req_msg *req_msg) cm_req_get_retry_count()
236 return (u8) (be32_to_cpu(req_msg->offset44) & 0x7); cm_req_get_retry_count()
240 u8 retry_count) cm_req_set_retry_count()
246 static inline u8 cm_req_get_path_mtu(struct cm_req_msg *req_msg) cm_req_get_path_mtu()
251 static inline void cm_req_set_path_mtu(struct cm_req_msg *req_msg, u8 path_mtu) cm_req_set_path_mtu()
253 req_msg->offset50 = (u8) ((req_msg->offset50 & 0xF) | (path_mtu << 4)); cm_req_set_path_mtu()
256 static inline u8 cm_req_get_rnr_retry_count(struct cm_req_msg *req_msg) cm_req_get_rnr_retry_count()
262 u8 rnr_retry_count) cm_req_set_rnr_retry_count()
264 req_msg->offset50 = (u8) ((req_msg->offset50 & 0xF8) | cm_req_set_rnr_retry_count()
268 static inline u8 cm_req_get_max_cm_retries(struct cm_req_msg *req_msg) cm_req_get_max_cm_retries()
274 u8 retries) cm_req_set_max_cm_retries()
276 req_msg->offset51 = (u8) ((req_msg->offset51 & 0xF) | (retries << 4)); cm_req_set_max_cm_retries()
279 static inline u8 cm_req_get_srq(struct cm_req_msg *req_msg) cm_req_get_srq()
284 static inline void cm_req_set_srq(struct cm_req_msg *req_msg, u8 srq) cm_req_set_srq()
286 req_msg->offset51 = (u8) ((req_msg->offset51 & 0xF7) | cm_req_set_srq()
304 static inline u8 cm_req_get_primary_packet_rate(struct cm_req_msg *req_msg) cm_req_get_primary_packet_rate()
306 return (u8) (be32_to_cpu(req_msg->primary_offset88) & 0x3F); cm_req_get_primary_packet_rate()
310 u8 rate) cm_req_set_primary_packet_rate()
317 static inline u8 cm_req_get_primary_sl(struct cm_req_msg *req_msg) cm_req_get_primary_sl()
319 return (u8) (req_msg->primary_offset94 >> 4); cm_req_get_primary_sl()
322 static inline void cm_req_set_primary_sl(struct cm_req_msg *req_msg, u8 sl) cm_req_set_primary_sl()
324 req_msg->primary_offset94 = (u8) ((req_msg->primary_offset94 & 0x0F) | cm_req_set_primary_sl()
328 static inline u8 cm_req_get_primary_subnet_local(struct cm_req_msg *req_msg) cm_req_get_primary_subnet_local()
330 return (u8) ((req_msg->primary_offset94 & 0x08) >> 3); cm_req_get_primary_subnet_local()
334 u8 subnet_local) cm_req_set_primary_subnet_local()
336 req_msg->primary_offset94 = (u8) ((req_msg->primary_offset94 & 0xF7) | cm_req_set_primary_subnet_local()
340 static inline u8 cm_req_get_primary_local_ack_timeout(struct cm_req_msg *req_msg) cm_req_get_primary_local_ack_timeout()
342 return (u8) (req_msg->primary_offset95 >> 3); cm_req_get_primary_local_ack_timeout()
346 u8 local_ack_timeout) cm_req_set_primary_local_ack_timeout()
348 req_msg->primary_offset95 = (u8) ((req_msg->primary_offset95 & 0x07) | cm_req_set_primary_local_ack_timeout()
366 static inline u8 cm_req_get_alt_packet_rate(struct cm_req_msg *req_msg) cm_req_get_alt_packet_rate()
368 return (u8) (be32_to_cpu(req_msg->alt_offset132) & 0x3F); cm_req_get_alt_packet_rate()
372 u8 rate) cm_req_set_alt_packet_rate()
379 static inline u8 cm_req_get_alt_sl(struct cm_req_msg *req_msg) cm_req_get_alt_sl()
381 return (u8) (req_msg->alt_offset138 >> 4); cm_req_get_alt_sl()
384 static inline void cm_req_set_alt_sl(struct cm_req_msg *req_msg, u8 sl) cm_req_set_alt_sl()
386 req_msg->alt_offset138 = (u8) ((req_msg->alt_offset138 & 0x0F) | cm_req_set_alt_sl()
390 static inline u8 cm_req_get_alt_subnet_local(struct cm_req_msg *req_msg) cm_req_get_alt_subnet_local()
392 return (u8) ((req_msg->alt_offset138 & 0x08) >> 3); cm_req_get_alt_subnet_local()
396 u8 subnet_local) cm_req_set_alt_subnet_local()
398 req_msg->alt_offset138 = (u8) ((req_msg->alt_offset138 & 0xF7) | cm_req_set_alt_subnet_local()
402 static inline u8 cm_req_get_alt_local_ack_timeout(struct cm_req_msg *req_msg) cm_req_get_alt_local_ack_timeout()
404 return (u8) (req_msg->alt_offset139 >> 3); cm_req_get_alt_local_ack_timeout()
408 u8 local_ack_timeout) cm_req_set_alt_local_ack_timeout()
410 req_msg->alt_offset139 = (u8) ((req_msg->alt_offset139 & 0x07) | cm_req_set_alt_local_ack_timeout()
427 u8 offset8;
429 u8 offset9;
431 u8 private_data[IB_CM_MRA_PRIVATE_DATA_SIZE];
435 static inline u8 cm_mra_get_msg_mraed(struct cm_mra_msg *mra_msg) cm_mra_get_msg_mraed()
437 return (u8) (mra_msg->offset8 >> 6); cm_mra_get_msg_mraed()
440 static inline void cm_mra_set_msg_mraed(struct cm_mra_msg *mra_msg, u8 msg) cm_mra_set_msg_mraed()
442 mra_msg->offset8 = (u8) ((mra_msg->offset8 & 0x3F) | (msg << 6)); cm_mra_set_msg_mraed()
445 static inline u8 cm_mra_get_service_timeout(struct cm_mra_msg *mra_msg) cm_mra_get_service_timeout()
447 return (u8) (mra_msg->offset9 >> 3); cm_mra_get_service_timeout()
451 u8 service_timeout) cm_mra_set_service_timeout()
453 mra_msg->offset9 = (u8) ((mra_msg->offset9 & 0x07) | cm_mra_set_service_timeout()
463 u8 offset8;
465 u8 offset9;
467 u8 ari[IB_CM_REJ_ARI_LENGTH];
469 u8 private_data[IB_CM_REJ_PRIVATE_DATA_SIZE];
473 static inline u8 cm_rej_get_msg_rejected(struct cm_rej_msg *rej_msg) cm_rej_get_msg_rejected()
475 return (u8) (rej_msg->offset8 >> 6); cm_rej_get_msg_rejected()
478 static inline void cm_rej_set_msg_rejected(struct cm_rej_msg *rej_msg, u8 msg) cm_rej_set_msg_rejected()
480 rej_msg->offset8 = (u8) ((rej_msg->offset8 & 0x3F) | (msg << 6)); cm_rej_set_msg_rejected()
483 static inline u8 cm_rej_get_reject_info_len(struct cm_rej_msg *rej_msg) cm_rej_get_reject_info_len()
485 return (u8) (rej_msg->offset9 >> 1); cm_rej_get_reject_info_len()
489 u8 len) cm_rej_set_reject_info_len()
491 rej_msg->offset9 = (u8) ((rej_msg->offset9 & 0x1) | (len << 1)); cm_rej_set_reject_info_len()
506 u8 resp_resources;
507 u8 initiator_depth;
509 u8 offset26;
511 u8 offset27;
514 u8 private_data[IB_CM_REP_PRIVATE_DATA_SIZE];
558 static inline u8 cm_rep_get_target_ack_delay(struct cm_rep_msg *rep_msg) cm_rep_get_target_ack_delay()
560 return (u8) (rep_msg->offset26 >> 3); cm_rep_get_target_ack_delay()
564 u8 target_ack_delay) cm_rep_set_target_ack_delay()
566 rep_msg->offset26 = (u8) ((rep_msg->offset26 & 0x07) | cm_rep_set_target_ack_delay()
570 static inline u8 cm_rep_get_failover(struct cm_rep_msg *rep_msg) cm_rep_get_failover()
572 return (u8) ((rep_msg->offset26 & 0x06) >> 1); cm_rep_get_failover()
575 static inline void cm_rep_set_failover(struct cm_rep_msg *rep_msg, u8 failover) cm_rep_set_failover()
577 rep_msg->offset26 = (u8) ((rep_msg->offset26 & 0xF9) | cm_rep_set_failover()
581 static inline u8 cm_rep_get_flow_ctrl(struct cm_rep_msg *rep_msg) cm_rep_get_flow_ctrl()
583 return (u8) (rep_msg->offset26 & 0x01); cm_rep_get_flow_ctrl()
587 u8 flow_ctrl) cm_rep_set_flow_ctrl()
589 rep_msg->offset26 = (u8) ((rep_msg->offset26 & 0xFE) | cm_rep_set_flow_ctrl()
593 static inline u8 cm_rep_get_rnr_retry_count(struct cm_rep_msg *rep_msg) cm_rep_get_rnr_retry_count()
595 return (u8) (rep_msg->offset27 >> 5); cm_rep_get_rnr_retry_count()
599 u8 rnr_retry_count) cm_rep_set_rnr_retry_count()
601 rep_msg->offset27 = (u8) ((rep_msg->offset27 & 0x1F) | cm_rep_set_rnr_retry_count()
605 static inline u8 cm_rep_get_srq(struct cm_rep_msg *rep_msg) cm_rep_get_srq()
607 return (u8) ((rep_msg->offset27 >> 4) & 0x1); cm_rep_get_srq()
610 static inline void cm_rep_set_srq(struct cm_rep_msg *rep_msg, u8 srq) cm_rep_set_srq()
612 rep_msg->offset27 = (u8) ((rep_msg->offset27 & 0xEF) | cm_rep_set_srq()
622 u8 private_data[IB_CM_RTU_PRIVATE_DATA_SIZE];
634 u8 private_data[IB_CM_DREQ_PRIVATE_DATA_SIZE];
655 u8 private_data[IB_CM_DREP_PRIVATE_DATA_SIZE];
676 u8 alt_hop_limit;
678 u8 offset61;
680 u8 offset62;
682 u8 offset63;
684 u8 private_data[IB_CM_LAP_PRIVATE_DATA_SIZE];
699 static inline u8 cm_lap_get_remote_resp_timeout(struct cm_lap_msg *lap_msg) cm_lap_get_remote_resp_timeout()
701 return (u8) ((be32_to_cpu(lap_msg->offset12) & 0xF8) >> 3); cm_lap_get_remote_resp_timeout()
705 u8 resp_timeout) cm_lap_set_remote_resp_timeout()
725 static inline u8 cm_lap_get_traffic_class(struct cm_lap_msg *lap_msg) cm_lap_get_traffic_class()
727 return (u8) be32_to_cpu(lap_msg->offset56); cm_lap_get_traffic_class()
731 u8 traffic_class) cm_lap_set_traffic_class()
738 static inline u8 cm_lap_get_packet_rate(struct cm_lap_msg *lap_msg) cm_lap_get_packet_rate()
744 u8 packet_rate) cm_lap_set_packet_rate()
749 static inline u8 cm_lap_get_sl(struct cm_lap_msg *lap_msg) cm_lap_get_sl()
754 static inline void cm_lap_set_sl(struct cm_lap_msg *lap_msg, u8 sl) cm_lap_set_sl()
759 static inline u8 cm_lap_get_subnet_local(struct cm_lap_msg *lap_msg) cm_lap_get_subnet_local()
765 u8 subnet_local) cm_lap_set_subnet_local()
770 static inline u8 cm_lap_get_local_ack_timeout(struct cm_lap_msg *lap_msg) cm_lap_get_local_ack_timeout()
776 u8 local_ack_timeout) cm_lap_set_local_ack_timeout()
788 u8 info_length;
789 u8 ap_status;
791 u8 info[IB_CM_APR_INFO_LENGTH];
793 u8 private_data[IB_CM_APR_PRIVATE_DATA_SIZE];
811 u8 status;
812 u8 info_length;
818 u8 info[IB_CM_SIDR_REP_INFO_LENGTH];
820 u8 private_data[IB_CM_SIDR_REP_PRIVATE_DATA_SIZE];
/linux-4.1.27/drivers/scsi/bnx2i/
H A D57xx_iscsi_hsi.h22 u8 op_code;
23 u8 reserved1;
27 u8 reserved1;
28 u8 op_code;
36 u8 err_code;
37 u8 reserved4;
39 u8 reserved4;
40 u8 err_code;
46 u8 async_event;
47 u8 async_vcode;
51 u8 async_vcode;
52 u8 async_event;
110 u8 op_code;
111 u8 reserved1;
115 u8 reserved1;
116 u8 op_code;
136 u8 cq_index;
137 u8 reserved6;
141 u8 reserved6;
142 u8 cq_index;
152 u8 op_code;
153 u8 status;
157 u8 status;
158 u8 op_code;
164 u8 err_code;
165 u8 reserved3;
167 u8 reserved3;
168 u8 err_code;
196 u8 op_code;
197 u8 op_attr;
211 u8 op_attr;
222 u8 op_code;
255 u8 cq_index;
256 u8 sd_start_bd_index;
257 u8 ud_start_bd_index;
258 u8 num_bds;
260 u8 num_bds;
261 u8 ud_start_bd_index;
262 u8 sd_start_bd_index;
263 u8 cq_index;
307 u8 op_code;
308 u8 response_flags;
321 u8 response;
322 u8 status;
324 u8 status;
325 u8 response;
326 u8 response_flags;
339 u8 op_code;
348 u8 err_code;
349 u8 reserved3;
351 u8 reserved3;
352 u8 err_code;
383 u8 op_code;
384 u8 op_attr;
388 u8 op_attr;
389 u8 op_code;
418 u8 reserved3;
419 u8 flags;
429 u8 flags;
438 u8 reserved3;
444 u8 cq_index;
445 u8 reserved6;
446 u8 reserved5;
447 u8 num_bds;
449 u8 num_bds;
450 u8 reserved5;
451 u8 reserved6;
452 u8 cq_index;
499 u8 flags;
506 u8 op_code;
510 u8 op_code;
511 u8 flags;
528 u8 flags;
535 u8 op_code;
537 u8 op_code;
538 u8 flags;
554 u8 reserved0;
555 u8 num_cqs;
557 u8 num_cqs;
558 u8 reserved0;
578 u8 cq_log_wqes_per_page;
579 u8 flags;
593 u8 flags;
604 u8 cq_log_wqes_per_page;
710 u8 session_error_recovery_level;
711 u8 max_outstanding_r2ts;
712 u8 reserved2;
713 u8 conn_flags;
727 u8 conn_flags;
740 u8 reserved2;
741 u8 max_outstanding_r2ts;
742 u8 session_error_recovery_level;
784 u8 op_code;
785 u8 op_attr;
796 u8 version_max;
797 u8 version_min;
799 u8 version_min;
800 u8 version_max;
801 u8 op_attr;
812 u8 op_code;
857 u8 reserved7;
858 u8 flags;
866 u8 flags;
873 u8 reserved7;
879 u8 cq_index;
880 u8 reserved10;
881 u8 reserved9;
882 u8 num_bds;
884 u8 num_bds;
885 u8 reserved9;
886 u8 reserved10;
887 u8 cq_index;
897 u8 op_code;
898 u8 response_flags;
909 u8 version_max;
910 u8 version_active;
912 u8 version_active;
913 u8 version_max;
914 u8 response_flags;
925 u8 op_code;
933 u8 err_code;
934 u8 reserved2;
936 u8 reserved2;
937 u8 err_code;
950 u8 status_class;
951 u8 status_detail;
955 u8 status_detail;
956 u8 status_class;
983 u8 op_code;
984 u8 op_attr;
992 u8 op_attr;
997 u8 op_code;
1029 u8 cq_index;
1030 u8 reserved6;
1031 u8 reserved5;
1032 u8 num_bds;
1034 u8 num_bds;
1035 u8 reserved5;
1036 u8 reserved6;
1037 u8 cq_index;
1047 u8 op_code;
1048 u8 reserved1;
1049 u8 response;
1050 u8 reserved0;
1052 u8 reserved0;
1053 u8 response;
1054 u8 reserved1;
1055 u8 op_code;
1063 u8 err_code;
1064 u8 reserved4;
1066 u8 reserved4;
1067 u8 err_code;
1103 u8 op_code;
1104 u8 reserved1;
1108 u8 reserved1;
1109 u8 op_code;
1118 u8 err_code;
1119 u8 reserved3;
1121 u8 reserved3;
1122 u8 err_code;
1152 u8 op_code;
1153 u8 op_attr;
1161 u8 op_attr;
1166 u8 op_code;
1197 u8 reserved6;
1198 u8 flags;
1206 u8 flags;
1213 u8 reserved6;
1219 u8 cq_index;
1220 u8 reserved9;
1221 u8 reserved8;
1222 u8 num_bds;
1224 u8 num_bds;
1225 u8 reserved8;
1226 u8 reserved9;
1227 u8 cq_index;
1236 u8 op_code;
1237 u8 reserved1;
1238 u8 reason;
1239 u8 reserved0;
1241 u8 reserved0;
1242 u8 reason;
1243 u8 reserved1;
1244 u8 op_code;
1252 u8 err_code;
1253 u8 reserved3;
1255 u8 reserved3;
1256 u8 err_code;
1268 u8 op_code;
1269 u8 op_attr;
1277 u8 op_attr;
1282 u8 op_code;
1310 u8 cq_index;
1311 u8 reserved5;
1312 u8 reserved4;
1313 u8 num_bds;
1315 u8 num_bds;
1316 u8 reserved4;
1317 u8 reserved5;
1318 u8 cq_index;
1327 u8 op_code;
1328 u8 op_attr;
1338 u8 op_attr;
1345 u8 op_code;
1378 u8 cq_index;
1379 u8 reserved7;
1380 u8 reserved6;
1381 u8 num_bds;
1383 u8 num_bds;
1384 u8 reserved6;
1385 u8 reserved7;
1386 u8 cq_index;
1409 u8 op_code;
1410 u8 reserved1;
1411 u8 response;
1412 u8 reserved0;
1414 u8 reserved0;
1415 u8 response;
1416 u8 reserved1;
1417 u8 op_code;
1425 u8 err_code;
1426 u8 reserved4;
1428 u8 reserved4;
1429 u8 err_code;
1456 u8 op_code;
1457 u8 response_flags;
1467 u8 response_flags;
1474 u8 op_code;
1483 u8 err_code;
1484 u8 reserved3;
1486 u8 reserved3;
1487 u8 err_code;
/linux-4.1.27/drivers/scsi/aic94xx/
H A Daic94xx_sas.h40 u8 conn_type; /* byte 0 */
43 u8 conn_rate;
45 u8 dest_sas_addr[8]; /* bytes 4-11 */
48 u8 sq_suspended;
49 u8 ddb_type; /* DDB_TYPE_TARGET */
58 u8 compat_features; /* byte 20 */
59 u8 pathway_blocked_count;
63 u8 conn_mask;
64 u8 flags; /* concurrent conn:2,2 and open:0(1) */
75 u8 max_concurrent_conn;
76 u8 num_concurrent_conn;
77 u8 num_contexts;
79 u8 _r_d;
83 u8 _r_e[9];
85 u8 itnl_reason; /* I_T nexus loss reason */
96 u8 conn_type; /* byte 0 */
97 u8 conn_rate;
99 u8 dest_sas_addr[8]; /* bytes 4-11 */
102 u8 sq_suspended;
103 u8 ddb_type; /* DDB_TYPE_TARGET */
108 u8 compat_features; /* byte 20 */
109 u8 pathway_blocked_count;
113 u8 conn_mask;
114 u8 flags; /* concurrent conn:2,2 and open:0(1) */
119 u8 _r_b;
120 u8 flags2; /* STP close policy:0 */
132 u8 num_sata_tags;
133 u8 sata_status;
134 u8 sata_ending_status;
135 u8 itnl_reason; /* I_T nexus loss reason */
147 u8 conn_type; /* byte 0 */
148 u8 conn_rate;
150 u8 dest_sas_addr[8];
152 u8 sq_suspended;
153 u8 ddb_type; /* DDB_TYPE_INITIATOR */
156 u8 compat_features;
157 u8 pathway_blocked_count;
160 u8 conn_mask;
161 u8 flags; /* == 5 */
171 u8 max_conn_to[3]; /* from Conn-Disc mode page, in us, LE */
172 u8 itnl_reason; /* I_T nexus loss reason */
204 u8 _r_a[15];
205 u8 ddb_type;
206 u8 _r_b[13];
207 u8 pm_port_flags;
210 u8 _r_c[6];
217 u8 num_sata_tags;
218 u8 sata_status;
219 u8 sata_ending_status;
220 u8 _r_d[9];
239 u8 settable_max_contexts;
240 u8 _r_b[23];
241 u8 conn_not_active;
242 u8 phy_is_up;
243 u8 _r_c[8];
244 u8 port_map_by_links[8];
265 u8 next_sg_offs;
266 u8 flags;
287 u8 opcode;
333 u8 lun[LUN_SIZE]; /* BE */
335 u8 tmf;
336 u8 _r_b;
338 u8 _r_c[14];
344 u8 lun[LUN_SIZE];
345 u8 _r_a;
346 u8 efb_prio_attr; /* enable first burst, task prio & attr */
351 u8 _r_b;
352 u8 add_cdb_len; /* in dwords, since bit 0,1 are reserved */
354 u8 cdb[16];
358 u8 _r_c[3];
359 u8 eol_ds; /* eol:6,6, ds:5,4 */
375 u8 proto_conn_rate; /* proto:6,4, conn_rate:3,0 */
381 u8 data_dir; /* :1,0 */
387 u8 _r_a;
388 u8 retry_count;
389 u8 _r_b[5];
399 u8 proto_conn_rate;
403 u8 atapi_packet[16];
404 u8 _r_a[12];
407 u8 ata_flags; /* CSMI:6,6, DTM:4,4, QT:3,3, data dir:1,0 */
414 u8 _r_b;
415 u8 retry_count;
416 u8 _r_c;
417 u8 flags;
422 u8 _r_d[3];
427 u8 proto_conn_rate;
428 u8 _r_a[40];
432 u8 _r_c[8];
434 u8 _r_d[32];
438 u8 phy_id;
439 u8 sub_func;
448 u8 func_mask;
449 u8 speed_mask;
450 u8 hot_plug_delay;
451 u8 port_type;
452 u8 flags;
457 u8 link_reset_retries;
458 u8 _r_a[47];
460 u8 _r_b[56];
464 u8 proto_conn_rate;
467 u8 _r_b[32];
470 u8 ata_flags; /* 0 */
471 u8 _r_c[55];
475 u8 num_valid;
485 u8 phy_id;
486 u8 sub_func;
491 u8 _r_a[57];
493 u8 _r_b[56];
497 u8 _r_a;
501 u8 src_ds; /* See definition of sg_el */
502 u8 _r_c[45];
506 u8 dest_ds; /* See definition of sg_el */
507 u8 _r_e[39];
511 u8 proto_conn_rate;
517 u8 flags; /* ovrd_itnl_timer:3,3, suspend_data_trans:2,2 */
520 u8 _r_b;
521 u8 retry_count;
522 u8 _r_c[5];
525 u8 _r_d[44];
529 u8 nexus;
542 u8 flags;
549 u8 _r_b[3];
550 u8 conn_mask;
551 u8 _r_c[19];
558 u8 _r_f[44];
562 u8 proto_conn_rate;
568 u8 flags; /* itnl override and suspend data tx */
571 u8 _r_b;
572 u8 retry_count;
573 u8 _r_c[5];
576 u8 _r_d[44];
583 u8 phy_id;
584 u8 wait_transmit; /* :0,0 */
585 u8 xmit_flags;
599 u8 prim[4]; /* K, D0, D1, D2 */
600 u8 _r_b[50];
602 u8 _r_c[56];
610 u8 proto_conn_rate;
614 u8 lun[LUN_SIZE];
618 u8 data_dir; /* 01b */
619 u8 _r_b;
620 u8 retry_count;
621 u8 _r_c[5];
723 u8 opcode;
724 u8 status_block[4];
725 u8 toggle; /* bit 0 */
739 u8 frame_rcvd[ASD_EDB_SIZE];
/linux-4.1.27/drivers/usb/phy/
H A Dphy-mv-usb.h74 u8 a_set_b_hnp_en; /* A-Device set b_hnp_en */
75 u8 b_srp_done;
76 u8 b_hnp_en;
79 u8 a_bus_drop;
80 u8 a_bus_req;
81 u8 a_clr_err;
82 u8 a_bus_resume;
83 u8 a_bus_suspend;
84 u8 a_conn;
85 u8 a_sess_vld;
86 u8 a_srp_det;
87 u8 a_vbus_vld;
88 u8 b_bus_req; /* B-Device Require Bus */
89 u8 b_bus_resume;
90 u8 b_bus_suspend;
91 u8 b_conn;
92 u8 b_se0_srp;
93 u8 b_sess_end;
94 u8 b_sess_vld;
95 u8 id;
96 u8 a_suspend_req;
99 u8 a_aidl_bdis_timeout;
100 u8 b_ase0_brst_timeout;
101 u8 a_bidl_adis_timeout;
102 u8 a_wait_bcon_timeout;

Completed in 3988 milliseconds

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