Searched refs:r25 (Results 1 - 128 of 128) sorted by relevance

/linux-4.1.27/arch/sh/lib64/
H A Dudivsi3.S7 clobbered: r18,r19,r20,r21,r22,r25,tr0
13 shlld r22,r0,r25
14 shlri r25,48,r25
16 sub r20,r25,r21
20 mmulfx.w r25,r19,r19
36 mmacnfx.wl r25,r19,r21
38 sub r4,r20,r25
40 mulu.l r25,r21,r19
47 sub.l r25,r20,r25
49 mulu.l r25,r21,r19
50 addz.l r25,r63,r25
51 sub r25,r22,r25
54 addi r25,1,r25
57 cmpgt r25,r20,r25
58 add.l r18,r25,r0
H A Dmemset.S54 sub r2, r22, r25
59 st.q r25, 8, r3
63 st.q r25, 16, r3
66 st.q r25, 24, r3
73 !!! alloco r25, 32 // QQQ comment out for short-term fix to SHUK #3895.
76 st.q r25, 8, r3
77 st.q r25, 16, r3
78 st.q r25, 24, r3
79 st.q r25, 32, r3
80 addi r25, 32, r25
81 bgeu/l r8, r25, tr1 // loop
H A Dsdivsi3.S8 /* clobbered: r1,r18,r19,r20,r21,r25,tr0 */
17 shlld r5, r1, r25 /* normalize; [-2 ..1, 1..2) in s2.62 */
18 shari r25, 58, r21 /* extract 5(6) bit index (s2.4 with hole -1..1) */
21 shari r25, 32, r25 /* normalize to s2.30 */
23 muls.l r25, r19, r19 /* s2.38 */
31 muls.l r25, r21, r18 /* s2.58 */
36 muls.l r18, r25, r0 /* s2.60 */
37 muls.l r18, r4, r25 /* s32.30 */
41 shari r25, 63, r0
46 add r21, r25, r21
H A Dudivdi3.S70 shlrd r2,r9,r25
71 shlri r25,32,r8
86 sub r25,r5,r25
87 /* Can do second step of 64 : 32 div now, using r1 and the rest in r25. */
89 shlri r25,22,r21
97 sub r25,r5,r25
98 bgtu/u r7,r25,tr0 // no_lo_adj
100 sub r25,r7,r25
102 mextr4 r2,r25,r2
H A Dcopy_user_memcpy.S188 ldx.q r22, r21, r25
193 sthi.q r22, -1, r25
196 stlo.q r22, -8, r25
H A Dmemcpy.S172 ldx.q r22, r21, r25
177 sthi.q r22, -1, r25
180 stlo.q r22, -8, r25
/linux-4.1.27/arch/arc/include/asm/
H A Dcurrent.h9 * - Current macro is now implemented as "global register" r25
19 register struct task_struct *curr_arc asm("r25");
H A Dentry.h23 * r25 contains the kernel current task ptr
108 ld r25, [sp, 12]
153 * Special handling for r25 if used for caching Task Pointer.
155 * the interface same it is copied into regular r25 placeholder in
163 ; Retrieve orig r25 and save it on stack
167 PUSH r25
175 * Special handling for r25 if used for caching Task Pointer.
186 PUSH r25
196 add sp, sp, 4 /* skip usual r25 placeholder */
198 POP r25
207 * callee reg which is saved back to usual r25 storage location
215 POP r25
248 * If CURR_IN_REG, r25 set to "current" task pointer
305 * Treat r25 as scratch reg, save it on stack first
308 st r25, [r9, -4] variable
309 GET_CURR_TASK_ON_CPU r25
318 * that everything else is done (loading r25 etc)
605 mov r25, \tsk variable
620 mov r25, \tsk
628 * -Uses r25 for Current task ptr if that is enabled
634 add \reg, r25, \off variable
H A Dunwind.h42 unsigned long r25; member in struct:arc700_regs
101 PTREGS_INFO(r25), \
H A Dptrace.h63 long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13; member in struct:callee_regs
/linux-4.1.27/arch/parisc/kernel/
H A Dpacache.S443 1: ldd 0(%r25), %r19
444 ldd 8(%r25), %r20
446 ldd 16(%r25), %r21
447 ldd 24(%r25), %r22
451 ldd 32(%r25), %r19
452 ldd 40(%r25), %r20
456 ldd 48(%r25), %r21
457 ldd 56(%r25), %r22
461 ldd 64(%r25), %r19
462 ldd 72(%r25), %r20
466 ldd 80(%r25), %r21
467 ldd 88(%r25), %r22
471 ldd 96(%r25), %r19
472 ldd 104(%r25), %r20
476 ldd 112(%r25), %r21
477 ldd 120(%r25), %r22
478 ldo 128(%r25), %r25
498 ldw 0(%r25), %r19
502 ldw 4(%r25), %r20
503 ldw 8(%r25), %r21
504 ldw 12(%r25), %r22
509 ldw 16(%r25), %r19
510 ldw 20(%r25), %r20
511 ldw 24(%r25), %r21
512 ldw 28(%r25), %r22
517 ldw 32(%r25), %r19
518 ldw 36(%r25), %r20
519 ldw 40(%r25), %r21
520 ldw 44(%r25), %r22
525 ldw 48(%r25), %r19
526 ldw 52(%r25), %r20
527 ldw 56(%r25), %r21
528 ldw 60(%r25), %r22
531 ldo 64(%r25), %r25
536 ldw 0(%r25), %r19
598 sub %r25, %r1, %r23
760 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
764 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
844 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
848 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
866 depdi,z 1, 63-PAGE_SHIFT,1, %r25
868 depwi,z 1, 31-PAGE_SHIFT,1, %r25
870 add %r28, %r25, %r25
871 sub %r25, r31, %r25
889 cmpb,COND(<<) %r28, %r25,1b
895 pdtlb,l 0(%r25)
898 pdtlb 0(%r25)
920 depd %r25, 63,22, %r28 /* Form aliased virtual address 'to' */
924 depw %r25, 31,22, %r28 /* Form aliased virtual address 'to' */
942 depdi,z 1, 63-PAGE_SHIFT,1, %r25
944 depwi,z 1, 31-PAGE_SHIFT,1, %r25
946 add %r28, %r25, %r25
947 sub %r25, %r31, %r25
967 cmpb,COND(<<) %r28, %r25,1b
973 pitlb,l %r0(%sr4,%r25)
976 pitlb (%sr4,%r25)
996 depdi,z 1, 63-PAGE_SHIFT,1, %r25
998 depwi,z 1, 31-PAGE_SHIFT,1, %r25
1000 add %r26, %r25, %r25
1001 sub %r25, %r23, %r25
1019 cmpb,COND(<<) %r26, %r25,1b
1039 depdi,z 1, 63-PAGE_SHIFT,1, %r25
1041 depwi,z 1, 31-PAGE_SHIFT,1, %r25
1043 add %r26, %r25, %r25
1044 sub %r25, %r23, %r25
1061 cmpb,COND(<<) %r26, %r25, 1b
1082 1: cmpb,COND(<<),n %r26, %r25, 1b
1103 1: cmpb,COND(<<),n %r26, %r25,1b
1125 1: cmpb,COND(<<),n %r26, %r25,1b
1145 depdi,z 1, 63-PAGE_SHIFT,1, %r25
1147 depwi,z 1, 31-PAGE_SHIFT,1, %r25
1149 add %r26, %r25, %r25
1150 sub %r25, %r23, %r25
1168 cmpb,COND(<<) %r26, %r25, 1b
1189 1: cmpb,COND(<<),n %r26, %r25, 1b
H A Dentry.S790 LDREG TASK_PT_KPC(%r25), %r2
793 LDREG TASK_PT_KSP(%r25), %r30
794 LDREG TASK_THREAD_INFO(%r25), %r25
796 mtctl %r25,%cr30
900 copy %r0, %r25 /* long in_syscall = 0 */
1093 ldo PT_FR0(%r29), %r25
1094 save_fp %r25
1098 copy %r29, %r25 /* arg1 is pt_regs */
1104 copy %r25, %r16 /* save pt_regs */
1136 ptp = r25 /* page directory/page table pointer */
1345 BL get_register,%r25
1349 BL get_register,%r25
1352 BL set_register,%r25
1381 BL get_register,%r25 /* Find the target register */
1384 BL set_register,%r25
1817 ldi 1, %r25 /* long in_syscall = 1 */
1847 LDREG TASK_PT_GR25(%r1),%r25
1910 mfsp %sr3,%r25
1911 STREG %r25,TASK_PT_SR3(%r1)
1912 STREG %r25,TASK_PT_SR4(%r1)
1913 STREG %r25,TASK_PT_SR5(%r1)
1914 STREG %r25,TASK_PT_SR6(%r1)
1915 STREG %r25,TASK_PT_SR7(%r1)
1916 STREG %r25,TASK_PT_IASQ0(%r1)
1917 STREG %r25,TASK_PT_IASQ1(%r1)
1929 ldo TASK_REGS(%r1),%r25
1930 reg_save %r25 /* Save r3 to r18 */
1949 copy %r25,%r16
1959 copy %r25,%r16
2055 bv %r0(%r25) /* r0 */
2057 bv %r0(%r25) /* r1 - shadowed */
2059 bv %r0(%r25) /* r2 */
2061 bv %r0(%r25) /* r3 */
2063 bv %r0(%r25) /* r4 */
2065 bv %r0(%r25) /* r5 */
2067 bv %r0(%r25) /* r6 */
2069 bv %r0(%r25) /* r7 */
2071 bv %r0(%r25) /* r8 - shadowed */
2073 bv %r0(%r25) /* r9 - shadowed */
2075 bv %r0(%r25) /* r10 */
2077 bv %r0(%r25) /* r11 */
2079 bv %r0(%r25) /* r12 */
2081 bv %r0(%r25) /* r13 */
2083 bv %r0(%r25) /* r14 */
2085 bv %r0(%r25) /* r15 */
2087 bv %r0(%r25) /* r16 - shadowed */
2089 bv %r0(%r25) /* r17 - shadowed */
2091 bv %r0(%r25) /* r18 */
2093 bv %r0(%r25) /* r19 */
2095 bv %r0(%r25) /* r20 */
2097 bv %r0(%r25) /* r21 */
2099 bv %r0(%r25) /* r22 */
2101 bv %r0(%r25) /* r23 */
2103 bv %r0(%r25) /* r24 - shadowed */
2105 bv %r0(%r25) /* r25 - shadowed */
2107 bv %r0(%r25) /* r26 */
2109 bv %r0(%r25) /* r27 */
2111 bv %r0(%r25) /* r28 */
2113 bv %r0(%r25) /* r29 */
2115 bv %r0(%r25) /* r30 */
2117 bv %r0(%r25) /* r31 */
2129 bv %r0(%r25) /* r0 (silly, but it is a place holder) */
2131 bv %r0(%r25) /* r1 */
2133 bv %r0(%r25) /* r2 */
2135 bv %r0(%r25) /* r3 */
2137 bv %r0(%r25) /* r4 */
2139 bv %r0(%r25) /* r5 */
2141 bv %r0(%r25) /* r6 */
2143 bv %r0(%r25) /* r7 */
2145 bv %r0(%r25) /* r8 */
2147 bv %r0(%r25) /* r9 */
2149 bv %r0(%r25) /* r10 */
2151 bv %r0(%r25) /* r11 */
2153 bv %r0(%r25) /* r12 */
2155 bv %r0(%r25) /* r13 */
2157 bv %r0(%r25) /* r14 */
2159 bv %r0(%r25) /* r15 */
2161 bv %r0(%r25) /* r16 */
2163 bv %r0(%r25) /* r17 */
2165 bv %r0(%r25) /* r18 */
2167 bv %r0(%r25) /* r19 */
2169 bv %r0(%r25) /* r20 */
2171 bv %r0(%r25) /* r21 */
2173 bv %r0(%r25) /* r22 */
2175 bv %r0(%r25) /* r23 */
2177 bv %r0(%r25) /* r24 */
2179 bv %r0(%r25) /* r25 */
2180 copy %r1,%r25
2181 bv %r0(%r25) /* r26 */
2183 bv %r0(%r25) /* r27 */
2185 bv %r0(%r25) /* r28 */
2187 bv %r0(%r25) /* r29 */
2189 bv %r0(%r25) /* r30 */
2191 bv %r0(%r25) /* r31 */
H A Dsys_parisc32.c18 asmlinkage long sys32_unimplemented(int r26, int r25, int r24, int r23, sys32_unimplemented() argument
H A Dsyscall.S129 depdi 0, 31, 32, %r25
179 STREG %r25, TASK_PT_GR25(%r1) /* 2nd argument */
233 * not syscall_exit. Signal no. in r20, in_syscall in r25 (see
243 comib,<> 0,%r25,.Lin_syscall
333 LDREG TASK_PT_GR25(%r1), %r25
352 * not syscall_exit. Signal no. in r20, in_syscall in r25 (see
385 comib,<> 0,%r25,.Ltrace_in_syscall
414 - %r26, %r25, %r24, %r23, %r22
511 %r25 - Old value to check (old)
554 depdi 0, 31, 32, %r25
629 sub,<> %r28, %r25, %r0
671 %r25 - Pointer to the value to check (old)
691 depdi 0, 31, 32, %r25
707 4: ldb 0(%sr3,%r25), %r25
717 6: ldh 0(%sr3,%r25), %r25
727 8: ldw 0(%sr3,%r25), %r25
738 10: ldd 0(%sr3,%r25), %r25
742 10: ldw 0(%sr3,%r25), %r22
743 11: ldw 4(%sr3,%r25), %r23
796 sub,= %r29, %r25, %r0
806 sub,= %r29, %r25, %r0
816 sub,= %r29, %r25, %r0
827 sub,*= %r29, %r25, %r0
H A Dperf_asm.S53 ldi 0x20,%r25 ; load up perfmon bit
55 or %r25,%r26,%r26 ; set bit
60 andcm %r26,%r25,%r26 ; clear bit now
79 ldi 0x20,%r25 ; load up perfmon bit
81 or %r25,%r26,%r26 ; set bit
85 andcm %r26,%r25,%r26 ; clear bit now
H A Dhpmc.S97 * r25 (arg1) procedure arg
H A Dsignal.c62 #define INSN_LDI_R25_0 0x34190000 /* ldi 0,%r25 (in_syscall=0) */
63 #define INSN_LDI_R25_1 0x34190002 /* ldi 1,%r25 (in_syscall=1) */
H A Dhead.S151 ** %r25/%r26 args to pass to target function
/linux-4.1.27/arch/parisc/include/asm/
H A Dunistd.h72 #define K_LOAD_ARGS_2(r26,r25) \
73 register unsigned long __r25 __asm__("r25") = (unsigned long)(r25); \
75 #define K_LOAD_ARGS_3(r26,r25,r24) \
77 K_LOAD_ARGS_2(r26,r25)
78 #define K_LOAD_ARGS_4(r26,r25,r24,r23) \
80 K_LOAD_ARGS_3(r26,r25,r24)
81 #define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \
83 K_LOAD_ARGS_4(r26,r25,r24,r23)
84 #define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \
86 K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
103 #define K_CLOB_ARGS_1 K_CLOB_ARGS_2, "%r25"
H A Dasmregs.h27 arg1: .reg %r25
71 r25: .reg %r25
H A Dprocessor.h226 * Oh, and yes, that is not a typo, we are really passing argc in r25
227 * and argv in r24 (rather than r26 and r25). This is because that's
H A Dassembly.h205 STREG %r25, PT_GR25(\regs) variable
239 LDREG PT_GR25(\regs), %r25
/linux-4.1.27/arch/tile/lib/
H A Datomic_asm_32.S98 \body /* set r24, and r25 if 64-bit */
101 seq r27, r23, r25
115 sw r28, r25
142 moveli r25, 32 /* starting backoff time in cycles */
148 slt r22, r22, r25
152 shli r25, r25, 1 /* double the backoff; retry the tns */
156 slt r26, r23, r25 /* is the proposed backoff too big? */
160 mvnz r25, r26, r23
185 { bbns r26, 3f; move r24, r4 }; { bbns r27, 3f; move r25, r5 }"
186 atomic_op 64_xchg, 64, "{ move r24, r2; move r25, r3 }"
187 atomic_op 64_xchg_add, 64, "{ add r24, r22, r2; add r25, r23, r3 }; \
188 slt_u r26, r24, r22; add r25, r25, r26"
192 { bbns r27, 3f; add r25, r23, r5 }; \
193 slt_u r26, r24, r22; add r25, r25, r26"
H A Dmemcpy_32.S97 { move r24, r1; move r25, r2 }
508 { sub r3, r25, r2 }
/linux-4.1.27/arch/parisc/lib/
H A Dlusercopy.S74 comib,=,n 0,%r25,$lclu_done
77 addib,<> -1,%r25,$lclu_loop
82 copy %r25,%r28
88 ldo 1(%r25),%r25
107 comib,= 0,%r25,$lslen_nzero
113 addib,<> -1,%r25,$lslen_loop
/linux-4.1.27/arch/arc/kernel/
H A Dctx_sw.c44 "st.a r25, [sp, -4] \n\t" __switch_to()
46 "sub sp, sp, 4 \n\t" /* usual r25 placeholder */ __switch_to()
65 * optionally, set r25 to that as well __switch_to()
79 "mov r25, %2 \n\t" __switch_to()
88 "ld.ab r25, [sp, 4] \n\t" __switch_to()
H A Dhead.S94 ; setup "current" tsk and optionally cache it in dedicated r25
H A Dtroubleshoot.c19 * Common routine to print scratch regs (r0-r12) or callee regs (r13-r25)
36 /* because pt_regs has regs reversed: r12..r0, r25..r13 */ print_reg_file()
H A Dprocess.c62 * | r25 | <==== top of Stack (thread.ksp)
H A Dptrace.c103 REG_IN_CHUNK(callee, efa, cregs); /* callee_regs[r25..r13] */ genregs_set()
H A Dentry.S48 * - r25 now contains the Current Task when in kernel
66 * Callee Saved Registers r13- r25
/linux-4.1.27/arch/ia64/kernel/
H A Dhead.S211 mov r25=pr;;
277 SAL_TO_OS_BOOT_HANDOFF_STATE_SAVE(r16,r17,r25)
1125 tpa r25=in0
1147 RESTORE_REGION_REGS(r25, r17,r18,r19);;
1148 RESTORE_REG(b0, r25, r17);;
1149 RESTORE_REG(b1, r25, r17);;
1150 RESTORE_REG(b2, r25, r17);;
1151 RESTORE_REG(b3, r25, r17);;
1152 RESTORE_REG(b4, r25, r17);;
1153 RESTORE_REG(b5, r25, r17);;
1154 ld8 r1=[r25],0x08;;
1155 ld8 r12=[r25],0x08;;
1156 ld8 r13=[r25],0x08;;
1157 RESTORE_REG(ar.fpsr, r25, r17);;
1158 RESTORE_REG(ar.pfs, r25, r17);;
1159 RESTORE_REG(ar.rnat, r25, r17);;
1160 RESTORE_REG(ar.unat, r25, r17);;
1161 RESTORE_REG(ar.bspstore, r25, r17);;
1162 RESTORE_REG(cr.dcr, r25, r17);;
1163 RESTORE_REG(cr.iva, r25, r17);;
1164 RESTORE_REG(cr.pta, r25, r17);;
1166 RESTORE_REG(cr.itv, r25, r17);;
1167 RESTORE_REG(cr.pmv, r25, r17);;
1168 RESTORE_REG(cr.cmcv, r25, r17);;
1169 RESTORE_REG(cr.lrr0, r25, r17);;
1170 RESTORE_REG(cr.lrr1, r25, r17);;
1171 ld8 r4=[r25],0x08;;
1172 ld8 r5=[r25],0x08;;
1173 ld8 r6=[r25],0x08;;
1174 ld8 r7=[r25],0x08;;
1175 ld8 r17=[r25],0x08;;
1177 RESTORE_REG(ar.lc, r25, r17);;
1181 ldf.fill.nta f2=[r25],16;;
1182 ldf.fill.nta f3=[r25],16;;
1183 ldf.fill.nta f4=[r25],16;;
1184 ldf.fill.nta f5=[r25],16;;
1185 ldf.fill.nta f16=[r25],16;;
1186 ldf.fill.nta f17=[r25],16;;
1187 ldf.fill.nta f18=[r25],16;;
1188 ldf.fill.nta f19=[r25],16;;
1189 ldf.fill.nta f20=[r25],16;;
1190 ldf.fill.nta f21=[r25],16;;
1191 ldf.fill.nta f22=[r25],16;;
1192 ldf.fill.nta f23=[r25],16;;
1193 ldf.fill.nta f24=[r25],16;;
1194 ldf.fill.nta f25=[r25],16;;
1195 ldf.fill.nta f26=[r25],16;;
1196 ldf.fill.nta f27=[r25],16;;
1197 ldf.fill.nta f28=[r25],16;;
1198 ldf.fill.nta f29=[r25],16;;
1199 ldf.fill.nta f30=[r25],16;;
1200 ldf.fill.nta f31=[r25],16;;
H A Dminstate.h51 mov r25=ar.unat; /* M */ \
113 st8 [r16]=r25,16; /* save ar.unat */ \
182 .mem.offset 8,0; st8.spill [r3]=r25,16; \
205 adds r25=PT(B7)-PT(F11),r3; \
208 st8 [r25]=r19,16; /* b7 */ \
211 st8 [r25]=r10; /* ar.ssd */ \
H A Divt.S114 MOV_FROM_ITIR(r25)
125 extr.u r26=r25,2,6
130 (p8) dep r25=r18,r25,2,6
191 MOV_TO_ITIR(p8, r25, r24) // change to default page-size for VHPT
201 ITC_D(p7, r24, r25)
223 ld8 r25=[r21] // read *pte again
237 (p7) cmp.ne.or.andcm p6,p7=r25,r18 // did *pte change
390 THASH(p8, r17, r16, r25)
392 MOV_TO_IHA(p8, r17, r25)
398 mov r25=PERCPU_PAGE_SHIFT << 2
411 MOV_TO_ITIR(p10, r25, r24)
550 or r25=_PAGE_D|_PAGE_A,r18 // set the dirty and accessed bits
553 (p6) cmpxchg8.acq r26=[r17],r25,ar.ccv // Only update if page is present
558 ITC_D(p6, r25, r18) // install updated PTE
568 cmp.eq p6,p7=r18,r25 // is it same as the newly installed
616 or r25=_PAGE_A,r18 // set the accessed bit
619 (p6) cmpxchg8.acq r26=[r17],r25,ar.ccv // Only if page present
624 ITC_I(p6, r25, r26) // install updated PTE
634 cmp.eq p6,p7=r18,r25 // is it same as the newly installed
671 or r25=_PAGE_A,r18 // set the dirty bit
674 (p6) cmpxchg8.acq r26=[r17],r25,ar.ccv // Only if page is present
679 ITC_D(p6, r25, r26) // install updated PTE
688 cmp.eq p6,p7=r18,r25 // is it same as the newly installed
795 mov.m r25=ar.unat // M2 (5 cyc)
918 * - r25: saved ar.unat
963 st8 [r17]=r25,PT(AR_RSC)-PT(AR_UNAT) // save ar.unat
H A Dentry.S179 movl r25=init_task
186 cmp.eq p7,p6=r25,in0
208 RSM_PSR_IC(r25) // interrupts (psr.i) are already disabled here
209 movl r25=PAGE_KERNEL
212 or r23=r25,r20 // construct PA | page properties
213 mov r25=IA64_GRANULE_SHIFT<<2
215 MOV_TO_ITIR(p0, r25, r8)
218 mov r25=IA64_TR_CURRENT_STACK
221 itr.d dtr[r25]=r23 // wire in new mapping...
306 mov r25=b4
315 st8 [r14]=r25,SW(B5)-SW(B4) // save b4
387 ld8 r25=[r2],16 // restore b4
432 mov b4=r25
675 * r25: user-level ar.unat
769 ld8 r25=[r3],16 // M0|1 load ar.unat
776 ld8 r25=[r3],16 // M0|1 load ar.unat
913 RSM_PSR_I_IC(r23, r22, r25) // initiate turning off of interrupt and interruption collection
920 ld8.fill r25=[r2],16
967 ld8 r25=[r17],16 // load ar.unat
1125 mov ar.unat=r25 // M2
1133 MOV_TO_IPSR(p0, r29, r25) // M2
1137 MOV_TO_IFS(p9, r30, r25)// M2
1142 MOV_TO_IIP(r28, r25) // M2
H A Drelocate_kernel.S298 st8 [in0]=r25, 8 // r25
H A Dfsys.S171 // r25 = itc_lastcycle value
237 (p13) ld8 r25 = [r19] // get itc_lastcycle value
241 (p13) sub r3 = r25,r2 // Diff needed before comparison (thanks davidm)
246 (p6) sub r10 = r25,r24 // time we got was less than last_cycle
247 (p7) mov ar.ccv = r25 // more than last_cycle. Prep for cmpxchg
251 (p7) cmp.ne p7,p0 = r25,r3 // if cmpxchg not successful
499 mov r25=ar.unat // M2 (5 cyc) save ar.unat
H A Dprocess.c134 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25); show_regs()
H A Dasm-offsets.c114 DEFINE(IA64_PT_REGS_R25_OFFSET, offsetof (struct pt_regs, r25)); foo()
H A Dgate.S352 SSM_PSR_I(p8, p14, r25)
H A Dunaligned.c221 RPT(r24), RPT(r25), RPT(r26), RPT(r27),
H A Dmca.c942 copy_reg(&bank[25-16], ms->pmsa_nat_bits, &regs->r25, nat); finish_pt_regs()
H A Dunwind.c219 offsetof(struct pt_regs, r25),
/linux-4.1.27/arch/hexagon/kernel/
H A Dhead.S49 r25 = pc; define
52 r25 = and(r2,r25); /* R25 holds PHYS_OFFSET now */ define
56 r24 = add(r24,r25); /* + PHYS_OFFSET */
91 r1 = r25;
113 r1 = r25;
155 r2 = r25; /* phys_offset */
218 memw(r0) = r25;
H A Dvm_events.c74 regs->r25, show_regs()
H A Dkgdb.c57 { "r25", GDB_SIZEOF_REG, offsetof(struct pt_regs, r25)},
H A Dprocess.c96 /* r24 <- fn, r25 <- arg */ copy_thread()
98 ss->r25 = arg; copy_thread()
/linux-4.1.27/arch/score/include/asm/
H A Dasmmacro.h51 sw r25, [r0, PT_R25] variable
52 sw r25, [r0, PT_R25] variable
148 lw r25, [r0, PT_R25] variable
/linux-4.1.27/arch/microblaze/lib/
H A Duaccess_old.S114 8: lwi r25, r6, 0x001C + offset; \
122 16: swi r25, r5, 0x001C + offset; \
202 swi r25, r1, 36
203 loop: /* r4, r19, r20, r21, r22, r23, r24, r25 are used for storing values */
225 lwi r25, r1, 36
245 lwi r25, r1, 36
/linux-4.1.27/arch/score/lib/
H A Dchecksum.S61 cmpi.c r25, 0x1
63 andri.c r25,r4 , 0x1 /*Is src 2 bytes aligned?*/
119 /* odd buffer alignment? r25 was set in csum_partial */
120 cmpi.c r25, 0x0
137 ldi r25, 0
143 andri.c r25, src, 0x1 /* odd buffer? */
/linux-4.1.27/arch/tile/kernel/
H A Dintvec_32.S426 push_reg r25, r52
672 seq r25, r26, r27
678 bzt r25, \not_single_stepping
706 seq r25, r26, r27
713 bzt r25, \not_single_stepping
720 addi r25, r26, 16
733 slte_u r25, r27, r25
741 bzt r25, \not_single_stepping
1056 { move r24, zero; move r25, zero }
1102 pop_reg r25
1348 seq r25, r27, r26
1358 bnz r25, 3f
1362 seq r25, r27, r26
1369 addi r25, r29, SINGLESTEP_STATE_FLAGS_OFFSET
1372 bz r25, 2f
1375 lw r25, r25
1383 mm r27, r25, zero, SINGLESTEP_STATE_TARGET_LB, \
1387 andi r25, r25, SINGLESTEP_STATE_MASK_UPDATE
1393 bz r25, 3f
1593 shri r25, r0, 1
1621 mm ATOMIC_LOCK_REG_NAME, r25, r21, 2, (ATOMIC_HASH_SHIFT + 2) - 1
1659 and r25, r21, r1 /* If atomic_update, compute (*mem & mask) */
1663 add r25, r25, r2 /* Compute (*mem & mask) + addend. */
1666 mvnz r24, r23, r25 /* Use atomic_update value if appropriate. */
1739 moveli r25, 32 /* starting backoff time in cycles */
1744 slt r22, r22, r25
1747 shli r25, r25, 1 /* double the backoff; retry the tns */
1750 slt r26, r23, r25 /* is the proposed backoff too big? */
1752 mvnz r25, r26, r23
1788 addi r25, r0, 4
1791 lw r1, r25
1802 sw r25, r5
H A Dregs_32.S111 r24, r25, r26, r27, r28, r29, r30, r31, \
H A Dregs_64.S111 r24, r25, r26, r27, r28, r29, r30, r31, \
H A Dkgdb.c54 { "r25", GDB_SIZEOF_REG, offsetof(struct pt_regs, regs[25])},
H A Dintvec_64.S621 push_reg r25, r52
1088 { move r25, zero; move r26, zero }
1138 pop_reg r25
/linux-4.1.27/arch/ia64/lib/
H A Dip_fast_csum.S106 ld4 r25=[in1],4
115 add r18=r24,r25
H A Dcopy_page.S32 #define tgtf r25
H A Dmemcpy_mck.S45 #define t3 r25
354 (p6) shl r25=r30,3
357 (p6) shr.u r28=r37,r25
358 (p6) sub r26=64,r25
H A Ddo_csum.S103 #define saved_pr r25
H A Dcopy_user.S65 #define dst1 r25
/linux-4.1.27/arch/microblaze/include/uapi/asm/
H A Dptrace.h42 microblaze_reg_t r25; member in struct:pt_regs
H A Delf.h113 _r->r24 = _r->r25 = _r->r26 = _r->r27 = \
/linux-4.1.27/arch/powerpc/boot/
H A Dppc_asm.h54 #define r25 25 macro
/linux-4.1.27/arch/powerpc/crypto/
H A Daes-spe-regs.h36 #define rI1 r25
H A Dsha256-spe-asm.S46 #define rT3 r25
65 stw r25,92(r1);
80 lwz r25,92(r1); \
H A Dmd5-asm.S40 #define rT0 r25
/linux-4.1.27/arch/powerpc/kernel/
H A Dfsl_booke_entry_mapping.S98 or r25,r8,r9
99 ori r8,r25,(MAS3_SX|MAS3_SW|MAS3_SR)
179 rlwinm r7,r25,0,0x03ffffff
210 mr r6, r25
H A Dswsusp_asm64.S107 SAVE_REGISTER(r25)
224 RESTORE_REGISTER(r25)
H A Dhead_64.S129 mr r25,r4
157 mr r4,r25
234 mr r25,r4
246 mr r4,r25
442 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
443 sldi r25,r25,32
447 add r25,r25,r26
448 1: mr r3,r25
779 clrldi r0,r25,2
H A Dhead_44x.S123 * r25 will contain RPN/ERPN for the start address of memory
134 rlwinm r6,r25,0,28,31 /* ERPN. Bits 32-35 of Address */
135 rlwinm r7,r25,0,0,3 /* RPN - assuming 256 MB page size */
179 * r25 will contain RPN/ERPN for the start address of memory
193 rlwinm r6,r25,0,28,31 /* ERPN */
194 rlwinm r7,r25,0,0,3 /* RPN - assuming 256 MB page size */
886 * The XLAT entry is stored in r25
890 tlbre r25,r23,PPC44x_TLB_XLAT
896 mr r4,r25
1062 tlbre r25,r23,1
1104 tlbwe r25,r23,1
1123 /* Word 1 - use r25. RPN is the same as the original entry */
1135 tlbwe r25,r0,1
H A Dhead_fsl_booke.S72 li r25,0 /* phys kernel start (low) */
79 /* Translate _stext address to physical, save in r23/r25 */
82 mr r25,r4
125 rlwinm r6,r25,0,0x3ffffff /* r6 = PHYS_START % 64M */
254 mr r6,r25
256 mr r5,r25
266 stw r25,4(r3)
268 stw r25,0(r3)
1171 mr r5,r25 /* phys kernel start */
H A Dmisc_32.S833 mr r25, r4
919 and r5, r25, r10 /* Get our target PageNum */
956 tlbre r25, r23, 1 /* TLB Word 1 */
1002 tlbwe r25, r3, 1
1074 and r5, r25, r10 /* Physical page */
1093 tlbwe r25, r3, 1
H A Dmisc_64.S559 std r25,-56(r1)
570 lhz r25,PACAHWCPUID(r13) /* get our phys cpu from paca */
631 mr r3,r25 # my phys cpu
H A Dhead_32.S767 lwz r25,klimit@l(r9)
768 addis r25,r25,-KERNELBASE@h
776 4: mr r5,r25
H A Dkgdb.c299 { "r25", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[25]) },
H A Dhead_8xx.S596 add r10, r10, r25 ;b 151f
H A Dentry_64.S566 cmpd r0,r25
/linux-4.1.27/arch/hexagon/include/uapi/asm/
H A Duser.h38 unsigned long r25; member in struct:user_regs_struct
H A Dregisters.h163 unsigned long r25; member in struct:pt_regs::__anon1462::__anon1463
/linux-4.1.27/arch/alpha/include/uapi/asm/
H A Dptrace.h35 unsigned long r25; member in struct:pt_regs
/linux-4.1.27/arch/arc/include/uapi/asm/
H A Dptrace.h44 long r25, r24, r23, r22, r21, r20; member in struct:user_regs_struct::__anon140
/linux-4.1.27/tools/testing/selftests/powerpc/switch_endian/
H A Dswitch_endian_test.S51 addi r25, r15, 25
/linux-4.1.27/arch/powerpc/lib/
H A Dcopyuser_64.S473 std r25,-80(1)
490 26: ld r25,648(4)
510 44: std r25,656(3)
528 62: ld r25,664(4)
569 ld r25,-80(1)
588 ld r25,-80(1)
H A Dcrtsavres.S354 std r25,-56(r1)
411 ld r25,-56(r1)
/linux-4.1.27/tools/testing/selftests/powerpc/copyloops/
H A Dcopyuser_64.S473 std r25,-80(1)
490 26: ld r25,648(4)
510 44: std r25,656(3)
528 62: ld r25,664(4)
569 ld r25,-80(1)
588 ld r25,-80(1)
/linux-4.1.27/arch/microblaze/kernel/
H A Dasm-offsets.c55 DEFINE(PT_R25, offsetof(struct pt_regs, r25)); main()
114 DEFINE(CC_R25, offsetof(struct cpu_context, r25)); main()
H A Dmcount.S41 swi r25, r1, 88; \
72 lwi r25, r1, 88; \
H A Dprocess.c39 pr_info(" r25=%08lX, r26=%08lX, r27=%08lX, r28=%08lX\n", show_regs()
40 regs->r25, regs->r26, regs->r27, regs->r28); show_regs()
H A Dentry-nommu.S93 swi r25, r1, PT_R25
171 lwi r25, r1, PT_R25
247 swi r25, r1, PT_R25
338 swi r25, r1, PT_R25
412 swi r25, r11, CC_R25
450 lwi r25, r11, CC_R25
546 lwi r25, r1, PT_R25
H A Dsignal.c72 COPY(r22); COPY(r23); COPY(r24); COPY(r25); restore_sigcontext()
133 COPY(r22); COPY(r23); COPY(r24); COPY(r25); setup_sigcontext()
H A Dentry.S201 swi r25, r1, PT_R25; \
237 lwi r25, r1, PT_R25; \
897 swi r25, r11, CC_R25
928 lwi r25, r11, CC_R25
/linux-4.1.27/arch/sh/mm/
H A DMakefile66 -ffixed-r24 -ffixed-r25 -ffixed-r26 -ffixed-r27 \
/linux-4.1.27/arch/tile/include/asm/
H A Dbarrier.h43 "r25", "r26", "r27", "r28", "r29"); __mb_incoherent()
/linux-4.1.27/arch/powerpc/mm/
H A Dhash_low_64.S365 * r25 is the index in combo page
367 std r25,STK_REG(R25)(r1)
410 rldicl r25,r3,64-12,60
509 addi r5,r25,36 /* Check actual HPTE_SUB bit, this */
519 add r5,r5,r25
549 add r5,r5,r25
619 subfic r5,r25,27 /* Must match bit position in */
623 sldi r5,r25,2
635 ld r25,STK_REG(R25)(r1)
650 sldi r5,r25,2
/linux-4.1.27/arch/powerpc/kvm/
H A Dbooke_interrupts.S194 stw r25, VCPU_GPR(R25)(r4)
274 lwz r25, VCPU_GPR(R25)(r4)
312 stw r25, VCPU_GPR(R25)(r4)
332 lwz r25, HOST_NV_GPR(R25)(r1)
377 stw r25, HOST_NV_GPR(R25)(r1)
397 lwz r25, VCPU_GPR(R25)(r4)
H A Dbookehv_interrupts.S133 PPC_STL r25, VCPU_GPR(R25)(r4)
465 PPC_LL r25, VCPU_GPR(R25)(r4)
499 PPC_STL r25, VCPU_GPR(R25)(r4)
519 PPC_LL r25, HOST_NV_GPR(R25)(r1)
562 PPC_STL r25, HOST_NV_GPR(R25)(r1)
582 PPC_LL r25, VCPU_GPR(R25)(r4)
H A Dbook3s_interrupts.S53 PPC_LL r25, VCPU_GPR(R25)(vcpu); \
197 PPC_STL r25, VCPU_GPR(R25)(r7)
H A Dbook3s_hv_rmhandlers.S743 ld r25, VCPU_GPR(R25)(r4)
1318 std r25, VCPU_GPR(R25)(r9)
2131 std r25, VCPU_GPR(R25)(r3)
2242 ld r25, VCPU_GPR(R25)(r4)
/linux-4.1.27/drivers/macintosh/
H A Dtherm_windtunnel.c68 int r0, r1, r20, r23, r25; /* saved register */ member in struct:__anon5360
219 x.r25 = read_reg( x.fan, 0x25, 1 ); setup_hardware()
271 write_reg( x.fan, 0x25, x.r25, 1 ); restore_regs()
/linux-4.1.27/arch/unicore32/include/asm/
H A Dthread_info.h56 __u32 r25; member in struct:cpu_context_save
/linux-4.1.27/arch/alpha/include/asm/
H A Da.out-core.h65 dump->regs[EF_T11] = pt->r25; aout_dump_thread()
/linux-4.1.27/arch/sh/kernel/cpu/sh5/
H A Dswitchto.S77 st.q r0, (25*8), r25
159 ld.q r0, (25*8), r25
H A Dentry.S313 st.q SP, TLB_SAVED_R25, r25
362 ld.q SP, TLB_SAVED_R25, r25
375 r25,tr1-4 and save r6 to get into the right state. */
381 ld.q SP, TLB_SAVED_R25, r25
746 st.q SP, FRAME_R(25), r25
1004 ld.q SP, FRAME_R(25), r25
1769 st.q r0, 0x0c8, r25
/linux-4.1.27/arch/hexagon/include/asm/
H A Delf.h144 DEST.r25 = REGS->r25; \
H A Dprocessor.h135 unsigned long r25; member in struct:hexagon_switch_stack::__anon1419::__anon1420
/linux-4.1.27/arch/hexagon/lib/
H A Dmemcpy.S240 memd(sp+#8) = R25:24; /* save r25,r24 on stack */
539 r25:24 = memd(sp+#8); /* restore r24+r25 */
/linux-4.1.27/arch/tile/kernel/vdso/
H A Dvgettimeofday.c169 "r24", "r25", "r26", "r27", "r28", "r29", "memory"); vdso_fallback_gettime()
/linux-4.1.27/arch/microblaze/include/asm/
H A Dthread_info.h48 __u32 r25; member in struct:cpu_context
/linux-4.1.27/arch/arc/
H A DMakefile22 # any kernel headers, and missing the r25 global register
/linux-4.1.27/arch/alpha/kernel/
H A Dsignal.c182 err |= __get_user(regs->r25, sc->sc_regs+25); restore_sigcontext()
317 err |= __put_user(regs->r25, sc->sc_regs+25); setup_sigcontext()
H A Dptrace.c88 PT_REG( r24), PT_REG( r25), PT_REG( r26), PT_REG( r27),
H A Dprocess.c322 dest[25] = pt->r25; dump_elf_thread()
H A Dtraps.c92 regs->r25, regs->r27, regs->r28); dik_show_regs()
676 printk("r25= %016lx r27= %016lx r28= %016lx\n", do_entUna()
767 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26),
/linux-4.1.27/arch/unicore32/kernel/
H A Dprocess.c145 printk(KERN_DEFAULT "r26: %08lx r25: %08lx r24: %08lx\n", __show_regs()
/linux-4.1.27/arch/ia64/include/uapi/asm/
H A Dptrace.h130 unsigned long r25; /* scratch */ member in struct:pt_regs
/linux-4.1.27/drivers/media/tuners/
H A Dr820t.c974 polyfil_cur = 0x60; /* r25[6:5]:min */ r820t_set_tv_standard()
986 polyfil_cur = 0x60; /* r25[6:5]:min */ r820t_set_tv_standard()
998 polyfil_cur = 0x60; /* r25[6:5]:min */ r820t_set_tv_standard()
1011 polyfil_cur = 0x60; /* r25[6:5]:min */ r820t_set_tv_standard()
1031 polyfil_cur = 0x60; /* r25[6:5]:min */ r820t_set_tv_standard()
1044 polyfil_cur = 0x60; /* r25[6:5]:min */ r820t_set_tv_standard()
1056 polyfil_cur = 0x60; /* r25[6:5]:min */ r820t_set_tv_standard()
/linux-4.1.27/arch/openrisc/kernel/
H A Dhead.S446 l.or r25,r0,r3 /* pointer to fdt */
573 l.lwz r3,0(r25) /* load magic from fdt into r3 */
580 l.or r25,r0,r0
583 l.or r3,r0,r25
614 CLEAR_GPR(r25)
H A Dentry.S81 l.lwz r25,PT_GPR25(r1) ;\
119 l.sw PT_GPR25(r1),r25 ;\
157 l.sw PT_GPR25(r1),r25 ;\
/linux-4.1.27/drivers/net/wireless/b43/
H A Dradio_2057.c131 r20, r21, r22, r23, r24, r25, r26, r27) \
157 .radio_pad5g_tune_misc_pus_core1 = r25, \
H A Dradio_2056.c3040 r20, r21, r22, r23, r24, r25, r26, r27, r28, r29, \
3067 .radio_tx0_mixa_boost_tune = r25, \
/linux-4.1.27/arch/powerpc/include/asm/
H A Dppc_asm.h594 #define r25 %r25 macro
/linux-4.1.27/arch/arm/mach-omap2/
H A Dmux34xx.c1557 _OMAP3_BALLENTRY(SDMMC1_DAT7, "r25", NULL),
1997 _OMAP3_BALLENTRY(SIM_RST, "r25", NULL),
/linux-4.1.27/sound/soc/codecs/
H A Dcs42l52.c93 { CS42L52_SPKB_VOL, 0x00 }, /* r25 Speaker B Volume */
H A Dcs42l56.c103 { 37, 0x00 }, /* r25 - Noise Gate Ctl */
H A Dcs42l73.c81 { 37, 0x00 }, /* r25 - Voice PCM Input Advisory Volume */
/linux-4.1.27/drivers/net/wireless/rt2x00/
H A Drt2500usb.c1434 rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word); rt2500usb_validate_eeprom()
/linux-4.1.27/drivers/net/ethernet/tile/
H A Dtilepro.c335 "r25", "r26", "r27", "r28", "r29"); __netio_fastio1()
/linux-4.1.27/arch/powerpc/xmon/
H A Dxmon.c2500 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",

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