Searched refs:mthd (Results 1 - 60 of 60) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dshadow.c43 struct shadow *mthd = (void *)nv_object(bios)->oclass; shadow_fetch() local
46 void *data = mthd->data; shadow_fetch()
48 u32 read = mthd->func->read(data, start, limit - start, bios); shadow_fetch()
92 shadow_image(struct nvkm_bios *bios, int idx, struct shadow *mthd) shadow_image() argument
113 if (mthd->func->rw) shadow_image()
126 score += shadow_image(bios, idx + 1, mthd); shadow_image()
131 shadow_score(struct nvkm_bios *bios, struct shadow *mthd) shadow_score() argument
135 nv_object(bios)->oclass = &mthd->base; shadow_score()
136 score = shadow_image(bios, 0, mthd); shadow_score()
143 shadow_method(struct nvkm_bios *bios, struct shadow *mthd, const char *name) shadow_method() argument
145 const struct nvbios_source *func = mthd->func; shadow_method()
149 mthd->data = func->init(bios, name); shadow_method()
150 if (IS_ERR(mthd->data)) { shadow_method()
151 mthd->data = NULL; shadow_method()
155 mthd->score = shadow_score(bios, mthd); shadow_method()
157 func->fini(mthd->data); shadow_method()
158 nv_debug(bios, "scored %d\n", mthd->score); shadow_method()
159 mthd->data = bios->data; shadow_method()
160 mthd->size = bios->size; shadow_method()
164 return mthd->score; shadow_method()
210 }, *mthd = mthds, *best = NULL; nvbios_shadow() local
220 for (mthd = mthds; mthd->func; mthd++) { nvbios_shadow()
221 if (mthd->func->name && nvbios_shadow()
222 !strcasecmp(source, mthd->func->name)) { nvbios_shadow()
223 best = mthd; nvbios_shadow()
224 if (shadow_method(bios, mthd, NULL)) nvbios_shadow()
230 if (!best && (best = mthd)) { nvbios_shadow()
231 mthd->func = &shadow_fw; nvbios_shadow()
232 shadow_method(bios, mthd, source); nvbios_shadow()
233 mthd->func = NULL; nvbios_shadow()
245 for (mthd = mthds, best = mthd; mthd->func; mthd++) { nvbios_shadow()
246 if (!mthd->skip || best->score < mthd->skip) { nvbios_shadow()
247 if (shadow_method(bios, mthd, NULL)) { nvbios_shadow()
248 if (mthd->score > best->score) nvbios_shadow()
249 best = mthd; nvbios_shadow()
256 for (mthd = mthds; mthd->func; mthd++) { nvbios_shadow()
257 if (mthd != best) nvbios_shadow()
258 kfree(mthd->data); nvbios_shadow()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dmemx.c12 u32 mthd; member in struct:nvkm_memx::__anon4302
24 if (memx->c.mthd) { memx_out()
25 nv_wr32(pmu, 0x10a1c4, (memx->c.size << 16) | memx->c.mthd); memx_out()
28 memx->c.mthd = 0; memx_out()
34 memx_cmd(struct nvkm_memx *memx, u32 mthd, u32 size, u32 data[]) memx_cmd() argument
37 (memx->c.mthd && memx->c.mthd != mthd)) memx_cmd()
41 memx->c.mthd = mthd; memx_cmd()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dg84.c34 .mthd = 0x0080,
46 .mthd = 0x0400,
116 .mthd = 0x0000,
161 .mthd = 0x0000,
267 .mthd.core = &g84_disp_core_mthd_chan,
268 .mthd.base = &g84_disp_base_mthd_chan,
269 .mthd.ovly = &g84_disp_ovly_mthd_chan,
270 .mthd.prev = 0x000004,
H A Dg94.c35 .mthd = 0x0040,
134 .mthd.core = &g94_disp_core_mthd_chan,
135 .mthd.base = &g84_disp_base_mthd_chan,
136 .mthd.ovly = &g84_disp_ovly_mthd_chan,
137 .mthd.prev = 0x000004,
H A Dgt200.c34 .mthd = 0x0000,
143 .mthd.core = &g84_disp_core_mthd_chan,
144 .mthd.base = &g84_disp_base_mthd_chan,
145 .mthd.ovly = &gt200_disp_ovly_mthd_chan,
146 .mthd.prev = 0x000004,
H A Dnv04.c78 nv04_disp_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) nv04_disp_mthd() argument
86 nv_ioctl(object, "disp mthd size %d\n", size); nv04_disp_mthd()
88 nv_ioctl(object, "disp mthd vers %d mthd %02x head %d\n", nv04_disp_mthd()
90 mthd = args->v0.method; nv04_disp_mthd()
98 switch (mthd) { nv04_disp_mthd()
114 .mthd = nv04_disp_mthd,
H A Dgk104.c34 .mthd = 0x0300,
131 .mthd = 0x0000,
263 .mthd.core = &gk104_disp_core_mthd_chan,
264 .mthd.base = &gf110_disp_base_mthd_chan,
265 .mthd.ovly = &gk104_disp_ovly_mthd_chan,
266 .mthd.prev = -0x020000,
H A Dgk110.c98 .mthd.core = &gk104_disp_core_mthd_chan,
99 .mthd.base = &gf110_disp_base_mthd_chan,
100 .mthd.ovly = &gk104_disp_ovly_mthd_chan,
101 .mthd.prev = -0x020000,
H A Dgm107.c98 .mthd.core = &gk104_disp_core_mthd_chan,
99 .mthd.base = &gf110_disp_base_mthd_chan,
100 .mthd.ovly = &gk104_disp_ovly_mthd_chan,
101 .mthd.prev = -0x020000,
H A Dgm204.c106 .mthd.core = &gk104_disp_core_mthd_chan,
107 .mthd.base = &gf110_disp_base_mthd_chan,
108 .mthd.ovly = &gk104_disp_ovly_mthd_chan,
109 .mthd.prev = -0x020000,
H A Dgt215.c99 .mthd.core = &g94_disp_core_mthd_chan,
100 .mthd.base = &g84_disp_base_mthd_chan,
101 .mthd.ovly = &g84_disp_ovly_mthd_chan,
102 .mthd.prev = 0x000004,
H A Dnv50.h51 } mthd; member in struct:nv50_disp_impl
129 u32 mthd; member in struct:nv50_disp_mthd_list
132 u32 mthd; member in struct:nv50_disp_mthd_list::__anon4255
144 const struct nv50_disp_mthd_list *mthd; member in struct:nv50_disp_mthd_chan::__anon4256
H A Dgf110.c154 .mthd = 0x0000,
167 .mthd = 0x0020,
180 .mthd = 0x0020,
193 .mthd = 0x0020,
206 .mthd = 0x0300,
366 .mthd = 0x0000,
416 .mthd = 0x0020,
460 .mthd = 0x0000,
744 .mthd = nv50_disp_main_mthd,
1110 nv50_disp_mthd_chan(priv, NV_DBG_DEBUG, 0, impl->mthd.core); gf110_disp_intr_supervisor()
1156 u32 mthd = nv_rd32(priv, 0x6101f0 + (chid * 12)); gf110_disp_intr_error() local
1160 nv_error(priv, "chid %d mthd 0x%04x data 0x%08x " gf110_disp_intr_error()
1162 chid, (mthd & 0x0000ffc), data, mthd, unkn); gf110_disp_intr_error()
1165 switch (mthd & 0xffc) { gf110_disp_intr_error()
1168 impl->mthd.core); gf110_disp_intr_error()
1175 switch (mthd & 0xffc) { gf110_disp_intr_error()
1178 impl->mthd.base); gf110_disp_intr_error()
1185 switch (mthd & 0xffc) { gf110_disp_intr_error()
1188 impl->mthd.ovly); gf110_disp_intr_error()
1305 .mthd.core = &gf110_disp_core_mthd_chan,
1306 .mthd.base = &gf110_disp_base_mthd_chan,
1307 .mthd.ovly = &gf110_disp_ovly_mthd_chan,
1308 .mthd.prev = -0x020000,
H A Dnv50.c323 for (i = 0; list->data[i].mthd; i++) { nv50_disp_mthd_list()
327 u32 mthd = list->data[i].mthd + (list->mthd * inst); nv50_disp_mthd_list() local
337 mthd, prev, mods, name ? " // " : "", nv50_disp_mthd_list()
355 for (i = 0; (list = chan->data[i].mthd) != NULL; i++) { nv50_disp_mthd_chan()
375 nv50_disp_mthd_list(priv, debug, base, impl->mthd.prev, nv50_disp_mthd_chan()
383 .mthd = 0x0000,
396 .mthd = 0x0080,
408 .mthd = 0x0040,
418 .mthd = 0x0040,
428 .mthd = 0x0400,
595 .mthd = 0x0000,
620 .mthd = 0x0400,
697 .mthd = 0x0000,
982 nv50_disp_main_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) nv50_disp_main_mthd() argument
995 if (mthd != NV50_DISP_MTHD) nv50_disp_main_mthd()
998 nv_ioctl(object, "disp mthd size %d\n", size); nv50_disp_main_mthd()
1000 nv_ioctl(object, "disp mthd vers %d mthd %02x head %d\n", nv50_disp_main_mthd()
1002 mthd = args->v0.method; nv50_disp_main_mthd()
1006 nv_ioctl(object, "disp mthd vers %d mthd %02x " nv50_disp_main_mthd()
1010 mthd = args->v1.method; nv50_disp_main_mthd()
1032 switch (mthd) { nv50_disp_main_mthd()
1039 switch (mthd * !!outp) { nv50_disp_main_mthd()
1219 .mthd = nv50_disp_main_mthd,
1333 u32 mthd = (addr & 0x00000ffc); nv50_disp_intr_error() local
1345 nv_error(priv, "%s [%s] chid %d mthd 0x%04x data 0x%08x\n", nv50_disp_intr_error()
1347 chid, mthd, data); nv50_disp_intr_error()
1350 switch (mthd) { nv50_disp_intr_error()
1353 impl->mthd.core); nv50_disp_intr_error()
1360 switch (mthd) { nv50_disp_intr_error()
1363 impl->mthd.base); nv50_disp_intr_error()
1370 switch (mthd) { nv50_disp_intr_error()
1373 impl->mthd.ovly); nv50_disp_intr_error()
1887 nv50_disp_mthd_chan(priv, NV_DBG_DEBUG, 0, impl->mthd.core); nv50_disp_intr_supervisor()
2014 .mthd.core = &nv50_disp_core_mthd_chan,
2015 .mthd.base = &nv50_disp_base_mthd_chan,
2016 .mthd.ovly = &nv50_disp_ovly_mthd_chan,
2017 .mthd.prev = 0x000004,
/linux-4.1.27/drivers/gpu/drm/nouveau/include/nvkm/core/
H A Dobject.h92 int (*mthd)(struct nvkm_object *, u32, void *, u32); member in struct:nvkm_ofuncs
118 nv_exec(void *obj, u32 mthd, void *data, u32 size) nv_exec() argument
123 if (mthd >= method->start && mthd <= method->limit) nv_exec()
124 return method->call(obj, mthd, data, size); nv_exec()
132 nv_call(void *obj, u32 mthd, u32 data) nv_call() argument
134 return nv_exec(obj, mthd, &data, sizeof(data)); nv_call()
/linux-4.1.27/drivers/gpu/drm/nouveau/
H A Dnouveau_dma.h111 BEGIN_NV04(struct nouveau_channel *chan, int subc, int mthd, int size) BEGIN_NV04() argument
113 OUT_RING(chan, 0x00000000 | (subc << 13) | (size << 18) | mthd); BEGIN_NV04()
117 BEGIN_NI04(struct nouveau_channel *chan, int subc, int mthd, int size) BEGIN_NI04() argument
119 OUT_RING(chan, 0x40000000 | (subc << 13) | (size << 18) | mthd); BEGIN_NI04()
123 BEGIN_NVC0(struct nouveau_channel *chan, int subc, int mthd, int size) BEGIN_NVC0() argument
125 OUT_RING(chan, 0x20000000 | (size << 16) | (subc << 13) | (mthd >> 2)); BEGIN_NVC0()
129 BEGIN_NIC0(struct nouveau_channel *chan, int subc, int mthd, int size) BEGIN_NIC0() argument
131 OUT_RING(chan, 0x60000000 | (size << 16) | (subc << 13) | (mthd >> 2)); BEGIN_NIC0()
135 BEGIN_IMC0(struct nouveau_channel *chan, int subc, int mthd, u16 data) BEGIN_IMC0() argument
137 OUT_RING(chan, 0x80000000 | (data << 16) | (subc << 13) | (mthd >> 2)); BEGIN_IMC0()
H A Dnouveau_bo.c1126 }, *mthd = _methods; nouveau_bo_move_init() local
1133 if (mthd->engine) nouveau_bo_move_init()
1141 mthd->oclass | (mthd->engine << 16), nouveau_bo_move_init()
1142 mthd->oclass, NULL, 0, nouveau_bo_move_init()
1145 ret = mthd->init(chan, drm->ttm.copy.handle); nouveau_bo_move_init()
1151 drm->ttm.move = mthd->exec; nouveau_bo_move_init()
1153 name = mthd->name; nouveau_bo_move_init()
1156 } while ((++mthd)->exec); nouveau_bo_move_init()
H A Dnouveau_reg.h754 #define NV50_PDISPLAY_CRTC_UNK_0A18 /* mthd 0x0900 */ 0x00610a18
759 #define NV50_PDISPLAY_CRTC_UNK0A78 /* mthd 0x0904 */ 0x00610a78
769 #define NV50_PDISPLAY_CRTC_UNK_0B10 /* mthd 0x0828 */ 0x00610b10
H A Dnv50_display.c1714 struct nv50_disp_mthd_v1 mthd; nv50_audio_mode_set() member in struct:__packed::__anon4180
1719 .base.mthd.version = 1, nv50_audio_mode_set()
1720 .base.mthd.method = NV50_DISP_MTHD_V1_SOR_HDA_ELD, nv50_audio_mode_set()
1721 .base.mthd.hasht = nv_encoder->dcb->hasht, nv50_audio_mode_set()
1722 .base.mthd.hashm = (0xf0ff & nv_encoder->dcb->hashm) | nv50_audio_mode_set()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/sw/
H A Dgf100.c33 gf100_sw_mthd_vblsem_offset(struct nvkm_object *object, u32 mthd, gf100_sw_mthd_vblsem_offset() argument
38 if (mthd == 0x0400) { gf100_sw_mthd_vblsem_offset()
49 gf100_sw_mthd_mp_control(struct nvkm_object *object, u32 mthd, gf100_sw_mthd_mp_control() argument
56 switch (mthd) { gf100_sw_mthd_mp_control()
H A Dnv50.c39 nv50_sw_mthd_dma_vblsem(struct nvkm_object *object, u32 mthd, nv50_sw_mthd_dma_vblsem() argument
61 nv50_sw_mthd_vblsem_offset(struct nvkm_object *object, u32 mthd, nv50_sw_mthd_vblsem_offset() argument
70 nv50_sw_mthd_vblsem_value(struct nvkm_object *object, u32 mthd, nv50_sw_mthd_vblsem_value() argument
79 nv50_sw_mthd_vblsem_release(struct nvkm_object *object, u32 mthd, nv50_sw_mthd_vblsem_release() argument
92 nv50_sw_mthd_flip(struct nvkm_object *object, u32 mthd, void *args, u32 size) nv50_sw_mthd_flip() argument
H A Dnv04.c40 nv04_sw_set_ref(struct nvkm_object *object, u32 mthd, void *data, u32 size) nv04_sw_set_ref() argument
49 nv04_sw_flip(struct nvkm_object *object, u32 mthd, void *args, u32 size) nv04_sw_flip() argument
H A Dnv10.c39 nv10_sw_flip(struct nvkm_object *object, u32 mthd, void *args, u32 size) nv10_sw_flip() argument
/linux-4.1.27/drivers/gpu/drm/nouveau/nvif/
H A Dobject.c116 nvif_object_mthd(struct nvif_object *object, u32 mthd, void *data, u32 size) nvif_object_mthd() argument
120 struct nvif_ioctl_mthd_v0 mthd; nvif_object_mthd() member in struct:__anon4199
133 args->mthd.version = 0; nvif_object_mthd()
134 args->mthd.method = mthd; nvif_object_mthd()
136 memcpy(args->mthd.data, data, size); nvif_object_mthd()
138 memcpy(data, args->mthd.data, size); nvif_object_mthd()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/
H A Dnv31.c60 nv31_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) nv31_mpeg_mthd_dma() argument
75 if (mthd == 0x0190) { nv31_mpeg_mthd_dma()
81 if (mthd == 0x01a0) { nv31_mpeg_mthd_dma()
202 u32 mthd = nv_rd32(priv, 0x00b234); nv31_mpeg_intr() local
212 if (type == 0x00000020 && mthd == 0x0000) { nv31_mpeg_intr()
219 if (handle && !nv_call(handle->object, mthd, data)) nv31_mpeg_intr()
231 nvkm_client_name(engctx), stat, type, mthd, data); nv31_mpeg_intr()
H A Dnv40.c33 nv40_mpeg_mthd_dma(struct nvkm_object *object, u32 mthd, void *arg, u32 len) nv40_mpeg_mthd_dma() argument
48 if (mthd == 0x0190) { nv40_mpeg_mthd_dma()
54 if (mthd == 0x01a0) { nv40_mpeg_mthd_dma()
H A Dnv44.c104 u32 mthd = nv_rd32(priv, 0x00b234); nv44_mpeg_intr() local
114 if (type == 0x00000020 && mthd == 0x0000) { nv44_mpeg_intr()
121 if (handle && !nv_call(handle->object, mthd, data)) nv44_mpeg_intr()
134 type, mthd, data); nv44_mpeg_intr()
H A Dnv50.c128 u32 mthd = nv_rd32(priv, 0x00b234); nv50_mpeg_intr() local
134 if (type == 0x00000020 && mthd == 0x0000) { nv50_mpeg_intr()
142 stat, type, mthd, data); nv50_mpeg_intr()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dnv04.c362 const int mthd = addr & 0x1ffc; nv04_fifo_swmthd() local
373 switch (mthd) { nv04_fifo_swmthd()
396 if (!nv_call(bind->object, mthd, data)) nv04_fifo_swmthd()
412 u32 mthd, data; nv04_fifo_cache_error() local
423 mthd = nv_rd32(priv, NV04_PFIFO_CACHE1_METHOD(ptr)); nv04_fifo_cache_error()
426 mthd = nv_rd32(priv, NV40_PFIFO_CACHE1_METHOD(ptr)); nv04_fifo_cache_error()
430 if (!nv04_fifo_swmthd(priv, chid, mthd, data)) { nv04_fifo_cache_error()
434 "CACHE_ERROR - ch %d [%s] subc %d mthd 0x%04x data 0x%08x\n", nv04_fifo_cache_error()
435 chid, client_name, (mthd >> 13) & 7, mthd & 0x1ffc, nv04_fifo_cache_error()
H A Dgf100.c457 gf100_fifo_swmthd(struct gf100_fifo_priv *priv, u32 chid, u32 mthd, u32 data) gf100_fifo_swmthd() argument
472 if (!mthd || !nv_call(bind->object, mthd, data)) gf100_fifo_swmthd()
688 u32 mthd = (addr & 0x00003ffc); gf100_fifo_intr_pbdma() local
692 if (!gf100_fifo_swmthd(priv, chid, mthd, data)) gf100_fifo_intr_pbdma()
701 "PBDMA%d: ch %d [%s] subc %d mthd 0x%04x data 0x%08x\n", gf100_fifo_intr_pbdma()
704 subc, mthd, data); gf100_fifo_intr_pbdma()
H A Dgk104.c482 gk104_fifo_swmthd(struct gk104_fifo_priv *priv, u32 chid, u32 mthd, u32 data) gk104_fifo_swmthd() argument
497 if (!mthd || !nv_call(bind->object, mthd, data)) gk104_fifo_swmthd()
830 u32 mthd = (addr & 0x00003ffc); gk104_fifo_intr_pbdma_0() local
834 if (!gk104_fifo_swmthd(priv, chid, mthd, data)) gk104_fifo_intr_pbdma_0()
844 "PBDMA%d: ch %d [%s] subc %d mthd 0x%04x data 0x%08x\n", gk104_fifo_intr_pbdma_0()
847 subc, mthd, data); gk104_fifo_intr_pbdma_0()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dnv04.c511 nv04_gr_mthd_set_operation(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_set_operation() argument
528 nv04_gr_mthd_surf3d_clip_h(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_surf3d_clip_h() argument
549 nv04_gr_mthd_surf3d_clip_v(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_surf3d_clip_v() argument
578 nv04_gr_mthd_bind_surf2d(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_surf2d() argument
595 nv04_gr_mthd_bind_surf2d_swzsurf(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_surf2d_swzsurf() argument
616 nv01_gr_mthd_bind_patt(struct nvkm_object *object, u32 mthd, nv01_gr_mthd_bind_patt() argument
631 nv04_gr_mthd_bind_patt(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_patt() argument
646 nv04_gr_mthd_bind_rop(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_rop() argument
661 nv04_gr_mthd_bind_beta1(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_beta1() argument
676 nv04_gr_mthd_bind_beta4(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_beta4() argument
691 nv04_gr_mthd_bind_surf_dst(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_surf_dst() argument
706 nv04_gr_mthd_bind_surf_src(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_surf_src() argument
721 nv04_gr_mthd_bind_surf_color(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_surf_color() argument
736 nv04_gr_mthd_bind_surf_zeta(struct nvkm_object *object, u32 mthd, nv04_gr_mthd_bind_surf_zeta() argument
751 nv01_gr_mthd_bind_clip(struct nvkm_object *object, u32 mthd, nv01_gr_mthd_bind_clip() argument
766 nv01_gr_mthd_bind_chroma(struct nvkm_object *object, u32 mthd, nv01_gr_mthd_bind_chroma() argument
1262 u32 mthd = (addr & 0x00001ffc); nv04_gr_intr() local
1278 if (handle && !nv_call(handle->object, mthd, data)) nv04_gr_intr()
1302 "ch %d [%s] subc %d class 0x%04x mthd 0x%04x data 0x%08x\n", nv04_gr_intr()
1303 chid, nvkm_client_name(chan), subc, class, mthd, nv04_gr_intr()
H A Dctxgk20a.c50 .mthd = gk20a_grctx_pack_mthd,
H A Dnv50.c599 u32 mthd = (addr & 0x00001ffc); nv50_gr_trap_handler() local
608 "ch %d [0x%010llx %s] subc %d class 0x%04x mthd 0x%04x data 0x%08x%08x 400808 0x%08x 400848 0x%08x\n", nv50_gr_trap_handler()
611 class, mthd, datah, datal, addr, r848); nv50_gr_trap_handler()
626 u32 mthd = (addr & 0x00001ffc); nv50_gr_trap_handler() local
633 "ch %d [0x%010llx %s] subc %d class 0x%04x mthd 0x%04x data 0x%08x 40084c 0x%08x\n", nv50_gr_trap_handler()
636 class, mthd, data, addr); nv50_gr_trap_handler()
795 u32 mthd = (addr & 0x00001ffc); nv50_gr_intr() local
806 if (handle && !nv_call(handle->object, mthd, data)) nv50_gr_intr()
837 "ch %d [0x%010llx %s] subc %d class 0x%04x mthd 0x%04x data 0x%08x\n", nv50_gr_intr()
839 subc, class, mthd, data); nv50_gr_intr()
H A Dctxgf104.c100 .mthd = gf100_grctx_pack_mthd,
H A Dctxgk110b.c91 .mthd = gk110_grctx_pack_mthd,
H A Dctxgm206.c71 .mthd = gm204_grctx_pack_mthd,
H A Dnv20.c201 u32 mthd = (addr & 0x00001ffc); nv20_gr_intr() local
210 if (handle && !nv_call(handle->object, mthd, data)) nv20_gr_intr()
228 "ch %d [%s] subc %d class 0x%04x mthd 0x%04x data 0x%08x\n", nv20_gr_intr()
229 chid, nvkm_client_name(engctx), subc, class, mthd, nv20_gr_intr()
H A Dgf100.c213 gf100_fermi_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) gf100_fermi_mthd() argument
215 switch (mthd) { gf100_fermi_mthd()
232 .mthd = gf100_fermi_mthd,
236 gf100_gr_set_shader_exceptions(struct nvkm_object *object, u32 mthd, gf100_gr_set_shader_exceptions() argument
1077 u32 mthd = (addr & 0x00003ffc); gf100_gr_ctxctl_isr() local
1081 "mthd 0x%04x data 0x%08x\n", gf100_gr_ctxctl_isr()
1082 subc, class, mthd, data); gf100_gr_ctxctl_isr()
1116 u32 mthd = (addr & 0x00003ffc); gf100_gr_intr() local
1142 if (!handle || nv_call(handle->object, mthd, data)) { gf100_gr_intr()
1144 "ILLEGAL_MTHD ch %d [0x%010llx %s] subc %d class 0x%04x mthd 0x%04x data 0x%08x\n", gf100_gr_intr()
1146 subc, class, mthd, data); gf100_gr_intr()
1155 "ILLEGAL_CLASS ch %d [0x%010llx %s] subc %d class 0x%04x mthd 0x%04x data 0x%08x\n", gf100_gr_intr()
1157 class, mthd, data); gf100_gr_intr()
1165 pr_cont("] ch %d [0x%010llx %s] subc %d class 0x%04x mthd 0x%04x data 0x%08x\n", gf100_gr_intr()
1167 class, mthd, data); gf100_gr_intr()
H A Dnv40.c297 u32 mthd = (addr & 0x00001ffc); nv40_gr_intr() local
309 if (handle && !nv_call(handle->object, mthd, data)) nv40_gr_intr()
331 "ch %d [0x%08x %s] subc %d class 0x%04x mthd 0x%04x data 0x%08x\n", nv40_gr_intr()
333 class, mthd, data); nv40_gr_intr()
H A Dctxgf117.c251 gf100_gr_mthd(priv, oclass->mthd); gf117_grctx_generate_main()
274 .mthd = gf119_grctx_pack_mthd,
H A Dnv10.c478 nv17_gr_mthd_lma_window(struct nvkm_object *object, u32 mthd, nv17_gr_mthd_lma_window() argument
489 chan->lma_window[(mthd - 0x1638) / 4] = data; nv17_gr_mthd_lma_window()
491 if (mthd != 0x1644) nv17_gr_mthd_lma_window()
555 nv17_gr_mthd_lma_enable(struct nvkm_object *object, u32 mthd, nv17_gr_mthd_lma_enable() argument
1164 u32 mthd = (addr & 0x00001ffc); nv10_gr_intr() local
1179 if (handle && !nv_call(handle->object, mthd, data)) nv10_gr_intr()
1203 "ch %d [%s] subc %d class 0x%04x mthd 0x%04x data 0x%08x\n", nv10_gr_intr()
1204 chid, nvkm_client_name(chan), subc, class, mthd, nv10_gr_intr()
H A Dctxgf100.h36 const struct gf100_gr_pack *mthd; member in struct:gf100_grctx_oclass
H A Dctxgf110.c351 .mthd = gf110_grctx_pack_mthd,
H A Dctxgf119.c519 .mthd = gf119_grctx_pack_mthd,
H A Dctxgk208.c552 .mthd = gk110_grctx_pack_mthd,
H A Dctxgf100.c1259 gf100_gr_mthd(priv, oclass->mthd); gf100_grctx_generate_main()
1382 .mthd = gf100_grctx_pack_mthd,
H A Dctxgk104.c986 gf100_gr_mthd(priv, oclass->mthd); gk104_grctx_generate_main()
1012 .mthd = gk104_grctx_pack_mthd,
H A Dctxgm107.c989 gf100_gr_mthd(priv, oclass->mthd); gm107_grctx_generate_main()
1016 .mthd = gm107_grctx_pack_mthd,
H A Dctxgm204.c1017 gf100_gr_mthd(priv, oclass->mthd); gm204_grctx_generate_main()
1042 .mthd = gm204_grctx_pack_mthd,
H A Dctxgf108.c796 .mthd = gf108_grctx_pack_mthd,
H A Dctxgk110.c830 .mthd = gk110_grctx_pack_mthd,
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/ce/
H A Dgt215.c89 u32 mthd = (addr & 0x07ff) << 2; gt215_ce_intr() local
100 pr_cont("] ch %d [0x%010llx %s] subc %d mthd 0x%04x data 0x%08x\n", gt215_ce_intr()
102 mthd, data); gt215_ce_intr()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/cipher/
H A Dg84.c116 u32 mthd = nv_rd32(priv, 0x102190); g84_cipher_intr() local
127 pr_cont(" ch %d [0x%010llx %s] mthd 0x%04x data 0x%08x\n", g84_cipher_intr()
129 mthd, data); g84_cipher_intr()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dctrl.c169 nvkm_control_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) nvkm_control_mthd() argument
171 switch (mthd) { nvkm_control_mthd()
190 .mthd = nvkm_control_mthd,
H A Dbase.c153 nvkm_devobj_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) nvkm_devobj_mthd() argument
155 switch (mthd) { nvkm_devobj_mthd()
270 .mthd = nvkm_devobj_mthd,
507 .mthd = nvkm_devobj_mthd,
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/sec/
H A Dg98.c87 u32 mthd = (addr & 0x07ff) << 2; g98_sec_intr() local
98 pr_cont("] ch %d [0x%010llx %s] subc %d mthd 0x%04x data 0x%08x\n", g98_sec_intr()
100 subc, mthd, data); g98_sec_intr()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/core/
H A Dclient.c168 nvkm_client_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) nvkm_client_mthd() argument
170 switch (mthd) { nvkm_client_mthd()
195 .mthd = nvkm_client_mthd,
H A Dioctl.c211 nv_ioctl(object, "mthd size %d\n", size); nvkm_ioctl_mthd()
213 nv_ioctl(object, "mthd vers %d mthd %02x\n", nvkm_ioctl_mthd()
215 if (ret = -ENODEV, ofuncs->mthd) nvkm_ioctl_mthd()
216 ret = ofuncs->mthd(object, args->v0.method, data, size); nvkm_ioctl_mthd()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/pm/
H A Dbase.c241 nvkm_perfctr_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size) nvkm_perfctr_mthd() argument
243 switch (mthd) { nvkm_perfctr_mthd()
317 .mthd = nvkm_perfctr_mthd,

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