Searched refs:l1 (Results 1 - 172 of 172) sorted by relevance

/linux-4.1.27/security/selinux/ss/
H A Dmls_types.h29 static inline int mls_level_eq(struct mls_level *l1, struct mls_level *l2) mls_level_eq() argument
31 return ((l1->sens == l2->sens) && mls_level_eq()
32 ebitmap_cmp(&l1->cat, &l2->cat)); mls_level_eq()
35 static inline int mls_level_dom(struct mls_level *l1, struct mls_level *l2) mls_level_dom() argument
37 return ((l1->sens >= l2->sens) && mls_level_dom()
38 ebitmap_contains(&l1->cat, &l2->cat, 0)); mls_level_dom()
41 #define mls_level_incomp(l1, l2) \
42 (!mls_level_dom((l1), (l2)) && !mls_level_dom((l2), (l1)))
44 #define mls_level_between(l1, l2, l3) \
45 (mls_level_dom((l1), (l2)) && mls_level_dom((l3), (l1)))
H A Dservices.c279 struct mls_level *l1, *l2; constraint_expr_eval() local
337 l1 = &(scontext->range.level[0]); constraint_expr_eval()
341 l1 = &(scontext->range.level[0]); constraint_expr_eval()
345 l1 = &(scontext->range.level[1]); constraint_expr_eval()
349 l1 = &(scontext->range.level[1]); constraint_expr_eval()
353 l1 = &(scontext->range.level[0]); constraint_expr_eval()
357 l1 = &(tcontext->range.level[0]); constraint_expr_eval()
363 s[++sp] = mls_level_eq(l1, l2); constraint_expr_eval()
366 s[++sp] = !mls_level_eq(l1, l2); constraint_expr_eval()
369 s[++sp] = mls_level_dom(l1, l2); constraint_expr_eval()
372 s[++sp] = mls_level_dom(l2, l1); constraint_expr_eval()
375 s[++sp] = mls_level_incomp(l2, l1); constraint_expr_eval()
/linux-4.1.27/scripts/rt-tester/
H A Dcheck-all.sh9 testit t2-l1-2rt-sameprio.tst
10 testit t2-l1-pi.tst
11 testit t2-l1-signal.tst
13 testit t3-l1-pi-1rt.tst
14 testit t3-l1-pi-2rt.tst
15 testit t3-l1-pi-3rt.tst
16 testit t3-l1-pi-signal.tst
17 testit t3-l1-pi-steal.tst
/linux-4.1.27/drivers/isdn/mISDN/
H A Dlayer1.c103 struct layer1 *l1 = fi->userdata; l1m_debug() local
112 printk(KERN_DEBUG "%s: %pV\n", dev_name(&l1->dch->dev.dev), &vaf); l1m_debug()
126 struct layer1 *l1 = fi->userdata; l1_deact_cnf() local
129 if (test_bit(FLG_L1_ACTIVATING, &l1->Flags)) l1_deact_cnf()
130 l1->dcb(l1->dch, HW_POWERUP_REQ); l1_deact_cnf()
136 struct layer1 *l1 = fi->userdata; l1_deact_req_s() local
139 mISDN_FsmRestartTimer(&l1->timerX, 550, EV_TIMER_DEACT, NULL, 2); l1_deact_req_s()
140 test_and_set_bit(FLG_L1_DEACTTIMER, &l1->Flags); l1_deact_req_s()
146 struct layer1 *l1 = fi->userdata; l1_power_up_s() local
148 if (test_bit(FLG_L1_ACTIVATING, &l1->Flags)) { l1_power_up_s()
150 l1->dcb(l1->dch, INFO3_P8); l1_power_up_s()
170 struct layer1 *l1 = fi->userdata; l1_info2_ind() local
173 l1->dcb(l1->dch, INFO3_P8); l1_info2_ind()
179 struct layer1 *l1 = fi->userdata; l1_info4_ind() local
182 l1->dcb(l1->dch, INFO3_P8); l1_info4_ind()
183 if (test_and_clear_bit(FLG_L1_DEACTTIMER, &l1->Flags)) l1_info4_ind()
184 mISDN_FsmDelTimer(&l1->timerX, 4); l1_info4_ind()
185 if (!test_bit(FLG_L1_ACTIVATED, &l1->Flags)) { l1_info4_ind()
186 if (test_and_clear_bit(FLG_L1_T3RUN, &l1->Flags)) l1_info4_ind()
187 mISDN_FsmDelTimer(&l1->timer3, 3); l1_info4_ind()
188 mISDN_FsmRestartTimer(&l1->timerX, 110, EV_TIMER_ACT, NULL, 2); l1_info4_ind()
189 test_and_set_bit(FLG_L1_ACTTIMER, &l1->Flags); l1_info4_ind()
196 struct layer1 *l1 = fi->userdata; l1_timer3() local
198 test_and_clear_bit(FLG_L1_T3RUN, &l1->Flags); l1_timer3()
199 if (test_and_clear_bit(FLG_L1_ACTIVATING, &l1->Flags)) { l1_timer3()
200 if (test_and_clear_bit(FLG_L1_DBLOCKED, &l1->Flags)) l1_timer3()
201 l1->dcb(l1->dch, HW_D_NOBLOCKED); l1_timer3()
202 l1->dcb(l1->dch, PH_DEACTIVATE_IND); l1_timer3()
204 if (l1->l1m.state != ST_L1_F6) { l1_timer3()
213 struct layer1 *l1 = fi->userdata; l1_timer_act() local
215 test_and_clear_bit(FLG_L1_ACTTIMER, &l1->Flags); l1_timer_act()
216 test_and_set_bit(FLG_L1_ACTIVATED, &l1->Flags); l1_timer_act()
217 l1->dcb(l1->dch, PH_ACTIVATE_IND); l1_timer_act()
223 struct layer1 *l1 = fi->userdata; l1_timer_deact() local
225 test_and_clear_bit(FLG_L1_DEACTTIMER, &l1->Flags); l1_timer_deact()
226 test_and_clear_bit(FLG_L1_ACTIVATED, &l1->Flags); l1_timer_deact()
227 if (test_and_clear_bit(FLG_L1_DBLOCKED, &l1->Flags)) l1_timer_deact()
228 l1->dcb(l1->dch, HW_D_NOBLOCKED); l1_timer_deact()
229 l1->dcb(l1->dch, PH_DEACTIVATE_IND); l1_timer_deact()
230 l1->dcb(l1->dch, HW_DEACT_REQ); l1_timer_deact()
236 struct layer1 *l1 = fi->userdata; l1_activate_s() local
238 mISDN_FsmRestartTimer(&l1->timer3, l1->t3_value, EV_TIMER3, NULL, 2); l1_activate_s()
239 test_and_set_bit(FLG_L1_T3RUN, &l1->Flags); l1_activate_s()
241 l1->dcb(l1->dch, HW_RESET_REQ); l1_activate_s()
247 struct layer1 *l1 = fi->userdata; l1_activate_no() local
249 if ((!test_bit(FLG_L1_DEACTTIMER, &l1->Flags)) && l1_activate_no()
250 (!test_bit(FLG_L1_T3RUN, &l1->Flags))) { l1_activate_no()
251 test_and_clear_bit(FLG_L1_ACTIVATING, &l1->Flags); l1_activate_no()
252 if (test_and_clear_bit(FLG_L1_DBLOCKED, &l1->Flags)) l1_activate_no()
253 l1->dcb(l1->dch, HW_D_NOBLOCKED); l1_activate_no()
254 l1->dcb(l1->dch, PH_DEACTIVATE_IND); l1_activate_no()
307 release_l1(struct layer1 *l1) { release_l1() argument
308 mISDN_FsmDelTimer(&l1->timerX, 0); release_l1()
309 mISDN_FsmDelTimer(&l1->timer3, 0); release_l1()
310 if (l1->dch) release_l1()
311 l1->dch->l1 = NULL; release_l1()
313 kfree(l1); release_l1()
317 l1_event(struct layer1 *l1, u_int event) l1_event() argument
321 if (!l1) l1_event()
325 mISDN_FsmEvent(&l1->l1m, EV_RESET_IND, NULL); l1_event()
328 mISDN_FsmEvent(&l1->l1m, EV_DEACT_IND, NULL); l1_event()
331 mISDN_FsmEvent(&l1->l1m, EV_POWER_UP, NULL); l1_event()
334 mISDN_FsmEvent(&l1->l1m, EV_DEACT_CNF, NULL); l1_event()
337 mISDN_FsmEvent(&l1->l1m, EV_ANYSIG_IND, NULL); l1_event()
340 mISDN_FsmEvent(&l1->l1m, EV_ANYSIG_IND, NULL); l1_event()
343 mISDN_FsmEvent(&l1->l1m, EV_INFO2_IND, NULL); l1_event()
346 mISDN_FsmEvent(&l1->l1m, EV_INFO4_IND, NULL); l1_event()
349 mISDN_FsmEvent(&l1->l1m, EV_INFO4_IND, NULL); l1_event()
352 if (test_bit(FLG_L1_ACTIVATED, &l1->Flags)) l1_event()
353 l1->dcb(l1->dch, PH_ACTIVATE_IND); l1_event()
355 test_and_set_bit(FLG_L1_ACTIVATING, &l1->Flags); l1_event()
356 mISDN_FsmEvent(&l1->l1m, EV_PH_ACTIVATE, NULL); l1_event()
360 release_l1(l1); l1_event()
370 l1->t3_value = val; l1_event()
404 dch->l1 = nl1; create_l1()
/linux-4.1.27/drivers/isdn/hisax/
H A Dhfc4s8s_l1.c152 int l1_state; /* actual l1 state */
182 struct hfc4s8s_l1 l1[HFC_MAX_ST]; member in struct:_hfc4s8s_hw
187 volatile u_char r_irq_statech; /* active isdn l1 status */
304 struct hfc4s8s_l1 *l1 = iface->ifc.priv; dch_l2l1() local
311 if (!l1->enabled) { dch_l2l1()
315 spin_lock_irqsave(&l1->lock, flags); dch_l2l1()
316 skb_queue_tail(&l1->d_tx_queue, skb); dch_l2l1()
317 if ((skb_queue_len(&l1->d_tx_queue) == 1) && dch_l2l1()
318 (l1->tx_cnt <= 0)) { dch_l2l1()
319 l1->hw->mr.r_irq_fifo_blx[l1->st_num] |= dch_l2l1()
321 spin_unlock_irqrestore(&l1->lock, flags); dch_l2l1()
322 schedule_work(&l1->hw->tqueue); dch_l2l1()
324 spin_unlock_irqrestore(&l1->lock, flags); dch_l2l1()
328 if (!l1->enabled) dch_l2l1()
330 if (!l1->nt_mode) { dch_l2l1()
331 if (l1->l1_state < 6) { dch_l2l1()
332 spin_lock_irqsave(&l1->lock, dch_l2l1()
335 Write_hfc8(l1->hw, R_ST_SEL, dch_l2l1()
336 l1->st_num); dch_l2l1()
337 Write_hfc8(l1->hw, A_ST_WR_STA, dch_l2l1()
339 mod_timer(&l1->l1_timer, dch_l2l1()
341 spin_unlock_irqrestore(&l1->lock, dch_l2l1()
343 } else if (l1->l1_state == 7) dch_l2l1()
344 l1->d_if.ifc.l1l2(&l1->d_if.ifc, dch_l2l1()
349 if (l1->l1_state != 3) { dch_l2l1()
350 spin_lock_irqsave(&l1->lock, dch_l2l1()
352 Write_hfc8(l1->hw, R_ST_SEL, dch_l2l1()
353 l1->st_num); dch_l2l1()
354 Write_hfc8(l1->hw, A_ST_WR_STA, dch_l2l1()
356 spin_unlock_irqrestore(&l1->lock, dch_l2l1()
358 } else if (l1->l1_state == 3) dch_l2l1()
359 l1->d_if.ifc.l1l2(&l1->d_if.ifc, dch_l2l1()
372 if (!l1->enabled) dch_l2l1()
373 l1->d_if.ifc.l1l2(&l1->d_if.ifc, dch_l2l1()
384 struct hfc4s8s_l1 *l1 = bch->l1p; bch_l2l1() local
392 if (!l1->enabled || (bch->mode == L1_MODE_NULL)) { bch_l2l1()
396 spin_lock_irqsave(&l1->lock, flags); bch_l2l1()
399 l1->hw->mr.r_irq_fifo_blx[l1->st_num] |= bch_l2l1()
401 spin_unlock_irqrestore(&l1->lock, flags); bch_l2l1()
402 schedule_work(&l1->hw->tqueue); bch_l2l1()
404 spin_unlock_irqrestore(&l1->lock, flags); bch_l2l1()
409 if (!l1->enabled) bch_l2l1()
416 spin_lock_irqsave(&l1->lock, bch_l2l1()
418 l1->hw->mr.timer_usg_cnt++; bch_l2l1()
419 l1->hw->mr. bch_l2l1()
420 fifo_slow_timer_service[l1-> bch_l2l1()
425 Write_hfc8(l1->hw, R_FIFO, bch_l2l1()
426 (l1->st_num * 8 + bch_l2l1()
429 wait_busy(l1->hw); bch_l2l1()
430 Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */ bch_l2l1()
431 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */ bch_l2l1()
432 Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable TX interrupts for hdlc */ bch_l2l1()
433 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */ bch_l2l1()
434 wait_busy(l1->hw); bch_l2l1()
436 Write_hfc8(l1->hw, R_FIFO, bch_l2l1()
437 (l1->st_num * 8 + bch_l2l1()
440 wait_busy(l1->hw); bch_l2l1()
441 Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */ bch_l2l1()
442 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */ bch_l2l1()
443 Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable RX interrupts for hdlc */ bch_l2l1()
444 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */ bch_l2l1()
446 Write_hfc8(l1->hw, R_ST_SEL, bch_l2l1()
447 l1->st_num); bch_l2l1()
448 l1->hw->mr.r_ctrl0 |= bch_l2l1()
450 Write_hfc8(l1->hw, A_ST_CTRL0, bch_l2l1()
451 l1->hw->mr.r_ctrl0); bch_l2l1()
453 spin_unlock_irqrestore(&l1->lock, bch_l2l1()
463 spin_lock_irqsave(&l1->lock, bch_l2l1()
465 l1->hw->mr. bch_l2l1()
466 fifo_rx_trans_enables[l1-> bch_l2l1()
471 l1->hw->mr.timer_usg_cnt++; bch_l2l1()
472 Write_hfc8(l1->hw, R_FIFO, bch_l2l1()
473 (l1->st_num * 8 + bch_l2l1()
476 wait_busy(l1->hw); bch_l2l1()
477 Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */ bch_l2l1()
478 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */ bch_l2l1()
479 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */ bch_l2l1()
480 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */ bch_l2l1()
481 wait_busy(l1->hw); bch_l2l1()
483 Write_hfc8(l1->hw, R_FIFO, bch_l2l1()
484 (l1->st_num * 8 + bch_l2l1()
487 wait_busy(l1->hw); bch_l2l1()
488 Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */ bch_l2l1()
489 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */ bch_l2l1()
490 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */ bch_l2l1()
491 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */ bch_l2l1()
493 Write_hfc8(l1->hw, R_ST_SEL, bch_l2l1()
494 l1->st_num); bch_l2l1()
495 l1->hw->mr.r_ctrl0 |= bch_l2l1()
497 Write_hfc8(l1->hw, A_ST_CTRL0, bch_l2l1()
498 l1->hw->mr.r_ctrl0); bch_l2l1()
500 spin_unlock_irqrestore(&l1->lock, bch_l2l1()
512 spin_lock_irqsave(&l1->lock, bch_l2l1()
514 l1->hw->mr. bch_l2l1()
515 fifo_slow_timer_service[l1-> bch_l2l1()
520 l1->hw->mr. bch_l2l1()
521 fifo_rx_trans_enables[l1-> bch_l2l1()
526 l1->hw->mr.timer_usg_cnt--; bch_l2l1()
527 Write_hfc8(l1->hw, R_FIFO, bch_l2l1()
528 (l1->st_num * 8 + bch_l2l1()
531 wait_busy(l1->hw); bch_l2l1()
532 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */ bch_l2l1()
533 wait_busy(l1->hw); bch_l2l1()
534 Write_hfc8(l1->hw, R_FIFO, bch_l2l1()
535 (l1->st_num * 8 + bch_l2l1()
538 wait_busy(l1->hw); bch_l2l1()
539 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */ bch_l2l1()
540 Write_hfc8(l1->hw, R_ST_SEL, bch_l2l1()
541 l1->st_num); bch_l2l1()
542 l1->hw->mr.r_ctrl0 &= bch_l2l1()
544 Write_hfc8(l1->hw, A_ST_CTRL0, bch_l2l1()
545 l1->hw->mr.r_ctrl0); bch_l2l1()
546 spin_unlock_irqrestore(&l1->lock, bch_l2l1()
570 if (l1->hw->mr.timer_usg_cnt) { bch_l2l1()
571 Write_hfc8(l1->hw, R_IRQMSK_MISC, bch_l2l1()
574 Write_hfc8(l1->hw, R_IRQMSK_MISC, 0); bch_l2l1()
585 if (!l1->enabled) bch_l2l1()
594 hfc_l1_timer(struct hfc4s8s_l1 *l1) hfc_l1_timer() argument
598 if (!l1->enabled) hfc_l1_timer()
601 spin_lock_irqsave(&l1->lock, flags); hfc_l1_timer()
602 if (l1->nt_mode) { hfc_l1_timer()
603 l1->l1_state = 1; hfc_l1_timer()
604 Write_hfc8(l1->hw, R_ST_SEL, l1->st_num); hfc_l1_timer()
605 Write_hfc8(l1->hw, A_ST_WR_STA, 0x11); hfc_l1_timer()
606 spin_unlock_irqrestore(&l1->lock, flags); hfc_l1_timer()
607 l1->d_if.ifc.l1l2(&l1->d_if.ifc, hfc_l1_timer()
609 spin_lock_irqsave(&l1->lock, flags); hfc_l1_timer()
610 l1->l1_state = 1; hfc_l1_timer()
611 Write_hfc8(l1->hw, A_ST_WR_STA, 0x1); hfc_l1_timer()
612 spin_unlock_irqrestore(&l1->lock, flags); hfc_l1_timer()
615 Write_hfc8(l1->hw, R_ST_SEL, l1->st_num); hfc_l1_timer()
616 Write_hfc8(l1->hw, A_ST_WR_STA, 0x13); hfc_l1_timer()
617 spin_unlock_irqrestore(&l1->lock, flags); hfc_l1_timer()
618 l1->d_if.ifc.l1l2(&l1->d_if.ifc, hfc_l1_timer()
620 spin_lock_irqsave(&l1->lock, flags); hfc_l1_timer()
621 Write_hfc8(l1->hw, R_ST_SEL, l1->st_num); hfc_l1_timer()
622 Write_hfc8(l1->hw, A_ST_WR_STA, 0x3); hfc_l1_timer()
623 spin_unlock_irqrestore(&l1->lock, flags); hfc_l1_timer()
741 struct hfc4s8s_l1 *l1 = bch->l1p; rx_b_frame() local
744 if (!l1->enabled || (bch->mode == L1_MODE_NULL)) rx_b_frame()
749 Write_hfc8(l1->hw, R_FIFO, rx_b_frame()
750 (l1->st_num * 8 + ((bch->bchan == 1) ? 1 : 3))); rx_b_frame()
751 wait_busy(l1->hw); rx_b_frame()
754 f1 = Read_hfc8_stable(l1->hw, A_F1); rx_b_frame()
755 f2 = Read_hfc8(l1->hw, A_F2); rx_b_frame()
759 z1 = Read_hfc16_stable(l1->hw, A_Z1); rx_b_frame()
760 z2 = Read_hfc16(l1->hw, A_Z2); rx_b_frame()
794 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */ rx_b_frame()
795 wait_busy(l1->hw); rx_b_frame()
798 SetRegAddr(l1->hw, A_FIFO_DATA0); rx_b_frame()
802 fRead_hfc32(l1->hw); rx_b_frame()
808 *(bch->rx_ptr++) = fRead_hfc8(l1->hw); rx_b_frame()
812 Write_hfc8(l1->hw, A_INC_RES_FIFO, 1); rx_b_frame()
813 wait_busy(l1->hw); rx_b_frame()
895 struct hfc4s8s_l1 *l1 = bch->l1p; tx_b_frame() local
900 if (!l1->enabled || (bch->mode == L1_MODE_NULL)) tx_b_frame()
904 Write_hfc8(l1->hw, R_FIFO, tx_b_frame()
905 (l1->st_num * 8 + ((bch->bchan == 1) ? 0 : 2))); tx_b_frame()
906 wait_busy(l1->hw); tx_b_frame()
910 hdlc_num = Read_hfc8(l1->hw, A_F1) & MAX_F_CNT; tx_b_frame()
912 (Read_hfc8_stable(l1->hw, A_F2) & MAX_F_CNT); tx_b_frame()
922 l1->hw->mr.fifo_slow_timer_service[l1-> tx_b_frame()
932 l1->hw->mr.fifo_slow_timer_service[l1->st_num] |= tx_b_frame()
935 l1->hw->mr.fifo_slow_timer_service[l1->st_num] &= tx_b_frame()
938 max = Read_hfc16_stable(l1->hw, A_Z2); tx_b_frame()
939 max -= Read_hfc16(l1->hw, A_Z1); tx_b_frame()
953 SetRegAddr(l1->hw, A_FIFO_DATA0); tx_b_frame()
955 fWrite_hfc32(l1->hw, *(unsigned long *) cp); tx_b_frame()
961 fWrite_hfc8(l1->hw, *cp++); tx_b_frame()
966 Write_hfc8(l1->hw, A_INC_RES_FIFO, 1); tx_b_frame()
974 Write_hfc8(l1->hw, R_FIFO, tx_b_frame()
975 (l1->st_num * 8 + tx_b_frame()
977 wait_busy(l1->hw); tx_b_frame()
999 l1p = hw->l1; hfc4s8s_bh()
1002 /* reset l1 event */ hfc4s8s_bh()
1044 "HFC-4S/8S: NT ch %d l1 state %d -> %d\n", hfc4s8s_bh()
1093 "HFC-4S/8S: TE %d ch %d l1 state %d -> %d\n", hfc4s8s_bh()
1107 l1p = hw->l1; hfc4s8s_bh()
1292 hw->l1[i].enabled = 1; hfc_hardware_enable()
1293 hw->l1[i].nt_mode = nt_mode; hfc_hardware_enable()
1327 (&hw->l1[i].d_if, hw->l1[i].b_table, if_name, hfc_hardware_enable()
1330 hw->l1[i].enabled = 0; hfc_hardware_enable()
1352 hw->l1[i].enabled = 0; hfc_hardware_enable()
1353 hisax_unregister(&hw->l1[i].d_if); hfc_hardware_enable()
1354 del_timer(&hw->l1[i].l1_timer); hfc_hardware_enable()
1355 skb_queue_purge(&hw->l1[i].d_tx_queue); hfc_hardware_enable()
1356 skb_queue_purge(&hw->l1[i].b_ch[0].tx_queue); hfc_hardware_enable()
1357 skb_queue_purge(&hw->l1[i].b_ch[1].tx_queue); hfc_hardware_enable()
1396 l1p = hw->l1 + i; setup_instance()
1404 l1p->d_if.ifc.priv = hw->l1 + i; setup_instance()
1410 l1p->b_ch[0].l1p = hw->l1 + i; setup_instance()
1418 l1p->b_ch[1].l1p = hw->l1 + i; setup_instance()
H A Disdnl1.c146 struct IsdnCardState *cs = st->l1.hardware; l1m_debug()
162 if (test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags)) L1activated()
163 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); L1activated()
165 st->l1.l1l2(st, PH_ACTIVATE | INDICATION, NULL); L1activated()
178 st->l1.l1l2(st, PH_PAUSE | CONFIRM, NULL); L1deactivated()
179 st->l1.l1l2(st, PH_DEACTIVATE | INDICATION, NULL); L1deactivated()
195 if (test_and_clear_bit(FLG_L1_PULL_REQ, &stptr->l1.Flags)) { DChannel_proc_xmt()
196 stptr->l1.l1l2(stptr, PH_PULL | CONFIRM, NULL); DChannel_proc_xmt()
211 if (test_bit(FLG_L1_ACTTIMER, &stptr->l1.Flags)) DChannel_proc_rcv()
212 FsmEvent(&stptr->l1.l1m, EV_TIMER_ACT, NULL); DChannel_proc_rcv()
239 stptr->l1.l1l2(stptr, PH_DATA | INDICATION, nskb); DChannel_proc_rcv()
247 stptr->l1.l1tei(stptr, PH_DATA | INDICATION, nskb); DChannel_proc_rcv()
258 stptr->l1.l1l2(stptr, PH_DATA | INDICATION, skb); DChannel_proc_rcv()
280 if (test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags)) BChannel_proc_xmt()
281 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); BChannel_proc_xmt()
295 if (bcs->st->l1.l1m.state == ST_L1_WAIT_ACT) { BChannel_proc_rcv()
296 FsmDelTimer(&bcs->st->l1.timer, 4); BChannel_proc_rcv()
297 FsmEvent(&bcs->st->l1.l1m, EV_TIMER_ACT, NULL); BChannel_proc_rcv()
300 bcs->st->l1.l1l2(bcs->st, PH_DATA | INDICATION, skb); BChannel_proc_rcv()
347 FsmDelTimer(&st->l1.timer, 0); HiSax_rmlist()
469 if (test_bit(FLG_L1_ACTIVATING, &st->l1.Flags)) l1_deact_cnf()
470 st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL); l1_deact_cnf()
479 FsmRestartTimer(&st->l1.timer, 550, EV_TIMER_DEACT, NULL, 2); l1_deact_req_s()
480 test_and_set_bit(FLG_L1_DEACTTIMER, &st->l1.Flags); l1_deact_req_s()
488 if (test_bit(FLG_L1_ACTIVATING, &st->l1.Flags)) { l1_power_up_s()
490 st->l1.l1hw(st, HW_INFO3 | REQUEST, NULL); l1_power_up_s()
491 FsmRestartTimer(&st->l1.timer, TIMER3_VALUE, EV_TIMER3, NULL, 2); l1_power_up_s()
492 test_and_set_bit(FLG_L1_T3RUN, &st->l1.Flags); l1_power_up_s()
515 if (test_bit(FLG_L1_UINT, &st->l1.Flags)) l1_info2_ind()
520 st->l1.l1hw(st, HW_INFO3 | REQUEST, NULL); l1_info2_ind()
529 if (test_bit(FLG_L1_UINT, &st->l1.Flags)) l1_info4_ind()
534 st->l1.l1hw(st, HW_INFO3 | REQUEST, NULL); l1_info4_ind()
535 if (test_and_clear_bit(FLG_L1_DEACTTIMER, &st->l1.Flags)) l1_info4_ind()
536 FsmDelTimer(&st->l1.timer, 4); l1_info4_ind()
537 if (!test_bit(FLG_L1_ACTIVATED, &st->l1.Flags)) { l1_info4_ind()
538 if (test_and_clear_bit(FLG_L1_T3RUN, &st->l1.Flags)) l1_info4_ind()
539 FsmDelTimer(&st->l1.timer, 3); l1_info4_ind()
540 FsmRestartTimer(&st->l1.timer, 110, EV_TIMER_ACT, NULL, 2); l1_info4_ind()
541 test_and_set_bit(FLG_L1_ACTTIMER, &st->l1.Flags); l1_info4_ind()
550 test_and_clear_bit(FLG_L1_T3RUN, &st->l1.Flags); l1_timer3()
551 if (test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags)) l1_timer3()
552 L1deactivated(st->l1.hardware); l1_timer3()
555 if (!test_bit(FLG_L1_UINT, &st->l1.Flags)) l1_timer3()
557 if (st->l1.l1m.state != ST_L1_F6) { l1_timer3()
559 st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL); l1_timer3()
568 test_and_clear_bit(FLG_L1_ACTTIMER, &st->l1.Flags); l1_timer_act()
569 test_and_set_bit(FLG_L1_ACTIVATED, &st->l1.Flags); l1_timer_act()
570 L1activated(st->l1.hardware); l1_timer_act()
578 test_and_clear_bit(FLG_L1_DEACTTIMER, &st->l1.Flags); l1_timer_deact()
579 test_and_clear_bit(FLG_L1_ACTIVATED, &st->l1.Flags); l1_timer_deact()
580 L1deactivated(st->l1.hardware); l1_timer_deact()
581 st->l1.l1hw(st, HW_DEACTIVATE | RESPONSE, NULL); l1_timer_deact()
589 st->l1.l1hw(st, HW_RESET | REQUEST, NULL); l1_activate_s()
597 if ((!test_bit(FLG_L1_DEACTTIMER, &st->l1.Flags)) && (!test_bit(FLG_L1_T3RUN, &st->l1.Flags))) { l1_activate_no()
598 test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags); l1_activate_no()
599 L1deactivated(st->l1.hardware); l1_activate_no()
658 FsmRestartTimer(&st->l1.timer, 550, EV_TIMER_DEACT, NULL, 2); l1_deact_req_u()
659 test_and_set_bit(FLG_L1_DEACTTIMER, &st->l1.Flags); l1_deact_req_u()
660 st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL); l1_deact_req_u()
668 FsmRestartTimer(&st->l1.timer, TIMER3_VALUE, EV_TIMER3, NULL, 2); l1_power_up_u()
669 test_and_set_bit(FLG_L1_T3RUN, &st->l1.Flags); l1_power_up_u()
683 st->l1.l1hw(st, HW_INFO1 | REQUEST, NULL); l1_activate_u()
716 FsmRestartTimer(&st->l1.timer, st->l1.delay, EV_TIMER_ACT, NULL, 2); l1b_activate()
725 FsmRestartTimer(&st->l1.timer, 10, EV_TIMER_DEACT, NULL, 2); l1b_deactivate()
734 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); l1b_timer_act()
803 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; dch_l2l1()
809 st->l1.l1hw(st, pr, arg); dch_l2l1()
814 st->l1.l1m.fsm->strState[st->l1.l1m.state]); dch_l2l1()
815 if (test_bit(FLG_L1_ACTIVATED, &st->l1.Flags)) dch_l2l1()
816 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); dch_l2l1()
818 test_and_set_bit(FLG_L1_ACTIVATING, &st->l1.Flags); dch_l2l1()
819 FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, arg); dch_l2l1()
829 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg); dch_l2l1()
847 FsmEvent(&st->l1.l1m, EV_RESET_IND, arg); l1_msg()
850 FsmEvent(&st->l1.l1m, EV_DEACT_CNF, arg); l1_msg()
853 FsmEvent(&st->l1.l1m, EV_DEACT_IND, arg); l1_msg()
856 FsmEvent(&st->l1.l1m, EV_POWER_UP, arg); l1_msg()
859 FsmEvent(&st->l1.l1m, EV_RSYNC_IND, arg); l1_msg()
862 FsmEvent(&st->l1.l1m, EV_INFO2_IND, arg); l1_msg()
866 FsmEvent(&st->l1.l1m, EV_INFO4_IND, arg); l1_msg()
881 FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, NULL); l1_msg_b()
884 FsmEvent(&st->l1.l1m, EV_PH_DEACTIVATE, NULL); l1_msg_b()
892 st->l1.hardware = cs; setstack_HiSax()
894 st->l1.l1m.fsm = &l1fsm_s; setstack_HiSax()
895 st->l1.l1m.state = ST_L1_F3; setstack_HiSax()
896 st->l1.Flags = 0; setstack_HiSax()
899 st->l1.l1m.fsm = &l1fsm_u; setstack_HiSax()
900 st->l1.l1m.state = ST_L1_RESET; setstack_HiSax()
901 st->l1.Flags = FLG_L1_UINT; setstack_HiSax()
904 st->l1.l1m.debug = cs->debug; setstack_HiSax()
905 st->l1.l1m.userdata = st; setstack_HiSax()
906 st->l1.l1m.userint = 0; setstack_HiSax()
907 st->l1.l1m.printdebug = l1m_debug; setstack_HiSax()
908 FsmInitTimer(&st->l1.l1m, &st->l1.timer); setstack_HiSax()
911 st->l1.stlistp = &(cs->stlist); setstack_HiSax()
920 struct IsdnCardState *cs = st->l1.hardware; setstack_l1_B()
922 st->l1.l1m.fsm = &l1fsm_b; setstack_l1_B()
923 st->l1.l1m.state = ST_L1_NULL; setstack_l1_B()
924 st->l1.l1m.debug = cs->debug; setstack_l1_B()
925 st->l1.l1m.userdata = st; setstack_l1_B()
926 st->l1.l1m.userint = 0; setstack_l1_B()
927 st->l1.l1m.printdebug = l1m_debug; setstack_l1_B()
928 st->l1.Flags = 0; setstack_l1_B()
929 FsmInitTimer(&st->l1.l1m, &st->l1.timer); setstack_l1_B()
H A Dhscx.c98 struct BCState *bcs = st->l1.bcs; hscx_l2l1()
129 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hscx_l2l1()
130 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hscx_l2l1()
132 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hscx_l2l1()
137 modehscx(bcs, st->l1.mode, st->l1.bc); hscx_l2l1()
148 modehscx(bcs, 0, st->l1.bc); hscx_l2l1()
150 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); hscx_l2l1()
206 bcs->channel = st->l1.bc; setstack_hscx()
207 if (open_hscxstate(st->l1.hardware, bcs)) setstack_hscx()
209 st->l1.bcs = bcs; setstack_hscx()
H A Djade.c133 struct BCState *bcs = st->l1.bcs; jade_l2l1()
164 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); jade_l2l1()
165 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); jade_l2l1()
167 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); jade_l2l1()
172 modejade(bcs, st->l1.mode, st->l1.bc); jade_l2l1()
183 modejade(bcs, 0, st->l1.bc); jade_l2l1()
185 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); jade_l2l1()
242 bcs->channel = st->l1.bc; setstack_jade()
243 if (open_jadestate(st->l1.hardware, bcs)) setstack_jade()
245 st->l1.bcs = bcs; setstack_jade()
H A Disdnl3.h26 #define l3_debug(st, fmt, args...) HiSax_putstatus(st->l1.hardware, "l3 ", fmt, ## args)
H A Dlmgr.c36 HiSax_putstatus(st->l1.hardware, "manager: MDL_ERROR", hisax_manager()
H A Dtei.c90 struct PStack *ptr = *(st->l1.stlistp); findtei()
170 cs = (struct IsdnCardState *) st->l1.hardware; tei_id_assign()
244 cs = (struct IsdnCardState *) st->l1.hardware; tei_id_remove()
280 cs = (struct IsdnCardState *) st->l1.hardware; tei_id_req_tout()
303 cs = (struct IsdnCardState *) st->l1.hardware; tei_id_ver_tout()
376 cs = (struct IsdnCardState *) st->l1.hardware; tei_l2tei()
400 VHiSax_putstatus(st->l1.hardware, "tei ", fmt, args); tei_debug()
409 st->l1.l1tei = tei_l1l2; setstack_tei()
H A Dw6692.c114 stptr->l1.l1l2(stptr, PH_PAUSE | CONFIRM, NULL); W6692_bh()
561 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; W6692_l1hw()
618 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); W6692_l1hw()
619 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); W6692_l1hw()
621 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); W6692_l1hw()
675 st->l1.l1hw = W6692_l1hw; setstack_W6692()
701 stptr->l1.l1l2(stptr, PH_PAUSE | INDICATION, NULL); dbusy_timer_handler()
759 struct BCState *bcs = st->l1.bcs; W6692_l2l1()
789 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); W6692_l2l1()
790 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); W6692_l2l1()
792 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); W6692_l2l1()
797 W6692Bmode(bcs, st->l1.mode, st->l1.bc); W6692_l2l1()
808 W6692Bmode(bcs, 0, st->l1.bc); W6692_l2l1()
810 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); W6692_l2l1()
866 bcs->channel = st->l1.bc; setstack_w6692()
867 if (open_w6692state(st->l1.hardware, bcs)) setstack_w6692()
869 st->l1.bcs = bcs; setstack_w6692()
H A Dcallc.c878 struct IsdnCardState *cs = st->l1.hardware; selectfreechannel()
927 struct IsdnCardState *cs = st->l1.hardware; dchan_l3l4()
1019 (*stp)->l1.l1l2 = dummy_pstack; init_PStack()
1020 (*stp)->l1.l1hw = dummy_pstack; init_PStack()
1021 (*stp)->l1.l1tei = dummy_pstack; init_PStack()
1100 chanp->b_st->l1.delay = DEFAULT_B_DELAY; init_chan()
1155 HiSax_rmlist(st->l1.hardware, st); release_d_st()
1269 st->l1.hardware = cs; init_b_st()
1271 st->l1.bc = chanp->chan & 1; init_b_st()
1273 st->l1.bc = chanp->proc->para.bchannel - 1; init_b_st()
1277 st->l1.mode = L1_MODE_HDLC; init_b_st()
1280 st->l1.mode = L1_MODE_HDLC_56K; init_b_st()
1283 st->l1.mode = L1_MODE_TRANS; init_b_st()
1286 st->l1.mode = L1_MODE_V32; init_b_st()
1289 st->l1.mode = L1_MODE_FAX; init_b_st()
1322 st->l1.l1l2 = lltrans_handler; init_b_st()
1408 chanp[i].d_st->l1.l1m.debug = debugflags & 0x1000; distr_debug()
1409 chanp[i].b_st->l1.l1m.debug = debugflags & 0x2000; distr_debug()
1599 csta->channel[0].b_st->l1.delay = num; HiSax_command()
1600 csta->channel[1].b_st->l1.delay = num; HiSax_command()
1620 chanp->d_st->l1.l1l2 = leased_l1l2; HiSax_command()
1675 HiSax_putstatus(cards[0].cs, "l1 debugging ", HiSax_command()
1678 printk(KERN_DEBUG "HiSax: l1 debugging flags card %d set to %x\n", HiSax_command()
H A Dhfc_2bs0.c455 struct BCState *bcs = st->l1.bcs; hfc_l2l1()
484 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hfc_l2l1()
485 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hfc_l2l1()
487 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hfc_l2l1()
492 mode_hfc(bcs, st->l1.mode, st->l1.bc); hfc_l2l1()
503 mode_hfc(bcs, 0, st->l1.bc); hfc_l2l1()
505 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); hfc_l2l1()
544 bcs->channel = st->l1.bc; setstack_hfc()
545 if (open_hfcstate(st->l1.hardware, bcs)) setstack_hfc()
547 st->l1.bcs = bcs; setstack_hfc()
H A Dipacx.c97 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; dch_l2l1()
142 clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); dch_l2l1()
143 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); dch_l2l1()
145 set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); dch_l2l1()
214 st->l1.l1l2(st, PH_PAUSE | INDICATION, NULL); // flow control on dbusy_timer_handler()
415 st->l1.l1hw = dch_l2l1; dch_setstack()
448 struct BCState *bcs = st->l1.bcs; bch_l2l1()
479 clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); bch_l2l1()
480 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); bch_l2l1()
482 set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); bch_l2l1()
487 bch_mode(bcs, st->l1.mode, st->l1.bc); bch_l2l1()
498 bch_mode(bcs, 0, st->l1.bc); bch_l2l1()
500 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); bch_l2l1()
815 bcs->channel = st->l1.bc; bch_setstack()
816 if (bch_open_state(st->l1.hardware, bcs)) return (-1); bch_setstack()
817 st->l1.bcs = bcs; bch_setstack()
H A Dhfc_sx.c557 /* D-channel l1 state call for leased NT-mode */
562 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; dch_nt_l2l1()
568 st->l1.l1hw(st, pr, arg); dch_nt_l2l1()
571 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); dch_nt_l2l1()
580 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg); dch_nt_l2l1()
873 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; HFCSX_l1hw()
938 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); HFCSX_l1hw()
939 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); HFCSX_l1hw()
941 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); HFCSX_l1hw()
1004 /* called during init setting l1 stack pointer */
1009 st->l1.l1hw = HFCSX_l1hw; setstack_hfcsx()
1143 struct BCState *bcs = st->l1.bcs; hfcsx_l2l1()
1173 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hfcsx_l2l1()
1174 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hfcsx_l2l1()
1176 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hfcsx_l2l1()
1181 mode_hfcsx(bcs, st->l1.mode, st->l1.bc); hfcsx_l2l1()
1192 mode_hfcsx(bcs, 0, st->l1.bc); hfcsx_l2l1()
1194 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); hfcsx_l2l1()
1240 bcs->channel = st->l1.bc; setstack_2b()
1241 if (open_hfcsxstate(st->l1.hardware, bcs)) setstack_2b()
1243 st->l1.bcs = bcs; setstack_2b()
H A Dhfc_2bds0.c455 struct BCState *bcs = st->l1.bcs; hfc_l2l1()
484 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hfc_l2l1()
485 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hfc_l2l1()
487 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hfc_l2l1()
492 mode_2bs0(bcs, st->l1.mode, st->l1.bc); hfc_l2l1()
503 mode_2bs0(bcs, 0, st->l1.bc); hfc_l2l1()
505 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); hfc_l2l1()
542 bcs->channel = st->l1.bc; setstack_2b()
543 if (open_hfcstate(st->l1.hardware, bcs)) setstack_2b()
545 st->l1.bcs = bcs; setstack_2b()
905 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; HFCD_l1hw()
970 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); HFCD_l1hw()
971 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); HFCD_l1hw()
973 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); HFCD_l1hw()
1013 st->l1.l1hw = HFCD_l1hw; setstack_hfcd()
H A Dconfig.c1668 st->l1.l1l2(st, pr, NULL); hisax_bh()
1719 if (test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags)) { hisax_d_l1l2()
1720 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hisax_d_l1l2()
1745 st->l1.l1l2(st, pr, NULL); hisax_b_l1l2()
1748 st->l1.l1l2(st, pr, NULL); hisax_b_l1l2()
1772 if (test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags)) { hisax_b_l1l2()
1773 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hisax_b_l1l2()
1784 struct IsdnCardState *cs = st->l1.hardware; hisax_d_l2l1()
1804 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hisax_d_l2l1()
1806 set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hisax_d_l2l1()
1821 struct BCState *bcs = st->l1.bcs; hisax_b_l2l1()
1826 B_L2L1(b_if, pr, (void *)(unsigned long)st->l1.mode); hisax_b_l2l1()
1839 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hisax_b_l2l1()
1841 set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hisax_b_l2l1()
1854 struct IsdnCardState *cs = st->l1.hardware; hisax_bc_setstack()
1857 bcs->channel = st->l1.bc; hisax_bc_setstack()
1859 bcs->hw.b_if = hisax_d_if->b_if[st->l1.bc]; hisax_bc_setstack()
1860 hisax_d_if->b_if[st->l1.bc]->bcs = bcs; hisax_bc_setstack()
1862 st->l1.bcs = bcs; hisax_bc_setstack()
H A Dnetjet.c795 struct BCState *bcs = st->l1.bcs; tiger_l2l1()
822 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); tiger_l2l1()
823 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); tiger_l2l1()
825 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); tiger_l2l1()
830 mode_tiger(bcs, st->l1.mode, st->l1.bc); tiger_l2l1()
833 bcs->cs->cardmsg(bcs->cs, MDL_BC_ASSIGN, (void *)(&st->l1.bc)); tiger_l2l1()
838 bcs->cs->cardmsg(bcs->cs, MDL_BC_RELEASE, (void *)(&st->l1.bc)); tiger_l2l1()
845 mode_tiger(bcs, 0, st->l1.bc); tiger_l2l1()
847 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); tiger_l2l1()
900 bcs->channel = st->l1.bc; setstack_tiger()
901 if (open_tigerstate(st->l1.hardware, bcs)) setstack_tiger()
903 st->l1.bcs = bcs; setstack_tiger()
H A Delsa_ser.c550 struct BCState *bcs = st->l1.bcs; modem_l2l1()
567 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); modem_l2l1()
568 set_arcofi(bcs->cs, st->l1.bc); modem_l2l1()
574 bcs->cs->dc.isac.arcofi_bc = st->l1.bc; modem_l2l1()
588 bcs->channel = st->l1.bc; setstack_elsa()
589 switch (st->l1.mode) { setstack_elsa()
592 if (open_hscxstate(st->l1.hardware, bcs)) setstack_elsa()
612 st->l1.bcs = bcs; setstack_elsa()
H A Dhfc_pci.c731 /* D-channel l1 state call for leased NT-mode */
736 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; dch_nt_l2l1()
742 st->l1.l1hw(st, pr, arg); dch_nt_l2l1()
745 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); dch_nt_l2l1()
754 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg); dch_nt_l2l1()
1109 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; HFCPCI_l1hw()
1173 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); HFCPCI_l1hw()
1174 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); HFCPCI_l1hw()
1176 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); HFCPCI_l1hw()
1241 /* called during init setting l1 stack pointer */
1246 st->l1.l1hw = HFCPCI_l1hw; setstack_hfcpci()
1391 struct BCState *bcs = st->l1.bcs; hfcpci_l2l1()
1421 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hfcpci_l2l1()
1422 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hfcpci_l2l1()
1424 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hfcpci_l2l1()
1429 mode_hfcpci(bcs, st->l1.mode, st->l1.bc); hfcpci_l2l1()
1440 mode_hfcpci(bcs, 0, st->l1.bc); hfcpci_l2l1()
1442 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); hfcpci_l2l1()
1488 bcs->channel = st->l1.bc; setstack_2b()
1489 if (open_hfcpcistate(st->l1.hardware, bcs)) setstack_2b()
1491 st->l1.bcs = bcs; setstack_2b()
H A Davm_pci.c484 struct BCState *bcs = st->l1.bcs; hdlc_l2l1()
515 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hdlc_l2l1()
516 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); hdlc_l2l1()
518 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); hdlc_l2l1()
523 modehdlc(bcs, st->l1.mode, st->l1.bc); hdlc_l2l1()
534 modehdlc(bcs, 0, st->l1.bc); hdlc_l2l1()
536 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); hdlc_l2l1()
591 bcs->channel = st->l1.bc; setstack_hdlc()
592 if (open_hdlcstate(st->l1.hardware, bcs)) setstack_hdlc()
594 st->l1.bcs = bcs; setstack_hdlc()
H A Damd7930_fn.c247 stptr->l1.l1l2(stptr, PH_PAUSE | CONFIRM, NULL); Amd7930_bh()
560 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; Amd7930_l1hw()
621 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); Amd7930_l1hw()
622 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); Amd7930_l1hw()
624 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); Amd7930_l1hw()
676 st->l1.l1hw = Amd7930_l1hw; setstack_Amd7930()
716 stptr->l1.l1l2(stptr, PH_PAUSE | INDICATION, NULL); dbusy_timer_handler()
H A Dicc.c92 stptr->l1.l1l2(stptr, PH_PAUSE | CONFIRM, NULL); icc_bh()
437 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; ICC_l1hw()
494 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); ICC_l1hw()
495 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); ICC_l1hw()
497 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); ICC_l1hw()
571 st->l1.l1hw = ICC_l1hw; setstack_icc()
598 stptr->l1.l1l2(stptr, PH_PAUSE | INDICATION, NULL); dbusy_timer_handler()
H A Disac.c95 stptr->l1.l1l2(stptr, PH_PAUSE | CONFIRM, NULL); isac_bh()
440 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; ISAC_l1hw()
496 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); ISAC_l1hw()
497 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); ISAC_l1hw()
499 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); ISAC_l1hw()
569 st->l1.l1hw = ISAC_l1hw; setstack_isac()
597 stptr->l1.l1l2(stptr, PH_PAUSE | INDICATION, NULL); dbusy_timer_handler()
H A Disar.c1593 struct BCState *bcs = st->l1.bcs; isar_l2l1()
1629 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); isar_l2l1()
1630 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); isar_l2l1()
1632 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); isar_l2l1()
1642 switch (st->l1.mode) { isar_l2l1()
1645 ret = modeisar(bcs, st->l1.mode, st->l1.bc); isar_l2l1()
1654 ret = modeisar(bcs, st->l1.mode, st->l1.bc); isar_l2l1()
1669 switch (st->l1.mode) { isar_l2l1()
1682 modeisar(bcs, 0, st->l1.bc); isar_l2l1()
1684 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); isar_l2l1()
1734 bcs->channel = st->l1.bc; setstack_isar()
1735 if (open_isarstate(st->l1.hardware, bcs)) setstack_isar()
1737 st->l1.bcs = bcs; setstack_isar()
H A Dst5481_init.c23 * merge l1 state machines?
H A Disdnl2.c222 st->l1.bcs->tx_cnt += skb->len; enqueue_super()
953 st->l1.bcs->tx_cnt += l2->windowar[p1]->len + l2headersize(l2, 0); invoke_retransmission()
1032 st->l1.bcs->tx_cnt += skb->len + l2headersize(&st->l2, 0); l2_feed_i_if_reest()
1046 st->l1.bcs->tx_cnt += skb->len + l2headersize(&st->l2, 0); l2_feed_i_pull()
1058 st->l1.bcs->tx_cnt += skb->len + l2headersize(&st->l2, 0); l2_feed_iqueue()
1770 VHiSax_putstatus(st->l1.hardware, st->l2.debug_id, fmt, args); l2m_debug()
1778 st->l1.l1l2 = isdnl2_l1l2; setstack_isdnl2()
H A Disdnl3.c76 VHiSax_putstatus(st->l1.hardware, st->l3.debug_id, fmt, args); l3m_debug()
222 HiSax_putstatus(st->l1.hardware, "L3", "no D protocol"); no_l3_proto()
H A Dhfc_usb.h15 #define HFC_TIMER_T3 8000 /* timeout for l1 activation timer */
H A Dhfc_usb.c203 volatile __u8 l1_state; /* actual l1 state */
344 /* ISDN l1 timer T3 expires */
361 /* ISDN l1 timer T4 expires */
1015 if (hfc->l1_state == 7) { /* l1 already active */ hfc_usb_l2l1()
1032 /* start l1 activation */ hfc_usb_l2l1()
H A Dl3dss1.c139 cs = pc->st->l1.hardware; l3dss1_dummy_return_result()
172 cs = pc->st->l1.hardware; l3dss1_dummy_error_return()
206 cs = st->l1.hardware; l3dss1_dummy_invoke()
1941 cs = pc->st->l1.hardware; l3dss1_deliver_display()
2252 struct IsdnCardState *cs = pc->st->l1.hardware; l3dss1_io_timer()
H A Dl3ni1.c138 cs = pc->st->l1.hardware; l3ni1_dummy_return_result()
171 cs = pc->st->l1.hardware; l3ni1_dummy_error_return()
205 cs = st->l1.hardware; l3ni1_dummy_invoke()
1797 cs = pc->st->l1.hardware; l3ni1_deliver_display()
2112 struct IsdnCardState *cs = pc->st->l1.hardware; l3ni1_io_timer()
H A Dhisax.h321 struct Layer1 l1; member in struct:PStack
/linux-4.1.27/arch/c6x/include/uapi/asm/
H A Dswab.h14 asm("swap4 .l1 %0,%0\n" : "+a"(val)); __c6x_swab16()
20 asm("swap4 .l1 %0,%0\n" __c6x_swab32()
21 "swap2 .l1 %0,%0\n" __c6x_swab32()
29 "|| swap2 .l1 %P0,%p0\n" __c6x_swab64()
30 " swap4 .l1 %p0,%p0\n" __c6x_swab64()
31 " swap4 .l1 %P0,%P0\n" __c6x_swab64()
38 asm("swap2 .l1 %0,%0\n" : "+a"(val)); __c6x_swahw32()
44 asm("swap4 .l1 %0,%0\n" : "+a"(val)); __c6x_swahb32()
/linux-4.1.27/arch/c6x/include/asm/
H A Dchecksum.h19 "|| addu .l1 %3,%4,%0\n" csum_tcpudp_nofold()
20 "addu .l1 %2,%0,%0\n" csum_tcpudp_nofold()
24 "addu .l1 %1,%0,%0\n" csum_tcpudp_nofold()
25 "add .l1 %P0,%p0,%2\n" csum_tcpudp_nofold()
H A Ddelay.h25 " add .l1 -6,%0,%0\n" __delay()
26 " cmplt .l1 1,%0,%1\n" __delay()
/linux-4.1.27/arch/sparc/prom/
H A Dcif.S19 mov %g5, %l1
24 mov %l1, %g5
42 mov %o0, %l1
46 restore %l1, 0, %o0
/linux-4.1.27/arch/sparc/kernel/
H A Drtrap_64.S46 andn %l1, %o0, %l1
60 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
62 and %l1, %l4, %l4
64 andn %l1, %l4, %l1
70 rtrap_nmi: ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
72 and %l1, %l4, %l4
73 andn %l1, %l4, %l1
83 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
86 and %l1, %l4, %l4
87 andn %l1, %l4, %l1
107 andcc %l1, TSTATE_PRIV, %l3
136 andcc %l1, %o0, %g0
145 andcc %l1, %o0, %g0
195 andn %l1, TSTATE_SYSCALL, %l1
196 wrpr %l1, %g0, %tstate
209 sethi %hi(sparc64_kern_pri_nuc_bits), %l1
210 ldx [%l1 + %lo(sparc64_kern_pri_nuc_bits)], %l1
211 or %l0, %l1, %l0
221 rdpr %wstate, %l1
223 srl %l1, 3, %l1
226 wrpr %l1, %g0, %wstate
267 mov %g6, %l1
278 mov %l1, %g6
H A Dhvtramp.S55 mov 0, %l1
69 add %l1, 1, %l1
70 cmp %l1, %l2
H A Dentry.S61 * This code cannot touch registers %l0 %l1 and %l2
160 jmp %l1
435 ld [%l1], %l5
446 mov %l1, %o1
466 mov %l1, %o1
486 ld [%l1], %o1
498 ld [%l1], %o1
514 mov %l1, %o1
526 cmp %l1, %l5
530 cmp %l1, %l5
553 mov %l1, %o1
570 mov %l1, %o1
587 mov %l1, %o1
604 mov %l1, %o1
621 mov %l1, %o1
638 mov %l1, %o1
655 mov %l1, %o1
678 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
679 add %l1, 0x4, %l2
680 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
693 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
694 add %l1, 0x4, %l2
695 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
933 sethi %hi(sparc_do_fork), %l1
935 jmpl %l1 + %lo(sparc_do_fork), %g0
972 rd %psr, %l1
976 and %l1, PSR_CWP, %l1
977 or %l0, %l1, %l0
1029 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1030 add %l1, 0x4, %l2 /* npc = npc+4 */
1031 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1044 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1045 add %l1, 0x4, %l2 /* npc = npc+4 */
1046 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1054 add %l1, 0x4, %l2 /* npc = npc+4 */
1055 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
H A Dhead_64.S164 mov (1b - prom_peer_name), %l1
165 sub %l0, %l1, %l1
169 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "peer"
179 mov (1b - prom_root_node), %l1
180 sub %l0, %l1, %l1
181 stw %l4, [%l1]
183 mov (1b - prom_getprop_name), %l1
186 sub %l0, %l1, %l1
193 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "getprop"
207 mov (1b - prom_finddev_name), %l1
210 sub %l0, %l1, %l1
217 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "finddevice"
228 mov (1b - prom_getprop_name), %l1
231 sub %l0, %l1, %l1
236 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "getprop"
250 mov (1b - prom_callmethod_name), %l1
252 sub %l0, %l1, %l1
256 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "call-method"
275 ldx [%sp + 2047 + 128 + 0x40], %l1 ! translation mode
278 stw %l1, [%l4]
338 mov (1b - prom_finddev_name), %l1
340 sub %l0, %l1, %l1
344 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "finddevice"
355 mov (1b - prom_getprop_name), %l1
358 sub %l0, %l1, %l1
365 stx %l1, [%sp + 2047 + 128 + 0x00] ! service, "getprop"
747 rdpr %pil, %l1
842 wrpr %l1, 0x0, %pil
H A Dsyscalls.S120 ldx [%sp + PTREGS_OFF + PT_V9_G1], %l1
121 call %l1
237 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc
245 add %l1, 0x4, %l2 ! npc = npc+4
246 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
256 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1 ! pc = npc
268 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]
H A Dhead_32.S123 mov %o1, %l1 ! stash away debug_vec too
314 sll %g1, 0x8, %g1 ! make phys addr for l1 tbl
338 sll %g1, 0x8, %g1 ! make phys addr for l1 tbl
361 mov %l1, %o1 ! and debug_vec
372 add %g7, 0x1c, %l1
373 ld [%l1], %l0
383 ld [%l1], %l0 ! 'compatible' tells
404 ldub [%o2], %l1
405 cmp %l1, 'l'
410 ldub [%o2 + 0x4], %l1
412 cmp %l1, 'm'
414 cmp %l1, 's'
416 cmp %l1, 'd'
418 cmp %l1, 'e'
746 mov %o0, %l1
748 ld [%l1 + (sun4u_r1 - sun4u_a1)], %o1
749 add %l1, (sun4u_a2 - sun4u_a1), %o0
753 ld [%l1 + (sun4u_1 - sun4u_a1)], %o1
754 add %l1, (sun4u_a3 - sun4u_a1), %o0
759 add %l1, (sun4u_a4 - sun4u_a1), %o0
H A Dwinfixup.S57 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]
74 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]
H A Dprom_64.c531 of_getintprop_default(dp, "l1-dcache-size", fill_in_one_cpu()
534 of_getintprop_default(dp, "l1-dcache-line-size", fill_in_one_cpu()
537 of_getintprop_default(dp, "l1-icache-size", fill_in_one_cpu()
540 of_getintprop_default(dp, "l1-icache-line-size", fill_in_one_cpu()
H A Detrap_32.S20 #define t_pc l1 /* Set by caller */
70 * %l0 contains trap time %psr, %l1 and %l2 contain the
H A Detrap_64.S148 LOAD_PER_CPU_BASE(%g5, %g6, %g4, %g3, %l1)
H A Drtrap_32.S18 #define t_pc l1
H A Dprocess_64.c115 printk("l0: %08x l1: %08x l2: %08x l3: %08x " show_regwindow32()
155 printk("l0: %016lx l1: %016lx l2: %016lx l3: %016lx\n", show_regwindow()
H A Dwuf.S21 #define t_pc l1
H A Dwof.S34 #define t_pc l1 /* PC for trap return T */
/linux-4.1.27/arch/hexagon/include/asm/
H A Dmmu_context.h69 int l1; switch_mm() local
76 for (l1 = MIN_KERNEL_SEG; l1 <= max_kernel_seg; l1++) switch_mm()
77 next->pgd[l1] = init_mm.pgd[l1]; switch_mm()
/linux-4.1.27/arch/blackfin/kernel/
H A Dvmlinux.lds.S49 *(.l1.text)
73 *(.l1.bss)
76 *(.l1.bss.B)
95 *(.l1.data)
98 *(.l1.data.B)
174 *(.l1.text.head)
175 *(.l1.text)
190 *(.l1.data)
198 *(.l1.bss)
210 *(.l1.data.B)
215 *(.l1.bss.B)
H A Dentry.S16 .section .l1.text
H A Dmodule.c40 if (!strcmp(".l1.text", shname) || module_frob_arch_sections()
52 } else if (!strcmp(".l1.data", shname) || module_frob_arch_sections()
64 } else if (!strcmp(".l1.bss", shname) || module_frob_arch_sections()
75 } else if (!strcmp(".l1.data.B", shname)) { module_frob_arch_sections()
85 } else if (!strcmp(".l1.bss.B", shname)) { module_frob_arch_sections()
265 !strcmp(".rela.l1.text", shname) || module_finalize()
H A Dsignal.c67 RESTORE(l0); RESTORE(l1); RESTORE(l2); RESTORE(l3); rt_restore_sigcontext()
128 SETUP(l0); SETUP(l1); SETUP(l2); SETUP(l3); rt_setup_sigcontext()
H A Dkgdb.c45 gdb_regs[BFIN_L1] = regs->l1; pt_regs_to_gdb_regs()
121 regs->l1 = gdb_regs[BFIN_L1]; gdb_regs_to_pt_regs()
H A Dasm-offsets.c82 DEFINE(PT_L1, offsetof(struct pt_regs, l1)); main()
H A Dsetup.c198 * we know that everything about l1 text/data is nice and aligned, bfin_relocate_l1_mem()
H A Dtrace.c974 fp->b1, fp->l1, fp->m1, fp->i1); show_regs()
/linux-4.1.27/arch/c6x/lib/
H A Ddivremi.S23 || cmpgt .l1 0, A4, A1
28 [A1] neg .l1 A4, A4
37 neg .l1 A4, A4
44 sub .l1 A5, A6, A5
H A Dremi.S41 || cmpgt .l1 0, A4, A1
46 [A1] neg .l1 A4, A4
55 neg .l1 A4, A4
62 sub .l1 A5, A6, A4
H A Ddivi.S41 || cmpgt .l1 0, A4, A1
44 [A1] neg .l1 A4, A4
49 neg .l1 A4, A4
H A Ddivremu.S79 sub .l1 A1, A6, A6
83 || sub .l1 A6, 1, A6
84 or .l1 A2, A4, A4
H A Ddivu.S91 sub .l1 A1, A6, A6
94 || sub .l1 A6, 1, A6
95 or .l1 A2, A4, A4
/linux-4.1.27/arch/sparc/include/asm/
H A Dxor_32.h41 "xor %%g5, %%l1, %%g5\n\t" sparc_2()
54 "l0", "l1", "l2", "l3", "l4", "l5"); sparc_2()
80 "xor %%g5, %%l1, %%g5\n\t" sparc_3()
91 "xor %%g5, %%l1, %%g5\n\t" sparc_3()
104 "l0", "l1", "l2", "l3", "l4", "l5"); sparc_3()
131 "xor %%g5, %%l1, %%g5\n\t" sparc_4()
143 "xor %%g5, %%l1, %%g5\n\t" sparc_4()
154 "xor %%g5, %%l1, %%g5\n\t" sparc_4()
167 "l0", "l1", "l2", "l3", "l4", "l5"); sparc_4()
195 "xor %%g5, %%l1, %%g5\n\t" sparc_5()
207 "xor %%g5, %%l1, %%g5\n\t" sparc_5()
219 "xor %%g5, %%l1, %%g5\n\t" sparc_5()
230 "xor %%g5, %%l1, %%g5\n\t" sparc_5()
243 "l0", "l1", "l2", "l3", "l4", "l5"); sparc_5()
H A Dswitch_to_64.h14 * for l0/l1. It will use one for 'next' and the other to hold
63 "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
H A Dttable.h19 clr %l0; clr %l1; clr %l2; clr %l3; \
177 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
178 add %l1, 4, %l2; \
179 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
236 stx %l1, [%sp + STACK_BIAS + 0x08]; \
257 stx %l1, [%sp + STACK_BIAS + 0x08]; \
284 stxa %l1, [%g1 + %g3] ASI; \
315 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
349 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
380 stwa %l1, [%sp + %g3] ASI; \
414 stwa %l1, [%sp + 0x04] %asi; \
448 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
492 ldx [%sp + STACK_BIAS + 0x08], %l1; \
516 ldx [%sp + STACK_BIAS + 0x08], %l1; \
545 ldxa [%g1 + %g2] ASI, %l1; \
573 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
605 lduwa [%sp + %g2] ASI, %l1; \
636 lduwa [%sp + 0x04] %asi, %l1; \
H A Dleon.h101 __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t" sparc_leon3_enable_snooping()
103 "or %%l2, %%l1, %%l2\n\t" sparc_leon3_enable_snooping()
104 "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2"); sparc_leon3_enable_snooping()
116 __asm__ __volatile__ ("lda [%%g0] 2, %%l1\n\t" sparc_leon3_disable_cache()
118 "andn %%l2, %%l1, %%l2\n\t" sparc_leon3_disable_cache()
119 "sta %%l2, [%%g0] 2\n\t" : : : "l1", "l2"); sparc_leon3_disable_cache()
H A Dswitch_to_32.h48 * We need to loadup regs l0/l1 for the newly forked child
97 "l0", "l1", "l3", "l4", "l5", "l6", "l7", \
H A Duaccess_32.h209 register unsigned long __gu_val __asm__ ("l1"); \
251 register unsigned long __gu_val __asm__ ("l1"); \
H A Duaccess_64.h161 register unsigned long __gu_val __asm__ ("l1"); \
/linux-4.1.27/arch/microblaze/lib/
H A Dmulsi3.S26 bri l1
29 l1: label
/linux-4.1.27/arch/sparc/power/
H A Dhibernate_asm.S74 ldxa [%l0 ] %asi, %l1 /* address */
78 sub %l1, %g7, %l1
83 ldxa [%l1 + %l3] ASI_PHYS_USE_EC, %g2
/linux-4.1.27/arch/blackfin/lib/
H A Dsmulsi3_highpart.S12 .section .l1.text
H A Dstrcpy.S17 .section .l1.text
H A Dumulsi3_highpart.S12 .section .l1.text
H A Dstrcmp.S19 .section .l1.text
H A Dstrncmp.S17 .section .l1.text
H A Dumodsi3.S10 .section .l1.text
H A Dmemset.S12 .section .l1.text
H A Dmodsi3.S18 .section .l1.text
H A Dstrncpy.S19 .section .l1.text
H A Dmuldi3.S12 .section .l1.text
H A Dmemcpy.S24 .section .l1.text
H A Ddivsi3.S30 .section .l1.text
H A Dudivsi3.S12 .section .l1.text
/linux-4.1.27/fs/hpfs/
H A Dname.c75 const unsigned char *n1, unsigned l1, hpfs_compare_names()
78 unsigned l = l1 < l2 ? l1 : l2; hpfs_compare_names()
87 if (l1 < l2) return -1; hpfs_compare_names()
88 if (l1 > l2) return 1; hpfs_compare_names()
74 hpfs_compare_names(struct super_block *s, const unsigned char *n1, unsigned l1, const unsigned char *n2, unsigned l2, int last) hpfs_compare_names() argument
/linux-4.1.27/arch/sparc/lib/
H A Dmcount.S59 mov %g3, %l1
85 mov %g3, %l1
111 mov %l1, %o2
H A Dudivdi3.S121 mov %o1,%l1
253 mov %o1,%l1
257 mov %l1,%i1
H A Ddivdi3.S139 mov %o1,%l1
265 mov %o1,%l1
269 mov %l1,%i1
/linux-4.1.27/drivers/scsi/arm/
H A Deesox.c238 unsigned long l1, l2; eesoxscsi_buffer_in() local
240 l1 = readl(reg_dmadata) & mask; eesoxscsi_buffer_in()
241 l1 |= readl(reg_dmadata) << 16; eesoxscsi_buffer_in()
244 *(u32 *)buf = l1; eesoxscsi_buffer_in()
253 unsigned long l1; eesoxscsi_buffer_in() local
255 l1 = readl(reg_dmadata) & mask; eesoxscsi_buffer_in()
256 l1 |= readl(reg_dmadata) << 16; eesoxscsi_buffer_in()
258 *(u32 *)buf = l1; eesoxscsi_buffer_in()
317 unsigned long l1, l2; eesoxscsi_buffer_out() local
319 l1 = *(u32 *)buf; eesoxscsi_buffer_out()
324 writel(l1 << 16, reg_dmadata); eesoxscsi_buffer_out()
325 writel(l1, reg_dmadata); eesoxscsi_buffer_out()
333 unsigned long l1; eesoxscsi_buffer_out() local
335 l1 = *(u32 *)buf; eesoxscsi_buffer_out()
338 writel(l1 << 16, reg_dmadata); eesoxscsi_buffer_out()
339 writel(l1, reg_dmadata); eesoxscsi_buffer_out()
/linux-4.1.27/arch/x86/boot/
H A Dstring.c144 size_t l1, l2; strstr() local
149 l1 = strlen(s1); strstr()
150 while (l1 >= l2) { strstr()
151 l1--; strstr()
/linux-4.1.27/arch/mips/bmips/
H A Dirq.c28 dn = of_find_compatible_node(NULL, NULL, "brcm,bcm7038-l1-intc"); arch_init_irq()
/linux-4.1.27/tools/vm/
H A Dpage_owner_sort.c46 const struct block_list *l1 = p1, *l2 = p2; compare_txt() local
48 return strcmp(l1->txt, l2->txt); compare_txt()
53 const struct block_list *l1 = p1, *l2 = p2; compare_num() local
55 return l2->num - l1->num; compare_num()
/linux-4.1.27/drivers/iommu/
H A Dshmobile-iommu.c41 struct shmobile_iommu_domain_pgtable l1, l2[L1_LEN]; member in struct:shmobile_iommu_domain
102 ret = pgtable_alloc(&sh_domain->l1, l1cache, L1_SIZE); shmobile_iommu_domain_alloc()
124 pgtable_free(&sh_domain->l1, l1cache, L1_SIZE); shmobile_iommu_domain_free()
142 ipmmu_tlb_set(archdata->ipmmu, sh_domain->l1.handle, L1_SIZE, shmobile_iommu_attach_device()
198 pgtable_write(&sh_domain->l1, l1index, 1, l2alloc()
213 pgtable_write(&sh_domain->l1, l1index, 1, 0); l2free()
251 pgtable_write(&sh_domain->l1, l1index, 1, paddr | 0xc02); shmobile_iommu_map()
318 l1entry = pgtable_read(&sh_domain->l1, l1index); shmobile_iommu_iova_to_phys()
H A Damd_iommu_init.c248 /* Access to l1 and l2 indexed register spaces */
250 static u32 iommu_read_l1(struct amd_iommu *iommu, u16 l1, u8 address) iommu_read_l1() argument
254 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); iommu_read_l1()
259 static void iommu_write_l1(struct amd_iommu *iommu, u16 l1, u8 address, u32 val) iommu_write_l1() argument
261 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16 | 1 << 31)); iommu_write_l1()
263 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); iommu_write_l1()
1685 /* Restore the l1 indirect regs for each of the 6 l1s */ iommu_apply_resume_quirks()
/linux-4.1.27/arch/blackfin/include/asm/
H A Dcontext.S38 [--sp] = l1;
85 l1 = r0; define
110 [--sp] = l1;
145 l1 = r0; define
169 [--sp] = l1;
220 l1 = r0; define
258 l1 = [sp++]; define
328 l1 = [sp++]; define
H A Delf.h20 #define EF_BFIN_CODE_IN_L1 0x00000010 /* --code-in-l1 */
21 #define EF_BFIN_DATA_IN_L1 0x00000020 /* --data-in-l1 */
H A Ddpmc.h87 [--sp] = l1;
155 l1 = [sp++];
/linux-4.1.27/drivers/media/platform/davinci/
H A Dvpif.c60 .l1 = 1,
77 .l1 = 1,
94 .l1 = 1,
111 .l1 = 1,
128 .l1 = 1,
148 .l1 = 1,
168 .l1 = 1,
187 .l1 = 1,
207 .l1 = 1,
289 value = (config->l1 & vpifregs[config_channel_id].len_mask); vpif_set_mode_info()
H A Dvpif.h629 u16 l1, l3, l5, l7, l9, l11; /* Other parameter configurations */ member in struct:vpif_channel_config_params
H A Dvpif_display.c966 std_info->l1 = 1; vpif_s_dv_timings()
H A Dvpif_capture.c1167 std_info->l1 = 1; vpif_s_dv_timings()
/linux-4.1.27/arch/sh/boot/compressed/
H A Dhead_32.S69 l1: label
72 bf l1
/linux-4.1.27/drivers/dma/
H A Dste_dma40_ll.c30 u32 l1 = 0; /* src */ d40_log_cfg() local
35 l1 |= BIT(D40_MEM_LCSP1_SCFG_INCR_POS); d40_log_cfg()
45 l1 |= BIT(D40_MEM_LCSP1_SCFG_MST_POS); d40_log_cfg()
57 l1 |= BIT(D40_MEM_LCSP1_SCFG_EIM_POS); d40_log_cfg()
58 l1 |= cfg->src_info.psize << D40_MEM_LCSP1_SCFG_PSIZE_POS; d40_log_cfg()
59 l1 |= d40_width_to_bits(cfg->src_info.data_width) d40_log_cfg()
62 *lcsp1 = l1; d40_log_cfg()
/linux-4.1.27/fs/xfs/libxfs/
H A Dxfs_bmap_btree.c102 __uint64_t l1, __xfs_bmbt_get_all()
112 (((xfs_fsblock_t)l1) >> 21); __xfs_bmbt_get_all()
113 s->br_blockcount = (xfs_filblks_t)(l1 & xfs_mask64lo(21)); __xfs_bmbt_get_all()
128 __xfs_bmbt_get_all(r->l0, r->l1, s); xfs_bmbt_get_all()
138 return (xfs_filblks_t)(r->l1 & xfs_mask64lo(21)); xfs_bmbt_get_blockcount()
149 (((xfs_fsblock_t)r->l1) >> 21); xfs_bmbt_get_startblock()
181 return (xfs_filblks_t)(be64_to_cpu(r->l1) & xfs_mask64lo(21)); xfs_bmbt_disk_get_blockcount()
218 r->l1 = ((xfs_bmbt_rec_base_t)startblock << 21) | xfs_bmbt_set_allf()
258 r->l1 = cpu_to_be64( xfs_bmbt_disk_set_allf()
285 r->l1 = (r->l1 & (xfs_bmbt_rec_base_t)xfs_mask64hi(43)) | xfs_bmbt_set_blockcount()
300 r->l1 = (r->l1 & (xfs_bmbt_rec_base_t)xfs_mask64lo(21)) | xfs_bmbt_set_startblock()
100 __xfs_bmbt_get_all( __uint64_t l0, __uint64_t l1, xfs_bmbt_irec_t *s) __xfs_bmbt_get_all() argument
H A Dxfs_inode_fork.c59 rec.l1 = get_unaligned(&ep->l1); xfs_validate_extents()
339 ep->l1 = get_unaligned_be64(&dp->l1); xfs_iformat_extents()
772 put_unaligned_be64(ep->l1, &dp->l1); xfs_iextents_copy()
H A Dxfs_format.h1289 * l0:0-8 and l1:21-63 are startblock.
1290 * l1:0-20 are blockcount.
1298 __be64 l0, l1; member in struct:xfs_bmbt_rec
1305 __uint64_t l0, l1; member in struct:xfs_bmbt_rec_host
H A Dxfs_bmap.c832 arp->l1 = cpu_to_be64(ep->l1); xfs_bmap_extents_to_btree()
1335 trp->l1 = be64_to_cpu(frp->l1); xfs_bmap_read_extents()
/linux-4.1.27/arch/blackfin/mach-common/
H A Dcache.S66 .section .l1.text
97 .section .l1.text
H A Dinterrupt.S25 .section .l1.text
52 [--sp] = l1;
102 l1 = r1; define
H A Ddpmc_modes.S12 .section .l1.text
H A Dentry.S30 .section .l1.text
1173 .section .l1.data.B
1227 .section .l1.data
/linux-4.1.27/tools/perf/arch/sparc/util/
H A Ddwarf-regs.c20 "%l0", "%l1", "%l2", "%l3", "%l4", "%l5", "%l6", "%l7",
/linux-4.1.27/drivers/isdn/hardware/mISDN/
H A Dw6692.c214 l1_event(dch->l1, HW_RESET_IND); W6692_ph_bh()
218 l1_event(dch->l1, HW_DEACT_CNF); W6692_ph_bh()
222 l1_event(dch->l1, HW_DEACT_IND); W6692_ph_bh()
226 l1_event(dch->l1, HW_POWERUP_IND); W6692_ph_bh()
231 l1_event(dch->l1, ANYSIGNAL); W6692_ph_bh()
234 l1_event(dch->l1, LOSTFRAMING); W6692_ph_bh()
239 l1_event(dch->l1, INFO2); W6692_ph_bh()
243 l1_event(dch->l1, INFO4_P8); W6692_ph_bh()
247 l1_event(dch->l1, INFO4_P10); W6692_ph_bh()
1034 ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); channel_ctrl()
1102 ret = l1_event(dch->l1, hh->prim); w6692_l2l1D()
1106 ret = l1_event(dch->l1, hh->prim); w6692_l2l1D()
1279 l1_event(card->dch.l1, CLOSE_CHANNEL); release_card()
H A DmISDNipac.c76 l1_event(dch->l1, HW_RESET_IND); isac_ph_state_bh()
80 l1_event(dch->l1, HW_DEACT_CNF); isac_ph_state_bh()
84 l1_event(dch->l1, HW_DEACT_IND); isac_ph_state_bh()
88 l1_event(dch->l1, HW_POWERUP_IND); isac_ph_state_bh()
93 l1_event(dch->l1, ANYSIGNAL); isac_ph_state_bh()
96 l1_event(dch->l1, LOSTFRAMING); isac_ph_state_bh()
101 l1_event(dch->l1, INFO2); isac_ph_state_bh()
105 l1_event(dch->l1, INFO4_P8); isac_ph_state_bh()
109 l1_event(dch->l1, INFO4_P10); isac_ph_state_bh()
592 ret = l1_event(dch->l1, hh->prim); isac_l1hw()
596 ret = l1_event(dch->l1, hh->prim); isac_l1hw()
631 ret = l1_event(isac->dch.l1, HW_TIMER3_VALUE | (para & 0xff)); isac_ctrl()
722 if (isac->dch.l1) isac_release()
723 l1_event(isac->dch.l1, CLOSE_CHANNEL); isac_release()
790 if (!isac->dch.l1) { isac_init()
H A Dhfcpci.c929 l1_event(dch->l1, HW_RESET_IND); ph_state_te()
932 l1_event(dch->l1, HW_DEACT_IND); ph_state_te()
936 l1_event(dch->l1, ANYSIGNAL); ph_state_te()
939 l1_event(dch->l1, INFO2); ph_state_te()
942 l1_event(dch->l1, INFO4_P8); ph_state_te()
1085 l1_event(dch->l1, HW_POWERUP_IND); hfc_l1callback()
1627 ret = l1_event(dch->l1, hh->prim); hfcpci_l2l1D()
1657 ret = l1_event(dch->l1, hh->prim); hfcpci_l2l1D()
1877 ret = l1_event(hc->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); channel_ctrl()
1917 l1_event(hc->dch.l1, CLOSE_CHANNEL); open_dchannel()
2070 l1_event(hc->dch.l1, CLOSE_CHANNEL); release_card()
H A Dhfcsusb.c24 * H - l1 driver flags described in hfcsusb.h
329 ret = l1_event(dch->l1, hh->prim); hfcusb_l2l1D()
360 ret = l1_event(dch->l1, hh->prim); hfcusb_l2l1D()
598 l1_event(dch->l1, HW_RESET_IND); ph_state_te()
601 l1_event(dch->l1, HW_DEACT_IND); ph_state_te()
605 l1_event(dch->l1, ANYSIGNAL); ph_state_te()
608 l1_event(dch->l1, INFO2); ph_state_te()
611 l1_event(dch->l1, INFO4_P8); ph_state_te()
777 /* start l1 activation */ hfcsusb_ph_command()
1757 l1_event(hw->dch.l1, CLOSE_CHANNEL); release_hw()
H A Dhfcmulti.c3262 l1_event(dch->l1, HW_POWERUP_IND); hfcm_l1callback()
3399 ret = l1_event(dch->l1, hh->prim); handle_dmsg()
3445 ret = l1_event(dch->l1, hh->prim); handle_dmsg()
3791 l1_event(dch->l1, HW_RESET_IND); ph_state_change()
3794 l1_event(dch->l1, HW_DEACT_IND); ph_state_change()
3798 l1_event(dch->l1, ANYSIGNAL); ph_state_change()
3801 l1_event(dch->l1, INFO2); ph_state_change()
3804 l1_event(dch->l1, INFO4_P8); ph_state_change()
4079 l1_event(dch->l1, CLOSE_CHANNEL); open_dchannel()
4174 ret = l1_event(dch->l1, HW_TIMER3_VALUE | (cq->p1 & 0xff)); channel_dctrl()
4555 l1_event(dch->l1, CLOSE_CHANNEL); release_port()
/linux-4.1.27/arch/blackfin/mach-bf609/
H A Ddpm.S9 .section .l1.text
/linux-4.1.27/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_minidump.c594 struct __cache *l1 = &entry->region.cache; qlcnic_dump_l1_cache() local
596 val = l1->init_tag_val; qlcnic_dump_l1_cache()
598 for (i = 0; i < l1->no_ops; i++) { qlcnic_dump_l1_cache()
599 qlcnic_ind_wr(adapter, l1->addr, val); qlcnic_dump_l1_cache()
600 qlcnic_ind_wr(adapter, l1->ctrl_addr, LSW(l1->ctrl_val)); qlcnic_dump_l1_cache()
601 addr = l1->read_addr; qlcnic_dump_l1_cache()
602 cnt = l1->read_addr_num; qlcnic_dump_l1_cache()
606 addr += l1->read_addr_stride; qlcnic_dump_l1_cache()
609 val += l1->stride; qlcnic_dump_l1_cache()
611 return l1->no_ops * l1->read_addr_num * sizeof(u32); qlcnic_dump_l1_cache()
/linux-4.1.27/arch/s390/lib/
H A Dstring.c246 int l1, l2; strstr() local
251 l1 = __strend(s1) - s1; strstr()
252 while (l1-- >= l2) { strstr()
/linux-4.1.27/tools/perf/util/
H A Dhelp.c253 int l1 = (*c1)->len; levenshtein_compare() local
255 return l1 != l2 ? l1 - l2 : strcmp(s1, s2); levenshtein_compare()
H A Devsel.c372 { "L1-dcache", "l1-d", "l1d", "L1-data", },
373 { "L1-icache", "l1-i", "l1i", "L1-instruction", },
/linux-4.1.27/kernel/sched/
H A Dsched.h1564 static inline void double_lock(spinlock_t *l1, spinlock_t *l2) double_lock() argument
1566 if (l1 > l2) double_lock()
1567 swap(l1, l2); double_lock()
1569 spin_lock(l1); double_lock()
1573 static inline void double_lock_irq(spinlock_t *l1, spinlock_t *l2) double_lock_irq() argument
1575 if (l1 > l2) double_lock_irq()
1576 swap(l1, l2); double_lock_irq()
1578 spin_lock_irq(l1); double_lock_irq()
1582 static inline void double_raw_lock(raw_spinlock_t *l1, raw_spinlock_t *l2) double_raw_lock() argument
1584 if (l1 > l2) double_raw_lock()
1585 swap(l1, l2); double_raw_lock()
1587 raw_spin_lock(l1); double_raw_lock()
/linux-4.1.27/arch/blackfin/include/uapi/asm/
H A Dptrace.h59 long l1; member in struct:pt_regs
/linux-4.1.27/arch/ia64/sn/kernel/
H A Dklconflib.c15 #include <asm/sn/l1.h>
H A Dio_common.c17 #include <asm/sn/l1.h>
H A Dtiocx.c24 #include <asm/sn/l1.h>
/linux-4.1.27/drivers/irqchip/
H A Dirq-bcm7038-l1.c267 .name = "bcm7038-l1",
335 IRQCHIP_DECLARE(bcm7038_l1, "brcm,bcm7038-l1-intc", bcm7038_l1_of_init);
/linux-4.1.27/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pic.c295 static int mpc52xx_is_extirq(int l1, int l2) mpc52xx_is_extirq() argument
297 return ((l1 == 0) && (l2 == 0)) || mpc52xx_is_extirq()
298 ((l1 == 1) && (l2 >= 1) && (l2 <= 3)); mpc52xx_is_extirq()
330 pr_debug("return %x, l1=%d, l2=%d\n", intrvect_linux, intrvect_l1, mpc52xx_irqhost_xlate()
383 pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq); mpc52xx_irqhost_map()
/linux-4.1.27/drivers/pci/pcie/
H A Daspm.c38 u32 l1; /* L1 latency (nsec) */ member in struct:aspm_latency
334 latency = max_t(u32, link->latency_up.l1, link->latency_dw.l1); pcie_aspm_check_latency()
336 (latency + l1_switch_latency > acceptable->l1)) pcie_aspm_check_latency()
386 link->latency_up.l1 = calc_l1_latency(upreg.latency_encoding_l1); pcie_aspm_cap_init()
387 link->latency_dw.l1 = calc_l1_latency(dwreg.latency_encoding_l1); pcie_aspm_cap_init()
421 acceptable->l1 = calc_l1_acceptable(encoding); pcie_aspm_cap_init()
/linux-4.1.27/arch/x86/kernel/cpu/
H A Dintel_cacheinfo.c233 union l1_cache *l1 = &l1d; amd_cpuid4() local
244 l1 = &l1i; amd_cpuid4()
246 if (!l1->val) amd_cpuid4()
248 assoc = assocs[l1->assoc]; amd_cpuid4()
249 line_size = l1->line_size; amd_cpuid4()
250 lines_per_tag = l1->lines_per_tag; amd_cpuid4()
251 size_in_kb = l1->size_in_kb; amd_cpuid4()
H A Dintel.c418 unsigned int l1; init_intel() local
419 rdmsr(MSR_IA32_MISC_ENABLE, l1, l2); init_intel()
420 if (!(l1 & (1<<11))) init_intel()
422 if (!(l1 & (1<<12))) init_intel()
/linux-4.1.27/fs/nfs/
H A Dpnfs.c470 * is l2 fully contained in l1?
477 pnfs_lseg_range_contained(const struct pnfs_layout_range *l1, pnfs_lseg_range_contained() argument
480 u64 start1 = l1->offset; pnfs_lseg_range_contained()
481 u64 end1 = end_offset(start1, l1->length); pnfs_lseg_range_contained()
489 * is l1 and l2 intersecting?
496 pnfs_lseg_range_intersecting(const struct pnfs_layout_range *l1, pnfs_lseg_range_intersecting() argument
499 u64 start1 = l1->offset; pnfs_lseg_range_intersecting()
500 u64 end1 = end_offset(start1, l1->length); pnfs_lseg_range_intersecting()
1189 pnfs_lseg_range_cmp(const struct pnfs_layout_range *l1, pnfs_lseg_range_cmp() argument
1195 d = l1->offset - l2->offset; pnfs_lseg_range_cmp()
1200 d = l2->length - l1->length; pnfs_lseg_range_cmp()
1205 return (int)(l1->iomode == IOMODE_READ) - (int)(l2->iomode == IOMODE_READ); pnfs_lseg_range_cmp()
H A Dpagelist.c913 static bool nfs_match_lock_context(const struct nfs_lock_context *l1, nfs_match_lock_context() argument
916 return l1->lockowner.l_owner == l2->lockowner.l_owner nfs_match_lock_context()
917 && l1->lockowner.l_pid == l2->lockowner.l_pid; nfs_match_lock_context()
/linux-4.1.27/arch/nios2/kernel/
H A Dhead.S142 movia r1, finish_move /* VMA(_start)->l1 */
/linux-4.1.27/arch/blackfin/mach-bf561/
H A Dsecondary.S20 .section .l1.text.head
/linux-4.1.27/lib/
H A Dstring.c722 size_t l1, l2; strstr() local
727 l1 = strlen(s1); strstr()
728 while (l1 >= l2) { strstr()
729 l1--; strstr()
H A Dbch.c563 int n = 0, i, l0, l1, l2; find_poly_deg2_roots() local
569 l1 = bch->a_log_tab[poly->c[1]]; find_poly_deg2_roots()
573 u = a_pow(bch, l0+l2+2*(GF_N(bch)-l1)); find_poly_deg2_roots()
590 roots[n++] = modulo(bch, 2*GF_N(bch)-l1- find_poly_deg2_roots()
592 roots[n++] = modulo(bch, 2*GF_N(bch)-l1- find_poly_deg2_roots()
H A Dbtree.c103 static int longcmp(const unsigned long *l1, const unsigned long *l2, size_t n) longcmp() argument
108 if (l1[i] < l2[i]) longcmp()
110 if (l1[i] > l2[i]) longcmp()
/linux-4.1.27/include/linux/
H A DmISDNhw.h93 void *l1; member in struct:dchannel
/linux-4.1.27/fs/cifs/
H A Ddir.c877 int i, l1, l2; cifs_ci_compare() local
888 for (i = 0; i < len; i += l1) { cifs_ci_compare()
890 l1 = codepage->char2uni(&str[i], len - i, &c1); cifs_ci_compare()
897 if (unlikely(l1 < 0 && l2 < 0)) { cifs_ci_compare()
900 l1 = 1; cifs_ci_compare()
908 if (l1 != l2) cifs_ci_compare()
/linux-4.1.27/arch/x86/crypto/
H A Dcamellia-aesni-avx-asm_64.S297 #define fls16(l, l0, l1, l2, l3, l4, l5, l6, l7, r, t0, t1, t2, t3, tt0, \
315 vpand l1, t1, t1; \
411 vpxor l1, t1, l1; \
412 vmovdqu l1, 1 * 16(l); \
H A Dcamellia-aesni-avx2-asm_64.S336 #define fls32(l, l0, l1, l2, l3, l4, l5, l6, l7, r, t0, t1, t2, t3, tt0, \
354 vpand l1, t1, t1; \
450 vpxor l1, t1, l1; \
451 vmovdqu l1, 1 * 32(l); \
/linux-4.1.27/drivers/regulator/
H A Dqcom_rpm-regulator.c760 { "l1", QCOM_RPM_PM8058_LDO1, &pm8058_nldo, "vdd_l0_l1_lvs" },
801 { "l1", QCOM_RPM_PM8901_LDO1, &pm8901_pldo, "vdd_l1" },
831 { "l1", QCOM_RPM_PM8921_LDO1, &pm8921_nldo, "vdd_l1_l2_l12_l18" },
H A Dtps65090-regulator.c246 tps65090_REG_FIXEDV(LDO1, "vsys-l1", 0, 0, 5000000,
/linux-4.1.27/drivers/scsi/
H A Dgdth_ioctl.h162 u32 l1, l2, l3, l4; member in struct:__anon8925::__anon8926::__anon8930
/linux-4.1.27/arch/powerpc/platforms/pasemi/
H A Diommu.c204 /* Empty l1 is marked invalid */ iob_init()
/linux-4.1.27/drivers/gpio/
H A Dgpio-omap.c1245 u32 l1 = 0, l2 = 0; omap_gpio_runtime_suspend() local
1285 l1 = bank->context.fallingdetect; omap_gpio_runtime_suspend()
1288 l1 &= ~bank->enabled_non_wakeup_gpios; omap_gpio_runtime_suspend()
1291 writel_relaxed(l1, bank->base + bank->regs->fallingdetect); omap_gpio_runtime_suspend()
/linux-4.1.27/Documentation/video4linux/
H A Dextract_xc3028.pl77 my $l1 = ($val >> 8) & 0xff;
80 syswrite(OUTFILE, chr($l0).chr($l1).chr($l2).chr($l3));
94 my $l1 = ($lsb_val >> 8) & 0xff;
98 chr($l0).chr($l1).chr($l2).chr($l3).
/linux-4.1.27/fs/pstore/
H A Dplatform.c268 * written bytes, older bytes are in (s1,l1). Save as much
/linux-4.1.27/drivers/net/ethernet/atheros/alx/
H A Dhw.c424 /* dis l0s/l1 before mac reset */ alx_reset_mac()
458 /* restore l0s / l1 */ alx_reset_mac()
H A Dmain.c767 /* disable l0s/l1 */ alx_halt()
/linux-4.1.27/drivers/tty/serial/
H A Dsn_console.c4 * This driver is NOT suitable for talking to the l1-controller for
5 * anything other than 'console activities' --- please use the l1
/linux-4.1.27/drivers/pci/hotplug/
H A Dsgi_hotplug.c25 #include <asm/sn/l1.h>
/linux-4.1.27/arch/sparc/mm/
H A Dultra.S548 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
/linux-4.1.27/drivers/video/backlight/
H A Dadp8860_bl.c340 * restore daylight l1 sysfs brightness adp8860_bl_set()
H A Dadp8870_bl.c370 * restore daylight l1 sysfs brightness adp8870_bl_set()
/linux-4.1.27/drivers/net/ethernet/intel/e1000e/
H A Dnetdev.c376 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n"); e1000e_dump()
1387 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]); e1000_clean_rx_irq_ps() local
1394 if (l1 && (l1 <= copybreak) && e1000_clean_rx_irq_ps()
1395 ((length + l1) <= adapter->rx_ps_bsize0)) { e1000_clean_rx_irq_ps()
1409 memcpy(skb_tail_pointer(skb), vaddr, l1); e1000_clean_rx_irq_ps() local
1419 l1 -= 4; e1000_clean_rx_irq_ps()
1422 skb_put(skb, l1); e1000_clean_rx_irq_ps()
/linux-4.1.27/kernel/
H A Dcgroup.c596 struct list_head *l1, *l2; compare_css_sets() local
612 l1 = &cset->cgrp_links; compare_css_sets()
618 l1 = l1->next; compare_css_sets()
621 if (l1 == &cset->cgrp_links) { compare_css_sets()
628 link1 = list_entry(l1, struct cgrp_cset_link, cgrp_link); compare_css_sets()
/linux-4.1.27/arch/arm/mach-omap2/
H A Dmux34xx.c805 _OMAP3_BALLENTRY(GPMC_CLK, "n1", "l1"),
1167 _OMAP3_BALLENTRY(GPMC_NBE1, "l1", NULL),
/linux-4.1.27/arch/x86/include/asm/
H A Dkvm_host.h378 * the paging mode of the l1 guest. This context is always used to
/linux-4.1.27/drivers/usb/dwc3/
H A Dcore.c810 "snps,is-utmi-l1-suspend"); dwc3_probe()
/linux-4.1.27/drivers/usb/host/
H A Dxhci.c4123 int l1; xhci_calculate_usb2_hw_lpm_params() local
4129 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */ xhci_calculate_usb2_hw_lpm_params()
4130 l1 = udev->l1_params.timeout / 256; xhci_calculate_usb2_hw_lpm_params()
4138 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm); xhci_calculate_usb2_hw_lpm_params()
/linux-4.1.27/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_main.c1101 AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/ atl1c_configure_des_ring()
/linux-4.1.27/drivers/block/drbd/
H A Ddrbd_receiver.c2032 static inline int overlaps(sector_t s1, int l1, sector_t s2, int l2) overlaps() argument
2034 return !((s1 + (l1>>9) <= s2) || (s1 >= s2 + (l2>>9))); overlaps()
/linux-4.1.27/drivers/md/
H A Dmd.c2826 static int overlaps(sector_t s1, sector_t l1, sector_t s2, sector_t l2) overlaps() argument
2829 if (s1+l1 <= s2) overlaps()
/linux-4.1.27/drivers/net/ethernet/agere/
H A Det131x.c3053 /* l0s and l1 latency timers. We are using default values. et131x_pci_init()
/linux-4.1.27/drivers/isdn/hardware/eicon/
H A Dmessage.c9426 add_p(plci, FTY, "\x02\xff\x06"); /* l1 down */ CapiRelease()
14888 add_p(plci, FTY, "\x02\xff\x07"); /* l1 start */ CapiRegister()

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