Searched refs:io_base (Results 1 - 120 of 120) sorted by relevance

/linux-4.1.27/arch/powerpc/platforms/embedded6xx/
H A Dflipper-pic.c53 void __iomem *io_base = irq_data_get_irq_chip_data(d); flipper_pic_mask_and_ack() local
56 clrbits32(io_base + FLIPPER_IMR, mask); flipper_pic_mask_and_ack()
58 out_be32(io_base + FLIPPER_ICR, mask); flipper_pic_mask_and_ack()
64 void __iomem *io_base = irq_data_get_irq_chip_data(d); flipper_pic_ack() local
67 out_be32(io_base + FLIPPER_ICR, 1 << irq); flipper_pic_ack()
73 void __iomem *io_base = irq_data_get_irq_chip_data(d); flipper_pic_mask() local
75 clrbits32(io_base + FLIPPER_IMR, 1 << irq); flipper_pic_mask()
81 void __iomem *io_base = irq_data_get_irq_chip_data(d); flipper_pic_unmask() local
83 setbits32(io_base + FLIPPER_IMR, 1 << irq); flipper_pic_unmask()
127 static void __flipper_quiesce(void __iomem *io_base) __flipper_quiesce() argument
130 out_be32(io_base + FLIPPER_IMR, 0x00000000); __flipper_quiesce()
131 out_be32(io_base + FLIPPER_ICR, 0xffffffff); __flipper_quiesce()
139 void __iomem *io_base; flipper_pic_init() local
157 io_base = ioremap(res.start, resource_size(&res)); flipper_pic_init()
159 pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base); flipper_pic_init()
161 __flipper_quiesce(io_base); flipper_pic_init()
164 &flipper_irq_domain_ops, io_base); flipper_pic_init()
176 void __iomem *io_base = flipper_irq_host->host_data; flipper_pic_get_irq() local
180 irq_status = in_be32(io_base + FLIPPER_ICR) & flipper_pic_get_irq()
181 in_be32(io_base + FLIPPER_IMR); flipper_pic_get_irq()
222 void __iomem *io_base = flipper_irq_host->host_data; flipper_quiesce() local
224 __flipper_quiesce(io_base); flipper_quiesce()
232 void __iomem *io_base; flipper_platform_reset() local
235 io_base = flipper_irq_host->host_data; flipper_platform_reset()
236 out_8(io_base + FLIPPER_RESET, 0x00); flipper_platform_reset()
245 void __iomem *io_base; flipper_is_reset_button_pressed() local
249 io_base = flipper_irq_host->host_data; flipper_is_reset_button_pressed()
250 icr = in_be32(io_base + FLIPPER_ICR); flipper_is_reset_button_pressed()
H A Dhlwd-pic.c48 void __iomem *io_base = irq_data_get_irq_chip_data(d); hlwd_pic_mask_and_ack() local
51 clrbits32(io_base + HW_BROADWAY_IMR, mask); hlwd_pic_mask_and_ack()
52 out_be32(io_base + HW_BROADWAY_ICR, mask); hlwd_pic_mask_and_ack()
58 void __iomem *io_base = irq_data_get_irq_chip_data(d); hlwd_pic_ack() local
60 out_be32(io_base + HW_BROADWAY_ICR, 1 << irq); hlwd_pic_ack()
66 void __iomem *io_base = irq_data_get_irq_chip_data(d); hlwd_pic_mask() local
68 clrbits32(io_base + HW_BROADWAY_IMR, 1 << irq); hlwd_pic_mask()
74 void __iomem *io_base = irq_data_get_irq_chip_data(d); hlwd_pic_unmask() local
76 setbits32(io_base + HW_BROADWAY_IMR, 1 << irq); hlwd_pic_unmask()
110 void __iomem *io_base = h->host_data; __hlwd_pic_get_irq() local
114 irq_status = in_be32(io_base + HW_BROADWAY_ICR) & __hlwd_pic_get_irq()
115 in_be32(io_base + HW_BROADWAY_IMR); __hlwd_pic_get_irq()
152 static void __hlwd_quiesce(void __iomem *io_base) __hlwd_quiesce() argument
155 out_be32(io_base + HW_BROADWAY_IMR, 0); __hlwd_quiesce()
156 out_be32(io_base + HW_BROADWAY_ICR, 0xffffffff); __hlwd_quiesce()
163 void __iomem *io_base; hlwd_pic_init() local
171 io_base = ioremap(res.start, resource_size(&res)); hlwd_pic_init()
172 if (!io_base) { hlwd_pic_init()
177 pr_info("controller at 0x%08x mapped to 0x%p\n", res.start, io_base); hlwd_pic_init()
179 __hlwd_quiesce(io_base); hlwd_pic_init()
182 &hlwd_irq_domain_ops, io_base); hlwd_pic_init()
185 iounmap(io_base); hlwd_pic_init()
232 void __iomem *io_base = hlwd_irq_host->host_data; hlwd_quiesce() local
234 __hlwd_quiesce(io_base); hlwd_quiesce()
/linux-4.1.27/sound/isa/
H A Dsscape.c147 unsigned io_base; member in struct:soundscape
201 static inline void sscape_write_unsafe(unsigned io_base, enum GA_REG reg, sscape_write_unsafe() argument
204 outb(reg, ODIE_ADDR_IO(io_base)); sscape_write_unsafe()
205 outb(val, ODIE_DATA_IO(io_base)); sscape_write_unsafe()
218 sscape_write_unsafe(s->io_base, reg, val); sscape_write()
226 static inline unsigned char sscape_read_unsafe(unsigned io_base, sscape_read_unsafe() argument
229 outb(reg, ODIE_ADDR_IO(io_base)); sscape_read_unsafe()
230 return inb(ODIE_DATA_IO(io_base)); sscape_read_unsafe()
236 static inline void set_host_mode_unsafe(unsigned io_base) set_host_mode_unsafe() argument
238 outb(0x0, HOST_CTRL_IO(io_base)); set_host_mode_unsafe()
244 static inline void set_midi_mode_unsafe(unsigned io_base) set_midi_mode_unsafe() argument
246 outb(0x3, HOST_CTRL_IO(io_base)); set_midi_mode_unsafe()
253 static inline int host_read_unsafe(unsigned io_base) host_read_unsafe() argument
256 if ((inb(HOST_CTRL_IO(io_base)) & RX_READY) != 0) host_read_unsafe()
257 data = inb(HOST_DATA_IO(io_base)); host_read_unsafe()
267 static int host_read_ctrl_unsafe(unsigned io_base, unsigned timeout) host_read_ctrl_unsafe() argument
271 while (((data = host_read_unsafe(io_base)) < 0) && (timeout != 0)) { host_read_ctrl_unsafe()
283 static inline int host_write_unsafe(unsigned io_base, unsigned char data) host_write_unsafe() argument
285 if ((inb(HOST_CTRL_IO(io_base)) & TX_READY) != 0) { host_write_unsafe()
286 outb(data, HOST_DATA_IO(io_base)); host_write_unsafe()
298 static int host_write_ctrl_unsafe(unsigned io_base, unsigned char data, host_write_ctrl_unsafe() argument
303 while (!(err = host_write_unsafe(io_base, data)) && (timeout != 0)) { host_write_ctrl_unsafe()
336 static void activate_ad1845_unsafe(unsigned io_base) activate_ad1845_unsafe() argument
338 unsigned char val = sscape_read_unsafe(io_base, GA_HMCTL_REG); activate_ad1845_unsafe()
339 sscape_write_unsafe(io_base, GA_HMCTL_REG, (val & 0xcf) | 0x10); activate_ad1845_unsafe()
340 sscape_write_unsafe(io_base, GA_CDCFG_REG, 0x80); activate_ad1845_unsafe()
358 static void sscape_start_dma_unsafe(unsigned io_base, enum GA_REG reg) sscape_start_dma_unsafe() argument
360 sscape_write_unsafe(io_base, reg, sscape_start_dma_unsafe()
361 sscape_read_unsafe(io_base, reg) | 0x01); sscape_start_dma_unsafe()
362 sscape_write_unsafe(io_base, reg, sscape_start_dma_unsafe()
363 sscape_read_unsafe(io_base, reg) & 0xfe); sscape_start_dma_unsafe()
370 static int sscape_wait_dma_unsafe(unsigned io_base, enum GA_REG reg, sscape_wait_dma_unsafe() argument
373 while (!(sscape_read_unsafe(io_base, reg) & 0x01) && (timeout != 0)) { sscape_wait_dma_unsafe()
378 return sscape_read_unsafe(io_base, reg) & 0x01; sscape_wait_dma_unsafe()
397 x = host_read_unsafe(s->io_base); obp_startup_ack()
424 x = host_read_unsafe(s->io_base); host_startup_ack()
454 val = sscape_read_unsafe(s->io_base, GA_HMCTL_REG); upload_dma_data()
455 sscape_write_unsafe(s->io_base, GA_HMCTL_REG, val & 0x3f); upload_dma_data()
461 sscape_write_unsafe(s->io_base, GA_DMAA_REG, val); upload_dma_data()
462 sscape_write_unsafe(s->io_base, GA_DMAB_REG, 0x20); upload_dma_data()
467 val = sscape_read_unsafe(s->io_base, GA_HMCTL_REG); upload_dma_data()
468 sscape_write_unsafe(s->io_base, GA_HMCTL_REG, val | 0x80); upload_dma_data()
483 sscape_start_dma_unsafe(s->io_base, GA_DMAA_REG); upload_dma_data()
484 if (!sscape_wait_dma_unsafe(s->io_base, GA_DMAA_REG, 5000)) { upload_dma_data()
497 set_host_mode_unsafe(s->io_base); upload_dma_data()
498 outb(0x0, s->io_base); upload_dma_data()
503 val = sscape_read_unsafe(s->io_base, GA_HMCTL_REG); upload_dma_data()
504 sscape_write_unsafe(s->io_base, GA_HMCTL_REG, val | 0x40); upload_dma_data()
557 data = host_read_ctrl_unsafe(sscape->io_base, 100); sscape_upload_bootblock()
560 sscape_write_unsafe(sscape->io_base, GA_SMCFGA_REG, 0x2f); sscape_upload_bootblock()
646 set_host_mode_unsafe(s->io_base); sscape_midi_put()
658 change = host_write_ctrl_unsafe(s->io_base, CMD_SET_MIDI_VOL, 100) sscape_midi_put()
659 && host_write_ctrl_unsafe(s->io_base, new_val, 100) sscape_midi_put()
660 && host_write_ctrl_unsafe(s->io_base, CMD_XXX_MIDI_VOL, 100) sscape_midi_put()
661 && host_write_ctrl_unsafe(s->io_base, new_val, 100); sscape_midi_put()
668 set_midi_mode_unsafe(s->io_base); sscape_midi_put()
723 if ((inb(HOST_CTRL_IO(s->io_base)) & 0x78) != 0) detect_sscape()
726 d = inb(ODIE_ADDR_IO(s->io_base)) & 0xf0; detect_sscape()
737 outb(0xfa, ODIE_ADDR_IO(s->io_base)); detect_sscape()
738 if ((inb(ODIE_ADDR_IO(s->io_base)) & 0x9f) != 0x0a) detect_sscape()
741 outb(0xfe, ODIE_ADDR_IO(s->io_base)); detect_sscape()
742 if ((inb(ODIE_ADDR_IO(s->io_base)) & 0x9f) != 0x0e) detect_sscape()
745 outb(0xfe, ODIE_ADDR_IO(s->io_base)); detect_sscape()
746 d = inb(ODIE_DATA_IO(s->io_base)); detect_sscape()
751 activate_ad1845_unsafe(s->io_base); detect_sscape()
756 d = sscape_read_unsafe(s->io_base, GA_HMCTL_REG); detect_sscape()
757 sscape_write_unsafe(s->io_base, GA_HMCTL_REG, d | 0xc0); detect_sscape()
774 d = sscape_read_unsafe(s->io_base, GA_HMCTL_REG) & 0x3f; detect_sscape()
775 sscape_write_unsafe(s->io_base, GA_HMCTL_REG, d); detect_sscape()
780 d = sscape_read_unsafe(s->io_base, GA_HMCTL_REG); detect_sscape()
781 sscape_write_unsafe(s->io_base, GA_HMCTL_REG, d | 0xc0); detect_sscape()
986 sscape->io_base = port[dev]; create_sscape()
990 sscape->io_base); create_sscape()
1014 name, sscape->io_base, irq[dev], dma[dev]); create_sscape()
1039 sscape_write_unsafe(sscape->io_base, GA_SMCFGA_REG, 0x2e); create_sscape()
1040 sscape_write_unsafe(sscape->io_base, GA_SMCFGB_REG, 0x00); create_sscape()
1045 sscape_write_unsafe(sscape->io_base, GA_DMACFG_REG, 0x50); create_sscape()
1047 sscape_write_unsafe(sscape->io_base, GA_DMAA_REG, dma_cfg); create_sscape()
1048 sscape_write_unsafe(sscape->io_base, GA_DMAB_REG, 0x20); create_sscape()
1051 val = sscape_read_unsafe(sscape->io_base, GA_HMCTL_REG) & 0xF7; create_sscape()
1054 sscape_write_unsafe(sscape->io_base, GA_HMCTL_REG, val | 0x10); create_sscape()
1055 sscape_write_unsafe(sscape->io_base, GA_INTCFG_REG, 0xf0 | mpu_irq_cfg); create_sscape()
1056 sscape_write_unsafe(sscape->io_base, create_sscape()
1062 sscape_write_unsafe(sscape->io_base, GA_INTENA_REG, 0x80); create_sscape()
1106 host_write_ctrl_unsafe(sscape->io_base, create_sscape()
1108 host_write_ctrl_unsafe(sscape->io_base, create_sscape()
1110 host_write_ctrl_unsafe(sscape->io_base, create_sscape()
1112 host_write_ctrl_unsafe(sscape->io_base, create_sscape()
1114 host_write_ctrl_unsafe(sscape->io_base, create_sscape()
1116 host_write_ctrl_unsafe(sscape->io_base, create_sscape()
1118 host_write_ctrl_unsafe(sscape->io_base, CMD_ACK, 100); create_sscape()
1120 set_midi_mode_unsafe(sscape->io_base); create_sscape()
/linux-4.1.27/sound/oss/
H A Dtrix.c96 switch (hw_config->io_base) trix_set_wss_port()
129 int config_port = hw_config->io_base + 0; init_trix_wss()
179 ports = request_region(hw_config->io_base + 4, 4, "ad1848"); init_trix_wss()
181 printk(KERN_ERR "AudioTrix: MSS I/O port conflict (%x)\n", hw_config->io_base); init_trix_wss()
185 if (!request_region(hw_config->io_base, 4, "MSS config")) { init_trix_wss()
186 printk(KERN_ERR "AudioTrix: MSS I/O port conflict (%x)\n", hw_config->io_base); init_trix_wss()
187 release_region(hw_config->io_base + 4, 4); init_trix_wss()
194 config = inb(hw_config->io_base + 3); init_trix_wss()
198 MDB(printk(KERN_ERR "No MSS signature detected on port 0x%x\n", hw_config->io_base)); init_trix_wss()
266 release_region(hw_config->io_base, 4); init_trix_wss()
267 release_region(hw_config->io_base + 4, 4); init_trix_wss()
285 if ((hw_config->io_base & 0xffffff8f) != 0x200) probe_trix_sb()
298 if (!request_region(hw_config->io_base, 16, "soundblaster")) { probe_trix_sb()
299 printk(KERN_ERR "AudioTrix: SB I/O port conflict (%x)\n", hw_config->io_base); probe_trix_sb()
304 conf |= hw_config->io_base & 0x70; /* I/O address bits */ probe_trix_sb()
310 download_boot(hw_config->io_base); probe_trix_sb()
314 release_region(hw_config->io_base, 16); probe_trix_sb()
347 switch (hw_config->io_base) probe_trix_mpu()
379 release_region(hw_config->io_base, 4); unload_trix_wss()
381 ad1848_unload(hw_config->io_base + 4, unload_trix_wss()
431 cfg.io_base = io; init_trix()
436 cfg2.io_base = sb_io; init_trix()
440 cfg_mpu.io_base = mpu_io; init_trix()
443 if (cfg.io_base == -1 || cfg.dma == -1 || cfg.irq == -1) { init_trix()
448 if (cfg2.io_base != -1 && (cfg2.irq == -1 || cfg2.dma == -1)) { init_trix()
452 if (cfg_mpu.io_base != -1 && cfg_mpu.irq == -1) { init_trix()
478 if (cfg2.io_base != -1) { init_trix()
482 if (cfg_mpu.io_base != -1) init_trix()
H A Dsb_card.c101 if (!request_region(scc->conf.io_base, 16, "soundblaster")) { sb_register_oss()
108 release_region(scc->conf.io_base, 16); sb_register_oss()
118 if(scc->mpucnf.io_base > 0) { sb_register_oss()
146 legacy->conf.io_base = io; sb_init_legacy()
152 legacy->mpucnf.io_base = mpu_io; sb_init_legacy()
169 scc->conf.io_base = -1; sb_dev2cfg()
173 scc->mpucnf.io_base = -1; sb_dev2cfg()
181 scc->conf.io_base = pnp_port_start(dev,0); sb_dev2cfg()
185 scc->mpucnf.io_base = pnp_port_start(dev,1); sb_dev2cfg()
189 scc->conf.io_base = pnp_port_start(dev,0); sb_dev2cfg()
196 scc->conf.io_base = pnp_port_start(dev,0); sb_dev2cfg()
200 scc->mpucnf.io_base = pnp_port_start(dev,2); sb_dev2cfg()
204 scc->conf.io_base = pnp_port_start(dev,0); sb_dev2cfg()
211 scc->conf.io_base = pnp_port_start(dev,0); sb_dev2cfg()
218 scc->conf.io_base = pnp_port_start(dev,0); sb_dev2cfg()
222 scc->conf.io_base = pnp_port_start(dev,0); sb_dev2cfg()
230 scc->conf.io_base = pnp_port_start(dev,0); sb_dev2cfg()
264 "dma=%d, dma16=%d\n", scc->conf.io_base, scc->conf.irq, sb_pnp_probe()
H A Dad1848.h16 void ad1848_unload (int io_base, int irq, int dma_playback, int dma_capture, int share_dma);
H A Dpas2_card.c242 if (sb_config->io_base) config_pas_hw()
258 pas_write((sb_config->io_base >> 4) & 0x0f, 0xF789); config_pas_hw()
259 pas_sb_base = sb_config->io_base; config_pas_hw()
294 outb((hw_config->io_base >> 2), 0x9A01); /* Set base address */ detect_pas_hw()
295 pas_translate_code = hw_config->io_base - 0x388; detect_pas_hw()
406 cfg.io_base = io; init_pas2()
411 cfg2.io_base = sb_io; init_pas2()
416 if (cfg.io_base == -1 || cfg.dma == -1 || cfg.irq == -1) { init_pas2()
H A Dpss.c182 devc->base = hw_config->io_base; probe_pss()
692 devc->base = hw_config->io_base; attach_pss()
713 release_region(hw_config->io_base, 0x10); attach_pss()
714 release_region(hw_config->io_base+0x10, 0x9); attach_pss()
720 release_region(hw_config->io_base, 0x10); attach_pss()
721 release_region(hw_config->io_base+0x10, 0x9); attach_pss()
727 release_region(hw_config->io_base, 0x10); attach_pss()
728 release_region(hw_config->io_base+0x10, 0x9); attach_pss()
748 ports = request_region(hw_config->io_base, 2, "mpu401"); probe_pss_mpu()
754 set_io_base(devc, CONF_MIDI, hw_config->io_base); probe_pss_mpu()
775 if ((inb(hw_config->io_base + 1) & 0x80) == 0) /* Input data avail */ probe_pss_mpu()
776 inb(hw_config->io_base); /* Discard it */ probe_pss_mpu()
789 release_region(hw_config->io_base, 2); probe_pss_mpu()
1040 if (!request_region(hw_config->io_base, 4, "WSS config")) { probe_pss_mss()
1044 ports = request_region(hw_config->io_base + 4, 4, "ad1848"); probe_pss_mss()
1047 release_region(hw_config->io_base, 4); probe_pss_mss()
1050 set_io_base(devc, CONF_WSS, hw_config->io_base); probe_pss_mss()
1065 for (timeout = 0; timeout < 100000 && (inb(hw_config->io_base + WSS_INDEX) & probe_pss_mss()
1069 outb((0x0b), hw_config->io_base + WSS_INDEX); /* Required by some cards */ probe_pss_mss()
1071 for (timeout = 0; (inb(hw_config->io_base + WSS_DATA) & WSS_AUTOCALIBRATION) && probe_pss_mss()
1106 release_region(hw_config->io_base + 4, 4); probe_pss_mss()
1107 release_region(hw_config->io_base, 4); probe_pss_mss()
1113 release_region(hw_config->io_base, 0x10); unload_pss()
1114 release_region(hw_config->io_base+0x10, 0x9); unload_pss()
1183 cfg.io_base = pss_io; init_pss()
1195 cfg.io_base = pss_io; init_pss()
1197 cfg2.io_base = mss_io; init_pss()
1201 cfg_mpu.io_base = mpu_io; init_pss()
1204 if (cfg.io_base == -1 || cfg2.io_base == -1 || cfg2.irq == -1 || cfg.dma == -1) { init_pss()
H A Duart401.c300 if (!request_region(hw_config->io_base, 4, "MPU-401 UART")) { probe_uart401()
301 printk(KERN_INFO "uart401: could not request_region(%d, 4)\n", hw_config->io_base); probe_uart401()
311 devc->base = hw_config->io_base; probe_uart401()
391 release_region(hw_config->io_base, 4); probe_uart401()
411 release_region(hw_config->io_base, 4); unload_uart401()
439 cfg_mpu.io_base = io; init_uart401()
443 if (cfg_mpu.io_base != -1 && cfg_mpu.irq != -1) { init_uart401()
454 if (cfg_mpu.io_base != -1 && cfg_mpu.irq != -1) cleanup_uart401()
H A Dwaveartist.c163 unsigned int ctlr_port = hw->io_base + CTLR; waveartist_set_ctlr()
175 unsigned int ctlr_port = devc->hw.io_base + CTLR; waveartist_iack()
205 if (inb(hw->io_base + STATR) & CMD_RF) { waveartist_reset()
206 res = inw(hw->io_base + CMDR); waveartist_reset()
231 unsigned int io_base = devc->hw.io_base; waveartist_cmd() local
244 if (inb(io_base + STATR) & CMD_RF) { waveartist_cmd()
250 old_data = inw(io_base + CMDR); waveartist_cmd()
262 if (inb(io_base + STATR) & CMD_WE) waveartist_cmd()
268 outw(cmd[i], io_base + CMDR); waveartist_cmd()
275 if (inb(io_base + STATR) & CMD_RF) waveartist_cmd()
281 resp[i] = inw(io_base + CMDR); waveartist_cmd()
613 inb(devc->hw.io_base + CTLR)); waveartist_prepare_for_input()
615 inb(devc->hw.io_base + STATR)); waveartist_prepare_for_input()
617 inb(devc->hw.io_base + IRQSTAT)); waveartist_prepare_for_input()
663 printk("WA CTLR reg: 0x%02X.\n",inb(devc->hw.io_base + CTLR)); waveartist_prepare_for_output()
664 printk("WA STAT reg: 0x%02X.\n",inb(devc->hw.io_base + STATR)); waveartist_prepare_for_output()
665 printk("WA IRQS reg: 0x%02X.\n",inb(devc->hw.io_base + IRQSTAT)); waveartist_prepare_for_output()
708 if (inb(devc->hw.io_base + STATR) & IRQ_REQ) waveartist_halt_input()
733 if (inb(devc->hw.io_base + STATR) & IRQ_REQ) waveartist_halt_output()
855 irqstatus = inb(devc->hw.io_base + IRQSTAT); waveartist_intr()
856 status = inb(devc->hw.io_base + STATR); waveartist_intr()
1282 conf_printf2(dev_name, devc->hw.io_base, devc->hw.irq, waveartist_init()
1361 if (!request_region(hw_config->io_base, 15, hw_config->name)) { probe_waveartist()
1367 release_region(hw_config->io_base, 15); probe_waveartist()
1374 release_region(hw_config->io_base, 15); probe_waveartist()
1413 release_region(hw->io_base, 15); attach_waveartist()
1438 if (hw->io_base == adev_info[i].hw.io_base) { unload_waveartist()
1451 release_region(devc->hw.io_base, 15); unload_waveartist()
1999 cfg.io_base = io; init_waveartist()
H A Dsb_common.c303 switch (hw_config->io_base) sb16_set_mpu_port()
315 printk(KERN_ERR "SB16: Invalid MIDI I/O port %x\n", hw_config->io_base); sb16_set_mpu_port()
350 if (jazz16_base != 0 && jazz16_base != hw_config->io_base) relocate_Jazz16()
353 switch (hw_config->io_base) relocate_Jazz16()
368 jazz16_base = hw_config->io_base; relocate_Jazz16()
518 DDB(printk("sb_dsp_detect(%x) entered\n", hw_config->io_base)); sb_dsp_detect()
523 devc->base = hw_config->io_base; sb_dsp_detect()
631 MDB(printk(KERN_INFO "SB %d.%02d detected OK (%x)\n", devc->major, devc->minor, hw_config->io_base)); sb_dsp_detect()
645 DDB(printk("sb_dsp_init(%x) entered\n", hw_config->io_base)); sb_dsp_init()
656 if (devc->base != hw_config->io_base) sb_dsp_init()
806 release_region(hw_config->io_base, 16); sb_dsp_init()
883 if (devc && devc->base == hw_config->io_base) sb_dsp_unload()
912 release_region(hw_config->io_base, 16); sb_dsp_unload()
1006 int mpu_base = hw_config->io_base; smw_midi_init()
1111 int mpu_base = hw_config->io_base; init_Jazz16_midi()
1193 if (hw_config->io_base <= 0) probe_sbmpu()
1210 ports = request_region(hw_config->io_base, 2, "mpu401"); probe_sbmpu()
1212 printk(KERN_ERR "sbmpu: I/O port conflict (%x)\n", hw_config->io_base); probe_sbmpu()
1216 release_region(hw_config->io_base, 2); probe_sbmpu()
1222 release_region(hw_config->io_base, 2); probe_sbmpu()
1236 if (hw_config->io_base != 0x300 && hw_config->io_base != 0x330) probe_sbmpu()
1238 printk(KERN_ERR "SB16: Invalid MIDI port %x\n", hw_config->io_base); probe_sbmpu()
H A Duart6850.c262 uart6850_base = hw_config->io_base; attach_uart6850()
296 uart6850_base = hw_config->io_base; probe_uart6850()
323 cfg_mpu.io_base = io; init_uart6850()
326 if (cfg_mpu.io_base == -1 || cfg_mpu.irq == -1) { init_uart6850()
H A Dsound_config.h66 int io_base; member in struct:address_info
H A Dad1848.c1543 int io_base = ports->start; ad1848_detect() local
1547 DDB(printk("ad1848_detect(%x)\n", io_base)); ad1848_detect()
1575 devc->base = io_base; ad1848_detect()
2154 void ad1848_unload(int io_base, int irq, int dma_playback, int dma_capture, int share_dma) ad1848_unload() argument
2161 if (adev_info[i].base == io_base) ad1848_unload()
2193 printk(KERN_ERR "ad1848: Can't find device to be unloaded. Base=%x\n", io_base); ad1848_unload()
2365 switch (hw_config->io_base) init_deskpro()
2380 DDB(printk("init_deskpro: Invalid MSS port %x\n", hw_config->io_base)); init_deskpro()
2509 DDB(printk("Entered probe_ms_sound(%x, %d)\n", hw_config->io_base, hw_config->card_subtype)); probe_ms_sound()
2535 if ((tmp = inb(hw_config->io_base + 3)) == 0xff) /* Bus float */ probe_ms_sound()
2551 MDB(printk(KERN_ERR "No MSS signature detected on port 0x%x (0x%x)\n", hw_config->io_base, (int) inb(hw_config->io_base + 3))); probe_ms_sound()
2578 if (hw_config->dma == 0 && inb(hw_config->io_base + 3) & 0x80) probe_ms_sound()
2583 if (hw_config->irq > 7 && hw_config->irq != 9 && inb(hw_config->io_base + 3) & 0x80) probe_ms_sound()
2605 int config_port = hw_config->io_base + 0; attach_ms_sound()
2606 int version_port = hw_config->io_base + 3; attach_ms_sound()
2682 ad1848_unload(hw_config->io_base + 4, unload_ms_sound()
2687 release_region(hw_config->io_base, 4); unload_ms_sound()
2909 hw_config->io_base = pnp_port_start(ad1848_dev, ad1848_isapnp_list[slot].mss_io); ad1848_init_generic()
2936 hw_config->io_base, hw_config->irq, hw_config->dma, ad1848_isapnp_init()
3003 cfg.io_base = io; init_ad1848()
H A Dmpu401.c963 devc->base = hw_config->io_base; attach_mpu401()
1109 release_region(hw_config->io_base, 2); attach_mpu401()
1189 tmp_devc.base = hw_config->io_base; probe_mpu401()
1198 if (inb(hw_config->io_base + 1) == 0xff) probe_mpu401()
1200 DDB(printk("MPU401: Port %x looks dead.\n", hw_config->io_base)); probe_mpu401()
1207 DDB(printk("MPU401: Reset failed on port %x\n", hw_config->io_base)); probe_mpu401()
1218 release_region(hw_config->io_base, 2); unload_mpu401()
1762 cfg.io_base = io; init_mpu401()
H A Dkahlua.c152 hw_config->io_base = io; probe_one()
H A Dsoundcard.c697 printk("<%s> at 0x%03x", name, hw_config->io_base); conf_printf()
H A Dsb_ess.c1788 tmp = (hw_config->io_base & 0x0f0) >> 4; ess_midi_init()
/linux-4.1.27/sound/soc/spear/
H A Dspdif_out.c39 void __iomem *io_base; member in struct:spdif_out_dev
46 writel(SPDIF_OUT_RESET, host->io_base + SPDIF_OUT_SOFT_RST); spdif_out_configure()
48 writel(readl(host->io_base + SPDIF_OUT_SOFT_RST) & ~SPDIF_OUT_RESET, spdif_out_configure()
49 host->io_base + SPDIF_OUT_SOFT_RST); spdif_out_configure()
54 host->io_base + SPDIF_OUT_CFG); spdif_out_configure()
56 writel(0x7F, host->io_base + SPDIF_OUT_INT_STA_CLR); spdif_out_configure()
57 writel(0x7F, host->io_base + SPDIF_OUT_INT_EN_CLR); spdif_out_configure()
99 ctrl = readl(host->io_base + SPDIF_OUT_CTRL); spdif_out_clock()
102 writel(ctrl, host->io_base + SPDIF_OUT_CTRL); spdif_out_clock()
165 ctrl = readl(host->io_base + SPDIF_OUT_CTRL); spdif_out_trigger()
172 writel(ctrl, host->io_base + SPDIF_OUT_CTRL); spdif_out_trigger()
178 ctrl = readl(host->io_base + SPDIF_OUT_CTRL); spdif_out_trigger()
181 writel(ctrl, host->io_base + SPDIF_OUT_CTRL); spdif_out_trigger()
197 val = readl(host->io_base + SPDIF_OUT_CTRL); spdif_digital_mute()
209 writel(val, host->io_base + SPDIF_OUT_CTRL); spdif_digital_mute()
291 host->io_base = devm_ioremap_resource(&pdev->dev, res); spdif_out_probe()
292 if (IS_ERR(host->io_base)) spdif_out_probe()
293 return PTR_ERR(host->io_base); spdif_out_probe()
H A Dspdif_in.c38 void *io_base; member in struct:spdif_in_dev
52 writel(ctrl, host->io_base + SPDIF_IN_CTRL); spdif_in_configure()
53 writel(0xF, host->io_base + SPDIF_IN_IRQ_MASK); spdif_in_configure()
74 writel(0x0, host->io_base + SPDIF_IN_IRQ_MASK); spdif_in_shutdown()
79 u32 ctrl = readl(host->io_base + SPDIF_IN_CTRL); spdif_in_format()
91 writel(ctrl, host->io_base + SPDIF_IN_CTRL); spdif_in_format()
128 ctrl = readl(host->io_base + SPDIF_IN_CTRL); spdif_in_trigger()
130 writel(ctrl, host->io_base + SPDIF_IN_CTRL); spdif_in_trigger()
131 writel(0xF, host->io_base + SPDIF_IN_IRQ_MASK); spdif_in_trigger()
137 ctrl = readl(host->io_base + SPDIF_IN_CTRL); spdif_in_trigger()
139 writel(ctrl, host->io_base + SPDIF_IN_CTRL); spdif_in_trigger()
140 writel(0x0, host->io_base + SPDIF_IN_IRQ_MASK); spdif_in_trigger()
182 u32 irq_status = readl(host->io_base + SPDIF_IN_IRQ); spdif_in_irq()
196 writel(0, host->io_base + SPDIF_IN_IRQ); spdif_in_irq()
228 host->io_base = devm_ioremap(&pdev->dev, res->start, spdif_in_probe()
230 if (!host->io_base) { spdif_in_probe()
/linux-4.1.27/drivers/hwspinlock/
H A Du8500_hsem.c100 void __iomem *io_base; u8500_hsem_probe() local
111 io_base = ioremap(res->start, resource_size(res)); u8500_hsem_probe()
112 if (!io_base) u8500_hsem_probe()
116 val = readl(io_base + HSEM_CTRL_REG); u8500_hsem_probe()
117 writel((val & ~HSEM_PROTOCOL_1), io_base + HSEM_CTRL_REG); u8500_hsem_probe()
120 writel(0xFFFF, io_base + HSEM_ICRALL); u8500_hsem_probe()
131 hwlock->priv = io_base + HSEM_REGISTER_OFFSET + sizeof(u32) * i; u8500_hsem_probe()
147 iounmap(io_base); u8500_hsem_probe()
154 void __iomem *io_base = bank->lock[0].priv - HSEM_REGISTER_OFFSET; u8500_hsem_remove() local
158 writel(0xFFFF, io_base + HSEM_ICRALL); u8500_hsem_remove()
167 iounmap(io_base); u8500_hsem_remove()
H A Domap_hwspinlock.c87 void __iomem *io_base; omap_hwspinlock_probe() local
97 io_base = ioremap(res->start, resource_size(res)); omap_hwspinlock_probe()
98 if (!io_base) omap_hwspinlock_probe()
113 i = readl(io_base + SYSSTATUS_OFFSET); omap_hwspinlock_probe()
141 hwlock->priv = io_base + LOCK_BASE_OFFSET + sizeof(u32) * i; omap_hwspinlock_probe()
154 iounmap(io_base); omap_hwspinlock_probe()
161 void __iomem *io_base = bank->lock[0].priv - LOCK_BASE_OFFSET; omap_hwspinlock_remove() local
171 iounmap(io_base); omap_hwspinlock_remove()
/linux-4.1.27/drivers/input/keyboard/
H A Dspear-keyboard.c57 void __iomem *io_base; member in struct:spear_kbd
76 sts = readl_relaxed(kbd->io_base + STATUS_REG); spear_kbd_interrupt()
86 val = readl_relaxed(kbd->io_base + DATA_REG) & spear_kbd_interrupt()
97 writel_relaxed(0, kbd->io_base + STATUS_REG); spear_kbd_interrupt()
121 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); spear_kbd_open()
122 writel_relaxed(1, kbd->io_base + STATUS_REG); spear_kbd_open()
125 val = readl_relaxed(kbd->io_base + MODE_CTL_REG); spear_kbd_open()
127 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); spear_kbd_open()
138 val = readl_relaxed(kbd->io_base + MODE_CTL_REG); spear_kbd_close()
140 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); spear_kbd_close()
225 kbd->io_base = devm_ioremap_resource(&pdev->dev, res); spear_kbd_probe()
226 if (IS_ERR(kbd->io_base)) spear_kbd_probe()
227 return PTR_ERR(kbd->io_base); spear_kbd_probe()
304 mode_ctl_reg = readl_relaxed(kbd->io_base + MODE_CTL_REG); spear_kbd_suspend()
323 writel_relaxed(val, kbd->io_base + MODE_CTL_REG); spear_kbd_suspend()
328 kbd->io_base + MODE_CTL_REG); spear_kbd_suspend()
365 writel_relaxed(kbd->mode_ctl_reg, kbd->io_base + MODE_CTL_REG); spear_kbd_resume()
/linux-4.1.27/drivers/pcmcia/
H A Dpd6729.h18 unsigned long io_base; /* base io address of the socket */ member in struct:pd6729_socket
H A Dbcm63xx_pcmcia.h57 void __iomem *io_base; member in struct:bcm63xx_pcmcia_socket
H A Di82092.c59 unsigned int io_base; /* base io address of the socket */ member in struct:socket_info
107 sockets[i].io_base = pci_resource_start(dev, 0); i82092aa_pci_probe()
188 port = sockets[socket].io_base; indirect_read()
203 port = sockets[socket].io_base;
220 port = sockets[socket].io_base; indirect_write()
233 port = sockets[socket].io_base; indirect_setbit()
250 port = sockets[socket].io_base; indirect_resetbit()
266 port = sockets[socket].io_base; indirect_write16()
366 if (sockets[socketno].io_base == 0) card_present()
697 if (sockets[0].io_base>0) i82092aa_module_exit()
698 release_region(sockets[0].io_base, 2); i82092aa_module_exit()
H A Delectra_cf.c54 unsigned int io_base; member in struct:electra_cf_socket
236 cf->io_base = (unsigned long)cf->io_virt - VMALLOC_END; electra_cf_probe()
273 cf->socket.io_offset = cf->io_base; electra_cf_probe()
282 if (!request_region(cf->io_base, cf->io_size, driver_name)) { electra_cf_probe()
310 release_region(cf->io_base, cf->io_size); electra_cf_probe()
345 release_region(cf->io_base, cf->io_size); electra_cf_remove()
H A Dbcm63xx_pcmcia.c370 skt->io_base = ioremap(res->start, iomem_size); bcm63xx_drv_pcmcia_probe()
371 if (!skt->io_base) { bcm63xx_drv_pcmcia_probe()
382 sock->io_offset = (unsigned long)skt->io_base; bcm63xx_drv_pcmcia_probe()
429 if (skt->io_base) bcm63xx_drv_pcmcia_probe()
430 iounmap(skt->io_base); bcm63xx_drv_pcmcia_probe()
447 iounmap(skt->io_base); bcm63xx_drv_pcmcia_remove()
H A Dpd6729.c70 port = socket->io_base; indirect_read()
87 port = socket->io_base; indirect_read16()
106 port = socket->io_base; indirect_write()
121 port = socket->io_base; indirect_setbit()
139 port = socket->io_base; indirect_resetbit()
157 port = socket->io_base; indirect_write16()
646 "io_base is NULL.\n"); pd6729_pci_probe()
682 socket[i].io_base = pci_resource_start(dev, 0); pd6729_pci_probe()
/linux-4.1.27/drivers/mtd/nand/
H A Dsocrates_nand.c34 void __iomem *io_base; member in struct:socrates_nand_host
52 out_be32(host->io_base, FPGA_NAND_ENABLE | socrates_nand_write_buf()
73 out_be32(host->io_base, val); socrates_nand_read_buf()
75 buf[i] = (in_be32(host->io_base) >> socrates_nand_read_buf()
125 out_be32(host->io_base, val); socrates_nand_cmd_ctrl()
136 if (in_be32(host->io_base) & FPGA_NAND_BUSY) socrates_nand_device_ready()
157 host->io_base = of_iomap(ofdev->dev.of_node, 0); socrates_nand_probe()
158 if (host->io_base == NULL) { socrates_nand_probe()
211 iounmap(host->io_base); socrates_nand_probe()
225 iounmap(host->io_base); socrates_nand_remove()
H A Dorion_nand.c51 void __iomem *io_base = chip->IO_ADDR_R; orion_nand_read_buf() local
56 *buf++ = readb(io_base); orion_nand_read_buf()
68 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base)); orion_nand_read_buf()
73 buf[i++] = readb(io_base); orion_nand_read_buf()
84 void __iomem *io_base; orion_nand_probe() local
96 io_base = devm_ioremap_resource(&pdev->dev, res); orion_nand_probe()
98 if (IS_ERR(io_base)) orion_nand_probe()
99 return PTR_ERR(io_base); orion_nand_probe()
130 nc->IO_ADDR_R = nc->IO_ADDR_W = io_base; orion_nand_probe()
H A Dams-delta.c68 void __iomem *io_base = this->priv; ams_delta_write_byte() local
70 writew(0, io_base + OMAP_MPUIO_IO_CNTL); ams_delta_write_byte()
81 void __iomem *io_base = this->priv; ams_delta_read_byte() local
85 writew(~0, io_base + OMAP_MPUIO_IO_CNTL); ams_delta_read_byte()
179 void __iomem *io_base; ams_delta_init() local
208 io_base = ioremap(res->start, resource_size(res)); ams_delta_init()
209 if (io_base == NULL) { ams_delta_init()
215 this->priv = io_base; ams_delta_init()
218 this->IO_ADDR_R = io_base + OMAP_MPUIO_INPUT_LATCH; ams_delta_init()
219 this->IO_ADDR_W = io_base + OMAP_MPUIO_OUTPUT; ams_delta_init()
234 platform_set_drvdata(pdev, io_base); ams_delta_init()
257 iounmap(io_base); ams_delta_init()
269 void __iomem *io_base = platform_get_drvdata(pdev); ams_delta_cleanup() local
276 iounmap(io_base); ams_delta_cleanup()
H A Dplat_nand.c24 void __iomem *io_base; member in struct:plat_nand_data
58 data->io_base = devm_ioremap_resource(&pdev->dev, res); plat_nand_probe()
59 if (IS_ERR(data->io_base)) plat_nand_probe()
60 return PTR_ERR(data->io_base); plat_nand_probe()
67 data->chip.IO_ADDR_R = data->io_base; plat_nand_probe()
68 data->chip.IO_ADDR_W = data->io_base; plat_nand_probe()
H A Dlpc32xx_mlc.c177 void __iomem *io_base; member in struct:lpc32xx_nand_host
233 writel(MLCCMD_RESET, MLC_CMD(host->io_base)); lpc32xx_nand_setup()
243 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); lpc32xx_nand_setup()
247 writel(tmp, MLC_ICR(host->io_base)); lpc32xx_nand_setup()
251 writew(MLCLOCKPR_MAGIC, MLC_LOCK_PR(host->io_base)); lpc32xx_nand_setup()
262 writel(tmp, MLC_TIME_REG(host->io_base)); lpc32xx_nand_setup()
266 MLC_IRQ_MR(host->io_base)); lpc32xx_nand_setup()
269 writel(MLCCEH_NORMAL, MLC_CEH(host->io_base)); lpc32xx_nand_setup()
283 writel(cmd, MLC_CMD(host->io_base)); lpc32xx_nand_cmd_ctrl()
285 writel(cmd, MLC_ADDR(host->io_base)); lpc32xx_nand_cmd_ctrl()
297 if ((readb(MLC_ISR(host->io_base)) & lpc32xx_nand_device_ready()
310 sr = readb(MLC_IRQ_SR(host->io_base)); lpc3xxx_nand_irq()
323 if (readb(MLC_ISR(host->io_base)) & MLCISR_NAND_READY) lpc32xx_waitfunc_nand()
328 while (!(readb(MLC_ISR(host->io_base)) & MLCISR_NAND_READY)) { lpc32xx_waitfunc_nand()
343 if (readb(MLC_ISR(host->io_base)) & MLCISR_CONTROLLER_READY) lpc32xx_waitfunc_controller()
348 while (!(readb(MLC_ISR(host->io_base)) & lpc32xx_waitfunc_controller()
456 writeb(0x00, MLC_ECC_AUTO_DEC_REG(host->io_base)); lpc32xx_read_page()
462 mlc_isr = readl(MLC_ISR(host->io_base)); lpc32xx_read_page()
479 readl(MLC_BUFF(host->io_base)); lpc32xx_read_page()
485 readl(MLC_BUFF(host->io_base)); lpc32xx_read_page()
513 writeb(0x00, MLC_ECC_ENC_REG(host->io_base)); lpc32xx_write_page_lowlevel()
524 MLC_BUFF(host->io_base)); lpc32xx_write_page_lowlevel()
528 writel(*((uint32_t *)(oobbuf)), MLC_BUFF(host->io_base)); lpc32xx_write_page_lowlevel()
530 writew(*((uint16_t *)(oobbuf)), MLC_BUFF(host->io_base)); lpc32xx_write_page_lowlevel()
534 writeb(0x00, MLC_ECC_AUTO_ENC_REG(host->io_base)); lpc32xx_write_page_lowlevel()
657 host->io_base = devm_ioremap_resource(&pdev->dev, rc); lpc32xx_nand_probe()
658 if (IS_ERR(host->io_base)) lpc32xx_nand_probe()
659 return PTR_ERR(host->io_base); lpc32xx_nand_probe()
700 nand_chip->IO_ADDR_R = MLC_DATA(host->io_base); lpc32xx_nand_probe()
701 nand_chip->IO_ADDR_W = MLC_DATA(host->io_base); lpc32xx_nand_probe()
759 readb(MLC_IRQ_SR(host->io_base)); lpc32xx_nand_probe()
H A Dlpc32xx_slc.c205 void __iomem *io_base; member in struct:lpc32xx_nand_host
227 writel(SLCCTRL_SW_RESET, SLC_CTRL(host->io_base)); lpc32xx_nand_setup()
231 writel(0, SLC_CFG(host->io_base)); lpc32xx_nand_setup()
232 writel(0, SLC_IEN(host->io_base)); lpc32xx_nand_setup()
234 SLC_ICR(host->io_base)); lpc32xx_nand_setup()
250 writel(tmp, SLC_TAC(host->io_base)); lpc32xx_nand_setup()
264 tmp = readl(SLC_CFG(host->io_base)); lpc32xx_nand_cmd_ctrl()
269 writel(tmp, SLC_CFG(host->io_base)); lpc32xx_nand_cmd_ctrl()
273 writel(cmd, SLC_CMD(host->io_base)); lpc32xx_nand_cmd_ctrl()
275 writel(cmd, SLC_ADDR(host->io_base)); lpc32xx_nand_cmd_ctrl()
288 if ((readl(SLC_STAT(host->io_base)) & SLCSTAT_NAND_READY) != 0) lpc32xx_nand_device_ready()
342 return (uint8_t)readl(SLC_DATA(host->io_base)); lpc32xx_nand_read_byte()
355 *buf++ = (uint8_t)readl(SLC_DATA(host->io_base)); lpc32xx_nand_read_buf()
368 writel((uint32_t)*buf++, SLC_DATA(host->io_base)); lpc32xx_nand_write_buf()
509 writel(readl(SLC_CFG(host->io_base)) | lpc32xx_xfer()
511 SLCCFG_DMA_BURST, SLC_CFG(host->io_base)); lpc32xx_xfer()
513 writel((readl(SLC_CFG(host->io_base)) | lpc32xx_xfer()
516 SLC_CFG(host->io_base)); lpc32xx_xfer()
520 writel(SLCCTRL_ECC_CLEAR, SLC_CTRL(host->io_base)); lpc32xx_xfer()
523 writel(mtd->writesize, SLC_TC(host->io_base)); lpc32xx_xfer()
526 writel(readl(SLC_CTRL(host->io_base)) | SLCCTRL_DMA_START, lpc32xx_xfer()
527 SLC_CTRL(host->io_base)); lpc32xx_xfer()
555 if (readl(SLC_STAT(host->io_base)) & SLCSTAT_DMA_FIFO) { lpc32xx_xfer()
558 while ((readl(SLC_STAT(host->io_base)) & SLCSTAT_DMA_FIFO) && lpc32xx_xfer()
571 readl(SLC_ECC(host->io_base)); lpc32xx_xfer()
576 if (readl(SLC_STAT(host->io_base)) & SLCSTAT_DMA_FIFO || lpc32xx_xfer()
577 readl(SLC_TC(host->io_base))) { lpc32xx_xfer()
584 writel(readl(SLC_CTRL(host->io_base)) & ~SLCCTRL_DMA_START, lpc32xx_xfer()
585 SLC_CTRL(host->io_base)); lpc32xx_xfer()
586 writel(readl(SLC_CFG(host->io_base)) & lpc32xx_xfer()
588 SLCCFG_DMA_BURST), SLC_CFG(host->io_base)); lpc32xx_xfer()
777 host->io_base = devm_ioremap_resource(&pdev->dev, rc); lpc32xx_nand_probe()
778 if (IS_ERR(host->io_base)) lpc32xx_nand_probe()
779 return PTR_ERR(host->io_base); lpc32xx_nand_probe()
816 chip->IO_ADDR_R = SLC_DATA(host->io_base); lpc32xx_nand_probe()
817 chip->IO_ADDR_W = SLC_DATA(host->io_base); lpc32xx_nand_probe()
938 tmp = readl(SLC_CTRL(host->io_base)); lpc32xx_nand_remove()
940 writel(tmp, SLC_CTRL(host->io_base)); lpc32xx_nand_remove()
971 tmp = readl(SLC_CTRL(host->io_base)); lpc32xx_nand_suspend()
973 writel(tmp, SLC_CTRL(host->io_base)); lpc32xx_nand_suspend()
H A Dfsl_upm.c41 void __iomem *io_base; member in struct:fsl_upm_nand
119 chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr]; fun_select_chip()
164 fun->chip.IO_ADDR_R = fun->io_base; fun_chip_init()
165 fun->chip.IO_ADDR_W = fun->io_base; fun_chip_init()
293 fun->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start, fun_probe()
295 if (!fun->io_base) { fun_probe()
H A Datmel_nand.c120 void __iomem *io_base; member in struct:atmel_nand_host
198 writeb(cmd, host->io_base + (1 << host->board.cle)); atmel_nand_cmd_ctrl()
200 writeb(cmd, host->io_base + (1 << host->board.ale)); atmel_nand_cmd_ctrl()
2107 host->io_base = devm_ioremap_resource(&pdev->dev, mem); atmel_nand_probe()
2108 if (IS_ERR(host->io_base)) { atmel_nand_probe()
2109 res = PTR_ERR(host->io_base); atmel_nand_probe()
2132 nand_chip->IO_ADDR_R = host->io_base; atmel_nand_probe()
2133 nand_chip->IO_ADDR_W = host->io_base; atmel_nand_probe()
/linux-4.1.27/drivers/scsi/
H A DNCR_Q720.c148 __u16 io_base; NCR_Q720_probe() local
161 io_base = (pos2 & NCR_Q720_POS2_IO_MASK) << NCR_Q720_POS2_IO_SHIFT; NCR_Q720_probe()
170 io_base = mca_device_transform_ioport(mca_dev, io_base); NCR_Q720_probe()
177 i = inb(io_base) | (inb(io_base+1)<<8); NCR_Q720_probe()
179 printk(KERN_ERR "NCR_Q720, adapter failed to I/O map registers correctly at 0x%x(0x%x)\n", io_base, i); NCR_Q720_probe()
185 pos4 = inb(io_base + 4); NCR_Q720_probe()
188 outb(pos4, io_base + 4); NCR_Q720_probe()
191 asr10 = inb(io_base + 0x12); NCR_Q720_probe()
197 asr9 = inb(io_base + 0x11); NCR_Q720_probe()
210 outb(asr9, io_base + 0x11); NCR_Q720_probe()
236 asr2 = inb(io_base + 0x0a); NCR_Q720_probe()
240 outb(asr2, io_base + 0x0a); NCR_Q720_probe()
287 __u16 port = io_base + NCR_Q720_CHIP_REGISTER_OFFSET NCR_Q720_probe()
H A Din2000.h52 #define read1_io(a) (inb(hostdata->io_base+(a)))
53 #define read2_io(a) (inw(hostdata->io_base+(a)))
54 #define write1_io(b,a) (outb((b),hostdata->io_base+(a)))
55 #define write2_io(w,a) (outw((w),hostdata->io_base+(a)))
282 unsigned short io_base; /* IO port base */ member in struct:IN2000_hostdata
H A Din2000.c658 f = hostdata->io_base + IO_FIFO; in2000_execute()
813 f = hostdata->io_base + IO_FIFO; transfer_bytes()
923 f = hostdata->io_base + IO_FIFO; in2000_intr()
1032 f = hostdata->io_base + IO_FIFO; in2000_intr()
2010 instance->io_port = hostdata->io_base = base; in2000_detect()
2107 printk("dip_switch=%02x irq=%d ioport=%02x floppy=%s sync/DOS5=%s ", (switches & 0x7f), instance->irq, hostdata->io_base, (switches & SW_FLOPPY) ? "Yes" : "No", (switches & SW_SYNC_DOS5) ? "Yes" : "No"); in2000_detect()
2228 seq_printf(m, "\ndip_switch=%02x: irq=%d io=%02x floppy=%s sync/DOS5=%s", (hd->dip_switch & 0x7f), instance->irq, hd->io_base, (hd->dip_switch & 0x40) ? "Yes" : "No", (hd->dip_switch & 0x20) ? "Yes" : "No"); in2000_show_info()
/linux-4.1.27/arch/mips/ar7/
H A Dsetup.c90 unsigned long io_base; plat_mem_setup() local
96 io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000); plat_mem_setup()
97 if (!io_base) plat_mem_setup()
99 set_io_port_base(io_base); plat_mem_setup()
/linux-4.1.27/drivers/mtd/devices/
H A Dspear_smi.c163 * @io_base: base address for registers of SMI.
174 void __iomem *io_base; member in struct:spear_smi
229 ctrlreg1 = readl(dev->io_base + SMI_CR1); spear_smi_read_sr()
231 writel(ctrlreg1 & ~(SW_MODE | WB_MODE), dev->io_base + SMI_CR1); spear_smi_read_sr()
235 dev->io_base + SMI_CR2); spear_smi_read_sr()
248 writel(ctrlreg1, dev->io_base + SMI_CR1); spear_smi_read_sr()
249 writel(0, dev->io_base + SMI_CR2); spear_smi_read_sr()
301 status = readl(dev->io_base + SMI_SR); spear_smi_int_handler()
307 writel(0, dev->io_base + SMI_SR); spear_smi_int_handler()
343 writel(0, dev->io_base + SMI_SR); spear_smi_hw_init()
345 writel(val, dev->io_base + SMI_CR1); spear_smi_hw_init()
387 ctrlreg1 = readl(dev->io_base + SMI_CR1); spear_smi_write_enable()
389 writel(ctrlreg1 & ~SW_MODE, dev->io_base + SMI_CR1); spear_smi_write_enable()
392 writel((bank << BANK_SHIFT) | WE | TFIE, dev->io_base + SMI_CR2); spear_smi_write_enable()
398 writel(ctrlreg1, dev->io_base + SMI_CR1); spear_smi_write_enable()
399 writel(0, dev->io_base + SMI_CR2); spear_smi_write_enable()
460 ctrlreg1 = readl(dev->io_base + SMI_CR1); spear_smi_erase_sector()
461 writel((ctrlreg1 | SW_MODE) & ~WB_MODE, dev->io_base + SMI_CR1); spear_smi_erase_sector()
464 writel(command, dev->io_base + SMI_TR); spear_smi_erase_sector()
467 dev->io_base + SMI_CR2); spear_smi_erase_sector()
479 writel(ctrlreg1, dev->io_base + SMI_CR1); spear_smi_erase_sector()
480 writel(0, dev->io_base + SMI_CR2); spear_smi_erase_sector()
579 ctrlreg1 = val = readl(dev->io_base + SMI_CR1); spear_mtd_read()
584 writel(val, dev->io_base + SMI_CR1); spear_mtd_read()
589 writel(ctrlreg1, dev->io_base + SMI_CR1); spear_mtd_read()
617 ctrlreg1 = readl(dev->io_base + SMI_CR1); spear_smi_cpy_toio()
618 writel((ctrlreg1 | WB_MODE) & ~SW_MODE, dev->io_base + SMI_CR1); spear_smi_cpy_toio()
622 writel(ctrlreg1, dev->io_base + SMI_CR1); spear_smi_cpy_toio()
725 val = readl(dev->io_base + SMI_CR1); spear_smi_probe_flash()
726 writel(val | SW_MODE, dev->io_base + SMI_CR1); spear_smi_probe_flash()
729 writel(OPCODE_RDID, dev->io_base + SMI_TR); spear_smi_probe_flash()
733 writel(val, dev->io_base + SMI_CR2); spear_smi_probe_flash()
744 val = readl(dev->io_base + SMI_RR); spear_smi_probe_flash()
750 val = readl(dev->io_base + SMI_CR1); spear_smi_probe_flash()
751 writel(val & ~SW_MODE, dev->io_base + SMI_CR1); spear_smi_probe_flash()
950 dev->io_base = devm_ioremap_resource(&pdev->dev, smi_base); spear_smi_probe()
951 if (IS_ERR(dev->io_base)) { spear_smi_probe()
952 ret = PTR_ERR(dev->io_base); spear_smi_probe()
/linux-4.1.27/drivers/char/hw_random/
H A Dtimeriomem-rng.c37 void __iomem *io_base; member in struct:timeriomem_rng_private_data
72 *data = readl(priv->io_base); timeriomem_rng_data_read()
161 priv->io_base = devm_ioremap_resource(&pdev->dev, res); timeriomem_rng_probe()
162 if (IS_ERR(priv->io_base)) { timeriomem_rng_probe()
163 err = PTR_ERR(priv->io_base); timeriomem_rng_probe()
174 priv->io_base, period); timeriomem_rng_probe()
/linux-4.1.27/arch/mips/include/asm/txx9/
H A Dpci.h15 unsigned long io_base, unsigned long io_size);
/linux-4.1.27/drivers/platform/x86/
H A Dfujitsu-tablet.c177 int io_base; member in struct:__anon8303
183 return inb(fujitsu.io_base + 2); fujitsu_ack()
188 return inb(fujitsu.io_base + 6); fujitsu_status()
193 outb(addr, fujitsu.io_base); fujitsu_read_register()
194 return inb(fujitsu.io_base + 4); fujitsu_read_register()
442 fujitsu.io_base = res->data.io.minimum; fujitsu_walk_resources()
447 if (fujitsu.irq && fujitsu.io_base) fujitsu_walk_resources()
467 if (ACPI_FAILURE(status) || !fujitsu.irq || !fujitsu.io_base) acpi_fujitsu_add()
481 if (!request_region(fujitsu.io_base, fujitsu.io_length, MODULENAME)) { acpi_fujitsu_add()
491 release_region(fujitsu.io_base, fujitsu.io_length); acpi_fujitsu_add()
502 release_region(fujitsu.io_base, fujitsu.io_length); acpi_fujitsu_remove()
/linux-4.1.27/drivers/of/
H A Dof_pci.c147 * @io_base: pointer to a variable that will contain on return the physical
162 struct list_head *resources, resource_size_t *io_base) of_pci_get_host_bridge_resources()
172 if (io_base) of_pci_get_host_bridge_resources()
173 *io_base = (resource_size_t)OF_BAD_ADDR; of_pci_get_host_bridge_resources()
230 if (!io_base) { of_pci_get_host_bridge_resources()
231 pr_err("I/O range found for %s. Please provide an io_base pointer to save CPU base address\n", of_pci_get_host_bridge_resources()
236 if (*io_base != (resource_size_t)OF_BAD_ADDR) of_pci_get_host_bridge_resources()
239 *io_base = range.cpu_addr; of_pci_get_host_bridge_resources()
160 of_pci_get_host_bridge_resources(struct device_node *dev, unsigned char busno, unsigned char bus_max, struct list_head *resources, resource_size_t *io_base) of_pci_get_host_bridge_resources() argument
/linux-4.1.27/arch/arm/plat-omap/include/plat/
H A Ddmtimer.h107 void __iomem *io_base; member in struct:omap_dm_timer
186 * is samae as io_base for v1 and io_base + 0x14 for v2 ip.
304 tidr = readl_relaxed(timer->io_base); __omap_dm_timer_init_regs()
307 timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET; __omap_dm_timer_init_regs()
308 timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; __omap_dm_timer_init_regs()
309 timer->irq_dis = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET; __omap_dm_timer_init_regs()
310 timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET; __omap_dm_timer_init_regs()
311 timer->func_base = timer->io_base; __omap_dm_timer_init_regs()
314 timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS; __omap_dm_timer_init_regs()
315 timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET; __omap_dm_timer_init_regs()
316 timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR; __omap_dm_timer_init_regs()
317 timer->pend = timer->io_base + __omap_dm_timer_init_regs()
320 timer->func_base = timer->io_base + OMAP_TIMER_V2_FUNC_OFFSET; __omap_dm_timer_init_regs()
/linux-4.1.27/arch/mips/ath79/
H A Dpci.c151 res[2].name = "io_base"; ath79_register_pci_ar71xx()
173 unsigned long io_base, ath79_register_pci_ar724x()
200 res[4].name = "io_base"; ath79_register_pci_ar724x()
202 res[4].start = io_base; ath79_register_pci_ar724x()
203 res[4].end = io_base; ath79_register_pci_ar724x()
167 ath79_register_pci_ar724x(int id, unsigned long cfg_base, unsigned long ctrl_base, unsigned long crp_base, unsigned long mem_base, unsigned long mem_size, unsigned long io_base, int irq) ath79_register_pci_ar724x() argument
/linux-4.1.27/arch/mips/txx9/generic/
H A Dpci.c110 * mem_base, io_base: physical address. 0 for auto assignment.
117 unsigned long io_base, unsigned long io_size) txx9_alloc_pci_controller()
175 if (io_base) { txx9_alloc_pci_controller()
176 pcic->mem_resource[1].start = io_base; txx9_alloc_pci_controller()
177 pcic->mem_resource[1].end = io_base + io_size - 1; txx9_alloc_pci_controller()
194 io_base = pcic->mem_resource[1].start; txx9_alloc_pci_controller()
208 io_base - (mips_io_port_base - IO_BASE); txx9_alloc_pci_controller()
209 pcic->io_offset = io_base - (mips_io_port_base - IO_BASE); txx9_alloc_pci_controller()
115 txx9_alloc_pci_controller(struct pci_controller *pcic, unsigned long mem_base, unsigned long mem_size, unsigned long io_base, unsigned long io_size) txx9_alloc_pci_controller() argument
/linux-4.1.27/arch/powerpc/sysdev/
H A Dfsl_lbc.c148 * @io_base: remapped pointer to where memory access should happen
151 * This function triggers dummy write to the memory specified by the io_base,
155 int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar) fsl_upm_run_pattern() argument
169 out_8(io_base, 0x0); fsl_upm_run_pattern()
172 out_be16(io_base, 0x0); fsl_upm_run_pattern()
175 out_be32(io_base, 0x0); fsl_upm_run_pattern()
/linux-4.1.27/sound/soc/omap/
H A Domap-dmic.c49 void __iomem *io_base; member in struct:omap_dmic
65 writel_relaxed(val, dmic->io_base + reg); omap_dmic_write()
70 return readl_relaxed(dmic->io_base + reg); omap_dmic_read()
485 dmic->io_base = devm_ioremap_resource(&pdev->dev, res); asoc_dmic_probe()
486 if (IS_ERR(dmic->io_base)) asoc_dmic_probe()
487 return PTR_ERR(dmic->io_base); asoc_dmic_probe()
H A Domap-mcpdm.c55 void __iomem *io_base; member in struct:omap_mcpdm
78 writel_relaxed(val, mcpdm->io_base + reg); omap_mcpdm_write()
83 return readl_relaxed(mcpdm->io_base + reg); omap_mcpdm_read()
487 mcpdm->io_base = devm_ioremap_resource(&pdev->dev, res); asoc_mcpdm_probe()
488 if (IS_ERR(mcpdm->io_base)) asoc_mcpdm_probe()
489 return PTR_ERR(mcpdm->io_base); asoc_mcpdm_probe()
H A Dmcbsp.c35 void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; omap_mcbsp_write()
48 void __iomem *addr = mcbsp->io_base + reg * mcbsp->pdata->reg_step; omap_mcbsp_read()
983 mcbsp->io_base = devm_ioremap(&pdev->dev, res->start, omap_mcbsp_init()
985 if (!mcbsp->io_base) omap_mcbsp_init()
H A Dmcbsp.h297 void __iomem *io_base; member in struct:omap_mcbsp
/linux-4.1.27/arch/arm/mach-orion5x/
H A Dts78xx-setup.c204 void __iomem *io_base = chip->IO_ADDR_W; ts78xx_ts_nand_write_buf() local
210 writesb(io_base, buf, sz); ts78xx_ts_nand_write_buf()
218 writesl(io_base, buf32, sz); ts78xx_ts_nand_write_buf()
224 writesb(io_base, buf, len); ts78xx_ts_nand_write_buf()
231 void __iomem *io_base = chip->IO_ADDR_R; ts78xx_ts_nand_read_buf() local
237 readsb(io_base, buf, sz); ts78xx_ts_nand_read_buf()
245 readsl(io_base, buf32, sz); ts78xx_ts_nand_read_buf()
251 readsb(io_base, buf, len); ts78xx_ts_nand_read_buf()
/linux-4.1.27/include/linux/mfd/
H A Dkempld.h80 * @io_base: Pointer to the IO memory
90 void __iomem *io_base; member in struct:kempld_device_data
/linux-4.1.27/include/linux/
H A Dof_pci.h61 struct list_head *resources, resource_size_t *io_base); of_pci_dma_configure()
/linux-4.1.27/drivers/video/fbdev/
H A Digafb.c65 unsigned long io_base; member in struct:iga_par
174 #define pci_inb(par, reg) readb(par->io_base+(reg))
175 #define pci_outb(par, val, reg) writeb(val, par->io_base+(reg))
449 if ((par->io_base = (int) ioremap(igafb_fix.mmio_start, igafb_fix.smem_len)) == 0) { igafb_init()
468 iounmap((void *)par->io_base); igafb_init()
529 iounmap((void *)par->io_base); igafb_init()
/linux-4.1.27/drivers/ide/
H A Dide-cs.c193 unsigned long io_base, ctl_base; ide_config() local
207 io_base = link->resource[0]->start; ide_config()
227 host = idecs_register(io_base, ctl_base, link->irq, link); ide_config()
230 host = idecs_register(io_base + 0x10, ctl_base + 0x10, ide_config()
H A Dhpt366.c911 unsigned long io_base = pci_resource_start(dev, 4); init_chipset_hpt366() local
943 outb(0x0e, io_base + 0x9c); init_chipset_hpt366()
970 unsigned long io_base = pci_resource_start(dev1, 4); init_chipset_hpt366() local
972 temp = inl(io_base + 0x90); init_chipset_hpt366()
975 temp = inl(io_base + 0x90); init_chipset_hpt366()
1146 outb(inb(io_base + 0x9c) | 0x04, io_base + 0x9c); init_chipset_hpt366()
/linux-4.1.27/drivers/i2c/busses/
H A Di2c-pca-platform.c36 unsigned long io_base; member in struct:i2c_pca_pf_data
169 i2c->io_base = res->start; i2c_pca_pf_probe()
272 release_mem_region(i2c->io_base, i2c->io_size); i2c_pca_pf_remove()
/linux-4.1.27/drivers/pci/host/
H A Dpci-xgene.c270 resource_size_t io_base) xgene_pcie_map_ranges()
284 xgene_pcie_setup_ob_reg(port, res, OMR3BARL, io_base, resource_list_for_each_entry()
286 ret = pci_remap_iospace(res, io_base); resource_list_for_each_entry()
443 resource_size_t io_base) xgene_pcie_setup()
454 ret = xgene_pcie_map_ranges(port, res, io_base); xgene_pcie_setup()
268 xgene_pcie_map_ranges(struct xgene_pcie_port *port, struct list_head *res, resource_size_t io_base) xgene_pcie_map_ranges() argument
441 xgene_pcie_setup(struct xgene_pcie_port *port, struct list_head *res, resource_size_t io_base) xgene_pcie_setup() argument
H A Dpcie-designware.h37 u64 io_base; member in struct:pcie_port
H A Dpcie-designware.c399 pp->io_base = range.cpu_addr; dw_pcie_host_init()
712 pci_ioremap_io(global_io_offset, pp->io_base); dw_pcie_setup()
/linux-4.1.27/sound/drivers/
H A Dserial-u16550.c331 unsigned long io_base = uart->base; snd_uart16550_detect() local
336 if (io_base == 0 || io_base == SNDRV_AUTO_PORT) { snd_uart16550_detect()
340 uart->res_base = request_region(io_base, 8, "Serial MIDI"); snd_uart16550_detect()
342 snd_printk(KERN_ERR "u16550: can't grab port 0x%lx\n", io_base); snd_uart16550_detect()
349 outb(UART_LCR_WLEN8, io_base + UART_LCR); /* Line Control Register */ snd_uart16550_detect()
350 c = inb(io_base + UART_IER); snd_uart16550_detect()
355 outb(0xaa, io_base + UART_SCR); snd_uart16550_detect()
357 c = inb(io_base + UART_SCR); snd_uart16550_detect()
362 outb(0x55, io_base + UART_SCR); snd_uart16550_detect()
364 c = inb(io_base + UART_SCR); snd_uart16550_detect()
/linux-4.1.27/sound/pci/ctxfi/
H A Dcthw20k1.c1805 unsigned int io_base; uaa_to_xfi() local
1817 io_base = pci_resource_start(pci, 0); uaa_to_xfi()
1818 mem_base = ioremap(io_base, pci_resource_len(pci, 0)); uaa_to_xfi()
1922 if (!hw->io_base) { hw_card_start()
1928 hw->io_base = pci_resource_start(pci, 5); hw_card_start()
1930 hw->io_base = pci_resource_start(pci, 0); hw_card_start()
1959 hw->io_base = 0; hw_card_start()
1991 if (hw->io_base) hw_card_shutdown()
1994 hw->io_base = 0; hw_card_shutdown()
2116 outl(reg, hw->io_base + 0x0); hw_read_20kx()
2117 value = inl(hw->io_base + 0x4); hw_read_20kx()
2130 outl(reg, hw->io_base + 0x0); hw_write_20kx()
2131 outl(data, hw->io_base + 0x4); hw_write_20kx()
2144 outl(reg, hw->io_base + 0x10); hw_read_pci()
2145 value = inl(hw->io_base + 0x14); hw_read_pci()
2158 outl(reg, hw->io_base + 0x10); hw_write_pci()
2159 outl(data, hw->io_base + 0x14); hw_write_pci()
2289 if (hw->io_base) destroy_20k1_hw_obj()
H A Dcthardware.h190 unsigned long io_base; member in struct:hw
H A Dcthw20k2.c2047 if (!hw->io_base) { hw_card_start()
2052 hw->io_base = pci_resource_start(hw->pci, 2); hw_card_start()
2053 hw->mem_base = ioremap(hw->io_base, hw_card_start()
2086 hw->io_base = 0; hw_card_start()
2116 if (hw->io_base) hw_card_shutdown()
2119 hw->io_base = 0; hw_card_shutdown()
2355 if (hw->io_base) destroy_20k2_hw_obj()
/linux-4.1.27/drivers/crypto/
H A Dimg-hash.c120 void __iomem *io_base; member in struct:img_hash_dev
149 return readl_relaxed(hdev->io_base + offset); img_hash_read()
155 writel_relaxed(value, hdev->io_base + offset); img_hash_write()
905 hdev->io_base = devm_ioremap_resource(dev, hash_res); img_hash_probe()
906 if (IS_ERR(hdev->io_base)) { img_hash_probe()
907 err = PTR_ERR(hdev->io_base); img_hash_probe()
H A Domap-aes.c148 void __iomem *io_base; member in struct:omap_aes_dev
198 _read_ret = __raw_readl(dd->io_base + offset); \
206 return __raw_readl(dd->io_base + offset); omap_aes_read()
215 __raw_writel(value, dd->io_base + offset); \
221 __raw_writel(value, dd->io_base + offset); omap_aes_write()
1192 dd->io_base = devm_ioremap_resource(dev, &res); omap_aes_probe()
1193 if (IS_ERR(dd->io_base)) { omap_aes_probe()
1194 err = PTR_ERR(dd->io_base); omap_aes_probe()
H A Domap-des.c129 void __iomem *io_base; member in struct:omap_des_dev
179 _read_ret = __raw_readl(dd->io_base + offset); \
187 return __raw_readl(dd->io_base + offset); omap_des_read()
196 __raw_writel(value, dd->io_base + offset); \
202 __raw_writel(value, dd->io_base + offset); omap_des_write()
1081 dd->io_base = devm_ioremap_resource(dev, res); omap_des_probe()
1082 if (IS_ERR(dd->io_base)) { omap_des_probe()
1083 err = PTR_ERR(dd->io_base); omap_des_probe()
H A Datmel-aes.c103 void __iomem *io_base; member in struct:atmel_aes_dev
217 return readl_relaxed(dd->io_base + offset); atmel_aes_read()
223 writel_relaxed(value, dd->io_base + offset); atmel_aes_write()
1398 aes_dd->io_base = devm_ioremap_resource(&pdev->dev, aes_res); atmel_aes_probe()
1399 if (!aes_dd->io_base) { atmel_aes_probe()
H A Datmel-sha.c120 void __iomem *io_base; member in struct:atmel_sha_dev
149 return readl_relaxed(dd->io_base + offset); atmel_sha_read()
155 writel_relaxed(value, dd->io_base + offset); atmel_sha_write()
1407 sha_dd->io_base = devm_ioremap_resource(&pdev->dev, sha_res); atmel_sha_probe()
1408 if (!sha_dd->io_base) { atmel_sha_probe()
H A Datmel-tdes.c96 void __iomem *io_base; member in struct:atmel_tdes_dev
183 return readl_relaxed(dd->io_base + offset); atmel_tdes_read()
189 writel_relaxed(value, dd->io_base + offset); atmel_tdes_write()
1419 tdes_dd->io_base = devm_ioremap_resource(&pdev->dev, tdes_res); atmel_tdes_probe()
1420 if (!tdes_dd->io_base) { atmel_tdes_probe()
H A Domap-sham.c218 void __iomem *io_base; member in struct:omap_sham_dev
247 return __raw_readl(dd->io_base + offset); omap_sham_read()
253 __raw_writel(value, dd->io_base + offset); omap_sham_write()
1921 dd->io_base = devm_ioremap_resource(dev, &res); omap_sham_probe()
1922 if (IS_ERR(dd->io_base)) { omap_sham_probe()
1923 err = PTR_ERR(dd->io_base); omap_sham_probe()
/linux-4.1.27/drivers/gpu/drm/qxl/
H A Dqxl_kms.c139 qdev->io_base = pci_resource_start(pdev, 3); qxl_device_init()
194 qdev->io_base + QXL_IO_NOTIFY_CMD, qxl_device_init()
202 qdev->io_base + QXL_IO_NOTIFY_CMD, qxl_device_init()
H A Dqxl_irq.c67 outb(0, qdev->io_base + QXL_IO_UPDATE_IRQ); qxl_irq_handler()
H A Dqxl_cmd.c284 long addr = qdev->io_base + port; wait_for_io_cmd_user()
360 outb(0, qdev->io_base + QXL_IO_NOTIFY_OOM); qxl_io_notify_oom()
365 outb(0, qdev->io_base + QXL_IO_FLUSH_RELEASE); qxl_io_flush_release()
419 outb(0, qdev->io_base + QXL_IO_LOG); qxl_io_log()
424 outb(0, qdev->io_base + QXL_IO_RESET); qxl_io_reset()
H A Dqxl_drv.h260 int io_base; member in struct:qxl_device
/linux-4.1.27/arch/mips/include/asm/netlogic/
H A Dpsb-bootinfo.h40 uint64_t io_base; member in struct:psb_info
/linux-4.1.27/drivers/ata/
H A Dpata_pcmcia.c204 unsigned long io_base, ctl_base; pcmcia_init_one() local
224 io_base = pdev->resource[0]->start; pcmcia_init_one()
239 io_addr = devm_ioport_map(&pdev->dev, io_base, 8); pcmcia_init_one()
276 ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io_base, ctl_base); pcmcia_init_one()
H A Dpata_hpt37x.c707 unsigned long io_base = pci_resource_start(pdev, 4); hpt374_read_freq() local
716 io_base = pci_resource_start(pdev_0, 4); hpt374_read_freq()
717 freq = inl(io_base + 0x90); hpt374_read_freq()
720 freq = inl(io_base + 0x90); hpt374_read_freq()
/linux-4.1.27/sound/soc/dwc/
H A Ddesignware_i2s.c105 static inline void i2s_write_reg(void __iomem *io_base, int reg, u32 val) i2s_write_reg() argument
107 writel(val, io_base + reg); i2s_write_reg()
110 static inline u32 i2s_read_reg(void __iomem *io_base, int reg) i2s_read_reg() argument
112 return readl(io_base + reg); i2s_read_reg()
/linux-4.1.27/drivers/scsi/arm/
H A Darxescsi.c117 void __iomem *base = info->info.scsi.io_base; arxescsi_dma_pseudo()
280 info->info.scsi.io_base = base + 0x2000; arxescsi_probe()
H A Dpowertec.c333 info->info.scsi.io_base = base + POWERTEC_FAS216_OFFSET; powertecscsi_probe()
H A Dcumana_2.c408 info->info.scsi.io_base = base + CUMANASCSI2_FAS216_OFFSET; cumanascsi2_probe()
H A Deesox.c527 info->info.scsi.io_base = base + EESOX_FAS216_OFFSET; eesoxscsi_probe()
H A Dfas216.h237 void __iomem *io_base; /* iomem base of FAS216 */ member in struct:__anon8651::__anon8652
H A Dfas216.c145 return readb(info->scsi.io_base + off); fas216_readb()
151 writeb(val, info->scsi.io_base + off); fas216_writeb()
2963 info->scsi.type, info->scsi.io_base, fas216_print_host()
/linux-4.1.27/arch/mips/pci/
H A Dops-tx3927.c133 unsigned long io_base = tx3927_pcic_setup() local
162 tx3927_pcicptr->ilbioma = io_base; tx3927_pcic_setup()
H A Dpci-ar71xx.c361 res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); ar71xx_pci_probe()
H A Dpci-ar724x.c362 res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); ar724x_pci_probe()
/linux-4.1.27/arch/arm/mach-cns3xxx/
H A Dpcie.c227 u16 io_base = cnspci->res_io.start >> 16; cns3xxx_pcie_hw_init() local
244 pci_bus_write_config_word(&bus, devfn, PCI_IO_BASE_UPPER16, io_base); cns3xxx_pcie_hw_init()
/linux-4.1.27/drivers/net/ethernet/ti/
H A Dtlan.c2017 * io_base Base IO port of the device of
2025 static void tlan_print_dio(u16 io_base) tlan_print_dio() argument
2031 io_base); tlan_print_dio()
2034 data0 = tlan_dio_read32(io_base, i); tlan_print_dio()
2035 data1 = tlan_dio_read32(io_base, i + 0x4); tlan_print_dio()
3088 * io_base The IO port base address for the
3097 static void tlan_ee_send_start(u16 io_base) tlan_ee_send_start() argument
3101 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR); tlan_ee_send_start()
3102 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO; tlan_ee_send_start()
3120 * Parms: io_base The IO port base address for the
3137 static int tlan_ee_send_byte(u16 io_base, u8 data, int stop) tlan_ee_send_byte() argument
3143 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR); tlan_ee_send_byte()
3144 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO; tlan_ee_send_byte()
3181 * io_base The IO port base address for the
3199 static void tlan_ee_receive_byte(u16 io_base, u8 *data, int stop) tlan_ee_receive_byte() argument
3204 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR); tlan_ee_receive_byte()
3205 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO; tlan_ee_receive_byte()
3244 * io_base The IO port base address for the
/linux-4.1.27/drivers/media/platform/s3c-camif/
H A Dcamif-core.c440 camif->io_base = devm_ioremap_resource(dev, mres); s3c_camif_probe()
441 if (IS_ERR(camif->io_base)) s3c_camif_probe()
442 return PTR_ERR(camif->io_base); s3c_camif_probe()
H A Dcamif-regs.c16 #define camif_write(_camif, _off, _val) writel(_val, (_camif)->io_base + (_off))
17 #define camif_read(_camif, _off) readl((_camif)->io_base + (_off))
603 u32 cfg = readl(camif->io_base + registers[i].offset); camif_hw_dump_regs()
H A Dcamif-core.h264 * @io_base: start address of the mmaped CAMIF registers
302 void __iomem *io_base; member in struct:camif_dev
H A Dcamif-regs.h265 return readl(vp->camif->io_base + S3C_CAMIF_REG_CISTATUS(vp->id, camif_hw_get_status()
/linux-4.1.27/drivers/tty/
H A Dsynclink.c260 unsigned int io_base; /* base I/O address of adapter */ member in struct:mgsl_struct
1460 outw( (inw(info->io_base + CCAR) & 0x0780) | (RDR+LSBONLY), mgsl_isr_receive_data()
1461 info->io_base + CCAR ); mgsl_isr_receive_data()
1462 DataByte = inb( info->io_base + CCAR ); mgsl_isr_receive_data()
3464 info->device_name, info->io_base, info->irq_level, line_info()
3468 info->device_name, info->io_base, line_info()
3540 u16 Ccar = inw( info->io_base + CCAR ); line_info()
4068 if (request_region(info->io_base,info->io_addr_size,"synclink") == NULL) { mgsl_claim_resources()
4070 __FILE__,__LINE__,info->device_name, info->io_base); mgsl_claim_resources()
4169 release_region(info->io_base,info->io_addr_size); mgsl_release_resources()
4246 info->hw_version + 1, info->device_name, info->io_base, info->irq_level, mgsl_add_device()
4251 info->device_name, info->io_base, info->irq_level, info->dma_level, mgsl_add_device()
4392 info->io_base = (unsigned int)io[i]; mgsl_enum_isa_devices()
4496 outw( Cmd + info->loopback_bits, info->io_base + CCAR ); usc_RTCmd()
4500 inw( info->io_base + CCAR ); usc_RTCmd()
4521 outw( Cmd + info->mbre_bit, info->io_base ); usc_DmaCmd()
4525 inw( info->io_base ); usc_DmaCmd()
4550 outw( RegAddr + info->mbre_bit, info->io_base ); usc_OutDmaReg()
4551 outw( RegValue, info->io_base ); usc_OutDmaReg()
4555 inw( info->io_base ); usc_OutDmaReg()
4579 outw( RegAddr + info->mbre_bit, info->io_base ); usc_InDmaReg()
4580 return inw( info->io_base ); usc_InDmaReg()
4603 outw( RegAddr + info->loopback_bits, info->io_base + CCAR ); usc_OutReg()
4604 outw( RegValue, info->io_base + CCAR ); usc_OutReg()
4608 inw( info->io_base + CCAR ); usc_OutReg()
4628 outw( RegAddr + info->loopback_bits, info->io_base + CCAR ); usc_InReg()
4629 return inw( info->io_base + CCAR ); usc_InReg()
5063 outw( 0, info->io_base ); /* clear Master Bus Enable (DCAR) */ usc_set_sdlc_mode()
5066 outw( BIT8, info->io_base ); /* set Master Bus Enable (DCAR) */ usc_set_sdlc_mode()
5256 outw( 0x0300, info->io_base + CCAR ); usc_enable_loopback()
5263 outw( 0,info->io_base + CCAR ); usc_enable_loopback()
5733 outw( *((u16 *)TwoBytes), info->io_base + DATAREG); usc_load_txfifo()
5740 outw( (inw( info->io_base + CCAR) & 0x0780) | (TDR+LSBONLY), usc_load_txfifo()
5741 info->io_base + CCAR ); usc_load_txfifo()
5745 outw( info->x_char,info->io_base + CCAR ); usc_load_txfifo()
5748 outw( info->xmit_buf[info->xmit_tail++],info->io_base + CCAR ); usc_load_txfifo()
5803 outb( 0,info->io_base + 8 ); usc_reset()
5823 * By writing to io_base + SDPIN the Wait/Ack pin is usc_reset()
5827 outw( 0x000c,info->io_base + SDPIN ); usc_reset()
5830 outw( 0,info->io_base ); usc_reset()
5831 outw( 0,info->io_base + CCAR ); usc_reset()
5886 outw( 0, info->io_base ); /* clear Master Bus Enable (DCAR) */ usc_set_async_mode()
6058 outw(0x0300, info->io_base + CCAR); usc_set_async_mode()
6120 outw(0,info->io_base + DATAREG); usc_loopback_frame()
7370 __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) ); mgsl_adapter_test()
8027 dev->base_addr = info->io_base; hdlcdev_init()
8085 info->io_base = pci_resource_start(dev, 2); synclink_init_one()
/linux-4.1.27/drivers/mfd/
H A Dkempld-core.c461 pld->io_base = devm_ioport_map(dev, ioport->start, kempld_probe()
463 if (!pld->io_base) kempld_probe()
466 pld->io_index = pld->io_base; kempld_probe()
467 pld->io_data = pld->io_base + 1; kempld_probe()
/linux-4.1.27/drivers/pci/hotplug/
H A Dcpqphp_pci.c1252 u16 io_base = readw(one_slot + IO_BASE); cpqhp_find_available_resources() local
1260 dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length, cpqhp_find_available_resources()
1304 temp_dword = io_base + io_length; cpqhp_find_available_resources()
1306 if ((io_base) && (temp_dword < 0x10000)) { cpqhp_find_available_resources()
1311 io_node->base = io_base; cpqhp_find_available_resources()
H A Dcpqphp.h215 u16 io_base; member in struct:slot_rt
231 IO_BASE = offsetof(struct slot_rt, io_base),
H A Dibmphp_pci.c572 u8 io_base; configure_bridge() local
950 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_IO_BASE, &io_base); configure_bridge()
953 if ((io_base & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) { configure_bridge()
968 debug ("io_base = %x\n", (temp & PCI_IO_RANGE_TYPE_MASK) << 8); configure_bridge()
/linux-4.1.27/arch/arm/mach-omap2/
H A Dtimer.c256 timer->io_base = of_iomap(np, 0); omap_dm_timer_init_one()
286 timer->io_base = ioremap(mem.start, mem.end - mem.start); omap_dm_timer_init_one()
289 if (!timer->io_base) omap_dm_timer_init_one()
/linux-4.1.27/arch/arm/plat-omap/
H A Ddmtimer.c831 timer->io_base = devm_ioremap_resource(dev, mem); omap_dm_timer_probe()
832 if (IS_ERR(timer->io_base)) omap_dm_timer_probe()
833 return PTR_ERR(timer->io_base); omap_dm_timer_probe()
/linux-4.1.27/sound/pci/
H A Dazt3328.c265 unsigned long io_base; /* keep first! (avoid offset calc) */ member in struct:snd_azf3328_codec_data
357 outb(value, codec->io_base + reg); snd_azf3328_codec_outb()
363 return inb(codec->io_base + reg); snd_azf3328_codec_inb()
372 outw(value, codec->io_base + reg); snd_azf3328_codec_outw()
378 return inw(codec->io_base + reg); snd_azf3328_codec_inw()
387 outl(value, codec->io_base + reg); snd_azf3328_codec_outl()
395 unsigned long addr = codec->io_base + reg; snd_azf3328_codec_outl_multi()
408 return inl(codec->io_base + reg); snd_azf3328_codec_inl()
2443 codec_setup->io_base = chip->ctrl_io + AZF_IO_OFFS_CODEC_PLAYBACK; snd_azf3328_create()
2449 codec_setup->io_base = chip->ctrl_io + AZF_IO_OFFS_CODEC_CAPTURE; snd_azf3328_create()
2455 codec_setup->io_base = chip->ctrl_io + AZF_IO_OFFS_CODEC_I2S_OUT; snd_azf3328_create()
/linux-4.1.27/drivers/net/ethernet/intel/igbvf/
H A Dvf.h242 unsigned long io_base; member in struct:e1000_hw
/linux-4.1.27/drivers/net/ethernet/broadcom/
H A Dcnic_if.h197 void __iomem *io_base; member in struct:cnic_eth_dev
H A Dcnic.c5314 dev->regview = ethdev->io_base; cnic_start_hw()
H A Dbnx2.c430 cp->io_base = bp->regview; bnx2_cnic_probe()
/linux-4.1.27/drivers/staging/comedi/drivers/
H A Dadl_pci9111.c141 static void plx9050_interrupt_control(unsigned long io_base, plx9050_interrupt_control() argument
162 outb(flags, io_base + PLX9052_INTCSR); plx9050_interrupt_control()
/linux-4.1.27/drivers/net/ethernet/intel/igb/
H A De1000_hw.h536 unsigned long io_base; member in struct:e1000_hw
/linux-4.1.27/arch/powerpc/include/asm/
H A Dfsl_lbc.h305 extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base,
/linux-4.1.27/drivers/char/pcmcia/
H A Dsynclink_cs.c201 unsigned int io_base; /* base I/O address of adapter */ member in struct:_mgslpc_info
321 #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
322 #define read_reg(info, reg) inb((info)->io_base + (reg))
324 #define read_reg16(info, reg) inw((info)->io_base + (reg))
325 #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
600 info->io_base = link->resource[0]->start; mgslpc_config()
2566 info->device_name, info->io_base, info->irq_level); line_info()
2746 info->device_name, info->io_base, info->irq_level); mgslpc_add_device()
3818 __FILE__, __LINE__, info->device_name, (unsigned short)(info->io_base)); adapter_test()
4301 dev->base_addr = info->io_base; hdlcdev_init()
/linux-4.1.27/drivers/net/ethernet/intel/ixgb/
H A Dixgb_hw.h692 unsigned long io_base; /* Our I/O mapped location */ member in struct:ixgb_hw
H A Dixgb_main.c454 adapter->hw.io_base = pci_resource_start(pdev, i); ixgb_probe()
/linux-4.1.27/drivers/net/ethernet/intel/e1000/
H A De1000_hw.c4900 unsigned long io_addr = hw->io_base; e1000_write_reg_io()
4901 unsigned long io_data = hw->io_base + 4; e1000_write_reg_io()
H A De1000_hw.h1372 unsigned long io_base; member in struct:e1000_hw
H A De1000_main.c1003 hw->io_base = pci_resource_start(pdev, i); e1000_probe()
/linux-4.1.27/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_main.c14488 cp->io_base = bp->regview; bnx2x_cnic_probe()

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