Searched refs:emac_base (Results 1 – 4 of 4) sorted by relevance
/linux-4.1.27/drivers/net/ethernet/ti/ |
D | davinci_emac.c | 331 void __iomem *emac_base; member 376 #define emac_read(reg) ioread32(priv->emac_base + (reg)) 377 #define emac_write(reg, val) iowrite32(val, priv->emac_base + (reg)) 2013 priv->emac_base = priv->remap_addr + pdata->ctrl_reg_offset; in davinci_emac_probe() 2022 dma_params.dmaregs = priv->emac_base; in davinci_emac_probe() 2023 dma_params.rxthresh = priv->emac_base + 0x120; in davinci_emac_probe() 2024 dma_params.rxfree = priv->emac_base + 0x140; in davinci_emac_probe() 2025 dma_params.txhdp = priv->emac_base + 0x600; in davinci_emac_probe() 2026 dma_params.rxhdp = priv->emac_base + 0x620; in davinci_emac_probe() 2027 dma_params.txcp = priv->emac_base + 0x640; in davinci_emac_probe() [all …]
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/linux-4.1.27/drivers/net/ethernet/broadcom/bnx2x/ |
D | bnx2x_link.c | 1422 u32 emac_base) in bnx2x_set_mdio_clk() argument 1429 cur_mode = REG_RD(bp, emac_base + EMAC_REG_EMAC_MDIO_MODE); in bnx2x_set_mdio_clk() 1447 REG_WR(bp, emac_base + EMAC_REG_EMAC_MDIO_MODE, new_mode); in bnx2x_set_mdio_clk() 1481 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_emac_init() local 1493 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE); in bnx2x_emac_init() 1498 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE); in bnx2x_emac_init() 1817 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_emac_enable() local 1847 bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_RX_MODE, in bnx2x_emac_enable() 1849 bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_TX_MODE, in bnx2x_emac_enable() 1853 bnx2x_bits_dis(bp, emac_base + EMAC_REG_EMAC_RX_MODE, in bnx2x_emac_enable() [all …]
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D | bnx2x.h | 219 #define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg) 220 #define EMAC_WR(bp, reg, val) REG_WR(bp, emac_base + reg, val)
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D | bnx2x_main.c | 9026 u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; in bnx2x_send_unload_req() local
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