| /linux-4.1.27/include/uapi/linux/hdlc/ |
| D | ioctl.h | 41 unsigned int clock_type; /* internal, external, TX-internal etc. */ member
47 unsigned int clock_type; /* internal, external, TX-internal etc. */ member
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| /linux-4.1.27/tools/testing/selftests/timers/ |
| D | inconsistency-check.c | 105 int consistency_test(int clock_type, unsigned long seconds) in consistency_test() argument
113 clock_gettime(clock_type, &list[0]); in consistency_test()
125 clock_gettime(clock_type, &list[i]); in consistency_test()
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| /linux-4.1.27/drivers/net/wan/ |
| D | c101.c | 158 switch(port->settings.clock_type) { in c101_set_iface()
265 if (new_line.clock_type != CLOCK_EXT && in c101_ioctl()
266 new_line.clock_type != CLOCK_TXFROMRX && in c101_ioctl()
267 new_line.clock_type != CLOCK_INT && in c101_ioctl()
268 new_line.clock_type != CLOCK_TXINT) in c101_ioctl()
380 card->settings.clock_type = CLOCK_EXT; in c101_run()
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| D | pci200syn.c | 129 switch(port->settings.clock_type) { in pci200_set_iface()
221 if (new_line.clock_type != CLOCK_EXT && in pci200_ioctl()
222 new_line.clock_type != CLOCK_TXFROMRX && in pci200_ioctl()
223 new_line.clock_type != CLOCK_INT && in pci200_ioctl()
224 new_line.clock_type != CLOCK_TXINT) in pci200_ioctl()
398 port->settings.clock_type = CLOCK_EXT; in pci200_pci_init_one()
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| D | pc300too.c | 130 switch(port->settings.clock_type) { in pc300_set_iface()
246 if (new_line.clock_type != CLOCK_EXT && in pc300_ioctl()
247 new_line.clock_type != CLOCK_TXFROMRX && in pc300_ioctl()
248 new_line.clock_type != CLOCK_INT && in pc300_ioctl()
249 new_line.clock_type != CLOCK_TXINT) in pc300_ioctl()
458 port->settings.clock_type = CLOCK_EXT; in pc300_pci_init_one()
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| D | n2.c | 176 switch(port->settings.clock_type) { in n2_set_iface()
283 if (new_line.clock_type != CLOCK_EXT && in n2_ioctl()
284 new_line.clock_type != CLOCK_TXFROMRX && in n2_ioctl()
285 new_line.clock_type != CLOCK_INT && in n2_ioctl()
286 new_line.clock_type != CLOCK_TXINT) in n2_ioctl()
473 port->settings.clock_type = CLOCK_EXT; in n2_run()
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| D | wanxl.c | 62 unsigned int clock_type; member
359 line.clock_type = get_status(port)->clocking; in wanxl_ioctl()
377 if (line.clock_type != CLOCK_EXT && in wanxl_ioctl()
378 line.clock_type != CLOCK_TXFROMRX) in wanxl_ioctl()
384 get_status(port)->clocking = line.clock_type; in wanxl_ioctl()
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| D | ixp4xx_hss.c | 266 unsigned int clock_type, clock_rate, loopback; member
403 if (port->clock_type == CLOCK_INT) in hss_config()
1265 new_line.clock_type = port->clock_type; in hss_hdlc_ioctl()
1279 clk = new_line.clock_type; in hss_hdlc_ioctl()
1289 port->clock_type = clk; /* Update settings */ in hss_hdlc_ioctl()
1355 port->clock_type = CLOCK_EXT; in hss_init_one()
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| D | farsync.c | 1910 switch (sync.clock_type) { in fst_set_iface()
1969 sync.clock_type = FST_RDB(card, portConfig[i].internalClock) == in fst_get_iface()
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| D | dscc4.c | 998 if (settings->loopback && (settings->clock_type != CLOCK_INT)) { in dscc4_loopback_check()
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| /linux-4.1.27/arch/x86/platform/uv/ |
| D | bios_uv.c | 160 s64 uv_bios_freq_base(u64 clock_type, u64 *ticks_per_second) in uv_bios_freq_base() argument
162 return uv_bios_call(UV_BIOS_FREQ_BASE, clock_type, in uv_bios_freq_base()
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| /linux-4.1.27/sound/pci/pcxhr/ |
| D | pcxhr_mix22.c | 416 enum pcxhr_clock_type clock_type, in hr222_get_external_clock() argument
423 if (clock_type == HR22_CLOCK_TYPE_AES_SYNC) { in hr222_get_external_clock()
429 } else if (clock_type == HR22_CLOCK_TYPE_AES_1 && mgr->board_has_aes1) { in hr222_get_external_clock()
438 clock_type); in hr222_get_external_clock()
444 "get_external_clock(%d) = 0 Hz\n", clock_type); in hr222_get_external_clock()
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| D | pcxhr_mix22.h | 32 enum pcxhr_clock_type clock_type,
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| D | pcxhr.h | 210 enum pcxhr_clock_type clock_type,
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| D | pcxhr.c | 427 enum pcxhr_clock_type clock_type, in pcxhr_sub_get_external_clock() argument
434 switch (clock_type) { in pcxhr_sub_get_external_clock()
490 enum pcxhr_clock_type clock_type, in pcxhr_get_external_clock() argument
494 return hr222_get_external_clock(mgr, clock_type, in pcxhr_get_external_clock()
497 return pcxhr_sub_get_external_clock(mgr, clock_type, in pcxhr_get_external_clock()
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| /linux-4.1.27/arch/arm/mach-ixp4xx/include/mach/ |
| D | platform.h | 108 int (*set_clock)(int port, unsigned int clock_type);
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| /linux-4.1.27/arch/arm/mach-ixp4xx/ |
| D | goramo_mlr.c | 132 static int hss_set_clock(int port, unsigned int clock_type) in hss_set_clock() argument
136 switch (clock_type) { in hss_set_clock()
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| /linux-4.1.27/arch/mips/cavium-octeon/ |
| D | octeon-platform.c | 103 const char *clock_type; in octeon2_usb_clocks_start() local
117 "refclk-type", &clock_type); in octeon2_usb_clocks_start()
119 if (!i && strcmp("crystal", clock_type) == 0) in octeon2_usb_clocks_start()
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| /linux-4.1.27/drivers/video/fbdev/ |
| D | sm501fb.c | 437 unsigned int clock_type; in sm501fb_set_par_common() local
448 clock_type = SM501_CLOCK_V2XCLK; in sm501fb_set_par_common()
454 clock_type = SM501_CLOCK_P2XCLK; in sm501fb_set_par_common()
461 clock_type = 0; in sm501fb_set_par_common()
507 sm501pixclock = sm501_set_clock(fbi->dev->parent, clock_type, in sm501fb_set_par_common()
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| /linux-4.1.27/drivers/char/pcmcia/ |
| D | synclink_cs.c | 4138 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; in hdlcdev_ioctl()
4139 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; in hdlcdev_ioctl()
4140 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; in hdlcdev_ioctl()
4141 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; in hdlcdev_ioctl()
4142 default: new_line.clock_type = CLOCK_DEFAULT; in hdlcdev_ioctl()
4159 switch (new_line.clock_type) in hdlcdev_ioctl()
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| /linux-4.1.27/drivers/gpu/drm/radeon/ |
| D | radeon_atombios.c | 2825 u8 clock_type, in radeon_atom_get_clock_dividers() argument
2843 args.v1.ucAction = clock_type; in radeon_atom_get_clock_dividers()
2857 args.v2.ucAction = clock_type; in radeon_atom_get_clock_dividers()
2872 if (clock_type == COMPUTE_ENGINE_PLL_PARAM) { in radeon_atom_get_clock_dividers()
2873 args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); in radeon_atom_get_clock_dividers()
2891 args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock); in radeon_atom_get_clock_dividers()
2922 args.v6_in.ulClock.ulComputeClockFlag = clock_type; in radeon_atom_get_clock_dividers()
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| D | radeon.h | 286 u8 clock_type,
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| /linux-4.1.27/drivers/tty/ |
| D | synclink_gt.c | 1655 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; in hdlcdev_ioctl()
1656 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; in hdlcdev_ioctl()
1657 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; in hdlcdev_ioctl()
1658 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; in hdlcdev_ioctl()
1659 default: new_line.clock_type = CLOCK_DEFAULT; in hdlcdev_ioctl()
1676 switch (new_line.clock_type) in hdlcdev_ioctl()
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| D | synclinkmp.c | 1771 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; in hdlcdev_ioctl()
1772 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; in hdlcdev_ioctl()
1773 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; in hdlcdev_ioctl()
1774 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; in hdlcdev_ioctl()
1775 default: new_line.clock_type = CLOCK_DEFAULT; in hdlcdev_ioctl()
1792 switch (new_line.clock_type) in hdlcdev_ioctl()
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| D | synclink.c | 7867 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; in hdlcdev_ioctl()
7868 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; in hdlcdev_ioctl()
7869 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; in hdlcdev_ioctl()
7870 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; in hdlcdev_ioctl()
7871 default: new_line.clock_type = CLOCK_DEFAULT; in hdlcdev_ioctl()
7888 switch (new_line.clock_type) in hdlcdev_ioctl()
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| /linux-4.1.27/drivers/staging/octeon-usb/ |
| D | octeon-hcd.c | 3580 const char *clock_type; in octeon_usb_probe() local
3613 "refclk-type", &clock_type); in octeon_usb_probe()
3615 if (!i && strcmp("crystal", clock_type) == 0) in octeon_usb_probe()
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