Searched refs:SZ_4K (Results 1 - 136 of 136) sorted by relevance

/linux-4.1.27/arch/arm/mach-w90x900/include/mach/
H A Dmap.h37 #define W90X900_SZ_IRQ SZ_4K
41 #define W90X900_SZ_GCR SZ_4K
46 #define W90X900_SZ_CLKPWR SZ_4K
51 #define W90X900_SZ_EBI SZ_4K
56 #define W90X900_SZ_UART SZ_4K
61 #define W90X900_SZ_TIMER SZ_4K
66 #define W90X900_SZ_GPIO SZ_4K
71 #define W90X900_SZ_GDMA SZ_4K
76 #define W90X900_SZ_USBEHCIHOST SZ_4K
80 #define W90X900_SZ_USBOHCIHOST SZ_4K
85 #define W90X900_SZ_I2C SZ_4K
90 #define W90X900_SZ_KPI SZ_4K
95 #define W90X900_SZ_SC SZ_4K
100 #define W90X900_SZ_LCD SZ_4K
105 #define W90X900_SZ_GE SZ_4K
110 #define W90X900_SZ_ATAPI SZ_4K
115 #define W90X900_SZ_ADC SZ_4K
120 #define W90X900_SZ_PS2 SZ_4K
125 #define W90X900_SZ_RTC SZ_4K
130 #define W90X900_SZ_PWM SZ_4K
135 #define W90X900_SZ_ACTL SZ_4K
140 #define W90X900_SZ_DMA SZ_4K
145 #define W90X900_SZ_FMI SZ_4K
150 #define W90X900_SZ_USBDEV SZ_4K
155 #define W90X900_SZ_EMC SZ_4K
/linux-4.1.27/arch/arm/mach-ux500/
H A Dcpu-db8500.c48 __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
49 __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
54 __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
55 __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
56 __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
57 __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
60 __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
61 __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
62 __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
63 __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
64 __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
66 __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
67 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
68 __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
69 __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
74 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
75 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
81 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
82 __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
H A Dcpu.c78 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); ux500_init_irq()
79 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); ux500_init_irq()
/linux-4.1.27/arch/arm/mach-imx/devices/
H A Dplatform-imx-i2c.c26 imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K);
31 imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K);
37 imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K)
46 imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K)
56 imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K)
H A Dplatform-spi_imx.c27 imx_spi_imx_data_entry(MX1, CSPI, "imx1-cspi", _id, _hwid, SZ_4K)
36 imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K)
45 imx_spi_imx_data_entry(MX27, CSPI, "imx27-cspi", _id, _hwid, SZ_4K)
55 imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K)
65 imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K)
H A Dplatform-imx-fb.c24 imx_imx_fb_data_entry_single(MX1, "imx1-fb", SZ_4K);
29 imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K);
34 imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K);
H A Dplatform-imx-ssi.c27 imx_imx_ssi_data_entry(MX21, _id, _hwid, SZ_4K)
36 imx_imx_ssi_data_entry(MX27, _id, _hwid, SZ_4K)
45 imx_imx_ssi_data_entry(MX31, _id, _hwid, SZ_4K)
54 imx_imx_ssi_data_entry(MX35, _id, _hwid, SZ_4K)
H A Dplatform-imx2-wdt.c25 imx_imx2_wdt_data_entry_single(MX21, 0, , SZ_4K);
30 imx_imx2_wdt_data_entry_single(MX27, 0, , SZ_4K);
H A Dplatform-mxc_nand.c34 imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K);
39 imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K);
44 imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K);
H A Dplatform-imx-uart.c42 imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K)
53 imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K)
66 imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K)
H A Dplatform-mxc-mmc.c29 imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K)
38 imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K)
H A Dplatform-fec.c40 .end = data->iobase + SZ_4K - 1, imx_add_fec()
H A Dplatform-imx-dma.c17 .end = iobase + SZ_4K - 1, imx_add_imx_dma()
H A Dplatform-mx2-camera.c16 .iosizecsi = SZ_4K, \
H A Dplatform-mxc_w1.c43 .end = data->iobase + SZ_4K - 1, imx_add_mxc_w1()
H A Dplatform-pata_imx.c18 imx_pata_imx_data_entry_single(MX27, SZ_4K);
/linux-4.1.27/arch/arm/mach-realview/
H A Drealview_pb1176.c57 .length = SZ_4K,
62 .length = SZ_4K,
67 .length = SZ_4K,
72 .length = SZ_4K,
77 .length = SZ_4K,
82 .length = SZ_4K,
87 .length = SZ_4K,
92 .length = SZ_4K,
104 .length = SZ_4K,
292 .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
H A Drealview_pbx.c54 .length = SZ_4K,
59 .length = SZ_4K,
64 .length = SZ_4K,
69 .length = SZ_4K,
74 .length = SZ_4K,
79 .length = SZ_4K,
94 .length = SZ_4K,
104 .length = SZ_4K,
109 .length = SZ_4K,
H A Drealview_pb11mp.c55 .length = SZ_4K,
60 .length = SZ_4K,
65 .length = SZ_4K,
75 .length = SZ_4K,
80 .length = SZ_4K,
85 .length = SZ_4K,
97 .length = SZ_4K,
H A Drealview_pba8.c52 .length = SZ_4K,
57 .length = SZ_4K,
62 .length = SZ_4K,
67 .length = SZ_4K,
72 .length = SZ_4K,
77 .length = SZ_4K,
92 .length = SZ_4K,
H A Drealview_eb.c55 .length = SZ_4K,
60 .length = SZ_4K,
65 .length = SZ_4K,
70 .length = SZ_4K,
75 .length = SZ_4K,
80 .length = SZ_4K,
87 .length = SZ_4K,
247 void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K); eth_device_register()
308 .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1),
H A Dcore.c144 .end = REALVIEW_CF_BASE + SZ_4K - 1,
176 .end = REALVIEW_I2C_BASE + SZ_4K - 1,
/linux-4.1.27/arch/arm/mach-tegra/
H A Diomap.h32 #define TEGRA_ARM_INT_DIST_SIZE SZ_4K
50 #define TEGRA_CLK_RESET_SIZE SZ_4K
59 #define TEGRA_EXCEPTION_VECTORS_SIZE SZ_4K
62 #define TEGRA_APB_MISC_SIZE SZ_4K
H A Dirammap.h30 #define TEGRA_IRAM_LPx_RESUME_AREA (TEGRA_IRAM_BASE + SZ_4K)
H A Dflowctrl.c155 unsigned long size = SZ_4K; tegra_flowctrl_init()
/linux-4.1.27/include/linux/irqchip/
H A Darm-gic-acpi.h20 #define ACPI_GICV2_DIST_MEM_SIZE (SZ_4K)
/linux-4.1.27/arch/arm/mach-integrator/
H A Dintegrator_cp.c70 .length = SZ_4K,
75 .length = SZ_4K,
80 .length = SZ_4K,
85 .length = SZ_4K,
90 .length = SZ_4K,
95 .length = SZ_4K,
100 .length = SZ_4K,
H A Dintegrator_ap.c87 .length = SZ_4K,
92 .length = SZ_4K,
97 .length = SZ_4K,
102 .length = SZ_4K,
H A Dimpd1.c337 SZ_4K, "LM registers")) impd1_probe()
345 impd1->base = devm_ioremap(&dev->dev, dev->resource.start, SZ_4K); impd1_probe()
353 SZ_4K, "VIC")) impd1_probe()
358 SZ_4K); impd1_probe()
423 d = amba_ahb_device_add_res(&dev->dev, devname, pc_base, SZ_4K, impd1_probe()
/linux-4.1.27/arch/arm64/kernel/
H A Dvmlinux.lds.S33 . = ALIGN(SZ_4K); \
176 ASSERT(__hyp_idmap_text_end - (__hyp_idmap_text_start & ~(SZ_4K - 1)) <= SZ_4K,
H A Dinsn.c713 BUG_ON(imm & ~(SZ_4K - 1)); aarch64_insn_gen_add_sub_imm()
/linux-4.1.27/arch/arm/mach-davinci/
H A Ddevices-da8xx.c299 .end = DA8XX_I2C0_BASE + SZ_4K - 1,
319 .end = DA8XX_I2C1_BASE + SZ_4K - 1,
355 .end = DA8XX_WDOG_BASE + SZ_4K - 1,
434 .end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
680 .end = DA8XX_LCD_CNTRL_BASE + SZ_4K - 1,
706 .end = DA8XX_GPIO_BASE + SZ_4K - 1,
732 .end = DA8XX_MMCSD0_BASE + SZ_4K - 1,
769 .end = DA850_MMCSD1_BASE + SZ_4K - 1,
892 .end = DA8XX_RTC_BASE + SZ_4K - 1,
965 .end = DA8XX_SPI0_BASE + SZ_4K - 1,
988 .end = DA830_SPI1_BASE + SZ_4K - 1,
1051 da8xx_spi1_resources[0].end = DA850_SPI1_BASE + SZ_4K - 1; da8xx_register_spi_bus()
H A Dpsc.c43 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); davinci_psc_is_clk_active()
64 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); davinci_psc_reset()
91 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K); davinci_psc_config()
H A Ddevices.c135 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1,
173 .end = DM355_MMCSD1_BASE + SZ_4K - 1,
241 SZ_4K - 1; davinci_setup_mmc()
252 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1; davinci_setup_mmc()
263 SZ_4K - 1; davinci_setup_mmc()
H A Dcommon.c49 base = ioremap(soc_info->jtag_id_reg, SZ_4K); davinci_init_id()
H A Dmux.c46 pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K); davinci_cfg_reg()
H A Dserial.c94 p->membase = ioremap(p->mapbase, SZ_4K); davinci_serial_init()
H A Dusb.c147 .end = DA8XX_USB1_BASE + SZ_4K - 1,
H A Dboard-sffsdr.c80 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
H A Dirq.c79 davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K); davinci_irq_init()
H A Dboard-dm355-leopard.c90 .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
H A Dboard-neuros-osd2.c103 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
H A Dtime.c210 base[i] = ioremap(dtip[i].base, SZ_4K); timer_init()
414 base = ioremap(pdev->resource[0].start, SZ_4K); davinci_watchdog_reset()
H A Dda850.c1176 pdata->cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K); da850_register_pm()
1180 pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K); da850_register_pm()
1186 pdata->ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K); da850_register_pm()
1322 da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); da850_init()
1326 da8xx_syscfg1_base = ioremap(DA8XX_SYSCFG1_BASE, SZ_4K); da850_init()
H A Ddm644x.c363 .end = DM644X_EMAC_MDIO_BASE + SZ_4K - 1,
764 .end = DAVINCI_GPIO_BASE + SZ_4K - 1,
H A Ddm646x.c415 .end = DM646X_EMAC_MDIO_BASE + SZ_4K - 1,
748 .end = DAVINCI_GPIO_BASE + SZ_4K - 1,
H A Dboard-dm355-evm.c94 .end = DM355_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
H A Dboard-dm365-evm.c156 .end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
H A Dboard-dm644x-evm.c168 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
H A Dboard-dm646x-evm.c105 .end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
H A Dclock.c609 pll->base = ioremap(pll->phys_base, SZ_4K); davinci_clk_init()
H A Ddm365.c704 .end = DAVINCI_GPIO_BASE + SZ_4K - 1,
775 .end = DM365_EMAC_MDIO_BASE + SZ_4K - 1,
H A Ddm355.c877 .end = DAVINCI_GPIO_BASE + SZ_4K - 1,
H A Dda830.c1215 da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); da830_init()
/linux-4.1.27/drivers/iommu/
H A Domap-iommu.h174 ((bytes) >= SZ_4K) ? SZ_4K : 0)
180 ((bytes) == SZ_4K) ? MMU_CAM_PGSZ_4K : -1)
186 ((iopgsz) == MMU_CAM_PGSZ_4K) ? SZ_4K : 0)
H A Dmsm_iommu.c46 #define MSM_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M)
103 dmac_flush_range(sl_table, sl_table + SZ_4K); __flush_iotlb()
396 len != SZ_64K && len != SZ_4K) { msm_iommu_map()
436 if ((len == SZ_4K || len == SZ_64K) && (*fl_pte) == 0) { msm_iommu_map()
439 get_order(SZ_4K)); msm_iommu_map()
447 memset(sl, 0, SZ_4K); msm_iommu_map()
456 if (len == SZ_4K) msm_iommu_map()
494 len != SZ_64K && len != SZ_4K) { msm_iommu_unmap()
529 if (len == SZ_4K) msm_iommu_unmap()
532 if (len == SZ_4K || len == SZ_64K) { msm_iommu_unmap()
H A Dio-pgtable-arm.c538 case SZ_4K: arm_lpae_restrict_pgsizes()
539 cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G); arm_lpae_restrict_pgsizes()
560 if (!(cfg->pgsize_bitmap & (SZ_4K | SZ_16K | SZ_64K))) arm_lpae_alloc_pgtable()
607 case SZ_4K: arm_64_lpae_alloc_pgtable_s1()
707 case SZ_4K: arm_64_lpae_alloc_pgtable_s2()
770 cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G); arm_32_lpae_alloc_pgtable_s1()
788 cfg->pgsize_bitmap &= (SZ_4K | SZ_2M | SZ_1G); arm_32_lpae_alloc_pgtable_s2()
976 SZ_4K | SZ_2M | SZ_1G, arm_lpae_do_selftests()
H A Dshmobile-iommu.c230 case SZ_4K: shmobile_iommu_map()
294 ret = SZ_4K; shmobile_iommu_unmap()
374 .pgsize_bitmap = SZ_1M | SZ_64K | SZ_4K,
H A Dipmmu-vmsa.c326 domain->cfg.pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K, ipmmu_domain_init_context()
755 .pgsize_bitmap = SZ_1G | SZ_2M | SZ_4K,
H A Dtegra-gart.c37 #define GART_IOMMU_PGSIZES (SZ_4K)
H A Dtegra-smmu.c660 .pgsize_bitmap = SZ_4K,
H A Darm-smmu.c1655 size = SZ_4K | SZ_2M | SZ_1G; arm_smmu_device_cfg_probe()
1664 size |= SZ_4K | SZ_2M | SZ_1G; arm_smmu_device_cfg_probe()
H A Domap-iommu.c47 #define OMAP_IOMMU_PGSIZES (SZ_4K | SZ_64K | SZ_1M | SZ_16M)
/linux-4.1.27/include/linux/
H A Dsizes.h24 #define SZ_4K 0x00001000 macro
/linux-4.1.27/arch/arm/mach-cns3xxx/
H A Dcore.c38 .length = SZ_4K,
43 .length = SZ_4K,
48 .length = SZ_4K,
54 .length = SZ_4K,
69 .length = SZ_4K,
260 void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); cns3xxx_l2x0_init()
H A Ddevices.c81 .end = CNS3XXX_SDIO_BASE + SZ_4K - 1,
H A Dcns3420vb.c234 .length = SZ_4K,
/linux-4.1.27/arch/arm/plat-samsung/
H A Ddevs.c195 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
225 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
257 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
287 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
318 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
354 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
384 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
414 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
444 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
474 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
504 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
534 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
812 DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K),
/linux-4.1.27/arch/arm/mach-ep93xx/
H A Dvision_ep9307.c53 .length = SZ_4K,
180 .size = SZ_4K,
184 .size = SZ_4K,
H A Dts72xx.c212 .end = TS72XX_WDT_CONTROL_PHYS_BASE + SZ_4K - 1,
217 .end = TS72XX_WDT_FEED_PHYS_BASE + SZ_4K - 1,
H A Dsnappercl15.c113 .end = SNAPPERCL15_NAND_BASE + SZ_4K - 1,
/linux-4.1.27/arch/arm/mach-s3c64xx/
H A Dcommon.c110 .length = SZ_4K,
115 .length = SZ_4K,
120 .length = SZ_4K,
140 .length = SZ_4K,
145 .length = SZ_4K,
150 .length = SZ_4K,
H A Dmach-s3c64xx-dt.c33 .length = SZ_4K,
/linux-4.1.27/drivers/sh/intc/
H A Duserimask.c76 uimask = ioremap_nocache(addr, SZ_4K); register_intc_userimask()
/linux-4.1.27/drivers/clk/mmp/
H A Dclk-pxa910.c76 mpmu_base = ioremap(APB_PHYS_BASE + 0x50000, SZ_4K); pxa910_clk_init()
82 apmu_base = ioremap(AXI_PHYS_BASE + 0x82800, SZ_4K); pxa910_clk_init()
88 apbcp_base = ioremap(APB_PHYS_BASE + 0x3b000, SZ_4K); pxa910_clk_init()
94 apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K); pxa910_clk_init()
H A Dclk-pxa168.c77 mpmu_base = ioremap(APB_PHYS_BASE + 0x50000, SZ_4K); pxa168_clk_init()
83 apmu_base = ioremap(AXI_PHYS_BASE + 0x82800, SZ_4K); pxa168_clk_init()
89 apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K); pxa168_clk_init()
H A Dclk-mmp2.c86 mpmu_base = ioremap(APB_PHYS_BASE + 0x50000, SZ_4K); mmp2_clk_init()
92 apmu_base = ioremap(AXI_PHYS_BASE + 0x82800, SZ_4K); mmp2_clk_init()
98 apbc_base = ioremap(APB_PHYS_BASE + 0x15000, SZ_4K); mmp2_clk_init()
/linux-4.1.27/arch/sh/boards/mach-sdk7786/
H A Dsram.c47 phys = (area << 26) + SZ_64M - SZ_4K; fpga_sram_init()
/linux-4.1.27/arch/arm/mach-omap2/
H A Domap_hwmod_2xxx_3xxx_interconnect_data.c149 .pa_end = 0x48056000 + SZ_4K - 1,
H A Diomap.h89 #define DSP_IPI_2420_SIZE SZ_4K
93 #define DSP_MMU_2420_SIZE SZ_4K
H A Domap4-common.c135 l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K); omap_l2_cache_init()
H A Domap_hwmod_33xx_43xx_interconnect_data.c376 .pa_end = 0x48060100 + SZ_4K - 1,
394 .pa_end = 0x481d8100 + SZ_4K - 1,
H A Domap_hwmod_3xxx_data.c2545 .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1,
2563 .pa_end = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1,
/linux-4.1.27/arch/arm/mach-nspire/
H A Dnspire.c68 void __iomem *base = ioremap(NSPIRE_MISC_PHYS_BASE, SZ_4K); nspire_restart()
/linux-4.1.27/arch/arm/mach-omap1/
H A Dfpga.h27 #define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */
H A Dboard-fsample.c47 #define FSAMPLE_CPLD_SIZE SZ_4K
208 .end = OMAP_CS3_PHYS + SZ_4K - 1,
H A Dboard-perseus2.c166 .end = OMAP_CS3_PHYS + SZ_4K - 1,
H A Dboard-h2.c381 h2_nand_resource.end += SZ_4K - 1; h2_init()
H A Dboard-h3.c408 nand_resource.end += SZ_4K - 1; h3_init()
H A Dboard-osk.c313 .byte_len = SZ_4K / 8,
/linux-4.1.27/arch/arm/mach-sa1100/
H A Dh3xxx.c249 DEFINE_RES_MEM(0x80010000, SZ_4K),
250 DEFINE_RES_MEM(0x80020000, SZ_4K),
H A Dcollie.c57 [0] = DEFINE_RES_MEM(0x40800000, SZ_4K),
H A Dneponset.c297 d->base = ioremap(nep_res->start, SZ_4K); neponset_probe()
/linux-4.1.27/arch/arm/mach-versatile/
H A Dcore.c135 .length = SZ_4K,
140 .length = SZ_4K,
145 .length = SZ_4K,
150 .length = SZ_4K * 9,
165 .length = SZ_4K,
173 .length = SZ_4K,
252 .end = VERSATILE_I2C_BASE + SZ_4K - 1,
301 .end = (VERSATILE_CHAR_LCD_BASE + SZ_4K - 1),
/linux-4.1.27/arch/arm/mach-nomadik/
H A Dcpu-8815.c92 .length = SZ_4K,
104 void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K); cpu8815_restart()
/linux-4.1.27/include/linux/amba/
H A Dbus.h143 .res = DEFINE_RES_MEM(base, SZ_4K), \
154 .res = DEFINE_RES_MEM(base, SZ_4K), \
/linux-4.1.27/arch/arm/mach-spear/
H A Dspear13xx.c79 .length = SZ_4K,
/linux-4.1.27/arch/arm/mach-footbridge/
H A Debsa285.c75 xbus = ioremap(XBUS_CS2, SZ_4K); ebsa285_leds_init()
/linux-4.1.27/arch/arm/mach-imx/
H A Dmm-imx21.c79 DEFINE_RES_MEM(MX21_AUDMUX_BASE_ADDR, SZ_4K),
H A Dmm-imx27.c79 DEFINE_RES_MEM(MX27_AUDMUX_BASE_ADDR, SZ_4K),
H A Dplatsmp.c31 .length = SZ_4K,
H A D3ds_debugboard.c161 brd_io = ioremap(BOARD_IO_ADDR(base), SZ_4K); mxc_expio_init()
H A Dclk-imx27.c166 ccm = ioremap(MX27_CCM_BASE_ADDR, SZ_4K); mx27_clocks_init()
/linux-4.1.27/drivers/mtd/nand/
H A Dnand_ids.c36 SZ_4K, SZ_512, SZ_256K, 0, 8, 224, NAND_ECC_INFO(4, SZ_512) },
39 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
42 SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
/linux-4.1.27/drivers/clk/ux500/
H A Dclk-prcc.c116 clk->base = ioremap(phy_base, SZ_4K); clk_reg_prcc()
/linux-4.1.27/arch/sh/boards/mach-microdev/
H A Dsetup.c25 .end = 0x300 + SZ_4K - 1,
/linux-4.1.27/arch/arm/mach-s3c24xx/include/mach/
H A Dmap.h70 #define S3C2416_SZ_HSUDC (SZ_4K)
/linux-4.1.27/arch/arm/mach-s3c64xx/include/mach/
H A Dmap.h87 #define S3C64XX_SZ_GPIO SZ_4K
/linux-4.1.27/arch/arm/mach-hisi/
H A Dplatsmp.c49 scu_base = ioremap(base, SZ_4K); hisi_enable_scu_a9()
/linux-4.1.27/drivers/pcmcia/
H A Domap_cf.c168 io->start = cf->phys_cf + SZ_4K; omap_cf_set_io_map()
256 ioremap(cf->phys_cf + SZ_4K, SZ_2K); omap_cf_probe()
/linux-4.1.27/arch/arm/mach-s3c24xx/
H A Dmach-anubis.c85 .length = SZ_4K,
90 .length = SZ_4K,
/linux-4.1.27/arch/arm/mach-exynos/
H A Dexynos.c42 .length = SZ_4K,
71 .length = SZ_4K,
/linux-4.1.27/arch/arm/plat-orion/
H A Dcommon.c769 fill_resources(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, orion_ehci_init()
794 mapbase, SZ_4K - 1, irq); orion_ehci_1_init()
818 mapbase, SZ_4K - 1, irq); orion_ehci_2_init()
/linux-4.1.27/drivers/tty/serial/
H A Dearlycon.c205 port->membase = earlycon_map(addr, SZ_4K); of_setup_earlycon()
H A Dlpc32xx_hs.c587 release_mem_region(port->mapbase, SZ_4K); serial_lpc32xx_release_port()
598 if (!request_mem_region(port->mapbase, SZ_4K, MODNAME)) serial_lpc32xx_request_port()
601 port->membase = ioremap(port->mapbase, SZ_4K); serial_lpc32xx_request_port()
603 release_mem_region(port->mapbase, SZ_4K); serial_lpc32xx_request_port()
H A Damba-pl011.c1916 release_mem_region(port->mapbase, SZ_4K); pl011_release_port()
1924 return request_mem_region(port->mapbase, SZ_4K, "uart-pl011") pl011_request_port()
/linux-4.1.27/arch/arm/mach-rockchip/
H A Dpm.c62 rkpm_bootdata_cpusp = rk3288_bootram_phy + (SZ_4K - 8); rk3288_config_bootdata()
/linux-4.1.27/arch/arm/mach-davinci/include/mach/
H A Dda8xx.h53 #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
/linux-4.1.27/arch/arm/mach-highbank/
H A Dhighbank.c50 scu_base_addr = ioremap(base, SZ_4K); highbank_scu_map_io()
/linux-4.1.27/arch/arm/mach-iop13xx/
H A Dtpmi.c34 #define IOP13XX_TPMI_MMR_SIZE (SZ_4K - 1)
/linux-4.1.27/arch/arm/mach-omap1/include/mach/
H A Domap1510.h54 #define OMAP1510_FPGA_SIZE SZ_4K
/linux-4.1.27/drivers/irqchip/
H A Dirq-omap-intc.c271 omap_irq_base = ioremap(base, SZ_4K); omap_init_irq_legacy()
H A Dirq-gic-v3-its.c899 case SZ_4K: its_alloc_tables()
939 psz = SZ_4K; its_alloc_tables()
1497 (ITS_CMD_QUEUE_SZ / SZ_4K - 1) | its_probe()
/linux-4.1.27/drivers/mmc/host/
H A Dpxamci.c639 r = request_mem_region(r->start, SZ_4K, DRIVER_NAME); pxamci_probe()
716 host->base = ioremap(r->start, SZ_4K); pxamci_probe()
/linux-4.1.27/drivers/misc/
H A Darm-charlcd.c325 release_mem_region(lcd->phybase, SZ_4K); charlcd_probe()
/linux-4.1.27/drivers/watchdog/
H A Dcoh901327_wdt.c379 release_mem_region(phybase, SZ_4K); coh901327_probe()
/linux-4.1.27/drivers/pci/host/
H A Dpci-keystone-dw.c435 writel(SZ_4K - 1, pp->dbi_base + PCI_BASE_ADDRESS_0); ks_dw_pcie_v3_65_scan_bus()
/linux-4.1.27/virt/kvm/arm/
H A Dvgic.c1877 if (addr & (SZ_4K - 1)) vgic_ioaddr_assign()
1920 alignment = SZ_4K; kvm_vgic_addr()
1926 alignment = SZ_4K; kvm_vgic_addr()
/linux-4.1.27/arch/arm/mach-pxa/
H A Dspitz.c785 .end = PXA_CS3_PHYS + SZ_4K - 1,
/linux-4.1.27/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c1494 msm_host->rx_buf = devm_kzalloc(&pdev->dev, SZ_4K, GFP_KERNEL); msm_dsi_host_init()
1569 ret = dsi_tx_buf_alloc(msm_host, SZ_4K); msm_dsi_host_modeset_init()
/linux-4.1.27/arch/arm/mm/
H A Dcache-l2x0.c1413 .way_size_0 = SZ_4K,
1432 .way_size_0 = SZ_4K,
/linux-4.1.27/drivers/mtd/onenand/
H A Dsamsung.c924 onenand->page_buf = kzalloc(SZ_4K, GFP_KERNEL); s3c_onenand_probe()
/linux-4.1.27/drivers/media/platform/exynos4-is/
H A Dmipi-csis.c115 #define S5PCSIS_PKTDATA_SIZE SZ_4K
/linux-4.1.27/drivers/media/i2c/s5c73m3/
H A Ds5c73m3-core.c51 #define S5C73M3_EMBEDDED_DATA_MAXLEN SZ_4K
/linux-4.1.27/drivers/bus/
H A Darm-cci.c80 #define CCI_PMU_CNTR_BASE(idx) ((idx) * SZ_4K)
/linux-4.1.27/drivers/video/fbdev/omap2/dss/
H A Ddispc.c50 #define DISPC_SZ_REGS SZ_4K

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